[all-commits] [llvm/llvm-project] 785edd: [AMDGPU][GlobalIsel] Introduce isRegisterClassType...

[sstipanovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 785eddd7a786b798427e336b79bc0f2495a49984
      https://github.com/llvm/llvm-project/commit/785eddd7a786b798427e336b79bc0f2495a49984
  Author: sstipanovic <146831748+sstipanovic at users.noreply.github.com>
  Date:   2024-02-13 (Tue, 13 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    A llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.mir

  Log Message:
  -----------
  [AMDGPU][GlobalIsel] Introduce isRegisterClassType to check for legal types, instead of checking bit width.  (#68189)

In D151116 it was suggested to have a set of classes to cover every
possible case. This does it for bitcast first.

closes #79578