[all-commits] [llvm/llvm-project] 73159a: [NFC] Refactor fast-math handling for clang driver...
Amir Ayupov via All-commits
all-commits at lists.llvm.org
Mon Feb 12 14:38:39 PST 2024
Branch: refs/heads/users/aaupov/spr/bolt-propagate-bolterrors-from-core-rewriteinstance-and-passes-2n
Home: https://github.com/llvm/llvm-project
Commit: 73159a994abcbf82881ee15b0df5cf13c9671f31
https://github.com/llvm/llvm-project/commit/73159a994abcbf82881ee15b0df5cf13c9671f31
Author: Andy Kaylor <andrew.kaylor at intel.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
Log Message:
-----------
[NFC] Refactor fast-math handling for clang driver (#81173)
This refactors the fast-math handling in the clang driver, moving the
settings into a lambda that is shared by the -ffp-model=fast and
-ffast-math code. Previously the -ffp-model=fast handler changed the
local option variable and fell through to the -ffast-math handler.
This refactoring is intended to prepare the way for decoupling the
-ffp-model=fast settings from the -ffast-math settings and possibly
introduce a less aggressive fp-model.
Commit: 8799d7143f8b75ba722f438d0d2388bfaefa793b
https://github.com/llvm/llvm-project/commit/8799d7143f8b75ba722f438d0d2388bfaefa793b
Author: Artem Belevich <tra at google.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
Log Message:
-----------
[NVPTX] Fix the error in a pattern match in v4i8 comparisons. (#81308)
The replacement should've had BFE() as the arguments for the comparison,
not the source register.
While at that, tighten the patterns a bit, and expand them to cover
variants with immediate arguments. Also change the default lowering of
bfe() to use unsigned variant, so the value of the upper bits is
predictable.
Commit: fa6850a9981b65972294e13021f82b96d460b3ec
https://github.com/llvm/llvm-project/commit/fa6850a9981b65972294e13021f82b96d460b3ec
Author: Rishi Surendran <142182875+rishisurendran at users.noreply.github.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/Metadata.h
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Target/LLVMIR/LLVMTranslationInterface.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[mlir][nvvm]Add support for grid_constant attribute on LLVM function arguments (#78228)
Add support for attribute nvvm.grid_constant on LLVM function arguments.
The attribute can be attached only to arguments of type llvm.ptr that
have llvm.byval attribute.
Generate LLVM metadata for functions with nvvm.grid_constant arguments.
The metadata node is a list of integers, where each integer n denotes
that the nth parameter has the
grid_constant annotation (numbering from 1). The generated metadata node
will be handled by NVVM compiler. See
https://docs.nvidia.com/cuda/nvvm-ir-spec/index.html#supported-properties
for documentation on grid_constant property.
This patch also adds convertParameterAttr to
LLVMTranslationDialectInterface for supporting the translation of
derived dialect attributes on function parameters
Commit: 61a0fc794789e5bf9f850436926700c3ad56682b
https://github.com/llvm/llvm-project/commit/61a0fc794789e5bf9f850436926700c3ad56682b
Author: Artem Belevich <tra at google.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M llvm/test/CodeGen/NVPTX/nanosleep.ll
Log Message:
-----------
[NVPTX] pass correct GPU arch to ptxas test (#81535)
Commit: 537042577252ce84774aa4f7fbafef8c39b4032c
https://github.com/llvm/llvm-project/commit/537042577252ce84774aa4f7fbafef8c39b4032c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SCF/IR/SCF.cpp
Log Message:
-----------
Apply clang-tidy fixes for bugprone-argument-comment in SCF.cpp (NFC)
Commit: 8189db978fa73a09c040a1e698d85f8b4a63cd37
https://github.com/llvm/llvm-project/commit/8189db978fa73a09c040a1e698d85f8b4a63cd37
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
Log Message:
-----------
Apply clang-tidy fixes for performance-unnecessary-value-param in BufferizableOpInterfaceImpl.cpp (NFC)
Commit: e546a6e95da62b39ba7903e0371fdaa210417e8d
https://github.com/llvm/llvm-project/commit/e546a6e95da62b39ba7903e0371fdaa210417e8d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
Log Message:
-----------
Apply clang-tidy fixes for modernize-loop-convert in Utils.cpp (NFC)
Commit: 56c385cd677bcc4f191e8c09044155159bc9bf7b
https://github.com/llvm/llvm-project/commit/56c385cd677bcc4f191e8c09044155159bc9bf7b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
Log Message:
-----------
Apply clang-tidy fixes for modernize-loop-convert in SparseGPUCodegen.cpp (NFC)
Commit: 61f64d1c237be75bed5d717aec4de0f9df5ab2e7
https://github.com/llvm/llvm-project/commit/61f64d1c237be75bed5d717aec4de0f9df5ab2e7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
Log Message:
-----------
Apply clang-tidy fixes for llvm-qualified-auto in SparseTensorRewriting.cpp (NFC)
Commit: aef36ebb3b74c81589885c61b4fc066052dd9498
https://github.com/llvm/llvm-project/commit/aef36ebb3b74c81589885c61b4fc066052dd9498
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M clang/tools/driver/cc1_main.cpp
Log Message:
-----------
[clang] Remove old Linux kernel workaround for ensuring stack space (#81533)
PR #71709 broke the Linux PIE build with `undefined symbol: alloca`
errors. With the newly included `clang/Basic/Builtins.h` in that PR, it
surfaces an issue with a combination of two previous patches.
26670dcba1609574cba5942aff78ff97b567c5f3 added `#undef alloca` so clang
builtins handling of alloca would work under MSVC (unsure if this is
still necessary).
194b6a3b1b1a99cc3c12c466a04320f271ebd8aa added code that calls `alloca`
to workaround a Linux kernel < 4.1 bug. Given that Linux 4.1 was EOL in
2018, it should be ok to remove this workaround.
Commit: fcef407aa21ad5a79d66a088e6f2a66a5745725d
https://github.com/llvm/llvm-project/commit/fcef407aa21ad5a79d66a088e6f2a66a5745725d
Author: Konstantin Zhuravlyov <kzhuravl_dev at outlook.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
Log Message:
-----------
AMDGPU/NFC: Remove some bits from TSFlags (#81525)
- AMDGPU/NFC: Purge SOPK_ZEXT from TSFlags
- Moved to helper function in SIInstInfo
- AMDGPU/NFC: Purge VOPAsmPrefer32Bit from TSFlags
- This flag did not make sense / remnants of something else I think
Commit: 283feb42ee509cc56fb75316b4fd86b53a714cf4
https://github.com/llvm/llvm-project/commit/283feb42ee509cc56fb75316b4fd86b53a714cf4
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M polly/lib/Analysis/ScopBuilder.cpp
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_2.ll
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_3.ll
M polly/test/ScopInfo/int2ptr_ptr2int.ll
Log Message:
-----------
[polly] Make reduction detection checks more robust - part 2 (#80721)
Existing reduction detection algorithm does two types of memory checks
before marking a load store pair as reduction.
Second check is to verify there is no other memory access in ScopStmt
overlapping with the memory of load and store that forms the reduction.
Existing check misses cases where there could be probable overlap such
as
A[V] += A[P];
In the above case there is chance of overlap between A[V] and A[P] which
is missed.
This commit addresses this by removing the parameter from space before
checking for compatible space.
Part 1 of this patch :
[75297](https://github.com/llvm/llvm-project/pull/75297)
Commit: a5f3d1a803020167bd9d494a8a3921e7dcc1550a
https://github.com/llvm/llvm-project/commit/a5f3d1a803020167bd9d494a8a3921e7dcc1550a
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M bolt/include/bolt/Passes/ADRRelaxationPass.h
M bolt/include/bolt/Passes/Aligner.h
M bolt/include/bolt/Passes/AllocCombiner.h
M bolt/include/bolt/Passes/AsmDump.h
M bolt/include/bolt/Passes/BinaryPasses.h
M bolt/include/bolt/Passes/CMOVConversion.h
M bolt/include/bolt/Passes/FixRISCVCallsPass.h
M bolt/include/bolt/Passes/FixRelaxationPass.h
M bolt/include/bolt/Passes/FrameOptimizer.h
M bolt/include/bolt/Passes/Hugify.h
M bolt/include/bolt/Passes/IdenticalCodeFolding.h
M bolt/include/bolt/Passes/IndirectCallPromotion.h
M bolt/include/bolt/Passes/Inliner.h
M bolt/include/bolt/Passes/Instrumentation.h
M bolt/include/bolt/Passes/JTFootprintReduction.h
M bolt/include/bolt/Passes/LongJmp.h
M bolt/include/bolt/Passes/LoopInversionPass.h
M bolt/include/bolt/Passes/PLTCall.h
M bolt/include/bolt/Passes/PatchEntries.h
M bolt/include/bolt/Passes/RegReAssign.h
M bolt/include/bolt/Passes/ReorderData.h
M bolt/include/bolt/Passes/ReorderFunctions.h
M bolt/include/bolt/Passes/RetpolineInsertion.h
M bolt/include/bolt/Passes/SplitFunctions.h
M bolt/include/bolt/Passes/StokeInfo.h
M bolt/include/bolt/Passes/TailDuplication.h
M bolt/include/bolt/Passes/ThreeWayBranch.h
M bolt/include/bolt/Passes/ValidateInternalCalls.h
M bolt/include/bolt/Passes/ValidateMemRefs.h
M bolt/include/bolt/Passes/VeneerElimination.h
M bolt/lib/Passes/ADRRelaxationPass.cpp
M bolt/lib/Passes/Aligner.cpp
M bolt/lib/Passes/AllocCombiner.cpp
M bolt/lib/Passes/AsmDump.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/CMOVConversion.cpp
M bolt/lib/Passes/FixRISCVCallsPass.cpp
M bolt/lib/Passes/FixRelaxationPass.cpp
M bolt/lib/Passes/FrameOptimizer.cpp
M bolt/lib/Passes/Hugify.cpp
M bolt/lib/Passes/IdenticalCodeFolding.cpp
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/lib/Passes/Inliner.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Passes/JTFootprintReduction.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Passes/LoopInversionPass.cpp
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Passes/PatchEntries.cpp
M bolt/lib/Passes/RegReAssign.cpp
M bolt/lib/Passes/ReorderData.cpp
M bolt/lib/Passes/ReorderFunctions.cpp
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/lib/Passes/StokeInfo.cpp
M bolt/lib/Passes/TailDuplication.cpp
M bolt/lib/Passes/ThreeWayBranch.cpp
M bolt/lib/Passes/ValidateInternalCalls.cpp
M bolt/lib/Passes/ValidateMemRefs.cpp
M bolt/lib/Passes/VeneerElimination.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/BoltDiff.cpp
Log Message:
-----------
[BOLT][NFC] Return Error from BinaryFunctionPass::runOnFunctions (#81521)
As part of the effort to refactor old error handling code that
would directly call exit(1), in this patch we change the
interface to `BinaryFunctionPass` to return an Error on
`runOnFunctions()`. This gives passes the ability to report a
serious problem to the caller (RewriteInstance class), so the
caller may decide how to best handle the exceptional situation.
Co-authored-by: Rafael Auler <rafaelauler at fb.com>
Test Plan: NFC
Commit: 9cd577d674f3bf289c8d362483054bdbe26ad3f7
https://github.com/llvm/llvm-project/commit/9cd577d674f3bf289c8d362483054bdbe26ad3f7
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/tools/driver/cc1_main.cpp
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/nanosleep.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Target/LLVMIR/LLVMTranslationInterface.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M polly/lib/Analysis/ScopBuilder.cpp
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_2.ll
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_3.ll
M polly/test/ScopInfo/int2ptr_ptr2int.ll
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Commit: 36aec1815d0aa6a8dc4dd16fe4b981201c72120c
https://github.com/llvm/llvm-project/commit/36aec1815d0aa6a8dc4dd16fe4b981201c72120c
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-02-12 (Mon, 12 Feb 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/tools/driver/cc1_main.cpp
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/nanosleep.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Target/LLVMIR/LLVMTranslationInterface.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Target/LLVMIR/AttrKindDetail.h
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M polly/lib/Analysis/ScopBuilder.cpp
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_2.ll
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_3.ll
M polly/test/ScopInfo/int2ptr_ptr2int.ll
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/cb5a6939b09a...36aec1815d0a
More information about the All-commits
mailing list