[all-commits] [llvm/llvm-project] b5046a: [Xtensa] Initial codegen support from IR (#78548)

[Andrei Safronov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b5046a7fa9b38cfcc3980b83a93db678871ad350
      https://github.com/llvm/llvm-project/commit/b5046a7fa9b38cfcc3980b83a93db678871ad350
  Author: Andrei Safronov <safronov at espressif.com>
  Date:   2024-02-12 (Mon, 12 Feb 2024)

  Changed paths:
    M llvm/lib/Target/Xtensa/CMakeLists.txt
    A llvm/lib/Target/Xtensa/Xtensa.h
    A llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
    A llvm/lib/Target/Xtensa/XtensaAsmPrinter.h
    A llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
    A llvm/lib/Target/Xtensa/XtensaFrameLowering.h
    A llvm/lib/Target/Xtensa/XtensaISelDAGToDAG.cpp
    A llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
    A llvm/lib/Target/Xtensa/XtensaISelLowering.h
    A llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
    A llvm/lib/Target/Xtensa/XtensaInstrInfo.h
    A llvm/lib/Target/Xtensa/XtensaRegisterInfo.cpp
    A llvm/lib/Target/Xtensa/XtensaRegisterInfo.h
    A llvm/lib/Target/Xtensa/XtensaSubtarget.cpp
    A llvm/lib/Target/Xtensa/XtensaSubtarget.h
    M llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
    M llvm/lib/Target/Xtensa/XtensaTargetMachine.h
    A llvm/test/CodeGen/Xtensa/lit.local.cfg
    A llvm/test/CodeGen/Xtensa/simple.ll

  Log Message:
  -----------
  [Xtensa] Initial codegen support from IR (#78548)

This PR provides implementation of the basic codegen infra such as
TargetFrameLowering, MCInstLower,
AsmPrinter, RegisterInfo, InstructionInfo, TargetLowering,
SelectionDAGISel.

Migrated from https://reviews.llvm.org/D145658