[all-commits] [llvm/llvm-project] b45de4: [MVE] Expand64BitShift - handle all constant shift...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b45de48be24695b613f48ed21bb35f844454193b
      https://github.com/llvm/llvm-project/commit/b45de48be24695b613f48ed21bb35f844454193b
  Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
  Date:   2024-02-11 (Sun, 11 Feb 2024)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
    M llvm/test/CodeGen/Thumb2/mve-fptoui-sat-vector.ll

  Log Message:
  -----------
  [MVE] Expand64BitShift - handle all constant shift amounts less than 32 (#81261)

Expand64BitShift was always dropping to generic shift legalization if the shift amount type was larger than i64, even if the constant shift amount was actually very small. I've adjusted the constant bounds checks to work with APInt types so we can always perform the comparison.

This results in the MVE long shift instructions being used more often, and it looks like this is preventing some additional combines from happening. This could be addressed in the future.

This came about while I was trying to extend the DAGTypeLegalizer::ExpandShift* helpers and need to move to consistently using the legal shift amount types instead of reusing the shift amount type from the original wider shift.