[all-commits] [llvm/llvm-project] fbba81: [AArch64] Add the Ampere1B core (#81297)

[Philipp Tomsich via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fbba818a78f591d89f25768ba31783714d526532
      https://github.com/llvm/llvm-project/commit/fbba818a78f591d89f25768ba31783714d526532
  Author: Philipp Tomsich <philipp.tomsich at vrull.eu>
  Date:   2024-02-09 (Fri, 09 Feb 2024)

  Changed paths:
    M clang/test/Driver/aarch64-cssc.c
    M clang/test/Misc/target-invalid-cpu-note.c
    M llvm/include/llvm/TargetParser/AArch64TargetParser.h
    M llvm/lib/Target/AArch64/AArch64.td
    M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
    M llvm/lib/Target/AArch64/AArch64Subtarget.h
    M llvm/lib/TargetParser/Host.cpp
    M llvm/test/CodeGen/AArch64/cpus.ll
    M llvm/test/CodeGen/AArch64/neon-dot-product.ll
    M llvm/test/CodeGen/AArch64/remat.ll
    M llvm/test/MC/AArch64/armv8.2a-dotprod.s
    M llvm/test/MC/Disassembler/AArch64/armv8.3a-rcpc.txt
    M llvm/unittests/TargetParser/Host.cpp
    M llvm/unittests/TargetParser/TargetParserTest.cpp

  Log Message:
  -----------
  [AArch64] Add the Ampere1B core (#81297)

The Ampere1B is Ampere's third-generation core implementing a
superscalar, out-of-order microarchitecture with nested virtualization,
speculative side-channel mitigation and architectural support for
defense against ROP/JOP style software attacks.

Ampere1B is an ARMv8.7+ implementation, adding support for the FEAT
WFxT, FEAT CSSC, FEAT PAN3 and FEAT AFP extensions. It also includes all
features of the second-generation Ampere1A, such as the Memory Tagging
Extension and SM3/SM4 cryptography instructions.