[all-commits] [llvm/llvm-project] 5f6640: [OpenMP52][LIBOMPTARGET] Do not throw error in omp...
John Demme via All-commits
all-commits at lists.llvm.org
Thu Feb 8 09:23:51 PST 2024
Branch: refs/heads/users/teqdruid/mlir/python-liveobjects
Home: https://github.com/llvm/llvm-project
Commit: 5f6640e268b5e6ead22983ba9e2074e3bbf0612b
https://github.com/llvm/llvm-project/commit/5f6640e268b5e6ead22983ba9e2074e3bbf0612b
Author: Saiyedul Islam <Saiyedul.Islam at amd.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M openmp/libomptarget/src/OpenMP/API.cpp
Log Message:
-----------
[OpenMP52][LIBOMPTARGET] Do not throw error in omp_get_mapped_ptr for the host (#80038)
OpenMP spec 5.2 specifies return value to be the host ptr
in case of device_num being same as omp_get_initial_device().
Commit: 285bc69846e76af805cd106ea3ea538a12f5c9b6
https://github.com/llvm/llvm-project/commit/285bc69846e76af805cd106ea3ea538a12f5c9b6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-trunc.ll
Log Message:
-----------
[SLP]Fix PR80027: Fix costs processing for minbitwidth types.
Need to switch the types, the destination is first in getCastInstrCost
function.
Commit: 3477bcf4b94395e2c0ed77a139e54240cfe4f27d
https://github.com/llvm/llvm-project/commit/3477bcf4b94395e2c0ed77a139e54240cfe4f27d
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
A mlir/test/Dialect/NVGPU/canonicalization.mlir
Log Message:
-----------
[mlir][nvgpu] Mark TMA descriptor as MemWriteAt in `tma.async.store` (#79427)
Commit: 201eb2b5775cf193c97c60a5eb790003a1e6bedb
https://github.com/llvm/llvm-project/commit/201eb2b5775cf193c97c60a5eb790003a1e6bedb
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaOverload.cpp
R clang/test/AST/ast-dump-static-operators.cpp
M clang/test/CodeGenCXX/cxx2b-static-call-operator.cpp
M clang/test/CodeGenCXX/cxx2b-static-subscript-operator.cpp
R clang/test/SemaCXX/cxx2b-static-operator.cpp
Log Message:
-----------
Revert "[clang] static operators should evaluate object argument (#68485)"
This reverts commit 30155fc0ef4fbdce2d79434aaae8d58b2fabb20a.
It seems to have broken some tests in clangd:
http://45.33.8.238/linux/129484/step_9.txt
Commit: e1ddc3331210957cec2569cef79021fa69363ab1
https://github.com/llvm/llvm-project/commit/e1ddc3331210957cec2569cef79021fa69363ab1
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M libcxx/include/__thread/support.h
M libcxx/include/__thread/support/c11.h
M libcxx/include/__thread/support/pthread.h
M libcxx/include/__thread/support/windows.h
Log Message:
-----------
[libc++] Move __libcpp_timespec_t into namespace std (#80004)
It was previously defined outside of namespace std for apparently no
good reason.
Commit: 97d72839301e6fd005fb258322b96bd46086daa1
https://github.com/llvm/llvm-project/commit/97d72839301e6fd005fb258322b96bd46086daa1
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/include/llvm/TextAPI/Symbol.h
Log Message:
-----------
[TextAPI] Fix -Wdocumentation error, NFC
Commit: f2a78e68eee53646327f71c475c7f18a28b7f576
https://github.com/llvm/llvm-project/commit/f2a78e68eee53646327f71c475c7f18a28b7f576
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/docs/HIPSupport.rst
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/Preprocessor/predefined-arch-macros.c
Log Message:
-----------
[AMDGPU] Do not emit arch dependent macros with unspecified cpu (#80035)
Summary:
Currently, the AMDGPU toolchain accepts not passing `-mcpu` as a means
to create a sort of "generic" IR. The resulting IR will not contain any
target dependent attributes and can then be inserted into another
program via `-mlink-builtin-bitcode` to inherit its attributes.
However, there are a handful of macros that can leak incorrect
information when compiling for an unspecified architecture. Currently,
things like the wavefront size will default to 64, which is actually
variable. We should not expose these macros unless it is known.
Commit: 5470ea4e36d47ed09595517854f0fa07ca91e16f
https://github.com/llvm/llvm-project/commit/5470ea4e36d47ed09595517854f0fa07ca91e16f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M libc/src/__support/GPU/amdgpu/utils.h
M libc/src/__support/GPU/generic/utils.h
M libc/src/__support/GPU/nvptx/utils.h
M libc/src/__support/RPC/rpc.h
M libc/utils/gpu/server/rpc_server.h
Log Message:
-----------
[libc] Change the starting port index to use the SMID (#79200)
Summary:
The RPC interface uses several ports to provide parallel access. Right
now we begin the search at the beginning, which heavily contests the
early ports. Using the SMID allows us to stagger the starting index
based off of the cluster identifier that is executing the current warp.
Multiple warps can share an SM, but it will guaruntee that the
contention for the low indices is lower.
This also increases the maximum port size to around 4096, this is
because 512 isn't enough to cover the full hardare parallelism needed to
guarantee this doesdn't deadlock.
Commit: 626fe71fa5ed79cbd41b7b29582560d7adb1220e
https://github.com/llvm/llvm-project/commit/626fe71fa5ed79cbd41b7b29582560d7adb1220e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/test/Preprocessor/predefined-arch-macros.c
Log Message:
-----------
[Clang] Fix test failing on systems without ROCm installed
Summary:
Forgot to specify `-nogpulib` which makes this test look for ROCm.
Commit: 85a847fd1d639a0e7d5319b17e994ea157be6046
https://github.com/llvm/llvm-project/commit/85a847fd1d639a0e7d5319b17e994ea157be6046
Author: Konstantin Varlamov <varconsteq at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M libcxx/test/libcxx/atomics/atomics.align/align.pass.cpp
M libcxx/test/libcxx/atomics/atomics.types.generic/atomics.types.float/lockfree.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/assign.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/compare_exchange_strong.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/compare_exchange_weak.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/ctor.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/exchange.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_add.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_sub.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/load.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/lockfree.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/notify_all.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/notify_one.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.float.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.minus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.plus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/store.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/wait.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_compare_exchange_strong.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_compare_exchange_strong_explicit.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_compare_exchange_weak.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_compare_exchange_weak_explicit.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_exchange.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_exchange_explicit.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_init.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_is_lock_free.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_load.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_load_explicit.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_store.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_store_explicit.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_notify_all.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_notify_one.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait.pass.cpp
M libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait_explicit.pass.cpp
M libcxx/test/support/atomic_helpers.h
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libc++] Simplify features for detecting atomics' support. (#75553)
`non-lockfree-atomics` is very similar to `has-64-bit-atomics`; to
simplify, we can have uniform features for atomic types of
increasing sizes (`has-128-bit-atomics`, `has-256-bit-atomics`, etc.).
`is-lockfree-runtime-function` feature was a workaround for the partial
support for large atomic types on older versions of macOS (see
https://reviews.llvm.org/D91911). While we still support macOS 10.14,
conceptually it's simpler to check for support for all the atomic
functionality inside the `has-*-atomics` features, and the workaround is
no longer worth the maintenance cost.
Commit: 6fecfbc7b62f54bd633e83c22630d7c2a3e5741e
https://github.com/llvm/llvm-project/commit/6fecfbc7b62f54bd633e83c22630d7c2a3e5741e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
Log Message:
-----------
[AMDGPU] Correctly exclude the HIP host from arch macros
Summary:
This logic was wrong and accidentally appling to OpenCL.
Commit: 733b86d3ff8087f1e267c23eb315bb16e3c6c953
https://github.com/llvm/llvm-project/commit/733b86d3ff8087f1e267c23eb315bb16e3c6c953
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M lldb/include/lldb/Core/DebuggerEvents.h
M lldb/include/lldb/Core/Progress.h
M lldb/source/Core/DebuggerEvents.cpp
M lldb/source/Core/Progress.cpp
Log Message:
-----------
[lldb][progress] Correctly check total for deterministic progress (#79912)
The `total` parameter for the constructor for Progress was changed to a
std::optional in https://github.com/llvm/llvm-project/pull/77547. It was originally set to 1 to indicate non-determinisitic progress, but this commit changes this. First, `UINT64_MAX` will again be used for non-deterministic progress, and `Progress` now has a static variable set to this value so that we can use this instead of a magic number.
The member variable `m_total` could be changed to a std::optional as
well, but this means that the `ProgressEventData::GetTotal()` (which is
used for the public API) would
either need to return a std::optional value or it would return some
specific integer to represent non-deterministic progress if `m_total` is
std::nullopt.
Commit: 1d3300d5027c95c84b335f6adfca7e49cae45bb2
https://github.com/llvm/llvm-project/commit/1d3300d5027c95c84b335f6adfca7e49cae45bb2
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.h
Log Message:
-----------
[mlir][sparse] use shared value storage between wrapped iterator and the wrapper. (#80046)
Commit: 235f1e74fe240e414718c64d05bafc01d34c32cb
https://github.com/llvm/llvm-project/commit/235f1e74fe240e414718c64d05bafc01d34c32cb
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
Log Message:
-----------
[Clang] Fix typo in __fprintf_chk Prototype (#80012)
An extra int was copied.
Commit: 30b9140c148923e31a6dbcb2202ef3908481bb29
https://github.com/llvm/llvm-project/commit/30b9140c148923e31a6dbcb2202ef3908481bb29
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/test/MC/RISCV/rv32zbb-only-valid.s
M llvm/test/MC/RISCV/rv32zbb-valid.s
M llvm/test/MC/RISCV/rv64zbb-valid.s
M llvm/test/MC/RISCV/rv64zbkb-valid.s
Log Message:
-----------
[RISCV] Minor cleanup to rori MC layer testing. NFC
rv32zbb-valid.s tests rv64 and rv32. rv32zbb-only-valid.s only tests rv32.
The rori tests in rv32zbb-only-valid.s produce the same result for rv32 and
rv64 so its better to test them in rv32zbb-valid.s.
Remove a now redundant test case from rv64zbb-valid.s.
Add a missing rori test with imm >= 32 to rv64zbkb-valid.s.
Commit: 6a21e00e397648141ed36aae4bd958efa09908f3
https://github.com/llvm/llvm-project/commit/6a21e00e397648141ed36aae4bd958efa09908f3
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/writelane_m0.s
A llvm/test/MachineVerifier/writelane_m0.mir
Log Message:
-----------
[AMDGPU][AsmParser] Allow `v_writelane_b32` to use SGPR and M0 as source operands at the same time (#78827)
Currently the asm parser takes `v_writelane_b32 v1, s13, m0` as illegal
instruction for pre-gfx11 because it uses two constant buses while the
hardware
can only allow one. However, based on the comment of
`AMDGPUInstructionSelector::selectWritelane`,
it is allowed to have M0 as lane selector and a SGPR used as SRC0
because the
lane selector doesn't count as a use of constant bus. In fact, codegen
can already
generate this form, but this inconsistency is not exposed because the
validation
of constant bus limitation only happens when paring an assembly but we
don't have
a test case when both SGPR and M0 used as source operands for the
instruction.
Commit: d8b61d716899736c7f0444d1b18b8e1a536c3472
https://github.com/llvm/llvm-project/commit/d8b61d716899736c7f0444d1b18b8e1a536c3472
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-exegesis.rst
A llvm/test/tools/llvm-exegesis/X86/latency/middle-half.s
M llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
M llvm/tools/llvm-exegesis/lib/CMakeLists.txt
A llvm/tools/llvm-exegesis/lib/ResultAggregator.cpp
A llvm/tools/llvm-exegesis/lib/ResultAggregator.h
M llvm/tools/llvm-exegesis/lib/SnippetRepetitor.cpp
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/unittests/tools/llvm-exegesis/CMakeLists.txt
A llvm/unittests/tools/llvm-exegesis/ResultAggregatorTest.cpp
Log Message:
-----------
[llvm-exegesis] Add middle half repetition mode (#77020)
This patch adds two new repetition modes to llvm-exegesis, particularly
loop and duplicate repetition modes of what I am terming the middle half
repetition mode. The middle half repetition mode essentially runs each
measurement twice, one with twice the number of iterations of the other.
These two measurements are then agregated by taking their difference.
This subtracts away any setup/overhead that is unrelated to the code in
the snippet, providing more accurate results.
Using this mode on a couple toy examples, I am able to get exact
(integer) throughput values on all of them in contrast to the default
duplicate/loop repetition modes which show a little bit of noise on the
snippet value.
Commit: 58e8c072aa4ebb11dfab13ed00fa8d61e408516c
https://github.com/llvm/llvm-project/commit/58e8c072aa4ebb11dfab13ed00fa8d61e408516c
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/test/MachineVerifier/writelane_m0.mir
Log Message:
-----------
[FIX] Require AMDGPU target in test case `llvm/test/MachineVerifier/writelane_m0.mir`
Commit: 0dd0cbd324ad13dd7b91edf69a2ca66a6a208c80
https://github.com/llvm/llvm-project/commit/0dd0cbd324ad13dd7b91edf69a2ca66a6a208c80
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
A clang/test/ParserOpenACC/parse-wait-clause.c
Log Message:
-----------
[OpenACC] Implement 'wait' clause parsing.
The 'wait' clause is parsed the same way as the 'wait' construct, so
this jsut differs to that function.
Commit: 66ef6900f9f3aa4fab9f6e36af04f775948cdf9d
https://github.com/llvm/llvm-project/commit/66ef6900f9f3aa4fab9f6e36af04f775948cdf9d
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Better recover during clause parsing
Previously we gave up immediately and just escaped. Instead, skip to
the next close paren and see if we can continue parsing the next clause
instead.
Commit: aa88a09fbc6428fa3c74e2027b0f329d89c332bd
https://github.com/llvm/llvm-project/commit/aa88a09fbc6428fa3c74e2027b0f329d89c332bd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/llvm-exegesis/lib/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/tools/llvm-exegesis/BUILD.gn
Log Message:
-----------
[gn build] Port d8b61d716899
Commit: a385c379f8694f42d1efb88bb8c5a53fccb6a664
https://github.com/llvm/llvm-project/commit/a385c379f8694f42d1efb88bb8c5a53fccb6a664
Author: Yitzhak Mandelbaum <ymand at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
Log Message:
-----------
[clang][dataflow] Drop block-relative cap on worklist iterations. (#80033)
As per the FIXME, this cap never really served its purpose. This patch
simplifies to a single, caller-specified, absolute cap.
Commit: 576c4dfa067fa767818a0d80c7072a64c221384e
https://github.com/llvm/llvm-project/commit/576c4dfa067fa767818a0d80c7072a64c221384e
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
Log Message:
-----------
[libc] disable epoll_pwait2 due to breakage (#80051)
It appears that sys_epoll_pwait2 isn't always available, so we need to
add some sort of condition to enable it. This patch disables it until
that happens.
Commit: 2c5a0d392592982bb9c73cbc10c64390b9045873
https://github.com/llvm/llvm-project/commit/2c5a0d392592982bb9c73cbc10c64390b9045873
Author: Yitzhak Mandelbaum <ymand at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/Analyses/PostOrderCFGView.h
M clang/unittests/Analysis/CFGTest.cpp
M clang/unittests/Analysis/FlowSensitive/LoggerTest.cpp
Log Message:
-----------
[clang][CFG] Change child order in Reverse Post Order (RPO) iteration. (#80030)
The CFG orders the blocks of loop bodies before those of loop successors
(both numerically, and in the successor order of the loop condition
block). So, RPO necessarily reverses that order, placing the loop
successor *before* the loop body. For many analyses, particularly those
that converge to a fixpoint, this results in potentially significant
extra work, because loop successors will necessarily need to be
reconsidered once the algorithm has reached a fixpoint on the loop body.
This definition of CFG graph traits reverses the order of children, so
that loop bodies will come first in an RPO. Then, the algorithm can
fully evaluate the loop and only then consider successor blocks.
Commit: 0fa4463e93dca275ee80fd85120e33ccc9f22c5e
https://github.com/llvm/llvm-project/commit/0fa4463e93dca275ee80fd85120e33ccc9f22c5e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenACC/acc-loop.f90
Log Message:
-----------
[flang][openacc] Check trip count invariance with other IVs (#79906)
2.9.1 The trip count for all loops associated with the collapse clause
must be computable and invariant in all the loops.
This patch checks that iteration range of loops part of a collapse nest
does not depend on outer loops induction variables.
The check is also applied to combined construct with a loop.
Commit: d9423398ea129e229b20ba42dfe4326e620129b5
https://github.com/llvm/llvm-project/commit/d9423398ea129e229b20ba42dfe4326e620129b5
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenACC/acc-loop.f90
Log Message:
-----------
Revert "[flang][openacc] Check trip count invariance with other IVs (#79906)"
This reverts commit 0fa4463e93dca275ee80fd85120e33ccc9f22c5e.
Breaks buildbot https://lab.llvm.org/buildbot/#/builders/268/builds/7155
Commit: 9b91c54d9bd3227a49e146c055fb0165567f7f8d
https://github.com/llvm/llvm-project/commit/9b91c54d9bd3227a49e146c055fb0165567f7f8d
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/msan_asm_conservative.ll
Log Message:
-----------
[msan] Unpoison indirect outputs for userspace using memset for large operands (#79924)
Modify #77393 to clear shadow memory using `llvm.memset.*` when the size
is large, similar to `shouldUseBZeroPlusStoresToInitialize` in clang for
`-ftrivial-auto-var-init=`. The intrinsic, if lowered to libcall, will
use the msan interceptor.
The instruction selector lowers a `StoreInst` to multiple stores, not
utilizing `memset`. When the size is large (e.g.
`store { [100 x i32] } zeroinitializer, ptr %12, align 1`), the
generated code will be long (and `CodeGenPrepare::optimizeInst` will
even crash for a huge size).
```
// Test stack size
template <class T>
void DoNotOptimize(const T& var) { // deprecated by https://github.com/google/benchmark/pull/1493
asm volatile("" : "+m"(const_cast<T&>(var)));
}
int main() {
using LargeArray = std::array<int, 1000000>;
auto large_stack = []() { DoNotOptimize(LargeArray()); };
/////// CodeGenPrepare::optimizeInst triggers an assertion failure when creating an integer type with a bit width>2**23
large_stack();
}
```
Commit: 648560062af8deb4e6478130deb1dd8fa62929a8
https://github.com/llvm/llvm-project/commit/648560062af8deb4e6478130deb1dd8fa62929a8
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M compiler-rt/lib/dfsan/dfsan_custom.cpp
M compiler-rt/lib/dfsan/done_abilist.txt
M compiler-rt/lib/dfsan/libc_ubuntu1404_abilist.txt
Log Message:
-----------
[dfsan] Wrap glibc 2.38 __isoc23_* functions (#79958)
Fix #79283: `test/dfsan/custom.cpp` has undefined symbol linker errors
on glibc 2.38 due to lack of wrappers for `__isoc23_strtol` and
`__isoc23_scanf` family functions.
Implement these wrappers as aliases to existing wrappers, similar to
https://reviews.llvm.org/D158943 for other sanitizers.
`strtol` in a user program, whether or not `_ISOC2X_SOURCE` is defined,
uses the C23 semantics (`strtol("0b1", 0, 0)` => 1), when
`libclang_rt.dfsan.a` is built on glibc 2.38+.
Commit: a356e6ccada87d6bfc4513fba4b1a682305e094a
https://github.com/llvm/llvm-project/commit/a356e6ccada87d6bfc4513fba4b1a682305e094a
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
A llvm/test/CodeGen/Thumb/smul_fix.ll
A llvm/test/CodeGen/Thumb/smul_fix_sat.ll
A llvm/test/CodeGen/Thumb/umul_fix.ll
A llvm/test/CodeGen/Thumb/umul_fix_sat.ll
Log Message:
-----------
[SelectionDAG] Expand fixed point multiplication into libcall (#79352)
32-bit ARMv6 with thumb doesn't support MULHS/MUL_LOHI as legal/custom
nodes during expansion which will cause fixed point multiplication of
_Accum types to fail with fixed point arithmetic. Prior to this, we just
happen to use fixed point multiplication on platforms that happen to
support these MULHS/MUL_LOHI.
This patch attempts to check if the multiplication can be done via
libcalls, which are provided by the arm runtime. These libcall attempts
are made elsewhere, so this patch refactors that libcall logic into its
own functions and the fixed point expansion calls and reuses that logic.
Commit: 404af14f92b8b7318ab3d34bd65d800c0bde1e10
https://github.com/llvm/llvm-project/commit/404af14f92b8b7318ab3d34bd65d800c0bde1e10
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M mlir/include/mlir-c/BuiltinTypes.h
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/python/mlir/dialects/_ods_common.py
M mlir/python/mlir/dialects/memref.py
M mlir/python/mlir/dialects/transform/structured.py
M mlir/test/python/dialects/memref.py
Log Message:
-----------
[mlir][python] enable memref.subview (#79393)
Commit: 24923214e7845acc0e2f56f13e08ee519eba8303
https://github.com/llvm/llvm-project/commit/24923214e7845acc0e2f56f13e08ee519eba8303
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/spec/linux.td
M libc/spec/posix.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/mlock.cpp
A libc/src/sys/mman/linux/mlock2.cpp
A libc/src/sys/mman/linux/mlockall.cpp
A libc/src/sys/mman/linux/munlock.cpp
A libc/src/sys/mman/linux/munlockall.cpp
A libc/src/sys/mman/mlock.h
A libc/src/sys/mman/mlock2.h
A libc/src/sys/mman/mlockall.h
A libc/src/sys/mman/munlock.h
A libc/src/sys/mman/munlockall.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/mincore_test.cpp
A libc/test/src/sys/mman/linux/mlock_test.cpp
Log Message:
-----------
[libc] implement mlock/mlock2/munlock/mlockall/munlockall (#79645)
fixes #79336
Co-authored-by: Sirui Mu <msrlancern at gmail.com>
Commit: 75ea78ab677f8357aa14fd4c0aff5d551a4ff8aa
https://github.com/llvm/llvm-project/commit/75ea78ab677f8357aa14fd4c0aff5d551a4ff8aa
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
Log Message:
-----------
[DebugNames] Compare TableEntry names more efficiently (#79759)
TableEntry names are pointers into the string table section, and
accessing their
length requires a search for `\0`. However, 99% of the time we only need
to
compare the name against some other other, and such a comparison will
fail as
early as the first character.
This commit adds a method to the interface of TableEntry so that such a
comparison can be done without extracting the full name. It saves 10% in
the
time (1250ms -> 1100 ms) to evaluate the following expression.
```
lldb \
--batch \
-o "b CodeGenFunction::GenerateCode" \
-o run \
-o "expr Fn" \
-- \
clang++ -c -g test.cpp -o /dev/null &> output
```
Commit: e5cebec521a7cf86ff21dedb8a2c96b3f8331c9d
https://github.com/llvm/llvm-project/commit/e5cebec521a7cf86ff21dedb8a2c96b3f8331c9d
Author: jkorous-apple <32549412+jkorous-apple at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix AST matcher of UUCAddAssignGadget (#79392)
We are not interested in nonpointers being added to.
Commit: bb770f0df53eee91a803b2829808d82279f7b577
https://github.com/llvm/llvm-project/commit/bb770f0df53eee91a803b2829808d82279f7b577
Author: yronglin <yronglin777 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/include/clang/AST/TextNodeDumper.h
M clang/lib/AST/TextNodeDumper.cpp
M clang/test/AST/ast-dump-for-range-lifetime.cpp
M clang/test/Import/cxx-default-init-expr/test.cpp
Log Message:
-----------
[Clang] Dump the rewritten sub-expressions in CXXDefaultArgExpr/CXXDefaultInitExpr (#80001)
This patch dump the rewritten sub-expressions in `CXXDefaultArgExpr` and
`CXXDefaultInitExpr`.
This machinery is useful for checking whether the materialized
temporaries is lifetime-extended in the sub-AST of `CXXDefaultArgExpr`
(`CXXDefaultInitExpr` has not been lifetime extendend now).
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: 2f490f924647aa0724bab49cb390d4423fc9fc03
https://github.com/llvm/llvm-project/commit/2f490f924647aa0724bab49cb390d4423fc9fc03
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenACC/acc-loop.f90
Log Message:
-----------
[flang][openacc] Check trip count invariance with other IVs (#79906)
2.9.1 The trip count for all loops associated with the collapse clause must be
computable and invariant in all the loops.
This patch checks that loops part of a collapse nest does not depends on outer
loops induction variables.
The check is also applied to combined construct with a loop.
Commit: 16c15b5f84836d81084e9987701ca011da5a864f
https://github.com/llvm/llvm-project/commit/16c15b5f84836d81084e9987701ca011da5a864f
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M libc/test/src/sys/mman/linux/mlock_test.cpp
Log Message:
-----------
[libc] disable mlockall w/ MCL_ONFAULT (#80075)
I suspect this is a bug in linux 4.19, as the test passes as written on
my
linux 6.5 machine.
Let's revisit this after the build bots are upgraded.
Link: #80073
Commit: 7847e44594aa932c0a5f5d2cd15940d2a815c059
https://github.com/llvm/llvm-project/commit/7847e44594aa932c0a5f5d2cd15940d2a815c059
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Lex/HeaderSearchOptions.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/lib/Basic/FileManager.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
A clang/test/ClangScanDeps/optimize-vfs-edgecases.m
A clang/test/ClangScanDeps/optimize-vfs-leak.m
A clang/test/ClangScanDeps/optimize-vfs-pch.m
A clang/test/ClangScanDeps/optimize-vfs.m
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
Log Message:
-----------
[clang][DependencyScanner] Remove unused -ivfsoverlay files (#73734)
`-ivfsoverlay` files are unused when building most modules. Enable
removing them by,
* adding a way to visit the filesystem tree with extensible RTTI to
access each `RedirectingFileSystem`.
* Adding tracking to `RedirectingFileSystem` to record when it
actually redirects a file access.
* Storing this information in each PCM.
Usage tracking is only enabled when iterating over the source manager
and affecting modulemaps. Here each path is stated to cause an access.
During scanning these stats all hit the cache.
Commit: 86cd2fbdfe67d70a7fe061ed5d3a644f50f070f5
https://github.com/llvm/llvm-project/commit/86cd2fbdfe67d70a7fe061ed5d3a644f50f070f5
Author: jkorous-apple <32549412+jkorous-apple at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-pointer-access.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage][NFC] Add testcase for non-unsafe pointer (#80076)
This adds a missing CHECK-NOT directive for an existing test case.
Commit: c8c3fe70ae09a48408ee15a256e52a4624e0291c
https://github.com/llvm/llvm-project/commit/c8c3fe70ae09a48408ee15a256e52a4624e0291c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lld/COFF/DLL.cpp
M lld/test/COFF/imports.test
M lld/test/COFF/pdb-publics-import.test
Log Message:
-----------
[LLD][COFF] Align import directory chunk. (#80014)
The loader can usually handle an unaligned import dir chunk, but It's not
optimal and it's not what MSVC link.exe does.
Windows refuses to load ARM64X binaries with unaligned import directory.
aarch64 and arm64ec imports are shared in such binaries as much as
possible. As long as they use the same set of functions from given import
directory, both the directory and import addresses chunk are just shared.
When used set of functions differs, ARM64X dynamic relocations are used
to modify import dir to point to different names and import addresses for
its EC view. I suspect that the loader expects some alignment on ARM64X
dynamic relocation offset and may not be the case when relocated import
dir is not aligned.
Commit: 8b38970811086b09752a5909d0c17de4d0cd04c3
https://github.com/llvm/llvm-project/commit/8b38970811086b09752a5909d0c17de4d0cd04c3
Author: Katherine Rasmussen <krasmussen at lbl.gov>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/image_index01.f90
A flang/test/Semantics/image_index02.f90
Log Message:
-----------
[flang] Add image_index to list of intrinsics and add tests (#79519)
Add image_index to the list of intrinsic functions and add additional
check on its args in check-call.cpp. Add two semantics tests for
image_index.
Commit: 4effff21fb2f3462e06fcbd7812562f4771b0487
https://github.com/llvm/llvm-project/commit/4effff21fb2f3462e06fcbd7812562f4771b0487
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
M mlir/test/Conversion/ComplexToStandard/full-conversion.mlir
M mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir
Log Message:
-----------
[mlir][complex] Prevent underflow in complex.abs (#79786)
The previous PR was not correct on the way to handle the negative value.
It is necessary to take the absolute value of the given real (or
imaginary) part to be multiplied with the sqrt part.
See: https://github.com/llvm/llvm-project/pull/76316
Commit: b21a2f9365b6c5fd464a97be5dfe7085742870ef
https://github.com/llvm/llvm-project/commit/b21a2f9365b6c5fd464a97be5dfe7085742870ef
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
A clang/test/ClangScanDeps/missing-vfs.m
Log Message:
-----------
[clang][scan-deps] Stop scanning if any scanning setup emits an error.
Without this scanning will continue and later hit an assert that the
number of `RedirectingFileSystem`s matches the number of -ivfsoverlay
arguments.
Commit: c806d8c7e948f01405be4ea344d883f066f8ae59
https://github.com/llvm/llvm-project/commit/c806d8c7e948f01405be4ea344d883f066f8ae59
Author: rmarker <37921131+rmarker at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/docs/tools/dump_format_style.py
Log Message:
-----------
[clang-format] Explicitly open DOC_FILE with utf-8 in dump_format_style.py (#79805)
The dump_format_style.py script generates the clang-format style options
documentation.
There was an issue where the script could include spurious characters in
the output when run in windows. It appears that it wasn't defaulting to
the correct encoding when reading the input.
This has been addressed by explicitly setting the encoding when opening
the file.
Commit: b91bba89edfb25d011e1f2366cda5dec605c87f6
https://github.com/llvm/llvm-project/commit/b91bba89edfb25d011e1f2366cda5dec605c87f6
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/MemRefToSPIRV/MemRefToSPIRV.h
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRVPass.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MapMemRefStorageClassPass.cpp
Log Message:
-----------
[mlir][spirv] Use `AttrTypeReplacer` in map-memref-storage-class. NFC. (#80055)
Keep the conversion target to allow for checking if the op is legal.
Commit: d783933bc910ac005e18928d22b6c10c4fe8d6f6
https://github.com/llvm/llvm-project/commit/d783933bc910ac005e18928d22b6c10c4fe8d6f6
Author: Yaraslau <yaraslau.tamashevich at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
A clang/test/ClangScanDeps/empty.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[clang-scan-deps] Fix check for empty `Compilation` (#75545)
Closes https://github.com/llvm/llvm-project/issues/64144
Instead of checking for `nullptr` we need to ensure that `JobList` is
not empty to proceed
Commit: 2abcbbd96ad731b05fae970a0abb23cda784dddd
https://github.com/llvm/llvm-project/commit/2abcbbd96ad731b05fae970a0abb23cda784dddd
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/LinuxKernelRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
M bolt/test/X86/linux-orc.s
Log Message:
-----------
[BOLT] Detect Linux kernel based on ELF program headers (#80086)
Check if program header addresses fall into the kernel space to detect a
Linux kernel binary on x86-64.
Delete opts::LinuxKernelMode and use BinaryContext::IsLinuxKernel
instead.
Commit: b4d832c77dcba4136132559a5183883cf064389d
https://github.com/llvm/llvm-project/commit/b4d832c77dcba4136132559a5183883cf064389d
Author: Carl Peto <carl.peto at me.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Sema/SemaDecl.cpp
Log Message:
-----------
[clang] Improved isSimpleTypeSpecifier (#79037)
- Sema::isSimpleTypeSpecifier return true for _Bool in c99 (currently
returns false for _Bool, regardless of C dialect). (Fixes #72203)
- replace the logic with a check for simple types and a proper check for
a valid keyword in the appropriate dialect
Co-authored-by: Carl Peto <CPeto at becrypt.com>
Commit: c761b4a5e4cc003a2c850898e1dc67d2637cfb0c
https://github.com/llvm/llvm-project/commit/c761b4a5e4cc003a2c850898e1dc67d2637cfb0c
Author: Billy Laws <blaws05 at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
M llvm/test/CodeGen/AArch64/vararg-tallcall.ll
Log Message:
-----------
[AArch64] Fix variadic tail-calls on ARM64EC (#79774)
ARM64EC varargs calls expect that x4 = sp at entry, special handling is
needed to ensure this with tail calls since they occur after the
epilogue and the x4 write happens before.
I tried going through AArch64MachineFrameLowering for this, hoping to
avoid creating the dummy object but this was the best I could do since
the stack info that uses isn't populated at this stage,
CreateFixedObject also explicitly forbids 0 sized objects.
Commit: 1a17f2beb9cd1f5bbaa64502ab5c02ff74c199a4
https://github.com/llvm/llvm-project/commit/1a17f2beb9cd1f5bbaa64502ab5c02ff74c199a4
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
A llvm/test/CodeGen/WebAssembly/disable-feature.ll
Log Message:
-----------
[WebAssembly] avoid to use explicit disabled feature
In `CoalesceFeaturesAndStripAtomics`, feature string is converted to FeatureBitset and back to feature string. It will lose information about explicit diasbled features.
Commit: c43fda3efcbf5b16e611473cf03c88381237f50f
https://github.com/llvm/llvm-project/commit/c43fda3efcbf5b16e611473cf03c88381237f50f
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
R llvm/test/CodeGen/WebAssembly/disable-feature.ll
Log Message:
-----------
Revert "[WebAssembly] avoid to use explicit disabled feature"
This reverts commit 1a17f2beb9cd1f5bbaa64502ab5c02ff74c199a4.
Commit: ff4636a4ab00b633c15eb3942c26126ceb2662e6
https://github.com/llvm/llvm-project/commit/ff4636a4ab00b633c15eb3942c26126ceb2662e6
Author: Oskar Wirga <10386631+oskarwirga at users.noreply.github.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/LivePhysRegs.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/SystemZ/branch-folder-hoist-livein.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/spillingmove.mir
Log Message:
-----------
Refactor recomputeLiveIns to converge on added MachineBasicBlocks (#79940)
This is a fix for the regression seen in
https://github.com/llvm/llvm-project/pull/79498
> Currently, the way that recomputeLiveIns works is that it will
recompute the livein registers for that MachineBasicBlock but it matters
what order you call recomputeLiveIn which can result in incorrect
register allocations down the line.
Now we do not recompute the entire CFG but we do ensure that the newly
added MBB do reach convergence.
Commit: c19436eec1c236cbe622c04e33f35f1f9478fa15
https://github.com/llvm/llvm-project/commit/c19436eec1c236cbe622c04e33f35f1f9478fa15
Author: Kohei Yamaguchi <fix7211 at gmail.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
Log Message:
-----------
[mlir][spirv] Fix a crash of typeConverter with non supported type (#79955)
Fixes a crash in the `convert-to-spirv-llvm` pass caused by unsupported
types (e.g. `spirv.matrix` ). This PR fixes it by checking the converted type.
Fixes #60017
Commit: 7155c1ef658b66132f15bf1406e84e68eed3358f
https://github.com/llvm/llvm-project/commit/7155c1ef658b66132f15bf1406e84e68eed3358f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/cuda-cross-compiling.c
M clang/test/Preprocessor/predefined-arch-macros.c
Log Message:
-----------
[NVPTX] Allow compiling LLVM-IR without `-march` set (#79873)
Summary:
The NVPTX tools require an architecture to be used, however if we are
creating generic LLVM-IR we should be able to leave it unspecified. This
will result in the `target-cpu` attributes not being set on the
functions so it can be changed when linked into code. This allows the
standalone `--target=nvptx64-nvidia-cuda` toolchain to create LLVM-IR
simmilar to how CUDA's deviceRTL looks from C/C++
Commit: ab70ac605e784c630122b27c5971fde68e80bd1b
https://github.com/llvm/llvm-project/commit/ab70ac605e784c630122b27c5971fde68e80bd1b
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
Log Message:
-----------
[concepts] Push a CurContext before substituting into out-of-line constraints for comparison (#79985)
Commit: fa3307eb3f47b0bd574fc754934f98c0f27e4e36
https://github.com/llvm/llvm-project/commit/fa3307eb3f47b0bd574fc754934f98c0f27e4e36
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M polly/lib/Analysis/ScopBuilder.cpp
A polly/test/ScopInfo/reduction_different_index.ll
A polly/test/ScopInfo/reduction_different_index1.ll
Log Message:
-----------
[polly] Make reduction detection checks more robust - part 1 (#75297)
Existing reduction detection algorithm does two types of memory checks
before marking a load store pair as reduction.
First is to check if load and store are pointing to the same memory. This
check right now detects the following case as reduction. sum[0] = sum[1]
+ A[i]
This is because the check compares only base of the memory addresses
involved and not their indices. This patch addresses this issue and
introduces some debug prints. Added couple of test cases to verify the
functionality of patch as well.
Commit: 9179d87abce8e92c0bf30bc1ee1c17e17e362bc0
https://github.com/llvm/llvm-project/commit/9179d87abce8e92c0bf30bc1ee1c17e17e362bc0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV] Remove unused RISCVISD opcodes. NFC
These were left behind after fb94c6491a114ebd5815b1d42665a8f6bcd9d639
Commit: 150ab99583e252a809b94f89da2576a1fc808297
https://github.com/llvm/llvm-project/commit/150ab99583e252a809b94f89da2576a1fc808297
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
[X86][NFC] Add documentation for methods in X86InstrInfo.h
Address RKSimon's comment in 2960656eb909b5361ce2c3f641ee341769076ab7
Commit: c12f30c7ffedb2338d64d8f98a76ae56c497cfbb
https://github.com/llvm/llvm-project/commit/c12f30c7ffedb2338d64d8f98a76ae56c497cfbb
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/Analysis/errno-stdlibraryfunctions.c
Log Message:
-----------
[clang][analyzer] Improve modeling of 'realpath' in StdLibraryFunctionsChecker (#79939)
Commit: 8e77390c065fafeca220937e28f7d2ecc1a9ef15
https://github.com/llvm/llvm-project/commit/8e77390c065fafeca220937e28f7d2ecc1a9ef15
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFoldTables.cpp
M llvm/lib/Target/X86/X86InstrFoldTables.h
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
Log Message:
-----------
[X86][CodeGen] Support folding memory broadcast in X86InstrInfo::foldMemoryOperandImpl (#79761)
Commit: a034e65e972175a2465deacb8c78bc7efc99bd23
https://github.com/llvm/llvm-project/commit/a034e65e972175a2465deacb8c78bc7efc99bd23
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
A llvm/test/Transforms/CorrelatedValuePropagation/switch.ll
Log Message:
-----------
[CVP] Check whether the default case is reachable (#79993)
This patch eliminates unreachable default cases using context-sensitive
range information.
Commit: 5d7a0a734a0073ed2237606558d7616923ff50c2
https://github.com/llvm/llvm-project/commit/5d7a0a734a0073ed2237606558d7616923ff50c2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
Log Message:
-----------
[X86] Use a range-based for loop (NFC)
Commit: eef6485ac1bffb6adf0b25ff4a117aa1590e70d0
https://github.com/llvm/llvm-project/commit/eef6485ac1bffb6adf0b25ff4a117aa1590e70d0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
Log Message:
-----------
[AMDGPU] Use llvm::all_of (NFC)
Commit: 2699c1d7007ea8001bfaae50de01ff33791ce958
https://github.com/llvm/llvm-project/commit/2699c1d7007ea8001bfaae50de01ff33791ce958
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
Log Message:
-----------
[clang-tidy] Use StringRef::starts_with (NFC)
Commit: 292b508ebaa653073d9ce12156c93f5a0cf67680
https://github.com/llvm/llvm-project/commit/292b508ebaa653073d9ce12156c93f5a0cf67680
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Log Message:
-----------
[AMDGPU] Use StringRef::consume_front (NFC)
Commit: 8a98091162841fabc3816f3f29380c930ccbcab5
https://github.com/llvm/llvm-project/commit/8a98091162841fabc3816f3f29380c930ccbcab5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zba.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
Log Message:
-----------
[RISCV] Use disjoint flag in or_is_add.
Commit: f2816ff60c7dae0347beba9b11154b33e6311059
https://github.com/llvm/llvm-project/commit/f2816ff60c7dae0347beba9b11154b33e6311059
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/and-or-not.ll
M llvm/test/Transforms/InstCombine/and-xor-or.ll
M llvm/test/Transforms/InstCombine/or-xor.ll
M llvm/test/Transforms/InstCombine/or.ll
Log Message:
-----------
[InstCombine] Simplify and/or by replacing operands with constants (#77231)
This patch tries to simplify `X | Y` by replacing occurrences of `Y` in
`X` with 0. Similarly, it tries to simplify `X & Y` by replacing
occurrences of `Y` in `X` with -1.
Alive2: https://alive2.llvm.org/ce/z/cNjDTR
Note: As the current implementation is too conservative in the one-use
checks, I cannot remove other existing hard-coded simplifications if
they involves more than two instructions (e.g, `A & ~(A ^ B) --> A &
B`).
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=a085402ef54379758e6c996dbaedfcb92ad222b5&to=9d655c6685865ffce0ad336fed81228f3071bd03&stat=instructions%3Au
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|+0.01%|-0.00%|+0.00%|-0.02%|+0.01%|+0.02%|-0.01%|
Fixes #76554.
Commit: 5bb99edcb6726e5dcc20d2236ef51b11c248acb9
https://github.com/llvm/llvm-project/commit/5bb99edcb6726e5dcc20d2236ef51b11c248acb9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Descriptor.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/lib/AST/Interp/Opcodes.td
M clang/lib/AST/Interp/Pointer.cpp
M clang/lib/AST/Interp/Pointer.h
M clang/lib/AST/Interp/Program.cpp
M clang/test/AST/Interp/cxx11.cpp
M clang/test/AST/Interp/cxx17.cpp
M clang/test/AST/Interp/cxx23.cpp
M clang/test/AST/Interp/literals.cpp
M clang/unittests/AST/Interp/Descriptor.cpp
Log Message:
-----------
[clang][Interp] Add inline descriptor to global variables (#72892)
Some time ago, I did a similar patch for local variables.
Initializing global variables can fail as well:
```c++
constexpr int a = 1/0;
static_assert(a == 0);
```
... would succeed in the new interpreter, because we never saved the
fact that `a` has not been successfully initialized.
Commit: 6f35f1d7c137f5733b7035444397bcdace5c9df1
https://github.com/llvm/llvm-project/commit/6f35f1d7c137f5733b7035444397bcdace5c9df1
Author: Piggy <piggynl at outlook.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
[NFC] Update .git-blame-ignore-revs for compiler-rt builtins (#79803)
The three commits from "[RFC] compiler-rt builtins cleanup and
refactoring" rewrote lots of code in compiler-rt builtins.
- 082b89b: [builtins] Reformat builtins with clang-format
- 0ba22f5: [builtins] Use single line C++/C99 comment style
- 84da0e1: [builtins] Use aliases for function redirects
Commit: 95947465024e865a4a671e94902db40d250f0601
https://github.com/llvm/llvm-project/commit/95947465024e865a4a671e94902db40d250f0601
Author: Piggy <piggynl at outlook.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
[NFC] Add compiler-rt:* to .github/new-prs-labeler.yml (#79872)
After this change, all current compiler-rt:* labels on GitHub are
covered.
Commit: c83ec847ac9d06fb4ad85ce3bc50d7a6b122ead2
https://github.com/llvm/llvm-project/commit/c83ec847ac9d06fb4ad85ce3bc50d7a6b122ead2
Author: martinboehme <mboehme at google.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
Log Message:
-----------
[clang][dataflow] Extend debug output for `Environment`. (#79982)
* Print `ReturnLoc`, `ReturnVal`, and `ThisPointeeLoc` if applicable.
* For entries in `LocToVal` that correspond to declarations, print the
names
of the declarations next to them.
I've removed the FIXME because all relevant fields are now being dumped.
I'm
not sure we actually need the capability for the caller to specify which
fields
to dump, so I've simply deleted this part of the comment.
Some examples of the output:
Commit: 3564666fe19217e3d6d3d98dd182553fc8d50e6f
https://github.com/llvm/llvm-project/commit/3564666fe19217e3d6d3d98dd182553fc8d50e6f
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
Log Message:
-----------
[AMDGPU]: Fix type signatures for wmma intrinsics, NFC (#80087)
Make the wmma intrinsic type signatures to be canonical. We need
a type signature as long as the type is not fixed. However, when an
argument's type matches a previous argument's type, we do not need the
signature for this argument.
This patch fixes three general cases:
1. add missing signatures
2. remove signatures for matching arguments
3. reorer the signatures -- return type signature should always appear
first
Commit: ee01a2c3996f9647f3158f5acdb921a6ede94dc1
https://github.com/llvm/llvm-project/commit/ee01a2c3996f9647f3158f5acdb921a6ede94dc1
Author: Tianlan Zhou <bobby825 at 126.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/InlayHints.cpp
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaOverload.cpp
A clang/test/AST/ast-dump-static-operators.cpp
M clang/test/CodeGenCXX/cxx2b-static-call-operator.cpp
M clang/test/CodeGenCXX/cxx2b-static-subscript-operator.cpp
A clang/test/SemaCXX/cxx2b-static-operator.cpp
Log Message:
-----------
[clang] static operators should evaluate object argument (reland) (#80108)
This re-applies 30155fc0 with a fix for clangd.
### Description
clang don't evaluate the object argument of `static operator()` and
`static operator[]` currently, for example:
```cpp
#include <iostream>
struct Foo {
static int operator()(int x, int y) {
std::cout << "Foo::operator()" << std::endl;
return x + y;
}
static int operator[](int x, int y) {
std::cout << "Foo::operator[]" << std::endl;
return x + y;
}
};
Foo getFoo() {
std::cout << "getFoo()" << std::endl;
return {};
}
int main() {
std::cout << getFoo()(1, 2) << std::endl;
std::cout << getFoo()[1, 2] << std::endl;
}
```
`getFoo()` is expected to be called, but clang don't call it currently
(17.0.6). This PR fixes this issue.
Fixes #67976, reland #68485.
### Walkthrough
- **clang/lib/Sema/SemaOverload.cpp**
- **`Sema::CreateOverloadedArraySubscriptExpr` &
`Sema::BuildCallToObjectOfClassType`**
Previously clang generate `CallExpr` for static operators, ignoring the
object argument. In this PR `CXXOperatorCallExpr` is generated for
static operators instead, with the object argument as the first
argument.
- **`TryObjectArgumentInitialization`**
`const` / `volatile` objects are allowed for static methods, so that we
can call static operators on them.
- **clang/lib/CodeGen/CGExpr.cpp**
- **`CodeGenFunction::EmitCall`**
CodeGen changes for `CXXOperatorCallExpr` with static operators: emit
and ignore the object argument first, then emit the operator call.
- **clang/lib/AST/ExprConstant.cpp**
- **`ExprEvaluatorBase::handleCallExpr`**
Evaluation of static operators in constexpr also need some small changes
to work, so that the arguments won't be out of position.
- **clang/lib/Sema/SemaChecking.cpp**
- **`Sema::CheckFunctionCall`**
Code for argument checking also need to be modify, or it will fail the
test `clang/test/SemaCXX/overloaded-operator-decl.cpp`.
- **clang-tools-extra/clangd/InlayHints.cpp**
- **`InlayHintVisitor::VisitCallExpr`**
Now that the `CXXOperatorCallExpr` for static operators also have object
argument, we should also take care of this situation in clangd.
### Tests
- **Added:**
- **clang/test/AST/ast-dump-static-operators.cpp**
Verify the AST generated for static operators.
- **clang/test/SemaCXX/cxx2b-static-operator.cpp**
Static operators should be able to be called on const / volatile
objects.
- **Modified:**
- **clang/test/CodeGenCXX/cxx2b-static-call-operator.cpp**
- **clang/test/CodeGenCXX/cxx2b-static-subscript-operator.cpp**
Matching the new CodeGen.
### Documentation
- **clang/docs/ReleaseNotes.rst**
Update release notes.
---------
Co-authored-by: Shafik Yaghmour <shafik at users.noreply.github.com>
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 82324bc991401aecc4d743d4993b6c68dd60a615
https://github.com/llvm/llvm-project/commit/82324bc991401aecc4d743d4993b6c68dd60a615
Author: martinboehme <mboehme at google.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp
Log Message:
-----------
[clang][dataflow] In the CFG visualization, mark converged blocks. (#79999)
Here's an example of the output:
Commit: b49b3ddd828192f0b3ef43762ab832b085ac95c4
https://github.com/llvm/llvm-project/commit/b49b3ddd828192f0b3ef43762ab832b085ac95c4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-30 (Tue, 30 Jan 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
Log Message:
-----------
[ADT] Use a constexpr version of llvm::bit_ceil (NFC) (#79709)
This patch replaces the template trick with a constexpr function that
is more readable. Once C++20 is available in our code base, we can
remove the constexpr function in favor of std::bit_ceil.
Commit: f292f90bc2ec2c1ec4306027e17877bb4603d8d2
https://github.com/llvm/llvm-project/commit/f292f90bc2ec2c1ec4306027e17877bb4603d8d2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/fabs.ll
Log Message:
-----------
[InstCombine] Fold select with signbit idiom into fabs (#76342)
This patch folds:
```
((bitcast X to int) <s 0 ? -X : X) -> fabs(X)
((bitcast X to int) >s -1 ? X : -X) -> fabs(X)
((bitcast X to int) <s 0 ? X : -X) -> -fabs(X)
((bitcast X to int) >s -1 ? -X : X) -> -fabs(X)
```
Alive2: https://alive2.llvm.org/ce/z/rGepow
Commit: d71831a2172e4cf7c3f3540c472ce2aeb14d4505
https://github.com/llvm/llvm-project/commit/d71831a2172e4cf7c3f3540c472ce2aeb14d4505
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/test/Interpreter/cxx20-modules.cppm
Log Message:
-----------
[NFC] [clang-repl] Fix test failures due to incosistent target settings
See https://github.com/llvm/llvm-project/pull/79261 for details.
It shows that clang-repl uses a different target triple with clang so that it
may be problematic if the calng-repl reads the generated BMI from clang
in a different target triple.
While the underlying issue is not easy to fix, this patch tries to make
this test green to not bother developers.
Commit: dc5dca1d0118a826459026cfe5819f3f83b599ed
https://github.com/llvm/llvm-project/commit/dc5dca1d0118a826459026cfe5819f3f83b599ed
Author: Chia <sun1011jacobi at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
A llvm/test/CodeGen/RISCV/rvv/vwadd-mask-sdnode.ll
Log Message:
-----------
[RISCV][Isel] Remove redundant vmerge for the scalable vwadd(u).wv (#80079)
Similar to #78403, but for scalable `vwadd(u).wv`, given that #76785 is recommited.
### Code
```
define <vscale x 8 x i64> @vwadd_wv_mask_v8i32(<vscale x 8 x i32> %x, <vscale x 8 x i64> %y) {
%mask = icmp slt <vscale x 8 x i32> %x, shufflevector (<vscale x 8 x i32> insertelement (<vscale x 8 x i32> poison, i32 42, i64 0), <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer)
%a = select <vscale x 8 x i1> %mask, <vscale x 8 x i32> %x, <vscale x 8 x i32> zeroinitializer
%sa = sext <vscale x 8 x i32> %a to <vscale x 8 x i64>
%ret = add <vscale x 8 x i64> %sa, %y
ret <vscale x 8 x i64> %ret
}
```
### Before this patch
[Compiler Explorer](https://godbolt.org/z/xsoa5xPrd)
```
vwadd_wv_mask_v8i32:
li a0, 42
vsetvli a1, zero, e32, m4, ta, ma
vmslt.vx v0, v8, a0
vmv.v.i v12, 0
vmerge.vvm v24, v12, v8, v0
vwadd.wv v8, v16, v24
ret
```
### After this patch
```
vwadd_wv_mask_v8i32:
li a0, 42
vsetvli a1, zero, e32, m4, ta, ma
vmslt.vx v0, v8, a0
vsetvli zero, zero, e32, m4, tu, mu
vwadd.wv v16, v16, v8, v0.t
vmv8r.v v8, v16
ret
```
Commit: db49319264d6d2b6f9f7b345495d543210c2cfe3
https://github.com/llvm/llvm-project/commit/db49319264d6d2b6f9f7b345495d543210c2cfe3
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/GPU/decompose-memrefs.mlir
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_sort_coo.mlir
Log Message:
-----------
[mlir][memref] `memref.subview`: Verify result strides (#79865)
The `memref.subview` verifier currently checks result shape, element
type, memory space and offset of the result type. However, the strides
of the result type are currently not verified. This commit adds
verification of result strides for non-rank reducing ops and fixes
invalid IR in test cases.
Verification of result strides for ops with rank reductions is more
complex (and there could be multiple possible result types). That is
left for a separate commit.
Also refactor the implementation a bit:
* If `computeMemRefRankReductionMask` could not compute the dropped
dimensions, there must be something wrong with the op. Return
`FailureOr` instead of `std::optional`.
* `isRankReducedMemRefType` did much more than just checking whether the
op has rank reductions or not. Inline the implementation into the
verifier and add better comments.
* `produceSubViewErrorMsg` does not have to be templatized.
Commit: f8525030004f907cd108e7c18df255a6d3b23124
https://github.com/llvm/llvm-project/commit/f8525030004f907cd108e7c18df255a6d3b23124
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterClassInfo.cpp
Log Message:
-----------
[CodeGen] Don't include aliases in RegisterClassInfo::IgnoreCSRForAllocOrder (#80015)
Previously we called ignoreCSRForAllocationOrder on every alias of every
CSR which was expensive on targets like AMDGPU which define a very large
number of overlapping register tuples.
On such targets it is simpler and faster to call
ignoreCSRForAllocationOrder once for every physical register.
Differential Revision: https://reviews.llvm.org/D146735
Commit: 96c907dbcebdfbc88f73e097270d171bb83ec3cf
https://github.com/llvm/llvm-project/commit/96c907dbcebdfbc88f73e097270d171bb83ec3cf
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/GPU/decompose-memrefs.mlir
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_sort_coo.mlir
Log Message:
-----------
Revert "[mlir][memref] `memref.subview`: Verify result strides" (#80116)
Reverts llvm/llvm-project#79865
I think there is a bug in the stride computation in
`SubViewOp::inferResultType`. (Was already there before this change.)
Reverting this commit for now and updating the original pull request
with a fix and more test cases.
Commit: 64a849a52e08827e889be22ed3ceafe62cd03793
https://github.com/llvm/llvm-project/commit/64a849a52e08827e889be22ed3ceafe62cd03793
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Disasm.cpp
M clang/lib/AST/Interp/IntegralAP.h
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/test/AST/Interp/intap.cpp
Log Message:
-----------
[clang][Interp] Support arbitrary precision constants (#79747)
Add (de)serialization support for them, like we do for Floating values.
Commit: d439f3640b6261f372c614afced7bac321af2958
https://github.com/llvm/llvm-project/commit/d439f3640b6261f372c614afced7bac321af2958
Author: jinchen62 <49575973+jinchen62 at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/tile-to-forall.mlir
Log Message:
-----------
Add support of param type for transform.structured.tile_using_forall (#72097)
Make transform.structured.tile_using_forall be able to take param type
tile sizes.
Examples:
```
%tile_sizes = transform.param.constant 16 : i64 -> !transform.param<i64>
transform.structured.tile_using_forall %matmul tile_sizes [%tile_sizes : !transform.param<i64>, 32] ( mapping = [#gpu.block<x>, #gpu.block<y>] ) : (!transform.any_op) -> (!transform.any_op, !transform.any_op)
```
```
%c10 = transform.param.constant 10 : i64 -> !transform.any_param
%c20 = transform.param.constant 20 : i64 -> !transform.any_param
%tile_sizes = transform.merge_handles %c10, %c20 : !transform.any_param
transform.structured.tile_using_forall %matmul tile_sizes *(%tile_sizes : !transform.any_param) ( mapping = [#gpu.block<x>, #gpu.block<y>] ) : (!transform.any_op) -> (!transform.any_op, !transform.any_op)
```
Commit: dd736661826e215ac70ff3a4a4ccd75bda0c5ccd
https://github.com/llvm/llvm-project/commit/dd736661826e215ac70ff3a4a4ccd75bda0c5ccd
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
A llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
M llvm/test/CodeGen/AArch64/sme-streaming-body.ll
M llvm/test/CodeGen/AArch64/sme-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-interface.ll
M llvm/test/CodeGen/AArch64/sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll
Log Message:
-----------
[SME] Stop RA from coalescing COPY instructions that transcend beyond smstart/smstop. (#78294)
This patch introduces a 'COALESCER_BARRIER' which is a pseudo node that
expands to
a 'nop', but which stops the register allocator from coalescing a COPY
node when
its use/def crosses a SMSTART or SMSTOP instruction.
For example:
%0:fpr64 = COPY killed $d0
undef %2.dsub:zpr = COPY %0 // <- Do not coalesce this COPY
ADJCALLSTACKDOWN 0, 0
MSRpstatesvcrImm1 1, 0, csr_aarch64_smstartstop, implicit-def dead $d0
$d0 = COPY killed %0
BL @use_f64, csr_aarch64_aapcs
If the COPY would be coalesced, that would lead to:
$d0 = COPY killed %0
being replaced by:
$d0 = COPY killed %2.dsub
which means the whole ZPR reg would be live upto the call, causing the
MSRpstatesvcrImm1 (smstop) to spill/reload the ZPR register:
str q0, [sp] // 16-byte Folded Spill
smstop sm
ldr z0, [sp] // 16-byte Folded Reload
bl use_f64
which would be incorrect for two reasons:
1. The program may load more data than it has allocated.
2. If there are other SVE objects on the stack, the compiler might use
the
'mul vl' addressing modes to access the spill location.
By disabling the coalescing, we get the desired results:
str d0, [sp, #8] // 8-byte Folded Spill
smstop sm
ldr d0, [sp, #8] // 8-byte Folded Reload
bl use_f64
Commit: 89f87c387627150d342722b79c78cea2311cddf7
https://github.com/llvm/llvm-project/commit/89f87c387627150d342722b79c78cea2311cddf7
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVSchedRocket.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/MC/RISCV/rvzabha-invalid.s
A llvm/test/MC/RISCV/rvzabha-valid.s
A llvm/test/MC/RISCV/rvzabha-zacas-valid.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Add MC layer support for the experimental zabha extension (#80005)
This patch implements the zabha (Byte and Halfword Atomic Memory
Operations) v1.0-rc1 extension.
See also https://github.com/riscv/riscv-zabha/blob/v1.0-rc1/zabha.adoc.
Commit: 488f88b844739fb8dac6a05799a1e1ec450c0ad9
https://github.com/llvm/llvm-project/commit/488f88b844739fb8dac6a05799a1e1ec450c0ad9
Author: srcarroll <50210727+srcarroll at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgMatchOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgMatchOps.cpp
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/match-ops-invalid.mlir
Log Message:
-----------
[mlir][transform] Add elementwise criteria to `match.structured.body` (#79626)
As far as I am aware, there is no simple way to match on elementwise
ops. I propose to add an `elementwise` criteria to the
`match.structured.body` op. Although my only hesitation is that
elementwise is not only determined by the body, but also the indexing
maps. So if others find this too awkward, I can implement a separate
match op instead.
Commit: 95ef8e386823717efeb2b7b1d02bfbb28473cccc
https://github.com/llvm/llvm-project/commit/95ef8e386823717efeb2b7b1d02bfbb28473cccc
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.h
M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
M mlir/include/mlir/Dialect/ArmSME/Transforms/Transforms.h
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Dialect/ArmSME/Transforms/CMakeLists.txt
A mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Dialect/ArmSME/invalid.mlir
A mlir/test/Dialect/ArmSME/outer-product-fusion.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f16f16f32.mlir
M mlir/test/Target/LLVMIR/arm-sme.mlir
Log Message:
-----------
[mlir][ArmSME] Support 2-way widening outer products (#78975)
This patch introduces support for 2-way widening outer products. This
enables the fusion of 2 'arm_sme.outerproduct' operations that are
chained via the accumulator into a 2-way widening outer product
operation.
Changes:
- Add 'llvm.aarch64.sme.[us]mop[as].za32' intrinsics for 2-way variants.
These map to instruction variants added in SME2 and use different
intrinsics. Intrinsics are already implemented for widening variants
from SME1.
- Adds the following operations:
- fmopa_2way, fmops_2way
- smopa_2way, smops_2way
- umopa_2way, umops_2way
- Implements conversions for the above ops to intrinsics in
ArmSMEToLLVM.
- Adds a pass 'arm-sme-outer-product-fusion' that fuses
'arm_sme.outerproduct' operations.
For a detailed description of these operations see the
'arm_sme.fmopa_2way' description.
The reason for introducing many operations rather than one is the
signed/unsigned variants can't be distinguished with types (e.g., ui16,
si16) since 'arith.extui' and 'arith.extsi' only support signless
integers. A single operation would require this information and an
attribute (for example) for the sign doesn't feel right if
floating-point types are also supported where this wouldn't apply.
Furthermore, the SME FP8 extensions (FEAT_SME_F8F16, FEAT_SME_F8F32)
introduce FMOPA 2-way (FP8 to FP16) and 4-way (FP8 to FP32) variants but
no subtract variant. Whilst these are not supported in this patch, it
felt simpler to have separate ops for add/subtract given this.
Commit: 88610b79510983d7838e4f97411d5a2ac1f8fee8
https://github.com/llvm/llvm-project/commit/88610b79510983d7838e4f97411d5a2ac1f8fee8
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/test/Dialect/Vector/vector-transpose-lowering.mlir
Log Message:
-----------
[mlir][vector] Disable transpose -> shuffle lowering for scalable vectors (#79979)
vector.shuffle is not supported for scalable vectors (outside of splats)
Commit: ce7cc723b9d51ad9c741bbaeecb5e008b2b81338
https://github.com/llvm/llvm-project/commit/ce7cc723b9d51ad9c741bbaeecb5e008b2b81338
Author: Matthias Springer <springerm at google.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
M mlir/test/Dialect/GPU/decompose-memrefs.mlir
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_rewrite_sort_coo.mlir
Log Message:
-----------
[mlir][memref] `memref.subview`: Verify result strides
The `memref.subview` verifier currently checks result shape, element type, memory space and offset of the result type. However, the strides of the result type are currently not verified. This commit adds verification of result strides for non-rank reducing ops and fixes invalid IR in test cases.
Verification of result strides for ops with rank reductions is more complex (and there could be multiple possible result types). That is left for a separate commit.
Also refactor the implementation a bit:
* If `computeMemRefRankReductionMask` could not compute the dropped dimensions, there must be something wrong with the op. Return `FailureOr` instead of `std::optional`.
* `isRankReducedMemRefType` did much more than just checking whether the op has rank reductions or not. Inline the implementation into the verifier and add better comments.
* `produceSubViewErrorMsg` does not have to be templatized.
* Fix comment and add additional assert to `ExpandStridedMetadata.cpp`, to make sure that the memref.subview verifier is in sync with the memref.subview -> memref.reinterpret_cast lowering.
Note: This change is identical to #79865, but with a fixed comment and an additional assert in `ExpandStridedMetadata.cpp`. (I reverted #79865 in #80116, but the implementation was actually correct, just the comment in `ExpandStridedMetadata.cpp` was confusing.)
Commit: db1fbd65eb5cec0eb8ac0bd0cc38c88dda1babf7
https://github.com/llvm/llvm-project/commit/db1fbd65eb5cec0eb8ac0bd0cc38c88dda1babf7
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/Transforms/BDCE/invalidate-assumptions.ll
Log Message:
-----------
[BDCE] Add tests for #80113 (NFC)
Commit: 44ba4c732b60f4e3ab83703e4c83b35f91c4eb13
https://github.com/llvm/llvm-project/commit/44ba4c732b60f4e3ab83703e4c83b35f91c4eb13
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
A .github/workflows/merged-prs.yml
M llvm/utils/git/github-automation.py
Log Message:
-----------
[GitHub][workflows] Add buildbot information comment to first merged PR from a new contributor (#78292)
This change adds a comment to the first PR from a new contributor that
is merged, which tells them what to expect post merge from the build
bots.
How they will be notified, where to ask questions, that you're more
likely to be reverted than in other projects, etc. The information
overlaps with, and links to
https://llvm.org/docs/MyFirstTypoFix.html#myfirsttypofix-issues-after-landing-your-pr.
So that users who simply read the email are still aware, and know where
to follow up if they do get reports.
To do this, I have added a hidden HTML comment to the new contributor
greeting comment. This workflow will look for that to tell if the author
of the PR was a new contributor at the time they opened the merge. It
has to be done this way because as soon as the PR is merged, they are by
GitHub's definition no longer a new contributor and I suspect that their
author association will be "contributor" instead.
I cannot 100% confirm that without a whole lot of effort and probably
breaking GitHub's terms of service, but it's fairly cheap to work around
anyway. It seems rare / almost impossible to reopen a PR in llvm at
least, but in case it does happen the buildbot info comment has its own
hidden HTML comment. If we find this we will not post another copy of
the same information.
Commit: 24a804101b67676aa9fa7f1097043ddd9e2ac1b6
https://github.com/llvm/llvm-project/commit/24a804101b67676aa9fa7f1097043ddd9e2ac1b6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/include/llvm/Support/raw_ostream.h
M llvm/lib/Support/Process.cpp
M llvm/lib/Support/Unix/Process.inc
M llvm/lib/Support/Windows/Process.inc
Log Message:
-----------
[llvm][Support] Support bright colors in raw_ostream (#80017)
Commit: b210cbbd0eb8ef7cd2735e99570474e6e53ee00b
https://github.com/llvm/llvm-project/commit/b210cbbd0eb8ef7cd2735e99570474e6e53ee00b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/BDCE.cpp
M llvm/test/Transforms/BDCE/invalidate-assumptions.ll
Log Message:
-----------
[BDCE] Fix clearing of poison-generating flags
If the demanded bits of an instruction are full, we don't have to
recurse to its users, but we may still have to clear flags on the
instruction itself.
Fixes https://github.com/llvm/llvm-project/issues/80113.
Commit: da784a25557e29996bd33638d51d569ddf989faf
https://github.com/llvm/llvm-project/commit/da784a25557e29996bd33638d51d569ddf989faf
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/include/mlir/IR/Block.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/lib/IR/Block.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/test/Transforms/test-strict-pattern-driver.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][IR] Add `RewriterBase::moveBlockBefore` and fix bug in `moveOpBefore` (#79579)
This commit adds a new method to the rewriter API: `moveBlockBefore`.
This op is utilized by `inlineRegionBefore` and covered by dialect
conversion test cases.
Also fixes a bug in `moveOpBefore`, where the previous op location was
not passed correctly. Adds a test case to
`test-strict-pattern-driver.mlir`.
Commit: 942cc9a222343d18339d08516166cfe94445fd13
https://github.com/llvm/llvm-project/commit/942cc9a222343d18339d08516166cfe94445fd13
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterClassInfo.cpp
Log Message:
-----------
Revert "[CodeGen] Don't include aliases in RegisterClassInfo::IgnoreCSRForAllocOrder (#80015)"
This reverts commit f8525030004f907cd108e7c18df255a6d3b23124.
It was supposed to speed things up but llvm-compile-time-tracker.com
showed a slight slow down.
Commit: 50e80e06d1d4d1de200a3b349fcdd0dd0d0eb66d
https://github.com/llvm/llvm-project/commit/50e80e06d1d4d1de200a3b349fcdd0dd0d0eb66d
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Analysis/ValueTracking/powi-nneg.ll
M llvm/test/CodeGen/Thumb2/mve-vmaxnma-commute.ll
M llvm/test/Transforms/InstCombine/copysign-fneg-fabs.ll
M llvm/test/Transforms/InstSimplify/floating-point-arithmetic-strictfp.ll
Log Message:
-----------
[ValueTracking] Merge `cannotBeOrderedLessThanZeroImpl` into `computeKnownFPClass` (#76360)
This patch merges the logic of `cannotBeOrderedLessThanZeroImpl` into
`computeKnownFPClass` to improve the signbit inference.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: c2c650f62e15ca2444e1a938fdf869c84535ef16
https://github.com/llvm/llvm-project/commit/c2c650f62e15ca2444e1a938fdf869c84535ef16
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/rel32.ll
Log Message:
-----------
[AMDGPU] Stop combining arbitrary offsets into PAL relocs (#80034)
PAL uses ELF REL (not RELA) relocations which can only store a 32-bit
addend in the instruction, even for reloc types like R_AMDGPU_ABS32_HI
which require the upper 32 bits of a 64-bit address calculation to be
correct. This means that it is not safe to fold an arbitrary offset into
a GlobalAddressSDNode, so stop doing that.
In practice this is mostly a problem for small negative offsets which do
not work as expected because PAL treats the 32-bit addend as unsigned.
Commit: 0217d2e089afba8ca33330713787521ba52a1056
https://github.com/llvm/llvm-project/commit/0217d2e089afba8ca33330713787521ba52a1056
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/docs/HIPSupport.rst
Log Message:
-----------
[clang][AMDGPU] Remove trialing whitespace in doc
Added by f2a78e68eee53646327f71c475c7f18a28b7f576.
Wouldn't normally bother but it's showing up in some CI checks,
just want to reduce the noise.
Commit: 78e0cca135076154abab21eadd146dc1dfd3549f
https://github.com/llvm/llvm-project/commit/78e0cca135076154abab21eadd146dc1dfd3549f
Author: Robert Konicar <robert.konicar at trailofbits.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Rewrite/PatternApplicator.cpp
Log Message:
-----------
[mlir] Fix debug output for passes that modify top-level operation. (#80022)
Make it so that when the top-level (root) operation itself is being
modified, it is also used as the root for debug output in
PatternApplicator.
Fix #80021
Commit: e624648bd903208a92d8edbecbfa92085d1c34dc
https://github.com/llvm/llvm-project/commit/e624648bd903208a92d8edbecbfa92085d1c34dc
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Dialect/EmitC/ops.mlir
A mlir/test/Target/Cpp/verbatim.mlir
Log Message:
-----------
[mlir][EmitC] Add `verbatim` op (#79584)
The `verbatim` operation produces no results and the value is emitted as
is followed by a line break ('\n' character) during translation.
Note: Use with caution. This operation can have arbitrary effects on the
semantics of the emitted code. Use semantically more meaningful
operations whenever possible. Additionally this op is *NOT* intended to
be used to inject large snippets of code.
This operation can be used in situations where a more suitable operation
is not yet implemented in the dialect or where preprocessor directives
interfere with the structure of the code.
Co-authored-by: Marius Brehler <marius.brehler at iml.fraunhofer.de>
Commit: 5a07774fe11b560652b15776ff6477ba17b6cae0
https://github.com/llvm/llvm-project/commit/5a07774fe11b560652b15776ff6477ba17b6cae0
Author: Vyacheslav Levytskyy <89994100+VyacheslavLevytskyy at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
A llvm/test/CodeGen/SPIRV/pointers/custom-kernel-arg-type.ll
Log Message:
-----------
[SPIR-V] Improve how lowering of formal arguments in SPIR-V Backend interprets a value of 'kernel_arg_type' (#78730)
The goal of this PR is to tolerate differences between description of
formal arguments by function metadata (represented by "kernel_arg_type")
and LLVM actual parameter types. A compiler may use "kernel_arg_type" of
function metadata fields to encode detailed type information, whereas
LLVM IR may utilize for an actual parameter a more general type, in
particular, opaque pointer type. This PR proposes to resolve this by a
fallback to LLVM actual parameter types during the lowering of formal
function arguments in cases when the type can't be created by string
content of "kernel_arg_type", i.e., when "kernel_arg_type" contains a
type unknown for the SPIR-V Backend.
An example of the issue manifestation is
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/blob/main/test/transcoding/KernelArgTypeInOpString.ll,
where a compiler generates for the following kernel function detailed
`kernel_arg_type` info in a form of `!{!"image_kernel_data*", !"myInt",
!"struct struct_name*"}`, and in LLVM IR same arguments are referred to
as `@foo(ptr addrspace(1) %in, i32 %out, ptr addrspace(1) %outData)`.
Both definitions are correct, and the resulting LLVM IR is correct, but
lowering stage of SPIR-V Backend fails to generate SPIR-V type.
```
typedef int myInt;
typedef struct {
int width;
int height;
} image_kernel_data;
struct struct_name {
int i;
int y;
};
void kernel foo(__global image_kernel_data* in,
__global struct struct_name *outData,
myInt out) {}
```
```
define spir_kernel void @foo(ptr addrspace(1) %in, i32 %out, ptr addrspace(1) %outData) ... !kernel_arg_type !7 ... {
entry:
ret void
}
...
!7 = !{!"image_kernel_data*", !"myInt", !"struct struct_name*"}
```
The PR changes a contract of `SPIRVType *getArgSPIRVType(...)` in a way
that it may return `nullptr` to signal that the metadata string content
is not recognized, so corresponding comments are added and a couple of
checks for `nullptr` are inserted where appropriate.
Commit: 53b9d479d5a4d31d2b4a57af7640c0747100a59d
https://github.com/llvm/llvm-project/commit/53b9d479d5a4d31d2b4a57af7640c0747100a59d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/i256-add.ll
Log Message:
-----------
[X86] i256-add - replace i386 triple X32 check prefixes with X86 and add gnux32 triple tests
Commit: 8d450b47ba28748edfe975b35ab603bd43688d9b
https://github.com/llvm/llvm-project/commit/8d450b47ba28748edfe975b35ab603bd43688d9b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/mmx-arith.ll
Log Message:
-----------
[X86] mmx-arith.ll - replace X32 check prefixes with X86 + strip cfi noise
We try to only use X32 for gnux32 triple tests.
Commit: 00a68171085dbf7f02ec8ddad6240d90ba6d7286
https://github.com/llvm/llvm-project/commit/00a68171085dbf7f02ec8ddad6240d90ba6d7286
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/v4f32-immediate.ll
Log Message:
-----------
[X86] v4f32-immediate.ll - replace X32 check prefixes with X86
We try to only use X32 for gnux32 triple tests.
Commit: 929503ead36bd954a2fa9ca4338d12d8ddd607ff
https://github.com/llvm/llvm-project/commit/929503ead36bd954a2fa9ca4338d12d8ddd607ff
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/v2f32.ll
Log Message:
-----------
[X86] v2f32.ll - replace X32 check prefixes with X86 (and add common CHECK prefix)
We try to only use X32 for gnux32 triple tests.
Commit: 3f5fcb59ae582ebfbe3f23050d90f86a2cb76eb0
https://github.com/llvm/llvm-project/commit/3f5fcb59ae582ebfbe3f23050d90f86a2cb76eb0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/ResultAggregator.cpp
Log Message:
-----------
Fix MSVC "not all control paths return a value" warning. NFC.
Commit: b4370140b4467eddc42e7b8075959c692daaf3e8
https://github.com/llvm/llvm-project/commit/b4370140b4467eddc42e7b8075959c692daaf3e8
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A mlir/test/Target/LLVMIR/omptarget-teams-llvm.mlir
Log Message:
-----------
[OpenMPIRBuilder] Do not call host runtime for GPU teams codegen (#79984)
Patch ensures that host runtime functions are not called for handling
OpenMP teams clause on the device.
GPU code for pragma `omp target teams distribute parallel do` will
require only one call to OpenMP loop-worksharing GPU runtime. Support
for it will be added later.
This patch does not include changes required for handling `omp target
teams` for the host side.
Commit: cb6240d247b3419dea29eb99261171ea239b1c5c
https://github.com/llvm/llvm-project/commit/cb6240d247b3419dea29eb99261171ea239b1c5c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/BDCE.cpp
M llvm/test/Transforms/BDCE/invalidate-assumptions.ll
Log Message:
-----------
[BDCE] Also drop poison-generating metadata
The comment was incorrect: !range also applies to calls, and we
do need to drop it in some cases.
Commit: 5cc87b424be87db4247f34ae5477be8b09a573e9
https://github.com/llvm/llvm-project/commit/5cc87b424be87db4247f34ae5477be8b09a573e9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
A llvm/test/Assembler/incomplete-ir-declarations.ll
Log Message:
-----------
[AsmParser] Add missing globals declarations in incomplete IR mode (#79855)
If `-allow-incomplete-ir` is enabled, automatically insert declarations
for missing globals.
If a global is only used in calls with the same function type, insert a
function declaration with that type.
Otherwise, insert a dummy i8 global. The fallback case could be extended
with various heuristics (e.g. we could look at load/store types), but
I've chosen to keep it simple for now, because I'm unsure to what degree
this would really useful without more experience. I expect that in most
cases the declaration type doesn't really matter (note that the type of
an external global specifies a *minimum* size only, not a precise size).
This is a followup to https://github.com/llvm/llvm-project/pull/78421.
Commit: a74e9ce5dc5cc746bd625b0ef20524a90a073375
https://github.com/llvm/llvm-project/commit/a74e9ce5dc5cc746bd625b0ef20524a90a073375
Author: SunilKuravinakop <98882378+SunilKuravinakop at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/OpenMP/atomic_ast_print.cpp
M clang/test/OpenMP/atomic_messages.cpp
M clang/tools/libclang/CIndex.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[OpenMP] atomic compare weak : Parser & AST support (#79475)
This is a support for " #pragma omp atomic compare weak". It has Parser
& AST support for now.
---------
Authored-by: Sunil Kuravinakop <kuravina at pe28vega.us.cray.com>
Commit: 3abf55a68caefd45042c27b73a658c638afbbb8b
https://github.com/llvm/llvm-project/commit/3abf55a68caefd45042c27b73a658c638afbbb8b
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/Inline/AArch64/sme-pstatesm-attrs.ll
Log Message:
-----------
[AArch64][SME] Fix inlining bug introduced in #78703 (#79994)
Calling a `__arm_locally_streaming` function from a function that
is not a streaming-SVE function would lead to incorrect inlining.
The issue didn't surface because the tests were not testing what
they were supposed to test.
Commit: d309261d05cf173e6a18b20be986877fd87fe4f3
https://github.com/llvm/llvm-project/commit/d309261d05cf173e6a18b20be986877fd87fe4f3
Author: Nashe Mncube <nashe.mncube at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/IR/Instructions.cpp
A llvm/test/Transforms/InstCombine/bitcast-bfloat-half-mixing.ll
Log Message:
-----------
[llvm][InstCombine] bitcast bfloat half castpair bug (#79832)
Miscompilation arises due to instruction combining of cast pairs of the
type `bitcast bfloat to half` + `<FPOp> bfloat to half` or `bitcast half
to bfloat` + `<FPOp half to bfloat`. For example `bitcast bfloat to
half`+`fpext half to double` or `bitcast bfloat to half`+`fpext bfloat
to double` respectively reduce to `fpext bfloat to double` and `fpext
half to double`. This is an incorrect conversion as it assumes the
representation of `bfloat` and `half` are equivalent due to having the
same width. As a consequence miscompilation arises.
Fixes #61984
Commit: d55d72e931bab77a3d1265cf03f4da7858a49478
https://github.com/llvm/llvm-project/commit/d55d72e931bab77a3d1265cf03f4da7858a49478
Author: Billy Laws <blaws05 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/tools/llvm-rc/windres-prefix.test
M llvm/tools/llvm-rc/llvm-rc.cpp
Log Message:
-----------
[llvm-rc] Support ARM64EC resource generation (#78908)
This is already supported in llvm-cvtres, so only a small change is
needed.
Commit: d74619abb53bc9c5680f83bb1dead9c65135ecc6
https://github.com/llvm/llvm-project/commit/d74619abb53bc9c5680f83bb1dead9c65135ecc6
Author: Billy Laws <blaws05 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw.cpp
Log Message:
-----------
[clang] [MinGW] Handle linking ARM64EC code (#78912)
Commit: 042800a4dd79375ec0895c8959a43c86149232f3
https://github.com/llvm/llvm-project/commit/042800a4dd79375ec0895c8959a43c86149232f3
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.h
M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
M mlir/include/mlir/Dialect/ArmSME/Utils/Utils.h
M mlir/lib/Dialect/ArmSME/IR/Utils.cpp
M mlir/lib/Dialect/ArmSME/Transforms/CMakeLists.txt
A mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
A mlir/test/Dialect/ArmSME/vector-legalization.mlir
A mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir
Log Message:
-----------
[mlir][ArmSME] Add initial SME vector legalization pass (#79152)
This adds a new pass (`-arm-sme-vector-legalization`) which legalizes
vector operations so that they can be lowered to ArmSME. This initial
patch adds decomposition for `vector.outerproduct`,
`vector.transfer_read`, and `vector.transfer_write` when they operate on
vector types larger than a single SME tile. For example, a [8]x[8]xf32
outer product would be decomposed into four [4]x[4]xf32 outer products,
which could then be lowered to ArmSME. These three ops have been picked
as supporting them alone allows lowering matmuls that use all ZA
accumulators to ArmSME.
For it to be possible to legalize a vector type it has to be a multiple
of an SME tile size, but other than that any shape can be used. E.g.
`vector<[8]x[8]xf32>`, `vector<[4]x[16]xf32>`, `vector<[16]x[4]xf32>`
can all be lowered to four `vector<[4]x[4]xf32>` operations.
In future, this pass will be extended with more SME-specific rewrites to
legalize unrolling the reduction dimension of matmuls (which is not
type-decomposition), which is why the pass has quite a general name.
Commit: 912cdd2179783b67926d53adc77c12148076ddb2
https://github.com/llvm/llvm-project/commit/912cdd2179783b67926d53adc77c12148076ddb2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[DAG] AddNodeIDCustom - call ShuffleVectorSDNode::getMask once instead of repeated getMaskElt calls.
Use a simpler for-range loop to append all shuffle mask elements
Commit: a82ca1cd1b57671ce5ddbed63c6418f6841fe71d
https://github.com/llvm/llvm-project/commit/a82ca1cd1b57671ce5ddbed63c6418f6841fe71d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/insertps-from-constantpool.ll
Log Message:
-----------
[X86] insertps-from-constantpool.ll - replace X32 check prefixes with X86 and expose address math
We try to only use X32 for gnux32 triple tests.
Use no_x86_scrub_mem_shuffle so the test shows updated shuffle intermediate and the +4 offset into the constant pool vector entry
Commit: e4af212f967027430b4b313d2cca51888601547b
https://github.com/llvm/llvm-project/commit/e4af212f967027430b4b313d2cca51888601547b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/divrem.ll
Log Message:
-----------
[X86] divrem.ll - replace X32 check prefixes with X86
We try to only use X32 for gnux32 triple tests.
Commit: ed11f255a89f6eb3713a3d4f2b241317a41be40c
https://github.com/llvm/llvm-project/commit/ed11f255a89f6eb3713a3d4f2b241317a41be40c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/divide-by-constant.ll
Log Message:
-----------
[X86] divide-by-constant.ll - replace X32 check prefixes with X86
We try to only use X32 for gnux32 triple tests.
Commit: 824d073fb654891dc31523f6b68f49818cfaf40a
https://github.com/llvm/llvm-project/commit/824d073fb654891dc31523f6b68f49818cfaf40a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll
M llvm/test/CodeGen/X86/fold-vector-sext-zext.ll
Log Message:
-----------
[X86] fold-vector-sext - replace X32 check prefixes with X86
We try to only use X32 for gnux32 triple tests.
Commit: 1d8c8f11699ef03e8cc299245a16b2bd141b2ba7
https://github.com/llvm/llvm-project/commit/1d8c8f11699ef03e8cc299245a16b2bd141b2ba7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/cfguard-checks-funclet.ll
M llvm/test/CodeGen/X86/cfguard-checks.ll
M llvm/test/CodeGen/X86/cfguard-module-flag.ll
M llvm/test/CodeGen/X86/cfguard-x86-vectorcall.ll
Log Message:
-----------
[X86] cfguard - replace X32 check prefixes with X86
We try to only use X32 for gnux32 triple tests.
Commit: 648eb7c1415afb818b45782e1f2758a1f7677496
https://github.com/llvm/llvm-project/commit/648eb7c1415afb818b45782e1f2758a1f7677496
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/divrem8_ext.ll
Log Message:
-----------
[X86] divrem8_ext.ll - replace X32 check prefixes with X86
We try to only use X32 for gnux32 triple tests.
Commit: cf828aee2460058db5dacb1523797fe787486f4d
https://github.com/llvm/llvm-project/commit/cf828aee2460058db5dacb1523797fe787486f4d
Author: Rin Dobrescu <irina.dobrescu at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/avoid-pre-trunc.ll
A llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
Log Message:
-----------
[AArch64] Convert concat(uhadd(a,b), uhadd(c,d)) to uhadd(concat(a,c), concat(b,d)) (#79464)
We can convert concat(v4i16 uhadd(a,b), v4i16 uhadd(c,d)) to v8i16
uhadd(concat(a,c), concat(b,d)), which can lead to further
simplifications.
Commit: e3c9327bc493286bf420d1520df8217ae559f5c3
https://github.com/llvm/llvm-project/commit/e3c9327bc493286bf420d1520df8217ae559f5c3
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
Log Message:
-----------
[X86][CodeGen] Set isReMaterializable = 1 for AVX broadcast load
Broadcast of a single float should not be any slower than
loading 32B using vmovaps. So remat it can help reduce
register spill when there is big register pressure.
Commit: f96e85b9494f549976fac3947756e6da1fcc572b
https://github.com/llvm/llvm-project/commit/f96e85b9494f549976fac3947756e6da1fcc572b
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
Log Message:
-----------
[AMDGPU][GFX12] Add tests for unsupported builtins (#78729)
__builtin_amdgcn_mfma* and __builtin_amdgcn_smfmac*
Commit: d9e875dcc13359f2a399b04e7c54bf70c0306a89
https://github.com/llvm/llvm-project/commit/d9e875dcc13359f2a399b04e7c54bf70c0306a89
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrSSE.td
A llvm/test/MC/Disassembler/X86/apx/lzcnt.txt
A llvm/test/MC/Disassembler/X86/apx/popcnt.txt
A llvm/test/MC/Disassembler/X86/apx/tzcnt.txt
A llvm/test/MC/X86/apx/lzcnt-att.s
A llvm/test/MC/X86/apx/lzcnt-intel.s
A llvm/test/MC/X86/apx/popcnt-att.s
A llvm/test/MC/X86/apx/popcnt-intel.s
A llvm/test/MC/X86/apx/tzcnt-att.s
A llvm/test/MC/X86/apx/tzcnt-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][MC] Support encoding/decoding for APX variant LZCNT/TZCNT/POPCNT instructions (#79954)
Two variants: promoted legacy, NF (no flags update).
The syntax of NF instructions is aligned with GNU binutils.
https://sourceware.org/pipermail/binutils/2023-September/129545.html
Commit: 817d0cb4856236e16c7065fc37fbdd97a3ca67e0
https://github.com/llvm/llvm-project/commit/817d0cb4856236e16c7065fc37fbdd97a3ca67e0
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fcmp-select.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
Log Message:
-----------
[InstCombine] Simplify commutative compares of symmetric pairs (#80134)
Fixes #78038.
Commit: 9536a6286e470960601d269a4bd478927aceea61
https://github.com/llvm/llvm-project/commit/9536a6286e470960601d269a4bd478927aceea61
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-hoist-load-across-store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction-multiple-uses-in-same-instruction.ll
M llvm/test/Transforms/LoopVectorize/induction-unroll-novec.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-needed-but-empty.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
M llvm/test/Transforms/LoopVectorize/vect-phiscev-sext-trunc.ll
Log Message:
-----------
[VPlan] Preserve original induction order when creating scalar steps.
Update createScalarIVSteps to take an insert point as parameter. This
ensures that the inserted scalar steps are in the same order as the
recipes they replace (vs in reverse order as currently). This helps to
reduce the diff for follow-up changes.
Commit: ab874268f636bdfc83b567429ca2d2483f7cc831
https://github.com/llvm/llvm-project/commit/ab874268f636bdfc83b567429ca2d2483f7cc831
Author: Joel Wee <joelwee at google.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Fix after #79152
Commit: c672b342c3b6ae70a0b25852e3ce3bcadd684b11
https://github.com/llvm/llvm-project/commit/c672b342c3b6ae70a0b25852e3ce3bcadd684b11
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/IR/PatternMatch.cpp
M mlir/test/Dialect/Affine/simplify-structures.mlir
M mlir/test/Transforms/test-strict-pattern-driver.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][IR] Send missing notifications when inlining a block (#79593)
When a block is inlined into another block, the nested operations are
moved into another block and the `notifyOperationInserted` callback
should be triggered. This commit adds the missing notifications for:
* `RewriterBase::inlineBlockBefore`
* `RewriterBase::mergeBlocks`
Commit: 7e45cfda8f75e44f23eee7622a31c04841df888e
https://github.com/llvm/llvm-project/commit/7e45cfda8f75e44f23eee7622a31c04841df888e
Author: Joel Wee <joelwee at google.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir] Fix ab874268f636bdfc83b567429ca2d2483f7cc831
Commit: 121a0ef0bbc1a69760b69391b387e2efda0ad922
https://github.com/llvm/llvm-project/commit/121a0ef0bbc1a69760b69391b387e2efda0ad922
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
Log Message:
-----------
[mlir][EmitC] Remove unused attribute from verbatim op (#80142)
The uses of the attribute were removed in code review of #79584, but
it's definition was inadvertently kept.
Commit: cec24f0d7efc206e329890821e92a4b25c550885
https://github.com/llvm/llvm-project/commit/cec24f0d7efc206e329890821e92a4b25c550885
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
Log Message:
-----------
[VPlan] Update stale test after 9536a6286, fix formatting.
Commit: c2675ba91aa22e7530465f027fbd853c05b95192
https://github.com/llvm/llvm-project/commit/c2675ba91aa22e7530465f027fbd853c05b95192
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/IR/PatternMatch.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Transforms/test-strict-pattern-driver.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][IR] Send missing notification when splitting a block (#79597)
When a block is split with `RewriterBase::splitBlock`, a
`notifyBlockInserted` notification, followed by
`notifyOperationInserted` notifications (for moving over the operations
into the new block) should be sent. This commit adds those
notifications.
Commit: de75e5079ae1d4894c918fd452e468fb6a888be1
https://github.com/llvm/llvm-project/commit/de75e5079ae1d4894c918fd452e468fb6a888be1
Author: Alfie Richards <156316945+AlfieRichardsArm at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/test/CodeGen/ARM/arm-vlddup-update.ll
M llvm/test/CodeGen/ARM/arm-vlddup.ll
M llvm/test/CodeGen/ARM/bf16-intrinsics-ld-st.ll
Log Message:
-----------
[ARM][NEON] Add constraint to vld2 Odd/Even Pseudo instructions. (#79287)
This ensures the odd/even pseudo instructions are allocated to the same
register range.
This fixes #71763
Commit: e538486e90539096e7851d0deba4ea9ed94fced2
https://github.com/llvm/llvm-project/commit/e538486e90539096e7851d0deba4ea9ed94fced2
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/range.c
Log Message:
-----------
[Driver] Fix erroneous warning for -fcx-limited-range and -fcx-fortran-rules. (#79821)
The options `-fcx-limited-range` and `-fcx-fortran-rules` were added in
_https://github.com/llvm/llvm-project/pull/70244_
The code adding the options introduced an erroneous warning.
`$ clang -c -fcx-limited-range t1.c`
`clang: warning: overriding '' option with '-fcx-limited-range'
[-Woverriding-option]`
and
`$ clang -c -fcx-fortran-rules t1.c`
`clang: warning: overriding '' option with '-fcx-fortran-rules'
[-Woverriding-option]`
The warning doesn't make sense. This patch removes it.
Commit: 4f32f5d5720fbef06672714a62376f236a36aef5
https://github.com/llvm/llvm-project/commit/4f32f5d5720fbef06672714a62376f236a36aef5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/BasicAliasAnalysis.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/test/Transforms/JumpThreading/pr79175.ll
Log Message:
-----------
[AA][JumpThreading] Don't use DomTree for AA in JumpThreading (#79294)
JumpThreading may perform AA queries while the dominator tree is not up
to date, which may result in miscompilations.
Fix this by adding a new AAQI option to disable the use of the dominator
tree in BasicAA.
Fixes https://github.com/llvm/llvm-project/issues/79175.
Commit: 74bf0b1cd9dde53b2df08966bcf2f91d4909ccd6
https://github.com/llvm/llvm-project/commit/74bf0b1cd9dde53b2df08966bcf2f91d4909ccd6
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Dialect/GPU/Pipelines/GPUToNVVMPipeline.cpp
A mlir/test/Dialect/GPU/test-nvvm-pipeline.mlir
Log Message:
-----------
[mlir] Lower math dialect later in gpu-lower-to-nvvm-pipeline (#78556)
This PR moves lowering of math dialect later in the pipeline. Because
math dialect is lowered correctly by `createConvertGpuOpsToNVVMOps` for
GPU target, and it needs to run it first.
Commit: 9bf4e54ef42d907ae7550f36fa518f14fa97af6f
https://github.com/llvm/llvm-project/commit/9bf4e54ef42d907ae7550f36fa518f14fa97af6f
Author: Andrey Ali Khan Bolshakov <32954549+bolshakov-a at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/CoverageMapping/templates.cpp
Log Message:
-----------
[clang] Represent array refs as `TemplateArgument::Declaration` (#80050)
This returns (probably temporarily) array-referring NTTP behavior to
which was prior to #78041 because ~~I'm fed up~~ have no time to fix
regressions.
Commit: b7738e275dc097f224d00434253b485288a6caff
https://github.com/llvm/llvm-project/commit/b7738e275dc097f224d00434253b485288a6caff
Author: Quentin Dian <dianqk at dianqk.net>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
M llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir
M llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap.mir
M llvm/test/CodeGen/ARM/constant-island-movwt.mir
A llvm/test/CodeGen/MIR/X86/unreachable-block-print.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-remove-back-copies.mir
M llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
Log Message:
-----------
[MIRPrinter] Don't print space when there is no successor (#80143)
Extra space causes the checks generated by update_mir_test_checks to be
unavailable.
```
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -mtriple=x86_64-- -o - %s -run-pass=none -verify-machineinstrs -simplify-mir | FileCheck %s
---
name: foo
body: |
; CHECK-LABEL: name: foo
; CHECK: bb.0:
; CHECK-NEXT: successors:
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: RET 0, $eax
bb.0:
successors:
bb.1:
RET 0, $eax
...
```
The failure log is as follows:
```
llvm/test/CodeGen/MIR/X86/unreachable-block-print.mir:9:16: error: CHECK-NEXT: is on the same line as previous match
; CHECK-NEXT: {{ $}}
^
<stdin>:21:13: note: 'next' match was here
successors:
^
<stdin>:21:13: note: previous match ended here
successors:
```
Commit: 70fb96a28678c488326a135fe298175b9a3a7657
https://github.com/llvm/llvm-project/commit/70fb96a28678c488326a135fe298175b9a3a7657
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
M mlir/test/Conversion/ComplexToStandard/full-conversion.mlir
M mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir
Log Message:
-----------
Revert "[mlir][complex] Prevent underflow in complex.abs (#79786)"
This reverts commit 4effff21fb2f3462e06fcbd7812562f4771b0487. It makes
`complex.abs(-1)` return `-1`.
Commit: 4679132a85c6c4cced2a71ef6422b793ae39598c
https://github.com/llvm/llvm-project/commit/4679132a85c6c4cced2a71ef6422b793ae39598c
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M flang/include/flang/Runtime/io-api.h
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/IO.cpp
M flang/runtime/io-api.cpp
A flang/test/Lower/io-asynchronous.f90
M flang/test/Lower/io-statement-1.f90
Log Message:
-----------
[flang] Lower ASYNCHRONOUS variables and IO statements (#80008)
Finish plugging-in ASYNCHRONOUS IO in lowering (GetAsynchronousId was
not used yet).
Add a runtime implementation for GetAsynchronousId (only the signature
was defined). Always return zero since flang runtime "fakes"
asynchronous IO (data transfer are always complete, see
flang/docs/IORuntimeInternals.md).
Update all runtime integer argument and results for IDs to use the
AsynchronousId int alias for consistency.
In lowering, asynchronous attribute is added on the hlfir.declare of
ASYNCHRONOUS variable, but nothing else is done. This is OK given the
synchronous aspects of flang IO, but it would be safer to treat these
variable as volatile (prevent code motion of related store/loads) since
the asynchronous data change can also be done by C defined user
procedure (see 18.10.4 Asynchronous communication). Flang lowering
anyway does not give enough info for LLVM to do such code motions (the
variables that are passed in a call are not given the noescape
attribute, so LLVM will assume any later opaque call may modify the
related data and would not move load/stores of such variables
before/after calls even if it could from a pure Fortran point of view
without ASYNCHRONOUS).
Commit: 47df391296fcf8fe430e1ff6f797e5d7cfd41ca4
https://github.com/llvm/llvm-project/commit/47df391296fcf8fe430e1ff6f797e5d7cfd41ca4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/lib/AST/Interp/Context.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/functions.cpp
M clang/test/SemaCXX/builtin-std-move.cpp
Log Message:
-----------
[clang][Interp] Handle std::move etc. builtins (#70772)
Commit: 6e6aa44c7d14b37a12e40c6b36478045d6004a0a
https://github.com/llvm/llvm-project/commit/6e6aa44c7d14b37a12e40c6b36478045d6004a0a
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
R clang/test/SemaTemplate/default-parm-init.cpp
Log Message:
-----------
Revert "[Clang][Sema] fix outline member function template with defau… (#80144)
…lt align crash (#78400)"
This reverts commit 7b3389980ddbd84f72ccc4776889c67519cc2c14.
A regression was discovered here:
https://github.com/llvm/llvm-project/pull/78400
and the author requested a revert to give time to review.
Commit: 31fc0a12e1552e6bcea63ae740f284eaf74f4c17
https://github.com/llvm/llvm-project/commit/31fc0a12e1552e6bcea63ae740f284eaf74f4c17
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/docs/Dialects/Mesh.md
M mlir/include/mlir/Dialect/Mesh/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
A mlir/include/mlir/Dialect/Mesh/IR/MeshDialect.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/InitAllDialects.h
M mlir/lib/Dialect/Mesh/IR/CMakeLists.txt
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/ShardingPropagation.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/lib/Dialect/Mesh/TestProcessMultiIndexOpLowering.cpp
M mlir/test/lib/Dialect/Mesh/TestSimplifications.cpp
Log Message:
-----------
[mlir][mesh] Refactoring code organization, tests and docs (#79606)
* Split out `MeshDialect.h` form `MeshOps.h` that defines the dialect
class. Reduces include clutter if you care only about the dialect and
not the ops.
* Expose functions `getMesh` and `collectiveProcessGroupSize`. There
functions are useful for outside users of the dialect.
* Remove unused code.
* Remove examples and tests of mesh.shard attribute in tensor encoding.
Per the decision that Spmdization would be performed on sharding
annotations and there will be no tensors with sharding specified in the
type.
For more info see this RFC comment:
https://discourse.llvm.org/t/rfc-sharding-framework-design-for-device-mesh/73533/81
Commit: 1bab570e9b82a68089348a3bca388d297a72f60f
https://github.com/llvm/llvm-project/commit/1bab570e9b82a68089348a3bca388d297a72f60f
Author: Shimin Cui <scui at ca.ibm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCMergeStringPool.cpp
M llvm/test/CodeGen/PowerPC/mergeable-string-pool-large.ll
M llvm/test/CodeGen/PowerPC/mergeable-string-pool.ll
Log Message:
-----------
Move the PowerPC/PPCMergeStringPool work to initializer (#77352)
Currently, the `PPCMergeStringPool` merges the global variable after the
`AsmPrinter` initializer adds the global variables to its symbol list.
This is to move the merging work of `PPCMergeStringPool` to its
initializer, just like what GlobalMerge does, to avoid adding merged
global variables to the `AsmPrinter` symbol lis.
Commit: c651b2b0d9d1393fb5191ac3acfe96e5ecc94bbc
https://github.com/llvm/llvm-project/commit/c651b2b0d9d1393fb5191ac3acfe96e5ecc94bbc
Author: AdityaK <1894981+hiraditya at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
Log Message:
-----------
Fix: CMake Error at cmake/modules/LLVMExternalProjectUtils.cmake:86 (is_msvc_triple) (#80071)
Adding quotes around the `${target_triple}`
Fix: #78530
Commit: 8d1b1c9b97de557299e8148a79d756c1e8d9b7eb
https://github.com/llvm/llvm-project/commit/8d1b1c9b97de557299e8148a79d756c1e8d9b7eb
Author: Sam McCall <sam.mccall at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/AST/TypeLoc.h
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTTypeTraits.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
A clang/unittests/AST/ASTDumperTest.cpp
M clang/unittests/AST/CMakeLists.txt
Log Message:
-----------
[AST] Add dump() method to TypeLoc (#65484)
The ability to dump AST nodes is important to ad-hoc debugging, and
the fact this doesn't work with TypeLoc nodes is an obvious missing
feature in e.g. clang-query (`set output dump` simply does nothing).
Having TypeLoc::dump(), and enabling DynTypedNode::dump() for such nodes
seems like a clear win.
It looks like this:
```
int main(int argc, char **argv);
FunctionProtoTypeLoc <test.cc:3:1, col:31> 'int (int, char **)' cdecl
|-ParmVarDecl 0x30071a8 <col:10, col:14> col:14 argc 'int'
| `-BuiltinTypeLoc <col:10> 'int'
|-ParmVarDecl 0x3007250 <col:20, col:27> col:27 argv 'char **'
| `-PointerTypeLoc <col:20, col:26> 'char **'
| `-PointerTypeLoc <col:20, col:25> 'char *'
| `-BuiltinTypeLoc <col:20> 'char'
`-BuiltinTypeLoc <col:1> 'int'
```
It dumps the lexically nested tree of type locs.
This often looks similar to how types are dumped, but unlike types
we don't look at desugaring e.g. typedefs, as their underlying types
are not lexically spelled here.
---
Less clear is exactly when to include these nodes in existing text AST
dumps rooted at (TranslationUnit)Decls.
These already omit supported nodes sometimes, e.g. NestedNameSpecifiers
are often mentioned but not recursively dumped.
TypeLocs are a more extreme case: they're ~always more verbose
than the current AST dump.
So this patch punts on that, TypeLocs are only ever printed recursively
as part of a TypeLoc::dump() call.
It would also be nice to be able to invoke `clang` to dump a typeloc
somehow, like `clang -cc1 -ast-dump`. But I don't know exactly what the
best verison of that is, so this patch doesn't do it.
---
There are similar (less critical!) nodes: TemplateArgumentLoc etc,
these also don't have dump() functions today and are obvious extensions.
I suspect that we should add these, and Loc nodes should dump each other
(e.g. the ElaboratedTypeLoc `vector<int>::iterator` should dump
the NestedNameSpecifierLoc `vector<int>::`, which dumps the
TemplateSpecializationTypeLoc `vector<int>::` etc).
Maybe this generalizes further to a "full syntactic dump" mode, where
even Decls and Stmts would print the TypeLocs they lexically contain.
But this may be more complex than useful.
---
While here, ConceptReference JSON dumping must be implemented. It's not
totally clear to me why this implementation wasn't required before but
is now...
Commit: 88418460502c524de1f1b014316eb5d603c3758f
https://github.com/llvm/llvm-project/commit/88418460502c524de1f1b014316eb5d603c3758f
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
Log Message:
-----------
[AArch64] MI Scheduler LDP combine follow up (#79003)
This is a follow up of 75d820dcdd86, adding more opcodes to the combine
target hook enabling more LDP creation.
Patch co-authored by Cameron McInally.
Commit: e33dc6b0282fb28d5289490981ad57d97d83db42
https://github.com/llvm/llvm-project/commit/e33dc6b0282fb28d5289490981ad57d97d83db42
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Add a release note for TypeLoc::dump() support; NFC
This amends 8d1b1c9b97de557299e8148a79d756c1e8d9b7eb which added the
functionality the release note refers to.
Commit: 5d7d89de31ad017a91204988cacc2f0ff69d47da
https://github.com/llvm/llvm-project/commit/5d7d89de31ad017a91204988cacc2f0ff69d47da
Author: David Green <david.green at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-csel.ll
Log Message:
-----------
[AArch64] Use add_and_or_is_add for CSINC (#79552)
Adds or add-like-or's of 1 can both be turned into csinc, which can help
fold more instructions into a csinc.
Commit: 32c00485f1e896d472549324218878ba6444f4f6
https://github.com/llvm/llvm-project/commit/32c00485f1e896d472549324218878ba6444f4f6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Pointer.h
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Handle casts between complex types (#79269)
Just handle this like two primtive casts.
Commit: dfd5a64da4b76db1ec557ff31e1d64dd7e9eebe5
https://github.com/llvm/llvm-project/commit/dfd5a64da4b76db1ec557ff31e1d64dd7e9eebe5
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
Log Message:
-----------
[clang][Interp] Remove wrong * operator
classifyComplexElementType used to return a std::optional, seems like
this was left in a PR and not re-tested.
This broke build bots, e.g.
https://lab.llvm.org/buildbot/#/builders/68/builds/67930
Commit: f2df4bfe54cd4161b7a2d89a0bc5dc69e747b01e
https://github.com/llvm/llvm-project/commit/f2df4bfe54cd4161b7a2d89a0bc5dc69e747b01e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/include/llvm/AsmParser/LLParser.h
A llvm/include/llvm/AsmParser/NumberedValues.h
M llvm/include/llvm/AsmParser/SlotMapping.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
A llvm/test/Assembler/skip-value-numbers-globals.ll
M llvm/test/Assembler/skip-value-numbers-invalid.ll
M llvm/unittests/AsmParser/AsmParserTest.cpp
Log Message:
-----------
[AsmParser] Support non-consecutive global value numbers (#80013)
https://github.com/llvm/llvm-project/pull/78171 added support for
non-consecutive local value numbers. This extends the support for global
value numbers (for globals and functions).
This means that it is now possible to delete an unnamed global
definition/declaration without breaking the IR.
This is a lot less common than unnamed local values, but it seems like
something we should support for consistency. (Unnamed globals are used a
lot in Rust though.)
Commit: 0cd83486c0a0973e2242926c7cc3ef561021e3b2
https://github.com/llvm/llvm-project/commit/0cd83486c0a0973e2242926c7cc3ef561021e3b2
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/AST/BUILD.gn
Log Message:
-----------
[gn build] Port 8d1b1c9b97de
Commit: 5c2da289d2514e35708832fed41501d136cc3cb0
https://github.com/llvm/llvm-project/commit/5c2da289d2514e35708832fed41501d136cc3cb0
Author: Paul Semel <semelpaul at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] fix assert in `Environment::getResultObjectLocation` (#79608)
When calling `Environment::getResultObjectLocation` with a
CXXOperatorCallExpr that is a prvalue, we just hit an assert because no
record was ever created.
---------
Co-authored-by: martinboehme <mboehme at google.com>
Commit: bd8bec27e25022b07ec7044654cd6a1efcd9704f
https://github.com/llvm/llvm-project/commit/bd8bec27e25022b07ec7044654cd6a1efcd9704f
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Lower/HLFIR/procedure-pointer.f90
Log Message:
-----------
[Flang] Support NULL(procptr): null intrinsic that has procedure pointer argument. (#80072)
This PR adds support for NULL intrinsic to have a procedure pointer
argument.
Commit: e34fd2e193686f8a98504b58c12d966ce14b4209
https://github.com/llvm/llvm-project/commit/e34fd2e193686f8a98504b58c12d966ce14b4209
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterClassInfo.cpp
Log Message:
-----------
[CodeGen] Simplify RegisterClassInfo BitVector comparisons. NFC.
Commit: baf1b19763ff41d991ac80275bbbff54859c6e7c
https://github.com/llvm/llvm-project/commit/baf1b19763ff41d991ac80275bbbff54859c6e7c
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterClassInfo.cpp
Log Message:
-----------
[CodeGen] Use regunits instead of MCRegUnitIterator in RegisterClassInfo. NFC.
Commit: 98dbc688de90cd7019dad32356b466a896b0d2ff
https://github.com/llvm/llvm-project/commit/98dbc688de90cd7019dad32356b466a896b0d2ff
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Dialect/GPU/Pipelines/GPUToNVVMPipeline.cpp
R mlir/test/Dialect/GPU/test-nvvm-pipeline.mlir
Log Message:
-----------
Revert "[mlir] Lower math dialect later in gpu-lower-to-nvvm-pipeline (#78556)"
This reverts commit 74bf0b1cd9dde53b2df08966bcf2f91d4909ccd6. The test
always fails.
| mlir/test/Dialect/GPU/test-nvvm-pipeline.mlir:23:16: error: CHECK-PTX: expected string not found in input
| // CHECK-PTX: __nv_expf
https://lab.llvm.org/buildbot/#/builders/61/builds/53789
Commit: 2907c63311bfdeb4c2a09e858b969893a3dd35cc
https://github.com/llvm/llvm-project/commit/2907c63311bfdeb4c2a09e858b969893a3dd35cc
Author: Rin Dobrescu <irina.dobrescu at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/avoid-pre-trunc.ll
R llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
Log Message:
-----------
Revert "[AArch64] Convert concat(uhadd(a,b), uhadd(c,d)) to uhadd(concat(a,c), concat(b,d))" (#80157)
Reverts llvm/llvm-project#79464 while figuring out why the tests are
failing.
Commit: 6720e3af253e458db56a018950065c27872b3c62
https://github.com/llvm/llvm-project/commit/6720e3af253e458db56a018950065c27872b3c62
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port 31fc0a12e1552e6bcea63ae740f284eaf74f4c17
Commit: d04ae1b15ff3064e9fb43a3a15f43285d4ee7998
https://github.com/llvm/llvm-project/commit/d04ae1b15ff3064e9fb43a3a15f43285d4ee7998
Author: David Green <david.green at arm.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-csel.ll
M llvm/test/CodeGen/AArch64/shift-accumulate.ll
Log Message:
-----------
[AArch64] Use DAG->isAddLike in add_and_or_is_add (#79563)
This allows it to work with disjoint or's as well as computing the known
bits.
Commit: b929be2d12a291412f726f2df54934803343fa29
https://github.com/llvm/llvm-project/commit/b929be2d12a291412f726f2df54934803343fa29
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/test/Interpreter/cxx20-modules.cppm
Log Message:
-----------
[Clang][test] Add fPIC when building shared library (#80065)
Fix linking error: "ld: error: can't create dynamic relocation
R_X86_64_64 against local symbol in readonly segment; recompile object
files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in
the output"
Commit: 16c4843d3263050b359733a05e86cc4a09361aed
https://github.com/llvm/llvm-project/commit/16c4843d3263050b359733a05e86cc4a09361aed
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing header file for 31fc0a12e1552e6bcea63ae740f284eaf74f4c17
Commit: 8241106bf30fa74f27e324ba23c42a3503ab5707
https://github.com/llvm/llvm-project/commit/8241106bf30fa74f27e324ba23c42a3503ab5707
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/tools/llvm-exegesis/X86/analysis-epsilons.test
M llvm/tools/llvm-exegesis/lib/Analysis.cpp
Log Message:
-----------
[Exegesis] Print epsilon value in the sched model inconsistency report (#80080)
Since I've formatted the epsilon value, I don't think it's necessary to
escape it.
Commit: 08c0eb183a9ca2983d20f5a5f366df44f199d287
https://github.com/llvm/llvm-project/commit/08c0eb183a9ca2983d20f5a5f366df44f199d287
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/LibCxxMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxUnorderedMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
Log Message:
-----------
[lldb][DataFormatter][NFC] Use GetFirstValueOfLibCXXCompressedPair throughout formatters (#80133)
This avoids duplicating the logic to get the first
element of a libc++ `__compressed_pair`. This will
be useful in supporting upcoming changes to the layout
of `__compressed_pair`.
Drive-by changes:
* Renamed `m_item` to `size_node` for readability;
`m_item` suggests it's a member variable, which it
is not.
Commit: 57c66b35a885b571f9897d75d18f1d974c29e533
https://github.com/llvm/llvm-project/commit/57c66b35a885b571f9897d75d18f1d974c29e533
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
A lldb/include/lldb/Breakpoint/WatchpointAlgorithms.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/concurrent_base.py
M lldb/source/Breakpoint/CMakeLists.txt
M lldb/source/Breakpoint/Watchpoint.cpp
A lldb/source/Breakpoint/WatchpointAlgorithms.cpp
M lldb/source/Breakpoint/WatchpointResource.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/test/API/functionalities/watchpoint/large-watchpoint/TestLargeWatchpoint.py
A lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/Makefile
A lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/TestUnalignedLargeWatchpoint.py
A lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/main.c
M lldb/unittests/Breakpoint/CMakeLists.txt
A lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
[lldb] Add support for large watchpoints in lldb (#79962)
This patch is the next piece of work in my Large Watchpoint proposal,
https://discourse.llvm.org/t/rfc-large-watchpoint-support-in-lldb/72116
This patch breaks a user's watchpoint into one or more
WatchpointResources which reflect what the hardware registers can cover.
This means we can watch objects larger than 8 bytes, and we can watched
unaligned address ranges. On a typical 64-bit target with 4 watchpoint
registers you can watch 32 bytes of memory if the start address is
doubleword aligned.
Additionally, if the remote stub implements AArch64 MASK style
watchpoints (e.g. debugserver on Darwin), we can watch any power-of-2
size region of memory up to 2GB, aligned to that same size.
I updated the Watchpoint constructor and CommandObjectWatchpoint to
create a CompilerType of Array<UInt8> when the size of the watched
region is greater than pointer-size and we don't have a variable type to
use. For pointer-size and smaller, we can display the watched granule as
an integer value; for larger-than-pointer-size we will display as an
array of bytes.
I have `watchpoint list` now print the WatchpointResources used to
implement the watchpoint.
I added a WatchpointAlgorithm class which has a top-level static method
that takes an enum flag mask WatchpointHardwareFeature and a user
address and size, and returns a vector of WatchpointResources covering
the request. It does not take into account the number of watchpoint
registers the target has, or the number still available for use. Right
now there is only one algorithm, which monitors power-of-2 regions of
memory. For up to pointer-size, this is what Intel hardware supports.
AArch64 Byte Address Select watchpoints can watch any number of
contiguous bytes in a pointer-size memory granule, that is not currently
supported so if you ask to watch bytes 3-5, the algorithm will watch the
entire doubleword (8 bytes). The newly default "modify" style means we
will silently ignore modifications to bytes outside the watched range.
I've temporarily skipped TestLargeWatchpoint.py for all targets. It was
only run on Darwin when using the in-tree debugserver, which was a proxy
for "debugserver supports MASK watchpoints". I'll be adding the
aforementioned feature flag from the stub and enabling full mask
watchpoints when a debugserver with that feature is enabled, and
re-enable this test.
I added a new TestUnalignedLargeWatchpoint.py which only has one test
but it's a great one, watching a 22-byte range that is unaligned and
requires four 8-byte watchpoints to cover.
I also added a unit test, WatchpointAlgorithmsTests, which has a number
of simple tests against WatchpointAlgorithms::PowerOf2Watchpoints. I
think there's interesting possible different approaches to how we cover
these; I note in the unit test that a user requesting a watch on address
0x12e0 of 120 bytes will be covered by two watchpoints today, a
128-bytes at 0x1280 and at 0x1300. But it could be done with a 16-byte
watchpoint at 0x12e0 and a 128-byte at 0x1300, which would have fewer
false positives/private stops. As we try refining this one, it's helpful
to have a collection of tests to make sure things don't regress.
I tested this on arm64 macOS, (genuine) x86_64 macOS, and AArch64
Ubuntu. I have not modifed the Windows process plugins yet, I might try
that as a standalone patch, I'd be making the change blind, but the
necessary changes (see ProcessGDBRemote::EnableWatchpoint) are pretty
small so it might be obvious enough that I can change it and see what
the Windows CI thinks.
There isn't yet a packet (or a qSupported feature query) for the gdb
remote serial protocol stub to communicate its watchpoint capabilities
to lldb. I'll be doing that in a patch right after this is landed,
having debugserver advertise its capability of AArch64 MASK watchpoints,
and have ProcessGDBRemote add eWatchpointHardwareArmMASK to
WatchpointAlgorithms so we can watch larger than 32-byte requests on
Darwin.
I haven't yet tackled WatchpointResource *sharing* by multiple
Watchpoints. This is all part of the goal, especially when we may be
watching a larger memory range than the user requested, if they then add
another watchpoint next to their first request, it may be covered by the
same WatchpointResource (hardware watchpoint register). Also one "read"
watchpoint and one "write" watchpoint on the same memory granule need to
be handled, making the WatchpointResource cover all requests.
As WatchpointResources aren't shared among multiple Watchpoints yet,
there's no handling of running the conditions/commands/etc on multiple
Watchpoints when their shared WatchpointResource is hit. The goal beyond
"large watchpoint" is to unify (much more) the Watchpoint and Breakpoint
behavior and commands. I have a feeling I may be slowly chipping away at
this for a while.
rdar://108234227
Commit: 35a008994a8d583a33cbea03f79555a2d041b20d
https://github.com/llvm/llvm-project/commit/35a008994a8d583a33cbea03f79555a2d041b20d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Breakpoint/BUILD.gn
Log Message:
-----------
[gn build] Port 57c66b35a885
Commit: 254287658f4b3e413d47870c1cca422071b398ff
https://github.com/llvm/llvm-project/commit/254287658f4b3e413d47870c1cca422071b398ff
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M openmp/libomptarget/include/OffloadEntry.h
M openmp/libomptarget/include/PluginManager.h
M openmp/libomptarget/include/device.h
M openmp/libomptarget/include/omptarget.h
M openmp/libomptarget/src/PluginManager.cpp
M openmp/libomptarget/src/device.cpp
M openmp/libomptarget/src/omptarget.cpp
M openmp/libomptarget/test/offloading/ctor_dtor.cpp
Log Message:
-----------
[Libomptarget] Remove handling of old ctor / dtor entries (#80153)
Summary:
A previous patch removed creating these entries in clang in favor of the
backend emitting a callable kernel and having the runtime call that if
present. The support for the old style was kept around in LLVM 18.0 but
now that we have forked to 19.0 we should remove the support.
The effect of this would be that an application linking against a newer
libomptarget that still had the old constructors will no longer be
called. In that case, they can either recompile or use the
`libomptarget.so.18` that comes with the previous release.
Commit: 372f7dd48f0165c6a7cdc819516132c617ef6f45
https://github.com/llvm/llvm-project/commit/372f7dd48f0165c6a7cdc819516132c617ef6f45
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M libcxxabi/src/cxa_exception_storage.cpp
M libcxxabi/src/cxa_guard_impl.h
M libcxxabi/src/cxa_thread_atexit.cpp
M libcxxabi/src/fallback_malloc.cpp
M libcxxabi/test/test_fallback_malloc.pass.cpp
Log Message:
-----------
[libc++abi] Add temporary workaround to unblock Chrome
Chrome rolls libc++ and libc++abi as separate projects. As a result, they
may not always be updated in lockstep, and this can lead to build failures
when mixing libc++ that doesn't have <__thread/support.h> with libc++abi
that requires it.
This patch adds a workaround to make libc++abi work with both versions.
While Chrome's setup is not supported, this workaround will allow them
to go back to green and do the required work needed to roll libc++ and
libc++abi in lockstep. This workaround will be short-lived -- I have a
reminder to go back and remove it by EOW.
Commit: dad50fefa24e717927a4d3315ae70fe507d624e0
https://github.com/llvm/llvm-project/commit/dad50fefa24e717927a4d3315ae70fe507d624e0
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
Log Message:
-----------
Add extra printing to TestWatchpointCount.py to debug CI fail
The way the locals are laid out on the stack on x86-64 Debian is
resulting in a test failure with the new large watchpoint support.
Collecting more logging before I revert/debug it.
Commit: 151559cfe44ce224376b12e90fa873ee511f2698
https://github.com/llvm/llvm-project/commit/151559cfe44ce224376b12e90fa873ee511f2698
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
A llvm/docs/DirectX/DXILArchitecture.rst
M llvm/docs/DirectXUsage.rst
Log Message:
-----------
[DirectX][docs] Architecture and design philosophy of DXIL support
This documents some of the architectural direction for DXIL and tries
to provide a bit of a map for where to implement different aspects of
DXIL support.
Pull Request: https://github.com/llvm/llvm-project/pull/78221
Commit: 775c2856fb32868f357a3ce3f2b4139541e12578
https://github.com/llvm/llvm-project/commit/775c2856fb32868f357a3ce3f2b4139541e12578
Author: Richard Howell <rmaz at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lld/MachO/Driver.cpp
M lld/test/MachO/arm64-32-stubs.s
M lld/test/MachO/arm64-stubs.s
M lld/test/MachO/dyld-stub-binder.s
M lld/test/MachO/icf-safe.ll
M lld/test/MachO/invalid/chained-fixups-incompatible.s
M lld/test/MachO/objc-selrefs.s
Log Message:
-----------
[lld] enable fixup chains by default (#79894)
Enable chained fixups in lld when all platform and version criteria are
met. This is an attempt at simplifying the logic used in ld 907:
https://github.com/apple-oss-distributions/ld64/blob/93d74eafc37c0558b4ffb88a8bc15c17bed44a20/src/ld/Options.cpp#L5458-L5549
Some changes were made to simplify the logic:
- only enable chained fixups for macOS from 13.0 to avoid the arch check
- only enable chained fixups for iphonesimulator from 16.0 to avoid the
arch check
- don't enable chained fixups for not specifically listed platforms
- don't enable chained fixups for arm64_32
Commit: cf2533e75ec4360da460bb577e0a4e64f2d8997f
https://github.com/llvm/llvm-project/commit/cf2533e75ec4360da460bb577e0a4e64f2d8997f
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
M lldb/test/Shell/Watchpoint/ExpressionLanguage.test
Log Message:
-----------
Collecting more logging to debug CI bots
Watchpoint test fails on arm-ubuntu and x86-64-debian
Commit: 09fc333ec094c9c48f315dd322105b51b34ff2c4
https://github.com/llvm/llvm-project/commit/09fc333ec094c9c48f315dd322105b51b34ff2c4
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Log Message:
-----------
[NFC] Fold an `if` statement into `return` of bool expression
Commit: d6e1ae248e85295704e199a67405ea2a4c7e98b2
https://github.com/llvm/llvm-project/commit/d6e1ae248e85295704e199a67405ea2a4c7e98b2
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/source/Breakpoint/WatchpointAlgorithms.cpp
Log Message:
-----------
Add logging to WatchpointAlgorithm
When verbose lldb watch channel is enabled, print the
user requested watchpoint and the resources we've
broken it up into.
Commit: fa42589fe31924b6176d7a92691c2f760b04ffd8
https://github.com/llvm/llvm-project/commit/fa42589fe31924b6176d7a92691c2f760b04ffd8
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
Log Message:
-----------
Enable verbose watch log channel to debug x86-64-debian bot
Commit: 4cb13f2d2328b80687c9dcbe6815faf397b05c42
https://github.com/llvm/llvm-project/commit/4cb13f2d2328b80687c9dcbe6815faf397b05c42
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cert/CMakeLists.txt
R clang-tools-extra/clang-tidy/cert/PostfixOperatorCheck.cpp
R clang-tools-extra/clang-tidy/cert/PostfixOperatorCheck.h
M clang-tools-extra/clangd/TidyFastChecks.inc
M clang-tools-extra/docs/ReleaseNotes.rst
R clang-tools-extra/docs/clang-tidy/checks/cert/dcl21-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
R clang-tools-extra/test/clang-tidy/checkers/cert/dcl21-cpp.cpp
M clang/docs/tools/clang-formatted-files.txt
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/cert/BUILD.gn
Log Message:
-----------
[clang-tidy] Remove cert-dcl21-cpp check (#80181)
Deprecated since clang-tidy 17. The rule DCL21-CPP has been removed from
the CERT guidelines, so it does not make sense to keep the check.
Fixes #42788
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: 51e0d1b707a15dd3b96e0c4f1a29ca4dfc79cda0
https://github.com/llvm/llvm-project/commit/51e0d1b707a15dd3b96e0c4f1a29ca4dfc79cda0
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/ProgressReportTest.cpp
Log Message:
-----------
[lldb][progress][NFC] Add unit test for progress reports (#79533)
This test is being added as a way to check the behaviour of how progress
events are broadcasted when reports are started and ended with the
current implementation of progress reports. Here we're mainly checking
and ensuring that the current behaviour is that progress events are
broadcasted individually and placed in the event queue in order of their
creation and deletion.
Commit: c84f2bac93f38c903bae2e92fc7749d93c2e1112
https://github.com/llvm/llvm-project/commit/c84f2bac93f38c903bae2e92fc7749d93c2e1112
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/source/Breakpoint/WatchpointAlgorithms.cpp
Log Message:
-----------
Add one more verbose watchpoint logging for arm-ubuntu
Commit: dc15524f61e9fced14181860ce907163b0b3a504
https://github.com/llvm/llvm-project/commit/dc15524f61e9fced14181860ce907163b0b3a504
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M flang/lib/Lower/Allocatable.cpp
M flang/test/Lower/derived-pointer-components.f90
Log Message:
-----------
[flang] DEALLOCATE(pointer) should use PointerDeallocate() (#79702)
A DEALLOCATE statement on a pointer should always use
PointerDeallocate() in the runtime, even if there's no STAT= or
polymorphism or derived types, so that it can be checked to ensure that
it is indeed a whole allocation of a pointer.
Commit: dbf547f8ffa9522656f7dd0f2a674f717f584834
https://github.com/llvm/llvm-project/commit/dbf547f8ffa9522656f7dd0f2a674f717f584834
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M flang/runtime/numeric.cpp
Log Message:
-----------
[flang][runtime] Add limit check to MOD/MODULO (#80026)
When testing the arguments to see whether they are integers, check first
that they are within the maximum range of a 64-bit integer; otherwise, a
value of larger magnitude will set an invalid operand exception flag.
Commit: 60860079ec9416a263d1078e0e29cf393a89737a
https://github.com/llvm/llvm-project/commit/60860079ec9416a263d1078e0e29cf393a89737a
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M flang/lib/Parser/preprocessor.cpp
M flang/test/Driver/prescanner-diag.f90
M flang/test/Preprocessing/include-comment.F90
A flang/test/Preprocessing/macro-in-include.F90
Log Message:
-----------
[flang][preprocessor] Replace macros in some #include directives (#80039)
Ensure that #include FOO undergoes macro replacement. But, as is the
case with C/C++, continue to not perform macro replacement in a #include
directive with <angled brackets>.
Commit: 2ba94bfb46cd3a1e49550f654e0362de23c184a7
https://github.com/llvm/llvm-project/commit/2ba94bfb46cd3a1e49550f654e0362de23c184a7
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M flang/include/flang/Common/Fortran-features.h
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/local-vs-global.f90
Log Message:
-----------
[flang] Downgrade a too-strong error message to a warning (#80095)
When a compilation unit has an interface to an external subroutine or
function, and there is a global object (like a module) with the same
name, we're emitting an error. This is too strong, the program will
still build. This comes up in real applications, too. Downgrade the
error to a warning.
Commit: 209fe1f3d70d1c4a20bb2687e0d0a94b1bbfa0c6
https://github.com/llvm/llvm-project/commit/209fe1f3d70d1c4a20bb2687e0d0a94b1bbfa0c6
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Core/CMakeLists.txt
R lldb/unittests/Core/ProgressReportTest.cpp
Log Message:
-----------
Revert "[lldb][progress][NFC] Add unit test for progress reports (#79533)"
This reverts commit 51e0d1b707a15dd3b96e0c4f1a29ca4dfc79cda0.
That commit breaks a unit test:
```
Failed Tests (1):
lldb-unit :: Core/./LLDBCoreTests/4/8
```
Commit: 9d41fba91cc0a1c0cbad1de9fd5a1f78dd540b1c
https://github.com/llvm/llvm-project/commit/9d41fba91cc0a1c0cbad1de9fd5a1f78dd540b1c
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/source/Breakpoint/WatchpointAlgorithms.cpp
Log Message:
-----------
Revert "Add one more verbose watchpoint logging for arm-ubuntu"
This reverts commit c84f2bac93f38c903bae2e92fc7749d93c2e1112.
Commit: 19f429a4bda124c655829f84bb9c1f76c86a547c
https://github.com/llvm/llvm-project/commit/19f429a4bda124c655829f84bb9c1f76c86a547c
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
Log Message:
-----------
Revert "Enable verbose watch log channel to debug x86-64-debian bot"
This reverts commit fa42589fe31924b6176d7a92691c2f760b04ffd8.
Commit: e95250cda09331779d483e910ab3cfe5d655567c
https://github.com/llvm/llvm-project/commit/e95250cda09331779d483e910ab3cfe5d655567c
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/source/Breakpoint/WatchpointAlgorithms.cpp
Log Message:
-----------
Revert "Add logging to WatchpointAlgorithm"
This reverts commit d6e1ae248e85295704e199a67405ea2a4c7e98b2.
Commit: 46643e07d4c1caae3b8fa77be3a4073300785d91
https://github.com/llvm/llvm-project/commit/46643e07d4c1caae3b8fa77be3a4073300785d91
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
M lldb/test/Shell/Watchpoint/ExpressionLanguage.test
Log Message:
-----------
Revert "Collecting more logging to debug CI bots"
This reverts commit cf2533e75ec4360da460bb577e0a4e64f2d8997f.
Commit: cc4af03a839293ff908b52bb3a79b6ed562fe198
https://github.com/llvm/llvm-project/commit/cc4af03a839293ff908b52bb3a79b6ed562fe198
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/test/API/commands/watchpoints/watchpoint_count/TestWatchpointCount.py
Log Message:
-----------
Revert "Add extra printing to TestWatchpointCount.py to debug CI fail"
This reverts commit dad50fefa24e717927a4d3315ae70fe507d624e0.
Commit: d347c564299eeb8ad1fcb58c06914473d6a789d8
https://github.com/llvm/llvm-project/commit/d347c564299eeb8ad1fcb58c06914473d6a789d8
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
R lldb/include/lldb/Breakpoint/WatchpointAlgorithms.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/concurrent_base.py
M lldb/source/Breakpoint/CMakeLists.txt
M lldb/source/Breakpoint/Watchpoint.cpp
R lldb/source/Breakpoint/WatchpointAlgorithms.cpp
M lldb/source/Breakpoint/WatchpointResource.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/test/API/functionalities/watchpoint/large-watchpoint/TestLargeWatchpoint.py
R lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/Makefile
R lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/TestUnalignedLargeWatchpoint.py
R lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/main.c
M lldb/unittests/Breakpoint/CMakeLists.txt
R lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
Revert "[lldb] Add support for large watchpoints in lldb (#79962)"
This reverts commit 57c66b35a885b571f9897d75d18f1d974c29e533.
Commit: 742f88e9c754042d4f9ee2bfe5e975a7151f41ff
https://github.com/llvm/llvm-project/commit/742f88e9c754042d4f9ee2bfe5e975a7151f41ff
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Breakpoint/BUILD.gn
Log Message:
-----------
[gn build] Port d347c564299e
Commit: c003d851f5cc1476774153fa9ed02fda725e9d57
https://github.com/llvm/llvm-project/commit/c003d851f5cc1476774153fa9ed02fda725e9d57
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
A clang/test/ClangScanDeps/optimize-fmodulemap.m
Log Message:
-----------
[clang][DependencyScanner] Remove unused -fmodule-map-file arguments (#80090)
Since we already add a `-fmodule-map-file=` argument for every used
modulemap, we can remove all `ModuleMapFiles` entries before adding
them.
This reduces the number of module variants when `-fmodule-map-file=`
appears on the original command line.
Commit: 5282202db04f8fb57b581ce8871851becc0eb737
https://github.com/llvm/llvm-project/commit/5282202db04f8fb57b581ce8871851becc0eb737
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
Log Message:
-----------
[LSR] Add a test case mentioned in review
As mentioned in https://github.com/llvm/llvm-project/pull/74747, this case is triggering a particularly high cost trip count expansion.
Commit: 9107904e9b6a56636d06bba120c7c19d332430f0
https://github.com/llvm/llvm-project/commit/9107904e9b6a56636d06bba120c7c19d332430f0
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Build PGO optimized toolchain in container (#80096)
This patch adjusts the Docker container intended for CI use to contain a
PGO+ThinLTO+BOLT optimized clang. The toolchain is built within a Github
action and takes ~3.5 hours. No caching is utilized. The current PGO
optimization is fairly minimal, only running clang over hello world.
This can be adjusted as needed.
Commit: ebe8733a11e735bb9f5ca45ec752c2a416380c8d
https://github.com/llvm/llvm-project/commit/ebe8733a11e735bb9f5ca45ec752c2a416380c8d
Author: lhames <lhames at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/include/llvm-c/Orc.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/DebugUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/RTDyldObjectLinkingLayer.h
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/DebugUtils.cpp
M llvm/lib/ExecutionEngine/Orc/IndirectionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
M llvm/lib/ExecutionEngine/Orc/RTDyldObjectLinkingLayer.cpp
M llvm/test/ExecutionEngine/JITLink/x86-64/LocalDependencyPropagation.s
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/LazyCallThroughAndReexportsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/unittests/ExecutionEngine/Orc/ResourceTrackerTest.cpp
Log Message:
-----------
[ORC] Merge MaterializationResponsibility notifyEmitted and addDependencies
Removes the MaterializationResponsibility::addDependencies and
addDependenciesForAll methods, and transfers dependency registration to
the notifyEmitted operation. The new dependency registration allows
dependencies to be specified for arbitrary subsets of the
MaterializationResponsibility's symbols (rather than just single symbols
or all symbols) via an array of SymbolDependenceGroups (pairs of symbol
sets and corresponding dependencies for that set).
This patch aims to both improve emission performance and simplify
dependence tracking. By eliminating some states (e.g. symbols having
registered dependencies but not yet being resolved or emitted) we make
some errors impossible by construction, and reduce the number of error
cases that we need to check. NonOwningSymbolStringPtrs are used for
dependence tracking under the session lock, which should reduce
ref-counting operations, and intra-emit dependencies are resolved
outside the session lock, which should provide better performance when
JITing concurrently (since some dependence tracking can happen in
parallel).
The Orc C API is updated to account for this change, with the
LLVMOrcMaterializationResponsibilityNotifyEmitted API being modified and
the LLVMOrcMaterializationResponsibilityAddDependencies and
LLVMOrcMaterializationResponsibilityAddDependenciesForAll operations
being removed.
Commit: 22773e591fc3e585a32f8122eb203e50fcc1e441
https://github.com/llvm/llvm-project/commit/22773e591fc3e585a32f8122eb203e50fcc1e441
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M libc/src/stdio/scanf_core/float_converter.cpp
Log Message:
-----------
[libc] Fix condition ordering in scanf (#80083)
The inf and nan string index bounds checks were after the index was
being used. This patch moves the index usage to the end of the
condition.
Fixes #79988
Commit: a03a6e99647318a86ea398c42e241da43e3c550e
https://github.com/llvm/llvm-project/commit/a03a6e99647318a86ea398c42e241da43e3c550e
Author: Zaara Syeda <95926691+syzaara at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/MCSectionXCOFF.cpp
M llvm/lib/MC/XCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/test/CodeGen/PowerPC/basic-toc-data-local-linkage.ll
A llvm/test/CodeGen/PowerPC/basic-toc-data-private-linkage.ll
A llvm/test/CodeGen/PowerPC/toc-data-common.ll
Log Message:
-----------
[AIX] [XCOFF] Add support for common and local common symbols in the TOC (#79530)
This patch adds support for common and local symbols in the TOC for AIX.
Note that we need to update isVirtualSection so as a common symbol in
TOC will have the symbol type XTY_CM and will be initialized when placed
in the TOC so sections with this type are no longer virtual.
---------
Co-authored-by: Zaara Syeda <syzaara at ca.ibm.com>
Commit: 56e241a07ff7f839d39775dbf05de5153a8e7d9f
https://github.com/llvm/llvm-project/commit/56e241a07ff7f839d39775dbf05de5153a8e7d9f
Author: Artem Dergachev <adergachev at apple.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugSuppression.h
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
M clang/test/Analysis/copypaste/suspicious-clones.cpp
Log Message:
-----------
[analyzer] Unbreak [[clang::suppress]] on checkers without decl-with-issue. (#79398)
There are currently a few checkers that don't fill in the bug report's
"decl-with-issue" field (typically a function in which the bug is
found).
The new attribute `[[clang::suppress]]` uses decl-with-issue to reduce
the size of the suppression source range map so that it didn't need to
do that for the entire translation unit.
I'm already seeing a few problems with this approach so I'll probably
redesign it in some point as it looks like a premature optimization. Not
only checkers shouldn't be required to pass decl-with-issue (consider
clang-tidy checkers that never had such notion), but also it's not
necessarily uniquely determined (consider leak suppressions at
allocation site).
For now I'm adding a simple stop-gap solution that falls back to
building the suppression map for the entire TU whenever decl-with-issue
isn't specified. Which won't happen in the default setup because luckily
all default checkers do provide decl-with-issue.
---------
Co-authored-by: Balazs Benics <benicsbalazs at gmail.com>
Commit: 1d1432356e656fcae7b2a3634a2b349334ba3d80
https://github.com/llvm/llvm-project/commit/1d1432356e656fcae7b2a3634a2b349334ba3d80
Author: Usman Nadeem <mnadeem at quicinc.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve2-rsh.ll
Log Message:
-----------
[AArch64][SVE2] Generate urshr rounding shift rights (#78374)
Add a new node `AArch64ISD::URSHR_I_PRED`.
`srl(add(X, 1 << (ShiftValue - 1)), ShiftValue)` is transformed to
`urshr`, or to `rshrnb` (as before) if the result it truncated.
`uzp1(rshrnb(uunpklo(X),C), rshrnb(uunpkhi(X), C))` is converted to
`urshr(X, C)` (tested by the wide_trunc tests).
Pattern matching code in `canLowerSRLToRoundingShiftForVT` is taken
from prior code in rshrnb. It returns true if the add has NUW or if the
number of bits used in the return value allow us to not care about the
overflow (tested by rshrnb test cases).
Commit: 4eee04585f7ec722e852604d0dd691e143c775ea
https://github.com/llvm/llvm-project/commit/4eee04585f7ec722e852604d0dd691e143c775ea
Author: Konstantin Zhuravlyov <kzhuravl_dev at outlook.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
Log Message:
-----------
AMDGPU/NFC: Add predicate for supporting buffer/flat/global f64 atomics (#80209)
Commit: 0f728a08bd005c132f9c79c4bb7316429a10a5bf
https://github.com/llvm/llvm-project/commit/0f728a08bd005c132f9c79c4bb7316429a10a5bf
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
Log Message:
-----------
[flang][hlfir][NFC] Fix typo
Commit: 5e3ae4c4afc98e30e4264b52e234113b49159c37
https://github.com/llvm/llvm-project/commit/5e3ae4c4afc98e30e4264b52e234113b49159c37
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/boolean-patterns.ll
Log Message:
-----------
[NVPTX] improve Boolean ISel (#80166)
Add TableGen patterns to convert more instructions to boolean
expressions:
- **mul -> and/or**: i1 multiply instructions currently cannot be
selected causing the compiler to crash. See
https://github.com/llvm/llvm-project/issues/57404
- **select -> and/or**: Converting selects to and/or can enable more
optimizations. `InstCombine` cannot do this as aggressively due to
poison semantics.
Commit: ff53d5074256b8d88d9883dd593992a011fb0516
https://github.com/llvm/llvm-project/commit/ff53d5074256b8d88d9883dd593992a011fb0516
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
Log Message:
-----------
[RISCV] Improve legalization of e8 m8 VL>256 shuffles (#79330)
If we can't produce a large enough index vector in i8, we may need to legalize
the shuffle (via scalarization - which in turn gets lowered into stack usage).
This change makes two related changes:
* Deferring legalization until we actually need to generate the vrgather
instruction. With the new recursive structure, this only happens when
doing the fallback for one of the arms.
* Check the actual mask values for something outside of the representable
range.
Both are covered by recently added tests.
Commit: db68e9229b54f1d72c0a4445682718d75e532b5d
https://github.com/llvm/llvm-project/commit/db68e9229b54f1d72c0a4445682718d75e532b5d
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/Watchpoint.h
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/Watchpoint.cpp
Log Message:
-----------
[lldb][NFCI] Remove m_being_created from Breakpoint classes (#79716)
The purpose of m_being_created in these classes was to prevent
broadcasting an event related to these Breakpoints during the creation
of the breakpoint (i.e. in the constructor). In Breakpoint and
Watchpoint, m_being_created had no effect. That is to say, removing it
does not change behavior.
However, BreakpointLocation does still use m_being_created. In the
constructor, SetThreadID is called which does broadcast an event only if
`m_being_created` is false. Instead of having this logic be roundabout,
the constructor instead calls `SetThreadIDInternal`, which actually
changes the thread ID. `SetThreadID` also will call
`SetThreadIDInternal` in addition to broadcasting a changed event.
Commit: f264da432207064f4716f81485399ef127b57fd4
https://github.com/llvm/llvm-project/commit/f264da432207064f4716f81485399ef127b57fd4
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
Log Message:
-----------
[lsr][term-fold] Restrict transform to low cost expansions (#74747)
This is a follow up to an item I noted in my submission comment for
e947f95. I don't have a real world example where this is triggering
unprofitably, but avoiding the transform when we estimate the loop to be
short running from profiling seems quite reasonable. It's also now come
up as a possibility in a regression twice in two days, so I'd like to
get this in to close out the possibility if nothing else.
The original review dropped the threshold for short trip count loops. I
will return to that in a separate review if this lands.
Commit: 7c2e32d6fe386a12750292096271a00d5b7aa82f
https://github.com/llvm/llvm-project/commit/7c2e32d6fe386a12750292096271a00d5b7aa82f
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/test/Driver/hip-toolchain-mllvm.hip
Log Message:
-----------
Partial revert "[HIP] Fix -mllvm option for device lld linker" (#80202)
This partially reverts commit aa964f157f9b50fab3895afbfda6e0915cf6bb4a
because it caused perf regressions in rccl due to drop of -mllvm
-amgpu-kernarg-preload-count=16 from the linker step. Potentially it
could cause similar regressions for other HIP apps using -mllvm options
with -fgpu-rdc.
Fixes: SWDEV-443345
Commit: a5a8cbb110384825b99228891576f799082f200e
https://github.com/llvm/llvm-project/commit/a5a8cbb110384825b99228891576f799082f200e
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/ProgressReportTest.cpp
Log Message:
-----------
Reland "[lldb][progress][NFC] Add unit test for progress reports (#79533)"
This reverts commit 209fe1f3d70d1c4a20bb2687e0d0a94b1bbfa0c6.
The original commit failed to due an assertion failure in the unit test
`ProgressReportTest` that the commit added. The Debugger::Initialize()
function was called more than once which triggered the assertion, so
this commit calls that function under a `std::call_once`.
Commit: 5561beae296bded328d307d625f37805a049cddf
https://github.com/llvm/llvm-project/commit/5561beae296bded328d307d625f37805a049cddf
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
A llvm/test/CodeGen/WebAssembly/disable-feature.ll
Log Message:
-----------
[WebAssembly] avoid to enable explicit disabled feature (#80094)
Commit: 40ebe522ea5fd56cb383e29c77373b1482d49c0f
https://github.com/llvm/llvm-project/commit/40ebe522ea5fd56cb383e29c77373b1482d49c0f
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Core/CMakeLists.txt
R lldb/unittests/Core/ProgressReportTest.cpp
Log Message:
-----------
Revert "Reland "[lldb][progress][NFC] Add unit test for progress reports (#79533)""
This reverts commit a5a8cbb110384825b99228891576f799082f200e.
The test being added by that commit still fails on the assertion that
Debugger::Initialize has been called more than once.
Commit: cf401f72e1b5aa6be0719ab45c95c10ea06bec9a
https://github.com/llvm/llvm-project/commit/cf401f72e1b5aa6be0719ab45c95c10ea06bec9a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
Log Message:
-----------
[RISCV] Use Zacas for AtomicRMWInst::Nand i32 and XLen. (#80119)
We don't have an AMO instruction for Nand, so with the A extension we
use an LR/SC loop. If we have Zacas we can use a CAS loop instead.
According to the Zacas spec, a CAS loop scales to highly parallel
systems better than LR/SC.
Commit: 0e0d155f87b199c137fe7bd506fb443c242f785e
https://github.com/llvm/llvm-project/commit/0e0d155f87b199c137fe7bd506fb443c242f785e
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M libc/docs/stdbit.rst
Log Message:
-----------
[libc][docs] fix stdbit.h docs (#80070)
Fix rst comment, add checks for recently implemented functions+macro.
Commit: 0e8eb445db0cc2552d9d077b527a43c779785cb9
https://github.com/llvm/llvm-project/commit/0e8eb445db0cc2552d9d077b527a43c779785cb9
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M libc/src/unistd/linux/read.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Fix read under msan (#80203)
The read function wasn't properly unpoisoning its result under msan,
causing test failures downstream when I tried to roll it out. This patch
adds the msan unpoison call that fixes the issue.
Commit: 8ba018d72a67050a9c37065ea2668814ebf513a9
https://github.com/llvm/llvm-project/commit/8ba018d72a67050a9c37065ea2668814ebf513a9
Author: Diego Caballero <diegocaballero at google.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir
Log Message:
-----------
[mlir][Vector] Add support for sub-byte transpose emulation (#80110)
This PR adds patterns to convert a sub-byte vector transpose into a
sequence of instructions that perform the transpose on i8 vector
elements. Whereas this rewrite may not lead to the absolute peak
performance, it should ensure correctness when dealing with sub-byte
transposes.
Commit: 730f498c961f29691a605028f9b1cd6d9e232460
https://github.com/llvm/llvm-project/commit/730f498c961f29691a605028f9b1cd6d9e232460
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Improve `truncf` folding (#80206)
* Use APFloat conversion function instead of going through double to
check if fold results in information loss.
* Support folding vector constants.
Commit: f8be7f29ede5369b96056d3879c57de54781c9cf
https://github.com/llvm/llvm-project/commit/f8be7f29ede5369b96056d3879c57de54781c9cf
Author: Yi Kong <yikong at google.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/test/tools/llvm-objcopy/ELF/prefix-symbols.test
Log Message:
-----------
[llvm-objcopy][test] Use llvm-readelf instead for clearer visualization(NFC) (#79874)
Commit: a8279a8bc541b6027087dd497daa63b6602b7f4b
https://github.com/llvm/llvm-project/commit/a8279a8bc541b6027087dd497daa63b6602b7f4b
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/include/clang/Lex/Token.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Sema/SemaDecl.cpp
Log Message:
-----------
[clang][NFC] Move isSimpleTypeSpecifier() from Sema to Token (#80101)
So that it can be used by clang-format.
Commit: 908fd09a13b2e89a52282478544f7f70cf0a887f
https://github.com/llvm/llvm-project/commit/908fd09a13b2e89a52282478544f7f70cf0a887f
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Simplify the AfterPlacementOperator option (#79796)
Change AfterPlacementOperator to a boolean and deprecate SBPO_Never,
which meant never inserting a space except when after new/delete.
Fixes #78892.
Commit: 994493ce05ab7351cd92d30fb1bd23985b292851
https://github.com/llvm/llvm-project/commit/994493ce05ab7351cd92d30fb1bd23985b292851
Author: martinboehme <mboehme at google.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp
Log Message:
-----------
[clang][dataflow][NFC] Rename a confusingly named variable. (#80182)
Commit: 0c361270afff83cd6433cf865ed5a410dadfb33f
https://github.com/llvm/llvm-project/commit/0c361270afff83cd6433cf865ed5a410dadfb33f
Author: martinboehme <mboehme at google.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/HTMLLogger.css
M clang/lib/Analysis/FlowSensitive/HTMLLogger.html
Log Message:
-----------
[clang][dataflow] Display line numbers in the HTML logger timeline. (#80130)
This makes it easier to count how many iterations an analysis takes to
complete.
It also makes it easier to compare how a change to the analysis code
affects
the timeline.
Here's a sample screenshot:
Commit: 147d7a64f8493e78669581097a3ff06c985aa3a1
https://github.com/llvm/llvm-project/commit/147d7a64f8493e78669581097a3ff06c985aa3a1
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
A lldb/include/lldb/Breakpoint/WatchpointAlgorithms.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/concurrent_base.py
M lldb/source/Breakpoint/CMakeLists.txt
M lldb/source/Breakpoint/Watchpoint.cpp
A lldb/source/Breakpoint/WatchpointAlgorithms.cpp
M lldb/source/Breakpoint/WatchpointResource.cpp
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/test/API/functionalities/watchpoint/large-watchpoint/TestLargeWatchpoint.py
A lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/Makefile
A lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/TestUnalignedLargeWatchpoint.py
A lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/main.c
M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp
M lldb/unittests/Breakpoint/CMakeLists.txt
A lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
[lldb] Add support for large watchpoints in lldb (#79962)
This patch is the next piece of work in my Large Watchpoint proposal,
https://discourse.llvm.org/t/rfc-large-watchpoint-support-in-lldb/72116
This patch breaks a user's watchpoint into one or more
WatchpointResources which reflect what the hardware registers can cover.
This means we can watch objects larger than 8 bytes, and we can watched
unaligned address ranges. On a typical 64-bit target with 4 watchpoint
registers you can watch 32 bytes of memory if the start address is
doubleword aligned.
Additionally, if the remote stub implements AArch64 MASK style
watchpoints (e.g. debugserver on Darwin), we can watch any power-of-2
size region of memory up to 2GB, aligned to that same size.
I updated the Watchpoint constructor and CommandObjectWatchpoint to
create a CompilerType of Array<UInt8> when the size of the watched
region is greater than pointer-size and we don't have a variable type to
use. For pointer-size and smaller, we can display the watched granule as
an integer value; for larger-than-pointer-size we will display as an
array of bytes.
I have `watchpoint list` now print the WatchpointResources used to
implement the watchpoint.
I added a WatchpointAlgorithm class which has a top-level static method
that takes an enum flag mask WatchpointHardwareFeature and a user
address and size, and returns a vector of WatchpointResources covering
the request. It does not take into account the number of watchpoint
registers the target has, or the number still available for use. Right
now there is only one algorithm, which monitors power-of-2 regions of
memory. For up to pointer-size, this is what Intel hardware supports.
AArch64 Byte Address Select watchpoints can watch any number of
contiguous bytes in a pointer-size memory granule, that is not currently
supported so if you ask to watch bytes 3-5, the algorithm will watch the
entire doubleword (8 bytes). The newly default "modify" style means we
will silently ignore modifications to bytes outside the watched range.
I've temporarily skipped TestLargeWatchpoint.py for all targets. It was
only run on Darwin when using the in-tree debugserver, which was a proxy
for "debugserver supports MASK watchpoints". I'll be adding the
aforementioned feature flag from the stub and enabling full mask
watchpoints when a debugserver with that feature is enabled, and
re-enable this test.
I added a new TestUnalignedLargeWatchpoint.py which only has one test
but it's a great one, watching a 22-byte range that is unaligned and
requires four 8-byte watchpoints to cover.
I also added a unit test, WatchpointAlgorithmsTests, which has a number
of simple tests against WatchpointAlgorithms::PowerOf2Watchpoints. I
think there's interesting possible different approaches to how we cover
these; I note in the unit test that a user requesting a watch on address
0x12e0 of 120 bytes will be covered by two watchpoints today, a
128-bytes at 0x1280 and at 0x1300. But it could be done with a 16-byte
watchpoint at 0x12e0 and a 128-byte at 0x1300, which would have fewer
false positives/private stops. As we try refining this one, it's helpful
to have a collection of tests to make sure things don't regress.
I tested this on arm64 macOS, (genuine) x86_64 macOS, and AArch64
Ubuntu. I have not modifed the Windows process plugins yet, I might try
that as a standalone patch, I'd be making the change blind, but the
necessary changes (see ProcessGDBRemote::EnableWatchpoint) are pretty
small so it might be obvious enough that I can change it and see what
the Windows CI thinks.
There isn't yet a packet (or a qSupported feature query) for the gdb
remote serial protocol stub to communicate its watchpoint capabilities
to lldb. I'll be doing that in a patch right after this is landed,
having debugserver advertise its capability of AArch64 MASK watchpoints,
and have ProcessGDBRemote add eWatchpointHardwareArmMASK to
WatchpointAlgorithms so we can watch larger than 32-byte requests on
Darwin.
I haven't yet tackled WatchpointResource *sharing* by multiple
Watchpoints. This is all part of the goal, especially when we may be
watching a larger memory range than the user requested, if they then add
another watchpoint next to their first request, it may be covered by the
same WatchpointResource (hardware watchpoint register). Also one "read"
watchpoint and one "write" watchpoint on the same memory granule need to
be handled, making the WatchpointResource cover all requests.
As WatchpointResources aren't shared among multiple Watchpoints yet,
there's no handling of running the conditions/commands/etc on multiple
Watchpoints when their shared WatchpointResource is hit. The goal beyond
"large watchpoint" is to unify (much more) the Watchpoint and Breakpoint
behavior and commands. I have a feeling I may be slowly chipping away at
this for a while.
Re-landing this patch after fixing two undefined behaviors in
WatchpointAlgorithms found by UBSan and by failures on different
CI bots.
rdar://108234227
Commit: 19a10c13e53f4fb7dfecf400bf0ba9f18942e061
https://github.com/llvm/llvm-project/commit/19a10c13e53f4fb7dfecf400bf0ba9f18942e061
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Breakpoint/BUILD.gn
Log Message:
-----------
[gn build] Port 147d7a64f849
Commit: 995d21bc6ff2220b2887cf9640d936eb99b3c617
https://github.com/llvm/llvm-project/commit/995d21bc6ff2220b2887cf9640d936eb99b3c617
Author: wangpc <wangpengcheng.pp at bytedance.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectOptimize.cpp
Log Message:
-----------
[SelectOpt] Print instruction instead of pointer
Pull Request: https://github.com/llvm/llvm-project/pull/80125
Commit: 5a8f290ded52c218510369f3a7ae66bee1cac99f
https://github.com/llvm/llvm-project/commit/5a8f290ded52c218510369f3a7ae66bee1cac99f
Author: Wanyi <kusmour at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
A llvm/test/tools/llvm-gsymutil/X86/elf-dwo.yaml
Log Message:
-----------
[llvm-gsymutil] Print one-time DWO file missing warning under --quiet flag (#79882)
FileCheck test added
```
./bin/llvm-lit -sv llvm/test/tools/llvm-gsymutil/X86/elf-dwo.yaml
```
Manual test steps:
- Create binary with split-dwarf:
```
clang++ -g -gdwarf-4 -gsplit-dwarf main.cpp -o main_split
```
- Remove or remane the dwo file to a different name so llvm-gsymutil can't find it
```
mv main_split-main.dwo main_split-main__.dwo
```
- Now run llvm-gsymutil conversion, it should print out warning with and
without the `--quiet` flag
```
$ ./bin/llvm-gsymutil --convert=./main_split
Input file: ./main_split
Output file (x86_64): ./main_split.gsym
warning: Unable to retrieve DWO .debug_info section for main_split-main.dwo
Loaded 0 functions from DWARF.
Loaded 12 functions from symbol table.
Pruned 0 functions, ended with 12 total
```
```
$ ./bin/llvm-gsymutil --convert=./main_split --quiet
Input file: ./main_split
Output file (x86_64): ./main_split.gsym
warning: Unable to retrieve DWO .debug_info section for some object files. (Remove the --quiet flag for full output)
Pruned 0 functions, ended with 12 total
```
Commit: 3b76b86491d13ced848f2ed6f411754f54befaba
https://github.com/llvm/llvm-project/commit/3b76b86491d13ced848f2ed6f411754f54befaba
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
Add debug prints to diagnose a crash on arm-ubuntu bot
Commit: c82a645ef2421c29b5e0000e981b90dc9a1e1137
https://github.com/llvm/llvm-project/commit/c82a645ef2421c29b5e0000e981b90dc9a1e1137
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/utils/TableGen/X86FoldTablesEmitter.cpp
Log Message:
-----------
[X86][NFC] Simplify the code for memory fold
Commit: 8eea582dcb900afb45866a09296624b6fef9dd20
https://github.com/llvm/llvm-project/commit/8eea582dcb900afb45866a09296624b6fef9dd20
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Driver/Options.td
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Driver/modules-skip-odr-check-in-gmf.cpp
M clang/test/Modules/concept.cppm
M clang/test/Modules/polluted-operator.cppm
M clang/test/Modules/pr76638.cppm
A clang/test/Modules/skip-odr-check-in-gmf.cppm
Log Message:
-----------
[C++20] [Modules] Introduce -fskip-odr-check-in-gmf (#79959)
Close https://github.com/llvm/llvm-project/issues/79240
Cite the comment from @mizvekov in
//github.com/llvm/llvm-project/issues/79240:
> There are two kinds of bugs / issues relevant here:
>
> Clang bugs that this change hides
> Here we can add a Frontend flag that disables the GMF ODR check, just
> so
> we can keep tracking, testing and fixing these issues.
> The Driver would just always pass that flag.
> We could add that flag in this current issue.
> Bugs in user code:
> I don't think it's worth adding a corresponding Driver flag for
> controlling the above Frontend flag, since we intend it's behavior to
> become default as we fix the problems, and users interested in testing
> the more strict behavior can just use the Frontend flag directly.
This patch follows the suggestion:
- Introduce the CC1 flag `-fskip-odr-check-in-gmf` which is by default
off, so that the every existing test will still be tested with checking
ODR violations.
- Passing `-fskip-odr-check-in-gmf` in the driver to keep the behavior
we intended.
- Edit the document to tell the users who are still interested in more
strict checks can use `-Xclang -fno-skip-odr-check-in-gmf` to get the
existing behavior.
Commit: b777bb78b302055eba876a0258ea4b2625ffe71a
https://github.com/llvm/llvm-project/commit/b777bb78b302055eba876a0258ea4b2625ffe71a
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/AvoidCArraysCheck.cpp
M clang-tools-extra/clang-tidy/modernize/AvoidCArraysCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-c-arrays.rst
A clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-ignores-strings.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays.cpp
Log Message:
-----------
[clang-tidy] Add AllowStringArrays option to modernize-avoid-c-arrays (#71701)
Add AllowStringArrays option, enabling the exclusion of array types with
deduced sizes constructed from string literals. This includes only var
declarations of array of characters constructed directly from c-strings.
Closes #59475
Commit: 9b68c095d6b52d6ec0390c653528f65c42e5f570
https://github.com/llvm/llvm-project/commit/9b68c095d6b52d6ec0390c653528f65c42e5f570
Author: Emilia Kond <emilia at rymiel.space>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Allow decltype in requires clause (#78847)
If clang-format is not sure whether a `requires` keyword starts a
requires clause or a requires expression, it looks ahead to see if any
token disqualifies it from being a requires clause. Among these tokens
was `decltype`, since it fell through the switch.
This patch allows decltype to exist in a require clause.
I'm not 100% sure this change won't have repercussions, but that just
means we need more test coverage!
Fixes https://github.com/llvm/llvm-project/issues/78645
Commit: fdd98e506d77514d8cbd5099e8fc98130244f6ff
https://github.com/llvm/llvm-project/commit/fdd98e506d77514d8cbd5099e8fc98130244f6ff
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
Skip 2 of the three test sets to narrow down the arm-ubuntu
CI bot crash when running this unittest. The printfs aren't
printing into the CI log output.
Commit: a8f317aeaccaa052c9c4cfa4660c40554fbbf223
https://github.com/llvm/llvm-project/commit/a8f317aeaccaa052c9c4cfa4660c40554fbbf223
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] complex binary operators aren't always initializing
The added test case would trigger the removed assertion.
Commit: 5d9ffcd7f8e47ab1e15e8f7f23784b639544a7e9
https://github.com/llvm/llvm-project/commit/5d9ffcd7f8e47ab1e15e8f7f23784b639544a7e9
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Build stage2-clang-bolt target for CI container
Only the stage2-distribution target is built by default for the
stage2 distribution installation target. This means that we don't get a
BOLT optimized binary. This patch explicitly builds the
stage2-clang-bolt target before the distribution installation target so
that the clang binary is optimized before it gets installed.
Commit: 6ff431b01e29e99c7dbfcda96bdefdff91dcdf7f
https://github.com/llvm/llvm-project/commit/6ff431b01e29e99c7dbfcda96bdefdff91dcdf7f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/lib/AST/Interp/Context.cpp
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Handle imaginary literals (#79130)
Initialize the first element to 0 and the second element to the value of
the subexpression.
Commit: 1395e582f334f3db354b6e999d86a8662819e890
https://github.com/llvm/llvm-project/commit/1395e582f334f3db354b6e999d86a8662819e890
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrMisc.td
Log Message:
-----------
[X86][CodeGen] Set mayLoad = 1 for LZCNT/POPCNT/TZCNTrm_(EVEX|NF)
Promoted and NF LZCNT/POPCNT/TZCNT were supported in #79954.
B/c null_frag is used in the patterns for these variants, tablgen can
not infer mayLoad = 1 for them.
This can be tested by MCA tests, which will be added after
-mcpu=<cpu_with_apx> is supported.
Commit: 021a2b4ba254eb9e06fece5c18e5596cbb4896e6
https://github.com/llvm/llvm-project/commit/021a2b4ba254eb9e06fece5c18e5596cbb4896e6
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
Uncomment the 2GB max tests and see if that works on arm-ubuntu
Commit: a9e830910bc07733b7a9d4b935cd12a9041623b3
https://github.com/llvm/llvm-project/commit/a9e830910bc07733b7a9d4b935cd12a9041623b3
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
M clang/test/AST/Interp/c.c
M clang/test/Sema/check-increment.c
Log Message:
-----------
[clang][Interp] Protect Inc/Dec ops against dummy pointers
We create them more often in C, so it's more likely to happen there.
Commit: fa98e2861dadaf436b0eb4b38e96a2ccf7c41072
https://github.com/llvm/llvm-project/commit/fa98e2861dadaf436b0eb4b38e96a2ccf7c41072
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.h
Log Message:
-----------
[clang][Interp][NFC] Remove unused RecordScope
Commit: 48f8b74c35991fd3842e135481960449b1e25363
https://github.com/llvm/llvm-project/commit/48f8b74c35991fd3842e135481960449b1e25363
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/test/Sema/c2x-auto.c
M clang/test/Sema/c2x-bool.c
Log Message:
-----------
[clang][Interp] Support GenericSelectionExprs
Just delegate to the resulting expression.
Commit: 54f324f377a92a64fcc5c1d401da9b07bf50a2f1
https://github.com/llvm/llvm-project/commit/54f324f377a92a64fcc5c1d401da9b07bf50a2f1
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
Trying to refine which test is crashing on arm-ubuntu.
Commit: 65066c02770cc3da3b5154fbb7ed9df78ab94b93
https://github.com/llvm/llvm-project/commit/65066c02770cc3da3b5154fbb7ed9df78ab94b93
Author: Hugo Trachino <32955781+nujaa at users.noreply.github.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Dialect/Tensor/Transforms/ConcatOpPatterns.cpp
Log Message:
-----------
[mlir] Use `create` instead of `createOrFold` for ConstantOp as folding has no effect (NFC) (#80129)
This aims to clean-up confusing uses of
builder.createOrFold<ConstantOp> since folding of constants fails.
Commit: 7ec996d4c5c30083b070be4898140440094e6b97
https://github.com/llvm/llvm-project/commit/7ec996d4c5c30083b070be4898140440094e6b97
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/docs/GlobalISel/MIRPatterns.rst
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
A llvm/test/TableGen/GlobalISelCombinerEmitter/Inputs/test-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/builtin-pattern-errors.td
A llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/pattern-errors.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/pattern-parsing.td
M llvm/test/TableGen/lit.local.cfg
M llvm/utils/TableGen/GlobalISel/Patterns.cpp
M llvm/utils/TableGen/GlobalISel/Patterns.h
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
M llvm/utils/TableGen/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/GlobalISelMatchTable.h
Log Message:
-----------
[GlobalISel][TableGen] Support Intrinsics in MIR Patterns (#79278)
Commit: e8512786fedbfa6ddba70ceddc29d7122173ba5e
https://github.com/llvm/llvm-project/commit/e8512786fedbfa6ddba70ceddc29d7122173ba5e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/ProfDataUtils.cpp
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[IR] Use range-based for loops (NFC)
Commit: 39fa304866e16f1408a0cab9437e47e4ebacf206
https://github.com/llvm/llvm-project/commit/39fa304866e16f1408a0cab9437e47e4ebacf206
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/StringRef.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/utils/TableGen/CodeGenInstruction.cpp
Log Message:
-----------
[llvm] Use StringRef::starts_with (NFC)
Commit: b67ce7e34948d4d954d3cfedb29ffc94861ca0b2
https://github.com/llvm/llvm-project/commit/b67ce7e34948d4d954d3cfedb29ffc94861ca0b2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Frontend/FrontendActions.cpp
Log Message:
-----------
[clang] Use StringRef::starts_with (NFC)
Commit: eaa3d5e26665ca85d488e9194b9fbe304db6fa21
https://github.com/llvm/llvm-project/commit/eaa3d5e26665ca85d488e9194b9fbe304db6fa21
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
Done iterating with arm-ubuntu bot, I see the problem test.
Go back to the original form of this file before I add temp
workaround.
Commit: 90e68086d8fdbfb32dfc7e7e3498f44365274ce8
https://github.com/llvm/llvm-project/commit/90e68086d8fdbfb32dfc7e7e3498f44365274ce8
Author: Jason Molenda <jason at molenda.com>
Date: 2024-01-31 (Wed, 31 Jan 2024)
Changed paths:
M lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
Skip two WatchpointAlgorithm tests for 32-bit lldb's
After iterating with the arm-ubuntu CI bot, I found the crash (a
std::bad_alloc exception being thrown) was caused by these two
entries when built on a 32-bit machine. I probably have an assumption
about size_t being 64-bits in WatchpointAlgorithms and we have a
problem when it's actually 32-bits and we're dealing with a real
64-bit address. All of the cases where the address can be represented
in the low 32-bits of the addr_t work correctly, so for now I'm
skipping these two unit tests when building lldb on a 32-bit host
until I can review that method and possibly switch to explicit
uin64_t's.
.
Commit: 5fdf8c6faaa572d6c5e58d5c16d3b1e62782f7c4
https://github.com/llvm/llvm-project/commit/5fdf8c6faaa572d6c5e58d5c16d3b1e62782f7c4
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
Log Message:
-----------
[mlir][Transforms] `GreedyPatternRewriteDriver`: Hash ops separately (#78312)
The greedy pattern rewrite driver has multiple "expensive checks" to
detect invalid rewrite pattern API usage. As part of these checks, it
computes fingerprints for every op that is in scope, and compares the
fingerprints before and after an attempted pattern application.
Until now, each computed fingerprint took into account all nested
operations. That is quite expensive because it walks the entire IR
subtree. It is also redundant in the expensive checks because we already
compute a fingerprint for every op.
This commit significantly improves the running time of the "expensive
checks" in the greedy pattern rewrite driver.
Commit: 84564e1040be8df037d2e9cdbb494aef067e77a7
https://github.com/llvm/llvm-project/commit/84564e1040be8df037d2e9cdbb494aef067e77a7
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M flang/include/flang/Lower/AbstractConverter.h
M flang/lib/Lower/ConvertType.cpp
A flang/test/Lower/derived-types-kind-params-2.f90
Log Message:
-----------
[flang][NFC] Cache derived type translation in lowering (#80179)
Derived type translation is proving expensive in modern fortran apps
with many big derived types with dozens of components and parents.
Extending the cache that prevent recursion is proving to have little
cost on apps with small derived types and significant gain (can divide
compile time by 2) on modern fortran apps.
It is legal since the cache lifetime is less than the MLIRContext
lifetime that owns the cached mlir::Type.
Doing so also exposed that the current caching was incorrect, the type
symbol is the same for kind parametrized derived types regardless of the
kind parameters. Instances with different kinds should lower to
different MLIR types. See added test.
Using the type scopes fixes the problem.
Commit: ae931b470319ade31fcc0797b6051eb8b96f9a8a
https://github.com/llvm/llvm-project/commit/ae931b470319ade31fcc0797b6051eb8b96f9a8a
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/test/Interpreter/cxx20-modules.cppm
Log Message:
-----------
[Clang][test] Limit library search when linking shared lib (#80253)
Don't search for unnecessary libs when linking the shared lib. This
allows the test to run in chroot environment.
Commit: e7d40a87ff230528131541f6ac17a2e1a7dc78e1
https://github.com/llvm/llvm-project/commit/e7d40a87ff230528131541f6ac17a2e1a7dc78e1
Author: Marius Brehler <marius.brehler at iml.fraunhofer.de>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
A mlir/include/mlir/Conversion/FuncToEmitC/FuncToEmitC.h
A mlir/include/mlir/Conversion/FuncToEmitC/FuncToEmitCPass.h
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.h
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/lib/Conversion/CMakeLists.txt
A mlir/lib/Conversion/FuncToEmitC/CMakeLists.txt
A mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
A mlir/lib/Conversion/FuncToEmitC/FuncToEmitCPass.cpp
M mlir/lib/Dialect/EmitC/IR/CMakeLists.txt
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
A mlir/test/Conversion/FuncToEmitC/func-to-emitc.mlir
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
A mlir/test/Target/Cpp/func.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][EmitC] Add func, call and return operations and conversions (#79612)
This adds a `func`, `call` and `return` operation to the EmitC dialect,
closely related to the corresponding operations of the Func dialect. In
contrast to the operations of the Func dialect, the EmitC operations do
not support multiple results. The `emitc.func` op features a
`specifiers` argument that for example allows, with corresponding
support in the emitter, to emit `inline static` functions.
Furthermore, this adds patterns and a pass to convert the Func dialect
to EmitC. A `func.func` op that is `private` is converted to
`emitc.func` with a `"static"` specifier.
Commit: d0dbd50cf0dc85834842380235f445e80516cb59
https://github.com/llvm/llvm-project/commit/d0dbd50cf0dc85834842380235f445e80516cb59
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Add missing header for 7ec996d4c5c30083b070be4898140440094e6b97
Commit: 468b23935a56d2be75c1f86fea97e5620b230a93
https://github.com/llvm/llvm-project/commit/468b23935a56d2be75c1f86fea97e5620b230a93
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Merge TableGenGlobalISel into the tablegen target
These two are intertwined enough so it doesn't really make sense to have
it standalone and hack around it by putting headers into both.
Commit: 395c8175e37248c11ddbffe47294033834b0ec51
https://github.com/llvm/llvm-project/commit/395c8175e37248c11ddbffe47294033834b0ec51
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Put back the pieces of TableGenGlobalISel that unittests depend on
This is a mess and needs to be cleaned up some day.
Commit: 415bf200a725055a3a38e96269f4b752ea6fc330
https://github.com/llvm/llvm-project/commit/415bf200a725055a3a38e96269f4b752ea6fc330
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-exegesis.rst
M llvm/tools/llvm-exegesis/lib/BenchmarkResult.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/lib/ResultAggregator.cpp
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/unittests/tools/llvm-exegesis/Mips/BenchmarkResultTest.cpp
M llvm/unittests/tools/llvm-exegesis/ResultAggregatorTest.cpp
M llvm/unittests/tools/llvm-exegesis/X86/BenchmarkResultTest.cpp
Log Message:
-----------
[llvm-exegesis] Replace --num-repetitions with --min-instructions (#77153)
This patch replaces --num-repetitions with --min-instructions to make it
more clear that the value refers to the minimum number of instructions
in the final assembled snippet rather than the number of repetitions of
the snippet. This patch also refactors some llvm-exegesis internal
variable names to reflect the name change.
Fixes #76890.
Commit: ca7fd25492388003fab4e19d7e95517bdee2d210
https://github.com/llvm/llvm-project/commit/ca7fd25492388003fab4e19d7e95517bdee2d210
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix a typo from e7d40a87ff230528131541f6ac17a2e1a7dc78e1
Commit: e9e01675a31969d5ae7c250caa6efcc8dcdb80bc
https://github.com/llvm/llvm-project/commit/e9e01675a31969d5ae7c250caa6efcc8dcdb80bc
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/test/HLFIR/invalid.fir
M flang/test/Lower/HLFIR/minval.f90
Log Message:
-----------
[flang][HLFIR] Relax verifiers of intrinsic operations (#80132)
The verifiers are currently very strict: requiring intrinsic operations
to be used only in cases where the Fortran standard permits the
intrinsic to be used.
There have now been a lot of cases where these verifiers have caused
bugs in corner cases. In a recent ticket, @jeanPerier pointed out that
it could be useful for future optimizations if somewhat invalid uses of
these operations could be allowed in dead code. See this comment:
https://github.com/llvm/llvm-project/issues/79995#issuecomment-1918118234
In response to all of this, I have decided to relax the intrinsic
operation verifiers. The intention is now to only disallow operation
uses that are likely to crash the compiler. Other checks are still
available under `-strict-intrinsic-verifier`.
The disadvantage of this approach is that IR can now represent intrinsic
invocations which are incorrect. The lowering and implementation of
these intrinsic functions is unlikely to do the right thing in all of
these cases, and as they should mostly be impossible to generate using
normal Fortran code, these edge cases will see very little testing,
before some new optimization causes them to become more common.
Fixes #79995
Commit: 1bbb797e9c7f37aa814b9bbaba2961f730a26891
https://github.com/llvm/llvm-project/commit/1bbb797e9c7f37aa814b9bbaba2961f730a26891
Author: Lucas Duarte Prates <lucas.prates at arm.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/test/Preprocessor/aarch64-target-features.c
Log Message:
-----------
[Clang][AArch64] Add ACLE macros for FEAT_PAuth_LR (#80163)
This updates clang's target defines to include the ACLE changes covering
the FEAT_PAuth_LR architecture extension.
The changes include:
* The new `__ARM_FEATURE_PAUTH_LR` feature macro, which is set to 1 when
FEAT_PAuth_LR is available in the target.
* A new bit field for the existing `__ARM_FEATURE_PAC_DEFAULT` macro,
indicating the use of PC as a diversifier for Pointer Authentication
(from -mbranch-protection=pac-ret+pc).
The approved changes to the ACLE spec can be found here:
https://github.com/ARM-software/acle/pull/292
Commit: f34418c73b718abb24cd5b921b5a2846011e7d0c
https://github.com/llvm/llvm-project/commit/f34418c73b718abb24cd5b921b5a2846011e7d0c
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/IR/DebugInfoMetadata.cpp
Log Message:
-----------
[HWASAN] Remove DW_OP_LLVM_tag_offset from DIExpression::isImplicit (#79816)
According to its doc-comment `isImplicit` is meant to return true if the
expression is an implicit location description (describes an object or part of
an object which has no location by computing the value from available program
state).
There's a brief entry for `DW_OP_LLVM_tag_offset` in the LangRef and there's
some info in the original commit fb9ce100d19be130d004d03088ccd4af295f3435.
>From what I can tell it doesn't look like `DW_OP_LLVM_tag_offset` affects
whether or not the location is implicit; the opcode doesn't get included in the
final location description but instead is added as an attribute to the variable.
This was tripping an assertion in the latest application of the fix to #76545,
#78606, where an expression containing a `DW_OP_LLVM_tag_offset` is split into
a fragment (i.e., describe a part of the whole variable).
Commit: 96a3d05ed923d2abd51acb52984b83b9e8044924
https://github.com/llvm/llvm-project/commit/96a3d05ed923d2abd51acb52984b83b9e8044924
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
[GitHub][workflows] Reflow some text in buildbot info PR comment
When the markdown link renders the line gets a lot shorter.
Commit: b5c0b67bc270936c8fa254dc42d920e867adef54
https://github.com/llvm/llvm-project/commit/b5c0b67bc270936c8fa254dc42d920e867adef54
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
Log Message:
-----------
[AMDGPU] Check wavefrontsize for GFX11 WMMA builtins (#79980)
Commit: da437330beca0411912ca46f2d5ef1e46403acbd
https://github.com/llvm/llvm-project/commit/da437330beca0411912ca46f2d5ef1e46403acbd
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/IndVarSimplify/iv-poison.ll
Log Message:
-----------
[SCEVExp] Keep NUW/NSW if both original inc and isomporphic inc agree. (#79512)
We are replacing with a wider increment. If both OrigInc and
IsomorphicInc are NUW/NSW, then we can preserve them on the wider
increment; the narrower IsomorphicInc would wrap before the wider
OrigInc, so the replacement won't make IsomorphicInc's uses more
poisonous.
PR: https://github.com/llvm/llvm-project/pull/79512
Commit: 7d78ccf7d5a9861839126d5899b443f55236cab9
https://github.com/llvm/llvm-project/commit/7d78ccf7d5a9861839126d5899b443f55236cab9
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/__memory/allocate_at_least.h
M libcxx/include/__memory/allocator_traits.h
M libcxx/include/memory
M libcxx/include/version
M libcxx/modules/std/memory.inc
M libcxx/test/std/language.support/support.limits/support.limits.general/memory.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
R libcxx/test/std/utilities/memory/allocator.traits/allocate_at_least.pass.cpp
A libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate_at_least.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++][memory] P2652R2: Disallow Specialization of `allocator_traits` (#79978)
Implements P2652R2 <https://wg21.link/P2652R2>:
- https://eel.is/c++draft/allocator.requirements.general
- https://eel.is/c++draft/memory.syn
- https://eel.is/c++draft/allocator.traits.general
- https://eel.is/c++draft/allocator.traits.members
- https://eel.is/c++draft/diff.cpp20.concepts
- https://eel.is/c++draft/diff.cpp20.utilities
---------
Co-authored-by: Zingam <zingam at outlook.com>
Commit: ea2984287d91b96f5e2cc0aa66d146d6dbd1d1bb
https://github.com/llvm/llvm-project/commit/ea2984287d91b96f5e2cc0aa66d146d6dbd1d1bb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/test/CodeGen/ARM/popcnt.ll
Log Message:
-----------
[ARM] Add ctpop codegen tests
Commit: c105848fd29d3b46eeb794bb6b10dad04f903b09
https://github.com/llvm/llvm-project/commit/c105848fd29d3b46eeb794bb6b10dad04f903b09
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
A llvm/test/Transforms/IndVarSimplify/pr79861.ll
Log Message:
-----------
[IndVars] Add tests for #79861 (NFC)
Commit: 178719e86043c1e830a7e24de027a84f6f8ea28f
https://github.com/llvm/llvm-project/commit/178719e86043c1e830a7e24de027a84f6f8ea28f
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/calls.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
Log Message:
-----------
[RISCV][NFC] Simplify calls.ll and autogenerate checks for tail-calls.ll
Split out from #78417.
Reviewers: topperc, asb, kito-cheng
Reviewed By: asb
Pull Request: https://github.com/llvm/llvm-project/pull/79248
Commit: d2565bb11308f6cf98d838e828d9bcbe2d51e0e4
https://github.com/llvm/llvm-project/commit/d2565bb11308f6cf98d838e828d9bcbe2d51e0e4
Author: Alexandre Ganea <37383324+aganea at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M openmp/cmake/HandleOpenMPOptions.cmake
Log Message:
-----------
[openmp] On Windows, fix standalone cmake build (#80174)
This fixes: https://github.com/llvm/llvm-project/issues/80117
Commit: f956e7fbf161447b9236f7c4448a9d02d3564261
https://github.com/llvm/llvm-project/commit/f956e7fbf161447b9236f7c4448a9d02d3564261
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
Log Message:
-----------
[AMDGPU] Prefer `s_memtime` for `readcyclecounter` on GFX10 (#80211)
Summary:
The old `s_memtime` instruction was supported until the GFX10
architecture. Although this instruction has a higher latency than the
new shader counter, it's much more usable as a processor clock as it is
a full 64-bit counter. The new shader counter is only a 20-bit counter,
which makes it difficult to use as a standard cycle counter as it will
overflow in a few milliseconds. This patch suggests preferring
`s_memtime` for this instrinsic if it is still available.
Commit: d313614b60ff1194f48e5f0b1bb8d63d2b7eb52d
https://github.com/llvm/llvm-project/commit/d313614b60ff1194f48e5f0b1bb8d63d2b7eb52d
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
M clang/test/Modules/aarch64-sme-keywords.cppm
M llvm/docs/AArch64SME.rst
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-call-remarks.ll
M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
M llvm/test/CodeGen/AArch64/sme-new-za-function.ll
M llvm/test/CodeGen/AArch64/sme-shared-za-interface.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
M llvm/test/Transforms/Inline/AArch64/sme-pstateza-attrs.ll
M llvm/test/Verifier/sme-attributes.ll
M llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (#79166)
Since https://github.com/ARM-software/acle/pull/276 the ACLE
defines attributes to better describe the use of a given SME state.
Previously the attributes merely described the possibility of it being
'shared' or 'preserved', whereas the new attributes have more semantics
and also describe how the data flows through the program.
For ZT0 we already had to add new LLVM IR attributes:
* aarch64_new_zt0
* aarch64_in_zt0
* aarch64_out_zt0
* aarch64_inout_zt0
* aarch64_preserves_zt0
We have now done the same for ZA, such that we add:
* aarch64_new_za (previously `aarch64_pstate_za_new`)
* aarch64_in_za (more specific variation of `aarch64_pstate_za_shared`)
* aarch64_out_za (more specific variation of `aarch64_pstate_za_shared`)
* aarch64_inout_za (more specific variation of
`aarch64_pstate_za_shared`)
* aarch64_preserves_za (previously `aarch64_pstate_za_shared,
aarch64_pstate_za_preserved`)
This explicitly removes 'pstate' from the name, because with SME2 and
the new ACLE attributes there is a difference between "sharing ZA"
(sharing
the ZA matrix register with the caller) and "sharing PSTATE.ZA" (sharing
either the ZA or ZT0 register, both part of PSTATE.ZA with the caller).
Commit: 5d41788f3798da5ea91dc6cac86e3d9eebdee3ce
https://github.com/llvm/llvm-project/commit/5d41788f3798da5ea91dc6cac86e3d9eebdee3ce
Author: David Green <david.green at arm.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedA510.td
M llvm/test/CodeGen/AArch64/select_fmf.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmin-legalization.ll
M llvm/test/tools/llvm-mca/AArch64/Cortex/A510-basic-instructions.s
Log Message:
-----------
[AArch64] Alter latency of FCSEL under Cortex-A510 (#80178)
As per the Cortex-A510 software optimization guide, the latency of a
fcsel should be 3 not 4. It would previously get the latency from
WriteF.
Commit: c3eb2978a60b4e2e0cf9c8a8f9c51b48bd49477a
https://github.com/llvm/llvm-project/commit/c3eb2978a60b4e2e0cf9c8a8f9c51b48bd49477a
Author: Hsiangkai Wang <hsiangkai.wang at arm.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
M mlir/test/Dialect/SCF/parallel-loop-fusion.mlir
Log Message:
-----------
[mlir][scf] Considering defining operators of indices when fusing scf::ParallelOp (#80145)
When checking the load indices of the second loop coincide with the
store indices of the first loop, it only considers the index values are
the same or not. However, there are some cases the index values defined
by other operators. In these cases, it will treat them as different even
the results of defining operators are the same.
We already check if the iteration space is the same in isFusionLegal().
When checking operands of defining operators, we only need to consider
the operands come from the same induction variables. If so, we know the
results of defining operators are the same.
Commit: 112fba974ce42a6e552f7391d20a858a128283a1
https://github.com/llvm/llvm-project/commit/112fba974ce42a6e552f7391d20a858a128283a1
Author: Quentin Dian <dianqk at dianqk.net>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-redundant-zext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-unreachable-blocks.mir
M llvm/test/CodeGen/AArch64/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/AArch64/implicit-def-with-impdef-greedy-assert.mir
M llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir
M llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-unmerge-undef.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf.mir
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-singleuse-vdst.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-intervals.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-ignorable-exec-use.mir
M llvm/test/CodeGen/AMDGPU/opt-exec-masking-pre-ra-update-liveness.mir
M llvm/test/CodeGen/AMDGPU/optimize-compare.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-def-after-use.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-masking-pre-ra.mir
M llvm/test/CodeGen/AMDGPU/ra-inserted-scalar-instructions.mir
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow-postra.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/tail-dup-bundle.mir
M llvm/test/CodeGen/AMDGPU/wqm-terminators.mir
M llvm/test/CodeGen/ARM/cmpxchg.mir
M llvm/test/CodeGen/ARM/machine-outliner-noreturn.mir
M llvm/test/CodeGen/MIR/X86/unreachable-block-print.mir
M llvm/test/CodeGen/Mips/GlobalISel/instruction-select/phi.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/jump_table_and_brjt.mir
M llvm/test/CodeGen/PowerPC/branch_coalescing.mir
M llvm/test/CodeGen/PowerPC/machine-cse-rm-pre.mir
M llvm/test/CodeGen/PowerPC/nofpexcept.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-phi-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-phi-rv64.mir
M llvm/test/CodeGen/RISCV/float-select-verify.ll
M llvm/test/CodeGen/Thumb2/cmpxchg.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/X86/GlobalISel/select-phi.mir
M llvm/test/CodeGen/X86/branchfolding-landingpad-cfg.mir
M llvm/test/CodeGen/X86/coalescer-remat-with-undef-implicit-def-operand.mir
M llvm/test/CodeGen/X86/cse-two-preds.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-remove-back-copies.mir
M llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
Log Message:
-----------
[MIRPrinter] Don't print line break when there is no instructions (NFC) (#80147)
Per #80143, we can remove the extra line break when there is no
instruction.
Commit: 15295d01352c922f1dfe564d801d556cf5fe01b3
https://github.com/llvm/llvm-project/commit/15295d01352c922f1dfe564d801d556cf5fe01b3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Introduce and use computeCommonAlignment function, NFC.
Commit: 2a50921553798d2db52ca6330c89f0f8a5bc2215
https://github.com/llvm/llvm-project/commit/2a50921553798d2db52ca6330c89f0f8a5bc2215
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-char.ll
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-double.ll
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-float.ll
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-int.ll
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
A llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess2.ll
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-short.ll
Log Message:
-----------
[AIX][TLS] Optimize the small local-exec access sequence for non-zero offsets (#71485)
This patch utilizes the -maix-small-local-exec-tls option to produce a
faster,
non-TOC-based access sequence for the local-exec TLS model.
Specifically, for
when the offsets from the TLS variable are non-zero.
In particular, this patch produces either a single:
- addi/la with a displacement off of R13 plus a non-zero offset for when
an address is calculated, or
- load or store off of R13 plus a non-zero offset for when an address is
calculated and used for further
access where R13 is the thread pointer, respectively.
In order to produce a single addi or load/store off of the thread
pointer with a non-zero offset,
this patch also adds the necessary support in the assembly printer when
printing these instructions.
Specifically:
- The non-zero offset is added to the TLS variable address when the
address of the
TLS variable + it's offset is less than 32KB.
- Otherwise, when the address of the TLS variable + its offset is
greater than 32KB, the
non-zero offset (and a multiple of 64KB) is subtracted from the TLS
address.
This handling in the assembly printer is necessary to ensure that the
TLS address + the non-zero offset
is between [-32768, 32768), so that the total displacement can fit
within the addi/load/store instructions.
This patch is meant to be a follow-up to
3f46e5453d9310b15d974e876f6132e3cf50c4b1 (where the
optimization occurs for when the offset is zero).
Commit: 40f6b7d4761657cebd383b102ff3e6e612337f01
https://github.com/llvm/llvm-project/commit/40f6b7d4761657cebd383b102ff3e6e612337f01
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Log Message:
-----------
[PowerPC] Fix -Wunused-variable in PPCAsmPrinter.cpp and PPCISelDAGToDAG.cpp (NFC)
llvm-project/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1648:15:
error: unused variable 'InstDisp' [-Werror,-Wunused-variable]
ptrdiff_t InstDisp = TLSVarAddress + Offset - Delta;
^
llvm-project/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:7624:19:
error: unused variable 'TPReg' [-Werror,-Wunused-variable]
RegisterSDNode *TPReg = dyn_cast<RegisterSDNode>(TPRegNode.getNode());
^
llvm-project/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:7625:23:
error: unused variable 'Subtarget' [-Werror,-Wunused-variable]
const PPCSubtarget &Subtarget =
^
Commit: f7b05e055fa63e1c4b5ae5e391b654b57161a0e4
https://github.com/llvm/llvm-project/commit/f7b05e055fa63e1c4b5ae5e391b654b57161a0e4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
A llvm/test/Transforms/LoopUnroll/runtime-i128.ll
Log Message:
-----------
[LoopUnroll] Add test for #80289 (NFC)
Commit: 62ae7d976f494f3dbd297331b19cd1204750de6f
https://github.com/llvm/llvm-project/commit/62ae7d976f494f3dbd297331b19cd1204750de6f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/test/Transforms/LoopUnroll/runtime-i128.ll
Log Message:
-----------
[LoopUnroll] Fix missing sign extension
For integers larger than 64-bit, this would zero-extend a -1
value, instead of sign-extending it.
Fixes https://github.com/llvm/llvm-project/issues/80289.
Commit: 3c64b24ed35fe6bb4a7a1fe304089e6069fcd14d
https://github.com/llvm/llvm-project/commit/3c64b24ed35fe6bb4a7a1fe304089e6069fcd14d
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
Log Message:
-----------
[BOLT] Add extra staleness logging (#80225)
Report two extra metrics:
- # of stale functions with matching block count,
- # of stale blocks with matching instruction count.
Commit: fcd3752342ebd193d4eef39b9c0730599eca4486
https://github.com/llvm/llvm-project/commit/fcd3752342ebd193d4eef39b9c0730599eca4486
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/test/Driver/rocm-detect.hip
Log Message:
-----------
[HIP] fix HIP detection for /usr (#80190)
Skip checking HIP version file under parent directory for /usr/local
since /usr will be checked after /usr/local.
Fixes: https://github.com/llvm/llvm-project/issues/78344
Commit: 6050cf28846e5be2c162108f1a024d5ff25d5637
https://github.com/llvm/llvm-project/commit/6050cf28846e5be2c162108f1a024d5ff25d5637
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
M mlir/test/Dialect/SCF/parallel-loop-fusion.mlir
Log Message:
-----------
[mlir][scf] Add reductions support to `scf.parallel` fusion (#75955)
Properly handle fusion of loops with reductions:
* Check there are no first loop results users between loops
* Create new loop op with merged reduction init values
* Update `scf.reduce` op to contain reductions from both loops
* Update loops users with new loop results
Commit: 390d66b03b5a5e352b7d696aaed679a2deb25c6c
https://github.com/llvm/llvm-project/commit/390d66b03b5a5e352b7d696aaed679a2deb25c6c
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
Log Message:
-----------
[LSR] Add tests for restricting term-fold budget based on exact trip count
Commit: 6ac4fe8de014336ce66d02ddd07e85db3b8e77a2
https://github.com/llvm/llvm-project/commit/6ac4fe8de014336ce66d02ddd07e85db3b8e77a2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
Log Message:
-----------
[X86] X86FixupVectorConstants.cpp - refactor constant search loop to take array of sorted candidates
Pulled out of #79815 - refactors the internal FixupConstant logic to just accept an array of vzload/broadcast candidates that are pre-sorted in ascending constant pool size
Commit: 9acd61ec1999ac3a54371d0a8b9d922ef5ca2b50
https://github.com/llvm/llvm-project/commit/9acd61ec1999ac3a54371d0a8b9d922ef5ca2b50
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
M clang/test/SemaCXX/datasizeof.cpp
Log Message:
-----------
[Sema] Fix crash in __datasizeof with unknown types (#80300)
Fixes #80284.
Calling `getASTRecordLayout` on invalid types may crash and results of
`__datasizeof` on invalid types can be arbitrary, so just use whatever
`sizeof` returns.
Commit: c5f461918cece4362fb70c7b16de4e95c1af8e5f
https://github.com/llvm/llvm-project/commit/c5f461918cece4362fb70c7b16de4e95c1af8e5f
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/Parser.cpp
M clang/test/CXX/temp/p3.cpp
M clang/test/OpenMP/declare_simd_messages.cpp
Log Message:
-----------
[Clang][Parse] Diagnose member template declarations with multiple declarators (#78243)
According to [temp.pre] p5:
> In a template-declaration, explicit specialization, or explicit instantiation the init-declarator-list in the declaration shall contain at most one declarator.
A member-declaration that is a template-declaration or explicit-specialization contains a declaration, even though it declares a member. This means it _will_ contain an init-declarator-list (not a member-declarator-list), so [temp.pre] p5 applies.
This diagnoses declarations such as:
```
struct A
{
template<typename T>
static const int x = 0, f(); // error: a template declaration can only declare a single entity
template<typename T>
static const int g(), y = 0; // error: a template declaration can only declare a single entity
};
```
The diagnostic messages are the same as those of the equivalent namespace scope declarations.
Note: since we currently do not diagnose declarations with multiple abbreviated function template declarators at namespace scope e.g., `void f(auto), g(auto);`, so this patch does not add diagnostics for the equivalent member declarations.
This patch also refactors `ParseSingleDeclarationAfterTemplate` (now named `ParseDeclarationAfterTemplate`) to call `ParseDeclGroup` and return the resultant `DeclGroup`.
Commit: a52eea66795018550e95c4b060165a7250899298
https://github.com/llvm/llvm-project/commit/a52eea66795018550e95c4b060165a7250899298
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/test/CodeGen/aarch64-targetattr.c
M clang/test/Preprocessor/aarch64-target-features.c
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64] Make +pauth enabled in Armv8.3-a by default (#78027)
Add AEK_PAUTH to ARMV8_3A in TargetParser and let it propagate to
ARMV8R, as it aligns with GCC defaults.
After adding AEK_PAUTH, several tests from TargetParserTest.cpp crashed
when trying to format an error message, thus update a format string in
AssertSameExtensionFlags to account for bitmask being pre-formatted as
std::string.
The CHECK-PAUTH* lines in aarch64-target-features.c are updated to
account for the fact that FEAT_PAUTH support and pac-ret can be enabled
independently and all four combinations are possible.
Commit: bed3608c22fbd3afbdbc782f04e8c9c6e6e8fa18
https://github.com/llvm/llvm-project/commit/bed3608c22fbd3afbdbc782f04e8c9c6e6e8fa18
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT][NFC] Factor out RI::disassemblePLTInstruction (#80302)
Commit: 4eb0810922a8d6ad9a32fbf09326166317dc5c08
https://github.com/llvm/llvm-project/commit/4eb0810922a8d6ad9a32fbf09326166317dc5c08
Author: Emma Pilkington <emma.pilkington95 at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-cov5.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx11.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx12.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx90a.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-objdump][AMDGPU] Pass ELF ABIVersion through disassembler (#78907)
Admittedly, its a bit ugly to pass the ABIVersion through onSymbolStart
but I'm not sure what a better place for it would be.
Commit: 09b4649ea5cefc4f93d9c936d38863df5c6568ed
https://github.com/llvm/llvm-project/commit/09b4649ea5cefc4f93d9c936d38863df5c6568ed
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
M flang/test/Lower/HLFIR/procedure-pointer.f90
Log Message:
-----------
[flang] Fix passing NULL to OPTIONAL procedure pointers (#80267)
Procedure pointer lowering used `prepareUserCallActualArgument` because
it was convenient, but this helper was not meant for POINTERs when
originally written and it did not handled passing NULL to an OPTIONAL
procedure pointer correctly.
The resulting argument should be a disassociated pointer, not an absent
pointer (Fortran 15.5.2.12 point 1.).
Move the logic for procedure pointer argument "cooking" in its own
helper to avoid triggering the logic that created an absent argument in
this case.
Commit: bfdd78233fba4623366bbef5631ff0ebab29c42e
https://github.com/llvm/llvm-project/commit/bfdd78233fba4623366bbef5631ff0ebab29c42e
Author: Kevin Frei <kevinfrei at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/DIContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFVerifier.h
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/test/DebugInfo/X86/skeleton-unit-verify.s
M llvm/test/DebugInfo/dwarfdump-accel.test
M llvm/test/tools/llvm-dwarfdump/X86/verify_attr_file_indexes.yaml
M llvm/test/tools/llvm-dwarfdump/X86/verify_attr_file_indexes_no_files.yaml
M llvm/test/tools/llvm-dwarfdump/X86/verify_file_encoding.yaml
M llvm/test/tools/llvm-dwarfdump/X86/verify_overlapping_cu_ranges.yaml
M llvm/test/tools/llvm-dwarfdump/X86/verify_parent_zero_length.yaml
M llvm/test/tools/llvm-dwarfdump/X86/verify_split_cu.s
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
Log Message:
-----------
Aggregate errors from llvm-dwarfdump --verify (#79648)
The amount and format of output from `llvm-dwarfdump --verify` makes it
quite difficult to know if a change to a tool that produces or modifies
DWARF is causing new problems, or is fixing existing problems. This diff
adds a categorized summary of issues found by the DWARF verifier, on by
default, at the bottom of the error output.
The change includes a new `--error-display` option with 4 settings:
* `--error-display=quiet`: Only display if errors occurred, but no
details or summary are printed.
* `--error-display=summary`: Only display the aggregated summary of
errors with no error detail.
* `--error-display=details`: Only display the detailed error messages
with no summary (previous behavior)
* `--error-display=full`: Display both the detailed error messages and
the aggregated summary of errors (the default)
I changed a handful of tests that were failing due to new output, adding
the flag to use the old behavior for all but a couple. For those two I
added the new aggregated output to the expected output of the test.
The `OutputCategoryAggregator` is a pretty simple little class that
@clayborg suggested to allow code to only be run to dump detail if it's
enabled, while still collating counts of the category. Knowing that the
lambda passed in is only conditionally executed is pretty important
(handling errors has to be done *outside* the lambda). I'm happy to move
this somewhere else (and change/improve it) to be more broadly useful if
folks would like.
---------
Co-authored-by: Kevin Frei <freik at meta.com>
Commit: 4739a97faedf766541245e6a5b48595d4a3deaae
https://github.com/llvm/llvm-project/commit/4739a97faedf766541245e6a5b48595d4a3deaae
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
Log Message:
-----------
[Clang][NFC] Remove TemplateArgumentList::OnStack (#79760)
This patch removes on-stack `TemplateArgumentList`'s. They were primary used
to pass an `ArrayRef<TemplateArgument>` to
`Sema::getTemplateInstantiationArgs`, which had a `const
TemplateArgumentList*` parameter for the innermost template argument
list. Changing this parameter to an
`std::optional<ArrayRef<TemplateArgument>>` eliminates the need for
on-stack `TemplateArgumentList`'s, which in turn eliminates the need for
`TemplateArgumentList` to store a pointer to its template argument
storage (which is redundant in almost all cases, as it is an AST
allocated type).
Commit: 548d132b9457aa5223ee87d2306a7bec30da93d2
https://github.com/llvm/llvm-project/commit/548d132b9457aa5223ee87d2306a7bec30da93d2
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCFlagRules.cmake
M libc/cmake/modules/LLVMLibCLibraryRules.cmake
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
Log Message:
-----------
[libc][NFC] Refactor FLAGS expansion using cmake_language(CALL ...). (#80156)
Commit: 46068f5e8d318c67d0b9088ed751e09473776a0d
https://github.com/llvm/llvm-project/commit/46068f5e8d318c67d0b9088ed751e09473776a0d
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/arith-fp-frem.ll
Log Message:
-----------
[NFC] Reorder test lines in arith-fp-frem.ll (#79991)
Run lines appear in a more natural order:
- no veclib (neon, sve)
- neon + veclib
- sve + veclib
- sve + tailfold + veclib
Commit: 7b9bf80ab51b9b09d9f07fb636f4b64581a3c3e0
https://github.com/llvm/llvm-project/commit/7b9bf80ab51b9b09d9f07fb636f4b64581a3c3e0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-vectorized.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/strided-unsupported-type.ll
Log Message:
-----------
[SLP][NFC]Add tests with strided loads, NFC.
Commit: 7e7f118404cdfbee9eaf7c05ab8ea54a25b52aa4
https://github.com/llvm/llvm-project/commit/7e7f118404cdfbee9eaf7c05ab8ea54a25b52aa4
Author: XDeme <tagawafernando at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Handles Elaborated type specifier for enum in trailing return (#80085)
Fixes llvm/llvm-project#80062
Commit: e0e6236fd61f906f8529dcaa8ecd0beec1f5a18a
https://github.com/llvm/llvm-project/commit/e0e6236fd61f906f8529dcaa8ecd0beec1f5a18a
Author: jeffreytan81 <jeffreytan at meta.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
A lldb/test/API/commands/target/debuginfo/TestDebugInfoSize.py
A lldb/test/API/commands/target/debuginfo/a.out-foo.dwo.yaml
A lldb/test/API/commands/target/debuginfo/a.out-main.dwo.yaml
A lldb/test/API/commands/target/debuginfo/a.out.yaml
Log Message:
-----------
Fix debug info size statistics for split dwarf (#80218)
`statistics dump` command relies on `SymbolFile::GetDebugInfoSize()` to
get total debug info size.
The current implementation is missing debug info for split dwarf
scenarios which requires getting debug info from separate dwo/dwp files.
This patch fixes this issue for split dwarf by parsing debug info from
dwp/dwo.
New yaml tests are added.
---------
Co-authored-by: jeffreytan81 <jeffreytan at fb.com>
Commit: 28699e385681e7f0aeefc208b7b59d6f1d484800
https://github.com/llvm/llvm-project/commit/28699e385681e7f0aeefc208b7b59d6f1d484800
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libc/include/errno.h.def
M libc/src/errno/CMakeLists.txt
M libc/src/errno/libc_errno.cpp
M libc/src/errno/libc_errno.h
M libc/test/integration/startup/linux/tls_test.cpp
M libc/test/src/errno/errno_test.cpp
M libc/test/src/stdlib/StrtolTest.h
M libc/test/src/sys/mman/linux/madvise_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/mmap_test.cpp
M libc/test/src/sys/mman/linux/mprotect_test.cpp
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
M libc/test/src/time/asctime_r_test.cpp
M libc/test/src/time/asctime_test.cpp
Log Message:
-----------
[libc] Update libc_errno to work correctly in both overlay and full build modes. (#80177)
Commit: 1f3c30911cc5eee4b42bdc9c6358c689b2f2f223
https://github.com/llvm/llvm-project/commit/1f3c30911cc5eee4b42bdc9c6358c689b2f2f223
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
Log Message:
-----------
[AMDGPU] Mark PC_ADD_REL_OFFSET rematerializable (#79674)
Currently machine LICM hoist PC_ADD_REL_OFFSET out of loops, causes
register pressure when function calls are deep in loops. This is a main
cause of sgpr spill for programs containing large number of function
calls in loops.
This patch marks PC_ADD_REL_OFFSET as rematerializable, which eliminates
sgpr spills due to function calls in loops.
Commit: 94166c6ea1574372521f54d72522b81cc85cdbb6
https://github.com/llvm/llvm-project/commit/94166c6ea1574372521f54d72522b81cc85cdbb6
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libc/test/integration/startup/linux/tls_test.cpp
Log Message:
-----------
[libc] Fix wrong errno number in tls_test. (#80312)
Commit: 87e04b471e8c52991c4100a270d4b59a84b7c48d
https://github.com/llvm/llvm-project/commit/87e04b471e8c52991c4100a270d4b59a84b7c48d
Author: Matin Raayai <30674652+matinraayai at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.h
Log Message:
-----------
Fix Passing TargetOptions by Value in TargetMachines for AMDGPU (#79866)
`TargetOptions` is currently passed by value in AMDGPU targets, which
makes unnecessary copies. This PR fixes this issue.
Commit: de1ea787ed70ff376a1ff3b4262d0e25e4d135f2
https://github.com/llvm/llvm-project/commit/de1ea787ed70ff376a1ff3b4262d0e25e4d135f2
Author: Mike Rice <michael.p.rice at intel.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/decomposition-openmp.cpp
Log Message:
-----------
[OpenMP] Move unsupported structured bindings diagnostic (#80216)
Move the diagnostic so it fires only when doing an OpenMP capture, not
for non-OpenMP captures. This allows non-OpenMP code to work when using
OpenMP elsewhere, such as the code reported in
https://github.com/llvm/llvm-project/issues/66999.
Commit: ecb5a1b0e236a98f59863793b4cfef1f13ea225c
https://github.com/llvm/llvm-project/commit/ecb5a1b0e236a98f59863793b4cfef1f13ea225c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
R libcxx/include/experimental/__memory
M libcxx/include/module.modulemap.in
Log Message:
-----------
[libc++][NFC] Remove <experimental/__memory> (#80194)
The header is unused now, so we can remove it.
Commit: 6a3fde6d600cccd2ffbede6dd54519036cc4089c
https://github.com/llvm/llvm-project/commit/6a3fde6d600cccd2ffbede6dd54519036cc4089c
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/stdbit.rst
M libc/include/llvm-libc-macros/stdbit-macros.h
M libc/spec/stdc.td
M libc/src/stdbit/CMakeLists.txt
A libc/src/stdbit/stdc_leading_ones_uc.cpp
A libc/src/stdbit/stdc_leading_ones_uc.h
A libc/src/stdbit/stdc_leading_ones_ui.cpp
A libc/src/stdbit/stdc_leading_ones_ui.h
A libc/src/stdbit/stdc_leading_ones_ul.cpp
A libc/src/stdbit/stdc_leading_ones_ul.h
A libc/src/stdbit/stdc_leading_ones_ull.cpp
A libc/src/stdbit/stdc_leading_ones_ull.h
A libc/src/stdbit/stdc_leading_ones_us.cpp
A libc/src/stdbit/stdc_leading_ones_us.h
M libc/test/include/stdbit_test.cpp
M libc/test/src/stdbit/CMakeLists.txt
A libc/test/src/stdbit/stdc_leading_ones_uc_test.cpp
A libc/test/src/stdbit/stdc_leading_ones_ui_test.cpp
A libc/test/src/stdbit/stdc_leading_ones_ul_test.cpp
A libc/test/src/stdbit/stdc_leading_ones_ull_test.cpp
A libc/test/src/stdbit/stdc_leading_ones_us_test.cpp
Log Message:
-----------
[libc] implement stdc_leading_ones (C23) (#80082)
Commit: 10a55caccf4e2d397f94c1455b93d774591be45f
https://github.com/llvm/llvm-project/commit/10a55caccf4e2d397f94c1455b93d774591be45f
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
M clang/test/Sema/inline-asm-validate-riscv.c
M llvm/docs/LangRef.rst
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
R llvm/test/CodeGen/RISCV/inline-asm-S-constraint.ll
A llvm/test/CodeGen/RISCV/inline-asm-s-constraint-error.ll
A llvm/test/CodeGen/RISCV/inline-asm-s-constraint.ll
Log Message:
-----------
[RISCV] Support constraint "s" (#80201)
GCC has supported a generic constraint "s" for a long time (since at
least 1992), which references a symbol or label with an optional
constant offset. "i" is a superset that also supports a constant
integer.
GCC's RISC-V port also supports a machine-specific constraint "S",
which cannot be used with a preemptible symbol. (We don't bother to
check preemptibility.) In PIC code, an external symbol is preemptible by
default, making "S" less useful if you want to create an artificial
reference for linker garbage collection, or define sections to hold
symbol addresses:
```
void fun();
// error: impossible constraint in ‘asm’ for riscv64-linux-gnu-gcc -fpie/-fpic
void foo() { asm(".reloc ., BFD_RELOC_NONE, %0" :: "S"(fun)); }
// good even if -fpie/-fpic
void foo() { asm(".reloc ., BFD_RELOC_NONE, %0" :: "s"(fun)); }
```
This patch adds support for "s". Modify https://reviews.llvm.org/D105254
("S") to handle multi-depth GEPs (https://reviews.llvm.org/D61560).
Commit: f0c8d88e25dbed02605994da227dfa75c1304d4a
https://github.com/llvm/llvm-project/commit/f0c8d88e25dbed02605994da227dfa75c1304d4a
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M lld/MachO/ObjC.cpp
M lld/test/MachO/objc-category-conflicts.s
Log Message:
-----------
[lld-macho] Make ObjC category checker print the source file name of category (#80221)
When printing category conflicts in the ObjC category checker, also
print the source file name of the problematic categories. Currently we
only print the object file name. This change is mostly useful only for
thinLTO builds, where the object file name will be of form
999.arm64.lto.o and thus does not reveal any information about the
original source file.
---------
Co-authored-by: Alex Borcan <alexborcan at meta.com>
Commit: cc0c8e592f8ff58ab821a04b7dcfb71403b4bea6
https://github.com/llvm/llvm-project/commit/cc0c8e592f8ff58ab821a04b7dcfb71403b4bea6
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[OpenMP] Fix build breakage (NFC) (#80313)
Assign `nullptr` to the pointer instead.
Commit: 58b87300ecaac71e237cefec80d3934610f55fbd
https://github.com/llvm/llvm-project/commit/58b87300ecaac71e237cefec80d3934610f55fbd
Author: Marius Brehler <marius.brehler at iml.fraunhofer.de>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/include/mlir/Conversion/SCFToEmitC/SCFToEmitC.h
Log Message:
-----------
[mlir][EmitC] Harmonize include guard (NFC)
Harmonizes the include guard as it is rather uncommon within the MLIR
subproject to append an underscore to include guards.
Commit: ef7f6aca149c88089ec4964e87889f3709321f03
https://github.com/llvm/llvm-project/commit/ef7f6aca149c88089ec4964e87889f3709321f03
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Add some extra checks/reorganize the code to improve compile time, NFC.
Commit: e296cedcd686e24fee75756185669f1bb3b47fdd
https://github.com/llvm/llvm-project/commit/e296cedcd686e24fee75756185669f1bb3b47fdd
Author: Brendan Sweeney <brs at eecs.berkeley.edu>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZalasr.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
A llvm/test/MC/RISCV/rv32zalasr-invalid.s
A llvm/test/MC/RISCV/rv32zalasr-valid.s
A llvm/test/MC/RISCV/rv64zalasr-invalid.s
A llvm/test/MC/RISCV/rv64zalasr-valid.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] MC layer support for the experimental zalasr extension (#79911)
This PR implements experimental support for the RISC-V Atomic
Load-Acquire and Store-Release Extension (Zalasr). It has been approved
to be pursued as a fast track extension
(https://lists.riscv.org/g/tech-unprivileged/topic/arc_architecture_review/101951698),
but has not yet been approved by ARC or ratified. See
https://github.com/mehnadnerd/riscv-zalasr for draft spec.
---------
Co-authored-by: brs <turtwig at utexas.edu>
Co-authored-by: Philip Reames <preames at rivosinc.com>
Commit: 20a9fa3e145999d7cb0d311c832ee6c72fc276fb
https://github.com/llvm/llvm-project/commit/20a9fa3e145999d7cb0d311c832ee6c72fc276fb
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
Log Message:
-----------
[mlir][sparse] add sparsification options to pretty print and debug s… (#80205)
…parse loops.
Commit: 41be5412e2da0235811af24b10eb2dacab03f8b5
https://github.com/llvm/llvm-project/commit/41be5412e2da0235811af24b10eb2dacab03f8b5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/test/MC/RISCV/supervisor-csr-names.s
Log Message:
-----------
[RISCV] Add srmcfg CSR from Ssqosid extension. (#79914)
Based on the spec here
https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0-rc1
Ssqosid extension name will be added in a separate patch.
Commit: 10c2d5ff7c6de8096c8f4c4621612970940f6dd3
https://github.com/llvm/llvm-project/commit/10c2d5ff7c6de8096c8f4c4621612970940f6dd3
Author: Jiahan Xie <88367305+jiahanxie353 at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/add.mir
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/sub.mir
A llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/add.mir
A llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/sub.mir
Log Message:
-----------
[RISCV][GISel] RegBank select and instruction select for vector G_ADD, G_SUB (#74114)
RegisterBank Selection for scalable vector G_ADD and G_SUB by creating
new mappings for different types of vector register banks.
Then implement Instruction Selection for the same operations by choosing
the correct RISC-V vector register class.
Commit: f883365cc7600cf1c29b36343f2f8cdbe3394881
https://github.com/llvm/llvm-project/commit/f883365cc7600cf1c29b36343f2f8cdbe3394881
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libc/test/include/stdbit_test.cpp
Log Message:
-----------
[libc] fix stdbit include test when not all entrypoints are available (#80323)
The intent of the test is to check that: 1. The type generic macros are
defined. 2. Those macros dispatch to the correct underlying function.
The issue is that when new functionality is added to our stdbit.h without
rolling out the new entrypoint to all targets, this test breaks because our
generated stdbit.h will not contain declarations for the underlying function.
In that case, we should just declare the underlying functions first before
including our generated stdbit.h which just contains declarations. A definition
is a declaration, but redeclarations must match, hence the additions of
noexcept and extern "C".
Commit: 116e801a15569386c452085de783ecb9223050ff
https://github.com/llvm/llvm-project/commit/116e801a15569386c452085de783ecb9223050ff
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/X86/phdr-out-of-order.test
Log Message:
-----------
[BOLT] Adjust section sizes based on file offsets (#80226)
When we adjust section sizes while rewriting a binary, we should be
using section offsets and not addresses to determine if section overlap.
NFC for existing binaries.
Commit: a693ae5306d224228acbbc1366dc90432afce434
https://github.com/llvm/llvm-project/commit/a693ae5306d224228acbbc1366dc90432afce434
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/X86/linux-orc.s
Log Message:
-----------
[BOLT] Enable re-writing of Linux kernel binary (#80228)
Write modified Linux kernel binary to disk. The output is not supposed
to be functional at the moment, but it will allow for future patches to
test the output binary.
Commit: a063df20abeee3513d3577dc41bff7e54159efa5
https://github.com/llvm/llvm-project/commit/a063df20abeee3513d3577dc41bff7e54159efa5
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/CMakeLists.txt
Log Message:
-----------
[OpenMP] Fix typo (NFC) (#80332)
Commit: 6f32d6a4f362ad1c7f6328232a68f44a44fc2d2e
https://github.com/llvm/llvm-project/commit/6f32d6a4f362ad1c7f6328232a68f44a44fc2d2e
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/PreferMemberInitializerCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/PreferMemberInitializerCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/prefer-member-initializer.rst
R clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/prefer-member-initializer-modernize-use-default-member-init-assignment.cpp
R clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/prefer-member-initializer-modernize-use-default-member-init.cpp
Log Message:
-----------
[clang-tidy] Remove enforcement of rule C.48 from cppcoreguidelines-prefer-member-init (#80330)
This functionality already exists in
cppcoreguidelines-use-default-member-init. It was deprecated from this
check in clang-tidy 17.
This allows us to fully decouple this check from the corresponding
modernize check, which has an unhealthy dependency.
Fixes https://github.com/llvm/llvm-project/issues/62169
---------
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: 7a7d5481ad5c925d4f31bee3ab66bd1d7d514b73
https://github.com/llvm/llvm-project/commit/7a7d5481ad5c925d4f31bee3ab66bd1d7d514b73
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libc/test/src/stdio/remove_test.cpp
M libc/test/src/sys/stat/mkdirat_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/access_test.cpp
M libc/test/src/unistd/chdir_test.cpp
M libc/test/src/unistd/dup2_test.cpp
M libc/test/src/unistd/dup3_test.cpp
M libc/test/src/unistd/dup_test.cpp
M libc/test/src/unistd/fchdir_test.cpp
M libc/test/src/unistd/ftruncate_test.cpp
M libc/test/src/unistd/isatty_test.cpp
M libc/test/src/unistd/link_test.cpp
M libc/test/src/unistd/linkat_test.cpp
M libc/test/src/unistd/lseek_test.cpp
M libc/test/src/unistd/pread_pwrite_test.cpp
M libc/test/src/unistd/read_write_test.cpp
M libc/test/src/unistd/readlink_test.cpp
M libc/test/src/unistd/readlinkat_test.cpp
M libc/test/src/unistd/rmdir_test.cpp
M libc/test/src/unistd/symlink_test.cpp
M libc/test/src/unistd/symlinkat_test.cpp
M libc/test/src/unistd/truncate_test.cpp
M libc/test/src/unistd/unlink_test.cpp
M libc/test/src/unistd/unlinkat_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/src/unistd/BUILD.bazel
Log Message:
-----------
[libc] add bazel support for most of unistd (#80078)
Much of unistd involves modifying files. The tests for these functions
need to use libc_make_test_file_path which didn't exist when they were
first implemented. This patch adds most of unistd to the bazel along
with the corresponding tests. Tests that modify directories had to be
disabled since bazel doesn't seem to handle them properly.
Commit: aaaff74fd1273d88d990ed5f93a714fc0a8ca4be
https://github.com/llvm/llvm-project/commit/aaaff74fd1273d88d990ed5f93a714fc0a8ca4be
Author: Micah Weston <micahsweston at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
A llvm/test/tools/llvm-readobj/ELF/bb-addr-map-pgo-analysis-map.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[SHT_LLVM_BB_ADDR_MAP][llvm-readobj] Implements llvm-readobj handling for PGOAnalysisMap. (#79520)
Adds raw printing of PGOAnalysisMap in llvm-readobj.
I'm leaving the fixme's for a later patch that will provide a 'pretty'
printing for BBFreq and BrProb (i.e. relative frequencies and
probabilities) that will apply to both llvm-readobj and llvm-objdump.
Commit: 08fccf80949c649e2c4c81bf9149fd77206002c4
https://github.com/llvm/llvm-project/commit/08fccf80949c649e2c4c81bf9149fd77206002c4
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
A llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir
Log Message:
-----------
[AArch64][PAC] Expand blend(reg, imm) operation in aarch64-pauth pass (#74729)
In preparation for implementing code generation for more @llvm.ptrauth.* intrinsics, move the expansion of blend(register, small integer) variant of @llvm.ptrauth.blend to the AArch64PointerAuth pass, where most other PAuth-related code generation takes place.
Commit: fe408eb5845737f8d6bf5eeed0aca8651991e687
https://github.com/llvm/llvm-project/commit/fe408eb5845737f8d6bf5eeed0aca8651991e687
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M flang/lib/Lower/DirectivesCommon.h
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-data-operands.f90
M flang/test/Lower/OpenACC/acc-data.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
M flang/test/Lower/OpenACC/acc-exit-data.f90
M flang/test/Lower/OpenACC/acc-host-data.f90
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-kernels.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-parallel.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenACC/acc-serial.f90
M flang/test/Lower/OpenACC/acc-update.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/target.f90
Log Message:
-----------
[flang][openacc][openmp] Use #0 from hlfir.declare value when generating bound ops (#80317)
`getDataOperandBaseAddr` retrieve the address of a value when we need to
generate bound operations. When switching to HLFIR, we did not really
handle the fact that this value was then pointing to the result of a
hlfir.declare. Because of that the `#1` value was being used. `#0` value
is carrying the correct information about lowerbounds and should be
used. This patch updates the `getDataOperandBaseAddr` function to use
the correct result value from hlfir.declare.
Commit: 243bfed68367263cfc3fb3f396660acf60051fbf
https://github.com/llvm/llvm-project/commit/243bfed68367263cfc3fb3f396660acf60051fbf
Author: Artem Dergachev <adergachev at apple.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/include/clang/Rewrite/Core/HTMLRewrite.h
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
A clang/test/Analysis/html_diagnostics/counter.c
Log Message:
-----------
[analyzer][HTMLRewriter] Cache partial rewrite results. (#80220)
This is a follow-up for 721dd3bc2 [analyzer] NFC: Don't regenerate
duplicate HTML reports.
Because HTMLRewriter re-runs the Lexer for syntax highlighting and macro
expansion purposes, it may get fairly expensive when the rewriter is
invoked multiple times on the same file. In the static analyzer (which
uses HTMLRewriter for HTML output mode) we only get away with this
because there are usually very few reports emitted per file. But if loud
checkers are enabled, such as `webkit.*`, this may explode in complexity
and even cause the compiler to run over the 32-bit SourceLocation
addressing limit.
This patch caches intermediate results so that re-lexing only needed to
happen once.
As the clever __COUNTER__ test demonstrates, "once" is still too many.
Ideally we shouldn't re-lex anything at all, which remains a TODO.
Commit: 8ad14b6d90121d2d0687a3a7f6f6c6f2b34c4aa7
https://github.com/llvm/llvm-project/commit/8ad14b6d90121d2d0687a3a7f6f6c6f2b34c4aa7
Author: Alexey Bataev <5361294+alexey-bataev at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
Log Message:
-----------
[TTI]Add support for strided loads/stores.
Added basic legality check and cost estimation functions for strided loads and stores.
These interfaces will be built upon in https://github.com/llvm/llvm-project/pull/80310.
Reviewers: preames
Reviewed By: preames
Pull Request: https://github.com/llvm/llvm-project/pull/80329
Commit: 59e559067b1e47b72f3c631483c1f71919d5358e
https://github.com/llvm/llvm-project/commit/59e559067b1e47b72f3c631483c1f71919d5358e
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/reduce-max.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-min.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-scalable-fp.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-scalable-int.ll
Log Message:
-----------
Revert "[RISCV] Refine cost on Min/Max reduction" (#80340)
Reverts llvm/llvm-project#79402. Crash reported. On closer inspection,
this patch does not handle Intrinsic::maximum and Intrinsic::minimum.
Commit: edbd93d3706b806e7c91dfd2c359476488dfcc96
https://github.com/llvm/llvm-project/commit/edbd93d3706b806e7c91dfd2c359476488dfcc96
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libc/include/llvm-libc-macros/stdbit-macros.h
M libc/spec/stdc.td
M libc/src/stdbit/stdc_leading_ones_uc.cpp
M libc/src/stdbit/stdc_leading_ones_uc.h
M libc/src/stdbit/stdc_leading_ones_ul.cpp
M libc/src/stdbit/stdc_leading_ones_ul.h
M libc/src/stdbit/stdc_leading_ones_ull.cpp
M libc/src/stdbit/stdc_leading_ones_ull.h
M libc/src/stdbit/stdc_leading_ones_us.cpp
M libc/src/stdbit/stdc_leading_ones_us.h
M libc/src/stdbit/stdc_leading_zeros_uc.cpp
M libc/src/stdbit/stdc_leading_zeros_uc.h
M libc/src/stdbit/stdc_leading_zeros_ul.cpp
M libc/src/stdbit/stdc_leading_zeros_ul.h
M libc/src/stdbit/stdc_leading_zeros_ull.cpp
M libc/src/stdbit/stdc_leading_zeros_ull.h
M libc/src/stdbit/stdc_leading_zeros_us.cpp
M libc/src/stdbit/stdc_leading_zeros_us.h
M libc/test/include/stdbit_test.cpp
M libc/test/src/stdbit/stdc_leading_ones_uc_test.cpp
M libc/test/src/stdbit/stdc_leading_ones_ui_test.cpp
M libc/test/src/stdbit/stdc_leading_ones_ul_test.cpp
M libc/test/src/stdbit/stdc_leading_ones_ull_test.cpp
M libc/test/src/stdbit/stdc_leading_ones_us_test.cpp
M libc/test/src/stdbit/stdc_leading_zeros_uc_test.cpp
M libc/test/src/stdbit/stdc_leading_zeros_ul_test.cpp
M libc/test/src/stdbit/stdc_leading_zeros_ull_test.cpp
M libc/test/src/stdbit/stdc_leading_zeros_us_test.cpp
Log Message:
-----------
[libc][stdbit] fix return types (#80337)
All of the functions I've previously implemented return an unsigned int; not
the parameter type.
Commit: 5cf0fb4317f4f9a5e48d8dc1f861d63b5e0df11c
https://github.com/llvm/llvm-project/commit/5cf0fb4317f4f9a5e48d8dc1f861d63b5e0df11c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/StackSlotColoring.cpp
A llvm/test/CodeGen/RISCV/pr80052.mir
M llvm/test/CodeGen/X86/pr30821.mir
Log Message:
-----------
[StackSlotColoring] Ignore non-spill objects in RemoveDeadStores. (#80242)
The stack slot coloring pass is concerned with optimizing spill
slots. If any change is a pass is made over the function to remove
stack stores that use the same register and stack slot as an
immediately preceding load.
The register check is too simple for constant registers like AArch64
and RISC-V's zero register. This register can be used as the result
of a load if we want to discard the result, but still have the memory
access performed. Like for a volatile or atomic load.
If the code sees a load from the zero register followed by a store
of the zero register at the same stack slot, the pass mistakenly
believes the store isn't needed.
Since the main stack coloring optimization is only concerned with
spill slots, it seems reasonable that RemoveDeadStores should
only be concerned with spills. Since we never generate a reload of
x0, this avoids the issue seen by RISC-V.
Test case concept is adapted from pr30821.mir from X86. That test
had to be updated to mark the stack slot as a spill slot.
Fixes #80052.
Commit: 33b463ad9976fa7a27c1a22419297fcccd79f99f
https://github.com/llvm/llvm-project/commit/33b463ad9976fa7a27c1a22419297fcccd79f99f
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/lib/Dialect/SparseTensor/Transforms/CMakeLists.txt
A mlir/lib/Dialect/SparseTensor/Transforms/SparseAssembler.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
A mlir/test/Dialect/SparseTensor/external.mlir
Log Message:
-----------
[mlir][sparse] external entry method wrapper for sparse tensors (#80326)
Similar to the emit_c_interface, this pull request adds a pass that
converts public entry methods that use sparse tensors as input
parameters and/or output return values into wrapper functions that
[dis]assemble the individual tensors that constitute the actual storage
used externally into MLIR sparse tensors. This pass can be used to
prepare the public entry methods of a program that is compiled by the
MLIR sparsifier to interface with an external runtime, e.g., when
passing sparse tensors as numpy arrays from and to Python. Note that
eventual bufferization decisions (e.g. who [de]allocates the underlying
memory) should be resolved in agreement with the external runtime
(Python, PyTorch, JAX, etc.)
Commit: 5d228eaf0f5d9c873ba12fc439609148f3f88733
https://github.com/llvm/llvm-project/commit/5d228eaf0f5d9c873ba12fc439609148f3f88733
Author: Natalie Chouinard <sudonatalie at google.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
[docs] Add beginner-focused office hours (#80308)
These are initially being hosted by a rotating cast of: @danakj
@gburgessiv @nickdesaulniers @sudonatalie
Commit: 9258f3e692493a69e0f4755bb129a5391ef10b50
https://github.com/llvm/llvm-project/commit/9258f3e692493a69e0f4755bb129a5391ef10b50
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfo.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
M lldb/test/Shell/SymbolFile/DWARF/x86/dwp-separate-debug-file.cpp
Log Message:
-----------
[lldb] Fix a crash when using .dwp files and make type lookup reliable with the index cache (#79544)
When using split DWARF with .dwp files we had an issue where sometimes
the DWO file within the .dwp file would be parsed _before_ the skeleton
compile unit. The DWO file expects to be able to always be able to get a
link back to the skeleton compile unit. Prior to this fix, the only time
the skeleton compile unit backlink would get set, was if the unit
headers for the main executable have been parsed _and_ if the unit DIE
was parsed in that DWARFUnit. This patch ensures that we can always get
the skeleton compile unit for a DWO file by adding a function:
```
DWARFCompileUnit *DWARFUnit::GetSkeletonUnit();
```
Prior to this fix DWARFUnit had some unsafe accessors that were used to
store two different things:
```
void *DWARFUnit::GetUserData() const;
void DWARFUnit::SetUserData(void *d);
```
This was used by SymbolFileDWARF to cache the `lldb_private::CompileUnit
*` for a SymbolFileDWARF and was also used to store the `DWARFUnit *`
for SymbolFileDWARFDwo. This patch clears up this unsafe usage by adding
two separate accessors and ivars for this:
```
lldb_private::CompileUnit *DWARFUnit::GetLLDBCompUnit() const { return m_lldb_cu; }
void DWARFUnit::SetLLDBCompUnit(lldb_private::CompileUnit *cu) { m_lldb_cu = cu; }
DWARFCompileUnit *DWARFUnit::GetSkeletonUnit();
void DWARFUnit::SetSkeletonUnit(DWARFUnit *skeleton_unit);
```
This will stop anyone from calling `void *DWARFUnit::GetUserData()
const;` and casting the value to an incorrect value.
A crash could occur in `SymbolFileDWARF::GetCompUnitForDWARFCompUnit()`
when the `non_dwo_cu`, which is a backlink to the skeleton compile unit,
was not set and was NULL. There is an assert() in the code, and then the
code just will kill the program if the assert isn't enabled because the
code looked like:
```
if (dwarf_cu.IsDWOUnit()) {
DWARFCompileUnit *non_dwo_cu =
static_cast<DWARFCompileUnit *>(dwarf_cu.GetUserData());
assert(non_dwo_cu);
return non_dwo_cu->GetSymbolFileDWARF().GetCompUnitForDWARFCompUnit(
*non_dwo_cu);
}
```
This is now fixed by calling the `DWARFUnit::GetSkeletonUnit()` which
will correctly always get the skeleton compile uint for a DWO file
regardless of if the skeleton unit headers have been parse or if the
skeleton unit DIE wasn't parsed yet.
To implement the ability to get the skeleton compile units, I added code
the DWARFDebugInfo.cpp/.h that make a map of DWO ID -> skeleton
DWARFUnit * that gets filled in for DWARF5 when the unit headers are
parsed. The `DWARFUnit::GetSkeletonUnit()` will end up parsing the unit
headers of the main executable to fill in this map if it already hasn't
been done. For DWARF4 and earlier we maintain a separate map that gets
filled in only for any DWARF4 compile units that have a DW_AT_dwo_id or
DW_AT_gnu_dwo_id attributes. This is more expensive, so this is done
lazily and in a thread safe manor. This allows us to be as efficient as
possible when using DWARF5 and also be backward compatible with DWARF4 +
split DWARF.
There was also an issue that stopped type lookups from succeeding in
`DWARFDIE SymbolFileDWARF::GetDIE(const DIERef &die_ref)` where it
directly was accessing the `m_dwp_symfile` ivar without calling the
accessor function that could end up needing to locate and load the .dwp
file. This was fixed by calling the
`SymbolFileDWARF::GetDwpSymbolFile()` accessor to ensure we always get a
valid value back if we can find the .dwp file. Prior to this fix it was
down which APIs were called and if any APIs were called that loaded the
.dwp file, it worked fine, but it might not if no APIs were called that
did cause it to get loaded.
When we have valid debug info indexes and when the lldb index cache was
enabled, this would cause this issue to show up more often.
I modified an existing test case to test that all of this works
correctly and doesn't crash.
Commit: 1bc7be6bce861acfe477f0c9abd349c1dc6ea160
https://github.com/llvm/llvm-project/commit/1bc7be6bce861acfe477f0c9abd349c1dc6ea160
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
Log Message:
-----------
[RISCV] Add cost model coverage for vp.strided.load and vp.strided.store
Commit: 391393179a6e316909add3b8455eb6d7c7c38ddb
https://github.com/llvm/llvm-project/commit/391393179a6e316909add3b8455eb6d7c7c38ddb
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/Arch/ARM64Common.h
M lld/MachO/Arch/ARM64_32.cpp
M lld/MachO/Arch/X86_64.cpp
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/MachO/Target.h
M lld/MachO/Writer.cpp
M lld/test/MachO/objc-selrefs.s
M lld/test/MachO/x86-64-objc-stubs.s
Log Message:
-----------
[lld-macho] icf objc stubs (#79730)
This supports icf for objc stubs.
Commit: ecdbffe59e80666c9cadf3f80bd20bb34828fb47
https://github.com/llvm/llvm-project/commit/ecdbffe59e80666c9cadf3f80bd20bb34828fb47
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M libc/src/sys/epoll/linux/epoll_wait.cpp
Log Message:
-----------
[libc] Support epoll_wait using epoll_pwait (#80224)
The epoll_wait syscall is equivalent to calling epoll_pwait with a null
sigset. This is useful to support systems that have epoll_pwait but not
epoll_wait.
Commit: bfc6eaa26326e4d0d20d1f4a1f0064c6df0135bd
https://github.com/llvm/llvm-project/commit/bfc6eaa26326e4d0d20d1f4a1f0064c6df0135bd
Author: Hana Dusíková <hanicka at hanicka.net>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/test/CoverageMapping/if.cpp
Log Message:
-----------
[coverage] fix crash in code coverage and `if constexpr` with `ExprWithCleanups` (#80292)
Fixes https://github.com/llvm/llvm-project/issues/80285
Commit: 375bd2201ce0d2c76cb47a02c87b8ca5ba8a3509
https://github.com/llvm/llvm-project/commit/375bd2201ce0d2c76cb47a02c87b8ca5ba8a3509
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
Log Message:
-----------
[RISCV] Add aligned/unaligned tests for vp.strided.load and vp.strided.store
Commit: 07bf1ddb4eb0abfff20542fd4459bace1f72107f
https://github.com/llvm/llvm-project/commit/07bf1ddb4eb0abfff20542fd4459bace1f72107f
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
M mlir/test/Dialect/SparseTensor/sparse_reinterpret_map.mlir
Log Message:
-----------
[mlir][sparse] support non-id map for [Dis]assembleOp (#80355)
Commit: 4eac14683855e040adaf507ed6b14e28a09f983e
https://github.com/llvm/llvm-project/commit/4eac14683855e040adaf507ed6b14e28a09f983e
Author: Greg Clayton <clayborg at gmail.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp
Log Message:
-----------
Fix buildbots after #79544
https://github.com/llvm/llvm-project/pull/79544
Commit: 4a653b4df5d84c4d2df8f6d4040ef46413ac3816
https://github.com/llvm/llvm-project/commit/4a653b4df5d84c4d2df8f6d4040ef46413ac3816
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenEnv.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenEnv.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.h
M mlir/test/Dialect/SparseTensor/sparse_conv_2d_slice_based.mlir
Log Message:
-----------
[mlir][sparse] Support pretty print to debug sparse iteration. (#80207)
Commit: 8fd0bce43c4c8334bcb31d214a32260914f59515
https://github.com/llvm/llvm-project/commit/8fd0bce43c4c8334bcb31d214a32260914f59515
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
Log Message:
-----------
[mlir][spirv][memref] Calculate alignment for `PhysicalStorageBuffer`s (#80243)
The SPIR-V spec requires that memory accesses to
`PhysicalStorageBuffer`s are annotated with appropriate alignment
attributes [1]. Calculate these based on memref alignment attributes or
scalar type sizes.
[1] Otherwise spirv-val complains:
```
[VULKAN] ! Validation Error: [ VUID-VkShaderModuleCreateInfo-pCode-01379 ] | MessageID = 0x2a1bf17f | SPIR-V module not valid: [VUID-StandaloneSpirv-PhysicalStorageBuffer64-04708] Memory accesses with PhysicalStorageBuffer must use Aligned.
%48 = OpLoad %float %47
```
Commit: 4d89356fef1a568de790ad8b3f53dc494b461e5b
https://github.com/llvm/llvm-project/commit/4d89356fef1a568de790ad8b3f53dc494b461e5b
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/sys/epoll/BUILD.bazel
Log Message:
-----------
[libc][bazel] disable epoll_pwait2 (#80362)
Similar to #80051. The epoll_pwait2 syscall isn't available on all
target platforms, and this is causing downstream test failures. This
patch disables it until it can be detected whether or not it is
available.
Commit: ff3194037071e7f5fe859ad2173a5b67eed08b3b
https://github.com/llvm/llvm-project/commit/ff3194037071e7f5fe859ad2173a5b67eed08b3b
Author: Nico Weber <thakis at chromium.org>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn] port ecb5a1b0e236
Commit: 59eadcd28f787a98a2fd5f057beb3df7950654ee
https://github.com/llvm/llvm-project/commit/59eadcd28f787a98a2fd5f057beb3df7950654ee
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M mlir/test/python/dialects/memref.py
Log Message:
-----------
[mlir][py] Reduce size of allocation memrefs in test.
Commit: cc0d752f345f0e8995bec8807e3f365f38864fb6
https://github.com/llvm/llvm-project/commit/cc0d752f345f0e8995bec8807e3f365f38864fb6
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Add git to actions container image (#80341)
Commit: 70eab122bceb94b15218c86db7045ff2448ea979
https://github.com/llvm/llvm-project/commit/70eab122bceb94b15218c86db7045ff2448ea979
Author: Yuta Mukai <mukai.yuta at fujitsu.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
A llvm/test/CodeGen/AArch64/sms-acceptable-loop1.mir
A llvm/test/CodeGen/AArch64/sms-acceptable-loop2.mir
A llvm/test/CodeGen/AArch64/sms-acceptable-loop3.mir
A llvm/test/CodeGen/AArch64/sms-acceptable-loop4.mir
A llvm/test/CodeGen/AArch64/sms-unacceptable-loop1.mir
A llvm/test/CodeGen/AArch64/sms-unacceptable-loop2.mir
A llvm/test/CodeGen/AArch64/sms-unpipeline-insts1.mir
A llvm/test/CodeGen/AArch64/sms-unpipeline-insts2.mir
Log Message:
-----------
[AArch64][MachinePipeliner] Add pipeliner support for AArch64 (#79589)
Add AArch64 implementations for the interfaces of MachinePipeliner pass.
The pass is disabled by default for AArch64. It is enabled by specifying
--aarch64-enable-pipeliner.
5 tests in llvm-test-suites show performance improvement by more than 5%
on a Neoverse V1 processor.
| test | improvement |
| ---------------------------------------------------------------- |
-----------:|
| MultiSource/Benchmarks/TSVC/Recurrences-dbl/Recurrences-dbl.test | 16%
|
| MultiSource/Benchmarks/TSVC/Recurrences-dbl/Recurrences-flt.test | 16%
|
| SingleSource/Benchmarks/Adobe-C++/loop_unroll.test | 14% |
| SingleSource/Benchmarks/Misc/flops-5.test | 13% |
| SingleSource/Benchmarks/BenchmarkGame/spectral-norm.test | 6% |
(base flags: -mcpu=neoverse-v1 -O3 -mrecip, flags for pipelining: -mllvm
-aarch64-enable-pipeliner -mllvm
-pipeliner-max-stages=100 -mllvm -pipeliner-max-mii=100 -mllvm
-pipeliner-enable-copytophi=0)
On the other hand, there are cases of significant performance
degradation. Algorithm improvements and adding the option/pragma will be
needed in the future.
Commit: acec6419e811a46050b0603dfa72fc6a169aa0f7
https://github.com/llvm/llvm-project/commit/acec6419e811a46050b0603dfa72fc6a169aa0f7
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/basic-block-address-map.c
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/Options.td
A lld/test/ELF/lto/basic-block-address-map.ll
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/Object/ELFTypes.h
M llvm/include/llvm/ObjectYAML/ELFYAML.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Object/ELF.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
A llvm/test/CodeGen/X86/basic-block-address-map-function-sections.ll
A llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll
A llvm/test/CodeGen/X86/basic-block-address-map-with-mfs.ll
A llvm/test/CodeGen/X86/basic-block-address-map.ll
R llvm/test/CodeGen/X86/basic-block-sections-labels-functions-sections.ll
R llvm/test/CodeGen/X86/basic-block-sections-labels.ll
M llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-disassemble-symbolize-operands.yaml
M llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-symbolize-relocatable.yaml
M llvm/test/tools/llvm-objdump/X86/elf-pgoanalysismap.yaml
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map-pgo-analysis-map.test
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map-relocatable.test
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map.test
M llvm/test/tools/obj2yaml/ELF/bb-addr-map.yaml
M llvm/test/tools/yaml2obj/ELF/bb-addr-map.yaml
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/obj2yaml/elf2yaml.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/Object/ELFTypesTest.cpp
Log Message:
-----------
[SHT_LLVM_BB_ADDR_MAP] Allow basic-block-sections and labels be used together by decoupling the handling of the two features. (#74128)
Today `-split-machine-functions` and `-fbasic-block-sections={all,list}`
cannot be combined with `-basic-block-sections=labels` (the labels
option will be ignored).
The inconsistency comes from the way basic block address map -- the
underlying mechanism for basic block labels -- encodes basic block
addresses
(https://lists.llvm.org/pipermail/llvm-dev/2020-July/143512.html).
Specifically, basic block offsets are computed relative to the function
begin symbol. This relies on functions being contiguous which is not the
case for MFS and basic block section binaries. This means Propeller
cannot use binary profiles collected from these binaries, which limits
the applicability of Propeller for iterative optimization.
To make the `SHT_LLVM_BB_ADDR_MAP` feature work with basic block section
binaries, we propose modifying the encoding of this section as follows.
First let us review the current encoding which emits the address of each
function and its number of basic blocks, followed by basic block entries
for each basic block.
| | |
|--|--|
| Address of the function | Function Address |
| Number of basic blocks in this function | NumBlocks |
| BB entry 1
| BB entry 2
| ...
| BB entry #NumBlocks
To make this work for basic block sections, we treat each basic block
section similar to a function, except that basic block sections of the
same function must be encapsulated in the same structure so we can map
all of them to their single function.
We modify the encoding to first emit the number of basic block sections
(BB ranges) in the function. Then we emit the address map of each basic
block section section as before: the base address of the section, its
number of blocks, and BB entries for its basic block. The first section
in the BB address map is always the function entry section.
| | |
|--|--|
| Number of sections for this function | NumBBRanges |
| Section 1 begin address | BaseAddress[1] |
| Number of basic blocks in section 1 | NumBlocks[1] |
| BB entries for Section 1
|..................|
| Section #NumBBRanges begin address | BaseAddress[NumBBRanges] |
| Number of basic blocks in section #NumBBRanges |
NumBlocks[NumBBRanges] |
| BB entries for Section #NumBBRanges
The encoding of basic block entries remains as before with the minor
change that each basic block offset is now computed relative to the
begin symbol of its containing BB section.
This patch adds a new boolean codegen option `-basic-block-address-map`.
Correspondingly, the front-end flag `-fbasic-block-address-map` and LLD
flag `--lto-basic-block-address-map` are introduced.
Analogously, we add a new TargetOption field `BBAddrMap`. This means BB
address maps are either generated for all functions in the compiling
unit, or for none (depending on `TargetOptions::BBAddrMap`).
This patch keeps the functionality of the old
`-fbasic-block-sections=labels` option but does not remove it. A
subsequent patch will remove the obsolete option.
We refactor the `BasicBlockSections` pass by separating the BB address
map and BB sections handing to their own functions (named
`handleBBAddrMap` and `handleBBSections`). `handleBBSections` renumbers
basic blocks and places them in their assigned sections.
`handleBBAddrMap` is invoked after `handleBBSections` (if requested) and
only renumbers the blocks.
- New tests added:
- Two tests basic-block-address-map-with-basic-block-sections.ll and
basic-block-address-map-with-mfs.ll to exercise the combination of
`-basic-block-address-map` with `-basic-block-sections=list` and
'-split-machine-functions`.
- A driver sanity test for the `-fbasic-block-address-map` option
(basic-block-address-map.c).
- An LLD test for testing the `--lto-basic-block-address-map` option.
This reuses the LLVM IR from `lld/test/ELF/lto/basic-block-sections.ll`.
- Renamed and modified the two existing codegen tests for basic block
address map (`basic-block-sections-labels-functions-sections.ll` and
`basic-block-sections-labels.ll`)
- Removed `SHT_LLVM_BB_ADDR_MAP_V0` tests. Full deprecation of
`SHT_LLVM_BB_ADDR_MAP_V0` and `SHT_LLVM_BB_ADDR_MAP` version less than 2
will happen in a separate PR in a few months.
Commit: 3ff7caea330def5f8433e3eb2b89ae3fe5e9f9a0
https://github.com/llvm/llvm-project/commit/3ff7caea330def5f8433e3eb2b89ae3fe5e9f9a0
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/ARC/ARCInstrInfo.cpp
M llvm/lib/Target/ARC/ARCInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.h
M llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
M llvm/lib/Target/CSKY/CSKYInstrInfo.h
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.h
M llvm/lib/Target/Mips/Mips16InstrInfo.cpp
M llvm/lib/Target/Mips/Mips16InstrInfo.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSEInstrInfo.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/VE/VEInstrInfo.cpp
M llvm/lib/Target/VE/VEInstrInfo.h
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/XCore/XCoreInstrInfo.cpp
M llvm/lib/Target/XCore/XCoreInstrInfo.h
Log Message:
-----------
[TTI] Use Register in isLoadFromStackSlot and isStoreToStackSlot [nfc] (#80339)
Commit: 58c494f47cf56a30bf50024d22661c75003db809
https://github.com/llvm/llvm-project/commit/58c494f47cf56a30bf50024d22661c75003db809
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add -march support for many of the S extensions mentioned in the profile specification. (#79399)
This is a good portion of the extensions mentioned in the RVA23 profile
here
https://github.com/riscv/riscv-profiles/blob/main/rva23-profile.adoc
I don't believe these add any new CSRs. Sstc does add new CSRs, but we
already added them without the extension name a while back.
I tried to keep the descriptions in RISCVFeatures.td fairly short since
the strings show up in `-print-supported-extensions`.
Commit: 082fe9a5ddfab22f4f07d2332d2d2ec96a5be3ae
https://github.com/llvm/llvm-project/commit/082fe9a5ddfab22f4f07d2332d2d2ec96a5be3ae
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
Log Message:
-----------
[BOLT] Remove duplicate expression (#80380)
Reported by cpp check static analyzer in #80111.
Fixes #80111.
Commit: e270ec47cda26a8f0a3cdd195aa60992f109df8a
https://github.com/llvm/llvm-project/commit/e270ec47cda26a8f0a3cdd195aa60992f109df8a
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
[X86] X86InstrInfo.cpp - Remove dead code for memory folding, NFCI
`commuteInstruction(MI, false, OpNum, CommuteOpIdx2)` should never create
any new instruction, so we don't need to check and erase it.
Commit: 7dd790db8b77c4a833c06632e903dc4f13877a64
https://github.com/llvm/llvm-project/commit/7dd790db8b77c4a833c06632e903dc4f13877a64
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/WatchpointAlgorithms.h
M lldb/source/Breakpoint/WatchpointResource.cpp
M lldb/test/API/functionalities/watchpoint/unaligned-large-watchpoint/TestUnalignedLargeWatchpoint.py
M lldb/unittests/Breakpoint/WatchpointAlgorithmsTests.cpp
Log Message:
-----------
[lldb] NFC fixes addressing David's feedback
David Spickett had several suggestions for
https://github.com/llvm/llvm-project/pull/79962 after I'd
already merged it. Address those.
Commit: dee8786f70a3d62b639113343fa36ef55bdbad63
https://github.com/llvm/llvm-project/commit/dee8786f70a3d62b639113343fa36ef55bdbad63
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-01 (Thu, 01 Feb 2024)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/linkerscript/insert-before.test
Log Message:
-----------
[ELF] Fix compareSections assertion failure when OutputDescs in sectionCommands are non-contiguous
In a `--defsym y0=0 -T a.lds` link where a.lds contains only INSERT
commands, the `script->sectionCommands` layout may be:
```
orphan sections
SymbolAssignment due to --defsym
sections created by INSERT commands
```
The `OutputDesc` objects are not contiguous in sortInputSections, and
`compareSections` will be called with a SymbolAssignment argument,
leading to an assertion failure.
Commit: 374a600df7207fbe2002e754a799c7595a0e4833
https://github.com/llvm/llvm-project/commit/374a600df7207fbe2002e754a799c7595a0e4833
Author: Yuta Mukai <mukai.yuta at fujitsu.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/sms-acceptable-loop1.mir
M llvm/test/CodeGen/AArch64/sms-acceptable-loop2.mir
M llvm/test/CodeGen/AArch64/sms-acceptable-loop3.mir
M llvm/test/CodeGen/AArch64/sms-acceptable-loop4.mir
M llvm/test/CodeGen/AArch64/sms-unacceptable-loop1.mir
M llvm/test/CodeGen/AArch64/sms-unacceptable-loop2.mir
M llvm/test/CodeGen/AArch64/sms-unpipeline-insts1.mir
M llvm/test/CodeGen/AArch64/sms-unpipeline-insts2.mir
Log Message:
-----------
[MachinePipeliner] Fix missing requirements for tests (#80386)
Add asserts requirements for tests that verify debug output.
Commit: 2147a2a4f3ef344a561677b55444ce4d028ec59f
https://github.com/llvm/llvm-project/commit/2147a2a4f3ef344a561677b55444ce4d028ec59f
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/Sema/PR2919-builtin-types-compat-strips-crv.c
M clang/test/Sema/auto-type.c
Log Message:
-----------
[clang][Interp] Not all TypeTraitExprs are of bool type
In C, they return an integer, so emit their value as such.
Commit: 58ceefe09cd992c3692bb3af7c2807ac8949ba67
https://github.com/llvm/llvm-project/commit/58ceefe09cd992c3692bb3af7c2807ac8949ba67
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/test/AST/Interp/c.c
Log Message:
-----------
[clang][Interp] Support ChooseExprs
Commit: a2da7d06c7e1ec75812ff8ced29541d4af3668c9
https://github.com/llvm/llvm-project/commit/a2da7d06c7e1ec75812ff8ced29541d4af3668c9
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/c.c
Log Message:
-----------
[clang][Interp] Ignore LValueToRValue casts before doing the load
If the SubExpr results in an invalid pointer, we will otherwise
reject the constant expression.
Commit: 65ac8c16e028b23b49fd6b03817faa1ab6c0229d
https://github.com/llvm/llvm-project/commit/65ac8c16e028b23b49fd6b03817faa1ab6c0229d
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
A mlir/test/Target/LLVMIR/llvmir-le-specific.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir] Skip invalid test on big endian platform (s390x) (#80246)
The buildbot test running on s390x platform keeps failing since [this
time](https://lab.llvm.org/buildbot/#/builders/199/builds/31136). This
is because of the dependency on the endianness of the platform. It
expects the format invalid in the big endian platform (s390x). We can
simply skip it.
See: https://discourse.llvm.org/t/mlir-s390x-linux-failure/76695
Commit: a8b5994b337cf1d461202a65204a4ee6c5eae341
https://github.com/llvm/llvm-project/commit/a8b5994b337cf1d461202a65204a4ee6c5eae341
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/test/AST/Interp/c.c
Log Message:
-----------
[clang][Interp][NFC] Add a broken test case
The LHS of the subtraction returns 16 right now, but should
return 0.
Commit: d9c20e437fe110fb79b5ca73a52762e5b930b361
https://github.com/llvm/llvm-project/commit/d9c20e437fe110fb79b5ca73a52762e5b930b361
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/test/CodeGen/aarch64-inline-asm.c
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
A llvm/test/CodeGen/AArch64/aarch64-za-clobber.ll
Log Message:
-----------
[AArch64][SME] Implement inline-asm clobbers for za/zt0 (#79276)
This enables specifing "za" or "zt0" to the clobber list for inline asm.
This complies with the acle SME addition to the asm extension here:
https://github.com/ARM-software/acle/pull/276
Commit: 0be39155bd22258b3e90468b6184bfd87a948bec
https://github.com/llvm/llvm-project/commit/0be39155bd22258b3e90468b6184bfd87a948bec
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/test/Sema/warn-cast-qual.c
Log Message:
-----------
[clang][Interp] Protect stores against dummy pointers
Commit: 3be79790ede30762f73b95218be8877c3b2c3774
https://github.com/llvm/llvm-project/commit/3be79790ede30762f73b95218be8877c3b2c3774
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/docs/UsersManual.rst
Log Message:
-----------
[clang] Update documentation for `#pragma diagnostic` (#78095)
GCC has changed over the past decade, and we're not implementing
everything they do.
Fixes #51472
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 75c4339ef31922bf8c883a7a5dfe638ec6818ab2
https://github.com/llvm/llvm-project/commit/75c4339ef31922bf8c883a7a5dfe638ec6818ab2
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/EvaluationResult.cpp
Log Message:
-----------
[clang][Interp][NFC] Implement dumping Invalid/Valid results
This was just an omission from an earlier commit, clearly
we can print them.
Commit: 0f26441cb83c1dea9aef12c748a79e3f38e3230a
https://github.com/llvm/llvm-project/commit/0f26441cb83c1dea9aef12c748a79e3f38e3230a
Author: Maciej Gabka <maciej.gabka at arm.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/Util/add-TLI-mappings.ll
Log Message:
-----------
[TLI][AArch64] Adjust TLI mappings to vector functions taking linear pointers (#80296)
The masked symbols in SLEEF are incorrectly implemented as calls to non
masked variants, what only works fine for functions which do not modify
memory.
For vector variants which modify memory we can only use a non masked
symbols for now.
The SVE ArmPL mappings need to be removed for now as well.
Commit: 237a799e938aca86dc7e62def792b26974bbae5d
https://github.com/llvm/llvm-project/commit/237a799e938aca86dc7e62def792b26974bbae5d
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/lib/IR/Builders.cpp
M mlir/test/Transforms/test-strict-pattern-driver.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][IR] Notify about block insertion when cloning an op (#80262)
`OpBuilder::clone(Operation &)` should trigger not only
`notifyOperationInserted` but also `notifyBlockInserted` (for all block
contained in `op`).
Commit: a792cb6e3e03aff22dabb6cc94db68d15d953a55
https://github.com/llvm/llvm-project/commit/a792cb6e3e03aff22dabb6cc94db68d15d953a55
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/include/mlir/IR/Builders.h
M mlir/lib/IR/Builders.cpp
Log Message:
-----------
[mlir][IR] Do not trigger `notifyOperationInserted` for unlinked ops (#80278)
This commit changes `OpBuilder::create` and `OpBuilder::createOrFold`
such that `notifyOperationInserted` is no longer triggered if no
insertion point is set. In such a case, an unlinked operation is created
but not inserted, so `notifyOperationInserted` should not be triggered.
Note: Inserting another op into a block that belongs to an unlinked op
(e.g., by the builder of the unlinked op) will trigger a notification.
Commit: c07fcd45f140bb95fb0f1ed10468db2bb6b1a77b
https://github.com/llvm/llvm-project/commit/c07fcd45f140bb95fb0f1ed10468db2bb6b1a77b
Author: ManuelvOK <info at manuel-thieme.de>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
Log Message:
-----------
[Coverage] Map regions from system headers (#76950)
In 2155195131a57f2f01e7cfabb85bb027518c2dc6, the
"system-headers-coverage" option has been added but not used in all
necessary places.
This is the recommit since it has been reverted in
faef68bca852d08511ea0311d8a0d221cb202e73
Potential reviewers: @gulfemsavrun @petrhosek
Co-authored-by: Manuel Kalettka <manuel.kalettka at kernkonzept.com>
Commit: b840d2968391dd610b792a65133a1edc1bcc397c
https://github.com/llvm/llvm-project/commit/b840d2968391dd610b792a65133a1edc1bcc397c
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Transforms/test-legalizer-full.mlir
M mlir/test/Transforms/test-strict-pattern-driver.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][IR] Send notifications for `cloneRegionBefore` (#66871)
Similar to `OpBuilder::clone`, operation/block insertion notifications
should be sent when cloning the contents of a region. E.g., this is to
ensure that the newly created operations are put on the worklist of the
greedy pattern rewriter driver.
Also move `cloneRegionBefore` from `RewriterBase` to `OpBuilder`. It
only creates new IR, so it should be part of the builder API (like
`clone(Operation &)`). The function does not have to be virtual. Now
that notifications are properly sent, the override in the dialect
conversion is no longer needed.
Commit: 73e546625d6567e5a33454741d257b6929c89635
https://github.com/llvm/llvm-project/commit/73e546625d6567e5a33454741d257b6929c89635
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/test/AST/Interp/c.c
Log Message:
-----------
[clang][Interp] Fix up broken test case
This was not working right on armv8:
https://lab.llvm.org/buildbot/#/builders/245/builds/20020
Commit: 9efdccb26f35e9b32aa0f303eb0cfcec1e7c2c71
https://github.com/llvm/llvm-project/commit/9efdccb26f35e9b32aa0f303eb0cfcec1e7c2c71
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
Log Message:
-----------
[mlir][memref] `memref.subview`: Verify result strides with rank reductions (#80158)
This is a follow-up on #79865. Result strides are now also verified if
the `memref.subview` op has rank reductions.
Commit: 9e649518e6038a5b9ea38cfa424468657d3be59e
https://github.com/llvm/llvm-project/commit/9e649518e6038a5b9ea38cfa424468657d3be59e
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/init-aarch64.c
Log Message:
-----------
[Clang][AArch64] Add missing SME macros (#80293)
__ARM_STATE_ZA and __ARM_STATE_ZT0 are set when the compiler can parse
the "za" and "zt0" strings in the SME attributes.
__ARM_FEATURE_SME and __ARM_FEATURE_SME2 are set when the compiler can
generate code for attributes with "za" and "zt0" state, respectively.
__ARM_FEATURE_LOCALLY_STREAMING is set when the compiler supports the
__arm_locally_streaming attribute.
Commit: 438fe1db09b0c20708ea1020519d8073c37feae8
https://github.com/llvm/llvm-project/commit/438fe1db09b0c20708ea1020519d8073c37feae8
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/ProfileData/Coverage/CoverageMappingWriter.cpp
M llvm/unittests/ProfileData/CoverageMappingTest.cpp
Log Message:
-----------
CoverageMappingWriter: Emit `Decision` before `Expansion` (#78966)
To relax scanning record, tweak order by `Decision < Expansion`, or
`Expansion` could not be distinguished whether it belonged to `Decision`
or not.
Relevant to #77871
Commit: acf6811d0f2b6b453be46ddf7e046e1346991c98
https://github.com/llvm/llvm-project/commit/acf6811d0f2b6b453be46ddf7e046e1346991c98
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/TableGen/TGLexer.h
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/TableGen/TGParser.h
A llvm/test/TableGen/deftype.td
Log Message:
-----------
[TableGen] Support type aliases via new keyword deftype
We can use `deftype` (not using `typedef` here to be consistent
with `def`, `defm`, `defset`, `defvar`, etc) to define type aliases.
Currently, only primitive types and type aliases are supported to be
the source type and `deftype` statements can only appear at the top
level.
Reviewers: fpetrogalli, Artem-B, nhaehnle, jroelofs
Reviewed By: jroelofs, nhaehnle, Artem-B
Pull Request: https://github.com/llvm/llvm-project/pull/79570
Commit: a52e9eca3001b23c7952300e5a32b5c58ef2e0e2
https://github.com/llvm/llvm-project/commit/a52e9eca3001b23c7952300e5a32b5c58ef2e0e2
Author: Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/Lex/PPMacroExpansion.cpp
A clang/test/Preprocessor/has_builtin_cpuid.c
Log Message:
-----------
[Preprocessor] Fix __has_builtin for CPU ID functions (#80058)
My recent commit (67c1c1d) made the CPU ID builtins target-independent
so they can be used on PPC as well. However, that had the unintended
consequence of changing the behaviour of __has_builtin in that it
reports these as supported at the pre-processor level. This makes it
impossible to guard the use of these with this feature test macro which
is clearly not ideal.
This patch restores the behaviour of __has_builtin for __builtin_cpu_is,
__builtin_cpu_init,
__builtin_cpu_supports. Now the preprocessor queries the target to
determine whether the target supports the builtin.
Commit: 42ec9934e1079742e0b5d839e420bc3f746fc73b
https://github.com/llvm/llvm-project/commit/42ec9934e1079742e0b5d839e420bc3f746fc73b
Author: Mikael Holmen <mikael.holmen at ericsson.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
[PowerPC] Fix gcc -Wparentheses warning [NFC]
Without this gcc warns like
../lib/Target/PowerPC/PPCAsmPrinter.cpp:1650:33: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
1650 | (InstDisp >= -32768) &&
| ~~~~~~~~~~~~~~~~~~~~~^~
1651 | "Expecting the instruction displacement for local-exec TLS "
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1652 | "variables to be between [-32768, 32768)!");
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Commit: 5b8e1a6ebf11b6e93bcc96a0d009febe4bb3d7bc
https://github.com/llvm/llvm-project/commit/5b8e1a6ebf11b6e93bcc96a0d009febe4bb3d7bc
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/IndVarSimplify/pr79861.ll
Log Message:
-----------
[SCEVExpander] Do not reuse disjoint or (#80281)
SCEV treats "or disjoint" the same as "add nsw nuw". However, when
expanding, we cannot generally replace an add SCEV node with an "or
disjoint" instruction. Just dropping the poison flag is insufficient in
this case, we would have to actually convert the or into an add.
This is a partial fix for #79861.
Commit: 84c8d0377de1f7f45e65e85d1f3cc69ca5e29af5
https://github.com/llvm/llvm-project/commit/84c8d0377de1f7f45e65e85d1f3cc69ca5e29af5
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/dealloc-other.mlir
Log Message:
-----------
[MLIR][Vector] Implement memory effect for print (#80400)
Add write memory effect for the print operation. The exact memory
behavior is implemented in other print-like operations such as
`transform::PrintOp` or `gpu::printf`.
Providing memory behavior allows using the operation in passes like
buffer deallocation instead of emitting an error.
Commit: c2dea7122cd9f559f64cd0b34431d21e61f5bf15
https://github.com/llvm/llvm-project/commit/c2dea7122cd9f559f64cd0b34431d21e61f5bf15
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
M mlir/test/Dialect/ArmSME/vector-legalization.mlir
Log Message:
-----------
[mlir][ArmSME] Fold extracts from 3D create_masks of SME-like masks (#80148)
When unrolling the reduction dimension of something like a matmul for
SME, it is possible to get 3D masks, which are vectors of SME-like
masks. The 2D masks for individual operations are then extracted from
the 3D masks.
i.e.:
```mlir
%mask = vector.create_mask %nonConstantDim, %a, %b : vector<4x[4]x[4]xi1>
%subMask = vector.extract %mask[2]
: vector<[4]x[4]xi1> from vector<4x[4]x[4]xi1>
```
ArmSME only supports lowering 2D create_masks, so we must fold the
extract into the create_mask. This can be done by checking if the
extraction index is within the true region, then using that select the
first dimension of the 2D mask. This is shown below.
```mlir
%extractionInTrueRegion = arith.cmpi slt, %c2, %nonConstantDim : index
%newMaskFrontDim = arith.select %extractionInTrueRegion, %a, %c0 : index
%subMask = vector.create_mask %newMaskFrontDim, %b : vector<[4]x[4]xi1>
```
Commit: 6d1d2c67e7597dc417c097d5027558b0159ed2e2
https://github.com/llvm/llvm-project/commit/6d1d2c67e7597dc417c097d5027558b0159ed2e2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/Frontend/TextDiagnostic.cpp
Log Message:
-----------
[clang] Fix a possible out-of-bounds read (#80023)
Fixes #79964
Commit: 4b8e514334786e1aa6f86d7d777385aa9702d835
https://github.com/llvm/llvm-project/commit/4b8e514334786e1aa6f86d7d777385aa9702d835
Author: Tuan Chuong Goh <chuong.goh at arm.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/bswap.ll
Log Message:
-----------
[AArch64][GlobalISel] Pre-Commit tests for Legalize BSWAP Vectors
Commit: 2cf415f2a03433fd3661938fb2f4af0754ad2274
https://github.com/llvm/llvm-project/commit/2cf415f2a03433fd3661938fb2f4af0754ad2274
Author: Peter Smith <peter.smith at arm.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/docs/SecurityTransparencyReports.rst
Log Message:
-----------
Add security group 2023 transparency report. (#80320)
Commit: ffb3589b8cb3468713d25ff2a4378918eafa7044
https://github.com/llvm/llvm-project/commit/ffb3589b8cb3468713d25ff2a4378918eafa7044
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M libcxx/include/__format/formatter_bool.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/vector
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Remove transitive <locale> include from <vector> (#80282)
This reduces the time to include `<vector>` from 468ms to 367ms.
Commit: 9410019ac977141bc73aee19690b5896ded59219
https://github.com/llvm/llvm-project/commit/9410019ac977141bc73aee19690b5896ded59219
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/ctpop-combine.ll
M llvm/test/CodeGen/X86/popcnt.ll
Log Message:
-----------
[X86] Add i8 CTPOP lowering using i32 MUL (#79989)
This is the first basic proposal in #79823 - we can investigate improving support for other widths if we can find further use cases.
Commit: 10943695f76f513503162026669e84cb72275e84
https://github.com/llvm/llvm-project/commit/10943695f76f513503162026669e84cb72275e84
Author: chuongg3 <chuong.goh at arm.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-bswap.mir
M llvm/test/CodeGen/AArch64/bswap.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalize BSWAP for Vector Types (#80036)
Add support of i16 vector operation for BSWAP and change to TableGen to
select instructions
Handle vector types that are smaller/larger than legal for BSWAP
Commit: cca9f9b78fc657c280f7e4024a552af43a315bdb
https://github.com/llvm/llvm-project/commit/cca9f9b78fc657c280f7e4024a552af43a315bdb
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for c2dea7122cd9f559f64cd0b34431d21e61f5bf15
Commit: 2d1f5af8b0b07a4ac19eae699aa660debb1a5613
https://github.com/llvm/llvm-project/commit/2d1f5af8b0b07a4ac19eae699aa660debb1a5613
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[AMDGPU] Reduce duplication in SOP instruction definitions. NFCI. (#80413)
Use !tolower instead of repeating the name when defining a renamed Real
instruction.
Commit: 589b21f38932ed1150906fc30307f030c62f6e8f
https://github.com/llvm/llvm-project/commit/589b21f38932ed1150906fc30307f030c62f6e8f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M libcxx/include/__memory/temporary_buffer.h
Log Message:
-----------
[libc++][NFC] Remove <__type_traits/alignment_of.h> include
Commit: 2e669ff59ebb096d67d02ec51dbb7050dc5e2235
https://github.com/llvm/llvm-project/commit/2e669ff59ebb096d67d02ec51dbb7050dc5e2235
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerBuildVector* - share the same SDLoc argument instead of recreating it over and over again.
Commit: b5d35feacb7246573c6a4ab2bddc4919a4228ed5
https://github.com/llvm/llvm-project/commit/b5d35feacb7246573c6a4ab2bddc4919a4228ed5
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/avg.ll
M llvm/test/CodeGen/X86/avx-vperm2x128.ll
M llvm/test/CodeGen/X86/avx2-arith.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/avx2-vector-shifts.ll
M llvm/test/CodeGen/X86/avx512-arith.ll
M llvm/test/CodeGen/X86/avx512-intrinsics.ll
M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
M llvm/test/CodeGen/X86/avx512-shuffles/permute.ll
M llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
M llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
M llvm/test/CodeGen/X86/combine-add.ll
M llvm/test/CodeGen/X86/combine-addo.ll
M llvm/test/CodeGen/X86/combine-and.ll
M llvm/test/CodeGen/X86/combine-bitselect.ll
M llvm/test/CodeGen/X86/combine-mul.ll
M llvm/test/CodeGen/X86/combine-pavg.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/combine-shl.ll
M llvm/test/CodeGen/X86/combine-sra.ll
M llvm/test/CodeGen/X86/combine-srem.ll
M llvm/test/CodeGen/X86/combine-srl.ll
M llvm/test/CodeGen/X86/combine-sub-usat.ll
M llvm/test/CodeGen/X86/combine-sub.ll
M llvm/test/CodeGen/X86/combine-udiv.ll
M llvm/test/CodeGen/X86/combine-urem.ll
M llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
M llvm/test/CodeGen/X86/extract-concat.ll
M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/X86/fpclamptosat_vec.ll
M llvm/test/CodeGen/X86/i64-to-float.ll
M llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
M llvm/test/CodeGen/X86/icmp-pow2-diff.ll
M llvm/test/CodeGen/X86/insert-into-constant-vector.ll
M llvm/test/CodeGen/X86/insertelement-shuffle.ll
M llvm/test/CodeGen/X86/known-signbits-vector.ll
M llvm/test/CodeGen/X86/masked_load.ll
M llvm/test/CodeGen/X86/masked_store.ll
M llvm/test/CodeGen/X86/masked_store_trunc.ll
M llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/movmsk-cmp.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/packus.ll
M llvm/test/CodeGen/X86/paddus.ll
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/pmulh.ll
M llvm/test/CodeGen/X86/pr48215.ll
M llvm/test/CodeGen/X86/pr57340.ll
M llvm/test/CodeGen/X86/pr61964.ll
M llvm/test/CodeGen/X86/pr62014.ll
M llvm/test/CodeGen/X86/pr63507.ll
M llvm/test/CodeGen/X86/pr74736.ll
M llvm/test/CodeGen/X86/pr77459.ll
M llvm/test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
M llvm/test/CodeGen/X86/psubus.ll
M llvm/test/CodeGen/X86/sat-add.ll
M llvm/test/CodeGen/X86/setcc-non-simple-type.ll
M llvm/test/CodeGen/X86/sext-vsetcc.ll
M llvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
M llvm/test/CodeGen/X86/slow-pmulld.ll
M llvm/test/CodeGen/X86/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/srem-vector-lkk.ll
M llvm/test/CodeGen/X86/sse-domains.ll
M llvm/test/CodeGen/X86/subvector-broadcast.ll
M llvm/test/CodeGen/X86/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/urem-seteq-vec-splat.ll
M llvm/test/CodeGen/X86/urem-seteq-vec-tautological.ll
M llvm/test/CodeGen/X86/urem-vector-lkk.ll
M llvm/test/CodeGen/X86/usub_sat_vec.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vec_int_to_fp.ll
M llvm/test/CodeGen/X86/vec_setcc-2.ll
M llvm/test/CodeGen/X86/vec_setcc.ll
M llvm/test/CodeGen/X86/vec_shift6.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/vector-bo-select.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-sub128.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-mul.ll
M llvm/test/CodeGen/X86/vector-pack-512.ll
M llvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll
M llvm/test/CodeGen/X86/vector-popcnt-256-ult-ugt.ll
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
M llvm/test/CodeGen/X86/vector-shuffle-v192.ll
M llvm/test/CodeGen/X86/vector-trunc-math.ll
M llvm/test/CodeGen/X86/vector-trunc-packus.ll
M llvm/test/CodeGen/X86/vector-trunc-ssat.ll
M llvm/test/CodeGen/X86/vector-trunc-usat.ll
M llvm/test/CodeGen/X86/vector-trunc.ll
M llvm/test/CodeGen/X86/vector-tzcnt-128.ll
M llvm/test/CodeGen/X86/vector-unsigned-cmp.ll
M llvm/test/CodeGen/X86/vector-zext.ll
M llvm/test/CodeGen/X86/vselect-constants.ll
M llvm/test/CodeGen/X86/vselect-pcmp.ll
M llvm/test/CodeGen/X86/vselect.ll
M llvm/test/CodeGen/X86/widen_arith-5.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] X86FixupVectorConstants - load+sign-extend vector constants that can be stored in a truncated form (#79815)
Reduce the size of the vector constant by storing it in the constant pool in a truncated form, and sign-extend it as part of the load.
I've extended the existing FixupConstant functionality to support these sext constant rebuilds - we still select the smallest stored constant entry and prefer vzload/broadcast/vextload for same bitwidth to avoid domain flips.
I intend to add the matching load+zero-extend handling in a future PR, but that requires some alterations to the existing MC shuffle comments handling first.
Commit: ffd84a6a9afc43968fe24c9057bd4f86e148e283
https://github.com/llvm/llvm-project/commit/ffd84a6a9afc43968fe24c9057bd4f86e148e283
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
Log Message:
-----------
[mlir] Fix -Wsign-compare in MemRefOps.cpp (NFC)
llvm-project/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp:2763:23:
error: comparison of integers of different signs: 'int64_t' (aka 'long') and 'size_type' (aka 'unsigned long') [-Werror,-Wsign-compare]
assert(t1.getRank() == droppedDims.size() && "incorrect number of bits");
~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~
llvm-project/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp:2764:38:
error: comparison of integers of different signs: 'int64_t' (aka 'long') and 'size_type' (aka 'unsigned long') [-Werror,-Wsign-compare]
assert(t1.getRank() - t2.getRank() == droppedDims.count() &&
~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~
Commit: d912f1f0cb49465b08f82fae89ece222404e5640
https://github.com/llvm/llvm-project/commit/d912f1f0cb49465b08f82fae89ece222404e5640
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
A llvm/test/tools/llvm-cov/Inputs/mcdc-macro.c
A llvm/test/tools/llvm-cov/Inputs/mcdc-macro.o
A llvm/test/tools/llvm-cov/Inputs/mcdc-macro.proftext
A llvm/test/tools/llvm-cov/mcdc-macro.test
Log Message:
-----------
[Coverage] Let `Decision` take account of expansions (#78969)
The current implementation (D138849) assumes `Branch`(es) would follow
after the corresponding `Decision`. It is not true if `Branch`(es) are
forwarded to expanded file ID. As a result, consecutive `Decision`(s)
would be confused with insufficient number of `Branch`(es).
`Expansion` will point `Branch`(es) in other file IDs if `Expansion` is
included in the range of `Decision`.
Fixes #77871
---------
Co-authored-by: Alan Phipps <a-phipps at ti.com>
Commit: 4cf2ed4396ddeda1487d6c5151a7dfdf14573920
https://github.com/llvm/llvm-project/commit/4cf2ed4396ddeda1487d6c5151a7dfdf14573920
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[X86] Fix -Wsign-compare in X86MCInstLower.cpp (NFC)
llvm-project/llvm/lib/Target/X86/X86MCInstLower.cpp:1588:48:
error: comparison of integers of different signs: 'unsigned int' and 'int' [-Werror,-Wsign-compare]
if (C && C->getType()->getScalarSizeInBits() == SrcEltBits) {
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~
1 error generated.
Commit: 319f4c03ba2909c7240ac157cc46216bf1518c10
https://github.com/llvm/llvm-project/commit/319f4c03ba2909c7240ac157cc46216bf1518c10
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/aarch64-sme-func-attrs.c
Log Message:
-----------
[Clang][AArch64] Emit 'unimplemented' diagnostic for SME (#80295)
When a function F has ZA and ZT0 state, calls another function G that
only shares ZT0 state with its caller, F will have to save ZA before
the call to G, and restore it afterwards (rather than setting up a
lazy-sve).
This is not yet implemented in LLVM and does not result in a
compile-time error either. So instead of silently generating incorrect
code, it's better to emit an error saying this is not yet implemented.
Commit: b8025d1482a9664463cfc727a0e51cad86fdf2fe
https://github.com/llvm/llvm-project/commit/b8025d1482a9664463cfc727a0e51cad86fdf2fe
Author: Valery Pykhtin <valery.pykhtin at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
Reapply "[AMDGPU] Add InstCombine rule for ballot.i64 intrinsic in wave32 mode." (#80303)
Reapply #71556 with added lit test constraint: `REQUIRES: amdgpu-registered-target`.
This reverts commit 9791e5414960f92396582b9e9ee503ac15799312.
Commit: c66cedb3a7326c8403aae9a3928f3f4ab7fb2173
https://github.com/llvm/llvm-project/commit/c66cedb3a7326c8403aae9a3928f3f4ab7fb2173
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
A llvm/test/Analysis/ScalarEvolution/iv-poison.ll
Log Message:
-----------
[SCEV] Add SCEV analysis tests with congruent IVs.
This patch adds a set of tests taken
from/llvm/test/Transforms/IndVarSimplify/iv-poison.ll with multiple
congruent IVs but different set of flags on the increments.
Extra tests for https://github.com/llvm/llvm-project/pull/80430.
Commit: 7a4570acdb1a32935d96831142748ba3298a2b7f
https://github.com/llvm/llvm-project/commit/7a4570acdb1a32935d96831142748ba3298a2b7f
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/test/Lower/HLFIR/array-ctor-character.f90
Log Message:
-----------
[flang] sanitize set_length in lowering (#80412)
In fortran, it is possible to give a negative "i" in "character(i)" in
which case the standard says the length is zero. So the length must be
sanitized as max(0, user_input) in lowering.
This is already done when lowering specification parts, but was not done
when "character(i)" appears in array constructors. Sanitize the length
when lowering SetLength in lowering.
Fixes https://github.com/llvm/llvm-project/issues/80270
Commit: 92bbf615f50c67030ed536f08cc5bb266e0718db
https://github.com/llvm/llvm-project/commit/92bbf615f50c67030ed536f08cc5bb266e0718db
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/FrontendActions.cpp
M flang/test/Lower/OpenMP/FIR/target_cpu_features.f90
M flang/test/Lower/OpenMP/target_cpu_features.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
A mlir/test/Target/LLVMIR/omptarget-target-cpu-features.mlir
Log Message:
-----------
[Flang][MLIR][OpenMP] Use function-attached target attributes for OpenMP lowering (#78291)
This patch removes the omp.target module attribute, since the
information it held on the target CPU and features is available through
the fir.target_cpu and fir.target_features module attributes. Target
outlining during the MLIR to LLVM IR translation stage is updated, so
that these attributes, at that point available as llvm.func attributes,
are passed along to the newly created function.
Commit: 3c2a73ad6c2f3a3e5846d33688f790e85c420ae5
https://github.com/llvm/llvm-project/commit/3c2a73ad6c2f3a3e5846d33688f790e85c420ae5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] FP<->INT helpers - share the same SDLoc argument instead of recreating it over and over again.
Commit: a1df10da59e8eb0c1d90df81bf9000d2f7869328
https://github.com/llvm/llvm-project/commit/a1df10da59e8eb0c1d90df81bf9000d2f7869328
Author: Konstantin Zhuravlyov <kzhuravl_dev at outlook.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
Log Message:
-----------
AMDGPU/NFC: Add predicate for supporting ds_add_f64 (#80379)
Commit: 1f4a5d8a5b2ba62f3d9f65bdd4a65d6f5593d4cd
https://github.com/llvm/llvm-project/commit/1f4a5d8a5b2ba62f3d9f65bdd4a65d6f5593d4cd
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/test/AST/Interp/c.c
Log Message:
-----------
[clang][Interp] Fix broken test case again
Instead of asserting that it's wrong, assert the correct
value.
See the discussion in
https://github.com/llvm/llvm-project/commit/a8b5994b337cf1d461202a65204a4ee6c5eae341
Commit: 274d1b000cae57acf2dc988fcb65cfe7383ed2b0
https://github.com/llvm/llvm-project/commit/274d1b000cae57acf2dc988fcb65cfe7383ed2b0
Author: Harald van Dijk <harald at gigawatt.nl>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/TargetLoweringBase.cpp
Log Message:
-----------
[NFC] Add useFPRegsForHalfType(). (#74147)
Currently, half operations can be promoted in one of two ways.
* If softPromoteHalfType() returns false, fp16 values are passed around
in fp32 registers, and whole chains of fp16 operations are promoted to
fp32 in one go.
* If softPromoteHalfType() returns true, fp16 values are passed around
in i16 registers, and individual fp16 operations are promoted to fp32
and the result truncated to fp16 right away.
The softPromoteHalfType behavior is necessary for correctness, but
changing this for an existing target breaks the ABI. Therefore, this
commit adds a third option:
* If softPromoteHalfType() returns true and useFPRegsForHalfType()
returns true as well, fp16 values are passed around in fp32 registers,
but individual fp16 operations are promoted to fp32 and the result
truncated to fp16 right away.
This change does not yet update any target to make use of it.
Commit: 1e7d5871eed1bdf1eeb4b50eb9b911774f420ca1
https://github.com/llvm/llvm-project/commit/1e7d5871eed1bdf1eeb4b50eb9b911774f420ca1
Author: lifengxiang1025 <lifengxiang.1025 at bytedance.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Analysis/MemoryProfileInfo.cpp
A llvm/test/Transforms/PGOProfile/Inputs/memprof_loop_unroll.exe
A llvm/test/Transforms/PGOProfile/Inputs/memprof_loop_unroll.memprofraw
M llvm/test/Transforms/PGOProfile/Inputs/update_memprof_inputs.sh
A llvm/test/Transforms/PGOProfile/memprof_loop_unroll.ll
Log Message:
-----------
[MemProf] Fix when CallStackTrie has a single chain to leaf with multi alloc type (#79433)
Fix one corner case when `CallStackTrie` has a single chain to leaf with
multi alloc type. This will cause stackIds in function summary is empty.
Commit: 275729ae06d568e9589392c142a416fb8c2bb1a8
https://github.com/llvm/llvm-project/commit/275729ae06d568e9589392c142a416fb8c2bb1a8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/masked_compressstore.ll
M llvm/test/CodeGen/X86/masked_expandload.ll
Log Message:
-----------
[X86] Generalize i8 CTPOP expansion to work with any input with 8 or less active bits
Extend #79989 slightly to use KnownBits on the CTPOP input - this should make it easier to add additional cases identified in #79823
Commit: 66b339aa6ba3ee63806c87630aec1dc6a45e63c5
https://github.com/llvm/llvm-project/commit/66b339aa6ba3ee63806c87630aec1dc6a45e63c5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/test/Transforms/IndVarSimplify/X86/inner-loop-by-latch-cond.ll
Log Message:
-----------
[IndVars] Regenerate test checks (NFC)
Commit: a986f5e218ab8a68097fcc1fd3234b8743839ef8
https://github.com/llvm/llvm-project/commit/a986f5e218ab8a68097fcc1fd3234b8743839ef8
Author: alexfh <alexfh at google.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/Frontend/TextDiagnostic.cpp
Log Message:
-----------
Fix clang crash when printing highlighted code in diagnostic (after #66514) (#80442)
Implements the fix proposed by Evgeny Eltsin on
https://github.com/llvm/llvm-project/pull/66514#issuecomment-1924039038.
No test case provided, since the bug is extremely sensitive to the
preprocessor
state (headers, macros, including the ones defined on command line), and
it
turned out to be non-trivial to create an isolated test.
Commit: fbf9356be07408efc05621a7a8d0472a61c66228
https://github.com/llvm/llvm-project/commit/fbf9356be07408efc05621a7a8d0472a61c66228
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
A llvm/test/CodeGen/X86/ctpop-mask.ll
Log Message:
-----------
[X86] Add ctpop-mask.ll - test coverage based off #79823
Commit: 46b6756255029f442165148115bad99d04057622
https://github.com/llvm/llvm-project/commit/46b6756255029f442165148115bad99d04057622
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/amdgpu-toolchain-opencl.cl
M clang/test/Driver/hip-options.hip
Log Message:
-----------
[AMDGPU] Diagnose unaligned atomic (#80322)
AMDGPU does not support unaligned atomics, therefore make the warning an
error.
This patch is transferred from
https://reviews.llvm.org/D99201
Commit: 43dd1e84df1ecdad872e1004af47b489e08fc228
https://github.com/llvm/llvm-project/commit/43dd1e84df1ecdad872e1004af47b489e08fc228
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
Log Message:
-----------
[SCEV] Move canReuseInstruction() helper into SCEV (NFC)
To allow reusing it in IndVars.
Commit: 7524b037257cdeb67e3ed80364da94eab8e98122
https://github.com/llvm/llvm-project/commit/7524b037257cdeb67e3ed80364da94eab8e98122
Author: Natalie Chouinard <sudonatalie at google.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
[docs] Add note about calendar timezones (#80346)
Commit: 67eee4a029797c09129889c3655416d1be487cfe
https://github.com/llvm/llvm-project/commit/67eee4a029797c09129889c3655416d1be487cfe
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M libcxx/benchmarks/ContainerBenchmarks.h
M libcxx/benchmarks/vector_operations.bench.cpp
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__memory/unique_ptr.h
A libcxx/include/__type_traits/is_trivially_relocatable.h
M libcxx/include/libcxx.imp
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/include/vector
A libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/support/count_new.h
Log Message:
-----------
[libc++] Optimize vector growing of trivially relocatable types (#76657)
This patch introduces a new trait to represent whether a type is
trivially
relocatable, and uses that trait to optimize the growth of a std::vector
of trivially relocatable objects.
```
--------------------------------------------------
Benchmark old new
--------------------------------------------------
bm_grow<int> 1354 ns 1301 ns
bm_grow<std::string> 5584 ns 3370 ns
bm_grow<std::unique_ptr<int>> 3506 ns 1994 ns
bm_grow<std::deque<int>> 27114 ns 27209 ns
```
This also changes to order of moving and destroying the objects when
growing the vector. This should not affect our conformance.
Commit: 30503116550c2bffe706366e93dbaee15850014c
https://github.com/llvm/llvm-project/commit/30503116550c2bffe706366e93dbaee15850014c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 67eee4a02979
Commit: b629414ae13d6dcd641e92d0389c5d4b7638a644
https://github.com/llvm/llvm-project/commit/b629414ae13d6dcd641e92d0389c5d4b7638a644
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
Log Message:
-----------
[libc][NFC] Simplify logic in `sqrt` (#80426)
Commit: 28865da37451904c4654f20cdaddee815fdeff1d
https://github.com/llvm/llvm-project/commit/28865da37451904c4654f20cdaddee815fdeff1d
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
Log Message:
-----------
[LSR][term-fold] Adjust expansion budget based on trip count (#80304)
Follow up to https://github.com/llvm/llvm-project/pull/74747
This change extends the previously added fixed expansion threshold by
scaling down the cost allowed for an expansion for a loop with either a
small known trip count or a profile which indicates the trip count is
likely small. The goal here is to improve code generation for a loop
nest where the outer loop has a high trip count, and the inner loop runs
only a handful of iterations.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 1437a83491cbe4af1b452a3f862a6b609057c26d
https://github.com/llvm/llvm-project/commit/1437a83491cbe4af1b452a3f862a6b609057c26d
Author: Rushi Bhamani <99245918+rushiraj7677 at users.noreply.github.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/test/tools/llvm-reduce/custom-delta-passes.ll
M llvm/test/tools/llvm-reduce/do-not-remove-terminator.ll
M llvm/test/tools/llvm-reduce/fail-file-open.test
M llvm/test/tools/llvm-reduce/granularity-level.ll
M llvm/test/tools/llvm-reduce/no-replace-intrinsic-callee-with-undef.ll
M llvm/test/tools/llvm-reduce/operands-skip-parallel.ll
M llvm/test/tools/llvm-reduce/operands-skip.ll
M llvm/test/tools/llvm-reduce/operands-to-args.ll
M llvm/test/tools/llvm-reduce/oracle-count.ll
M llvm/test/tools/llvm-reduce/parallel-workitem-kill.ll
M llvm/test/tools/llvm-reduce/reduce-functions-blockaddress-wrong-function.ll
M llvm/test/tools/llvm-reduce/reduce-functions-blockaddress.ll
M llvm/test/tools/llvm-reduce/remove-alias.ll
M llvm/test/tools/llvm-reduce/remove-all-of-multiple-args.ll
M llvm/test/tools/llvm-reduce/remove-args-2.ll
M llvm/test/tools/llvm-reduce/remove-args-fn-passed-through-call.ll
M llvm/test/tools/llvm-reduce/remove-args-from-declaration.ll
M llvm/test/tools/llvm-reduce/remove-args-used-by-ret.ll
M llvm/test/tools/llvm-reduce/remove-args.ll
M llvm/test/tools/llvm-reduce/remove-attributes-from-intrinsic-like-functions.ll
M llvm/test/tools/llvm-reduce/remove-dp-values.ll
M llvm/test/tools/llvm-reduce/remove-funcs.ll
M llvm/test/tools/llvm-reduce/remove-function-arguments-of-funcs-used-in-blockaddress.ll
M llvm/test/tools/llvm-reduce/remove-function-bodies-comdat.ll
M llvm/test/tools/llvm-reduce/remove-global-variable-attributes.ll
M llvm/test/tools/llvm-reduce/remove-metadata-args.ll
M llvm/test/tools/llvm-reduce/remove-multiple-use-of-global-vars-in-same-instruction.ll
M llvm/test/tools/llvm-reduce/remove-operand-bundles.ll
M llvm/test/tools/llvm-reduce/remove-single-arg.ll
M llvm/test/tools/llvm-reduce/remove-unused-declarations.ll
M llvm/test/tools/llvm-reduce/run-ir-passes.ll
Log Message:
-----------
Add --abort-on-invalid-reduction to more lit tests (#80263)
Commit: b78b264518e0f341d99a4291cbf24134c7536f6d
https://github.com/llvm/llvm-project/commit/b78b264518e0f341d99a4291cbf24134c7536f6d
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/test/Analysis/CostModel/RISCV/gep.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
Log Message:
-----------
[TTI] Add costing for vp.strided.load and vp.strided.store (#80360)
The primary motivation of this patch is to add testing infrastructure
atop the recently landed 8ad14b6d90121d2d0687a3a7f6f6c6f2b34c4aa7, so
that we can separate the costing aspects of strided memory operations
from the SLP implementation details.
I want to be clear that I am *not* proposing that we use the
vp.strided.* forms as our canonical IR representation. I'm merely using
them as a testing vehicle to exercise the costing machinery. The
canonical IR form remains a masked.gather or masked.scatter. I do want
to explore adding a non-vp strided load/store intrinsic, but that's a
separate line of work.
There is one costing change included in this. As I wrote my test, I
discovered that the default implementation was scalarized (if invoked
via generic routines such as getInstructionCost), and when adding the
call into the strided specific costing discovered that we hadn't modeled
the fallback to scalarization properly in the initial patch. After
fixing that, there is a minor difference in scalarization cost reported
for the unaligned case but I believe that to be uninteresting.
For the record, I did confirm that vp.strided.store is lowered to a
strided store on RISCV. :)
Commit: a768bc6ef6a0c1a7365134505fdfcaeeaaffdb41
https://github.com/llvm/llvm-project/commit/a768bc6ef6a0c1a7365134505fdfcaeeaaffdb41
Author: Manish Kausik H <46352931+Nirhar at users.noreply.github.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
A llvm/test/CodeGen/X86/unaligned_extract_from_vector_through_stack.ll
Log Message:
-----------
[SelectionDAG] Use unaligned store to move AVX registers onto stack for `extractelement` (#78422)
Prior to this patch, SelectionDAG generated aligned move onto stacks for
AVX registers when the function was marked as a no-realign-stack
function. This lead to misalignment between the stack and the
instruction generated. This patch fixes the issue.
Fixes #77730
Commit: 7b08b4360b488b35428c97132b3f9d2a777bd770
https://github.com/llvm/llvm-project/commit/7b08b4360b488b35428c97132b3f9d2a777bd770
Author: Nathan Gauër <brioche at google.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
A llvm/lib/Target/SPIRV/Analysis/CMakeLists.txt
A llvm/lib/Target/SPIRV/Analysis/SPIRVConvergenceRegionAnalysis.cpp
A llvm/lib/Target/SPIRV/Analysis/SPIRVConvergenceRegionAnalysis.h
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
A llvm/unittests/Target/SPIRV/CMakeLists.txt
A llvm/unittests/Target/SPIRV/SPIRVConvergenceRegionAnalysisTests.cpp
Log Message:
-----------
[SPIR-V] add convergence region analysis (#78456)
This new analysis returns a hierarchical view of the convergence regions
in the given function.
This will allow our passes to query which basic block belongs to which
convergence region, and structurize the code in consequence.
Definition
----------
A convergence region is a CFG with:
- a single entry node.
- one or multiple exit nodes (different from LLVM's regions).
- one back-edge
- zero or more subregions.
Excluding sub-regions nodes, the nodes of a region can only reference a
single convergence token. A subregion uses a different convergence
token.
Algorithm
---------
This algorithm assumes all loops are in the Simplify form.
Create an initial convergence region for the whole function.
- the convergence token is the function entry token.
- the entry is the function entrypoint.
- Exits are all the basic blocks terminating with a return instruction.
Take the function CFG, and process it in DAG order (ignoring
back-edges). If a basic block is a loop header:
- Create a new region.
- The parent region is the parent's loop region if any, otherwise, the
top level region.
- The region blocks are all the blocks belonging to this loop.
- For each loop exit: - visit the rest of the CFG in DAG order (ignore
back-edges). - if the region's convergence token is found, add all the
blocks dominated by the exit from which the token is reachable to the
region.
- continue the algorithm with the loop headers successors.
Commit: 7ecfb66c77ad77dabbb705cbb1f3b17a3d1391a4
https://github.com/llvm/llvm-project/commit/7ecfb66c77ad77dabbb705cbb1f3b17a3d1391a4
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTemplate.cpp
A clang/test/CXX/dcl.decl/dcl.meaning/dcl.meaning.general/p3.cpp
Log Message:
-----------
[Clang][Sema] Correctly look up primary template for variable template specializations (#80359)
Consider the following:
```
namespace N0 {
namespace N1 {
template<typename T>
int x1 = 0;
}
using namespace N1;
}
template<>
int N0::x1<int>;
```
According to [dcl.meaning.general] p3.3:
> - If the _declarator_ declares an explicit instantiation or a partial
or explicit specialization, the _declarator_ does not bind a name. If it
declares a class member, the terminal name of the _declarator-id_ is not
looked up; otherwise, **only those lookup results that are nominable in
`S` are considered when identifying any function template specialization
being declared**.
In particular, the requirement for lookup results to be nominal in the
lookup context of the terminal name of the _declarator-id_ only applies
to function template specializations -- not variable template
specializations. We currently reject the above declaration, but we do
(correctly) accept it if the using-directive is replaced with a `using`
declaration naming `N0::N1::x1`. This patch makes it so the above
specialization is (correctly) accepted.
Commit: 3a758076f54d521d20e32856a62c7d24803ee9e8
https://github.com/llvm/llvm-project/commit/3a758076f54d521d20e32856a62c7d24803ee9e8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/ctpop-mask.ll
Log Message:
-----------
[X86] Allow i8 CTPOP expansion to work with a 'shifted' active bits value of 8 bits or less
Shift down the value so the active bits are at the lsb
Commit: faeb3d1f106d607f51babe3770e899bc9bda7f3a
https://github.com/llvm/llvm-project/commit/faeb3d1f106d607f51babe3770e899bc9bda7f3a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
Log Message:
-----------
[AMDGPU] Regenerate ctpop64.ll test checks
Commit: 1156bbc5b1837e688b0e5d6952f1a900aca29062
https://github.com/llvm/llvm-project/commit/1156bbc5b1837e688b0e5d6952f1a900aca29062
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/TypeLoc.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/drs/dr23xx.cpp
M clang/test/CXX/drs/dr7xx.cpp
M clang/test/CXX/temp/temp.decls/temp.class/temp.mem.func/p1.cpp
A clang/test/CXX/temp/temp.names/p5.cpp
M clang/test/CXX/temp/temp.spec/part.spec.cpp
M clang/test/SemaCXX/static-assert.cpp
M clang/test/SemaTemplate/class-template-spec.cpp
Log Message:
-----------
[Clang][Sema] Diagnose use of template keyword after declarative nested-name-specifiers (#78595)
According to [temp.names] p5:
> The keyword template shall not appear immediately after a declarative nested-name-specifier.
[expr.prim.id.qual] p2 defines a declarative nested-name-specifier as follows:
> A nested-name-specifier is declarative if it is part of
> - a class-head-name,
> - an enum-head-name,
> - a qualified-id that is the id-expression of a declarator-id, or
> - a declarative nested-name-specifier.
Note: I believe this definition is defective as it doesn't include _nested-name-specifiers_ appearing in _elaborated-type-specifiers_ that declare partial/explicit specializations and explicit instantiations. See my post to the core reflector. Minus a few bugs that are addressed by this PR, this is how we implement it.
This means that declarations like:
```
template<typename>
struct A
{
template<typename>
struct B
{
void f();
};
};
template<typename T>
template<typename U>
void A<T>::template B<U>::f() { } // error: 'template' cannot be used after a declarative nested name specifier
```
are ill-formed. This PR add diagnostics for such declarations. The name of the diagnostic group is `template-in-declaration-name`.
Regarding the aforementioned "few bugs that are addressed by this PR" in order to correctly implement this:
- `CheckClassTemplate` did not call `diagnoseQualifiedDeclaration` when the semantic context was dependent. This allowed for constructs like:
```
struct A
{
template<typename T>
struct B
{
template<typename U>
struct C;
};
};
template<typename T>
template<typename U>
struct decltype(A())::B<T>::C { };
```
- `ActOnClassTemplateSpecialization` did not call `diagnoseQualifiedDeclaration` at all, allowing for qualified partial/explicit specializations at class scope and other related nonsense
- `TreeTransform::TransformNestedNameSpecifierLoc` would rebuild a `NestedNameSpecifier::TypeSpecWithTemplate` as a `NestedNameSpecifier::TypeSpec`
- `TemplateSpecializationTypeLoc::initializeLocal` would set the `template` keyword `SourceLocation` to the provided `Loc` parameter, which would result in a `TemplateSpecializationTypeLoc` obtained via `ASTContext::getTrivialTypeSourceInfo` being displayed as always having a `template` prefix (since the presence of the keyword is not stored anywhere else).
Commit: 9cc2122bf5a81f7063c2a32b2cb78c8d615578a1
https://github.com/llvm/llvm-project/commit/9cc2122bf5a81f7063c2a32b2cb78c8d615578a1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/include/clang/Basic/TokenKinds.def
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/SemaCXX/type-traits.cpp
M libcxx/include/__type_traits/is_nothrow_convertible.h
Log Message:
-----------
[Clang][libc++] Implement __is_nothrow_convertible and use it in libc++ (#80436)
GCC 13 has implemented this builtin.
Commit: d4de4c3eafa9b70c255a4d6d5a14dccff79d10e9
https://github.com/llvm/llvm-project/commit/d4de4c3eafa9b70c255a4d6d5a14dccff79d10e9
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/test/Sema/inline-asm-validate-aarch64.c
M llvm/docs/LangRef.rst
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/inlineasm-S-constraint.ll
Log Message:
-----------
[AArch64] Support optional constant offset for constraint "S" (#80255)
Modify the initial implementation (https://reviews.llvm.org/D46745) to
support a constant offset so that the following code will compile:
```
int a[2][2];
void foo() { asm("// %0" :: "S"(&a[1][1])); }
```
We use the generic code path for "s". In GCC's aarch64 port, "S" is
supported for PIC while "s" isn't, making "s" less useful. We implement
"S" but not "s".
Similar to #80201 for RISC-V.
Commit: ef1f999e13bd58394bc1099c87a470d91682153d
https://github.com/llvm/llvm-project/commit/ef1f999e13bd58394bc1099c87a470d91682153d
Author: Derek Schuff <dschuff at chromium.org>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M lld/wasm/InputFiles.cpp
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/Object/Wasm.h
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/tools/obj2yaml/wasm2yaml.cpp
Log Message:
-----------
[Object][Wasm] Move WasmSymbolInfo directly into WasmSymbol (NFC) (#80219)
Move the WasmSymbolInfos from their own vector on the WasmLinkingData
directly into the WasmSymbol object. Removing the const-ref to an
external object allows the vector of WasmSymbols to be safely
expanded/reallocated; generating symbol info from the name section will
require this, as the numbers of function and data segment names are
stored separately.
This is a step toward generating symbol information from name sections
for #76107
Commit: 74fb205876be681d2ca9d8bdd23e171e671df5e1
https://github.com/llvm/llvm-project/commit/74fb205876be681d2ca9d8bdd23e171e671df5e1
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.bool.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.c_string.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.char.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.char_array.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.floating_point.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.handle.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.pointer.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.signed_integral.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.string.pass.cpp
M libcxx/test/std/utilities/format/format.formatter/format.formatter.spec/formatter.unsigned_integral.pass.cpp
Log Message:
-----------
[libc++][format] Improves tests. (#76291)
Tests the returned type. This was first done for the vector<bool>
formatters. This adds it to the other formatters where it wasn't done
yet.
Commit: 7ca4012e115a39c09647bbd28105ea7e5edcd441
https://github.com/llvm/llvm-project/commit/7ca4012e115a39c09647bbd28105ea7e5edcd441
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M flang/docs/AliasingAnalysisFIR.md
M flang/docs/FIRArrayOperations.md
M flang/docs/FlangDriver.md
M flang/docs/HighLevelFIR.md
M flang/docs/OpenACC-descriptor-management.md
M flang/docs/Overview.md
M flang/docs/ParameterizedDerivedTypes.md
M flang/docs/PolymorphicEntities.md
M flang/docs/ProcedurePointer.md
M flang/docs/conf.py
M flang/docs/index.md
Log Message:
-----------
[flang][docs] Fix broken flang website (#80363)
These are several fixes for the flang site. The look has been changed to
match clang since flang, like clang, is a frontend. Some broken links
were removed. Most fixes are to secton titles so the table of contents
is generated correctly. A minor typo has been fixed.
Commit: ad0acf9ef6ff219795159663dbf59116fef416db
https://github.com/llvm/llvm-project/commit/ad0acf9ef6ff219795159663dbf59116fef416db
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
Log Message:
-----------
[GISEL] More accounting for scalable vectors when operating on LLTs (#80372)
This is stacked on by #80377 and #80378
Commit: bc06cd5cbcfc22dd976f6742d10bc934e1353b8a
https://github.com/llvm/llvm-project/commit/bc06cd5cbcfc22dd976f6742d10bc934e1353b8a
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
A .github/workflows/issue-write.yml
M .github/workflows/pr-code-format.yml
M llvm/utils/git/code-format-helper.py
Log Message:
-----------
[workflows] Split pr-code-format into two parts to make it more secure (#78216)
Actions triggered by pull_request_target events have access to all
repository secrets, so it is unsafe to use them when executing untrusted
code. The pr-code-format workflow does not execute any untrusted code,
but it passes untrused input into clang-format. An attacker could use
this to exploit a flaw in clang-format and potentially gain access to
the repository secrets.
By splitting the workflow, we can use the pull_request target which is
more secure and isolate the issue write permissions in a separate job.
The pull_request target also makes it easier to test changes to the
code-format-helepr.py script, because the version of the script from the
pull request will be used rather than the version of the script from
main.
Fixes #77142
Commit: dd0356d741aefa25ece973d6cc4b55dcb73b84b4
https://github.com/llvm/llvm-project/commit/dd0356d741aefa25ece973d6cc4b55dcb73b84b4
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/utils/perf-training/CMakeLists.txt
M clang/utils/perf-training/perf-helper.py
M llvm/docs/AdvancedBuilds.rst
Log Message:
-----------
[CMake][PGO] Add option for using an external project to generate profile data (#78879)
The new CLANG_PGO_TRAINING_DATA_SOURCE_DIR allows users to specify a
CMake project to use for generating the profile data. For example, to
use the llvm-test-suite to generate profile data you would do:
$ cmake -G Ninja -B build -S llvm -C <path to
source>/clang/cmake/caches/PGO.cmake \
-DBOOTSTRAP_CLANG_PGO_TRAINING_DATA_SOURCE_DIR=<path to llvm-test-suite>
\
-DBOOTSTRAP_CLANG_PGO_TRAINING_DEPS=runtimes
Note that the CLANG_PERF_TRAINING_DEPS has been renamed to
CLANG_PGO_TRAINING_DEPS.
---------
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: e12be9cde44f92bc5a788930508a7fd13db78f11
https://github.com/llvm/llvm-project/commit/e12be9cde44f92bc5a788930508a7fd13db78f11
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
A llvm/test/CodeGen/RISCV/rv64-legal-i32/condops.ll
Log Message:
-----------
[RISCV] Don't promote ISD::SELECT with rv64-legal-i32 when XTHeadCondMov is enabled.
Fixes an infinite loop.
Test copied from the non-rv64-legal-i32 test.
Commit: 1ac68462637749d44695361cfce3225cc107fd4e
https://github.com/llvm/llvm-project/commit/1ac68462637749d44695361cfce3225cc107fd4e
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.h
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dilated_conv_2d_nhwc_hwcf.mlir
Log Message:
-----------
[mlir][sparse] support sparse dilated convolution. (#80470)
Commit: 9a4a4c3f740226ecfe78db407b5b4333bfe2f8bc
https://github.com/llvm/llvm-project/commit/9a4a4c3f740226ecfe78db407b5b4333bfe2f8bc
Author: David Blaikie <dblaikie at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/include/llvm/ADT/StringMap.h
M llvm/lib/Support/StringMap.cpp
M llvm/unittests/ADT/StringMapTest.cpp
Log Message:
-----------
Reapply "[ADT][StringMap] Add ability to precompute and reuse the string hash"
Reverted due to an internally discovered lld crash, which turned out to
be an existing lld bug that got tickled by this changes. That's
addressed in dee8786f70a3d62b639113343fa36ef55bdbad63 so let's have
another go with this change.
Original commit message:
Useful for lldb's const string pool, using the hash to determine which
string map to lock and query/insert.
Derived from https://reviews.llvm.org/D122974 by Luboš Luňák
This reverts commit f976719fb2cb23364957e5993f7fc3684ee15391.
Effectively reapplying 67c631d283fc96d652304199cd625be426b98f8e.
Commit: f6b387589d648945372528a4ac77c58f310e5165
https://github.com/llvm/llvm-project/commit/f6b387589d648945372528a4ac77c58f310e5165
Author: David Blaikie <dblaikie at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M lldb/source/Utility/ConstString.cpp
M llvm/lib/Support/StringMap.cpp
Log Message:
-----------
Reapply "lldb: Cache string hash during ConstString pool queries/insertions"
Reverted due to an internally discovered lld crash due to the underlying
StringMap changes, which turned out to be an existing lld bug that got
tickled by the StringMap changes. That's addressed in
dee8786f70a3d62b639113343fa36ef55bdbad63 so let's have another go with
this change.
Original commit message:
lldb was rehashing the string 3 times (once to determine which StringMap
to use, once to query the StringMap, once to insert) on insertion (twice
on successful lookup).
This patch allows the lldb to benefit from hash improvements in LLVM
(from djbHash to xxh3).
Though further changes would be needed to cache this value to disk - we
shouldn't rely on the StringMap::hash remaining the same in the
future/this value should not be serialized to disk. If we want cache
this value StringMap should take a hashing template parameter to allow
for a fixed hash to be requested.
This reverts commit 5bc1adff69315dcef670e9fcbe04067b5d5963fb.
Effectively reapplying the original 2e197602305be18b963928e6ae024a004a95af6d.
Commit: 06c14c03dae6dcd0b24b5b0e427bbecd97cf0eff
https://github.com/llvm/llvm-project/commit/06c14c03dae6dcd0b24b5b0e427bbecd97cf0eff
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
R .github/workflows/issue-write.yml
M .github/workflows/pr-code-format.yml
M llvm/utils/git/code-format-helper.py
Log Message:
-----------
Revert "[workflows] Split pr-code-format into two parts to make it more secure (#78216)"
This reverts commit bc06cd5cbcfc22dd976f6742d10bc934e1353b8a.
This caused the job to fail for PRs which still had an older version
of code-format-helper.py in their tree.
Commit: 095367a521fc9ff714e1779e507bdd91d4fe9c7d
https://github.com/llvm/llvm-project/commit/095367a521fc9ff714e1779e507bdd91d4fe9c7d
Author: Alexander Yermolovich <43973793+ayermolo at users.noreply.github.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
Log Message:
-----------
[LLVM][DWARF] Chnage order for .debug_names abbrev print out (#80229)
This stemps from conversatin in:
https://github.com/llvm/llvm-project/pull/77457#discussion_r1457889792.
Right now Abbrev code for abbrev is combination of DIE TAG and other
attributes.
In the future it will be changed to be an index. Since DenseSet does not
preserve an order, added a sort based on abbrev code. Once change to
index is
made, it will print out abbrevs in the order they are stored.
Commit: 2352fdd2026e36c4206053331deba1a70b70d925
https://github.com/llvm/llvm-project/commit/2352fdd2026e36c4206053331deba1a70b70d925
Author: Kirill Stoimenov <kstoimenov at google.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M libcxx/benchmarks/ContainerBenchmarks.h
M libcxx/benchmarks/vector_operations.bench.cpp
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__memory/unique_ptr.h
R libcxx/include/__type_traits/is_trivially_relocatable.h
M libcxx/include/libcxx.imp
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/include/vector
R libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/support/count_new.h
Log Message:
-----------
Revert "[libc++] Optimize vector growing of trivially relocatable types (#76657)"
Broke sanitizer bots: https://lab.llvm.org/buildbot/#/builders/5/builds/40641
This reverts commit 67eee4a029797c09129889c3655416d1be487cfe.
Commit: cc38cd856d9a9df77d5d727377e38a891807774b
https://github.com/llvm/llvm-project/commit/cc38cd856d9a9df77d5d727377e38a891807774b
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.h
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.h
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.h
M clang-tools-extra/clang-tidy/google/UnnamedNamespaceInHeaderCheck.cpp
M clang-tools-extra/clang-tidy/google/UnnamedNamespaceInHeaderCheck.h
M clang-tools-extra/clang-tidy/llvm/HeaderGuardCheck.h
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.h
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/suspicious-include.rst
M clang-tools-extra/docs/clang-tidy/checks/google/build-namespaces.rst
M clang-tools-extra/docs/clang-tidy/checks/google/global-names-in-headers.rst
M clang-tools-extra/docs/clang-tidy/checks/llvm/header-guard.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/definitions-in-headers.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unused-using-decls.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/use-anonymous-namespace.rst
Log Message:
-----------
[clang-tidy] Remove check-specific HeaderFileExtensions and Implement… (#80333)
…ationFileExtensions
Deprecated since clang-tidy 17. Use the corresponding global options
instead.
Fixes #61947
---------
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: 7f828c4a2b7d9508ba369efff4dc259974eba048
https://github.com/llvm/llvm-project/commit/7f828c4a2b7d9508ba369efff4dc259974eba048
Author: Nico Weber <thakis at chromium.org>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
A llvm/utils/gn/secondary/llvm/unittests/Target/SPIRV/BUILD.gn
Log Message:
-----------
[gn] Add dummy build file for SPIRVTests
sync_source_lists_from_cmake.py checks that every unittest in CMake
also exists in the GN build. 7b08b4360b48 added SPRIVTests, but the GN
build doesn't include the SPIRV target. So add a dummy target for this
to placate the check.
See also VETests in the gn build, which has the same setup.
Commit: 4ca0e00af569d74c479c66d19a5ffaf41fcb08d9
https://github.com/llvm/llvm-project/commit/4ca0e00af569d74c479c66d19a5ffaf41fcb08d9
Author: Nico Weber <thakis at chromium.org>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Target/SPIRV/BUILD.gn
Log Message:
-----------
[gn] Fix typo in SPIRVTests dummy target comment
Commit: 9c2446ea7c7149af6057c10a22e55b833bf4cc7a
https://github.com/llvm/llvm-project/commit/9c2446ea7c7149af6057c10a22e55b833bf4cc7a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 2352fdd2026e
Commit: 05a6cb208635a54fb63622f13420e4d8549e5ba1
https://github.com/llvm/llvm-project/commit/05a6cb208635a54fb63622f13420e4d8549e5ba1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/lib/Parse/ParseDeclCXX.cpp
A clang/test/SemaCXX/libstdcxx_is_nothrow_convertible_hack.cpp
Log Message:
-----------
[Clang] Allow __is_nothrow_convertible to be used as an identifier (#80476)
`__is_nothrow_convertible` has been used by libstdc++ previously as an
identifier.
Commit: a4cd9812bacf959ba7a1e7dbb022b7546f5952e3
https://github.com/llvm/llvm-project/commit/a4cd9812bacf959ba7a1e7dbb022b7546f5952e3
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/include/llvm/Analysis/CGSCCPassManager.h
M llvm/include/llvm/CodeGen/MachinePassManager.h
A llvm/include/llvm/IR/Analysis.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PassManagerInternal.h
M llvm/include/llvm/Transforms/Scalar/LoopPassManager.h
Log Message:
-----------
[NFC][PassManager] Remove PreservedAnalysesT template parameter (#80324)
This is always PreservedAnalyses. Perhaps in the past there was the idea
to make some types of passes return more invalidation information, but
that hasn't happened.
Requires splitting out some analysis classes into a header so
PassManagerInternal.h can see the definition of PreservedAnalyses.
Commit: 52864d9c7bd49ca41191bd34fcee47f61cfea743
https://github.com/llvm/llvm-project/commit/52864d9c7bd49ca41191bd34fcee47f61cfea743
Author: Harald van Dijk <harald at gigawatt.nl>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/test/CodeGen/ARM/aes-erratum-fix.ll
M llvm/test/CodeGen/ARM/arm-half-promote.ll
M llvm/test/CodeGen/ARM/fp16-args.ll
M llvm/test/CodeGen/ARM/fp16-instructions.ll
M llvm/test/CodeGen/ARM/fp16-promote.ll
M llvm/test/CodeGen/ARM/llvm.exp10.ll
M llvm/test/CodeGen/ARM/llvm.frexp.ll
M llvm/test/CodeGen/ARM/vecreduce-fadd-legalization-soft-float.ll
M llvm/test/CodeGen/ARM/vecreduce-fadd-legalization-strict.ll
M llvm/test/CodeGen/ARM/vecreduce-fmax-legalization-soft-float.ll
M llvm/test/CodeGen/ARM/vecreduce-fmin-legalization-soft-float.ll
M llvm/test/CodeGen/ARM/vecreduce-fmul-legalization-soft-float.ll
M llvm/test/CodeGen/ARM/vecreduce-fmul-legalization-strict.ll
M llvm/test/CodeGen/Thumb2/mve-vabd.ll
Log Message:
-----------
[ARM] Switch to soft promoting half types. (#80440)
The traditional promotion is known to generate wrong code.
Fixes #73805.
Commit: 659419ac2f05035cd8ff19806a9e48ccc725d3ba
https://github.com/llvm/llvm-project/commit/659419ac2f05035cd8ff19806a9e48ccc725d3ba
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
Log Message:
-----------
[builtins][FMV] Remove dead include from fmv/apple.inc. NFC
Commit: ec73441f2b5bea696e6cb5af07e740fa34fb4d47
https://github.com/llvm/llvm-project/commit/ec73441f2b5bea696e6cb5af07e740fa34fb4d47
Author: Usama Hameed <u_hameed at apple.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/test/Instrumentation/AddressSanitizer/global_with_comdat.ll
Log Message:
-----------
[Clang][Test] Delete hardcoded version string from test (#80384)
Remove hardcoded string from test
rdar://120498671
Commit: 0d6ed8399f35cc8b23a8e6d094379e3d0dd71c45
https://github.com/llvm/llvm-project/commit/0d6ed8399f35cc8b23a8e6d094379e3d0dd71c45
Author: Florian Mayer <fmayer at google.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Log Message:
-----------
[NFC] reorder AND to check cheaper condition first
Commit: 5294ad1d5c995850ecc903ff2c3464d37cfb49c2
https://github.com/llvm/llvm-project/commit/5294ad1d5c995850ecc903ff2c3464d37cfb49c2
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Improve `extf` folder (#80232)
* Use APFloat conversion function to avoid losing information by
converting to `double`. This would be the case with large types like
`f80` or `f128`.
* Check for potential information loss. This is intended for small
floating point types that may have values not present in larger ones
(e.g., f8m2e5fnuz and f16).
* Support folding vector constants.
Commit: 7a94acb2da5b20d12f13f3c5f4eb0f3f46e78e73
https://github.com/llvm/llvm-project/commit/7a94acb2da5b20d12f13f3c5f4eb0f3f46e78e73
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M clang/lib/AST/TypePrinter.cpp
A clang/test/AST/ast-dump-pack-indexing-crash.cpp
Log Message:
-----------
[Clang] Fix a crash when dumping a pack indexing type. (#80439)
Fix a crash caused by incorrect assumptions
Reported here
https://github.com/llvm/llvm-project/pull/72644#discussion_r1469525524
Commit: 5eae09519c8ca208e0d971acce35870955612615
https://github.com/llvm/llvm-project/commit/5eae09519c8ca208e0d971acce35870955612615
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Rename some SubtargetFeature names to remove an extra 's'. NFC
I wrote FeaturesStdExt instead of FeatureStdExt in a previous patch.
Commit: 0ce61e48ce0a2ca401599318401079e42ed5b0f9
https://github.com/llvm/llvm-project/commit/0ce61e48ce0a2ca401599318401079e42ed5b0f9
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M libc/docs/index.rst
A libc/docs/search.rst
Log Message:
-----------
[libc] add doc for search.h (#80492)
Commit: 2d2f962c9b646e809c58eccf6a46ed6b619ac252
https://github.com/llvm/llvm-project/commit/2d2f962c9b646e809c58eccf6a46ed6b619ac252
Author: Martin Storsjö <martin at martin.st>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
Log Message:
-----------
[openmp] Add a dependency on the separate import library (#80449)
Currently, when doing e.g. "ninja check-openmp", the check-openmp target
only depends on the target "omp", which builds the library. Thus by
doing that, the separate import library "libomp.lib", which is generated
directly from a def file, never gets created, unless one does a separate
invocation first, that builds all targets.
To fix this, make the "omp" target depend on the target for the separate
import library, whenever that is created/used.
Commit: 820f244aa92f11292e59440c9bc5afbdec395b20
https://github.com/llvm/llvm-project/commit/820f244aa92f11292e59440c9bc5afbdec395b20
Author: Yijia Gu <yijiagu at google.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Add missing dependency in ArithDialect
Commit: 31350c2681b4893a5018ea19ca8f0ed322b8b0b2
https://github.com/llvm/llvm-project/commit/31350c2681b4893a5018ea19ca8f0ed322b8b0b2
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
Log Message:
-----------
[mlir][openacc][NFC] Add information about getters for operands with device_type (#80389)
Add information in the operation's description about which operands must
be accessed with special getters for device_type support.
Commit: 0da21043630c3f5af3806945eb64e1c5ef261798
https://github.com/llvm/llvm-project/commit/0da21043630c3f5af3806945eb64e1c5ef261798
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/OpenACC/propagate-attr-folding.fir
Log Message:
-----------
[flang][openacc] Do not loose attributes on folding (#80516)
hlfir.declare introduce some boxes that can be later optimized away. The
OpenACC lowering is currently setting some attributes on FIR operations
to track declare variables. When the boxes are optimized away these
attributes are lost. This patch propagate OpenACC attributes from
box_addr op to the defining op of the folding result.
Commit: 42d6eb54752c37c2583301158e30648cf09195a4
https://github.com/llvm/llvm-project/commit/42d6eb54752c37c2583301158e30648cf09195a4
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/vscale-crashes.ll
Log Message:
-----------
[MemCpyOpt] Handle scalable aggregate types in memmove/memset formation (#80487)
Without this change, the included test cases crash the compiler. I
believe this is fallout from the homogenous scalable struct work from a
while back; I think we just forgot to update this case.
Likely to fix https://github.com/llvm/llvm-project/issues/80463.
Commit: b49fa212891983517f2988c60529c6994e2fed7c
https://github.com/llvm/llvm-project/commit/b49fa212891983517f2988c60529c6994e2fed7c
Author: yubingex007-a11y <bing1.yu at intel.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/concat-fpext-v2bf16.ll
Log Message:
-----------
[X86] Stop custom-widening v2f32 = fpext v2bf16 (#80106)
Commit: 82a32140acb52472241f04644cdcf88a4cf4bee8
https://github.com/llvm/llvm-project/commit/82a32140acb52472241f04644cdcf88a4cf4bee8
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaType.cpp
M clang/test/SemaCXX/function-type-qual.cpp
Log Message:
-----------
[Clang][Sema] Fix crash with const qualified member operator new (#80327)
We should diagnose a const qualified member operator new but we fail to
do so and this leads to crash during debug info generation.
The fix is to diagnose this as ill-formed in the front-end.
Fixes: https://github.com/llvm/llvm-project/issues/79748
Commit: b8d92e1c4726ba6da9f7a6f388c08b3acd5cb62c
https://github.com/llvm/llvm-project/commit/b8d92e1c4726ba6da9f7a6f388c08b3acd5cb62c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-02 (Fri, 02 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Fix crash in lowerVPSpliceExperimental with RV64LegalI32.
EVL1 will be i32 and not get type legalized to i64 so we need to
manually promote it to XLenVT.
Commit: 78b4e7c5e349d8c101b50affbd260eb109748f8f
https://github.com/llvm/llvm-project/commit/78b4e7c5e349d8c101b50affbd260eb109748f8f
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/test/MC/WebAssembly/tables.s
M llvm/test/MC/WebAssembly/type-checker-errors.s
Log Message:
-----------
[WebAssembly] validate `table.grow` correctly (#80437)
This PR add support in wasm asm type checker to implement checker of
`table.grow`
Fixes: #79966.
Commit: 141de749597c7b59ebe2c4aa7ee573d124dc903c
https://github.com/llvm/llvm-project/commit/141de749597c7b59ebe2c4aa7ee573d124dc903c
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaTemplate/concepts-recovery-expr.cpp
Log Message:
-----------
[clang][Sema] Populate function template depth at AddTemplateOverloadCandidate (#80395)
This is yet another one-line patch to fix crashes on constraint
substitution.
```cpp
template <class, class> struct formatter;
template <class, class> struct basic_format_context {};
template <typename CharType>
concept has_format_function = format(basic_format_context<CharType, CharType>());
template <typename ValueType, typename CharType>
requires has_format_function<CharType>
struct formatter<ValueType, CharType> {
template <typename OutputIt>
CharType format(basic_format_context<OutputIt, CharType>);
};
```
In this case, we would build up a `RecoveryExpr` for a call within a
constraint expression due to the absence of viable functions. The
heuristic algorithm attempted to find such a function inside of a
ClassTemplatePartialSpecialization, from which we started to substitute
its requires-expression, and it succeeded with a FunctionTemplate such
that
1) It has only one parameter, which is dependent.
2) The only one parameter depends on two template parameters. They are,
in canonical form, `<template-parameter-1-0>` and
`<template-parameter-0-1>` respectively.
Before we emit an error, we still want to recover the most viable
functions. This goes downhill to deducing template parameters against
its arguments, where we would collect the argument type with the same
depth as the parameter type into a Deduced set. The size of the set is
presumed to be that of function template parameters, which is 1 in this
case. However, since we haven't yet properly set the template depth
before the dance, we'll end up putting the type for
`<template-parameter-0-1>` to the second position of Deduced set, which
is unfortunately an access violation!
The bug seems to appear since clang 12.0.
This fixes [the
case](https://github.com/llvm/llvm-project/issues/58548#issuecomment-1287935336).
Commit: 7278cb5a388e0f2f4000dc8d6b3b421de66a945b
https://github.com/llvm/llvm-project/commit/7278cb5a388e0f2f4000dc8d6b3b421de66a945b
Author: joyhou-hw <houzhenyu at huawei.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M clang/lib/Basic/Targets/X86.h
M clang/test/Sema/attr-aligned.c
Log Message:
-----------
[X86] [iamcu] Fix wrong alignment value for attr (aligned) with -miamcu (#80401)
attribute ((aligned)) should be 4 for -miamcu.
relate: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66818
Commit: e7ec0c972e6f5ddd01099fd05ca24352cb992b44
https://github.com/llvm/llvm-project/commit/e7ec0c972e6f5ddd01099fd05ca24352cb992b44
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MIRPrinter.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/MIRPrintingPass.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/tools/llc/NewPMDriver.cpp
Log Message:
-----------
[CodeGen] Port PrintMIR to new pass manager (#79440)
The legacy version print machine functions to a string stream, then
output the module and string in `doFinalization`. This patch break
`MIRPrintingPass` into two parts `PrintMIRPreparePass` and
`PrintMIRPass`. `PrintMIRPreparePass` output the original IR in yaml
string, `PrintMIRPass` just print the machine function, so we can avoid
the `doFinalization`.
Commit: f5154b9c9888f3b1b243d9a142585fabf643f422
https://github.com/llvm/llvm-project/commit/f5154b9c9888f3b1b243d9a142585fabf643f422
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg6e64.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg7e64.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg8e64.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64ff.c
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M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-tuple-type.c
Log Message:
-----------
[clang][RISCV] Enable struct of homogeneous scalable vector as function argument (#78550)
llvm IR supports struct as function input, so RISCV tuple
type can just use struct of homogeneous scalable vector instead
of flatten them.
Commit: d9850fe23cc69b784cf655405cdfae7defa44573
https://github.com/llvm/llvm-project/commit/d9850fe23cc69b784cf655405cdfae7defa44573
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvtbf16.c
Log Message:
-----------
[RISCV][clang] Add Zvfbfmin C intrinsics support (#79618)
Commit: cca3db93e0d441f943387d519702db2d3095f4ca
https://github.com/llvm/llvm-project/commit/cca3db93e0d441f943387d519702db2d3095f4ca
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M libc/src/__support/CPP/expected.h
Log Message:
-----------
[libc][NFC] Fix accessor qualifiers for `cpp::expected` (#80424)
Commit: cba1b64099a0558499c7a355db4c59bb5851b6aa
https://github.com/llvm/llvm-project/commit/cba1b64099a0558499c7a355db4c59bb5851b6aa
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/acosd.f90
A flang/test/Lower/Intrinsics/asind.f90
Log Message:
-----------
[flang] Implement ACOSD and ASIND (#80448)
This PR implements two missing intrinsics from F2023: ACOSD and ASIND.
The implementation breaks them down to the existing ACOS and ASIN
implementation.
Commit: 260fe032c2506cd53c6a813a71c2f096ba161e7f
https://github.com/llvm/llvm-project/commit/260fe032c2506cd53c6a813a71c2f096ba161e7f
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/TargetParser/AArch64TargetParser.cpp
Log Message:
-----------
[llvm][AArch64][TargetParser][NFC] Use parseArchExtension in parseModifier. (#80427)
This allows making changes in parseArchExtension to make their way in
the command line as well, not only in target attributes.
Commit: 514d0691f4da40d5bb6d618a673e975b8eacfb77
https://github.com/llvm/llvm-project/commit/514d0691f4da40d5bb6d618a673e975b8eacfb77
Author: Danny Mösch <danny.moesch at icloud.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/add_new_check.py
Log Message:
-----------
[clang-tidy] Fix warnings caused by "new check" template (#80537)
Commit: 752c172bc7d628fe5ce4a78f3620893b8d7bcfba
https://github.com/llvm/llvm-project/commit/752c172bc7d628fe5ce4a78f3620893b8d7bcfba
Author: Qizhi Hu <836744285 at qq.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
A clang/test/SemaTemplate/default-parm-init.cpp
Log Message:
-----------
[Clang][Sema] fix outline member function template with default align crash (#80288)
Try to fix [issue](https://github.com/llvm/llvm-project/issues/68490 )
and some extented problem. Root cause of current issue is that error
handling in instantiation of function parameter with default
initialization on sizeof or align expression. When instance an
out-of-line template member function, depth of `TemplateTypeParmDecl` in
default initialization doesn't change while depth of other template
parameter does and this will lead to some template parameter
uninstanced. Also, sometime it will leader to wrong instantiation when
it uses the template parameter of the template class.
Fix it by add template args of context. This will make
MultiLevelTemplateArgumentList::getNumLevels matching the depth of
template parameter. Testcase with some static_assert demonstrates the
template parameter has been instanced correctly.
But, the default initialization of lambda expression compiles failed
when only checking if the member function is out-of-line. We should
check the `PrimaryFunctionTemplateDecl` of the funtion if it's
out-of-line.
Co-authored-by: huqizhi <836744285 at qq.com>
Commit: 248aeac1ad2cf4f583490dd1312a5b448d2bb8cc
https://github.com/llvm/llvm-project/commit/248aeac1ad2cf4f583490dd1312a5b448d2bb8cc
Author: Martin Storsjö <martin at martin.st>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M compiler-rt/lib/builtins/i386/chkstk.S
M compiler-rt/lib/builtins/x86_64/chkstk.S
Log Message:
-----------
[compiler-rt] Remove duplicate MS names for chkstk symbols (#80450)
Prior to 885d7b759b5c166c07c07f4c58c6e0ba110fb0c2, the builtins library
contained two chkstk implementations for each of i386 and x86_64, one
that was used in mingw environments, and one unused (with a symbol name
not matching anything that is used anywhere). Some of the functions
additionally had other, also unused, aliases.
After cleaning this up in 885d7b759b5c166c07c07f4c58c6e0ba110fb0c2, the
unused symbol names were removed.
At the same time, symbol aliases were added for the names as they are
used by MSVC; the functions are functionally equivalent, but have
different names between mingw and MSVC style environments.
By adding a symbol alias (so that one object file contains two different
symbols for the same function), users can run into problems with
duplicate definitions, if they themselves define one of the symbols (for
various reasons), but need to link in the other one.
This happens for Wine, which provides their own definition of
"__chkstk", but when built in mingw mode does need compiler-rt to
provide the mingw specific symbol names; see
https://github.com/mstorsjo/llvm-mingw/issues/397.
To avoid the issue, remove the extra MS style names. They weren't
entirely usable as such for MSVC style environments anyway, as
compiler-rt builtins don't build these object files at all, when built
in MSVC mode; thus, the effort to provide them for MSVC style
environments in 885d7b759b5c166c07c07f4c58c6e0ba110fb0c2 was a
half-hearted step towards that.
If we really do want to provide those functions (as an alternative to
the ones provided by MSVC itself), we should do it in a separate object
file (even if the function implementation is the same), so that users
who have a definition of one of them but need a definition of the other,
won't have conflicts.
Additionally, if we do want to provide them for MSVC, those files
actually should be built when building the builtins in MSVC mode as well
(see compiler-rt/lib/builtins/CMakeLists.txt).
If we do that, there's a risk that an MSVC style build ends up linking
in and preferring our implementation over the one provided by MSVC,
which would be suboptimal. Our implementation always probes the
requested amount of stack, while the MSVC one checks the amount of
allocated stack and only probes as much as really is needed.
In short - this reverts the situation to what it was in the 17.x release
series (except for unused functions that have been removed).
Commit: 2906f3626b54136b885d82d2b28b7991f3d728ae
https://github.com/llvm/llvm-project/commit/2906f3626b54136b885d82d2b28b7991f3d728ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Update ::onlyScalarsGenerated to take IsScalable bool (NFCI).
Instead of passing in a full VF, just pass IsScalable as bool.
Commit: 693647902076034e7c81f380d1b937a65aef8ae6
https://github.com/llvm/llvm-project/commit/693647902076034e7c81f380d1b937a65aef8ae6
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Mark vputils::onlyFirstLaneUsed arg as const (NFC)
Split off https://github.com/llvm/llvm-project/pull/80269 as suggested.
Commit: 3444240540b0b36902dc8b9b11339b8969f7bca9
https://github.com/llvm/llvm-project/commit/3444240540b0b36902dc8b9b11339b8969f7bca9
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Mark vputils::onlyFirstPartUsed arg as const (NFC)
Split off https://github.com/llvm/llvm-project/pull/80269 as
suggested.
Commit: 47abbf4fe956ad1c12832de03c8ae3294eb5cb78
https://github.com/llvm/llvm-project/commit/47abbf4fe956ad1c12832de03c8ae3294eb5cb78
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
Log Message:
-----------
[VPlan] Update VPInst::onlyFirstLaneUsed to check users. (#80269)
A VPInstruction only has its first lane used if all users use its first
lane only. Use vputils::onlyFirstLaneUsed to continue checking the
recipe's users to handle more cases.
Besides allowing additional introduction of scalar steps when
interleaving in some cases, this also enables using an Add VPInstruction
to model the increment - as a follow up.
Commit: 5ca2777c69f8708d583e230c56ac7f5f6376fb40
https://github.com/llvm/llvm-project/commit/5ca2777c69f8708d583e230c56ac7f5f6376fb40
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M libcxx/include/valarray
A libcxx/test/libcxx/numerics/numarray/class.gslice.array/assert.get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.gslice.array/get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.indirect.array/assert.get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.indirect.array/get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.mask.array/assert.get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.mask.array/get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.slice.array/assert.get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.slice.array/get.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/and_valarray.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/divide_valarray.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/minus_valarray.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/modulo_valarray.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/or_valarray.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/plus_valarray.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/shift_left_valarray.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/shift_right_valarray.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/times_valarray.pass.cpp
M libcxx/test/std/numerics/numarray/template.valarray/valarray.cassign/xor_valarray.pass.cpp
Log Message:
-----------
[libc++] Fixes valarray proxy type compound assignment operations. (#76528)
The valarray<>::operator[](...) const functions return proxy objects.
The valarray<>::operator[](...) functions return valarray objects.
However the standard allows functions returning valarray objects to
return custom proxy objects instead. Libc++ returns __val_expr proxies.
Functions taking a valarray object must work with the custom proxies
too. Therefore several operations have a custom proxy overload instead
of valarray overloads.
Libc++ doesn't specify a valarray overload. This is an issue with the
standard proxy types; these can implicitly be converted to a valarray.
The solution is to allow the standard proxies to behave as-if they are
custom proxies.
This patch fixes the valarray compound assignments. Other operations,
like the binary non-member functions are not fixed. These will be done
in a followup patch.
Fixes: https://github.com/llvm/llvm-project/issues/21320
Commit: 7189219ec9fc768f159917052b4b5998d077c39f
https://github.com/llvm/llvm-project/commit/7189219ec9fc768f159917052b4b5998d077c39f
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/include/llvm/TextAPI/Utils.h
M llvm/lib/TextAPI/Utils.cpp
A llvm/test/tools/llvm-readtapi/Inputs/libSystem.1.yaml
A llvm/test/tools/llvm-readtapi/stubify-delete.test
A llvm/test/tools/llvm-readtapi/stubify-simple.test
A llvm/test/tools/llvm-readtapi/stubify-symlink.test
R llvm/test/tools/llvm-readtapi/stubify.test
M llvm/tools/llvm-readtapi/TapiOpts.td
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
Log Message:
-----------
[readtapi] Add support for stubify-ing directories (#76885)
When given a directory input `llvm-readtapi` traverses through the
directory to find dylibs or tbd files to operate on. TBD files will be
created with the same base file name as the dylib. Symlinks should be
created if the input is one.
This also introduces options to delete input files which are defined as
library files that existed before `readtapi -stubify` was invoked. Also
the ability to delete private libraries where private libraries are in a
predefined file system locations on darwin based platforms.
Commit: ab9a69878c7a14b85389c16e130ea117ee4f4358
https://github.com/llvm/llvm-project/commit/ab9a69878c7a14b85389c16e130ea117ee4f4358
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M flang/lib/Parser/preprocessor.cpp
Log Message:
-----------
[flang] Simplify a string comparison (NFC)
Commit: 8926af426f202c158dd17b2034c044e85eceb108
https://github.com/llvm/llvm-project/commit/8926af426f202c158dd17b2034c044e85eceb108
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Support/VirtualFileSystem.cpp
Log Message:
-----------
[Support] Use StringRef::starts_with (NFC)
Commit: 9ad78b0994a2a1d7c28f463a89585a0ffd5310e4
https://github.com/llvm/llvm-project/commit/9ad78b0994a2a1d7c28f463a89585a0ffd5310e4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
Log Message:
-----------
[Lanai] Use StringRef::consume_back (NFC)
Commit: 06da452ba7d8d4959cb5070727b842eea4c8af71
https://github.com/llvm/llvm-project/commit/06da452ba7d8d4959cb5070727b842eea4c8af71
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Analysis/LoopInfo.cpp
Log Message:
-----------
[Analysis] Use range-based for loops (NFC)
Commit: 0ed02621b9d87342daff0dcd9014319d4eeb2735
https://github.com/llvm/llvm-project/commit/0ed02621b9d87342daff0dcd9014319d4eeb2735
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
A llvm/test/tools/llvm-readtapi/stubify-symlink-darwin.test
R llvm/test/tools/llvm-readtapi/stubify-symlink.test
Log Message:
-----------
[readtapi] make symlink test darwin only
Appeases bots for now.
Commit: 5bcd91058ee4855804780c4ae35ac87ed45a4b58
https://github.com/llvm/llvm-project/commit/5bcd91058ee4855804780c4ae35ac87ed45a4b58
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
Log Message:
-----------
[readtapi] Use ExitOnError instead of errorcodes for `readlink` wrapper
Silences: ` error C4716: 'read_link': must return a value` windows error
Commit: f87e3b61c8b6af896aebf551a03b2387e71dfe73
https://github.com/llvm/llvm-project/commit/f87e3b61c8b6af896aebf551a03b2387e71dfe73
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__locale
A libcxx/include/__locale_dir/locale_base_api.h
A libcxx/include/__locale_dir/locale_base_api/android.h
A libcxx/include/__locale_dir/locale_base_api/fuchsia.h
A libcxx/include/__locale_dir/locale_base_api/ibm.h
A libcxx/include/__locale_dir/locale_base_api/musl.h
A libcxx/include/__locale_dir/locale_base_api/newlib.h
A libcxx/include/__locale_dir/locale_base_api/openbsd.h
A libcxx/include/__locale_dir/locale_base_api/win32.h
R libcxx/include/__support/android/locale_bionic.h
R libcxx/include/__support/fuchsia/xlocale.h
R libcxx/include/__support/ibm/xlocale.h
R libcxx/include/__support/musl/xlocale.h
R libcxx/include/__support/newlib/xlocale.h
R libcxx/include/__support/openbsd/xlocale.h
R libcxx/include/__support/win32/locale_win32.h
M libcxx/include/libcxx.imp
M libcxx/include/module.modulemap.in
M libcxx/src/locale.cpp
Log Message:
-----------
[libc++] Move the locale support headers to __locale_dir/locale_base_api/ (#74522)
Differential Revision: https://reviews.llvm.org/D147869
Commit: b205ea15c1573fd3c55d2356a22a9068c55c8065
https://github.com/llvm/llvm-project/commit/b205ea15c1573fd3c55d2356a22a9068c55c8065
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port f87e3b61c8b6
Commit: de4360d7d535ffff9e655fdb40657cf95871ec6c
https://github.com/llvm/llvm-project/commit/de4360d7d535ffff9e655fdb40657cf95871ec6c
Author: David Green <david.green at arm.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/test/Analysis/BasicAA/vscale.ll
Log Message:
-----------
[BasicAA] Add extra scalable typesize and offset tests. NFC
A collection of tests from #69152 and for constant offsets with scalable typesizes.
Commit: d62c5706a8fabca8b14484ce5078b03756f8a37b
https://github.com/llvm/llvm-project/commit/d62c5706a8fabca8b14484ce5078b03756f8a37b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
Log Message:
-----------
[RISCV] Custom legalize i32 SMULO with RV64LegalI32.
The default lowering will use shifts to make use of an i32 setcc.
We don't support i32 setcc, so its better to sig extend the low
32 bits and compare the full 64 bit result. This gives produces
mul+mulw+xor+snez like we do without RV64LegalI32.
Commit: f09092434423be14f32781d8ae263dc041d24551
https://github.com/llvm/llvm-project/commit/f09092434423be14f32781d8ae263dc041d24551
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
Log Message:
-----------
[RISCV] Custom legalize i32 SADDO/SSUBO with RV64LegaI32.
The default legalization uses 2 compares and an xor. We can instead
use add+addw+xor+snez like we do without RV64LegaI32.
Commit: ea59b15cf70b53f6a4f3ba0d495d0566a0e77e44
https://github.com/llvm/llvm-project/commit/ea59b15cf70b53f6a4f3ba0d495d0566a0e77e44
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
Log Message:
-----------
[RISCV] Add more RUN lines to rv64-legal-i32/xaluo.ll. NFC
This matches the non-rv64-legal-i32 version.
Commit: 9d00c3413299f537748e448e7197d6942c4651ea
https://github.com/llvm/llvm-project/commit/9d00c3413299f537748e448e7197d6942c4651ea
Author: David Green <david.green at arm.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/neon-mov.ll
Log Message:
-----------
[AArch64] Extend and cleanup movi tests. NFC
Commit: 2333865546cb6d4cda7b511ed07b8cb66a0d4eab
https://github.com/llvm/llvm-project/commit/2333865546cb6d4cda7b511ed07b8cb66a0d4eab
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M openmp/libomptarget/include/device.h
M openmp/libomptarget/src/omptarget.cpp
M openmp/libomptarget/test/offloading/dynamic_module_load.c
Log Message:
-----------
[Libomptarget] Fix data mapping on dynamic loads (#80559)
Summary:
The current logic tries to map target mapping tables to the current
device. Right now it assumes that data is only mapped a single time per
device. This is only true if we have a single instance of the runtime
running on a single program. However, in the case of dynamic library
loads or shared libraries, this may happen multiple times.
Given a case of a simple dynamic library load which has its own target
kernel instruction, the current logic had only the first call to
`__tgt_target_kernel` to the data mapping for that device. Then, when
the next dynamic library load got called, it would see that the global
were already mapped for that device and skip registering its own
entires, even though they were distinct. This resulted in none of the
mappings being done and hitting an assertion.
This patch simply gets rid of this per-device check. The check should
instead be on the host offloading entries. We already have logic that
calls `continue` if we already have entries for that pointer, so we can
simply rely on that instead.
Commit: 08e942aca64d4d16e55a25d7e7eda8ef192727fd
https://github.com/llvm/llvm-project/commit/08e942aca64d4d16e55a25d7e7eda8ef192727fd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
Log Message:
-----------
[RISCV] Combine (xor (trunc (X cc Y)) 1) -> (trunc (X !cc Y)) for RV64LegalI32.
This is needed with RV64LegalI32 when the setcc is created after type
legalization. An i1 xor would have been promoted to i32, but the setcc
would have i64 result.
Commit: 390b99743bdd60649414fe470d7a9bacc9992231
https://github.com/llvm/llvm-project/commit/390b99743bdd60649414fe470d7a9bacc9992231
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
Log Message:
-----------
[InstCombine] Handle isNanOrInf idioms (#80414)
This patch folds:
```
(icmp eq (and (bitcast X to int), ExponentMask), ExponentMask) --> llvm.is.fpclass(X, fcInf|fcNan)
(icmp ne (and (bitcast X to int), ExponentMask), ExponentMask) --> llvm.is.fpclass(X, ~(fcInf|fcNan))
```
Alive2: https://alive2.llvm.org/ce/z/_hXAAF
Commit: 4e112e5c1c8511056030294af3264da35f95d93c
https://github.com/llvm/llvm-project/commit/4e112e5c1c8511056030294af3264da35f95d93c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M libcxx/benchmarks/ContainerBenchmarks.h
M libcxx/benchmarks/vector_operations.bench.cpp
M libcxx/docs/ReleaseNotes/19.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__memory/unique_ptr.h
A libcxx/include/__type_traits/is_trivially_relocatable.h
M libcxx/include/libcxx.imp
M libcxx/include/module.modulemap.in
M libcxx/include/string
M libcxx/include/vector
A libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
A libcxx/test/std/containers/sequences/vector/vector.modifiers/destory_elements.pass.cpp
M libcxx/test/support/count_new.h
Log Message:
-----------
Reapply "[libc++] Optimize vector growing of trivially relocatable types" (#80558)
This reapplies #76657. Non-trivial elements didn't get destroyed
previously. This fixes the bug and adds tests for all the vector
insertion functions.
Commit: 6ad692b7b3416f632e1d38cef3cc83f618f428b0
https://github.com/llvm/llvm-project/commit/6ad692b7b3416f632e1d38cef3cc83f618f428b0
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 4e112e5c1c85
Commit: 61ff9f8db8d18002767ea27f83a4bfb8ed47f255
https://github.com/llvm/llvm-project/commit/61ff9f8db8d18002767ea27f83a4bfb8ed47f255
Author: Harald van Dijk <harald at gigawatt.nl>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
Log Message:
-----------
[X86] Add strictfp version of PR43024 test. (#80573)
For the current version of the PR43024 test, we should be able to
optimize away the operations but fail to do so. This commit adds a
strictfp version of the test where we should not be able to optimize
away the operations, as a verification that changes to improve the other
effect have no adverse effect.
Commit: 1da2921bbdff847eb57184f3d5e7ae5c363b9e88
https://github.com/llvm/llvm-project/commit/1da2921bbdff847eb57184f3d5e7ae5c363b9e88
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
Log Message:
-----------
[RISCV] Add missing extload test cases to xtheadmemidx.ll. NFC
We had the isel patterns, but no tests that used them. We only had
sextload and zextload tests.
Also reduce the alignment on some of the test cases that were
unnecessarily over aligned.
Commit: f2cf8da636ee2b27b54f14fea540d7ef75cebc05
https://github.com/llvm/llvm-project/commit/f2cf8da636ee2b27b54f14fea540d7ef75cebc05
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
A llvm/test/CodeGen/RISCV/rv64-legal-i32/xtheadmemidx.ll
Log Message:
-----------
[RISCV] Add more XTheadMemIdx patterns for -riscv-experimental-rv64-legal-i32.
Commit: a3d8b78333b80b47209ad0dc8f8159d70c7fcb39
https://github.com/llvm/llvm-project/commit/a3d8b78333b80b47209ad0dc8f8159d70c7fcb39
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenCXX/dynamic-cast-dead.cpp
M clang/test/CodeGenCXX/dynamic-cast.cpp
Log Message:
-----------
[Clang][CodeGen] Mark `__dynamic_cast` as `willreturn` (#80409)
According to the C++ standard, `dynamic_cast` of pointers either returns
a pointer (7.6.1.7) or results in undefined behavior (11.9.5). This
patch marks `__dynamic_cast` as `willreturn` to remove unused calls.
Fixes #77606.
Commit: 9dfdea6fbddfa871dab32c3322259babcc13dcdc
https://github.com/llvm/llvm-project/commit/9dfdea6fbddfa871dab32c3322259babcc13dcdc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
A llvm/test/CodeGen/RISCV/rv64-legal-i32/xtheadmac.ll
Log Message:
-----------
[RISCV] Add XTheadMac patterns for -riscv-experimental-rv64-legal-i32.
Commit: b0f0babff22e9c0af74535b05e2c6424392bb24a
https://github.com/llvm/llvm-project/commit/b0f0babff22e9c0af74535b05e2c6424392bb24a
Author: Koakuma <koachan at protonmail.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/sparc64-codemodel.c
Log Message:
-----------
[clang] Add GCC-compatible code model names for sparc64
This adds GCC-compatible names for code model selection on 64-bit SPARC
with absolute code.
Testing with a 2-stage build then running codegen tests works okay under
all of the supported code models.
(32-bit target does not have selectable code models)
Reviewed By: @brad0, @MaskRay
Commit: b4eb7a10c01162b17cb5dc94a97d9d137bb6fe57
https://github.com/llvm/llvm-project/commit/b4eb7a10c01162b17cb5dc94a97d9d137bb6fe57
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
A llvm/test/CodeGen/ARM/GlobalISel/fpenv.ll
Log Message:
-----------
[GlobalISel][ARM] Legalze set_fpenv and get_fpenv (#79852)
Implement handling of get/set floating point environment for ARM in
Global Instruction Selector. Lowering of these intrinsics to operations
on FPSCR was previously inplemented in DAG selector, in GlobalISel it is
reused.
Commit: d25022bb689b9bf48a24c0ae6c29c1d3c2f32823
https://github.com/llvm/llvm-project/commit/d25022bb689b9bf48a24c0ae6c29c1d3c2f32823
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M .github/workflows/llvm-project-tests.yml
Log Message:
-----------
[workflows] Stop using the build-test-llvm-project action (#80580)
This action is really just a wrapper around cmake and ninja. It doesn't
add any value to the builds, and I don't think we need it now that there
are reusable workflows.
Commit: 2193c95e2459887e7e6e4f9f4aacf9252e99858f
https://github.com/llvm/llvm-project/commit/2193c95e2459887e7e6e4f9f4aacf9252e99858f
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M .github/workflows/pr-code-format.yml
Log Message:
-----------
[workflows] Only run code formatter on the main branch (#80348)
Modifying a cherry-picked patch to fix code formatting issues can be
risky, so we don't typically do this. Therefore, it's not necessary to
run this job on the release branches.
Commit: 7d269a484142459a1154ba81c68bf0c31f291fc8
https://github.com/llvm/llvm-project/commit/7d269a484142459a1154ba81c68bf0c31f291fc8
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
Log Message:
-----------
[CodeGen] Use range-based for loops (NFC)
Commit: 3be989e8c30f3cad61e5e1fa54199fc45edf7ff7
https://github.com/llvm/llvm-project/commit/3be989e8c30f3cad61e5e1fa54199fc45edf7ff7
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck] Use StringRef::rtrim (NFC)
Commit: 3c93c037c9ede2eaa0bdea6924c92d646ca0cfe5
https://github.com/llvm/llvm-project/commit/3c93c037c9ede2eaa0bdea6924c92d646ca0cfe5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
Log Message:
-----------
[Basic] Use StringRef::ends_with (NFC)
Commit: 34fba4fb1e32f06237e5024373cc0163cecc3fd5
https://github.com/llvm/llvm-project/commit/34fba4fb1e32f06237e5024373cc0163cecc3fd5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M clang/lib/Basic/Sarif.cpp
Log Message:
-----------
[Basic] Use StringRef::contains (NFC)
Commit: a37e8b85ee5187bc7a1fed7adce8ed5693215795
https://github.com/llvm/llvm-project/commit/a37e8b85ee5187bc7a1fed7adce8ed5693215795
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
Log Message:
-----------
[ExecutionEngine] Simplify a string comparison (NFC)
Commit: 1b33b3f27f8bf3902d754ed83da29f9a6f15e4e1
https://github.com/llvm/llvm-project/commit/1b33b3f27f8bf3902d754ed83da29f9a6f15e4e1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
Log Message:
-----------
[MIRParser] Simplify a string comparison (NFC)
Commit: 9d2e8dca12c8bbb70223eeb74330fe603e215ce3
https://github.com/llvm/llvm-project/commit/9d2e8dca12c8bbb70223eeb74330fe603e215ce3
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/test/MC/WebAssembly/tables.s
M llvm/test/MC/WebAssembly/type-checker-errors.s
Log Message:
-----------
[WebAssembly] fix `table.grow` type checker (#80572)
table.grow is valid with type `[t i32] -> [i32]`.
Fixes: #79966.
Commit: 3bcb1f2bdd5c70b2ac4aff3290996486d9ae0236
https://github.com/llvm/llvm-project/commit/3bcb1f2bdd5c70b2ac4aff3290996486d9ae0236
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
Log Message:
-----------
[RISCV] Rework isSignExtendingOpW to store Register in the worklist.
Previously we stored MachineInstr which restricted the implementation
to only handle operand 0.
The TH_LWD instruction has two sign extended destinations.
Commit: bc9c2be3577c58d3daabff995360bd9bea44b0b9
https://github.com/llvm/llvm-project/commit/bc9c2be3577c58d3daabff995360bd9bea44b0b9
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/minmax.ll
Log Message:
-----------
[ConstraintElim] Simplify `MinMaxIntrinsic` (#75306)
This patch replaces min/max intrinsic with one of its operands if
possible.
Alive2: https://alive2.llvm.org/ce/z/LoHfYf
Fixes #75155.
Commit: 72105605d1fbc816c1219bb1d719693291322011
https://github.com/llvm/llvm-project/commit/72105605d1fbc816c1219bb1d719693291322011
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M clang/test/CodeGen/target-builtin-noerror.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/TargetParser/X86TargetParser.cpp
Log Message:
-----------
[X86] Support more ISAs to enable __builtin_cpu_supports (#79086)
This patch will also expand supports for attribute/target, while
the priority of newly supported ISAs will be set to zero.
Commit: d71ef3e75c6325f0c10c19ee34e2c0337a0fd452
https://github.com/llvm/llvm-project/commit/d71ef3e75c6325f0c10c19ee34e2c0337a0fd452
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Merge identical setOperationAction calls. NFC.
Commit: 114a33be4751328c549c6b8b05e9ece19e452189
https://github.com/llvm/llvm-project/commit/114a33be4751328c549c6b8b05e9ece19e452189
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Log Message:
-----------
[DAG] getStackAlignedMMO - return the getMachineMemOperand result directly (style). NFC.
Commit: dea855de46bd4d3e103646a7f459856d88dd7488
https://github.com/llvm/llvm-project/commit/dea855de46bd4d3e103646a7f459856d88dd7488
Author: Marius Brehler <marius.brehler at iml.fraunhofer.de>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M mlir/include/mlir/Conversion/SCFToEmitC/SCFToEmitC.h
M mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
Log Message:
-----------
[mlir][EmitC] Drop unused code (NFC) (#80325)
To register the conversion the autogenerated function
`registerSCFToEmitC()` calls `createSCFToEmitC()`, which itself is also
autogenerated. The removed function, however, isn't used in the upstream
codebase.
Commit: 859b09da08c2a47026ba0a7d2f21b7dca705864d
https://github.com/llvm/llvm-project/commit/859b09da08c2a47026ba0a7d2f21b7dca705864d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rv64-legal-i32/vararg.ll
Log Message:
-----------
[RISCV] Promote i32 ISD::VAARG to i64 for -riscv-experimental-rv64-legal-i32.
Commit: 9ff83f12fe406f9c3c6b2cd0ee96660a7485f29f
https://github.com/llvm/llvm-project/commit/9ff83f12fe406f9c3c6b2cd0ee96660a7485f29f
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M lldb/include/lldb/DataFormatters/FormatCache.h
M lldb/source/DataFormatters/FormatCache.cpp
Log Message:
-----------
[lldb] Remove unnecessary FormatCache::GetEntry (NFC) (#80603)
The implementation of `FormatCache::Entry
&FormatCache::GetEntry(ConstString)` is effectively a duplication of
`std::map::operator[]`. This change deletes `GetEntry` and replaces its
use with `operator[]`.
Commit: 256200732111afd03bb7437564f3a3d77c0ec3f5
https://github.com/llvm/llvm-project/commit/256200732111afd03bb7437564f3a3d77c0ec3f5
Author: rmarker <37921131+rmarker at users.noreply.github.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Add Automatic and ExceptShortType options for AlwaysBreakAfterReturnType. (#78011)
The RTBS_None option in Clang-format avoids breaking after a short
return type.
However, there was an issue with the behaviour in that it wouldn't take
the leading indentation of the line into account.
This meant that the behaviour wasn't applying when intended.
In order to address this situation without breaking the existing
formatting, RTBS_None has been deprecated.
In its place are two new options for AlwaysBreakAfterReturnType.
The option RTBS_Automatic will break after the return type based on
PenaltyReturnTypeOnItsOwnLine.
The option RTBS_ExceptShortType will take the leading indentation into
account and prevent breaking after short return types.
This allows the inconsistent behaviour of RTBS_None to be avoided and
users to decide whether they want to allow breaking after short return
types or not.
Resolves #78010
Commit: 32b99617acbc4773caee45df10a7fd602b8db0ff
https://github.com/llvm/llvm-project/commit/32b99617acbc4773caee45df10a7fd602b8db0ff
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rv64-legal-i32/uadd_sat.ll
A llvm/test/CodeGen/RISCV/rv64-legal-i32/uadd_sat_plus.ll
A llvm/test/CodeGen/RISCV/rv64-legal-i32/usub_sat.ll
A llvm/test/CodeGen/RISCV/rv64-legal-i32/usub_sat_plus.ll
Log Message:
-----------
[RISCV] Custom promote i32 UADDSAT/USUBSAT for -riscv-experimental-rv64-legal-i32 with Zbb.
Commit: 146e5ce481f3a9232f2188cc664a65e98f8a0985
https://github.com/llvm/llvm-project/commit/146e5ce481f3a9232f2188cc664a65e98f8a0985
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/uadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/usub_sat_plus.ll
Log Message:
-----------
[RISCV] Add i32 zext.h pattern for -riscv-experimental-rv64-legal-i32.
Commit: ae36790be4a2a6c9dc8900f659c861647cab66d5
https://github.com/llvm/llvm-project/commit/ae36790be4a2a6c9dc8900f659c861647cab66d5
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/tools/llvm-cov/Inputs/mcdc-const-folding.cpp
M llvm/test/tools/llvm-cov/Inputs/mcdc-const-folding.o
M llvm/test/tools/llvm-cov/Inputs/mcdc-const-folding.proftext
M llvm/test/tools/llvm-cov/Inputs/mcdc-const.cpp
M llvm/test/tools/llvm-cov/Inputs/mcdc-const.o
M llvm/test/tools/llvm-cov/Inputs/mcdc-const.proftext
M llvm/test/tools/llvm-cov/Inputs/mcdc-general.cpp
M llvm/test/tools/llvm-cov/Inputs/mcdc-general.o
M llvm/test/tools/llvm-cov/Inputs/mcdc-general.proftext
M llvm/test/tools/llvm-cov/mcdc-const.test
M llvm/test/tools/llvm-cov/mcdc-general-none.test
M llvm/test/tools/llvm-cov/mcdc-general.test
Log Message:
-----------
test/llvm-cov: Regenerate MC/DC tests (#80610)
* Revise instructions for regeneration, not to create executables.
* Add instructions to regenerate both object files and test vectors
(except for `mcdc-general-none.proftext`)
* Reformat
Commit: dcb83692cdeaf7fb620fd14992848b6cbc94f773
https://github.com/llvm/llvm-project/commit/dcb83692cdeaf7fb620fd14992848b6cbc94f773
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Log Message:
-----------
[Bitcode] Use range-based for loops (NFC)
Commit: 90e9c6e36e8b928240dfd61c2dfd30cf26108c07
https://github.com/llvm/llvm-project/commit/90e9c6e36e8b928240dfd61c2dfd30cf26108c07
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Object/COFFModuleDefinition.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Support/FormatVariadic.cpp
Log Message:
-----------
[llvm] Use StringRef::consume_front (NFC)
Commit: ffaedc2735cfcf2595fe65a75ed910a9c661391b
https://github.com/llvm/llvm-project/commit/ffaedc2735cfcf2595fe65a75ed910a9c661391b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
Log Message:
-----------
[Basic] Simplify uses of StringRef::consume_front (NFC)
Commit: e7d3a4f34adbe9ea183c2ec4aea97691d4ec06f5
https://github.com/llvm/llvm-project/commit/e7d3a4f34adbe9ea183c2ec4aea97691d4ec06f5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck] Simplify a use of StringRef::consume_front (NFC)
Commit: 92d5f644281cba56baa9b42dfc298db7f2c30003
https://github.com/llvm/llvm-project/commit/92d5f644281cba56baa9b42dfc298db7f2c30003
Author: Kazu Hirata <kazu at google.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
Log Message:
-----------
[clang-tidy] Use StringRef::contains (NFC)
Commit: f72da9f4fd389951c4d65055f5471e208f256212
https://github.com/llvm/llvm-project/commit/f72da9f4fd389951c4d65055f5471e208f256212
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SelectionDAG] Use getShiftAmountConstant to simplify code. NFC (#80561)
Replace calls to getShiftAmountTy+getConstant with
getShiftAmountContant.
Commit: 6590d0fed5180a403c32c991baed56f9d39e045a
https://github.com/llvm/llvm-project/commit/6590d0fed5180a403c32c991baed56f9d39e045a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/ARM/shift-combine.ll
M llvm/test/CodeGen/X86/h-registers-2.ll
Log Message:
-----------
[DAGCombiner][ARM] Teach reduceLoadWidth to handle (and (srl (load), C, ShiftedMask)) (#80342)
If we have a shifted mask, we may be able to reduce the load width
to the width of the non-zero part of the mask and use an offset
to the base address to remove the srl. The offset is given by
C+trailingzeros(ShiftedMask).
Then we add a final shl to restore the trailing zero bits.
I've use the ARM test because that's where the existing (and (srl
(load))) tests were.
The X86 test was modified to keep the H register.
Commit: 34c4a0fa2b9c2181bfdbd3009e7956a50a28dab6
https://github.com/llvm/llvm-project/commit/34c4a0fa2b9c2181bfdbd3009e7956a50a28dab6
Author: ZijunZhaoCCK <88353225+ZijunZhaoCCK at users.noreply.github.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-char.cpp
M clang/lib/Driver/Driver.cpp
M clang/test/CodeGen/fp128_complex.c
M clang/test/Driver/mips-features.c
M clang/test/Frontend/fixed_point_bit_widths.c
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
[Driver] Report invalid target triple versions for all environment types. (#78655)
Followup for https://github.com/llvm/llvm-project/pull/75373
1. Make this feature not just available for android, but everyone.
2. Correct some target triples.
3. Add opencl to the environment type list.
Commit: b53169dfec89d89b292c550d6f6dec3ed6a61ba5
https://github.com/llvm/llvm-project/commit/b53169dfec89d89b292c550d6f6dec3ed6a61ba5
Author: Sheng <ox59616e at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/include/mlir/IR/AffineMap.h
Log Message:
-----------
[NFC][mlir] Fix Typo.
Commit: 067882cfe970a4ad7fef1432f5fa24fa33150d25
https://github.com/llvm/llvm-project/commit/067882cfe970a4ad7fef1432f5fa24fa33150d25
Author: Anton Korobeynikov <anton at korobeynikov.info>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
A .github/workflows/email-check.yaml
Log Message:
-----------
Add github workflow that checks if a private email address was used to contribute to the repo and warn in this case (#80514)
Following the Discourse discussion, warn in case of a private email address was used in a PR.
Commit: 4926f12ff53fd4e67ac08b7355aeffed15584088
https://github.com/llvm/llvm-project/commit/4926f12ff53fd4e67ac08b7355aeffed15584088
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
[Coverage] ProfileData: Handle MC/DC Bitmap as BitVector. NFC. (#80608)
* `getFunctionBitmap()` stores not `std::vector<uint8_t>` but
`BitVector`.
* `CounterMappingContext` holds `Bitmap` (instead of the ref of bytes)
* `Bitmap` and `BitmapIdx` are used instead of `evaluateBitmap()`.
FIXME: `InstrProfRecord` itself should handle `Bitmap` as `BitVector`.
Commit: 115c0c6513d538ace464887414d1d8f1da7d7208
https://github.com/llvm/llvm-project/commit/115c0c6513d538ace464887414d1d8f1da7d7208
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
A llvm/test/CodeGen/X86/fold-broadcast.ll
Log Message:
-----------
[X86][test] Remove useless pattern for VDPBF16PSZmb and add a test for broadcast folding (#80629)
llvm-issue: https://github.com/llvm/llvm-project/issues/68810
Commit: db060ab0531dd7d8fce9003c0047fb51ec7e4b5d
https://github.com/llvm/llvm-project/commit/db060ab0531dd7d8fce9003c0047fb51ec7e4b5d
Author: Chia <sun1011jacobi at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub-mask.ll
A llvm/test/CodeGen/RISCV/rvv/vwsub-mask-sdnode.ll
Log Message:
-----------
[RISCV][ISel] Remove redundant vmerge for vwsub(u).wv. (#80523)
Commit: 4b34558f43121df9b863ff2492f74fb2e65a5af1
https://github.com/llvm/llvm-project/commit/4b34558f43121df9b863ff2492f74fb2e65a5af1
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M .github/workflows/pr-code-format.yml
Log Message:
-----------
[Github] Fix triggers formatting in code format action
A recent comment modified the job to only run on the main branch, but
the formatting was slightly off, causing the job to not run. This patch
fixes the formatting so the job will run as expected.
Commit: 5afeba051e5c3ad1860cf1642a99e60452d514de
https://github.com/llvm/llvm-project/commit/5afeba051e5c3ad1860cf1642a99e60452d514de
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rv64-legal-i32/sadd_sat.ll
A llvm/test/CodeGen/RISCV/rv64-legal-i32/sadd_sat_plus.ll
A llvm/test/CodeGen/RISCV/rv64-legal-i32/ssub_sat.ll
A llvm/test/CodeGen/RISCV/rv64-legal-i32/ssub_sat_plus.ll
Log Message:
-----------
[RISCV] Custom legalize i32 UADDSAT/USUBSAT for -riscv-experimental-rv64-legal-i32 with Zbb.
This matches the codegen we get from type legalization without
-riscv-experimental-rv64-legal-i32.
Commit: a9670fb0de1cb87fb1556e8cf28d528171f5bd9b
https://github.com/llvm/llvm-project/commit/a9670fb0de1cb87fb1556e8cf28d528171f5bd9b
Author: Kai Luo <lkail at cn.ibm.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Log Message:
-----------
[PowerPC] Fix assertion of InstDisp for local-exec TLS. NFC.
Fixes https://github.com/llvm/llvm-project/issues/80557.
Commit: f035c018a6a581c38680651d4856631d9c6ccb0a
https://github.com/llvm/llvm-project/commit/f035c018a6a581c38680651d4856631d9c6ccb0a
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/ProfileData/InstrProfReader.cpp
Log Message:
-----------
InstrProf::getFunctionBitmap: Fix BE hosts (#80608)
Commit: ae5ed2a5d873e1785f06bd74cb583a4e88604317
https://github.com/llvm/llvm-project/commit/ae5ed2a5d873e1785f06bd74cb583a4e88604317
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Sema/SemaRISCVVectorLookup.cpp
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwmaccbf16.c
M clang/test/Sema/rvv-required-features-invalid.c
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[RISCV][clang] Add Zvfbfwma C intrinsics support (#79615)
Commit: 8ed046fc15eae08a9cf7ec02974330d52606c663
https://github.com/llvm/llvm-project/commit/8ed046fc15eae08a9cf7ec02974330d52606c663
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-04 (Sun, 04 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/sadd_sat.ll
M llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/ssub_sat.ll
M llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
Log Message:
-----------
[RISCV] Custom type legalize i32 SADDSAT/SSUBSAT without Zbb.
While working on -riscv-experimental-rv64-legal-i32, I noticed this
missed optimization in our current codegen.
This expands to SADDO/SSUBO+select while still in i32. These will
be type legalized individually.
Commit: 500846d2f542c93e349161a39a1baae0f1f6fad0
https://github.com/llvm/llvm-project/commit/500846d2f542c93e349161a39a1baae0f1f6fad0
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/CodeGenCUDA/amdgpu-code-object-version-linking.cu
M clang/test/CodeGenCUDA/amdgpu-code-object-version.cu
M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
A clang/test/Driver/Inputs/rocm/amdgcn/bitcode/oclc_abi_version_600.bc
M clang/test/Driver/hip-code-object-version.hip
M clang/test/Driver/hip-device-libs.hip
M clang/test/Misc/warning-flags.c
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Lower/AMD/code-object-version.f90
M lld/ELF/Arch/AMDGPU.cpp
M lld/test/ELF/amdgpu-tid.s
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/Support/AMDGPUMetadata.h
M llvm/include/llvm/Support/ScopedPrinter.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
M llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
M llvm/test/CodeGen/AMDGPU/enable-scratch-only-dynamic-stack.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-dead-function.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
A llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
A llvm/test/tools/llvm-readobj/ELF/AMDGPU/generic_versions.s
A llvm/test/tools/llvm-readobj/ELF/AMDGPU/generic_versions.test
R llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[AMDGPU] Introduce Code Object V6 (#76954)
Introduce Code Object V6 in Clang, LLD, Flang and LLVM. This is the same
as V5 except a new "generic version" flag can be present in EFLAGS. This
is related to new generic targets that'll be added in a follow-up patch.
It's also likely V6 will have new changes (possibly new metadata
entries) added later.
Docs change are part of the follow-up patch #76955
Commit: 6e3e8856d442295d8912d8e0c87f6018b4553972
https://github.com/llvm/llvm-project/commit/6e3e8856d442295d8912d8e0c87f6018b4553972
Author: Dani <DanielKristofKiss at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[NFC][Clang] Replace Arch with Triplet. (#80465)
Commit: 0f8680b9d87fa9e8839bd8e39ce605d64148ace6
https://github.com/llvm/llvm-project/commit/0f8680b9d87fa9e8839bd8e39ce605d64148ace6
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/generic_versions.s
Log Message:
-----------
[llvm-readobj] Require AMDGPU target for generic_version.s
Commit: cfa0833ccc7450a322e709583e894e4c96ce682e
https://github.com/llvm/llvm-project/commit/cfa0833ccc7450a322e709583e894e4c96ce682e
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/utils/TableGen/GlobalISel/CMakeLists.txt
A llvm/utils/TableGen/GlobalISel/CombinerUtils.cpp
M llvm/utils/TableGen/GlobalISel/CombinerUtils.h
A llvm/utils/TableGen/GlobalISel/PatternParser.cpp
A llvm/utils/TableGen/GlobalISel/PatternParser.h
M llvm/utils/TableGen/GlobalISel/Patterns.cpp
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
[NFC][TableGen][GlobalISel] Move MIR Pattern Parsing out of Combiner Impl (#80257)
This just moves code around so the MIR pattern parsing logic is
separated and reusable.
Commit: a73baf620b8374805b7e927cc79cc157a30e0ac8
https://github.com/llvm/llvm-project/commit/a73baf620b8374805b7e927cc79cc157a30e0ac8
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/Analysis/ReachableCode.cpp
A clang/test/SemaCXX/coroutine-unreachable-warning.cpp
Log Message:
-----------
[coroutine] Suppress unreachable-code warning on coroutine statements. (#77454)
This fixes #69219.
Consider an example:
```
CoTask my_coroutine() {
std::abort();
co_return 1; // unreachable code warning.
}
```
Clang emits a CFG-based unreachable warning on the `co_return` statement
(precisely the `1` subexpr). If we remove this statement, the program
semantic is changed (my_coroutine is not a coroutine anymore).
This patch fixes this issue by never considering coroutine statements as
dead statements.
Commit: ab460797f3af80bd262648d4dd306ef751d4e0f6
https://github.com/llvm/llvm-project/commit/ab460797f3af80bd262648d4dd306ef751d4e0f6
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/utils/TableGen/GlobalISel/CMakeLists.txt
Log Message:
-----------
[TableGen] Trying fix for PatternParser linker error
There is an implicit dependency here and we can't call CodeGenIntrinsics.cpp functions from PatternParser.cpp reliably, so some build bots were failing.
Try to add LLVMTableGenCommon to the list of source files to see if it fixes it, if it doesn't , I'll revert.
Commit: 0a888fade2600dce737bc356a158e44c8f59b616
https://github.com/llvm/llvm-project/commit/0a888fade2600dce737bc356a158e44c8f59b616
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
Log Message:
-----------
[clangd] Handle IndirectFieldDecl in kindForDecl (#80588)
Fixes https://github.com/clangd/clangd/issues/1925
Commit: d11c912f42113764074cf3c8f0aae49f2d288303
https://github.com/llvm/llvm-project/commit/d11c912f42113764074cf3c8f0aae49f2d288303
Author: David Green <david.green at arm.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/sadd_sat.ll
M llvm/test/CodeGen/AArch64/sadd_sat_plus.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/ssub_sat.ll
M llvm/test/CodeGen/AArch64/ssub_sat_plus.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/uadd_sat.ll
M llvm/test/CodeGen/AArch64/uadd_sat_plus.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat.ll
M llvm/test/CodeGen/AArch64/usub_sat_plus.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
Log Message:
-----------
[AArch64][GlobalISel] Addition GISel testing for u/s add_sat and sub_sat. NFC
Commit: 722db781d090fc2fd636c299e5f75a0b72c22372
https://github.com/llvm/llvm-project/commit/722db781d090fc2fd636c299e5f75a0b72c22372
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/utils/TableGen/GlobalISel/CMakeLists.txt
Log Message:
-----------
[TableGen] Exclude LLVMTableGenGlobalISel from "all"
Commit: 991d04d7213bf2747583413ac9b98c7163cf679d
https://github.com/llvm/llvm-project/commit/991d04d7213bf2747583413ac9b98c7163cf679d
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/utils/TableGen/GlobalISel/CMakeLists.txt
R llvm/utils/TableGen/GlobalISel/CombinerUtils.cpp
M llvm/utils/TableGen/GlobalISel/CombinerUtils.h
R llvm/utils/TableGen/GlobalISel/PatternParser.cpp
R llvm/utils/TableGen/GlobalISel/PatternParser.h
M llvm/utils/TableGen/GlobalISel/Patterns.cpp
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
Revert "[NFC][TableGen][GlobalISel] Move MIR Pattern Parsing out of Combiner Impl (#80257)"
This reverts commit cfa0833ccc7450a322e709583e894e4c96ce682e.
Commit: d2b0e23247832c472fe9a96a6bb5784addc92de5
https://github.com/llvm/llvm-project/commit/d2b0e23247832c472fe9a96a6bb5784addc92de5
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/utils/TableGen/GlobalISel/CMakeLists.txt
Log Message:
-----------
Revert "[TableGen] Trying fix for PatternParser linker error"
This reverts commit ab460797f3af80bd262648d4dd306ef751d4e0f6.
Commit: 6deb7cfd74cacda4b460a7f8e1e7a1be012b1b9e
https://github.com/llvm/llvm-project/commit/6deb7cfd74cacda4b460a7f8e1e7a1be012b1b9e
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/utils/TableGen/GlobalISel/CMakeLists.txt
Log Message:
-----------
Revert "[TableGen] Exclude LLVMTableGenGlobalISel from "all""
This reverts commit 722db781d090fc2fd636c299e5f75a0b72c22372.
Commit: 7d2b6f0b355bc98bbe3aa5bae83316a708da33ee
https://github.com/llvm/llvm-project/commit/7d2b6f0b355bc98bbe3aa5bae83316a708da33ee
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/test/Transforms/IndVarSimplify/pr55925.ll
M llvm/test/Transforms/IndVarSimplify/pr79861.ll
Log Message:
-----------
[IndVarSimplify] Fix poison-safety when reusing instructions (#80458)
IndVars may replace an instruction with one of its operands, if they
have the same SCEV expression. However, such a replacement may be more
poisonous.
First, check whether the operand being poison implies that the
instruction is also poison, in which case the replacement is always
safe. If this fails, check whether SCEV can determine that reusing the
instruction is safe, using the same check as SCEVExpander.
Fixes https://github.com/llvm/llvm-project/issues/79861.
Commit: 0a45d172d3229074d414e1942d6bafa2b4ae9126
https://github.com/llvm/llvm-project/commit/0a45d172d3229074d414e1942d6bafa2b4ae9126
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/nullify-polymorphic.f90
Log Message:
-----------
[flang] Do not instantiate runtime info globals in functions (#80447)
Runtime globals are compiler generated globals injected in user scopes.
They are never referred to directly in lowering code, we only need th
fur.global for them. Yet lowering was creating hlfir.declare for them in
module procedures. In modern fortran apps, this blows up the generated
IR for nothing (Types with dozens of components, type bound procedures
and parents can create in the order of 10 000 runtime info globals to
describe them, if there is a 100 module procedure, that is that is a few
million operations generated and processed in each pass for nothing).
Commit: d91bb2fcd35e6fc8fe325d5da035295e34b146ca
https://github.com/llvm/llvm-project/commit/d91bb2fcd35e6fc8fe325d5da035295e34b146ca
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
M llvm/test/Assembler/incomplete-ir-declarations.ll
Log Message:
-----------
[AsmParser] Check whether use is callee when determining function type
The code ended up treating a use in a call argument as if it were
a call. Make sure this is actually the callee use.
Commit: 25ab2fc06b6780335c291fa1fc23c2aec01c34a6
https://github.com/llvm/llvm-project/commit/25ab2fc06b6780335c291fa1fc23c2aec01c34a6
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
Log Message:
-----------
[libc][NFC] Make FPRep more testable (#80453)
Commit: f33a0a483550e3441aae4059d6b3d81eab6a398c
https://github.com/llvm/llvm-project/commit/f33a0a483550e3441aae4059d6b3d81eab6a398c
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Dialect/NVGPU/invalid.mlir
M mlir/test/Dialect/NVGPU/tmaload-transform.mlir
Log Message:
-----------
[mlir][nvgpu] Improve `tensormap.descriptor` Type Verifier (#77904)
This PR improves the verifier for the `nvgpu.tensormap.descriptor` type.
The descriptor contains information for TMA, and the compile-time check
ensures its restrictions, such as the last memory dimension being
128-byte. This prevents runtime crashes.
See cuda driver for more explanation:
https://docs.nvidia.com/cuda/cuda-driver-api/group__CUDA__TENSOR__MEMORY.html#group__CUDA__TENSOR__MEMORY_1ga7c7d2aaac9e49294304e755e6f341d7
Commit: 3e230bb6e1a2668e920ee496121e5e40baeb4552
https://github.com/llvm/llvm-project/commit/3e230bb6e1a2668e920ee496121e5e40baeb4552
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
Log Message:
-----------
[CodeGen] Return ArrayRef from TargetRegisterClass::getRegisters. NFCI. (#80411)
This will allow future patches to use indexing and methods like
drop_front on the result.
Commit: 95403b42da0de500f4f86add7a60b0daf8ec98d0
https://github.com/llvm/llvm-project/commit/95403b42da0de500f4f86add7a60b0daf8ec98d0
Author: Dmitry Polukhin <34227995+dmpolukhin at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang-tools-extra/clang-apply-replacements/tool/ClangApplyReplacementsMain.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-apply-replacements/Inputs/format_header/no.cpp
A clang-tools-extra/test/clang-apply-replacements/Inputs/format_header/no.yaml
A clang-tools-extra/test/clang-apply-replacements/Inputs/format_header/yes.cpp
A clang-tools-extra/test/clang-apply-replacements/Inputs/format_header/yes.yaml
A clang-tools-extra/test/clang-apply-replacements/format-header.cpp
Log Message:
-----------
Apply format only if --format is specified (#79466)
clang-apply-replacements used to apply format even without --format is
specified. This because, methods like createReplacementsForHeaders only
takes the Spec.Style and would re-order the headers even when it was not
requested. The fix is to set up Spec.Style only if --format is provided.
Also added note to ReleaseNotes.rst
Based on https://github.com/llvm/llvm-project/pull/70801
---------
Co-authored-by: Kugan <34810920+kuganv at users.noreply.github.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: b05ba231bf79c43ac7914920b893511b5e362eb2
https://github.com/llvm/llvm-project/commit/b05ba231bf79c43ac7914920b893511b5e362eb2
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FPBits.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Add `next_toward_inf` fo `FPBits` (#80654)
It is needed to provide correct rounding when building FPRep from
greater precision representations.
Commit: 04c1cce33cc9a3f78898a86567459481f02068bb
https://github.com/llvm/llvm-project/commit/04c1cce33cc9a3f78898a86567459481f02068bb
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
Log Message:
-----------
[docs][RISCV] Remove Zicond from release notes now it was backported
Zicond's graduation to non-experimental was backported to 18.x in #80018,
so remove the release note.
Commit: 7d879bc85129cba6608145d9ae5ccfc9d2fcfa1c
https://github.com/llvm/llvm-project/commit/7d879bc85129cba6608145d9ae5ccfc9d2fcfa1c
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll
Log Message:
-----------
[AArch64][PAC] Refine authenticated pointer check methods (#74074)
Align the values of the immediate operand of BRK instruction with those
used by the existing arm64e implementation.
Make AuthCheckMethod::DummyLoad use the requested register
instead of LR.
Commit: 2d69827c5c754f0eca98e497ecf0e52ed54b4fd3
https://github.com/llvm/llvm-project/commit/2d69827c5c754f0eca98e497ecf0e52ed54b4fd3
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
M llvm/test/Transforms/ArgumentPromotion/X86/thiscall.ll
M llvm/test/Transforms/ArgumentPromotion/store-into-inself.ll
M llvm/test/Transforms/Attributor/convergent.ll
M llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll
M llvm/test/Transforms/Attributor/dereferenceable-2.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/ConstraintElimination/reproducer-remarks.ll
M llvm/test/Transforms/Coroutines/coro-async-addr-lifetime-infinite-loop-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-addr-lifetime-start-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-coro-id-async-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-end-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-no-cse-swift-async-context-addr.ll
M llvm/test/Transforms/Coroutines/coro-async-phi.ll
M llvm/test/Transforms/Coroutines/coro-async-unreachable.ll
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
M llvm/test/Transforms/CorrelatedValuePropagation/minmaxabs.ll
M llvm/test/Transforms/CorrelatedValuePropagation/range.ll
M llvm/test/Transforms/CorrelatedValuePropagation/select.ll
M llvm/test/Transforms/CorrelatedValuePropagation/sub.ll
M llvm/test/Transforms/DeadArgElim/byref.ll
M llvm/test/Transforms/DeadArgElim/fct_ptr.ll
M llvm/test/Transforms/GVN/condprop-memdep-invalidation.ll
M llvm/test/Transforms/GVN/pr17732.ll
M llvm/test/Transforms/GVNHoist/hoist-recursive-geps.ll
M llvm/test/Transforms/GVNHoist/infinite-loop-direct.ll
M llvm/test/Transforms/GVNHoist/infinite-loop-indirect.ll
M llvm/test/Transforms/GlobalOpt/2007-06-04-PackedStruct.ll
M llvm/test/Transforms/GlobalOpt/2008-07-17-addrspace.ll
M llvm/test/Transforms/GlobalOpt/GSROA-section.ll
M llvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users-gep-constexpr.ll
M llvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users-other-constexpr.ll
M llvm/test/Transforms/GlobalOpt/cleanup-pointer-root-users-ptrtoint-add-constexpr.ll
M llvm/test/Transforms/GlobalOpt/externally-initialized-aggregate.ll
M llvm/test/Transforms/GlobalOpt/globalsra-partial.ll
M llvm/test/Transforms/GlobalOpt/globalsra.ll
M llvm/test/Transforms/GlobalOpt/invariant.ll
M llvm/test/Transforms/GlobalOpt/malloc-promote-opaque-ptr.ll
M llvm/test/Transforms/GlobalOpt/sra-many-stores-initializers.ll
M llvm/test/Transforms/GlobalOpt/sra-many-stores-once.ll
M llvm/test/Transforms/GlobalOpt/sra-many-stores.ll
M llvm/test/Transforms/IROutliner/nooutline-attribute.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll
M llvm/test/Transforms/Inline/call-intrinsic-objectsize.ll
M llvm/test/Transforms/Inline/inline-byval-bonus.ll
M llvm/test/Transforms/Inline/inlined-loop-metadata-inseltpoison.ll
M llvm/test/Transforms/Inline/inlined-loop-metadata.ll
M llvm/test/Transforms/InstCombine/alloca.ll
M llvm/test/Transforms/InstCombine/call.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/memchr-8.ll
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/opaque_ptr.ll
M llvm/test/Transforms/LoopDistribute/symbolic-stride.ll
M llvm/test/Transforms/LoopFlatten/loop-flatten-negative.ll
M llvm/test/Transforms/LoopFlatten/loop-flatten-version.ll
M llvm/test/Transforms/LoopFlatten/widen-iv.ll
M llvm/test/Transforms/LoopIdiom/lir-heurs-multi-block-loop.ll
M llvm/test/Transforms/LoopInterchange/profitability.ll
M llvm/test/Transforms/LoopLoadElim/type-mismatch-opaque-ptr.ll
M llvm/test/Transforms/LoopSimplify/do-preheader-dbg-inseltpoison.ll
M llvm/test/Transforms/LoopSimplify/do-preheader-dbg.ll
M llvm/test/Transforms/LoopStrengthReduce/Power/memory-intrinsic.ll
M llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold-negative-testcase.ll
M llvm/test/Transforms/LoopUnroll/ARM/mve-nounroll.ll
M llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
M llvm/test/Transforms/MemCpyOpt/vscale-crashes.ll
M llvm/test/Transforms/MoveAutoInit/clobber.ll
M llvm/test/Transforms/NewGVN/flags-simplify.ll
M llvm/test/Transforms/NewGVN/no_speculative_loads_with_asan.ll
M llvm/test/Transforms/NewGVN/pr17732.ll
M llvm/test/Transforms/NewGVN/unreachable_block_infinite_loop.ll
M llvm/test/Transforms/PGOProfile/coverage.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-abs.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/X86/opaque-ptr.ll
M llvm/test/Transforms/SLPVectorizer/X86/stackrestore-dependence.ll
M llvm/test/Transforms/SROA/invariant-group.ll
M llvm/test/Transforms/SROA/phi-gep.ll
M llvm/test/Transforms/SROA/scalable-vector-struct.ll
M llvm/test/Transforms/SROA/sroa-common-type-fail-promotion.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/streaming-compatible-expand-masked-gather-scatter.ll
M llvm/test/Transforms/Util/pr49185.ll
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
M llvm/test/Transforms/VectorCombine/X86/load-widening.ll
Log Message:
-----------
[Transforms] Convert tests to opaque pointers (NFC)
Commit: ddd95b15d102331ecb7ce94dcf3a7280e0a133fa
https://github.com/llvm/llvm-project/commit/ddd95b15d102331ecb7ce94dcf3a7280e0a133fa
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll
M llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue-inlined.ll
M llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue.ll
Log Message:
-----------
[RemoveDIs] Handle DPValues in hoistCommonCodeFromSuccessors (#79476)
Hoist DPValues attached to each instruction being considered for hoisting if
they are identical in lock-step. This includes the final instructions which
are considered but not hoisted, because the corresponding dbg.values would
appear before those instruction and thus hoisted if identical.
Identical debug records hoisted:
llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue.ll
Non-identical debug records not hoisted:
llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll
Debug records attached to first not-hoisted instructions are hoisted:
llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue-inlined.ll
Commit: 9dd40f8c85a30b247dfa47d7ec4353eb69522876
https://github.com/llvm/llvm-project/commit/9dd40f8c85a30b247dfa47d7ec4353eb69522876
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
Log Message:
-----------
[docs][RISCV] Update release notes to include Zalasr and S* extensions from profiles spec
Also reflow the line for Zabha, as we normally line-wrap this file.
Commit: 1aee1e1f4c4b504becc06521546de992a662694b
https://github.com/llvm/llvm-project/commit/1aee1e1f4c4b504becc06521546de992a662694b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/Analysis/BasicAA/assume-index-positive.ll
M llvm/test/Analysis/BasicAA/index-size.ll
M llvm/test/Analysis/BasicAA/noalias-bugs.ll
M llvm/test/Analysis/BasicAA/vscale.ll
M llvm/test/Analysis/BlockFrequencyInfo/basic.ll
M llvm/test/Analysis/BlockFrequencyInfo/irreducible_loop_crash.ll
M llvm/test/Analysis/BlockFrequencyInfo/irreducible_pgo.ll
M llvm/test/Analysis/BlockFrequencyInfo/loop_with_invoke.ll
M llvm/test/Analysis/BlockFrequencyInfo/loops_with_profile_info.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-5.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-7.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-8.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-5.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-6.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-7.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-8.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-7.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-8.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-5.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-7.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-8.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-5.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-6.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-7.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-8.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-4.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-5.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-7.ll
M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-8.ll
M llvm/test/Analysis/Dominators/2007-01-14-BreakCritEdges.ll
M llvm/test/Analysis/Dominators/2007-07-12-SplitBlock.ll
M llvm/test/Analysis/Dominators/invoke.ll
M llvm/test/Analysis/FunctionPropertiesAnalysis/matmul.ll
M llvm/test/Analysis/IVUsers/deep_recursion_in_scev.ll
M llvm/test/Analysis/LazyCallGraph/non-leaf-intrinsics.ll
M llvm/test/Analysis/LazyValueAnalysis/invalidation.ll
M llvm/test/Analysis/LoopAccessAnalysis/forked-pointers.ll
M llvm/test/Analysis/LoopAccessAnalysis/underlying-objects-2.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/LoopnestFixedSize.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/loads-store.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matvecmul.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/single-store.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/stencil.ll
M llvm/test/Analysis/LoopCacheAnalysis/compute-cost.ll
M llvm/test/Analysis/LoopInfo/annotated-parallel-complex.ll
M llvm/test/Analysis/LoopInfo/annotated-parallel-simple.ll
M llvm/test/Analysis/LoopNestAnalysis/duplicate-successors.ll
M llvm/test/Analysis/LoopNestAnalysis/imperfectnest.ll
M llvm/test/Analysis/LoopNestAnalysis/infinite.ll
M llvm/test/Analysis/LoopNestAnalysis/perfectnest.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/atomics.ll
Log Message:
-----------
[Analysis] Convert tests to opaque pointers (NFC)
Commit: 0940be158104e055ab255ccb5c1af9c7ccc7358f
https://github.com/llvm/llvm-project/commit/0940be158104e055ab255ccb5c1af9c7ccc7358f
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/docs/Bufferization.md
M mlir/include/mlir/Dialect/Bufferization/Pipelines/Passes.h
M mlir/lib/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation.cpp
M mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/dealloc-callop-interface.mlir
M mlir/test/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation/dealloc-function-boundaries.mlir
Log Message:
-----------
[mlir][bufferization] Never pass ownership to functions (#80655)
Even when `private-function-dynamic-ownership` is set, ownership should
never be passed to the callee. This can lead to double deallocs (#77096)
or use-after-free in the caller because ownership is currently passed
regardless of whether there are any further uses of the buffer in the
caller or not.
Note: This is consistent with the fact that ownership is never passed to
nested regions.
This commit fixes #77096.
Commit: 13e52b32790e3c3d2fb16139f082a588b4e0f4db
https://github.com/llvm/llvm-project/commit/13e52b32790e3c3d2fb16139f082a588b4e0f4db
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
Log Message:
-----------
[docs][RISCV] Add missed release note for Zimop codegen support
Commit: 84ea236af9f36d409d2c45c66f8a8b6eb027935d
https://github.com/llvm/llvm-project/commit/84ea236af9f36d409d2c45c66f8a8b6eb027935d
Author: David Green <david.green at arm.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/test/Analysis/AliasSet/memloc-vscale.ll
M llvm/test/Analysis/BasicAA/vscale.ll
Log Message:
-----------
[BasicAA] Handle scalable type sizes with constant offsets (#80445)
This is a separate, but related issue to #69152 that was attempting to improve
AA with scalable dependency distances. This patch attempts to improve when
there are scalable accesses with a constant offset between them. We happen to
get a report of such a thing recently, where so long as the vscale_range is
known, the maximum size of the access can be assessed and better aliasing
results can be returned.
The Upper range of the vscale_range, along with known part of the typesize are
used to prove that Off >= CR.upper * LSize. It does not try to produce
PartialAlias results at the moment from the lower vscale_range. It also enables
the added benefit of allowing better alias analysis when the RHS of the two
values is scalable, but the LHS is normal and can be treated like any other
aliasing query.
Commit: 1ee315ae7964c8433b772e0b5d667834994ba753
https://github.com/llvm/llvm-project/commit/1ee315ae7964c8433b772e0b5d667834994ba753
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-ext-debugloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-sext-debugloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir
M llvm/test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy-forced.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-blockaddress.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-with-success.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-dyn-alloca.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global-pic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector-of-ptr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/load-addressing-modes.mir
M llvm/test/CodeGen/AArch64/GlobalISel/localizer.mir
M llvm/test/CodeGen/AArch64/GlobalISel/non-pow-2-extload-combine.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-extending-loads.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-xclass-copies.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-icmp-to-true-false-known-bits.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-copy-prop-disabled.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-s1.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-add-low.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-atomic-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-blockaddress.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-extload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ldaxr-intrin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ldxr-intrin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-load-store-vector-of-ptr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-load.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-pr32733.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-returnaddress-liveins.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-sextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-stlxr-intrin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-store-truncating-float.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-stx.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/sext-inreg-ldrow-16b.mir
M llvm/test/CodeGen/AArch64/GlobalISel/store-addressing-modes.mir
M llvm/test/CodeGen/AArch64/GlobalISel/store-merging.mir
M llvm/test/CodeGen/AArch64/PBQP-csr.ll
M llvm/test/CodeGen/AArch64/a55-fuse-address.mir
M llvm/test/CodeGen/AArch64/aarch64-dup-ext-crash.ll
M llvm/test/CodeGen/AArch64/aarch64-ldst-no-premature-sp-pop.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.mir
M llvm/test/CodeGen/AArch64/aarch64-p2align-max-bytes-neoverse.ll
M llvm/test/CodeGen/AArch64/aarch64-p2align-max-bytes.ll
M llvm/test/CodeGen/AArch64/add-i256.ll
M llvm/test/CodeGen/AArch64/addrsig-macho.ll
M llvm/test/CodeGen/AArch64/align-down.ll
M llvm/test/CodeGen/AArch64/arm64-collect-loh.ll
M llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-bad-outline.mir
M llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog.ll
M llvm/test/CodeGen/AArch64/arm64-ldp.ll
M llvm/test/CodeGen/AArch64/arm64-misched-basic-A53.ll
M llvm/test/CodeGen/AArch64/arm64-misched-basic-A57.ll
M llvm/test/CodeGen/AArch64/arm64-non-pow2-ldst.ll
M llvm/test/CodeGen/AArch64/arm64-preserve-all.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/branch-relax-block-size.mir
M llvm/test/CodeGen/AArch64/compute-call-frame-size-unreachable-pass.ll
M llvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll
M llvm/test/CodeGen/AArch64/dag-combine-lifetime-end-store-typesize.ll
M llvm/test/CodeGen/AArch64/dag-combine-trunc-build-vec.ll
M llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir
M llvm/test/CodeGen/AArch64/divrem.ll
M llvm/test/CodeGen/AArch64/dont-shrink-wrap-stack-mayloadorstore.mir
M llvm/test/CodeGen/AArch64/early-ifcvt-regclass-mismatch.mir
M llvm/test/CodeGen/AArch64/elim-dead-mi.mir
M llvm/test/CodeGen/AArch64/expand-blr-rvmarker-pseudo.mir
M llvm/test/CodeGen/AArch64/fmov-imm-licm.ll
M llvm/test/CodeGen/AArch64/inline-asm-constraints-bad-sve.ll
M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
M llvm/test/CodeGen/AArch64/irg-nomem.mir
M llvm/test/CodeGen/AArch64/ldradr.ll
M llvm/test/CodeGen/AArch64/ldst-nopreidx-sp-redzone.mir
M llvm/test/CodeGen/AArch64/ldst-opt-aa.mir
M llvm/test/CodeGen/AArch64/ldst-opt-non-imm-offset.mir
M llvm/test/CodeGen/AArch64/ldst-opt-zr-clobber.mir
M llvm/test/CodeGen/AArch64/machine-combiner-fmul-dup.mir
M llvm/test/CodeGen/AArch64/machine-outliner-bti.mir
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
M llvm/test/CodeGen/AArch64/machine-scheduler.mir
M llvm/test/CodeGen/AArch64/memcpy-scoped-aa.ll
M llvm/test/CodeGen/AArch64/merge-scoped-aa-store.ll
M llvm/test/CodeGen/AArch64/merge-store.ll
M llvm/test/CodeGen/AArch64/multi-vector-load-size.ll
M llvm/test/CodeGen/AArch64/nontemporal-load.ll
M llvm/test/CodeGen/AArch64/pre-indexed-addrmode-with-constant-offset.ll
M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
M llvm/test/CodeGen/AArch64/rvmarker-pseudo-expansion-and-outlining.mir
M llvm/test/CodeGen/AArch64/sched-movprfx.ll
M llvm/test/CodeGen/AArch64/settag-merge.mir
M llvm/test/CodeGen/AArch64/sme-intrinsics-mova-extract.ll
M llvm/test/CodeGen/AArch64/speculation-hardening-sls.mir
M llvm/test/CodeGen/AArch64/speculation-hardening.mir
M llvm/test/CodeGen/AArch64/spillfill-sve.ll
M llvm/test/CodeGen/AArch64/stack-guard-reassign-sve.mir
M llvm/test/CodeGen/AArch64/stack-guard-reassign.mir
M llvm/test/CodeGen/AArch64/stack-guard-sve.ll
M llvm/test/CodeGen/AArch64/stack-probing-64k.ll
M llvm/test/CodeGen/AArch64/stack-tagging-cfi.ll
M llvm/test/CodeGen/AArch64/stp-opt-with-renaming-ld3.mir
M llvm/test/CodeGen/AArch64/stp-opt-with-renaming-undef-assert.mir
M llvm/test/CodeGen/AArch64/sub-of-bias.ll
M llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll
M llvm/test/CodeGen/AArch64/sve-alloca.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
M llvm/test/CodeGen/AArch64/sve-dead-masked-store.ll
M llvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
M llvm/test/CodeGen/AArch64/sve-fold-vscale.ll
M llvm/test/CodeGen/AArch64/sve-forward-st-to-ld.ll
M llvm/test/CodeGen/AArch64/sve-fp.ll
M llvm/test/CodeGen/AArch64/sve-fpext-load.ll
M llvm/test/CodeGen/AArch64/sve-fptrunc-store.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
M llvm/test/CodeGen/AArch64/sve-gep.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-contiguous-prefetches.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ldst-ext.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-mask-ldst-ext.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-imm-addr-mode.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-ld1r.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-trunc.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-redundant-store.ll
M llvm/test/CodeGen/AArch64/sve-setcc.ll
M llvm/test/CodeGen/AArch64/sve-split-load.ll
M llvm/test/CodeGen/AArch64/sve-split-store.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ptest.ll
M llvm/test/CodeGen/AArch64/sve-trunc.ll
M llvm/test/CodeGen/AArch64/sve-uunpklo-load-uzp1-store-combine.ll
M llvm/test/CodeGen/AArch64/sve-varargs-callee-broken.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-ld1-single.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-multivec-loads.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-multivec-stores.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-st1-single.ll
M llvm/test/CodeGen/AArch64/swift-error-unreachable-use.ll
M llvm/test/CodeGen/AArch64/taildup-addrtaken.mir
M llvm/test/CodeGen/AArch64/tailmerging_in_mbp.ll
M llvm/test/CodeGen/AArch64/tiny-model-pic.ll
M llvm/test/CodeGen/AArch64/tiny-model-static.ll
M llvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir
M llvm/test/CodeGen/AArch64/v3f-to-int.ll
M llvm/test/CodeGen/AArch64/win-catchpad-nested-cxx.ll
M llvm/test/CodeGen/AArch64/wineh-frame5.mir
M llvm/test/CodeGen/AArch64/wineh-frame6.mir
M llvm/test/CodeGen/AArch64/wineh-frame7.mir
M llvm/test/CodeGen/AArch64/wineh-frame8.mir
M llvm/test/CodeGen/AArch64/wineh5.mir
M llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir
M llvm/test/CodeGen/AArch64/wrong-callee-save-size-after-livedebugvariables.mir
M llvm/test/CodeGen/AArch64/zero-reg.ll
Log Message:
-----------
[AArch64] Convert tests to opaque pointers (NFC)
Commit: 1d3d8936baf9f15e23603bbb1cfe0a5610d458d3
https://github.com/llvm/llvm-project/commit/1d3d8936baf9f15e23603bbb1cfe0a5610d458d3
Author: Yi Wu <yi.wu2 at arm.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/atan2d.f90
A flang/test/Lower/Intrinsics/atan2pi.f90
M flang/test/Lower/Intrinsics/atand.f90
A flang/test/Lower/Intrinsics/atanpi.f90
Log Message:
-----------
[flang] Fix for atand(Y,X), and implment atan2d(Y,X), atanpi(X), atanpi(Y,X), atan2pi(Y,X) (#79002)
Fix: https://github.com/llvm/llvm-project/issues/78568
---------
Co-authored-by: jeanPerier <jean.perier.polytechnique at gmail.com>
Commit: 00a4e248dc65d3a60fd900b342d4ba410bf70af0
https://github.com/llvm/llvm-project/commit/00a4e248dc65d3a60fd900b342d4ba410bf70af0
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2b.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.single.2c.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-constexpr-alias.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-with-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf-unsupported.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-array-aggregate.ll
M llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
Log Message:
-----------
[AMDGPU] Convert tests to opaque pointers (NFC)
Commit: 6e83c0a1cbfdb0c0f13c282312c47c7945970f55
https://github.com/llvm/llvm-project/commit/6e83c0a1cbfdb0c0f13c282312c47c7945970f55
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/X86/AMX/amx-combine.ll
M llvm/test/CodeGen/X86/AMX/amx-tile-complex-internals.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
M llvm/test/CodeGen/X86/MergeConsecutiveStores.ll
M llvm/test/CodeGen/X86/PR37310.mir
M llvm/test/CodeGen/X86/atomic-dagsched.ll
M llvm/test/CodeGen/X86/atomic-nocx16.ll
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change2.mir
M llvm/test/CodeGen/X86/avoid-sfb-g-no-change3.mir
M llvm/test/CodeGen/X86/avoid-sfb-kill-flags.mir
M llvm/test/CodeGen/X86/avoid-sfb-offset.mir
M llvm/test/CodeGen/X86/avx512f-256-set0.mir
M llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll
M llvm/test/CodeGen/X86/basic-block-labels-mir-parse.mir
M llvm/test/CodeGen/X86/basic-block-sections-module1.ll
M llvm/test/CodeGen/X86/basic-block-sections-module2.ll
M llvm/test/CodeGen/X86/block-placement.ll
M llvm/test/CodeGen/X86/callbr-asm-sink.ll
M llvm/test/CodeGen/X86/cmp.ll
M llvm/test/CodeGen/X86/code-model-kernel.ll
M llvm/test/CodeGen/X86/code_placement.ll
M llvm/test/CodeGen/X86/complex-asm.ll
M llvm/test/CodeGen/X86/crash.ll
M llvm/test/CodeGen/X86/fastisel-memset-flush.ll
M llvm/test/CodeGen/X86/function-alias.ll
M llvm/test/CodeGen/X86/funnel-shift.ll
M llvm/test/CodeGen/X86/large-constants-x32.ll
M llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll
M llvm/test/CodeGen/X86/madd.ll
M llvm/test/CodeGen/X86/memcpy-scoped-aa.ll
M llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir
M llvm/test/CodeGen/X86/pr44140.ll
M llvm/test/CodeGen/X86/pr48064.mir
M llvm/test/CodeGen/X86/pre-coalesce-2.ll
M llvm/test/CodeGen/X86/sad.ll
M llvm/test/CodeGen/X86/select-neg.ll
M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/stack-protector-dbginfo.ll
M llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
M llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
M llvm/test/CodeGen/X86/tailcc-dwarf.ll
M llvm/test/CodeGen/X86/threadlocal_address.ll
M llvm/test/CodeGen/X86/win64-byval.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppCatchDotDotDot.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppCondiTemps.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-CppDtors01.ll
M llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
Log Message:
-----------
[X86] Convert tests to opaque pointers (NFC)
Commit: 60732c0fae56829c5475091de678ad46f0ce6287
https://github.com/llvm/llvm-project/commit/60732c0fae56829c5475091de678ad46f0ce6287
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/EvaluationResult.cpp
Log Message:
-----------
[clang][Interp][NFC] Remove superfluous return statement
Commit: 69ffa7be3bda5547d7a41233f86b88539616e386
https://github.com/llvm/llvm-project/commit/69ffa7be3bda5547d7a41233f86b88539616e386
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/avx2-vector-shifts.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
M llvm/test/CodeGen/X86/combine-mul.ll
M llvm/test/CodeGen/X86/combine-srl.ll
M llvm/test/CodeGen/X86/i64-to-float.ll
M llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
M llvm/test/CodeGen/X86/icmp-pow2-mask.ll
M llvm/test/CodeGen/X86/masked_store_trunc.ll
M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/pr62014.ll
M llvm/test/CodeGen/X86/psubus.ll
M llvm/test/CodeGen/X86/sadd_sat_vec.ll
M llvm/test/CodeGen/X86/sext-vsetcc.ll
M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/sse41.ll
M llvm/test/CodeGen/X86/ssub_sat_vec.ll
M llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vec_cmp_sint-128.ll
M llvm/test/CodeGen/X86/vec_compare-sse4.ll
M llvm/test/CodeGen/X86/vec_minmax_sint.ll
M llvm/test/CodeGen/X86/vec_saddo.ll
M llvm/test/CodeGen/X86/vec_setcc-2.ll
M llvm/test/CodeGen/X86/vec_smulo.ll
M llvm/test/CodeGen/X86/vec_ssubo.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/vector-bo-select.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
M llvm/test/CodeGen/X86/vector-mul.ll
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
M llvm/test/CodeGen/X86/vector-reduce-smax.ll
M llvm/test/CodeGen/X86/vector-reduce-smin.ll
M llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
M llvm/test/CodeGen/X86/vector-trunc-math.ll
M llvm/test/CodeGen/X86/vector-trunc-packus.ll
M llvm/test/CodeGen/X86/vector-trunc-ssat.ll
M llvm/test/CodeGen/X86/vector-trunc-usat.ll
M llvm/test/CodeGen/X86/vector-trunc.ll
M llvm/test/CodeGen/X86/vector-unsigned-cmp.ll
M llvm/test/CodeGen/X86/vselect-pcmp.ll
M llvm/test/CodeGen/X86/vselect-post-combine.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] X86FixupVectorConstants - load+zero vector constants that can be stored in a truncated form (#80428)
Further develops the vsextload support added in #79815 / b5d35feacb7246573c6a4ab2bddc4919a4228ed5 - reduces the size of the vector constant by storing it in the constant pool in a truncated form, and zero-extend it as part of the load.
Commit: bc82d1a6b7f8a795e923b10e8ef0fdc34628a48e
https://github.com/llvm/llvm-project/commit/bc82d1a6b7f8a795e923b10e8ef0fdc34628a48e
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/omptarget-parallel-wsloop.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/LLVMIR/openmp-teams.mlir
Log Message:
-----------
[OpenMPIRBuilder][MLIR] Pass target-cpu and target-features to outlined functions (#80283)
This patch adds support for forwarding the target-cpu and
target-features attributes to functions outlined in the OpenMPIRBuilder.
This, in turn, results in the addition of these attributes for functions
created during the translation of the `omp.parallel`, `omp.task` and
`omp.teams` operations, and for the `omp.wsloop` operation when doing
codegen for an OpenMP target device.
Commit: c391f285afdfd800a251b4ef6d0bbadbbe9069ff
https://github.com/llvm/llvm-project/commit/c391f285afdfd800a251b4ef6d0bbadbbe9069ff
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
A clang/test/AST/Interp/atomic.cpp
Log Message:
-----------
[clang][Interp][NFC] Add simple test case for atomic types
Commit: 6ba9d2988ba471d3a1620da64d5a08f2edfe91ed
https://github.com/llvm/llvm-project/commit/6ba9d2988ba471d3a1620da64d5a08f2edfe91ed
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/math/CMakeLists.txt
A libc/src/math/ceilf128.h
A libc/src/math/floorf128.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/ceilf128.cpp
A libc/src/math/generic/floorf128.cpp
A libc/src/math/generic/roundf128.cpp
A libc/src/math/generic/truncf128.cpp
A libc/src/math/roundf128.h
A libc/src/math/truncf128.h
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/ceilf128_test.cpp
A libc/test/src/math/smoke/floorf128_test.cpp
A libc/test/src/math/smoke/roundf128_test.cpp
A libc/test/src/math/smoke/truncf128_test.cpp
Log Message:
-----------
[libc][math] Add float128 rounding functions (ceilf128, floorf128, roundf128, truncf128). (#80634)
Commit: d4ef4b818929732bcb68a536ef2c91891c0ad179
https://github.com/llvm/llvm-project/commit/d4ef4b818929732bcb68a536ef2c91891c0ad179
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/api.td
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/float128.h
M libc/spec/spec.td
M libc/spec/stdc.td
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/macros/properties/CMakeLists.txt
M libc/src/__support/macros/properties/float.h
Log Message:
-----------
[libc] Fix generated float128 header for aarch64 target. (#78017)
Commit: 7bdc80f35c325d148b1ddbdfce7dea8c6ba7af84
https://github.com/llvm/llvm-project/commit/7bdc80f35c325d148b1ddbdfce7dea8c6ba7af84
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AVR/PR37143.ll
M llvm/test/CodeGen/AVR/alloca.ll
M llvm/test/CodeGen/AVR/atomics/load-store-16-unexpected-register-bug.ll
M llvm/test/CodeGen/AVR/atomics/load16.ll
M llvm/test/CodeGen/AVR/atomics/load32.ll
M llvm/test/CodeGen/AVR/atomics/load64.ll
M llvm/test/CodeGen/AVR/atomics/load8.ll
M llvm/test/CodeGen/AVR/atomics/store.ll
M llvm/test/CodeGen/AVR/atomics/store16.ll
M llvm/test/CodeGen/AVR/atomics/swap.ll
M llvm/test/CodeGen/AVR/avr-rust-issue-123.ll
M llvm/test/CodeGen/AVR/block-address-is-in-progmem-space.ll
M llvm/test/CodeGen/AVR/brind.ll
M llvm/test/CodeGen/AVR/call.ll
M llvm/test/CodeGen/AVR/calling-conv/c/basic.ll
M llvm/test/CodeGen/AVR/calling-conv/c/basic_aggr.ll
M llvm/test/CodeGen/AVR/calling-conv/c/stack.ll
M llvm/test/CodeGen/AVR/ctors.ll
M llvm/test/CodeGen/AVR/directmem.ll
M llvm/test/CodeGen/AVR/dynalloca.ll
M llvm/test/CodeGen/AVR/elpm.ll
M llvm/test/CodeGen/AVR/features/avr-tiny.ll
M llvm/test/CodeGen/AVR/features/xmega_io.ll
M llvm/test/CodeGen/AVR/frmidx-iterator-bug.ll
M llvm/test/CodeGen/AVR/high-pressure-on-ptrregs.ll
M llvm/test/CodeGen/AVR/icall-func-pointer-correct-addr-space.ll
M llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll
M llvm/test/CodeGen/AVR/inline-asm/inline-asm.ll
M llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll
M llvm/test/CodeGen/AVR/inline-asm/loadstore.ll
M llvm/test/CodeGen/AVR/integration/blink.ll
M llvm/test/CodeGen/AVR/interrupts.ll
M llvm/test/CodeGen/AVR/intrinsics/stacksave-restore.ll
M llvm/test/CodeGen/AVR/io.ll
M llvm/test/CodeGen/AVR/issue-regalloc-stackframe-folding-earlyclobber.ll
M llvm/test/CodeGen/AVR/load.ll
M llvm/test/CodeGen/AVR/lpmx.ll
M llvm/test/CodeGen/AVR/pr43443-ctor-alias.ll
M llvm/test/CodeGen/AVR/progmem-extended.ll
M llvm/test/CodeGen/AVR/progmem.ll
M llvm/test/CodeGen/AVR/rust-avr-bug-112.ll
M llvm/test/CodeGen/AVR/rust-avr-bug-37.ll
M llvm/test/CodeGen/AVR/rust-avr-bug-95.ll
M llvm/test/CodeGen/AVR/rust-avr-bug-99.ll
M llvm/test/CodeGen/AVR/rust-trait-object.ll
M llvm/test/CodeGen/AVR/std-ldd-immediate-overflow.ll
M llvm/test/CodeGen/AVR/store-undef.ll
M llvm/test/CodeGen/AVR/store.ll
M llvm/test/CodeGen/AVR/struct.ll
M llvm/test/CodeGen/AVR/umul.with.overflow.i16-bug.ll
M llvm/test/CodeGen/AVR/unaligned-atomic-ops.ll
M llvm/test/CodeGen/AVR/varargs.ll
M llvm/test/CodeGen/AVR/zeroreg.ll
Log Message:
-----------
[AVR] Convert tests to opaque pointers (NFC)
Commit: b31fffbc7f1e0491bf599e82b7195e320d26e140
https://github.com/llvm/llvm-project/commit/b31fffbc7f1e0491bf599e82b7195e320d26e140
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll
M llvm/test/CodeGen/ARM/2009-07-18-RewriterBug.ll
M llvm/test/CodeGen/ARM/Windows/wineh-basic.ll
M llvm/test/CodeGen/ARM/aes-erratum-fix.ll
M llvm/test/CodeGen/ARM/aliases.ll
M llvm/test/CodeGen/ARM/code-placement.ll
M llvm/test/CodeGen/ARM/constant-island-movwt.mir
M llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll
M llvm/test/CodeGen/ARM/debug-info-blocks.ll
M llvm/test/CodeGen/ARM/debug-info-d16-reg.ll
M llvm/test/CodeGen/ARM/debug-info-s16-reg.ll
M llvm/test/CodeGen/ARM/dwarf-eh.ll
M llvm/test/CodeGen/ARM/ldrcppic.ll
M llvm/test/CodeGen/ARM/misched-copy-arm.ll
M llvm/test/CodeGen/ARM/no-register-coalescing-in-returnsTwice.mir
M llvm/test/CodeGen/ARM/readonly-aliases.ll
M llvm/test/CodeGen/ARM/tail-dup-kill-flags.ll
M llvm/test/CodeGen/Thumb/PR36658.mir
M llvm/test/CodeGen/Thumb/branch-to-return.ll
M llvm/test/CodeGen/Thumb/tbb-reuse.mir
M llvm/test/CodeGen/Thumb2/2012-01-13-CBNZBug.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/add_reduce.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/arm_cmplx_dot_prod_f32.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-default.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-optsize-strd-lr.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-optsize.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/constbound.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/count_dominates_start.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/emptyblock.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/extract-element.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-16.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-32.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-8.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-1.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-2.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-3.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpsel-1.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpsel-2.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/invariant-qreg.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-chain-store.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/iv-two-vcmp-reordered.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/iv-two-vcmp.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/iv-vcmp.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/livereg-no-loop-def.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-chain.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-prev-iteration.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-liveout.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/lstp-insertion-position.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix-debug.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-after-dlstp.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-lr-terminator.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-operand.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/multi-block-cond-iter-count.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/multi-cond-iter-count.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/multiple-do-loops.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-dec-cbnz.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-dec-reorder.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-dec.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-vpsel-liveout.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/non-masked-load.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/non-masked-store.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-invariant.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout-unknown-lanes.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions-vpt-liveout.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-non-header.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/skip-debug.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/skip-vpt-debug.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/subreg-liveness.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/tp-multiple-vpst.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unpredicated-max.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unpredload.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unrolled-and-vector.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vaddv.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vcmp-vpst-combination.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-add-operand-liveout.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subi3.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-subri12.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp16-reduce.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmaxmin_vpred_r.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vmldava_in_vpt.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-block-debug.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wls-revert-placement.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-liveout-lsr-shift.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-opcode-liveout.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-operand-liveout.mir
M llvm/test/CodeGen/Thumb2/mve-gather-optimisation-deep.ll
M llvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll
M llvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll
M llvm/test/CodeGen/Thumb2/mve-phireg.ll
M llvm/test/CodeGen/Thumb2/mve-postinc-distribute.ll
M llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll
M llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll
M llvm/test/CodeGen/Thumb2/mve-qrintrsplat.ll
M llvm/test/CodeGen/Thumb2/mve-vecreduce-add-combine.ll
M llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll
M llvm/test/CodeGen/Thumb2/mve-vmaxnma-commute.ll
M llvm/test/CodeGen/Thumb2/mve-vmovlloop.ll
M llvm/test/CodeGen/Thumb2/scavenge-lr.mir
M llvm/test/CodeGen/Thumb2/t2-teq-reduce.mir
Log Message:
-----------
[ARM] Convert tests to opaque pointers (NFC)
Commit: 89ec940b4a8020e1399e019d845be1a2d2217f69
https://github.com/llvm/llvm-project/commit/89ec940b4a8020e1399e019d845be1a2d2217f69
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
A llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
Log Message:
-----------
[AMDGPU] Insert spill codes for the SGPRs used for EXEC copy (#79428)
The SGPR registers used for preserving EXEC mask while lowering the
whole-wave register spills and copies should be preserved at the prolog
and epilog if they are in the CSR range. It isn't happening when there
is only wwm-copy lowered and there are no wwm-spills. This patch
addresses that problem.
Commit: 06f711a906be85e141bcce9a88ab304dc81e74ef
https://github.com/llvm/llvm-project/commit/06f711a906be85e141bcce9a88ab304dc81e74ef
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
Log Message:
-----------
AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#80003)
Implement PhiLoweringHelper for GlobalISel in DivergenceLoweringHelper.
Use machine uniformity analysis to find divergent i1 phis and select
them as lane mask phis in same way SILowerI1Copies select VReg_1 phis.
Note that divergent i1 phis include phis created by LCSSA and all cases
of uses outside of cycle are actually covered by "lowering LCSSA phis".
GlobalISel lane masks are registers with sgpr register class and S1 LLT.
TODO: General goal is that instructions created in this pass are fully
instruction-selected so that selection of lane mask phis is not split
across multiple passes.
patch 3 from: https://github.com/llvm/llvm-project/pull/73337
Commit: ff9af4c43ad71eeba2cabe99609cfaa0fd54c1d0
https://github.com/llvm/llvm-project/commit/ff9af4c43ad71eeba2cabe99609cfaa0fd54c1d0
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/BPF/BTF/builtin-btf-type-id.ll
M llvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll
M llvm/test/CodeGen/BPF/BTF/type-tag-fixup-fwd.ll
M llvm/test/CodeGen/BPF/BTF/type-tag-fixup-resolved.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll
M llvm/test/CodeGen/BPF/ex1.ll
M llvm/test/CodeGen/BPF/reloc.ll
M llvm/test/CodeGen/BPF/remove_truncate_3.ll
M llvm/test/CodeGen/BPF/sockex2.ll
M llvm/test/CodeGen/BPF/xadd.ll
M llvm/test/CodeGen/BPF/xadd_legal.ll
M llvm/test/CodeGen/Generic/DbgValueAggregate.ll
M llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables-x.mir
M llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir
M llvm/test/CodeGen/Generic/MIRStripDebug/all.mir
M llvm/test/CodeGen/Generic/MIRStripDebug/dont-strip-real-debug-info.mir
M llvm/test/CodeGen/Generic/MIRStripDebug/multiple-moduleflags.mir
M llvm/test/CodeGen/Hexagon/autohvx/fsplat.ll
M llvm/test/CodeGen/Hexagon/autohvx/hfsplat.ll
M llvm/test/CodeGen/Hexagon/cmpy-round.ll
M llvm/test/CodeGen/Hexagon/const-pool-tf.ll
M llvm/test/CodeGen/Hexagon/debug-prologue-loc.ll
M llvm/test/CodeGen/Hexagon/fixed-spill-mutable.ll
M llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
M llvm/test/CodeGen/Hexagon/memcpy-likely-aligned.ll
M llvm/test/CodeGen/Hexagon/swp-carried-dep1.mir
M llvm/test/CodeGen/Hexagon/swp-carried-dep2.mir
M llvm/test/CodeGen/Hexagon/swp-memrefs-epilog.ll
M llvm/test/CodeGen/Hexagon/swp-new-phi.ll
M llvm/test/CodeGen/Hexagon/v5_insns.ll
M llvm/test/CodeGen/Hexagon/v60Vasr.ll
M llvm/test/CodeGen/Hexagon/vdmpy-halide-test.ll
M llvm/test/CodeGen/Hexagon/vect-regpairs.ll
M llvm/test/CodeGen/Hexagon/vect_setcc_v2i16.ll
M llvm/test/CodeGen/Hexagon/vmpa-halide-test.ll
M llvm/test/CodeGen/Lanai/codemodel.ll
M llvm/test/CodeGen/Lanai/inlineasm-output-template.ll
M llvm/test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
M llvm/test/CodeGen/Lanai/mem_alu_combiner.ll
M llvm/test/CodeGen/Lanai/peephole-compare.mir
M llvm/test/CodeGen/Lanai/set_and_hi.ll
M llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll
M llvm/test/CodeGen/Lanai/subword.ll
M llvm/test/CodeGen/LoongArch/frame.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld-non-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl-non-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-st-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-st-non-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-st.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm-non-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ld-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ld-non-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ld.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ldrepl-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ldrepl-non-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ldrepl.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-st-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-st-non-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-st.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm-non-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm.ll
M llvm/test/CodeGen/LoongArch/tail-calls.ll
M llvm/test/CodeGen/MIR/AArch64/expected-target-flag-name.mir
M llvm/test/CodeGen/MIR/AArch64/invalid-target-flag-name.mir
M llvm/test/CodeGen/MIR/AArch64/machine-metadata-error.mir
M llvm/test/CodeGen/MIR/AArch64/machine-metadata.mir
M llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
M llvm/test/CodeGen/MIR/AArch64/swp.mir
M llvm/test/CodeGen/MIR/AArch64/target-flags.mir
M llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll
M llvm/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir
M llvm/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
M llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
M llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir
M llvm/test/CodeGen/MIR/ARM/expected-closing-brace.mir
M llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir
M llvm/test/CodeGen/MIR/Generic/frame-info.mir
M llvm/test/CodeGen/MIR/Generic/llvm-ir-error-reported.mir
M llvm/test/CodeGen/MIR/Mips/memory-operands.mir
M llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
M llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
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M llvm/test/CodeGen/SystemZ/foldmemop-vec-binops.mir
M llvm/test/CodeGen/SystemZ/foldmemop-vec-cc.mir
M llvm/test/CodeGen/SystemZ/foldmemop-vec-cmp.mir
M llvm/test/CodeGen/SystemZ/foldmemop-vec-fusedfp.mir
M llvm/test/CodeGen/SystemZ/fp-conv-17.mir
M llvm/test/CodeGen/SystemZ/frame-26.mir
M llvm/test/CodeGen/SystemZ/int-cmp-56.mir
M llvm/test/CodeGen/SystemZ/isel-debug.ll
M llvm/test/CodeGen/SystemZ/load-and-test-RA-hints.mir
M llvm/test/CodeGen/SystemZ/loop-04.ll
M llvm/test/CodeGen/SystemZ/multiselect-02.mir
M llvm/test/CodeGen/SystemZ/postra-sched-expandedops.mir
M llvm/test/CodeGen/SystemZ/regalloc-GR128-02.mir
M llvm/test/CodeGen/SystemZ/selectcc-04.ll
M llvm/test/CodeGen/SystemZ/subregliveness-06.mir
M llvm/test/CodeGen/SystemZ/zos-landingpad.ll
M llvm/test/CodeGen/VE/Scalar/pic_access_data.ll
M llvm/test/CodeGen/VE/Scalar/pic_indirect_func_call.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
M llvm/test/CodeGen/WebAssembly/global.ll
M llvm/test/CodeGen/WebAssembly/userstack.ll
M llvm/test/CodeGen/WinCFGuard/cfguard-cast.ll
M llvm/test/CodeGen/WinCFGuard/cfguard-giats.ll
M llvm/test/CodeGen/WinCFGuard/cfguard.ll
M llvm/test/CodeGen/XCore/threads.ll
Log Message:
-----------
[CodeGen] Convert tests to opaque pointers (NFC)
Commit: 4e958abf2f44d08129eafd5b6a4ee2bd3584ed22
https://github.com/llvm/llvm-project/commit/4e958abf2f44d08129eafd5b6a4ee2bd3584ed22
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-memset.ll
Log Message:
-----------
[AMDGPU][PromoteAlloca] Support memsets to ptr allocas (#80678)
Fixes #80366
Commit: a5d206df792b61a0b6c5ac44343a97696fc6071d
https://github.com/llvm/llvm-project/commit/a5d206df792b61a0b6c5ac44343a97696fc6071d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/div_i128.ll
A llvm/test/CodeGen/AMDGPU/div_v2i128.ll
Log Message:
-----------
AMDGPU: Set max supported div/rem size to 64 (#80669)
This enables IR expansion for i128 divisions. The vector case is still
broken because ExpandLargeDivRem doesn't try to handle them.
Fixes: SWDEV-426193
Commit: a826a0c234c38eab194119bebcab91aabc2e3759
https://github.com/llvm/llvm-project/commit/a826a0c234c38eab194119bebcab91aabc2e3759
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
A llvm/test/Analysis/CostModel/RISCV/reduce-fmaximum.ll
A llvm/test/Analysis/CostModel/RISCV/reduce-fminimum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
Log Message:
-----------
[RISCV] Add tests for reduce.fmaximum/fminimum. NFC (#80553)
This is to add test coverage for crash report in #80340
Commit: 66397435ed83c2247f49d302246ba5a87f4dd85f
https://github.com/llvm/llvm-project/commit/66397435ed83c2247f49d302246ba5a87f4dd85f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[X86] Add common getSrcIdx helper to determine source index after AVX512 masked predicates. NFC.
Commit: bc6370abd3f1e6b02100927095a2797472d6ff70
https://github.com/llvm/llvm-project/commit/bc6370abd3f1e6b02100927095a2797472d6ff70
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[X86] addConstantComments - split VPERMILPS/VPERMILPD handling to reduce repeated switch cases etc. NFC.
Commit: 992d8527585817af685bba0d82ed4e808bc613bb
https://github.com/llvm/llvm-project/commit/992d8527585817af685bba0d82ed4e808bc613bb
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Flang.cpp
A flang/test/Driver/aarch64-outline-atomics.f90
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
A flang/test/Integration/aarch64-outline-atomics.f90
Log Message:
-----------
[flang]Add support for -moutline-atomics and -mno-outline-atomics (#78755)
This adds the support to add the target-feature to outline atomic operations (calling the
runtime library instead).
Commit: 825658856d94776889399a07a3939610ee1aa299
https://github.com/llvm/llvm-project/commit/825658856d94776889399a07a3939610ee1aa299
Author: Hui <hui.xie1990 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/semaphore
A libcxx/test/std/thread/thread.semaphore/lost_wakeup.pass.cpp
Log Message:
-----------
[libc++] fix `counting_semaphore` lost wakeups (#79265)
Fixes #77659
Fixes #46357
Picked up from https://reviews.llvm.org/D114119
Commit: a40d68b6de30a7fda44a2905e83df3d80fca2abf
https://github.com/llvm/llvm-project/commit/a40d68b6de30a7fda44a2905e83df3d80fca2abf
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libc/docs/index.rst
A libc/docs/libc_search.rst
R libc/docs/search.rst
M libc/docs/stdbit.rst
Log Message:
-----------
[libc] tiny fix for doc (#80512)
Commit: 8e00fc33ebabccf60388288c07201706ca3efd71
https://github.com/llvm/llvm-project/commit/8e00fc33ebabccf60388288c07201706ca3efd71
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
Log Message:
-----------
[mlir][ArmSME][nfc] Fix docs for 2-way ops
The "Refer to" and table shouldn't be in the example code sequence.
Commit: 5f5b3bb22b2e4ffcd14a8fc8a5edc14bc098a47e
https://github.com/llvm/llvm-project/commit/5f5b3bb22b2e4ffcd14a8fc8a5edc14bc098a47e
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
M mlir/test/Dialect/ArmSME/outer-product-fusion.mlir
Log Message:
-----------
[mlir][ArmSME] Add rewrites to swap extract of extend (#80407)
In mixed matmul lowering (e.g., i8 to i32) we're seeing the following
sequence:
%0 = arith.extsi %src : vector<4x[8]xi8> to vector<4x[8]xi32>
%1 = vector.extract %0[0] : vector<[8]xi32> from vector<4x[8]xi32>
%lhs = vector.scalable.extract %1[0] : vector<[4]xi32> from
vector<[8]xi32>
... (same for rhs)
%2 = vector.outerproduct %lhs, %rhs, %acc vector<[4]xi32>,
vector<[4]xi32>
// x4 chained by accumulator
This chain of 4 outer products can be fused into a single 4-way widening
variant but the pass doesn't match on the IR, as it expects the source
of the inputs to be an extend and it can't look through the extracts.
This patch fixes this with two rewrites that swaps extract(extend) into
extend(extract).
Related to #78975, #79288.
Commit: abea3b27991dd73cad251f623a2a8f25a3e786ff
https://github.com/llvm/llvm-project/commit/abea3b27991dd73cad251f623a2a8f25a3e786ff
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/RDFGraph.cpp
Log Message:
-----------
[RDF] Skip over NoRegister. NFCI. (#80672)
This just avoids useless work of adding NoRegister to BaseSet, for
consistency with other places that iterate over all physical registers.
Commit: daea0820829bf5bbca9ab50fc118012a2508fab3
https://github.com/llvm/llvm-project/commit/daea0820829bf5bbca9ab50fc118012a2508fab3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/include/__support/xlocale/__posix_l_fallback.h
Log Message:
-----------
[libc++] Add missing include of <string.h> in POSIX fallbacks for locale
Commit: 1af05363d6353d7edd0d00e37ae0eb70f54b4b64
https://github.com/llvm/llvm-project/commit/1af05363d6353d7edd0d00e37ae0eb70f54b4b64
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[X86] getShuffleComment - use MI description to determine AVX512 masked predicates instead of src index offsets.
Commit: d15c454bedc05775b5080e1d2130b0554d5e5a81
https://github.com/llvm/llvm-project/commit/d15c454bedc05775b5080e1d2130b0554d5e5a81
Author: Kevin P. Neal <kevin.neal at sas.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/strict_fptrunc.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
Log Message:
-----------
[FPEnv][AMDGPU] Correct strictfp tests.
Correct AMDGPU strictfp tests to follow the rules documented in the
LangRef:
https://llvm.org/docs/LangRef.html#constrained-floating-point-intrinsics
These tests needed the strictfp attribute added to function calls and
some declarations.
Some of the tests now pass with D146845, others get farther along and
fail with D146845. The tests revealed that further work is required
in mostly AMDGPU atomics to get the tests passing.
Since I was here anyway I removed the strictfp attribute from some
constrained intrinsic declarations. They have this attribute by default.
Test changes verified with D146845.
Commit: 3bf881635c9ca7398ba6a451e30a2156b22d59b5
https://github.com/llvm/llvm-project/commit/3bf881635c9ca7398ba6a451e30a2156b22d59b5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Frontend/Offloading/Utility.cpp
Log Message:
-----------
[Offload] Fix entry global names on NVPTX target
Summary:
The PTX language rejects globals with `.` in the name. We need to change
the global name if we are targeting NVPTX to prevent the toolchain from
complaining.
Commit: 5249379d742148728f654665e113084c6b93cdf2
https://github.com/llvm/llvm-project/commit/5249379d742148728f654665e113084c6b93cdf2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
Log Message:
-----------
[AMDGPU] Allow w64 ballot to be used on w32 targets (#80183)
Summary:
Currently we cannot compile `__builtin_amdgcn_ballot_w64` on non-wave64
targets even though it is valid. This is relevant for making library
code that can handle both without needing to check the wavefront size.
This patch relaxes the semantic check for w64 so it can be used
normally.
Commit: e4f1ef85fd60c08c9ece4982fccf76e8101011b8
https://github.com/llvm/llvm-project/commit/e4f1ef85fd60c08c9ece4982fccf76e8101011b8
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/PrimType.h
A clang/test/AST/Interp/atomic.c
M clang/test/Sema/atomic-expr.c
Log Message:
-----------
[clang][Interp] Reject bitcasts to atomic types
The current interpreter does this, so follow suit to match its
diagnostics.
Commit: de46dc97b11b06c7efc225cfa08cf3cb68a8a75e
https://github.com/llvm/llvm-project/commit/de46dc97b11b06c7efc225cfa08cf3cb68a8a75e
Author: Natalie Chouinard <sudonatalie at google.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M .github/workflows/spirv-tests.yml
Log Message:
-----------
[SPIR-V] Include SPIRV-Tools tests in CI (#80479)
Commit: e524ada6cbc6912156a713ffa179cb92e5362ebb
https://github.com/llvm/llvm-project/commit/e524ada6cbc6912156a713ffa179cb92e5362ebb
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Support zero init for complex types (#79728)
Initialize both elements to 0.
Commit: d1722868d34a69df8466b72098176f54a7af8823
https://github.com/llvm/llvm-project/commit/d1722868d34a69df8466b72098176f54a7af8823
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave64.cl
Log Message:
-----------
[Clang] Make AMDGPU OpenCL tests require AMD registered target
Summary:
These tests likely always failed but was hidden by the expected return
value. Simply make them require AMDGPU as a registered target so they
don't fail on other machines.
Commit: ae92f6e8aeb97e39b95a40fde8a176f6aff94063
https://github.com/llvm/llvm-project/commit/ae92f6e8aeb97e39b95a40fde8a176f6aff94063
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M lldb/docs/use/python-reference.rst
Log Message:
-----------
[lldb][Docs] Remove unnecessary colon in title
Commit: 2614672cc12258d2b07db2657e475ad70e01d5ba
https://github.com/llvm/llvm-project/commit/2614672cc12258d2b07db2657e475ad70e01d5ba
Author: elhewaty <mohamedatef1698 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/and.ll
Log Message:
-----------
[InstCombine] Fold ((cst << x) & 1) --> x == 0 when cst is odd (#79772)
Fold ((cst << x) & 1) to zext(x == 0) when cst is odd.
Fixes: https://github.com/llvm/llvm-project/issues/73384
Alive2: https://alive2.llvm.org/ce/z/5RbaK6
Commit: 41ea02261224446dadb1b1561d70137699255518
https://github.com/llvm/llvm-project/commit/41ea02261224446dadb1b1561d70137699255518
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/AST/Type.cpp
M clang/test/SemaCXX/cxx2c-pack-indexing.cpp
Log Message:
-----------
[Clang] Fix crash when recovering from an invalid pack indexing type. (#80652)
If the pattern of a pack indexing type did not contain a pack, we would
still construct a pack indexing type (to improve error messages) but we
would fail to make the type as dependent, leading to infinite recursion
when trying to extract a canonical type.
Commit: 4881cbd407e73f940a8e9ede501c2eee190ec9dd
https://github.com/llvm/llvm-project/commit/4881cbd407e73f940a8e9ede501c2eee190ec9dd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/cxx98.cpp
M clang/test/SemaCXX/pr72025.cpp
Log Message:
-----------
[clang][Interp] Fix MemberExpr initializing an existing value (#79973)
This is similar to c1ad363e6eba308fa94c47374ee98b3c79693a35, but with
the additional twist that initializing an existing value from a
`MemberExpr` was not working correctly.
Commit: 8cb2de7faecdd4e053dfc8468b2be84e2d8afb4e
https://github.com/llvm/llvm-project/commit/8cb2de7faecdd4e053dfc8468b2be84e2d8afb4e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
Log Message:
-----------
[VPlan] Implement type inference for ICmp.
This fixes a crash in the attached test case due to missing type
inference for ICmp VPInstructions.
Commit: 0881d0f009427427509e5592b875d3fd702c595a
https://github.com/llvm/llvm-project/commit/0881d0f009427427509e5592b875d3fd702c595a
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/startup/gpu/CMakeLists.txt
M libc/startup/gpu/amdgpu/CMakeLists.txt
M libc/startup/gpu/nvptx/CMakeLists.txt
M libc/test/IntegrationTest/CMakeLists.txt
M libc/test/src/CMakeLists.txt
Log Message:
-----------
[libc] Refactor _build_gpu_objects cmake function. (#80631)
Commit: 702664e7870c27f197dfb744a4db54aa259ce452
https://github.com/llvm/llvm-project/commit/702664e7870c27f197dfb744a4db54aa259ce452
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-8.fir
Log Message:
-----------
[flang] Improve alias analysis to be precise for box and box.base_addr (#80335)
After PR#68727 the source for both the fir.box_addr and a box became the
same. Thus the detection that only one of the sources was direct and the
special logic around it was being skipped. As a result, the test
included would show a "MayAlias" result instead of a "NoAlias" result.
Commit: 9a87c5d440ec16a1116e060829df10bc2a6965ce
https://github.com/llvm/llvm-project/commit/9a87c5d440ec16a1116e060829df10bc2a6965ce
Author: Marius Brehler <marius.brehler at iml.fraunhofer.de>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Conversion/FuncToEmitC/func-to-emitc.mlir
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
M mlir/test/Target/Cpp/func.mlir
Log Message:
-----------
[mlir][EmitC] Add support for external functions (#80547)
This adds a conversion from an externaly defined `func.func`, a
`func.func` without function body, to an `emitc.func` with an `extern`
specifier.
Commit: 0ac44385603ca67ceb969eb271d8c2075a8c14b4
https://github.com/llvm/llvm-project/commit/0ac44385603ca67ceb969eb271d8c2075a8c14b4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M openmp/libomptarget/include/Shared/PluginAPI.h
M openmp/libomptarget/include/Shared/PluginAPI.inc
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/src/omptarget.cpp
Log Message:
-----------
[Libomptarget] Remove unused 'SupportsEmptyImages' API function (#80316)
Summary:
This function is always false in the current implementation and is not
even considered required. Just remove it and if someone needs it in the
future they can add it back in. This is done to simplify the interface
prior to other changes
Commit: ae354c5a45d319b3117c2822b8f6988461f3cb33
https://github.com/llvm/llvm-project/commit/ae354c5a45d319b3117c2822b8f6988461f3cb33
Author: Loïc Joly <loic.joly at sonarsource.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/test/Analysis/builtin-functions.cpp
Log Message:
-----------
[analyzer] Model Microsoft "__assume" in the same way as clang "__builtin_assume"
Commit: f2c84211d2834c73ff874389c6bb47b1c76d391a
https://github.com/llvm/llvm-project/commit/f2c84211d2834c73ff874389c6bb47b1c76d391a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/include/version
M libcxx/test/std/language.support/support.limits/support.limits.general/filesystem.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/iomanip.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/mutex.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Add missing conditionals for feature-test macros (#80168)
We noticed that some feature-test macros were not conditional on
configuration flags like _LIBCPP_HAS_NO_FILESYSTEM. As a result, code
attempting to use FTMs would not work as intended.
This patch adds conditionals for a few feature-test macros, but more
issues may exist.
rdar://122020466
Commit: fee204f0c9b3b77898c1faa2a7415b0f64f5e7f0
https://github.com/llvm/llvm-project/commit/fee204f0c9b3b77898c1faa2a7415b0f64f5e7f0
Author: NagyDonat <donat.nagy at ericsson.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
M clang/test/Analysis/out-of-bounds-diagnostics.c
A clang/test/Analysis/out-of-bounds-notes.c
Log Message:
-----------
[analyzer] Support interestingness in ArrayBoundV2 (#78315)
This commit improves alpha.security.ArrayBoundV2 in two connected areas:
(1) It calls `markInteresting()` on the symbolic values that are
responsible for the out of bounds access.
(2) Its index-is-in-bounds assumptions are reported in note tags if they
provide information about the value of an interesting symbol.
This commit is limited to "display" changes: it introduces new
diagnostic pieces (potentially to bugs found by other checkers), but
ArrayBoundV2 will make the same assumptions and detect the same bugs
before and after this change.
As a minor unrelated change, this commit also updates/removes some very
old comments which became obsolete due to my previous changes.
Commit: 78a12f94904b69dd8b13f3e3fd258334b77ee7b8
https://github.com/llvm/llvm-project/commit/78a12f94904b69dd8b13f3e3fd258334b77ee7b8
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/libc_search.rst
M libc/spec/posix.td
M libc/src/__support/CMakeLists.txt
A libc/src/__support/intrusive_list.h
M libc/src/search/CMakeLists.txt
A libc/src/search/insque.cpp
A libc/src/search/insque.h
A libc/src/search/remque.cpp
A libc/src/search/remque.h
M libc/test/src/search/CMakeLists.txt
A libc/test/src/search/insque_test.cpp
Log Message:
-----------
[libc] implement insque and remque (#80305)
This PR implements the `insque` and `remque` entrypoint functions.
Commit: 30f776f8149dcbda0b6467176488e6551d068e40
https://github.com/llvm/llvm-project/commit/30f776f8149dcbda0b6467176488e6551d068e40
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/include/__thread/support/c11.h
Log Message:
-----------
[libc++] Add missing <errno.h> include in threading support headers (#80311)
This was incorrectly removed when I split up the header.
Commit: c08d972a0043fe67de65ba331a144425c8cea449
https://github.com/llvm/llvm-project/commit/c08d972a0043fe67de65ba331a144425c8cea449
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Pipelines/Passes.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/lib/Dialect/Bufferization/Pipelines/BufferizationPipelines.cpp
M mlir/lib/Dialect/Bufferization/Pipelines/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bufferization][NFC] Pass `DeallocationOptions` instead of flags (#80675)
Pass `DeallocationOptions` instead of `privateFuncDynamicOwnership`.
This will make it easier to add new options in the future.
Commit: 58f3a77efb633d56a48e031240fc8a37ba2b7557
https://github.com/llvm/llvm-project/commit/58f3a77efb633d56a48e031240fc8a37ba2b7557
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxxabi/src/private_typeinfo.cpp
Log Message:
-----------
[libc++abi] Replace usage of raw assert by _LIBCXXABI_ASSERT (#80689)
We strive not to use raw assert(...) anymore in libc++abi in preparation
for using the hardening framework.
Commit: de9a87301aefda9538eab7fcd563cc6ceec44e0a
https://github.com/llvm/llvm-project/commit/de9a87301aefda9538eab7fcd563cc6ceec44e0a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[X86] Split up getShuffleComment into printShuffleMask and printDstRegisterName helpers. NFC.
This will allow us to easily use printDstRegisterName for other mask predicate destination registers, and printout shuffle masks from other instruction types.
Commit: f4714204d0527269e037d85ed998a54678e3895f
https://github.com/llvm/llvm-project/commit/f4714204d0527269e037d85ed998a54678e3895f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[X86] printExtend - add support for mask predicated instructions
Remove handling from EmitAnyX86InstComments and handle all VPMOVSX/VPMOVZX comments in addConstantComments now that we can generically handle the destination + mask register and shuffle mask comment
Commit: 47dcf5d5dc54e62c59fedbef1e8ec3a02c77cb83
https://github.com/llvm/llvm-project/commit/47dcf5d5dc54e62c59fedbef1e8ec3a02c77cb83
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/avx512-vec-cmp.ll
Log Message:
-----------
[X86] printBroadcast - add support for mask predicated instructions
Handle masked predicated load/broadcasts in addConstantComments now that we can generically handle the destination + mask register
This will more significantly help improve 'fixup constant' comments from #73509
Commit: f958ad3b89c38be84dcf263ef9f9508a5cd3a6e3
https://github.com/llvm/llvm-project/commit/f958ad3b89c38be84dcf263ef9f9508a5cd3a6e3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/apx/kmov-postrapseudos.ll
Log Message:
-----------
[X86] printZeroUpperMove - add support for mask predicated instructions
Handle masked predicated movss/movsd in addConstantComments now that we can generically handle the destination + mask register
This will more significantly help improve 'fixup constant' comments from #73509
Commit: 66cd768504b349f7bd16d236a3b4f611ffabf78f
https://github.com/llvm/llvm-project/commit/66cd768504b349f7bd16d236a3b4f611ffabf78f
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/builtins.cpp
Log Message:
-----------
[clang][Interp] Handle __assume like __builtin_assume.
Commit: 29d47513b3ce706b5df66409170e40ba39f3795a
https://github.com/llvm/llvm-project/commit/29d47513b3ce706b5df66409170e40ba39f3795a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/include/flang/Optimizer/Support/InitFIR.h
A flang/test/Fir/OpenACC/legalize-data.fir
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
A mlir/include/mlir/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
A mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/InitAllPasses.h
M mlir/lib/Dialect/OpenACC/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/IR/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
A mlir/test/Dialect/OpenACC/legalize-data.mlir
Log Message:
-----------
[mlir][openacc] Add legalize data pass for compute operation (#80351)
This patch adds a simple pass to replace the uses inside compute
operation. It replaces the `varPtr` values with their corresponding
`accPtr` values gathered through the dataClauseOperands.
private and reductions variables are not included in this pass since
they will normally be replace when they are materialized.
---------
Co-authored-by: Slava Zakharin <szakharin at nvidia.com>
Commit: 1ec252298925de50b27930c557ba9de3cc397afe
https://github.com/llvm/llvm-project/commit/1ec252298925de50b27930c557ba9de3cc397afe
Author: Dimitry Andric <dimitry at andric.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/include/__bit_reference
Log Message:
-----------
[libc++] Rename __bit_reference template parameter to avoid conflict (#80661)
As of 4d20cfcf4eb08217ed37c4d4c38dc395d7a66d26, `__bit_reference`
contains a template `__fill_n` with a bool `_FillValue` parameter.
Unfortunately there is a relatively widely used piece of scientific
software called NetCDF, which exposes a (C) macro `_FillValue` in its
public headers.
When building the NetCDF C++ bindings, this quickly leads to compilation
errors when the macro interferes with the template in `__bit_reference`.
Rename the parameter to `_FillVal` to avoid the conflict.
Commit: 341d3a59999dec56f51804a5356b2e38256ab55c
https://github.com/llvm/llvm-project/commit/341d3a59999dec56f51804a5356b2e38256ab55c
Author: Rajveer Singh Bharadwaj <rajveer.developer at icloud.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/include/scoped_allocator
M libcxx/test/std/utilities/allocator.adaptor/allocator.adaptor.cnstr/allocs.pass.cpp
Log Message:
-----------
[libc++] Fix ambiguity when using std::scoped_allocator constructor (#80261)
Fixes #78754
Commit: e2bb91b25c8740625fecd127c1d908a2fabd0102
https://github.com/llvm/llvm-project/commit/e2bb91b25c8740625fecd127c1d908a2fabd0102
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/include/flang/Optimizer/Support/InitFIR.h
R flang/test/Fir/OpenACC/legalize-data.fir
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
R mlir/include/mlir/Dialect/OpenACC/Transforms/CMakeLists.txt
R mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
R mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/InitAllPasses.h
M mlir/lib/Dialect/OpenACC/CMakeLists.txt
R mlir/lib/Dialect/OpenACC/IR/CMakeLists.txt
R mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
R mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
R mlir/test/Dialect/OpenACC/legalize-data.mlir
Log Message:
-----------
Revert "[mlir][openacc] Add legalize data pass for compute operation" (#80710)
Reverts llvm/llvm-project#80351
Breaks some buildbot
Commit: 09531e34eec121e9c2319d58bb9fb7edc304027e
https://github.com/llvm/llvm-project/commit/09531e34eec121e9c2319d58bb9fb7edc304027e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/include/__support/xlocale/__posix_l_fallback.h
Log Message:
-----------
[libc++] Add missing include of <wchar.h> in POSIX locale fallbacks
Commit: 2d416219af5c0091f7887e4d4463e63f5a37d811
https://github.com/llvm/llvm-project/commit/2d416219af5c0091f7887e4d4463e63f5a37d811
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/docs/fstack-arrays.md
Log Message:
-----------
[flang][docs] fix stack arrays docs page name (#80708)
The website renders this `<h1>` as the page title in the index. This
patch updates the title to better fit with the names of the other pages.
See the index here https://flang.llvm.org/docs/
Commit: 04f99bec9af495c2571c9e7dcb14face3cfea4ce
https://github.com/llvm/llvm-project/commit/04f99bec9af495c2571c9e7dcb14face3cfea4ce
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
Log Message:
-----------
[libc++][doc] Updates LWG3346 status. (#80536)
The issue addresses an obvious wording issue. Implementing the
constructors as specified in the synposis, as libc++ did, already
implements the fixed behaviour.
Updates:
- LWG3346 pair and tuple copy and move constructor have backwards
specification
Commit: c5f68a711c62aa1748c03215d95ad9b8c7dff9dd
https://github.com/llvm/llvm-project/commit/c5f68a711c62aa1748c03215d95ad9b8c7dff9dd
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxxabi/src/cxa_exception_storage.cpp
M libcxxabi/src/cxa_guard_impl.h
M libcxxabi/src/cxa_thread_atexit.cpp
M libcxxabi/src/fallback_malloc.cpp
M libcxxabi/test/test_fallback_malloc.pass.cpp
Log Message:
-----------
[libc++abi] Revert temporary workaround to unblock Chrome
This reverts commit 372f7dd48f016, which is not needed by Chrome anymore.
Commit: 5e8626c920a8cffff4e286cd8521528cc80c0a3e
https://github.com/llvm/llvm-project/commit/5e8626c920a8cffff4e286cd8521528cc80c0a3e
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/test/AST/Interp/c.c
M clang/test/AST/Interp/literals.cpp
M clang/test/Sema/objc-bool-constant-conversion.m
Log Message:
-----------
[clang][Interp] Handle ObjCBoolLiteralExprs
Emit them just like the others, but these are integer typed.
Commit: 8f070144e3711ad0e5556eaebc72069c0d869342
https://github.com/llvm/llvm-project/commit/8f070144e3711ad0e5556eaebc72069c0d869342
Author: Billy Laws <blaws05 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-entry-thunks.ll
Log Message:
-----------
[AArch64] Fix generated types for ARM64EC variadic entry thunk targets (#80595)
ISel handles filling in x4/x5 when calling variadic functions as they
don't correspond to the 5th/6th X64 arguments but rather to the end of
the shadow space on the stack and the size in bytes of all stack
parameters (ignored and written as 0 for calls from entry thunks).
Will PR a follow up with ISel handling after this is merged.
Commit: 8f4d8945536e9fc45db0e349b91c2f4b3a9cae29
https://github.com/llvm/llvm-project/commit/8f4d8945536e9fc45db0e349b91c2f4b3a9cae29
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] Port d4ef4b818929732bcb68a536ef2c91891c0ad179
Commit: cb8d83a77c25e529f58eba17bb1ec76069a04e90
https://github.com/llvm/llvm-project/commit/cb8d83a77c25e529f58eba17bb1ec76069a04e90
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
A llvm/test/Transforms/InstCombine/pr80597.ll
Log Message:
-----------
[InstCombine] Fix assertion failure in issue80597 (#80614)
The assertion in #80597 failed when we were trying to compute known bits
of a value in an unreachable BB.
https://github.com/llvm/llvm-project/blob/859b09da08c2a47026ba0a7d2f21b7dca705864d/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L749-L810
In this case, `SignBits` is 30 (deduced from instr info), but `Known` is
`10000101010111010011110101000?0?00000000000000000000000000000000`
(deduced from dom cond). Setting high bits of `lshr Known, 1` will lead
to conflict.
This patch masks out high bits of `Known.Zero` to address this problem.
Fixes #80597.
Commit: b4c7152eb4f7971c111e3e2f60b55892def58d5d
https://github.com/llvm/llvm-project/commit/b4c7152eb4f7971c111e3e2f60b55892def58d5d
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
Log Message:
-----------
Revert "[mlir][vector] Drop inner unit dims for transfer ops on dynamic shapes." (#80712)
Reverts llvm/llvm-project#79752 because it is causing regressions in
downstream projects.
Commit: d0b5d32ce6a6287ddab96b028db534cc1bd9a929
https://github.com/llvm/llvm-project/commit/d0b5d32ce6a6287ddab96b028db534cc1bd9a929
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
Log Message:
-----------
[AMDGPU] Fixed byte_sel of v_cvt_f32_bf8/v_cvt_f32_fp8 (#80502)
Opsel bits are swapped. Actual byte select table:
Byte OPSEL
0 0
1 2
2 1
3 3
Commit: ea9276d47efb22e26483bd5ad31c2e249ed9846f
https://github.com/llvm/llvm-project/commit/ea9276d47efb22e26483bd5ad31c2e249ed9846f
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
Log Message:
-----------
[AMDGPU] GlobalISel for f8 conversions (#80503)
Commit: 95fe47ca7e99d999108705640e49075f4c5f39a7
https://github.com/llvm/llvm-project/commit/95fe47ca7e99d999108705640e49075f4c5f39a7
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
A flang/docs/OpenMP-descriptor-management.md
A flang/include/flang/Optimizer/CodeGen/CodeGenOpenMP.h
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/lib/Lower/OpenMP.cpp
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
A flang/lib/Optimizer/CodeGen/CodeGenOpenMP.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/OMPDescriptorMapInfoGen.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/FIR/array-bounds.f90
M flang/test/Lower/OpenMP/FIR/target.f90
A flang/test/Lower/OpenMP/allocatable-array-bounds.f90
A flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/target.f90
A flang/test/Transforms/omp-descriptor-map-info-gen.fir
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
A openmp/libomptarget/test/offloading/fortran/target-map-allocatable-array-section-1d-bounds.f90
A openmp/libomptarget/test/offloading/fortran/target-map-allocatable-array-section-3d-bounds.f90
A openmp/libomptarget/test/offloading/fortran/target-map-allocatable-map-scopes.f90
A openmp/libomptarget/test/offloading/fortran/target-map-enter-exit-allocatables.f90
A openmp/libomptarget/test/offloading/fortran/target-map-enter-exit-array.f90
A openmp/libomptarget/test/offloading/fortran/target-map-pointer-scopes-enter-exit.f90
A openmp/libomptarget/test/offloading/fortran/target-map-pointer-target-array-section-3d-bounds.f90
A openmp/libomptarget/test/offloading/fortran/target-map-pointer-target-scopes.f90
Log Message:
-----------
[Flang][OpenMP] Initial mapping of Fortran pointers and allocatables for target devices (#71766)
This patch seeks to add an initial lowering for pointers and allocatable variables
captured by implicit and explicit map in Flang OpenMP for Target operations that
take map clauses e.g. Target, Target Update. Target Exit/Enter etc.
Currently this is done by treating the type that lowers to a descriptor
(allocatable/pointer/assumed shape) as a map of a record type (e.g. a structure) as that's
effectively what descriptor types lower to in LLVM-IR and what they're represented as
in the Fortran runtime (written in C/C++). The descriptor effectively lowers to a structure
containing scalar and array elements that represent various aspects of the underlying
data being mapped (lower bound, upper bound, extent being the main ones of interest
in most cases) and a pointer to the allocated data. In this current iteration of the mapping
we map the structure in it's entirety and then attach the underlying data pointer and map
the data to the device, this allows most of the required data to be resident on the device
for use. Currently we do not support the addendum (another block of pointer data), but
it shouldn't be too difficult to extend this to support it.
The MapInfoOp generation for descriptor types is primarily handled in an optimization
pass, where it expands BoxType (descriptor types) map captures into two maps, one for
the structure (scalar elements) and the other for the pointer data (base address) and
links them in a Parent <-> Child relationship. The later lowering processes will then treat
them as a conjoined structure with a pointer member map.
Commit: 1a6426067fb33a8a789978f6e229108787a041be
https://github.com/llvm/llvm-project/commit/1a6426067fb33a8a789978f6e229108787a041be
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M .github/workflows/llvm-project-tests.yml
Log Message:
-----------
[workflows] Use /mnt as the build directory on Linux (#80583)
There is more space available on /mnt (~56G) than on / (~30G), and we
are starting to see some of the CI jobs run out of disk space on Linux.
Commit: bdc5a87f158577fd65fde555d956637f3f2b10ac
https://github.com/llvm/llvm-project/commit/bdc5a87f158577fd65fde555d956637f3f2b10ac
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M .github/workflows/email-check.yaml
Log Message:
-----------
[GitHub][Workflows] Prevent multiple private email comments (temporarily) (#80648)
Seems the easiest way to quiet this workflow while we figure out the final form of it.
Commit: ee06678a7500d5d8f6aa8d2442389cdb90417c38
https://github.com/llvm/llvm-project/commit/ee06678a7500d5d8f6aa8d2442389cdb90417c38
Author: Anton Korobeynikov <anton at korobeynikov.info>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M .github/workflows/email-check.yaml
Log Message:
-----------
Add some clarification to email check message
Commit: 5942868a215ce4dbd927a7f0b06432e1eeaed698
https://github.com/llvm/llvm-project/commit/5942868a215ce4dbd927a7f0b06432e1eeaed698
Author: Mészáros Gergely <gergely at streamhpc.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
A clang/test/CodeGenCUDA/printf-builtin.cu
A clang/test/CodeGenHIP/printf-builtin.hip
Log Message:
-----------
[clang][AMDGPU][CUDA] Handle __builtin_printf for device printf (#68515)
Previously `__builtin_printf` would result to emitting call to `printf`,
even though directly calling `printf` was translated.
Ref: #68478
Commit: 8fa1e5771bbd080c8a2a11c0579a3082cedbf94a
https://github.com/llvm/llvm-project/commit/8fa1e5771bbd080c8a2a11c0579a3082cedbf94a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
M llvm/test/CodeGen/X86/avx512-bugfix-23634.ll
M llvm/test/CodeGen/X86/avx512-cmp.ll
M llvm/test/CodeGen/X86/avx512-ext.ll
M llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
M llvm/test/CodeGen/X86/combine-sdiv.ll
M llvm/test/CodeGen/X86/divrem-by-select.ll
M llvm/test/CodeGen/X86/fp128-cast.ll
M llvm/test/CodeGen/X86/fp128-i128.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vselect-zero.ll
Log Message:
-----------
[X86] Regenerate some vector constant comments missed in recent patches to improve mask predicate handling in addConstantComments
These were missed as filecheck just ignores what's after the end of the check pattern for each line
Commit: 2096e57905a20903f668848ffd11e6130bfa58e2
https://github.com/llvm/llvm-project/commit/2096e57905a20903f668848ffd11e6130bfa58e2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/avx512fp16-fma-intrinsics.ll
M llvm/test/CodeGen/X86/avx512fp16-mov.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
Log Message:
-----------
[X86] addConstantComments - add FP16 MOVSH asm comments support
Commit: dd70aef05a86bb0c1e04c49cc1bd0457ca362ce3
https://github.com/llvm/llvm-project/commit/dd70aef05a86bb0c1e04c49cc1bd0457ca362ce3
Author: Alex Lorenz <arphaman at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/X86/swift-async-win64.ll
Log Message:
-----------
[x86_64][windows][swift] do not use Swift async extended frame for wi… (#80468)
…ndows x86_64
targets that use windows 64 prologue
Windows x86_64 stack frame layout is currently not compatible with
Swift's async extended frame, which reserves the slot right below RBP
(RBP-8) for the async context pointer, as it doesn't account for the
fact that a stack object in a win64 frame can be allocated at the same
location. This can cause issues at runtime, for instance, Swift's TCA
test code has functions that fail because of this issue, as they spill a
value to that slack slot, which then gets overwritten by a store into
address returned by the @llvm.swift.async.context.addr() intrinsic (that
ends up being RBP - 8), leading to an incorrect value being used at a
later point when that stack slot is being read from again. This change
drops the use of async extended frame for windows x86_64 subtargets and
instead uses the x32 based approach of allocating a separate stack slot
for the stored async context pointer.
Additionally, LLDB which is the primary consumer of the extended frame
makes assumptions like checking for a saved previous frame pointer at
the current frame pointer address, which is also incompatible with the
windows x86_64 frame layout, as the previous frame pointer is not
guaranteed to be stored at the current frame pointer address. Therefore
the extended frame layout can be turned off to fix the current
miscompile without introducing regression into LLDB for windows x86_64
as it already doesn't work correctly. I am still investigating what
should be made for LLDB to support using an allocated stack slot to
store the async frame context instead of being located at RBP - 8 for
windows.
Commit: 930996e9e442d69a321cd5c945543d37c97f4c0e
https://github.com/llvm/llvm-project/commit/930996e9e442d69a321cd5c945543d37c97f4c0e
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
Log Message:
-----------
[ValueTracking][NFC] Pass `SimplifyQuery` to `computeKnownFPClass` family (#80657)
This patch refactors the interface of the `computeKnownFPClass` family
to pass `SimplifyQuery` directly.
The motivation of this patch is to compute known fpclass with
`DomConditionCache`, which was introduced by
https://github.com/llvm/llvm-project/pull/73662. With
`DomConditionCache`, we can do more optimization with context-sensitive
information.
Example (extracted from
[fmt/format.h](https://github.com/fmtlib/fmt/blob/e17bc67547a66cdd378ca6a90c56b865d30d6168/include/fmt/format.h#L3555-L3566)):
```
define float @test(float %x, i1 %cond) {
%i32 = bitcast float %x to i32
%cmp = icmp slt i32 %i32, 0
br i1 %cmp, label %if.then1, label %if.else
if.then1:
%fneg = fneg float %x
br label %if.end
if.else:
br i1 %cond, label %if.then2, label %if.end
if.then2:
br label %if.end
if.end:
%value = phi float [ %fneg, %if.then1 ], [ %x, %if.then2 ], [ %x, %if.else ]
%ret = call float @llvm.fabs.f32(float %value)
ret float %ret
}
```
We can prove the signbit of `%value` is always zero. Then the fabs can
be eliminated.
Commit: 214536b0d8b68f826589600472e28bbb903d6d7a
https://github.com/llvm/llvm-project/commit/214536b0d8b68f826589600472e28bbb903d6d7a
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/test/Driver/target-cpu-features.f90
Log Message:
-----------
Fix broken ARM processor features test (#80717)
This should fix failed build bots, so pushing before Windows build is done.
Commit: 032a70ee1183dba5b942778f855e1d58244e8077
https://github.com/llvm/llvm-project/commit/032a70ee1183dba5b942778f855e1d58244e8077
Author: stephenpeckham <118857872+stephenpeckham at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
Log Message:
-----------
[NFC] Fix typo (#80703)
Commit: d00e6d07b18dbc80b843e332a66d2777c6564523
https://github.com/llvm/llvm-project/commit/d00e6d07b18dbc80b843e332a66d2777c6564523
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/lib/Dialect/SparseTensor/Transforms/SparseAssembler.cpp
M mlir/test/Dialect/SparseTensor/external.mlir
A mlir/test/Dialect/SparseTensor/torch_linalg.mlir
Log Message:
-----------
[mlir][sparse] refine sparse assembler strategy (#80521)
Rewrite *all* public methods, making original internal, private methods,
and exposing wrappers under the original name. This works a bit better
in practice (when combined with c-interface mechanism of torch-mlir for
example).
Commit: ac585ab71470d4f20c96a95b49e852ee1c967003
https://github.com/llvm/llvm-project/commit/ac585ab71470d4f20c96a95b49e852ee1c967003
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M lldb/include/lldb/DataFormatters/TypeCategoryMap.h
Log Message:
-----------
[lldb] Remove unused private TypeCategoryMap methods (NFC) (#80602)
Commit: 0c02ea05c8414e72339e2521d1fdae54e91569bb
https://github.com/llvm/llvm-project/commit/0c02ea05c8414e72339e2521d1fdae54e91569bb
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
Log Message:
-----------
[lldb] Cleanup regex in libcxx formatters (NFC) (#80618)
I noticed a number of regex for libcxx formatters use an unnecessary regex grouping.
This change removes those parentheses.
Commit: 0bf165e383ac9c58dcb1764aef9f35334afa0cc7
https://github.com/llvm/llvm-project/commit/0bf165e383ac9c58dcb1764aef9f35334afa0cc7
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add support for RISC-V Pointer Masking (#79929)
This patch implements the v0.8.1 specification. This patch reports
version 0.8 in llvm since `RISCVISAInfo::ExtensionVersion` only has a
`Major` and `Minor` version number. This patch includes includes support
of the `Ssnpm`, `Smnpm`, `Smmpm`, `Sspm` and `Supm` extensions that make
up RISC-V pointer masking.
All of these extensions require emitting attribute containing correct
`march` string.
`Ssnpm`, `Smnpm`, `Smmpm` extensions introduce a 2-bit WARL field (PMM).
The extension does not specify how PMM is set, and therefore this patch
does not need to address this. One example of how it *could* be set is
using the Zicsr instructions to update the PMM bits of the described
registers.
The full specification can be found at
https://github.com/riscv/riscv-j-extension/blob/master/zjpm-spec.pdf
Commit: 9805c051f7d3a09a629c51461b49f8070c01de62
https://github.com/llvm/llvm-project/commit/9805c051f7d3a09a629c51461b49f8070c01de62
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
[workflows] Close issues used for backports once the PR has been created (#80394)
This will allow us to track the state of the backport request in the PR,
rather than in the issue. The state updates for PRs can be automated, so
this will save us some triage work.
Commit: 37462944513731af2743d95e5dd40bdbeefd6460
https://github.com/llvm/llvm-project/commit/37462944513731af2743d95e5dd40bdbeefd6460
Author: AtariDreams <83477269+AtariDreams at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/cos-1.ll
Log Message:
-----------
[Transforms] Add more cos combinations to SimplifyLibCalls and InstCombine (#79699)
Add cos(fabs(x)) -> cos(x) and cos(copysign(x, y)) -> cos(x).
Commit: 93fd05c0891caa8c68cb37b64217467a0ef60412
https://github.com/llvm/llvm-project/commit/93fd05c0891caa8c68cb37b64217467a0ef60412
Author: Andrew Gozillon <Andrew.Gozillon at amd.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
Log Message:
-----------
[Flang][OpenMP] Attempt to make map-types-and-sizes.f90 test more agnostic to other architectures
This test was updated by me recently, however, the newly
added CHECK-LABEL checks are breaking one of the RHEL
PowerPC buildbots as the functions appear to be generated
slightly different (in this case added attributes I think).
Commit: 64a317ad0765a2b3748d2b74b9a0d4738250787a
https://github.com/llvm/llvm-project/commit/64a317ad0765a2b3748d2b74b9a0d4738250787a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/load.pass.cpp
Log Message:
-----------
[libc++][NFC] Fix typo in comment
Commit: 22544e2a54370a3c0b12765981c312f9ec04f1cc
https://github.com/llvm/llvm-project/commit/22544e2a54370a3c0b12765981c312f9ec04f1cc
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CLOptions.inc
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
A flang/test/Driver/func-attr-fast-math.f90
Log Message:
-----------
[flang] Set fast math related function attributes for -Ofast/-ffast-math (#79301)
The implemented logic matches the logic used for Clang in emitting these
attributes. Although it's hoped that function attributes won't be needed
in the future (vs using fast math flags in individual IR instructions),
there are codegen differences currently with/without these attributes,
as can be seen in issues like #79257 or by hacking Clang to avoid
producing these attributes and observing codegen changes.
Commit: b99163fe8feeacba7797d5479bbcd5d8f327dd2d
https://github.com/llvm/llvm-project/commit/b99163fe8feeacba7797d5479bbcd5d8f327dd2d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Fix description of Ssstrict to have a closing parenthesis.
Commit: dd22140e21f2ef51cf031354966a3d41c191c6e7
https://github.com/llvm/llvm-project/commit/dd22140e21f2ef51cf031354966a3d41c191c6e7
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingPlatformWindows.c
Log Message:
-----------
[Profile][Windows] Drop extern for __buildid. (#80700)
Commit: fa7d0d3e35f74486ccb0faa88ec706defe7dd2d2
https://github.com/llvm/llvm-project/commit/fa7d0d3e35f74486ccb0faa88ec706defe7dd2d2
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/include/flang/Optimizer/Support/InitFIR.h
A flang/test/Fir/OpenACC/legalize-data.fir
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
A mlir/include/mlir/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
A mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/InitAllPasses.h
M mlir/lib/Dialect/OpenACC/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/IR/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
A mlir/test/Dialect/OpenACC/legalize-data.mlir
Log Message:
-----------
[mlir][openacc] Add legalize data pass for compute operation (#80351)
This patch adds a simple pass to replace the uses inside compute operation. It
replaces the `varPtr` values with their corresponding `accPtr` values gathered
through the dataClauseOperands.
private and reductions variables are not included in this pass since they will
normally be replace when they are materialized.
Commit: 9ac6eb5bec2367b34f4b839a051e49318adf9dd1
https://github.com/llvm/llvm-project/commit/9ac6eb5bec2367b34f4b839a051e49318adf9dd1
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
Log Message:
-----------
[mlir][openacc] Add MLIRSupport to MLIROpenACCTransforms
Commit: 152325d342ae430872bb587ed3892253f23f782a
https://github.com/llvm/llvm-project/commit/152325d342ae430872bb587ed3892253f23f782a
Author: S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXIL.td
M llvm/utils/TableGen/DXILEmitter.cpp
Log Message:
-----------
[DirectX][NFC] Change all DXIL TableGen tokens to CamelCase (#80714)
These changes are in preparation for potential improvement of DXIL
operation description and addition of more DXIL operations to `DXIL.td`.
Commit: 4b6062619acf1cdc7b426520dd908d9fab70ed49
https://github.com/llvm/llvm-project/commit/4b6062619acf1cdc7b426520dd908d9fab70ed49
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/include/flang/Optimizer/Support/InitFIR.h
R flang/test/Fir/OpenACC/legalize-data.fir
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
R mlir/include/mlir/Dialect/OpenACC/Transforms/CMakeLists.txt
R mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
R mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/InitAllPasses.h
M mlir/lib/Dialect/OpenACC/CMakeLists.txt
R mlir/lib/Dialect/OpenACC/IR/CMakeLists.txt
R mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
R mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
R mlir/test/Dialect/OpenACC/legalize-data.mlir
Log Message:
-----------
Revert "[mlir][openacc] Add legalize data pass for compute operation (#80351)"
This reverts commit fa7d0d3e35f74486ccb0faa88ec706defe7dd2d2.
Commit: 76706090c2f672ae933798292bfa889f9e3dac3d
https://github.com/llvm/llvm-project/commit/76706090c2f672ae933798292bfa889f9e3dac3d
Author: jeffreytan81 <jeffreytan at meta.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M lldb/include/lldb/API/SBCommandInterpreter.h
M lldb/include/lldb/API/SBStructuredData.h
M lldb/include/lldb/Interpreter/CommandInterpreter.h
M lldb/source/API/SBCommandInterpreter.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Target/Statistics.cpp
M lldb/test/API/commands/statistics/basic/TestStats.py
M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
Log Message:
-----------
Add commands frequency to statistics dump (#80375)
Adding command interpreter statistics into "statistics dump" command so
that we can track the command usage frequency for telemetry purpose.
This is useful to answer questions like what is the most frequently used
lldb commands across all our users.
---------
Co-authored-by: jeffreytan81 <jeffreytan at fb.com>
Commit: c166a43c6e6157b1309ea757324cc0a71c078e66
https://github.com/llvm/llvm-project/commit/c166a43c6e6157b1309ea757324cc0a71c078e66
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/include/clang-c/Index.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Specifiers.h
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/CodeGen/debug-info-cc.c
M clang/test/CodeGen/preserve-call-conv.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Sema/no_callconv.cpp
A clang/test/Sema/preserve-none-call-conv.c
M clang/tools/libclang/CXType.cpp
M llvm/docs/LangRef.rst
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/IR/CallingConv.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/DebugInfo/DWARF/DWARFTypePrinter.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/test/Bitcode/compatibility.ll
A llvm/test/CodeGen/X86/dynamic-regmask-preserve-none.ll
M llvm/test/CodeGen/X86/ipra-reg-usage.ll
M llvm/test/CodeGen/X86/ipra-transform.ll
A llvm/test/CodeGen/X86/preserve_none_swift.ll
A llvm/test/CodeGen/X86/preserve_nonecc64-ret-double.ll
A llvm/test/CodeGen/X86/preserve_nonecc64.ll
A llvm/test/CodeGen/X86/preserve_nonecc_call.ll
A llvm/test/CodeGen/X86/preserve_nonecc_musttail.ll
Log Message:
-----------
New calling convention preserve_none (#76868)
The new experimental calling convention preserve_none is the opposite
side of existing preserve_all. It tries to preserve as few general
registers as possible. So all general registers are caller saved
registers. It can also uses more general registers to pass arguments.
This attribute doesn't impact floating-point registers. Floating-point
registers still follow the c calling convention.
Currently preserve_none is supported on X86-64 only. It changes the c
calling convention in following fields:
* RSP and RBP are the only preserved general registers, all other
general registers are caller saved registers.
* We can use [RDI, RSI, RDX, RCX, R8, R9, R11, R12, R13, R14, R15, RAX]
to pass arguments.
It can improve the performance of hot tailcall chain, because many
callee saved registers' save/restore instructions can be removed if the
tail functions are using preserve_none. In my experiment in protocol
buffer, the parsing functions are improved by 3% to 10%.
Commit: 0d091206dd656c2a9d31d6088a4aa6f9c2cc7156
https://github.com/llvm/llvm-project/commit/0d091206dd656c2a9d31d6088a4aa6f9c2cc7156
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/include/flang/Optimizer/Support/InitFIR.h
A flang/test/Fir/OpenACC/legalize-data.fir
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
A mlir/include/mlir/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
A mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/InitAllPasses.h
M mlir/lib/Dialect/OpenACC/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/IR/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
A mlir/test/Dialect/OpenACC/legalize-data.mlir
Log Message:
-----------
[mlir][openacc] Add legalize data pass for compute operation (#80351)
This patch adds a simple pass to replace the uses inside compute operation. It
replaces the `varPtr` values with their corresponding `accPtr` values gathered
through the dataClauseOperands.
private and reductions variables are not included in this pass since they will
normally be replace when they are materialized.
Reland with fix for dependencies
Commit: cd481fa827b76953cd12dae9319face96670c0b3
https://github.com/llvm/llvm-project/commit/cd481fa827b76953cd12dae9319face96670c0b3
Author: Yinying Li <107574043+yinying-lisa-li at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/include/mlir-c/Dialect/SparseTensor.h
M mlir/include/mlir/Dialect/SparseTensor/IR/Enums.h
M mlir/lib/Bindings/Python/DialectSparseTensor.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.h
M mlir/test/CAPI/sparse_tensor.c
M mlir/test/Dialect/SparseTensor/conversion.mlir
M mlir/test/Dialect/SparseTensor/sparse_fill_zero.mlir
M mlir/test/python/dialects/sparse_tensor/dialect.py
Log Message:
-----------
[mlir][sparse] Change LevelType enum to 64 bit (#80501)
1. C++ enum is set through enum class LevelType : uint_64.
2. C enum is set through typedef uint_64 level_type. It is due to the
limitations in Windows build: setting enum width to ui64 is not
supported in C.
Commit: ae9e1fd2edb6eb11dfd6816d1e9013e39e21aa04
https://github.com/llvm/llvm-project/commit/ae9e1fd2edb6eb11dfd6816d1e9013e39e21aa04
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
Log Message:
-----------
[clang] Fix extractAPI typo in comments, NFC
Commit: 6b42625b1f983f6aafb9f4fe2953970c73963603
https://github.com/llvm/llvm-project/commit/6b42625b1f983f6aafb9f4fe2953970c73963603
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenACC/acc-update.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/canonicalize.mlir
M mlir/test/Dialect/OpenACC/invalid.mlir
M mlir/test/Dialect/OpenACC/legalize-data.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[mlir][openacc] Simplify IR with acc.loop control (#80387)
When the new `acc.loop` design was introduced some of the loop
information like `gang`/`vector`/`worker` were also updated to support
`device_type`.
With a conflict in parsing/printing, the keyword only value for
`async`/`gang`/`vector`/`worker` were printed/parsed with an empty set
of parenthesis `()`. To make the IR clearer to read and similar across
the operations, the loop control part of is now prefixed by `control`
and this allow to remove the need of the empty `()`.
Commit: e722d9662dd8cdd3be9e434b057593e97a7d4417
https://github.com/llvm/llvm-project/commit/e722d9662dd8cdd3be9e434b057593e97a7d4417
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/and-add-lsr.ll
Log Message:
-----------
[DAG] Avoid a crash when checking size of scalable type in visitANDLike
Fixes https://github.com/llvm/llvm-project/issues/80744. This transform
doesn't handled vectors at all, The fixed length ones pass the first
check, but would fail the constant operand checks which immediate follow.
This patch takes the simplest approach, and just guards the transform
for scalar integers.
Commit: dfdea4d5fb18ddf928b043a359e50c3f015dae71
https://github.com/llvm/llvm-project/commit/dfdea4d5fb18ddf928b043a359e50c3f015dae71
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/MC/RISCV/attribute-arch.s
Log Message:
-----------
[RISCV] Update llvm/test/MC/RISCV/attribute-arch.s for RISC-V Pointer Masking (#80748)
I forgot to update this test in #79929
Commit: 8ce036d539cdaaee50ce7c63f963b7d68c43282e
https://github.com/llvm/llvm-project/commit/8ce036d539cdaaee50ce7c63f963b7d68c43282e
Author: ChiaHungDuan <chiahungduan at google.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/tsd_test.cpp
M compiler-rt/lib/scudo/standalone/tsd_exclusive.h
M compiler-rt/lib/scudo/standalone/tsd_shared.h
Log Message:
-----------
[scudo] Add ScopedTSD to avoid releasing TSD manually (#80061)
This makes the use of TSD be RAII style and avoid the exposing of the
type of TSDs.
Also move some thread safety analyses from static to runtime because of
its limitation. Even we mark some code path as NO_THREAD_SAFETY_ANALYSIS
but we still have the `assertLocked()` cover the correctness.
Commit: a7bc9cb6ffa91ff0ebabc45c0c7263c7c2c3a4de
https://github.com/llvm/llvm-project/commit/a7bc9cb6ffa91ff0ebabc45c0c7263c7c2c3a4de
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/include/clang/Sema/Lookup.h
M clang/test/CXX/class.derived/class.member.lookup/p11.cpp
Log Message:
-----------
[Clang][Sema] Fix regression due to missing ambiguity check before attempting access check. (#80730)
Previously when fixing ambiguous lookup diagnostics in
cc1b6668c57170cd440d321037ced89d6a61a9cb The change refactored
`LookupResult` to split out diagnosing access and ambiguous lookups. The
call to `getSema().CheckLookupAccess(...)` should have guarded by a
check for isAmbiguous(). This change adds that guard.
Fixes: https://github.com/llvm/llvm-project/issues/80435
Commit: 6ce03ff3fef8fb6fa9afe8eb22c6d98bced26d48
https://github.com/llvm/llvm-project/commit/6ce03ff3fef8fb6fa9afe8eb22c6d98bced26d48
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/ProfDataUtils.cpp
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
Revert "[IR] Use range-based for loops (NFC)"
This reverts commit e8512786fedbfa6ddba70ceddc29d7122173ba5e.
This revert is done because llvm::drop_begin over an empty ArrayRef
doesn't return an empty range, and therefore can lead to an invalid
address returned instead.
See discussion in https://github.com/llvm/llvm-project/pull/80737 for
more context.
Commit: e2cfdf7b6a09a2159a2ce3cf4fff022b6d98b928
https://github.com/llvm/llvm-project/commit/e2cfdf7b6a09a2159a2ce3cf4fff022b6d98b928
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M libcxx/include/__memory/uninitialized_algorithms.h
A libcxx/test/libcxx/containers/sequences/vector/const_T.compile.pass.cpp
Log Message:
-----------
[libc++] Fix vector<const T> (#80711)
#80558 introduced code that assumed that the element type of `vector` is
never const. This fixes it and adds a test. Eventually we should remove
the `allocator<const T>` extension.
Commit: dbed89814e5b9ba25a349a5b9acf4a7164e33834
https://github.com/llvm/llvm-project/commit/dbed89814e5b9ba25a349a5b9acf4a7164e33834
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
Log Message:
-----------
[AMDGPU] Add missing `__builtin_amdgcn_wavefrontsize` builtin (#80741)
Summary:
The backend supports the wavefrontsize intrinsic, and suggests that it
is tied to a corresponding clang builtin, but it is not actually
present. This simply adds it in so it can be used from clang. This
attribute likely isn't the best to rely on, but for the `libc` use-case
we will need to detect a struct's differing size in a way that will
depend on the wavefront size.
Commit: 5a9af39aab40bba52d4e46cabf4b1ab47f614fa2
https://github.com/llvm/llvm-project/commit/5a9af39aab40bba52d4e46cabf4b1ab47f614fa2
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/test/Dialect/SparseTensor/sparse_vector_mv.mlir
Log Message:
-----------
[mlir][sparse] made sparse vectorizer more robust on position of invariants (#80766)
Because the sparse vectorizer relies on the code coming out of the
sparsifier, the "patterns" are not always made very general. However, a
recent change in the generated code revealed an obvious situation where
the subscript analysis could be made a bit more robust.
Fixes:
https://github.com/llvm/llvm-project/issues/79897
Commit: 792d928e15aa30c8b686eff465598ceea0b03891
https://github.com/llvm/llvm-project/commit/792d928e15aa30c8b686eff465598ceea0b03891
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M .github/workflows/libclc-tests.yml
M .github/workflows/lldb-tests.yml
M .github/workflows/llvm-project-tests.yml
Log Message:
-----------
[workflows] Fix lldb-tests and libclc-tests (#80751)
This was broken by d25022bb689b9bf48a24c0ae6c29c1d3c2f32823, which
caused the workflow to pass an empty string to ninja as the target. The
'all' target is probably not the right target for these tests, but this
is what the behavior was before
d25022bb689b9bf48a24c0ae6c29c1d3c2f32823.
Commit: eff77d8456a5ba9a05a0c3a29113643fbb180230
https://github.com/llvm/llvm-project/commit/eff77d8456a5ba9a05a0c3a29113643fbb180230
Author: Florian Mayer <fmayer at google.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/fuzz/get_error_info_fuzzer.cpp
M compiler-rt/lib/scudo/standalone/platform.h
M compiler-rt/lib/scudo/standalone/stack_depot.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c_bionic.cpp
Log Message:
-----------
[scudo] [MTE] resize stack depot for allocation ring buffer (#74515)
Co-authored-by: ChiaHungDuan <f103119 at gmail.com>
Commit: c175157dc158d1e4ebdf60c6af75a5106c474780
https://github.com/llvm/llvm-project/commit/c175157dc158d1e4ebdf60c6af75a5106c474780
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/IR/Enums.h
Log Message:
-----------
[mlir][sparse] fix windows build issue with hex literals (#80770)
Fixes:
https://github.com/llvm/llvm-project/issues/73828
Commit: c3291253c3b5d1794492ccebe39b7c2c5f74c378
https://github.com/llvm/llvm-project/commit/c3291253c3b5d1794492ccebe39b7c2c5f74c378
Author: Florian Mayer <fmayer at google.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/fuzz/get_error_info_fuzzer.cpp
M compiler-rt/lib/scudo/standalone/platform.h
M compiler-rt/lib/scudo/standalone/stack_depot.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c_bionic.cpp
Log Message:
-----------
Revert "[scudo] [MTE] resize stack depot for allocation ring buffer" (#80777)
Reverts llvm/llvm-project#74515
Broke build: https://lab.llvm.org/buildbot/#/builders/75/builds/42512
Commit: 99ddd77ed9e12f55f8d4b66eec02154a0b3a6bf0
https://github.com/llvm/llvm-project/commit/99ddd77ed9e12f55f8d4b66eec02154a0b3a6bf0
Author: modiking <modiking213 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
A llvm/test/Transforms/LoopUnroll/pr77842.ll
Log Message:
-----------
[LoopUnroll] Introduce PragmaUnrollFullMaxIterations as a hard cap on how many iterations we try to unroll (#78648)
Fixes [PR77842](https://github.com/llvm/llvm-project/issues/77842) where
UBSAN causes pragma full unroll to try and unroll INT_MAX times. This
sets a cap to make sure we don't attempt this and crash the compiler.
Testing:
ninja check-all with new test
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: a71147dd28c6676fc46e4ec0a5d6e0b0823cced5
https://github.com/llvm/llvm-project/commit/a71147dd28c6676fc46e4ec0a5d6e0b0823cced5
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
A llvm/test/CodeGen/WebAssembly/suboptimal-compare.ll
Log Message:
-----------
[WebAssembly] improve getRegForPromotedValue to avoid meanless value copy (#80469)
When promoted value, it is meaningless to copy value from reg to another
reg with the same type.
This PR add additional check for this cases to reduce the code size.
Fixes: #80053.
Commit: 06a728f3feab876f9195738b5774e82dadc0f3a7
https://github.com/llvm/llvm-project/commit/06a728f3feab876f9195738b5774e82dadc0f3a7
Author: Jinyang He <hejinyang at loongson.cn>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
A lld/test/ELF/loongarch-relax-align.s
A lld/test/ELF/loongarch-relax-emit-relocs.s
Log Message:
-----------
[lld][ELF] Support relax R_LARCH_ALIGN (#78692)
Refer to commit 6611d58f5bbc ("Relax R_RISCV_ALIGN"), we can relax
R_LARCH_ALIGN by same way. Reuse `SymbolAnchor`, `RISCVRelaxAux` and
`initSymbolAnchors` to simplify codes. As `riscvFinalizeRelax` is an
arch-specific function, put it override on `TargetInfo::finalizeRelax`,
so that LoongArch can override it, too.
The flow of relax R_LARCH_ALIGN is almost consistent with RISCV. The
difference is that LoongArch only has 4-bytes NOP and all executable
insn is 4-bytes aligned. So LoongArch not need rewrite NOP sequence.
Alignment maxBytesEmit parameter is supported in psABI v2.30.
Commit: abe102b87204a8b5bb637b675ed58ee6695016af
https://github.com/llvm/llvm-project/commit/abe102b87204a8b5bb637b675ed58ee6695016af
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M compiler-rt/lib/asan/asan_descriptions.cpp
M compiler-rt/lib/hwasan/hwasan_report.cpp
M compiler-rt/lib/memprof/memprof_descriptions.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_printer.cpp
Log Message:
-----------
[Sanitizer][NFC] Replaces a few `InternalScopedString::AppendF` with `InternalScopedString::Append` (#80574)
Commit: c1c5b854adc9414ee3d8c55ddd07bdb4cc5b7171
https://github.com/llvm/llvm-project/commit/c1c5b854adc9414ee3d8c55ddd07bdb4cc5b7171
Author: Nilanjana Basu <n_basu at apple.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopDistribute/basic-with-memchecks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_estimated_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_known_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/zero_unroll.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/unroll-small-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-loopid-dbg.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll
Log Message:
-----------
[LV] Remove loop trip count threshold for deciding whether to interleave a loop (#67725)
A set of microbenchmarks (https://github.com/llvm/llvm-test-suite/pull/26) showed that loop interleaving can be beneficial for loops with low trip count as well. Loop interleaving count computation is updated accordingly in prior patches while this patch removes the loop trip count threshold for interleaving.
Commit: c0cb0be85ca7aa3f9c14f2c8272f581a20474619
https://github.com/llvm/llvm-project/commit/c0cb0be85ca7aa3f9c14f2c8272f581a20474619
Author: Derek Schuff <dschuff at chromium.org>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/WebAssembly/immediates.ll
Log Message:
-----------
Mark llvm/test/CodeGen/WebAssembly/immediates.ll as passing on MIPS (#80771)
Fixes #80533
Commit: 0123cefc00177e4fc7daa0dadf98ca8336760785
https://github.com/llvm/llvm-project/commit/0123cefc00177e4fc7daa0dadf98ca8336760785
Author: jeffreytan81 <jeffreytan at meta.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Target/PostMortemProcess.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/ProcessTrace.h
M lldb/source/API/SBProcess.cpp
M lldb/source/Plugins/Process/FreeBSDKernel/ProcessFreeBSDKernel.cpp
M lldb/source/Plugins/Process/FreeBSDKernel/ProcessFreeBSDKernel.h
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.h
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.h
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.h
M lldb/source/Target/ProcessTrace.cpp
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
Log Message:
-----------
Add a new SBProcess:: GetCoreFile() API (#80767)
We have a Python script that needs to locate coredump path during
debugging so that we can retrieve certain metadata files associated with
it. Currently, there is no API for this.
This patch adds a new `SBProcess::GetCoreFile()` to retrieve target dump
file spec used for dump debugging. Note: this is different from the main
executable module spec. To achieve this, the patch hoists m_core_file
into PostMortemProcess for sharing.
---------
Co-authored-by: jeffreytan81 <jeffreytan at fb.com>
Commit: 2c2d291b4568381999442e47fc77f949f19be0bc
https://github.com/llvm/llvm-project/commit/2c2d291b4568381999442e47fc77f949f19be0bc
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
Log Message:
-----------
[concepts] Extract function template pack arguments from the current instantiation if possible (#80594)
Before the constraint substitution, we employ
`getTemplateInstantiationArgs`, which in turn attempts to inspect
`TemplateArgument`s from the function template. For parameter packs from
their parent contexts, we used to extract the arguments from the
specialization type, in which could result in non-canonical argument
types e.g. `PackExpansionType`.
This may break the contract that, during a tree transformation, in
`TreeTransform::TryExpandParameterPacks`, the corresponding
`TemplateArgument`s for an `UnexpandedParameterPack` are expected to be
of `Pack` kinds if we're expanding template parameters.
Fixes https://github.com/llvm/llvm-project/issues/72557.
Commit: 62838b872f1d8c6ffd88c355ece9324258169bdd
https://github.com/llvm/llvm-project/commit/62838b872f1d8c6ffd88c355ece9324258169bdd
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/test/CAPI/sparse_tensor.c
Log Message:
-----------
[mlir][test] Fix -Wformat in sparse_tensor.c (NFC)
llvm-project/mlir/test/CAPI/sparse_tensor.c:50:42:
error: format specifies type 'unsigned long' but the argument has type 'MlirSparseTensorLevelType' (aka 'unsigned long long') [-Werror,-Wformat]
50 | fprintf(stderr, "level_type: %lu\n", lvlTypes[l]);
| ~~~ ^~~~~~~~~~~
| %llu
1 error generated.
Commit: 8f80df0f52c4294d23d0510b01be6d6491714058
https://github.com/llvm/llvm-project/commit/8f80df0f52c4294d23d0510b01be6d6491714058
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M .github/workflows/build-ci-container.yml
R .github/workflows/containers/github-action-ci/Dockerfile
A .github/workflows/containers/github-action-ci/bootstrap.patch
A .github/workflows/containers/github-action-ci/stage1.Dockerfile
A .github/workflows/containers/github-action-ci/stage2.Dockerfile
A .github/workflows/containers/github-action-ci/storage.conf
Log Message:
-----------
[Github] Use building LLVM as perf-training for CI container (#80713)
This patch adjusts the build process for building the toolchain for the
CI container to perform more rigorous perf-training for PGO,
particularly building the entirety of LLVM as that is what showed the
best results while benchmarking. This patch also splits the job into two
stages to avoid timeouts due to the large increase in buildtime. There
are a couple other hacks added in here to make things work that we can
do away with eventually once we're able to run jobs like this on more
powerful self-hosted runners.
Commit: 5953532615595918d006ace2ad83fe33d1cd3915
https://github.com/llvm/llvm-project/commit/5953532615595918d006ace2ad83fe33d1cd3915
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M lldb/docs/lldb-gdb-remote.txt
M lldb/include/lldb/Breakpoint/WatchpointAlgorithms.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/include/lldb/lldb-private-enumerations.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
M lldb/source/Breakpoint/WatchpointAlgorithms.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/test/API/functionalities/watchpoint/large-watchpoint/TestLargeWatchpoint.py
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb] Add QSupported key to report watchpoint types supported (#80376)
debugserver on arm64 devices can manage both Byte Address Select
watchpoints (1-8 bytes) and MASK watchpoints (8 bytes-2 gigabytes). This
adds a SupportedWatchpointTypes key to the QSupported response from
debugserver with a list of these, so lldb can take full advantage of
them when creating larger regions with a single hardware watchpoint.
Also add documentation for this, and two other lldb extensions, to the
lldb-gdb-remote.txt documentation.
Re-enable TestLargeWatchpoint.py on Darwin systems when testing with the
in-tree built debugserver. I can remove the "in-tree built debugserver"
in the future when this new key is handled by an Xcode debugserver.
Commit: 87ff65b07c82337d99b0dc0ca562e394ecedc11b
https://github.com/llvm/llvm-project/commit/87ff65b07c82337d99b0dc0ca562e394ecedc11b
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/test/CAPI/sparse_tensor.c
Log Message:
-----------
[mlir][test] Fix -Wformat in sparse_tensor.c (NFC)
llvm-project/mlir/test/CAPI/sparse_tensor.c:50:43:
error: format specifies type 'unsigned long long' but the argument has type 'MlirSparseTensorLevelType' (aka 'unsigned long') [-Werror,-Wformat]
fprintf(stderr, "level_type: %llu\n", lvlTypes[l]);
~~~~ ^~~~~~~~~~~
%lu
1 error generated.
Commit: c1ac2cfac7f160107041758f458aaf1087f5cac2
https://github.com/llvm/llvm-project/commit/c1ac2cfac7f160107041758f458aaf1087f5cac2
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/docs/Dialects/Affine.md
Log Message:
-----------
Use a markdown list in Affine dialect docs
Commit: 9a5fb74fd162da70609fe5f81864d01cdc776df1
https://github.com/llvm/llvm-project/commit/9a5fb74fd162da70609fe5f81864d01cdc776df1
Author: Artem Tyurin <artem.tyurin at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/test/Dialect/SPIRV/Transforms/inlining.mlir
Log Message:
-----------
[mlir][spirv] Handle a missing case when inlining spirv.ReturnValue (#80733)
Fixes https://github.com/llvm/llvm-project/issues/73285.
Commit: d193ac4f7180d8242c25d941cf3ff8a150538af6
https://github.com/llvm/llvm-project/commit/d193ac4f7180d8242c25d941cf3ff8a150538af6
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-transfer-collapse-inner-most-dims.mlir
Log Message:
-----------
[mlir][vector] Drop inner unit dims for xWrite on dynamic shapes. (#80725)
This is part of
https://github.com/llvm/llvm-project/commit/66347e516e22f9159b86024071fb92f364ac4418
The regression in downstream projects is about transfer_read patterns,
which needs more investigation. Add the support for transfer_write for
now.
Commit: 942cb2427a0e19f63b2f5b7da3d3fa6a594df3fe
https://github.com/llvm/llvm-project/commit/942cb2427a0e19f63b2f5b7da3d3fa6a594df3fe
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/unittests/MIR/PassBuilderCallbacksTest.cpp
Log Message:
-----------
[CodeGen][NewPM] Consolidate PASS_NAME and CONSTRUCTOR in MachinePassRegistry.def (#80779)
This matches the optimization pipeline's PassRegistry.def.
I ran into a bug where CONSTRUCTOR wasn't always being used (in
PassBuilder::registerMachineFunctionAnalyses()).
Make DUMMY_* just accept a pass name, there's no point in having proper
constructors if the generated dummy class has a templated constructor
accepting arbitrary arguments.
Remove unused getPassNameFromLegacyName() as it was using this but for
no purpose.
Remove DUMMY_MACHINE_FUNCTION_ANALYSIS, we can just add those as we port
them.
This for some reason exposed missing mock calls in existing unittests.
Commit: 617602d4f23e89e56afd0f550bcf72deb83ed0cb
https://github.com/llvm/llvm-project/commit/617602d4f23e89e56afd0f550bcf72deb83ed0cb
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Handle generic selections inside parentheses (#79785)
new
```C
while (_Generic(x, //
long: x)(x) > x) {
}
while (_Generic(x, //
long: x)(x)) {
}
```
old
```C
while (_Generic(x, //
long: x)(x) > x) {
}
while (_Generic(x, //
long: x)(x)) {
}
```
In the first case above, the second line previously aligned to the open
parenthesis. The 4 spaces did not get added by the fallback line near
the end of getNewLineColumn because there was already some indentaton.
Now the spaces get added explicitly.
In the second case above, without the fake parentheses, the second line
did not respect the outer parentheses, because the LastSpace field did
not get set without the fake parentheses. Now the indentation of the
outer level is used instead.
Commit: 1442b0e65370b603dcd4c7cfc300f19937c3bc79
https://github.com/llvm/llvm-project/commit/1442b0e65370b603dcd4c7cfc300f19937c3bc79
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[TableGen] Remove redundant buffer copies for ULEB128 decode calls. (#80199)
This patch removes a couple of redundant buffer copies in emitTable for
setting up calls to decodeULEB128. Instead, provide the Table.data
buffer directly to the calls-- where decodeULEB128 does its own buffer
overflow checking.
Factor out 7 explicit loops to emit ULEB128 bytes into emitULEB128. Also
factor out 4 copies of 24-bit numtoskip emission into emitNumToSkip.
The functionality is already covered by existing unit tests and by
virtue of most of the in-tree back-ends exercising the decoder emitter.
Commit: fa70b5d1309f15244cb5528d545d42865cbf8e18
https://github.com/llvm/llvm-project/commit/fa70b5d1309f15244cb5528d545d42865cbf8e18
Author: Yuxuan Chen <yuxuanchen1997 at outlook.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[Coroutines][NFC] Refactor CoroSplit for Switch Resume ABI (#80758)
Commit: 397e91f0f387bf2db0cc320a9078a60d2334545e
https://github.com/llvm/llvm-project/commit/397e91f0f387bf2db0cc320a9078a60d2334545e
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M compiler-rt/lib/memprof/memprof_mapping.h
Log Message:
-----------
[MemProf][NFC] Compute SHADOW_ENTRY_SIZE from MEM_GRANULARITY and SHA… (#80589)
…DOW_SCALE
As MEM_GRANULARITY represents the size of memory block mapped to a
single shadow entry, and SHADOW_SCALE represents the scale of shadow
mapping, so the single shadow entry size can be computed as
(MEM_GRANULARITY >> SHADOW_SCALE).
This patch replaces the hardcoded SHADOW_ENTRY_SIZE with
(MEM_GRANULARITY >> SHADOW_SCALE).
Commit: 0716d31649c44dd622cca6632b0c46a8dcafaa2d
https://github.com/llvm/llvm-project/commit/0716d31649c44dd622cca6632b0c46a8dcafaa2d
Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/RISCVFoldMasks.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV][NFC] Use maybe_unused instead of casting to void to fix unused variable warning. (#80651)
Commit: d53043fa8b2223a1c985e4c74794aa248b4c9e6b
https://github.com/llvm/llvm-project/commit/d53043fa8b2223a1c985e4c74794aa248b4c9e6b
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][Bazel] Adjust BUILD.bazel according to 0d091206dd656c2a9d31d6088a4aa6f9c2cc7156
Commit: 7d055af14b7dd7e782b87fb883205eda65e8bd44
https://github.com/llvm/llvm-project/commit/7d055af14b7dd7e782b87fb883205eda65e8bd44
Author: Joshua Cao <cao.joshua at yahoo.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M mlir/include/mlir/IR/SymbolInterfaces.td
M mlir/test/Dialect/LLVMIR/global.mlir
M mlir/test/Dialect/Linalg/transform-op-replace.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/IR/invalid-func-op.mlir
M mlir/test/IR/region.mlir
M mlir/test/IR/traits.mlir
M mlir/test/Transforms/canonicalize-dce.mlir
M mlir/test/Transforms/canonicalize.mlir
M mlir/test/Transforms/constant-fold.mlir
M mlir/test/Transforms/cse.mlir
M mlir/test/Transforms/test-legalizer-full.mlir
M mlir/test/python/ir/value.py
Log Message:
-----------
[mlir][Symbol] Add verification that symbol's parent is a SymbolTable (#80590)
Following the discussion in
https://discourse.llvm.org/t/symboltable-and-symbol-parent-child-relationship/75446,
we should enforce that a symbol's immediate parent is a symbol table.
I changed some tests to pass the verification. In most cases, we can
wrap the func with a module, change the func to another op with regions
i.e. scf.if, or change the expected error message.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 47a12cca442cb52c33fc592183998f3b7bdd5094
https://github.com/llvm/llvm-project/commit/47a12cca442cb52c33fc592183998f3b7bdd5094
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
Log Message:
-----------
CoverageMapping.cpp: s/MaxBitmapID/MaxBitmapIdx/ in getMaxBitmapSize()
Commit: 03881dc0a7695f4c499cc07042b8c59ad7b7335a
https://github.com/llvm/llvm-project/commit/03881dc0a7695f4c499cc07042b8c59ad7b7335a
Author: Marius Brehler <marius.brehler at iml.fraunhofer.de>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/EmitC/ops.mlir
A mlir/test/Target/Cpp/declare_func.mlir
Log Message:
-----------
[mlir][emitc] Add a `declare_func` operation (#80297)
This adds the `emitc.declare_func` operation that allows to emit the
declaration of an `emitc.func` at a specific location.
Commit: 38476b063f164995b85e47472e3c2e0a9c5f9075
https://github.com/llvm/llvm-project/commit/38476b063f164995b85e47472e3c2e0a9c5f9075
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
A llvm/utils/count_running_jobs.py
Log Message:
-----------
[Github] Add script to count running jobs (#80250)
This patch adds a script to automatically query the number of running
jobs and print them to the terminal as this functionality isn't
available through the Github UI (unless you are a Github administrator).
Commit: 0b62218110f0945c6957e549f9fc1a2f2f87a604
https://github.com/llvm/llvm-project/commit/0b62218110f0945c6957e549f9fc1a2f2f87a604
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
Log Message:
-----------
Anonymize `MCDCRecordProcessor`
Commit: 933247d9d6a2aee66de49e84077ce116630e76cd
https://github.com/llvm/llvm-project/commit/933247d9d6a2aee66de49e84077ce116630e76cd
Author: Anton Sidorenko <anton.sidorenko at syntacore.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/sqrt.ll
Log Message:
-----------
[SimplifyLibCalls] Merge sqrt into the power of exp (#79146)
Under fast-math flags it's possible to convert `sqrt(exp(X)) `into
`exp(X * 0.5)`. I suppose that this transformation is always profitable.
This is similar to the optimization existing in GCC.
Commit: 984dd15d4da33337b2800d4776aa8ecc168b145e
https://github.com/llvm/llvm-project/commit/984dd15d4da33337b2800d4776aa8ecc168b145e
Author: j-jorge <j-jorge at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/include/clang/Tooling/Inclusions/IncludeStyle.h
M clang/lib/Format/Format.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/Tooling/Inclusions/IncludeStyle.cpp
M clang/unittests/Format/SortIncludesTest.cpp
Log Message:
-----------
[clang-format] Add MainIncludeChar option. (#78752)
Resolves #27008, #39735, #53013, #63619.
Hello, this PR adds the MainIncludeChar option to clang-format, allowing
to select which include syntax must be considered when searching for the
main header: quotes (`#include "foo.hpp"`, the default), brackets
(`#include <foo.hpp>`), or both.
The lack of support for brackets has been reported many times, see the
linked issues, so I am pretty sure there is a need for it :)
A short note about why I did not implement a regex approach as discussed
in #53013: while a regex would have allowed many extra ways to describe
the main header, the bug descriptions listed above suggest a very simple
need: support brackets for the main header. This PR answers this needs
in a quite simple way, with a very simple style option. IMHO the feature
space covered by the regex (again, for which there is no demand :)) can
be implemented latter, in addition to the proposed option.
The PR also includes tests for the option with and without grouped
includes.
Commit: edfc21a5759e9f5f5025885da9b0b879204aff22
https://github.com/llvm/llvm-project/commit/edfc21a5759e9f5f5025885da9b0b879204aff22
Author: vigbalu <70995650+vigbalu at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M openmp/runtime/src/include/omp-tools.h.var
Log Message:
-----------
[OMPD] Runtime Entry Point functions for OMPD in libomp.so need C linkage as per standard. (#79246)
Adding extern "C" to all the entry point functions to make sure that
these functions are not mangled.
Commit: 42b5b720caf62e0710b9c1e32e894d8606106a19
https://github.com/llvm/llvm-project/commit/42b5b720caf62e0710b9c1e32e894d8606106a19
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix not running -global-isel in global isel test
Commit: 0473e322f67228a9c2dbf462357e5b4a2b3799be
https://github.com/llvm/llvm-project/commit/0473e322f67228a9c2dbf462357e5b4a2b3799be
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
M mlir/test/Dialect/ArmSME/vector-legalization.mlir
Log Message:
-----------
[mlir][ArmSME] Add rewrite to lift illegal vector.transposes to memory (#80170)
When unrolling the reduction dimension of something like a matmul for
SME, you can end up with transposed reads of illegal types, like so:
```mlir
%illegalRead = vector.transfer_read %memref[%a, %b]
: memref<?x?xf32>, vector<[8]x4xf32>
%legalType = vector.transpose %illegalRead, [1, 0]
: vector<[8]x4xf32> to vector<4x[8]xf32>
```
Here the `vector<[8]x4xf32>` is an illegal type, there's no way to lower
a scalable vector of fixed vectors. However, as the final type
`vector<4x[8]xf32>` is legal, we can instead lift the transpose to
memory (producing a strided memref), and eliminate all the illegal
types. This is shown below.
```mlir
%readSubview = memref.subview %memref[%a, %b] [%c8_vscale, %c4] [%c1, %c1]
: memref<?x?xf32> to memref<?x?xf32>
%transpose = memref.transpose %readSubview (d0, d1) -> (d1, d0)
: memref<?x?xf32> to memref<?x?xf32>
%legalType = vector.transfer_read %transpose[%c0, %c0]
: memref<?x?xf32>, vector<4x[8]xf32>
```
Commit: 3eb1e6d8e930f5aff17b8d6bcc160f5bbf8cabc7
https://github.com/llvm/llvm-project/commit/3eb1e6d8e930f5aff17b8d6bcc160f5bbf8cabc7
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/src/errno/libc_errno.cpp
M libc/src/errno/libc_errno.h
M libc/test/IntegrationTest/test.h
M libc/test/UnitTest/ErrnoSetterMatcher.h
M libc/test/UnitTest/FPMatcher.h
M libc/test/UnitTest/FuchsiaTest.h
M libc/test/UnitTest/LibcTest.h
M libc/test/integration/src/pthread/pthread_create_test.cpp
M libc/test/integration/src/pthread/pthread_join_test.cpp
M libc/test/integration/src/unistd/getcwd_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/dirent/dirent_test.cpp
M libc/test/src/errno/errno_test.cpp
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/acosf_test.cpp
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/coshf_test.cpp
M libc/test/src/math/exp10_test.cpp
M libc/test/src/math/exp10f_test.cpp
M libc/test/src/math/exp2_test.cpp
M libc/test/src/math/exp2f_test.cpp
M libc/test/src/math/exp_test.cpp
M libc/test/src/math/expf_test.cpp
M libc/test/src/math/expm1_test.cpp
M libc/test/src/math/expm1f_test.cpp
M libc/test/src/math/log10_test.cpp
M libc/test/src/math/log1p_test.cpp
M libc/test/src/math/log1pf_test.cpp
M libc/test/src/math/log2_test.cpp
M libc/test/src/math/log2f_test.cpp
M libc/test/src/math/log_test.cpp
M libc/test/src/math/powf_test.cpp
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/math/sinhf_test.cpp
M libc/test/src/math/smoke/RoundToIntegerTest.h
M libc/test/src/math/smoke/acosf_test.cpp
M libc/test/src/math/smoke/acoshf_test.cpp
M libc/test/src/math/smoke/asinf_test.cpp
M libc/test/src/math/smoke/asinhf_test.cpp
M libc/test/src/math/smoke/atanf_test.cpp
M libc/test/src/math/smoke/atanhf_test.cpp
M libc/test/src/math/smoke/cosf_test.cpp
M libc/test/src/math/smoke/coshf_test.cpp
M libc/test/src/math/smoke/exp10f_test.cpp
M libc/test/src/math/smoke/exp2f_test.cpp
M libc/test/src/math/smoke/expf_test.cpp
M libc/test/src/math/smoke/expm1f_test.cpp
M libc/test/src/math/smoke/sincosf_test.cpp
M libc/test/src/math/smoke/sinf_test.cpp
M libc/test/src/math/smoke/sinhf_test.cpp
M libc/test/src/math/smoke/tanf_test.cpp
M libc/test/src/math/smoke/tanhf_test.cpp
M libc/test/src/math/tanf_test.cpp
M libc/test/src/math/tanhf_test.cpp
M libc/test/src/sched/affinity_test.cpp
M libc/test/src/sched/cpu_count_test.cpp
M libc/test/src/sched/get_priority_test.cpp
M libc/test/src/sched/param_and_scheduler_test.cpp
M libc/test/src/sched/sched_rr_get_interval_test.cpp
M libc/test/src/sched/yield_test.cpp
M libc/test/src/signal/sigaltstack_test.cpp
M libc/test/src/signal/signal_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
M libc/test/src/stdio/fgetc_test.cpp
M libc/test/src/stdio/fgetc_unlocked_test.cpp
M libc/test/src/stdio/fgets_test.cpp
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/stdio/fopencookie_test.cpp
M libc/test/src/stdio/remove_test.cpp
M libc/test/src/stdio/setvbuf_test.cpp
M libc/test/src/stdio/unlocked_fileop_test.cpp
M libc/test/src/stdlib/StrtolTest.h
M libc/test/src/stdlib/atof_test.cpp
M libc/test/src/stdlib/strtod_test.cpp
M libc/test/src/stdlib/strtof_test.cpp
M libc/test/src/stdlib/strtoint32_test.cpp
M libc/test/src/stdlib/strtoint64_test.cpp
M libc/test/src/stdlib/strtold_test.cpp
M libc/test/src/string/strdup_test.cpp
M libc/test/src/sys/mman/linux/madvise_test.cpp
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/mmap_test.cpp
M libc/test/src/sys/mman/linux/mprotect_test.cpp
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
M libc/test/src/sys/prctl/linux/prctl_test.cpp
M libc/test/src/sys/random/linux/getrandom_test.cpp
M libc/test/src/sys/resource/getrlimit_setrlimit_test.cpp
M libc/test/src/sys/select/select_ui_test.cpp
M libc/test/src/sys/sendfile/sendfile_test.cpp
M libc/test/src/sys/stat/chmod_test.cpp
M libc/test/src/sys/stat/fchmod_test.cpp
M libc/test/src/sys/stat/fchmodat_test.cpp
M libc/test/src/sys/stat/fstat_test.cpp
M libc/test/src/sys/stat/lstat_test.cpp
M libc/test/src/sys/stat/stat_test.cpp
M libc/test/src/termios/termios_test.cpp
M libc/test/src/time/gmtime_test.cpp
M libc/test/src/time/nanosleep_test.cpp
M libc/test/src/unistd/access_test.cpp
M libc/test/src/unistd/chdir_test.cpp
M libc/test/src/unistd/dup2_test.cpp
M libc/test/src/unistd/dup3_test.cpp
M libc/test/src/unistd/dup_test.cpp
M libc/test/src/unistd/fchdir_test.cpp
M libc/test/src/unistd/ftruncate_test.cpp
M libc/test/src/unistd/isatty_test.cpp
M libc/test/src/unistd/link_test.cpp
M libc/test/src/unistd/linkat_test.cpp
M libc/test/src/unistd/readlink_test.cpp
M libc/test/src/unistd/readlinkat_test.cpp
M libc/test/src/unistd/symlink_test.cpp
M libc/test/src/unistd/symlinkat_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/test/src/unistd/truncate_test.cpp
Log Message:
-----------
[libc] Move libc_errno inside of LIBC_NAMESPACE (#80774)
Having libc_errno outside of the namespace causes versioning issues when
trying to link the tests against LLVM-libc. Most of this patch is just
moving libc_errno inside the namespace in tests. This isn't necessary in
the function implementations since those are already inside the
namespace.
Commit: 6ec926df739b0f0ac0d970b0181d62ad6e564784
https://github.com/llvm/llvm-project/commit/6ec926df739b0f0ac0d970b0181d62ad6e564784
Author: wangpc <wangpengcheng.pp at bytedance.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-mca.rst
Log Message:
-----------
[llvm-mca] Fix doc error
Commit: 168002ece26269a4a6fcfce96ac8e66f6414c9e7
https://github.com/llvm/llvm-project/commit/168002ece26269a4a6fcfce96ac8e66f6414c9e7
Author: Nilanjana Basu <n_basu at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/Transforms/LoopDistribute/basic-with-memchecks.ll
Log Message:
-----------
[Tests][LoopDistribute] Fixes failing unit test (#80809)
Removed target-triple in target-independent test case to fix failing test caused by https://github.com/llvm/llvm-project/pull/67725.
Commit: c9fd738388810aeaac99454989a150eb29f08521
https://github.com/llvm/llvm-project/commit/c9fd738388810aeaac99454989a150eb29f08521
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
A llvm/include/llvm/CodeGen/DeadMachineInstructionElim.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/elim-dead-mi.mir
Log Message:
-----------
[CodeGen] Port DeadMachineInstructionElim to new pass manager (#80582)
A simple enough op pass so we can test standard instrumentations in
future.
Commit: c6b5ea339d9f257b64f4ca468e447f0e29a909a4
https://github.com/llvm/llvm-project/commit/c6b5ea339d9f257b64f4ca468e447f0e29a909a4
Author: AtariDreams <83477269+AtariDreams at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
R llvm/test/Transforms/InstCombine/tan-nofastmath.ll
R llvm/test/Transforms/InstCombine/tan.ll
A llvm/test/Transforms/InstCombine/trig.ll
Log Message:
-----------
[Transforms] Expand optimizeTan to fold more inverse trig pairs (#77799)
optimizeTan has been renamed to optimizeTrigInversionPairs as a result.
Sadly, this is not mathematically true that all inverse pairs fold to x.
For example, asin(sin(x)) does not fold to x if x is over 2pi.
Commit: 35904ec4e1fca8d26c37a7f6aafd6c32f0ef9b09
https://github.com/llvm/llvm-project/commit/35904ec4e1fca8d26c37a7f6aafd6c32f0ef9b09
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
Log Message:
-----------
[AArch64] MI Scheduler STP combine (#80188)
Add opcodes for different store instructions to the target hook that can
enable more STP pairs. This is split off from the patch that does the
same for some load instructions (#79003).
Patch co-authored by Cameron McInally.
Commit: 2f7d9abf7c2ba1e697d46ffca0bf2f5a2bf8ba0c
https://github.com/llvm/llvm-project/commit/2f7d9abf7c2ba1e697d46ffca0bf2f5a2bf8ba0c
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
Log Message:
-----------
[mlir][ArmSME][nfc] Fix broken doc links to fmopa_2way op
Commit: bc569f6eb3848361ae637de0a873e1c442958a71
https://github.com/llvm/llvm-project/commit/bc569f6eb3848361ae637de0a873e1c442958a71
Author: Luke Lau <luke at igalia.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
Log Message:
-----------
[RISCV] Add test case for shufflevector that gets scalarized. NFC
This shufflevector gets scalarized into a build_vector of extract_vector_elts
because the output type doesn't match the input vector type.
Normally this is combined back into a vector_shuffle in DAGCombine, but this
one fails because we don't consider a extract_subvector to be cheap,
specifically because it's at an index > 31.
This should be canonicalized back into a vector_shuffle at some point so we can
lower it as a vrgather.vv.
Commit: 726cf604569d893d3bcb2c50d7905a95db92ddfd
https://github.com/llvm/llvm-project/commit/726cf604569d893d3bcb2c50d7905a95db92ddfd
Author: wangpc <wangpengcheng.pp at bytedance.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-mca.rst
Log Message:
-----------
[llvm-mca] Add an empty line to fix doc error
Commit: 292d9e869fcfc2ece694848db4022b0b939847e3
https://github.com/llvm/llvm-project/commit/292d9e869fcfc2ece694848db4022b0b939847e3
Author: Qiu Chaofan <qiucofan at cn.ibm.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
A llvm/test/CodeGen/PowerPC/pr59074.ll
Log Message:
-----------
[PowerPC] Mask constant operands in ValueBit tracking (#67653)
In IR or C code, shift amount larger than value size is undefined
behavior. But in practice, backend lowering for shift_parts produces
add/sub of shift amounts, thus constant shift amounts might be
negative or larger than value size, which depends on ISA definition.
PowerPC ISA says, the lowest 7 bits (6 bits for 32-bit instruction)
will be taken, and if the highest among them is 1, result will be
zero, otherwise the low 6 bits (or 5 on 32-bit) are used as shift
amount.
This commit emulates the behavior and avoids array overflow in bit
permutation's value bits calculator.
Commit: 6dfb31adf6ca17d05c3832f1e43252a4c0c9f2af
https://github.com/llvm/llvm-project/commit/6dfb31adf6ca17d05c3832f1e43252a4c0c9f2af
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp][NFC] Simplify test case
By checking using verify={ref,expected},both.
Commit: 3d186a77cf1aa979014a6443cb423a633c167d9f
https://github.com/llvm/llvm-project/commit/3d186a77cf1aa979014a6443cb423a633c167d9f
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/Basic/arm_sme.td
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_bmop.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_frint.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_max.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_maxnm.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_min.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_minnm.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mop.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sub.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_add.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_rshl.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write.c
Log Message:
-----------
[Clang][AArch64] Fix some target guards and remove +sve from tests. (#80681)
The TargetGuard fields for 'svldr[_vnum]_za' and 'svstr[_vnum]_za' were
incorrectly set to `+sve` instead of `+sme`. This means that compiling
code that uses these intrinsics requires compiling for both `+sve` as
well as `+sme`.
This PR also fixes the target guards for the `svadd` and `svsub`
builtins that are enabled under `+sme2,+sme-i16i64` and
`+sme2,+sme-f64f64`, as it initially did the following:
```
let TargetGuard = "+sme2" in {
let TargetGuard = "+sme-i16i64" in {
// Builtins defined here will be predicated only by
// '+sme-i16i64', and not '+sme2,+sme-i16i64'.
}
}
```
This PR also removes `-target-feature +sve` from all the SME tests, to
ensure that the SME features are sufficient to build the tests.
Commit: c302909760d67a6d149fece3b79c90e47a25ba4d
https://github.com/llvm/llvm-project/commit/c302909760d67a6d149fece3b79c90e47a25ba4d
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
Log Message:
-----------
[RemoveDIs] Fix DPValue hoisting in hoistSuccIdenticalTerminatorToSwitchOrIf (#80822)
Follow up to #79476 - that patch added a call to hoistLockstepIdenticalDPValues
which hoists identical DPValues in lockstep, matching dbg intrinsic hoisting
behaviour. The code deleted in this patch, which unconditionally hoists
DPValues, should have been deleted in that patch.
Update test with --try-experimental-debuginfo-iterators to check the behaviour.
Follow up to #79476 - that change introduces a call to
hoistLockstepIdenticalDPValues.
Commit: 7f292b8fb12aed094b8422aad9fcb7b2907c54c9
https://github.com/llvm/llvm-project/commit/7f292b8fb12aed094b8422aad9fcb7b2907c54c9
Author: Rin Dobrescu <irina.dobrescu at arm.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/avoid-pre-trunc.ll
A llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
Log Message:
-----------
[AArch64] Convert concat(uhadd(a,b), uhadd(c,d)) to uhadd(concat(a,c), concat(b,d)) (#80674)
We can convert concat(v4i16 uhadd(a,b), v4i16 uhadd(c,d)) to v8i16
uhadd(concat(a,c), concat(b,d)), which can lead to further
simplifications.
Commit: 8924a9ffcb3696288cca3334cd60a099d3fcda79
https://github.com/llvm/llvm-project/commit/8924a9ffcb3696288cca3334cd60a099d3fcda79
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
Log Message:
-----------
[mlir][EmitC] Remove unreachable code and fix Windows build warning (#80677)
Commit: de8ba2f60334dc44f6906a0722435db41564b421
https://github.com/llvm/llvm-project/commit/de8ba2f60334dc44f6906a0722435db41564b421
Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
Log Message:
-----------
[CodeGen] Update comments for ValueType.td. [NFC] (#80670)
The enums needed by the file MachineValueType.h are auto-generated since commit
ddaf085e7bcb903d5ae1cafc4667b8c3d302897e
Commit: 82950a695ddbd92beb07bf58b48067a1f67d57e3
https://github.com/llvm/llvm-project/commit/82950a695ddbd92beb07bf58b48067a1f67d57e3
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Pointer.h
M clang/test/Sema/fp-eval-pragma-with-float-double_t-1.c
M clang/test/Sema/fp-eval-pragma-with-float-double_t-2.c
M clang/test/Sema/fp-eval-pragma-with-float-double_t-3.c
Log Message:
-----------
[clang][Interp] Protect ArrayElemPtr ops from dummy pointers
Change the semantics of Pointer::isDummy() to check for a null
Pointee and returnd false in that case. Then call CheckDummy()
in ArrayElemPtr{,Pop} to protect those ops from operating on
dummy pointers and enable a few tests in test/Sema/ that now
work with the new constant interpreter.
Commit: ccc77f1194f894db8ec93131124a7a2848e3e079
https://github.com/llvm/llvm-project/commit/ccc77f1194f894db8ec93131124a7a2848e3e079
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Pointer.h
Log Message:
-----------
[clang][Interp][NFC] Fix comment typos
Commit: cf94e0082e5e0a9be43a69d9fae588bc2aafab91
https://github.com/llvm/llvm-project/commit/cf94e0082e5e0a9be43a69d9fae588bc2aafab91
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 0473e322f67228a9c2dbf462357e5b4a2b3799be
Commit: b8cdc2638e4c067fd633b345aba75fee81c4054f
https://github.com/llvm/llvm-project/commit/b8cdc2638e4c067fd633b345aba75fee81c4054f
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/X86/ctpop-mask.ll
Log Message:
-----------
[DAG] visitCTPOP - if only the upper half of the ctpop operand is zero then see if its profitable to only count the lower half. (#80473)
Commit: 29fa64f845df6b1ba3f562564ab97a07aa7077ee
https://github.com/llvm/llvm-project/commit/29fa64f845df6b1ba3f562564ab97a07aa7077ee
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[flang][OpenMP][NFC] Outline `genOpWithBody` & `createBodyOfOp` args (#80817)
This PR outlines the arguments of the open CodeGen functions into 2
separate structs. This was, in part, motivated by the delayed
privatization WIP #79862 where we had to extend the signatures of both
functions containing quite a bit of default values (`nullptr`, `false`).
This PR does not add any new arguments yet though, just outlines the
existing ones.
Commit: 2e3de997ab7cd8728c484bc39e24fecbb97dfae8
https://github.com/llvm/llvm-project/commit/2e3de997ab7cd8728c484bc39e24fecbb97dfae8
Author: David Green <david.green at arm.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/setcc_knownbits.ll
M llvm/test/CodeGen/WebAssembly/xor_reassociate.ll
M llvm/test/CodeGen/X86/lzcnt-cmp.ll
M llvm/test/CodeGen/X86/umul_fix_sat.ll
M llvm/test/CodeGen/X86/xor.ll
Log Message:
-----------
[DAG] Generalize setcc(setcc) fold to use known bits.
If we have a `SETCC (SETCC), 0, NE` and ZeroOrOneBooleanContent, we can remove
the outer setcc as it will produce the same value as the inner. This can be
generalized to anything where the top bits are known to be 0, as the value will
remain as 1 or 0.
Commit: a2e5287d5a499521aaf093f812cbedcbbc2a4bc8
https://github.com/llvm/llvm-project/commit/a2e5287d5a499521aaf093f812cbedcbbc2a4bc8
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lld/test/COFF/def-export-cpp.s
M lld/test/COFF/def-export-stdcall.s
M lld/test/COFF/dllexport.s
M llvm/include/llvm/Object/COFFImportFile.h
M llvm/lib/Object/COFFImportFile.cpp
M llvm/test/tools/llvm-dlltool/coff-decorated.def
M llvm/test/tools/llvm-dlltool/coff-exports.def
M llvm/test/tools/llvm-dlltool/coff-noname.def
M llvm/test/tools/llvm-dlltool/no-leading-underscore.def
M llvm/test/tools/llvm-lib/arm64ec-implib.test
M llvm/test/tools/llvm-readobj/COFF/file-headers.test
M llvm/tools/llvm-readobj/COFFImportDumper.cpp
Log Message:
-----------
[llvm-readobj][Object][COFF] Print COFF import library symbol export name. (#78769)
getExportName implementation is based on lld-link. In its current form,
it's mostly about convenience, but it will be more useful for EXPORTAS
support, for which export name is not possible to deduce from other
printed properties.
Commit: a18e92d020b895b712175a3b13a3d021608115a7
https://github.com/llvm/llvm-project/commit/a18e92d020b895b712175a3b13a3d021608115a7
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/warn-int-in-bool-context.c
Log Message:
-----------
[clang] Fix unexpected `-Wconstant-logical-operand` in C23 (#80724)
C23 has `bool`, but logical operators still return int. Check that
we're not in C to avoid false-positive -Wconstant-logical-operand.
Fixes https://github.com/llvm/llvm-project/issues/64356
Commit: e6866955f637634f439f7004a38be32b1c5185e2
https://github.com/llvm/llvm-project/commit/e6866955f637634f439f7004a38be32b1c5185e2
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/copyprivate03.f90
Log Message:
-----------
[flang][OpenMP] Accept firstprivate vars in copyprivate (#80467)
This is patch 1 of 4, to add support for COPYPRIVATE.
Original PR: https://github.com/llvm/llvm-project/pull/73128
Commit: 48927e9592e8bb70f85ff6431c7bf514fe5d1c07
https://github.com/llvm/llvm-project/commit/48927e9592e8bb70f85ff6431c7bf514fe5d1c07
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
A flang/test/Lower/OpenMP/threadprivate-commonblock-use.f90
Log Message:
-----------
[flang][OpenMP] Fix privatization of threadprivate common block (#77821)
In some cases, when privatizing a threadprivate common block, the
original symbol will correspond to the common block, instead of
its threadprivate version. This can happen, for instance, with a
common block, declared in a separate module, used by a parent
procedure and privatized in its child procedure. In this case,
symbol lookup won't find a symbol in the parent procedure, but
only in the module where the common block was defined.
Fixes https://github.com/llvm/llvm-project/issues/65028
Commit: b06568fa623c746d40638137504d52e19911bf32
https://github.com/llvm/llvm-project/commit/b06568fa623c746d40638137504d52e19911bf32
Author: Kevin P. Neal <kevin.neal at sas.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/tools/llvm-reduce/remove-attributes-strictfp.ll
Log Message:
-----------
[FPEnv][llvm-reduce] Correct strictfp test.
Correct llvm-reduce strictfp test to follow the rules documented in the
LangRef:
https://llvm.org/docs/LangRef.html#constrained-floating-point-intrinsics
This test needed the strictfp attribute added to a function call.
Note that attributes of intrinsics cannot be changed in declarations,
but attributes can be changed in call sites. Thus the changes to the
declarations. And the constrained intrinsics have strictfp attributes
by default.
Test changes verified with D146845.
Commit: 026f3c1bbc1fbd9d7c25fc3a97b1c29d7ae7e2b5
https://github.com/llvm/llvm-project/commit/026f3c1bbc1fbd9d7c25fc3a97b1c29d7ae7e2b5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/src/__support/GPU/amdgpu/utils.h
M libc/src/math/gpu/vendor/amdgpu/platform.h
Log Message:
-----------
[libc] Remove CPU dependent AMDGPU instructions (#80707)
Summary:
Some recent changes allowed us to remove target level divergence one
these instructions. This patch removes the wavefront dependent
divergence for the ballot and thread ID functions, as well as the clock.
The changes to the "Vendor" library simply disables target specific
optimizations in the implementation. This should be removed in its
entirety when the LLVM `libm` is sufficiently implemented.
The remaining areas of divergence is only the RPC packet size and the
fixed frequency counter.
Commit: ddc493579fa1b7eed058c7ed8a5a6b5755a31953
https://github.com/llvm/llvm-project/commit/ddc493579fa1b7eed058c7ed8a5a6b5755a31953
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs] Don't allocate one DPMarker per instruction (#79345)
This is an optimisation patch that shouldn't have any functional effect.
There's no need for all instructions to have a DPMarker attached to them,
because not all instructions have adjacent DPValues (aka dbg.values).
This patch inserts the appropriate conditionals into functions like
BasicBlock::spliceDebugInfo to ensure we don't step on a null pointer when
there isn't a DPMarker allocated. Mostly, this is a case of calling
createMarker occasionally, which will create a marker on an instruction
if there isn't one there already.
Also folded into this is the use of adoptDbgValues, which is a natural
extension: if we have a sequence of instructions and debug records:
%foo = add i32 %0,...
# dbg_value { %foo, ...
# dbg_value { %bar, ...
%baz = add i32 %...
%qux = add i32 %...
and delete, for example, the %baz instruction, then the dbg_value records
would naturally be transferred onto the %qux instruction (they "fall down"
onto it). There's no point in creating and splicing DPMarkers in the case
shown when %qux doesn't have a DPMarker already, we can instead just change
the owner of %baz's DPMarker from %baz to %qux. This also avoids calling
setParent on every DPValue.
Update LoopRotationUtils: it was relying on each instruction having it's
own distinct end(), so that we could express ranges and lack-of-ranges.
That's no longer true though: so switch to storing the range of DPValues on
the next instruction when we want to consider it's range next time around
the loop (see the nearby comment).
Commit: 54c29e01c2bf6980bf999496e221f214e521d3ff
https://github.com/llvm/llvm-project/commit/54c29e01c2bf6980bf999496e221f214e521d3ff
Author: ostannard <oliver.stannard at arm.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/MC/AArch64/no-fp-errors.s
Log Message:
-----------
[AArch64] Set predicates for FP/SIMD InstAliases (#79033)
These are aliases for instructions which are are only available when the
fp-armv8 or neon features are enabled, so their predicates should be set
appropriately.
Commit: 26db3c3b72d3c915ad296a5a5313210bde8ce3e1
https://github.com/llvm/llvm-project/commit/26db3c3b72d3c915ad296a5a5313210bde8ce3e1
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/cxx20.cpp
M clang/test/SemaCXX/cxx11-default-member-initializers.cpp
Log Message:
-----------
[clang][Interp] Handle discarding ConstantExprs
Assume no side-effects in the presence of a cashed result in the form
of an APValue. This is also what the current interpreter does.
Commit: 83eb8126dd0c7457d43f5e6bce8911a528f93af9
https://github.com/llvm/llvm-project/commit/83eb8126dd0c7457d43f5e6bce8911a528f93af9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/src/math/gpu/vendor/amdgpu/platform.h
Log Message:
-----------
[libc] Fix accidentally deleted braces after change
Summary:
Oops.
Commit: f89fe08d770d912bc1e7b9b52c1859a44abea69a
https://github.com/llvm/llvm-project/commit/f89fe08d770d912bc1e7b9b52c1859a44abea69a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/test/Transforms/LowerMatrixIntrinsics/dot-product-int.ll
Log Message:
-----------
[Matrix] Convert column-vector ops feeding dot product to row-vectors. (#72647)
Generalize the logic used to convert column-vector ops to row-vectors to
support converting chains of operations.
A potential next step is to further generalize this to convert
column-vector ops to row-vector ops in general, not just for operands of
dot products. Dot-product handling would then be driven by the general
conversion, rather than the other way around.
PR: https://github.com/llvm/llvm-project/pull/72647
Commit: ffd79b3312cea51c0787aad479ce285771470397
https://github.com/llvm/llvm-project/commit/ffd79b3312cea51c0787aad479ce285771470397
Author: Sergey Kachkov <109674256+skachkov-sc at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-cost-addrspacecast.ll
A llvm/test/Transforms/LoopUnroll/RISCV/unroll-Os.ll
Log Message:
-----------
[LoopUnroll] Consider simplified operands while retrieving TTI instruction cost (#70929)
Get more precise cost of instruction after LoopUnroll considering that
some operands of it can be simplified, e.g. induction variable will be
replaced by constant after full unrolling.
Commit: 62c352e13c145b5606ace88ecbe9164ff011b5cf
https://github.com/llvm/llvm-project/commit/62c352e13c145b5606ace88ecbe9164ff011b5cf
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDocs.td
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/test/Sema/warn-infinity-nan-disabled-lnx.cpp
M clang/test/Sema/warn-infinity-nan-disabled-win.cpp
Log Message:
-----------
[CLANG] Fix INF/NAN warning. (#80290)
In https://github.com/llvm/llvm-project/pull/76873 a warning was added
when the macros INFINITY and NAN are used in binary expressions when
-menable-no-nans or -menable-no-infs are used. If the user uses an
option that nullifies these two options, the warning will still be
generated. This patch adds an additional information to the warning
comment to let the user know about this. It also suppresses the warning
when #ifdef INFINITY, #ifdef NAN, #ifdef NAN or #ifndef NAN are used in
the code.
Commit: d5a3de4aeef4f4f1c52692533ddb9fdf45aef9d3
https://github.com/llvm/llvm-project/commit/d5a3de4aeef4f4f1c52692533ddb9fdf45aef9d3
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/stdbit-macros.h
M libc/spec/stdc.td
M libc/src/stdbit/CMakeLists.txt
A libc/src/stdbit/stdc_trailing_zeros_uc.cpp
A libc/src/stdbit/stdc_trailing_zeros_uc.h
A libc/src/stdbit/stdc_trailing_zeros_ui.cpp
A libc/src/stdbit/stdc_trailing_zeros_ui.h
A libc/src/stdbit/stdc_trailing_zeros_ul.cpp
A libc/src/stdbit/stdc_trailing_zeros_ul.h
A libc/src/stdbit/stdc_trailing_zeros_ull.cpp
A libc/src/stdbit/stdc_trailing_zeros_ull.h
A libc/src/stdbit/stdc_trailing_zeros_us.cpp
A libc/src/stdbit/stdc_trailing_zeros_us.h
M libc/test/include/stdbit_test.cpp
M libc/test/src/stdbit/CMakeLists.txt
A libc/test/src/stdbit/stdc_trailing_zeros_uc_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ui_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ul_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ull_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_us_test.cpp
Log Message:
-----------
[libc][stdbit] implement stdc_trailing_zeros (C23) (#80344)
Commit: ca1da36aec963c5504ae7ae2e834b37856c476db
https://github.com/llvm/llvm-project/commit/ca1da36aec963c5504ae7ae2e834b37856c476db
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/inttypes.h.def
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/inttypes-macros.h
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/sprintf_test.cpp
Log Message:
-----------
[libc] add inttypes macros (#80726)
Standard file:
https://pubs.opengroup.org/onlinepubs/9699919799.2018edition/
Notice that we are not quite the same as other implementations:
1. MUSL: https://github.com/bminor/musl/blob/master/include/inttypes.h
2. GLIBC:
https://github.com/bminor/glibc/blob/bbd248ac0d75efdef8fe61ea69b1fb25fb95b6e7/stdlib/inttypes.h#L57
3. CheriBSD:
https://github.com/CTSRD-CHERI/cheribsd/blob/698d1636dd1fe2322e5bc7029e415928c80b76b1/sys/arm64/include/_inttypes.h
fixes #80186
Commit: 364f781344e11d6a781ebdd0a4d9689bc9c51cfb
https://github.com/llvm/llvm-project/commit/364f781344e11d6a781ebdd0a4d9689bc9c51cfb
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-logic-of-compare.mir
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
Log Message:
-----------
[GlobalIsel] Combine logic of icmps (#77855)
Inspired by InstCombinerImpl::foldAndOrOfICmpsUsingRanges with some
adaptations to MIR.
Commit: b1acb7a315e903ee340a33dbc9b2b61b0450bb67
https://github.com/llvm/llvm-project/commit/b1acb7a315e903ee340a33dbc9b2b61b0450bb67
Author: stephenpeckham <118857872+stephenpeckham at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/XCOFF.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/XCOFFObjectWriter.cpp
M llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll
M llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll
M llvm/test/CodeGen/PowerPC/aix-available-externally-linkage-fun.ll
M llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
M llvm/test/CodeGen/PowerPC/aix-extern.ll
M llvm/test/CodeGen/PowerPC/aix-filename-c.ll
M llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
M llvm/test/CodeGen/PowerPC/aix-filename-f.ll
M llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
M llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
M llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
M llvm/test/CodeGen/PowerPC/aix-relro-section.ll
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
M llvm/test/CodeGen/PowerPC/aix-tls-ie-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large32.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc32.ll
M llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
M llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
M llvm/test/CodeGen/PowerPC/aix-weak.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-cold.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
M llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll
M llvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-td.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-tw.ll
M llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll
M llvm/test/CodeGen/PowerPC/toc-data-const.ll
M llvm/test/MC/PowerPC/aix-file-symbols.s
M llvm/test/tools/llvm-objdump/XCOFF/symbol-table.test
Log Message:
-----------
[XCOFF] Add compiler version to an auxiliary symbol table entry (#80162)
C_FILE symbols. To match the behavior of the assembler and the legacy
compiler, this includes using the generic ".file" name for the C_FILE
symbol and generating the actual file name in an auxiliary entry.
Commit: d4c5acac99e83ffa12d2d720c9e502a181cbd7ea
https://github.com/llvm/llvm-project/commit/d4c5acac99e83ffa12d2d720c9e502a181cbd7ea
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/ExecutionEngine/GDBRegistrationListener.cpp
Log Message:
-----------
[ExecutionEngine] Fix a couple of typos (NFC)
Commit: d6c7253d32e4bdff619c39708170f1c1fa01ff95
https://github.com/llvm/llvm-project/commit/d6c7253d32e4bdff619c39708170f1c1fa01ff95
Author: David Stuttard <david.stuttard at amd.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
Log Message:
-----------
[AMDGPU] Add pal metadata 3.0 support to callable pal funcs (#67104)
PAL Metadata 3.0 introduces an explicit structure in metadata for the
programmable registers written out by the compiler backend.
The previous approach used opaque registers which can change between different
architectures and required encoding the bitfield information in the backend,
which may change between versions.
This change is an extension the previously added support - which only handled
entry functions. This adds support for all functions.
The change also includes some re-factoring to separate common code.
Commit: 40fd17a90d4dcfb4bada663d73111a43c4c6ccb1
https://github.com/llvm/llvm-project/commit/40fd17a90d4dcfb4bada663d73111a43c4c6ccb1
Author: hlivin01 <110549819+hlivin01 at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/test/CodeGen/aarch64-neon-intrinsics.c
Log Message:
-----------
[ARM][AARCH64][NEON]: Wrong return type of NEON intrinsic vqrshrunh_n_s16, vqrshruns_n_s32, and vqrshrund_n_s64 in arm_neon.h (#80819)
* fixes https://github.com/llvm/llvm-project/issues/71751
* changed return types in the table gen file responsible for generation
of the problematic intrinsics
* this is to ensure that the return type for the functions is the same
as specified in the Arm Developer Documentation and avoid casting
bugs
(https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrshrunh_n_s16)
* updated lit tests to reflect the change in return type, worth noting
that LLVM does not seems to differentiate signed and unsigned ints in
the IR, hence the change in type cannot be checked in IR as far as I am
aware
Commit: 9ea34be3e4c9deeabfc21cced1acb7f9593ffe93
https://github.com/llvm/llvm-project/commit/9ea34be3e4c9deeabfc21cced1acb7f9593ffe93
Author: Vinayak Dev <104419489+vinayakdsci at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/MC/MCObjectStreamer.cpp
Log Message:
-----------
[MC]: Fix typo in MCObjectStreamer.cpp (#80856)
Fixes a typo in llvm/lib/MC/MCObjectStreamer.cpp introduced in #80162
Commit: e5638c5a00682243b1ee012d7dd8292aa221dff8
https://github.com/llvm/llvm-project/commit/e5638c5a00682243b1ee012d7dd8292aa221dff8
Author: choikwa <5455710+choikwa at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
[AMDGPU] Use correct number of bits needed for div/rem shrinking (#80622)
There was an error where dividend of type i64 and actual used number of
bits of 32 fell into path that assumes only 24 bits being used. Check
that AtLeast field is used correctly when using computeNumSignBits and
add necessary extend/trunc for 32 bits path.
Regolden and update testcases.
@jrbyrnes @bcahoon @arsenm @rampitec
Commit: 36e8db7d8c9183c66363e76517772b074b4f53be
https://github.com/llvm/llvm-project/commit/36e8db7d8c9183c66363e76517772b074b4f53be
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Extract main part of GetGEPCostDiff to a function, NFC.
Commit: 388548359f5049b88a9738d8a9e67691503fbdef
https://github.com/llvm/llvm-project/commit/388548359f5049b88a9738d8a9e67691503fbdef
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/unittests/TestingSupport/TestUtilities.cpp
M lldb/unittests/TestingSupport/TestUtilities.h
Log Message:
-----------
[lldb][unittest] Add call_once flag to initialize debugger (#80786)
I tried adding a new unit test to the core test
suite (https://github.com/llvm/llvm-project/pull/79533) but it broke the
test suite on AArch64 Linux due to hitting an assertion for calling
`Debugger::Initialize` more than once. When the unit test suite is
invoked as a standalone binary the test suite state is shared, and
`Debugger::Initialize` gets called in `DiagnosticEventTest.cpp` before
being called in `ProgressReportTest.cpp`.
`DiagnosticEventTest.cpp` uses a call_once flag to initialize the
debugger but it's local to that test. This commit adds a once_flag to
`TestUtilities` so that `Debugger::Initialize` can be called once by the
tests that use it.
Commit: 299e5fef9dee3f2d3af8f9162075b8f1cfa34446
https://github.com/llvm/llvm-project/commit/299e5fef9dee3f2d3af8f9162075b8f1cfa34446
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Simplify/unify vectors for scattered/vectorized loads from
gathers, NFC.
Commit: 6ce418113746c1d8a85012d1f8e22270eb5fdaf1
https://github.com/llvm/llvm-project/commit/6ce418113746c1d8a85012d1f8e22270eb5fdaf1
Author: Jan Patrick Lehr <jplehr at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M openmp/libomptarget/test/lit.cfg
Log Message:
-----------
[OpenMP] HSA_ENABLE_SDMA visible in libomptarget tests (#80860)
Enable the environment variable inside the test environment. This allows
to disable SDMA engine transfers as a potential mitigation of flaky
OpenMP offloading tests on AMDGPU.
Motivated by the open ticket https://github.com/ROCm/ROCm/issues/2616
about a missed synchronization signal.
Commit: 93a2a8cb7f6ab815849e8320bff54c965edd09e7
https://github.com/llvm/llvm-project/commit/93a2a8cb7f6ab815849e8320bff54c965edd09e7
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
A clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
Log Message:
-----------
Fix a crash in clang::isGetterOfRefCounted by checking nullptr in tryToFindPtrOrigin (#80768)
Commit: 56900278b578b4f7beedb8ac1e52c541d347f401
https://github.com/llvm/llvm-project/commit/56900278b578b4f7beedb8ac1e52c541d347f401
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/unittests/Core/DiagnosticEventTest.cpp
Log Message:
-----------
[lldb][unittest] Use shared once_flag in DiagnosticEventTest (#80788)
Incorporates the changes from
https://github.com/llvm/llvm-project/pull/80786 to use a once_flag from
`TestUtilities` instead of a local flag in order to prevent hitting an
assertion that the debugger was initialized again in another test.
Commit: a628f68a9c4ce6f3dcd0c8bb3650db45671ed15a
https://github.com/llvm/llvm-project/commit/a628f68a9c4ce6f3dcd0c8bb3650db45671ed15a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Format/clang-format-ignore.cpp
Log Message:
-----------
Revert "[clang] Mark clang-format-ignore.cpp as unsupported on Windows"
This reverts commit dc61ebb44c11d2f5d03b7dd9cb80a0644a30775e.
See https://github.com/llvm/llvm-project/pull/76733#issuecomment-1890311152.
Commit: 8ea858b96787578e814723a009f443808f446378
https://github.com/llvm/llvm-project/commit/8ea858b96787578e814723a009f443808f446378
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/Analysis/TypeMetadataUtils.h
M llvm/lib/Analysis/TypeMetadataUtils.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
Log Message:
-----------
[CallPromotionUtil] See through function alias when devirtualizing a virtual call on an alloca. (#80736)
- Extract utility function from
`DevirtModule::tryFindVirtualCallTargets` [1], which sees through an alias to a function. Call this utility function in
the WPD callsite.
- For type profiling work, this helper function will be used by indirect-call-promotion pass to find the function pointer at a specified vtable offset (an example in [2])
[1] https://github.com/llvm/llvm-project/blob/b99163fe8feeacba7797d5479bbcd5d8f327dd2d/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp#L1069-L1082
[2] https://github.com/minglotus-6/llvm-project/blob/77a0ef12de82d11f448f7f9de6f2dcf87d9b74af/llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp#L347
Commit: 6b2fd7aed66d592738f26c76caa8fff95e168598
https://github.com/llvm/llvm-project/commit/6b2fd7aed66d592738f26c76caa8fff95e168598
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll
M llvm/test/CodeGen/Mips/compactbranches/unsafe-in-forbidden-slot.ll
M llvm/test/CodeGen/Mips/indirect-jump-hazard/jumptables.ll
M llvm/test/CodeGen/Mips/jump-table-mul.ll
M llvm/test/CodeGen/Mips/pseudo-jump-fill.ll
Log Message:
-----------
[MIPS] Use generic isBlockOnlyReachableByFallthrough (#80799)
FastISel may create a redundant BGTZ terminal which fallthroughes.
```
BGTZ %2:gpr32, %bb.1, implicit-def $at
bb.1.bb1:
; predecessors: %bb.0
```
The `!I->isBarrier()` check in
MipsAsmPrinter::isBlockOnlyReachableByFallthrough
will incorrectly not print a label, leading to a `Undefined temporary
symbol `
error when we try assembling the output assembly file. See the updated
`Fast-ISel/pr40325.ll` and
https://github.com/rust-lang/rust/issues/108835
In addition, the `SwitchInst` condition is too conservative and prints
many unneeded labels (see the updated tests).
Just use the generic isBlockOnlyReachableByFallthrough, updated by
commit 1995b9fead62f2f6c0ad217bd00ce3184f741fdb for SPARC, which also
handles MIPS.
Commit: cca49663a56d90f6773f140269940d606aa61430
https://github.com/llvm/llvm-project/commit/cca49663a56d90f6773f140269940d606aa61430
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/fast-isel-fcmp.ll
M llvm/test/CodeGen/X86/fast-isel-ret-ext.ll
M llvm/test/CodeGen/X86/keylocker-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/xaluo.ll
M llvm/test/CodeGen/X86/xmulo.ll
M llvm/test/DebugInfo/X86/convert-debugloc.ll
Log Message:
-----------
[FastISel][X86] Use getTypeForExtReturn in GetReturnInfo. (#80803)
The comment and code here seems to match getTypeForExtReturn. The
history shows that at the time this code was added, similar code existed
in SelectionDAGBuilder. SelectionDAGBuiler code has since been
refactored into getTypeForExtReturn.
This patch makes FastISel match SelectionDAGBuilder.
The test changes are because X86 has customization of
getTypeForExtReturn. So now we only extend returns to i8.
Stumbled onto this difference by accident.
Commit: 2a4f715b0797f235b58f6dfefbc369c2374c44c1
https://github.com/llvm/llvm-project/commit/2a4f715b0797f235b58f6dfefbc369c2374c44c1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVScheduleV.td
Log Message:
-----------
[RISCV] Adjust a few vector scheduler class names. NFC (#80795)
Shortening Iota to Iot seemed strange to me.
I also remove the M from VMIota and VMIdx. The instruction for viota
does have an m at the end of it, but vid.v does not. The M didn't seem
very important for viota.
Commit: 0fb9f68bae4743dbabbccf3bbc575ac569730840
https://github.com/llvm/llvm-project/commit/0fb9f68bae4743dbabbccf3bbc575ac569730840
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
Log Message:
-----------
[SelectionDAG] Use getRegisterType instead of getTypeToTransformTo in ComputePHILiveOutRegInfo. (#80773)
Since we used getNumRegisters right before this, I think this is the
correct interface we should be using here.
I'm experimenting with making i32 legal on RISC-V 64, but using i64 for
the register type between basic blocks. This was one of the first issues
I found trying to do that.
Commit: 1833de3ee364a996d03bb23b19fe472e3e2ddf3b
https://github.com/llvm/llvm-project/commit/1833de3ee364a996d03bb23b19fe472e3e2ddf3b
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/test/Transforms/HotColdSplit/split-out-dbg-label.ll
M llvm/test/Transforms/IROutliner/gvn-phi-debug.ll
Log Message:
-----------
[Extractor][DebugInfo] Don't pick DebugLocs from dbg intrinsics (#80863)
When picking the source location for a branch instruction in the
CodeExtractor, we can end up picking the source location of a debugging
intrinsic. This never makes sense because any variable assignment
information (or labels) might originate from completely different
lexical scopes that have been inlined, and also makes the line tables
change between -g and -gmlt. Fix this by skipping debug intrinsics when
looking for branch source locations.
Detected because of test differences with RemoveDIs, the non-intrinsinc
form of debug-info -- fixing in intrinsic form to avoid there being
spurious test differences when we turn it on.
Commit: 6eb7273b11e6a3ec7c5ddb2d55bc585a25c0a923
https://github.com/llvm/llvm-project/commit/6eb7273b11e6a3ec7c5ddb2d55bc585a25c0a923
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/TextAPI/BinaryReader/DylibReader.cpp
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
Log Message:
-----------
[readtapi] Ensure universal dylibs record the same input path location across slices (#80875)
resolves: https://github.com/llvm/llvm-project/issues/80868
Commit: 2faeea313fef284fa933e7adb1d4c44a33e943e5
https://github.com/llvm/llvm-project/commit/2faeea313fef284fa933e7adb1d4c44a33e943e5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Ssqosid support to -march. (#80747)
Commit: c7d181cc67a7af122835bc51159baa0eb6c5ac7c
https://github.com/llvm/llvm-project/commit/c7d181cc67a7af122835bc51159baa0eb6c5ac7c
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[llvm][unittests] Put human-readable names on TargetParserTests. NFC (#80749)
Before:
```
[----------] 65 tests from AArch64CPUTests/AArch64CPUTestFixture
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/0
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/0 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/1
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/1 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/2
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/2 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/3
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/3 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/4
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/4 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/5
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/5 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/6
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/6 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/7
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/7 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/8
...
```
After:
```
[----------] 65 tests from AArch64CPUTests/AArch64CPUTestFixture
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a34
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a34 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a35
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a35 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a53
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a53 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a55
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a55 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a510
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a510 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a520
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a520 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a57
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a57 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65 (0 ms)
...
```
Which improves the experience of finding and running this:
```
$ ./unittests/TargetParser/TargetParserTests --gtest_filter=AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65
Note: Google Test filter = AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65
[==========] Running 1 test from 1 test suite.
[----------] Global test environment set-up.
[----------] 1 test from AArch64CPUTests/AArch64CPUTestFixture
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65 (0 ms)
[----------] 1 test from AArch64CPUTests/AArch64CPUTestFixture (0 ms total)
[----------] Global test environment tear-down
[==========] 1 test from 1 test suite ran. (0 ms total)
[ PASSED ] 1 test.
```
Commit: a4531108da358500939af95b53794591432aaf74
https://github.com/llvm/llvm-project/commit/a4531108da358500939af95b53794591432aaf74
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/test/Transforms/Util/Debugify/loc-only-original-mode.ll
Log Message:
-----------
[DebugInfo][RemoveDIs] Extend intrinsic-conversion in debugify (#80861)
A while back the entry/exit points of debugify were instrumented with
conversion functions to/from non-intrinsic-form debug-info. This is the
path of least resistance to incrementally converting parts of LLVM to
use the new format. However, it turns out that debugify registers
callbacks with the pass manager and can be fed non-intrinsic form
debug-info. Thus: this patch wraps each of the four major debugify
functions with the convertion utilities, and extends test coverage to a
test that exposes this problem.
(An alternative would be to put this code in the callback lambdas, but
then it would be fighting pass manager abstractions of what type the IR
has).
Handily debugify has been designed to record the /meaning/ of debug-info
rather than take pointers to intrinsics and the like, so the storage
mechanism for debug-info is transparent to it!
Commit: 33cfc1341fab1af8d0f2a8270332fcc91895f473
https://github.com/llvm/llvm-project/commit/33cfc1341fab1af8d0f2a8270332fcc91895f473
Author: Davide Italiano <davidino at fb.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[github][CODEOWNERS] Add BOLT.
Commit: f2508d0a406c8978636eafeb9a23e15984e68836
https://github.com/llvm/llvm-project/commit/f2508d0a406c8978636eafeb9a23e15984e68836
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][Docs] Use double underscore for external links in RISCVUsage.rst.
Using a single underscore creates a reference target. If the target
name has the same name as another link, we get a "Duplicate target name"
warning. This is currently happening for Ssqosid.
Using __ prevents this. I've converted all links so no one trips over
this in the future.
One link was missing any underscores so wasn't a link at all in the
generated html.
Commit: 5ac2320824fd545a0d746a1d989543ec4bbd03fa
https://github.com/llvm/llvm-project/commit/5ac2320824fd545a0d746a1d989543ec4bbd03fa
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/src/errno/libc_errno.cpp
M libc/src/errno/libc_errno.h
Log Message:
-----------
[libc][NFC] Fix extraneous namespace on Errno (#80894)
The Errno type doesn't need to be explicitly namespaced now that it's
enclosed in a namespace.
Commit: a8ab8306069e8e53b5148ceec7624d7d36ffb459
https://github.com/llvm/llvm-project/commit/a8ab8306069e8e53b5148ceec7624d7d36ffb459
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/ProgressReportTest.cpp
Log Message:
-----------
Reland "[lldb][progress][NFC] Add unit test for progress reports" (#80791)
This file was previously approved and merged from this PR:
https://github.com/llvm/llvm-project/pull/79533 but caused a test
failure on the Linux AArch64 bots due to hitting an assertion that
`Debugger::Initialize` was already called.
To fix this, this commit uses the
changes made here: https://github.com/llvm/llvm-project/pull/80786 to
use a shared call_once flag to initialize the debugger.
Commit: cdd9221489ec4ed6afc0e5146c2fae4daa8ab260
https://github.com/llvm/llvm-project/commit/cdd9221489ec4ed6afc0e5146c2fae4daa8ab260
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/umulo-square.ll
Log Message:
-----------
[InstCombine] Simplify the overflow result of `umulov X, X` (#80796)
This patch does the following folds if only the overflow result is used:
```
extractvalue (umul.with.overflow iN X, X), 1 -> icmp ugt X, 2^(N/2)-1
```
Alive2: https://alive2.llvm.org/ce/z/a8yPC6
Commit: 6812bc40bd6c70f7cae10d1e0a2aeac31cfaef03
https://github.com/llvm/llvm-project/commit/6812bc40bd6c70f7cae10d1e0a2aeac31cfaef03
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/src/__support/float_to_string.h
Log Message:
-----------
[libc] Fix off by one in long double buffer size (#80889)
The size for the long double BLOCK_BUFFER_LEN is calculated based on the
properties of the long double type. Somewhere in the calculation, the
result was mis-rounded so that the buffer was one element too small.
This patch fixes the issue and adds asserts to catch it sooner in the
future.
Commit: 5f87957fefb21d454f2fd7e6b4891350170d8690
https://github.com/llvm/llvm-project/commit/5f87957fefb21d454f2fd7e6b4891350170d8690
Author: Adam Magier <83226568+AdamMagierFOSS at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
A clang/test/CodeGen/ubsan-shift-bitint.c
Log Message:
-----------
[clang][CodeGen][UBSan] Fixing shift-exponent generation for _BitInt (#80515)
Testing the shift-exponent check with small width _BitInt values exposed
a bug in ScalarExprEmitter::GetWidthMinusOneValue when using the result
to determine valid exponent sizes. False positives were reported for
some left shifts when width(LHS)-1 > range(RHS) and false negatives were
reported for right shifts when value(RHS) > range(LHS). This patch caps
the maximum value of GetWidthMinusOneValue to fit within range(RHS) to
fix the issue with left shifts and fixes a code generation in EmitShr to
fix the issue with right shifts and renames the function to
GetMaximumShiftAmount to better reflect the new behaviour.
Fixes #80135.
Co-authored-by: Adam Magier <adam.magier at ericsson.com>
Commit: c6691f689e9aa787b809fd3493bae8a5ca845cea
https://github.com/llvm/llvm-project/commit/c6691f689e9aa787b809fd3493bae8a5ca845cea
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/pread.cpp
Log Message:
-----------
[libc] Fix pread under msan (#80893)
The pread function wasn't properly unpoisoning its result under msan,
causing test failures downstream when I tried to roll it out. This patch
adds the msan unpoison call that fixes the issue.
Commit: ce00fdc91cb7a466054c3ffd8788ae2f9f5100f3
https://github.com/llvm/llvm-project/commit/ce00fdc91cb7a466054c3ffd8788ae2f9f5100f3
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Driver/wasm-features.c
M clang/test/Preprocessor/wasm-target-features.c
Log Message:
-----------
[WebAssembly] Cleanup feature tests (#80780)
This adds missing features to the tests and removes a stale feature
(unimplemented_simd128) from them.
Commit: 5b780c8c6c558ec283a9eec485a4f172df0f9fe1
https://github.com/llvm/llvm-project/commit/5b780c8c6c558ec283a9eec485a4f172df0f9fe1
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/lib/Sema/SemaOverload.cpp
M clang/test/Frontend/fixed_point_errors.cpp
Log Message:
-----------
Diagnose invalid fixed point conversion (#80763)
Commit: 5ce2f73b2e5e6664d74b49ee45f11505f8306577
https://github.com/llvm/llvm-project/commit/5ce2f73b2e5e6664d74b49ee45f11505f8306577
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/stack-tagging-dbg.ll
Log Message:
-----------
[DebugInfo][RemoveDIs] Add some missing test coverage
In github PR #78731 it looks like I added test coverage for RemoveDIs to
either the wrong test, or not enough. Adding
--try-experimental-debuginfo-iterators to this particular test is enough to
restore some coverage it seems.
Commit: c13e271a38363d354294e2af1651470bed8facb3
https://github.com/llvm/llvm-project/commit/c13e271a38363d354294e2af1651470bed8facb3
Author: Bhuminjay Soni <Soni5Happy at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.cpp
A clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/use-std-min-max.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/use-std-min-max.cpp
Log Message:
-----------
Add clang-tidy check to suggest replacement of conditional statement with std::min/std::max (#77816)
This pull request fixes #64914 where author suggests adding a
readability check to propose the replacement of conditional statements
with std::min/std::max for improved code readability. Additionally,
reference is made to PyLint's similar checks:
[consider-using-min-builtin](https://pylint.pycqa.org/en/latest/user_guide/messages/refactor/consider-using-min-builtin.html)
and
[consider-using-max-builtin](https://pylint.pycqa.org/en/latest/user_guide/messages/refactor/consider-using-max-builtin.html)
Commit: e197b957ce1061cb1bfbd586b703065367cce5dc
https://github.com/llvm/llvm-project/commit/e197b957ce1061cb1bfbd586b703065367cce5dc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Fix typo in call to clearFeatureBits.
We had "+zca" instead of "zca". The previous line used "c", not "+c".
This may not be a functional change. I think the function we pass this
to strips any '+' or '-'.
Commit: 8bb827c0e67e51adba1252d23edc58197e025cf7
https://github.com/llvm/llvm-project/commit/8bb827c0e67e51adba1252d23edc58197e025cf7
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
A llvm/test/Verifier/verify-dwarf-no-operands.ll
Log Message:
-----------
Add test for iterating over MDNode operands when they are empty (#80737)
With e8512786fedbfa6ddba70ceddc29d7122173ba5e the for loop that iterates
over MDNode operands was changed to a range-based for loop. This change
surfaces a bug where if the result of MD->operands() is an ArrayRef that
has a size of 0, then iterating over that ArrayRef leads to a
segmentation fault, due to accessing invalid addresses.
This was reverted with 6ce03ff3fef8fb6fa9afe8eb22c6d98bced26d48 but this
test should be added to test that codepath in the future.
Commit: 4858e9c9feb94d65acdb284fc2eaa5fe131c6584
https://github.com/llvm/llvm-project/commit/4858e9c9feb94d65acdb284fc2eaa5fe131c6584
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
A llvm/test/Transforms/InstCombine/fcmp-range-check-idiom.ll
Log Message:
-----------
[InstCombine] Canonicalize the fcmp range check idiom into `fabs + fcmp` (#76367)
This patch canonicalizes the fcmp range check idiom into `fabs + fcmp`
since the canonicalized form is better than the original form for the
backends.
Godbolt: https://godbolt.org/z/x3eqPb1fz
```
and (fcmp olt/ole/ult/ule x, C), (fcmp ogt/oge/ugt/uge x, -C) --> fabs(x) olt/ole/ult/ule C
or (fcmp ogt/oge/ugt/uge x, C), (fcmp olt/ole/ult/ule x, -C) --> fabs(x) ogt/oge/ugt/uge C
```
Alive2: https://alive2.llvm.org/ce/z/MRtoYq
Commit: 90e8dc0f7cbd09cc653b497eb2dfc68edd800f48
https://github.com/llvm/llvm-project/commit/90e8dc0f7cbd09cc653b497eb2dfc68edd800f48
Author: stephenpeckham <118857872+stephenpeckham at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess2.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
Log Message:
-----------
Fix failing testcases (#80902)
Commit: 672fb27b267edc5dec4939b0295c8eebcdc57467
https://github.com/llvm/llvm-project/commit/672fb27b267edc5dec4939b0295c8eebcdc57467
Author: Yitzhak Mandelbaum <ymand at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/unittests/Analysis/FlowSensitive/SignAnalysisTest.cpp
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
Log Message:
-----------
[clang][dataflow] Add new `join` API and replace existing `merge` implementations. (#80361)
This patch adds a new interface for the join operation, now properly
called `join`. Originally, the framework offered a single `merge`
operation, which could serve either as a join or a widening. In
practice, though we found this conflation didn't work for non-trivial
anlyses, and split of the widening operation (`widen`). This change
completes the transition by introducing a proper `join` with strict join
semantics.
In the process, it drops an odd (and often misused) aspect of `merge`
wherein callees could implictly instruct the framework to drop the
current entry by returning `false`. This features was never used
correctly in analyses and doesn't belong in a join operation, so it is
omitted.
---------
Co-authored-by: Dmitri Gribenko <gribozavr at gmail.com>
Co-authored-by: martinboehme <mboehme at google.com>
Commit: 4607f385e005b3792b5669683d2c9b50d83e4e61
https://github.com/llvm/llvm-project/commit/4607f385e005b3792b5669683d2c9b50d83e4e61
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
[RISCV] Use hasStdExtCOrZca instead of FeatureStdExtC to determine NOP size in RISCVAsmPrinter.cpp.
Found while auditing places where we only check C and not Zca.
Commit: 3f1e95a9d4cc1fdb933390247d0bd4391cf93f60
https://github.com/llvm/llvm-project/commit/3f1e95a9d4cc1fdb933390247d0bd4391cf93f60
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/test/AST/ms-constexpr.cpp
Log Message:
-----------
[clang][Interp] consider "MS constexpr" functions as well
This implements the minimum amout of support for this feature
to get the test/AST/ms-constexpr.cpp test working. More has to
be added to get SemaCXX tests to work.
Commit: cd0d11be7a6de335dcfcf2788a97d915f017e25e
https://github.com/llvm/llvm-project/commit/cd0d11be7a6de335dcfcf2788a97d915f017e25e
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/M68k/Alloc/dyn_alloca_aligned.ll
M llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll
M llvm/test/CodeGen/M68k/Arith/add.ll
M llvm/test/CodeGen/M68k/Arith/bitwise.ll
M llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
M llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll
M llvm/test/CodeGen/M68k/Atomics/load-store.ll
M llvm/test/CodeGen/M68k/CConv/c-args-inreg.ll
M llvm/test/CodeGen/M68k/CConv/c-args.ll
M llvm/test/CodeGen/M68k/CConv/fastcc-args.ll
M llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
M llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll
M llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
M llvm/test/CodeGen/M68k/CodeModel/medium-static.ll
M llvm/test/CodeGen/M68k/CodeModel/small-pic.ll
M llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
M llvm/test/CodeGen/M68k/CodeModel/small-static.ll
M llvm/test/CodeGen/M68k/Control/cmp.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
M llvm/test/CodeGen/M68k/inline-asm.ll
M llvm/test/CodeGen/M68k/link-unlnk.ll
M llvm/test/CodeGen/M68k/reserved-regs.ll
M llvm/test/CodeGen/M68k/varargs.ll
Log Message:
-----------
[M68k] Convert tests to opaque pointers (NFC)
Commit: 423ac3d9ee82ff48da91b35ec80497089bc55b9e
https://github.com/llvm/llvm-project/commit/423ac3d9ee82ff48da91b35ec80497089bc55b9e
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/CSKY/atomic-cmpxchg-flag.ll
M llvm/test/CodeGen/CSKY/atomic-cmpxchg.ll
M llvm/test/CodeGen/CSKY/atomic-load-store.ll
M llvm/test/CodeGen/CSKY/atomic-rmw.ll
M llvm/test/CodeGen/CSKY/call-16bit.ll
M llvm/test/CodeGen/CSKY/call.ll
M llvm/test/CodeGen/CSKY/constantpool.ll
M llvm/test/CodeGen/CSKY/dwarf-eh.ll
M llvm/test/CodeGen/CSKY/fpu/ldst-d.ll
M llvm/test/CodeGen/CSKY/fpu/ldst-f.ll
M llvm/test/CodeGen/CSKY/frameaddr-returnaddr.ll
M llvm/test/CodeGen/CSKY/indirectbr.ll
M llvm/test/CodeGen/CSKY/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/CSKY/inline-asm-f-constraint-f.ll
M llvm/test/CodeGen/CSKY/inline-asm.ll
M llvm/test/CodeGen/CSKY/ldst-i.ll
M llvm/test/CodeGen/CSKY/tls-models.ll
Log Message:
-----------
[CSKY] Convert tests to opaque pointers (NFC)
Commit: 1c22d3f55df852985c155742bbe96ab5e86aa6f0
https://github.com/llvm/llvm-project/commit/1c22d3f55df852985c155742bbe96ab5e86aa6f0
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/ARC/addrmode.ll
M llvm/test/CodeGen/ARC/call.ll
M llvm/test/CodeGen/ARC/ldst.ll
Log Message:
-----------
[ARC] Convert tests to opaque pointers (NFC)
Commit: 92b33822e989884d29465d34769b07d78aeb1a84
https://github.com/llvm/llvm-project/commit/92b33822e989884d29465d34769b07d78aeb1a84
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
M llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
M llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
M llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
M llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
M llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
M llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir
M llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
M llvm/test/DebugInfo/MIR/ARM/param-reg-const-mix.mir
M llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
M llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
M llvm/test/DebugInfo/MIR/ARM/split-superreg.mir
M llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir
M llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir
M llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
M llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
M llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
M llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir
M llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
M llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
M llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
M llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir
M llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-copy-sub-reg.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation-64bit.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu-64bit.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu.mir
M llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
M llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
M llvm/test/DebugInfo/MIR/X86/avoid-single-entry-value-location.mir
M llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
M llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
M llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
M llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
M llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
M llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
M llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
M llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
M llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
M llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
M llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
M llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
M llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
M llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
M llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
M llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
M llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks.mir
M llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks2.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
M llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir
M llvm/test/DebugInfo/MIR/X86/machinesink.mir
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
M llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
M llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
M llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir
M llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir
M llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir
M llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
M llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
Log Message:
-----------
[DebugInfo/MIR] Convert tests to opaque pointers (NFC)
Link: https://discourse.llvm.org/t/enabling-opaque-pointers-by-default/61322
Commit: cc55af777a19b69f466875683655810f5d485386
https://github.com/llvm/llvm-project/commit/cc55af777a19b69f466875683655810f5d485386
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/Sema/struct-cast.c
Log Message:
-----------
[clang][Interp] Only check ComparisonCategoryInfo in C++ (#80131)
Binary operators are also of struct type in C, when assigning. Don't try to get the ComparisonCategoryInfo in that case.
Commit: 3a05e01d1a76984fe1532bd237edbbb7ed9db6ea
https://github.com/llvm/llvm-project/commit/3a05e01d1a76984fe1532bd237edbbb7ed9db6ea
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
M llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
M llvm/test/DebugInfo/AArch64/fallthrough-branch.ll
M llvm/test/DebugInfo/AArch64/frameindices.ll
M llvm/test/DebugInfo/AArch64/machine-outliner.ll
M llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
M llvm/test/DebugInfo/ARM/machine-cp-updates-dbg-reg.mir
M llvm/test/DebugInfo/COFF/function-options.ll
M llvm/test/DebugInfo/COFF/global_rust.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/thunk.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/COFF/types-basic.ll
M llvm/test/DebugInfo/COFF/types-cvarargs.ll
M llvm/test/DebugInfo/COFF/types-data-members.ll
M llvm/test/DebugInfo/COFF/vftables.ll
M llvm/test/DebugInfo/COFF/virtual-methods.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/dse-after-memcpyopt-merge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten-offset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/id.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/inline-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/memset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/storemerge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/licm/multi-exit.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/loop-deletion/dead-loop.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/memcpyopt/merge-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mldst-motion/diamond.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/remove-redundant-fwd-scan-linked.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/empty-block.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/speculated-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/alloca-single-slice.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/complex.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag-2.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/id.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memcpy.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/rewrite.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/unspecified-var-size.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/track-assignments.ll
M llvm/test/DebugInfo/Generic/import-inlined-declaration.ll
M llvm/test/DebugInfo/Generic/licm-hoist-debug-loc.ll
M llvm/test/DebugInfo/Generic/licm-hoist-intrinsic-debug-loc.ll
M llvm/test/DebugInfo/Generic/split-dwarf-local-import.ll
M llvm/test/DebugInfo/MSP430/dwarf-basics.ll
M llvm/test/DebugInfo/MSP430/fp-vla-callee-saved.ll
M llvm/test/DebugInfo/X86/DW_AT_calling-convention.ll
M llvm/test/DebugInfo/X86/PR37234.ll
M llvm/test/DebugInfo/X86/containing-type-extension-rust.ll
M llvm/test/DebugInfo/X86/dbg-value-list-selectiondag-salvage.ll
M llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir
M llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/debug-loc-asan.mir
M llvm/test/DebugInfo/X86/debug-loc-frame.ll
M llvm/test/DebugInfo/X86/debug-loc-offset.mir
M llvm/test/DebugInfo/X86/dw_op_minus.mir
M llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll
M llvm/test/DebugInfo/X86/fragment-offset-order.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
M llvm/test/DebugInfo/X86/linkage-name.ll
M llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
M llvm/test/DebugInfo/X86/live-debug-vars-discard-invalid.mir
M llvm/test/DebugInfo/X86/live-debug-vars-dse.mir
M llvm/test/DebugInfo/X86/live-debug-vars-intervals.mir
M llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir
M llvm/test/DebugInfo/X86/location-range.mir
M llvm/test/DebugInfo/X86/pr19307.mir
M llvm/test/DebugInfo/X86/prolog-params.mir
M llvm/test/DebugInfo/X86/single-location-inlined-param.mir
M llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir
M llvm/test/DebugInfo/X86/single-location.mir
M llvm/test/DebugInfo/assignment-tracking/X86/lower-offset-expression.ll
M llvm/test/DebugInfo/assignment-tracking/X86/lower-to-value.ll
M llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill-cfg.ll
M llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill.ll
M llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location-2.ll
M llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location.ll
Log Message:
-----------
[DebugInfo] Convert tests to opaque pointers (NFC)
Link: https://discourse.llvm.org/t/enabling-opaque-pointers-by-default/61322
Commit: 51a3019e4d096d93820f921af20d7a0bf3fffc48
https://github.com/llvm/llvm-project/commit/51a3019e4d096d93820f921af20d7a0bf3fffc48
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
A clang/test/CXX/drs/dr28xx.cpp
Log Message:
-----------
[Clang][Sema] Implement proposed resolution for CWG2847 (#80899)
Per the approved resolution for CWG2847, [temp.expl.spec] p8 will state:
> An explicit specialization shall not have a trailing _requires-clause_ unless it declares a function template.
We already implement this _partially_ insofar that a diagnostic is issued upon instantiation of `A<int>` in the following example:
```
template<typename>
struct A
{
template<typename>
void f();
template<>
void f<int>() requires true; // error: non-templated function cannot have a requires clause
};
template struct A<int>; // note: in instantiation of template class 'A<int>' requested here
```
This patch adds a bespoke diagnostic for such declarations, and moves the point of diagnosis for non-templated functions with trailing requires-clauses from `CheckFunctionDeclaration` to `ActOnFunctionDeclarator` (there is no point in diagnosing this during instantiation since we already have all the necessary information when parsing the declaration).
Commit: 12aad1a53c7ae70b88e7cb3fa3d04b6a3532f669
https://github.com/llvm/llvm-project/commit/12aad1a53c7ae70b88e7cb3fa3d04b6a3532f669
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M openmp/libomptarget/src/omptarget.cpp
A openmp/libomptarget/test/mapping/auto_zero_copy_globals.cpp
Log Message:
-----------
[OpenMP] Support for global variables when in auto zero-copy. (#80876)
When building without unified_shared_memory, global variables are
declared in the device binary and allocated upon loading onto GPU
memory. However, when running in zero-copy mode (same as with
unified_shared_memory) D2H and H2D copies for mapped local and global
variables are turned off. This patch turns back on H2D and D2H copies
when they refer to global variables, enabling an application built
without unified_shared_memory to work correctly with global variables
when run under automatic zero-copy.
Co-authored-by: Doru Bercea <doru.bercea at amd.com>
Co-authored-by: Jan-Patrick Lehr <janpatrick.lehr at amd.com>
Commit: 4c9717c3bee3525c2bf0251469191cc65e246a14
https://github.com/llvm/llvm-project/commit/4c9717c3bee3525c2bf0251469191cc65e246a14
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
M mlir/test/Dialect/OpenACC/legalize-data.mlir
Log Message:
-----------
[mlir][openacc] Add private/reduction in legalize data pass (#80882)
This is a follow up to #80351 and adds private and reduction operands
from acc.loop, acc.parallel and acc.serial operations.
Commit: e96ba2509d5a1a3ba4ebba806828fc62cd2c34de
https://github.com/llvm/llvm-project/commit/e96ba2509d5a1a3ba4ebba806828fc62cd2c34de
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Log Message:
-----------
[gn build] Port c13e271a3836
Commit: 091fc81d485594d4b751c10518230769c905430c
https://github.com/llvm/llvm-project/commit/091fc81d485594d4b751c10518230769c905430c
Author: Konstantin Varlamov <varconsteq at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libcxx/include/__config
Log Message:
-----------
[libc++][hardening] Check that `_LIBCPP_HARDENING_MODE_DEFAULT` is defined (#80353)
If the `_LIBCPP_HARDENING_MODE_DEFAULT` macro is not defined,
`_LIBCPP_HARDENING_MODE` will be considered defined but fail the check
for a valid hardening mode, resulting in a slightly less understandable
error (that error is really meant more to prevent users from passing
incorrect values such as `0` or `1` directly rather than catching
configuration issues).
Commit: c8a97c0f30f3da86e892bf68d572068634994a1e
https://github.com/llvm/llvm-project/commit/c8a97c0f30f3da86e892bf68d572068634994a1e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Use hasStdExtCOrZca instead of hasStdExtC in estimateFunctionSizeInBytes. (#80905)
Commit: 1dd9162b95d29367635f32c7be24779b1ddaa7e5
https://github.com/llvm/llvm-project/commit/1dd9162b95d29367635f32c7be24779b1ddaa7e5
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/source/Target/TargetList.cpp
M lldb/test/API/python_api/target/TestTargetAPI.py
Log Message:
-----------
[lldb] Fix a crasher when using the public API. (#80508)
A user found a crash when they would do code like:
```
(lldb) script
>>> target = lldb.SBTarget()
>>> lldb.debugger.SetSelectedTarget(target)
```
We were not checking if the target was valid in and it caused a crash..
Commit: 1b5fae9118ab3450f22fb45f686a2cd0d979cbb4
https://github.com/llvm/llvm-project/commit/1b5fae9118ab3450f22fb45f686a2cd0d979cbb4
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/docs/UserGuides.rst
M llvm/docs/WritingAnLLVMNewPMPass.rst
M llvm/docs/WritingAnLLVMPass.rst
Log Message:
-----------
[docs] Try to make it easier to find info about new PM vs legacy PM (#80834)
Seen several beginner questions popping up in discourse about how to
implement and run custom passes. And then it turns out that they are
following the old "Writing an LLVM Pass" guide that describe legacy
passes, and then things are mixed up when they try to run that pass
using opt that nowadays default to the new pass manager.
This is an attempt to make it slightly clearer in the User Guides that
there are two different "Writing an LLVM Pass" pages depending on which
pass manager that should be used. This is done by renaming the legacy
version of "Writing an LLVM Pass" as "Writing an LLVM Pass (legacy PM
version)".
Also reordered the links to put the link to the new pass manager
documentation first.
This patch also moves the warning text that cross references the
description on how to write a pass for legacy/new PM to make sure it
ends up already in the beginning of the descriptions.
Also adding a new warning in the "Running a pass with opt" section of
the legacy PM version of the guide, to inform that those examples are
outdated.
Commit: e976385415da45650952316db63c4ccd370e4030
https://github.com/llvm/llvm-project/commit/e976385415da45650952316db63c4ccd370e4030
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
A llvm/test/Transforms/GlobalOpt/resolve-static-ifunc.ll
Log Message:
-----------
[llvm][GlobalOpt] Optimize statically resolvable IFuncs (#80606)
Commit: 16d890ced68aafae4cc8ba3efc9213bfab84ba54
https://github.com/llvm/llvm-project/commit/16d890ced68aafae4cc8ba3efc9213bfab84ba54
Author: Kojo Acquah <KoolJBlack at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
M mlir/test/Dialect/ArmNeon/invalid.mlir
M mlir/test/Dialect/ArmNeon/roundtrip.mlir
M mlir/test/Target/LLVMIR/arm-neon.mlir
Log Message:
-----------
[mlir][ArmNeon] Adds Arm Neon SMMLA, UMMLA, and USMMLA Intrinsics (#80511)
This adds the SMMLA, UMMLA, and USMMLA intrinsics to Neon dialect bringing it in line with the SVE dialect.
These ops enable matrix multiply-accumulate instructions with two e 2x8 matrix inputs of respective signage into a 2x2 32-bit integer accumulator. This is equivalent to performing an 8-way dot product per destination element.
Op details:
https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:@navigationhierarchiessimdisa=[Neon]&q=mmla
Commit: 8075f0db16f3291beed65cbcd034b047cc7373bf
https://github.com/llvm/llvm-project/commit/8075f0db16f3291beed65cbcd034b047cc7373bf
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M bolt/lib/Core/BinarySection.cpp
Log Message:
-----------
[BOLT] Use new contents when emitting sections with relocations (#80782)
We can use BinarySection::updateContents() to change section contents.
However, if we also add relocations for new contents, then the original
data (i.e. not updated) is going to be used. Fix that. A follow-up diff
will use the update interface and will include a test case.
Commit: b98db441f01ee8e0cdab8df1ef8a9b0aff2f6e5a
https://github.com/llvm/llvm-project/commit/b98db441f01ee8e0cdab8df1ef8a9b0aff2f6e5a
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M bolt/test/AArch64/ifunc.c
Log Message:
-----------
[BOLT] Make ifunc test not statically-resolvable. NFC
This fixes a breakage caused by e976385415da
Commit: 4d8e849dfbf3ca1301f208a7286b31215d2a94db
https://github.com/llvm/llvm-project/commit/4d8e849dfbf3ca1301f208a7286b31215d2a94db
Author: Alexander Shaposhnikov <6532716+alexander-shaposhnikov at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/abs.ll
Log Message:
-----------
[ConstraintElim] Add facts for llvm.abs >= 0 (#79070)
Add facts for llvm.abs >= 0.
https://alive2.llvm.org/ce/z/GXnMHu
Commit: fbded6663fb04d12f451c18bc8018989d2db3a87
https://github.com/llvm/llvm-project/commit/fbded6663fb04d12f451c18bc8018989d2db3a87
Author: ZijunZhaoCCK <88353225+ZijunZhaoCCK at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
R clang/test/Driver/android-version.cpp
A clang/test/Driver/invalid-version.cpp
Log Message:
-----------
[Driver] Check the environment version except wasm case. (#80783)
Add isWasm() check for here:
https://github.com/llvm/llvm-project/pull/78655#issuecomment-1928075569
Commit: 08457e1f7693bdafe5330cde2bf41290cad4cade
https://github.com/llvm/llvm-project/commit/08457e1f7693bdafe5330cde2bf41290cad4cade
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M libcxx/test/libcxx/containers/sequences/deque/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/list/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/vector.bool/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/vector/abi.compile.pass.cpp
Log Message:
-----------
[libc++] Add tests to pin down the ABI of deque, list and vector (#80191)
This patch adds tests that lock down the ABI of types like deque, list
and vector.
An upcoming patch will replace the usage of __compressed_pair in these
classes
by [[no_unique_address]], so we are adding these tests to pin down their
ABI
before making the change. That way, we can be confident that the patch
making
the actual ABI-sensitive change is safe if it doesn't break these tests.
Commit: 42357df2df4977c80aba77fcab706638a121bde0
https://github.com/llvm/llvm-project/commit/42357df2df4977c80aba77fcab706638a121bde0
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
A clang/test/AST/fixed-point-zero-init.cpp
Log Message:
-----------
[clang] Add zero-initialization for fixed point types (#80781)
Commit: 2f490583c368627f552c71e340c39f2b55c0526c
https://github.com/llvm/llvm-project/commit/2f490583c368627f552c71e340c39f2b55c0526c
Author: jkorous-apple <32549412+jkorous-apple at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-debug.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix debug notes for unclaimed DREs (#80787)
Debug notes for unclaimed DeclRefExpr should report any DRE of an unsafe
variable that is not covered by a Fixable (i. e. fixit for the
particular AST pattern isn't implemented for whatever reason). Currently
not all unclaimed DeclRefExpr-s are reported which is a bug. The debug
notes report only those DREs where the referred VarDecl has at least one
other DeclRefExpr which is claimed (covered by a fixit). If there is an
unsafe VarDecl that has exactly one DRE and the DRE isn't claimed then
the debug note about missing fixit won't be emitted. That is because the
debug note is emitted from within a loop over set of successfully
matched FixableGadgets which by-definition is missing those DRE that are
not matched at all.
The new code simply iterates over all unsafe VarDecls and all of their
unclaimed DREs.
Commit: 1b03cbc93989c84ad0b78c27d4427a7eaa5842f1
https://github.com/llvm/llvm-project/commit/1b03cbc93989c84ad0b78c27d4427a7eaa5842f1
Author: Fernando Tagawa <tagawafernando at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/Format/BreakableToken.cpp
M clang/unittests/Format/FormatTestComments.cpp
Log Message:
-----------
[clang-format] Handle doxygen commands starting with \ (#80381)
Fixes llvm/llvm-project#63241
Doxygen commands can start with `@` or `\`.
Commit: 2217837c3377c22bffb6c498a732ce4672b8b535
https://github.com/llvm/llvm-project/commit/2217837c3377c22bffb6c498a732ce4672b8b535
Author: Wanyi <kusmour at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/bindings/headers.swig
A lldb/bindings/interface/SBStatisticsOptionsDocStrings.i
M lldb/bindings/interfaces.swig
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
A lldb/include/lldb/API/SBStatisticsOptions.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBStatisticsOptions.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Commands/CommandObjectStats.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
M lldb/test/API/functionalities/stats_api/main.c
Log Message:
-----------
Support statistics dump summary only mode (#80745)
Add a new --summary option to statistics dump command so that it is
much more light weight than the full version.
Introduce a new SBStatisticsOptions API setting the verbosity of statistics dump.
[PR
#80218](https://github.com/llvm/llvm-project/pull/80218#discussion_r1473639878)
Commit: bcd1490496a5bf06ce98470ef622db29a8eebbf7
https://github.com/llvm/llvm-project/commit/bcd1490496a5bf06ce98470ef622db29a8eebbf7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
Log Message:
-----------
[gn build] Port 2217837c3377
Commit: 44767278650227b30cf969170dc139197ce4338d
https://github.com/llvm/llvm-project/commit/44767278650227b30cf969170dc139197ce4338d
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Preprocessor/wasm-target-features.c
Log Message:
-----------
[WebAssembly] Add tests for generic CPU config (#80775)
This adds tests for `generic` cpu configuration. We had tests for `mvp`
and `bleeding-edge` configs but not `generic`.
Commit: 897297e8b09ed6076f5dc6883b459b209bb9e29f
https://github.com/llvm/llvm-project/commit/897297e8b09ed6076f5dc6883b459b209bb9e29f
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Driver/wasm-features.c
Log Message:
-----------
[WebAssembly] Fix CPU tests in wasm-features.c (#80900)
The CPU tests in this file are not working as intended. Specifying
`-mcpu=[mvp|generic|bleeding-edge]` in `clang` command line does NOT add
arguments like `-target-feature`, `+feature-name`, ... to `clang-14`
command line. Specifying `-mcpu=[mvp|generic|bleeding-edge]` in `clang`
command line will just add `-target-cpu` `[mvp|generic|bleeding-edge]`
to `clang-14` command line, and individual features are added here
within `clang-14` invocation:
https://github.com/llvm/llvm-project/blob/5b780c8c6c558ec283a9eec485a4f172df0f9fe1/clang/lib/Basic/Targets/WebAssembly.cpp#L150-L163
The reason these CPU tests are passing is because they only have `-NOT`
checks, and we don't emit `-target-feature` arguments for them anyway,
the test passes, but they don't check what they are supposed to check.
This make CPU tests only check `-target-cpu` lines instead of individual
features, which will not be emitted.
Commit: 055ac72ecca4b56826ac02851f8a18f20a8557df
https://github.com/llvm/llvm-project/commit/055ac72ecca4b56826ac02851f8a18f20a8557df
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
Log Message:
-----------
[GISel] Add support for scalable vectors in getLCMType (#80306)
This function can be called from buildCopyToRegs where at least one of
the types is a scalable vector type. This function crashed because it
did not know how to handle scalable vector types.
This patch extends the functionality of getLCMType to handle when at
least one of the types is a scalable vector. getLCMType between a fixed
and scalable vector is not implemented since the docstring of the
function explains that getLCMType is used to build MERGE/UNMERGE
instructions and we will never build a MERGE/UNMERGE between fixed and
scalable vectors.
Commit: 6d268577259071cb1d9cccd89006bae8570f6c51
https://github.com/llvm/llvm-project/commit/6d268577259071cb1d9cccd89006bae8570f6c51
Author: Wanyi <kusmour at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
R lldb/bindings/interface/SBStatisticsOptionsDocStrings.i
A lldb/bindings/interface/SBStatisticsOptionsDocstrings.i
Log Message:
-----------
Fix the Docstring.i filename (#80917)
The typo DocStrings.i broke linux buildbots
Commit: bd1324113e90884a4a83d6232ecf0c623e2e113e
https://github.com/llvm/llvm-project/commit/bd1324113e90884a4a83d6232ecf0c623e2e113e
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M compiler-rt/lib/memprof/memprof_allocator.cpp
M compiler-rt/lib/memprof/memprof_allocator.h
M compiler-rt/lib/memprof/memprof_interceptors.cpp
M compiler-rt/lib/memprof/memprof_internal.h
M compiler-rt/lib/memprof/memprof_malloc_linux.cpp
Log Message:
-----------
[MemProf][NFC] Clean up runtime code (#80581)
Commit: c5bf1f4b8f5ba1912f18729f0726c9227f567c9d
https://github.com/llvm/llvm-project/commit/c5bf1f4b8f5ba1912f18729f0726c9227f567c9d
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
Log Message:
-----------
[test] Autogen a test for ease of update in forthcoming patch
Commit: 1aafe7605b295bdb6e9951f4ca86390d306152d2
https://github.com/llvm/llvm-project/commit/1aafe7605b295bdb6e9951f4ca86390d306152d2
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
Log Message:
-----------
[test] Regen a test for naming changes
Commit: 69a661cbae10495e9556d195fa683c0100ae299c
https://github.com/llvm/llvm-project/commit/69a661cbae10495e9556d195fa683c0100ae299c
Author: Visoiu Mistrih Francis <890283+francisvm at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
A llvm/test/CodeGen/RISCV/zcmp-cm-push-pop.mir
Log Message:
-----------
[RISCV] Remove CalleeSavedInfo for Zcmp/save-restore-libcalls registers (#79535)
Registers that are pushed/popped by Zcmp or libcalls have pre-defined
frame indices that are never allocated in MachineFrameInfo. They're
being used throughout PEI, but the rest of codegen doesn't work that way
and expects each frame index to be a valid index in MFI.
This patch keeps it local to PEI and removes them from the
CalleeSavedInfo list at the end of the pass.
Before this pass, any MIR testing post-PEI is broken and asserts (see
issue #79491).
Commit: cf0773fb14e18e97de3f66b4f21f286ca4f97eae
https://github.com/llvm/llvm-project/commit/cf0773fb14e18e97de3f66b4f21f286ca4f97eae
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/include/llvm/Target/TargetSchedule.td
Log Message:
-----------
[TableGen][NFC] Remove EponymousProcResourceKind (#80812)
We can use `!cast` to cast `NAME` to `ProcResourceKind`.
Commit: c7fa25f0b2398f7037af6e10b18456b69178f7c5
https://github.com/llvm/llvm-project/commit/c7fa25f0b2398f7037af6e10b18456b69178f7c5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/test/MC/RISCV/elf-flags.s
Log Message:
-----------
[RISCV] Set the RVC bit in the ELF EFlags for C or Zca. (#80913)
Commit: 8ea7f1d20ad8ab8c381800eefda948d85c6860cc
https://github.com/llvm/llvm-project/commit/8ea7f1d20ad8ab8c381800eefda948d85c6860cc
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M bolt/lib/Passes/BinaryPasses.cpp
Log Message:
-----------
[BOLT][NFCI] Keep instruction annotations (#80382)
We used to delete most instruction annotations before code emission. It
was done to release memory taken by annotations and to reduce overall
memory consumption. However, since the implementation of annotations has
moved to using existing instruction operands, the memory overhead
associated with them has reduced drastically. I measured that savings
are less than 0.5% on large binaries and processing time is just
slightly reduced if we keep them. Additionally, I plan to use
annotations in pre-emission passes for the Linux kernel rewriter.
Commit: 8ae048507086cc3a2ceb6974506d3048c516a726
https://github.com/llvm/llvm-project/commit/8ae048507086cc3a2ceb6974506d3048c516a726
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/docs/TableGen/BackEnds.rst
M llvm/test/TableGen/generic-tables-instruction.td
M llvm/utils/TableGen/CodeGenTarget.cpp
M llvm/utils/TableGen/CodeGenTarget.h
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[TableGen] Extend direct lookup to instruction values in generic tables. (#80486)
Currently, for some tables involving a single primary key field which is
integral and densely numbered, a direct lookup is generated rather than
a binary search. This patch extends the direct lookup function
generation to instructions, where the integral value corresponds to the
instruction's enum value.
While this isn't as common as for other tables, it does occur in at
least one downstream backend and one in-tree backend.
Added a unit test and minimally updated the documentation.
Commit: adbf21f12b3069b2554efb39f2e92c6cf6f24940
https://github.com/llvm/llvm-project/commit/adbf21f12b3069b2554efb39f2e92c6cf6f24940
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
A mlir/include/mlir/Dialect/Func/Extensions/MeshShardingExtensions.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.td
A mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterfaceImpl.h
M mlir/include/mlir/Dialect/Mesh/Transforms/Passes.td
M mlir/include/mlir/Dialect/Mesh/Transforms/Spmdization.h
M mlir/lib/Dialect/Func/Extensions/AllExtensions.cpp
M mlir/lib/Dialect/Func/Extensions/CMakeLists.txt
A mlir/lib/Dialect/Func/Extensions/MeshShardingExtensions.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/lib/Dialect/Mesh/Transforms/ShardingPropagation.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Tosa/IR/ShardingInterfaceImpl.cpp
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
A mlir/test/Dialect/Mesh/spmdization.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][mesh] Add spmdization pass (#80518)
Add a pass that converts a function that has sharding annotations into
SPMD form.
Commit: b0785cd1cbf97dbd4eb39647ff22771ef0a7cfea
https://github.com/llvm/llvm-project/commit/b0785cd1cbf97dbd4eb39647ff22771ef0a7cfea
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
A llvm/test/CodeGen/ARM/GlobalISel/select-const.mir
Log Message:
-----------
[GlobalISel][ARM] Support missing case for G_CONSTANT (#80555)
Global Instruction Selector could not select the code:
%0:gprb(s32) = G_CONSTANT i32 -1
In DAG selector the similar code is selected to the instruction MVNi
using custom operand `mod_imm_not`. Changing its definition from
`PatLeaf` to `ImmLeaf` and providing counterpart for `imm_not_XFORM`
make the relevant rule available for GlobalISel too.
Commit: 966f78bdf849d1ae4ce205f93f5967df71e95f4c
https://github.com/llvm/llvm-project/commit/966f78bdf849d1ae4ce205f93f5967df71e95f4c
Author: AtariDreams <83477269+AtariDreams at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/fdiv.ll
Log Message:
-----------
[InstCombine] Resolve TODO: nnan nsz X / -0.0 -> copysign(inf, X) (#79766)
Commit: 86fa21e93efe6d8079d202bf30e7e8db66cc32a0
https://github.com/llvm/llvm-project/commit/86fa21e93efe6d8079d202bf30e7e8db66cc32a0
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
Log Message:
-----------
[mlir] Fix -Wunused-function in ShardingInterface.cpp (NFC)
llvm-project/mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp:522:1:
error: unused function 'isValueCompatibleWithFullReplicationSharding' [-Werror,-Wunused-function]
isValueCompatibleWithFullReplicationSharding(Value value,
^
1 error generated.
Commit: 679d0d70295cab1f3692fc1919299d8c16070863
https://github.com/llvm/llvm-project/commit/679d0d70295cab1f3692fc1919299d8c16070863
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][Docs] Fix link to Zjpm spec in RISCVUsage.rst.
Commit: c5e5661591a90094eeb5831de86d701419c74f07
https://github.com/llvm/llvm-project/commit/c5e5661591a90094eeb5831de86d701419c74f07
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/Headers/cpuid.h
Log Message:
-----------
[X86] Add missing MACROs in cpuid.h (#80815)
Relate gcc file:
https://github.com/gcc-mirror/gcc/blob/master/gcc/config/i386/cpuid.h
Commit: 8c84096da195ae38336ba9aa700dc35e567157ba
https://github.com/llvm/llvm-project/commit/8c84096da195ae38336ba9aa700dc35e567157ba
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Fix initializing _Complex values from DeclRefExpr
See the comment I added. When initializing a complex value from a
DeclRefExpr, we need to manually copy both array elements.
This adds some unfortunate code duplication that I'm still pondering
on how to get rid of best.
Commit: 28b82075ff3e58ba9c6959a585d3d0fc5d0325e5
https://github.com/llvm/llvm-project/commit/28b82075ff3e58ba9c6959a585d3d0fc5d0325e5
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Support ImplicitValueInitExpr for complex types
Initialize both elements to 0, once again.
Commit: cb7561ac5a8445f5c526c949efd50f45f55bb089
https://github.com/llvm/llvm-project/commit/cb7561ac5a8445f5c526c949efd50f45f55bb089
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Log Message:
-----------
[Sched] Add MacroFusion mutation if fusions are not empty (#72227)
We can get the fusions list by `getMacroFusions` and if it is not
empty, then we will add the MacroFusion mutation automatically.
Commit: ea4f44e85f7ca884d42b9b12bd13bab47c3e5d3c
https://github.com/llvm/llvm-project/commit/ea4f44e85f7ca884d42b9b12bd13bab47c3e5d3c
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Log Message:
-----------
[RISCV] Remove unused variable 'ST' in RISCVTargetMachine.cpp (NFC)
llvm-project/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp:358:27:
error: unused variable 'ST' [-Werror,-Wunused-variable]
const RISCVSubtarget &ST = C->MF->getSubtarget<RISCVSubtarget>();
^
1 error generated.
Commit: 9bda1de0b6096d26e87fed18cb681cc3e5b8319a
https://github.com/llvm/llvm-project/commit/9bda1de0b6096d26e87fed18cb681cc3e5b8319a
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
Log Message:
-----------
[TwoAddressInstruction] Propagate undef flags for partial defs (#79286)
If part of a register (lowered from REG_SEQUENCE) is undefined then we
should propagate undef flags to uses of those lanes. This is only
performed when live intervals are present as it requires live intervals
to correctly match uses to defs, and the primary goal is to allow
precise computation of subrange intervals.
Commit: e7c0e59bbcf713d09ca7a09cd513399d66a94ca5
https://github.com/llvm/llvm-project/commit/e7c0e59bbcf713d09ca7a09cd513399d66a94ca5
Author: Job Noorman <jnoorman at igalia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Fix crash for relocs in data sections against ABS symbols (#76026)
Fixes #75771
Commit: 93962ea1176b91239496378e7141a44dc95a5efd
https://github.com/llvm/llvm-project/commit/93962ea1176b91239496378e7141a44dc95a5efd
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/docs/Passes.rst
Log Message:
-----------
[docs][passes] Update documentation of Analysis and Transform Passes (#80835)
- Added a warning about the pass list being incomplete (and hint about
"opt -print-passes" listing known passes).
- Removed legacy PM example involving "opt -analyze".
- print-function and print-module does not exist with those names in the
new PM. Since the document has been updated to reflect the new PM names
earlier, those names were changed into referring to function(print) and
module(print) instead.
- Resolved some FIXME:s around strip* passes.
Commit: 9a028afdd655f8e378819e4125292d973985f3f4
https://github.com/llvm/llvm-project/commit/9a028afdd655f8e378819e4125292d973985f3f4
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Dialect/Transform/IR/TransformInterfaces.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
Log Message:
-----------
[mlir][IR][NFC] `Listener::notifyMatchFailure` returns `void` (#80704)
There are two `notifyMatchFailure` methods: one in the rewriter and one
in the listener. The one in the rewriter notifies the listener and
returns "failure" for convenience. The one in the listener should not
return anything; it is just a notification. It can currently be abused
to return "success" from the rewriter function. That would be a
violation of the rewriter API rules.
Also make sure that the listener is always notified about match
failures, not just with `NDEBUG`. The current implementation is
consistent: one `notifyMatchFailure` overload notifies only in debug
mode and another one notifies all the time.
Commit: 2ad6fd6735150e44e2170368968c0006df4d8387
https://github.com/llvm/llvm-project/commit/2ad6fd6735150e44e2170368968c0006df4d8387
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
Log Message:
-----------
[RISCV][NFC] Move SFB pseudos and patterns to RISCVInstrInfoSFB.td (#80945)
To make the structure of TableGen files clear.
Commit: 7d508eb5d38f4bbbab4230a666d9e742e271af61
https://github.com/llvm/llvm-project/commit/7d508eb5d38f4bbbab4230a666d9e742e271af61
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
R llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
Log Message:
-----------
Revert "[AMDGPU] Add pal metadata 3.0 support to callable pal funcs (#67104)"
This reverts commit d6c7253d32e4bdff619c39708170f1c1fa01ff95.
Change causing CTS failures due to incomplete metadata.
Commit: fff86c6111b6d3ed68a8ea57ab5e7d3d716472c6
https://github.com/llvm/llvm-project/commit/fff86c6111b6d3ed68a8ea57ab5e7d3d716472c6
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Dialect/ArmSME/invalid.mlir
M mlir/test/Dialect/ArmSME/outer-product-fusion.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir
Log Message:
-----------
[mlir][ArmSME] Support 4-way widening outer products (#79288)
This patch introduces support for 4-way widening outer products. This
enables the fusion of 4 'arm_sme.outerproduct' operations that are
chained via the accumulator into single widened operations.
Changes:
- Adds the following operations:
- smopa_4way, smops_4way
- umopa_4way, umops_4way
- sumopa_4way, sumops_4way
- sumopa_4way, sumops_4way
- Implements conversions for the above ops to intrinsics in ArmSMEToLLVM.
- Extends 'arm-sme-outer-product' pass.
For a detailed description of these operations see the
'arm_sme.smopa_4way' description.
Commit: 67402fe5e4bf7a706d47bc106113f599a8d59947
https://github.com/llvm/llvm-project/commit/67402fe5e4bf7a706d47bc106113f599a8d59947
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M flang/include/flang/Lower/ConvertCall.h
M flang/include/flang/Optimizer/Builder/MutableBox.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/test/Lower/HLFIR/function-return-as-expr.f90
Log Message:
-----------
[flang] Do not move finalized function results in lowering (#80683)
Fortran requires finalizing function results when the result type have
final procedures.
Lowering was unconditionally "moving" function results into values
"hlfir.expr". This is not correct when the results are finalized because
it means the function result storage will be used after the hlfir.expr.
Only move function results that are not finalized.
Commit: 1b87ebce924e507cbc27c2e0dc623941d16388c9
https://github.com/llvm/llvm-project/commit/1b87ebce924e507cbc27c2e0dc623941d16388c9
Author: Yi Kong <yikong at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/lib/ObjCopy/ConfigManager.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
A llvm/test/tools/llvm-objcopy/ELF/prefix-symbols-remove.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
Log Message:
-----------
[llvm-objcopy] Add --remove-symbol-prefix (#79415)
Commit: e1d564ac130fb6ec14d1e237a123373d64249e55
https://github.com/llvm/llvm-project/commit/e1d564ac130fb6ec14d1e237a123373d64249e55
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/tools/llvm-exegesis/X86/latency/middle-half.s
Log Message:
-----------
[llvm-exegesis] Allow retries on flaky middle half test
The middle half repetition mode test sometimes fails on the avx512
buildbots due to a negative value being produced. This needs more
investigation, but add a retry count temporarily to alleviate
false-positive errors on the buildbots.
This is being tracked in #80957.
Commit: 0f439f374f9cec73466c5166b9a8764214a74069
https://github.com/llvm/llvm-project/commit/0f439f374f9cec73466c5166b9a8764214a74069
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
A flang/test/HLFIR/as_expr-codegen-polymorphic.fir
M flang/test/HLFIR/bufferize-poly-expr.fir
Log Message:
-----------
[flang] Fix hlfir.as_expr codegen for polymorphic entities (#80824)
https://github.com/llvm/llvm-project/pull/80683 revealed that
hlfir.as_expr was propagating the temporary buffer for polymorphic
values as an allocatable while codegen later expects to be working with
fir.box/fir.class but not fir.ref<box/class> when processing the
operations using the hlfir.as_expr result.
Dereference the temporary allocatable as soon as it is created.
Commit: 88c830a1a5687bec597ca947159e4dd9a3f2ac2d
https://github.com/llvm/llvm-project/commit/88c830a1a5687bec597ca947159e4dd9a3f2ac2d
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
Log Message:
-----------
[TOSA] Fix avgpool2d accum in wider type (#80849)
Truncate result of avgpool when accumulation is done in a wider type
than the result element type, such as when doing a f16 avgpool2d with a
f32 accumulator type.
Commit: f8562e245c0c3ebaa8c75575fac566497a0c9245
https://github.com/llvm/llvm-project/commit/f8562e245c0c3ebaa8c75575fac566497a0c9245
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[flang][OpenMP][NFC] Further refactoring for `genOpWithBody` & (#80839)
`createBodyOfOp`
This refactors the arguments to the above functions in 2 ways:
- Combines the 2 structs of arguments into one since they were almost
identical.
- Replaces the `args` argument with a callback to a rebion-body
generation function. This is a preparation for delayed privatization as
we will need different callbacks for ws loops and parallel ops with
delayed privatization.
Commit: 365bf43b8b290ab64b5b82879bc9d1dfdd5d6aa9
https://github.com/llvm/llvm-project/commit/365bf43b8b290ab64b5b82879bc9d1dfdd5d6aa9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
Log Message:
-----------
[LSR] Regenerate test checks (NFC)
Check output IR instead of debug output. The debug output will
change in an upcoming patch in an irrecoverable way.
Commit: e60c4b61f8bab25a137a481e4d2d3dbfa656807b
https://github.com/llvm/llvm-project/commit/e60c4b61f8bab25a137a481e4d2d3dbfa656807b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Log Message:
-----------
[InstCombine] Change order of checks for dominating conditions (NFC)
Check whether the condition is in the expected format before
performing more expensive dominator checks.
Commit: bec7181d5b9d1828129d78d440fd9e02d5cb63e8
https://github.com/llvm/llvm-project/commit/bec7181d5b9d1828129d78d440fd9e02d5cb63e8
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
A llvm/test/Transforms/LoopIdiom/pr80954.ll
Log Message:
-----------
[SCEVExpander] Don't use recursive expansion for ptr IV inc
Similar to the non-ptr case, directly create the getelementptr
instruction. Going through expandAddToGEP() no longer makes sense
with opaque pointers, where generating the necessary instruction
is trivial.
This avoids recursive expansion of (the SCEV of) StepV while the
IR is in an inconsistent state, in particular with an incomplete
IV phi node, which utilities may not be prepared to deal with.
Fixes https://github.com/llvm/llvm-project/issues/80954.
Commit: eeb60e335e4fecb9ce3ed62cf081568cecf1d4ac
https://github.com/llvm/llvm-project/commit/eeb60e335e4fecb9ce3ed62cf081568cecf1d4ac
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[AMDGPU] Remove unused multiclass
Commit: 7760006d8d39e7624601936e2b1b428d850726b8
https://github.com/llvm/llvm-project/commit/7760006d8d39e7624601936e2b1b428d850726b8
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/stdbit-macros.h
M libc/spec/stdc.td
M libc/src/stdbit/CMakeLists.txt
A libc/src/stdbit/stdc_trailing_ones_uc.cpp
A libc/src/stdbit/stdc_trailing_ones_uc.h
A libc/src/stdbit/stdc_trailing_ones_ui.cpp
A libc/src/stdbit/stdc_trailing_ones_ui.h
A libc/src/stdbit/stdc_trailing_ones_ul.cpp
A libc/src/stdbit/stdc_trailing_ones_ul.h
A libc/src/stdbit/stdc_trailing_ones_ull.cpp
A libc/src/stdbit/stdc_trailing_ones_ull.h
A libc/src/stdbit/stdc_trailing_ones_us.cpp
A libc/src/stdbit/stdc_trailing_ones_us.h
M libc/test/include/stdbit_test.cpp
M libc/test/src/stdbit/CMakeLists.txt
A libc/test/src/stdbit/stdc_trailing_ones_uc_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ui_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ul_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ull_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_us_test.cpp
Log Message:
-----------
[libc][stdbit] implement stdc_trailing_ones (C23) (#80459)
Commit: 670c2529bb97f53a5b73e1eedb736ac6e070e1d9
https://github.com/llvm/llvm-project/commit/670c2529bb97f53a5b73e1eedb736ac6e070e1d9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] Use DAGCombiner::SimplifyDemandedBits wrappers with default (all) DemandedElts. NFC.
Don't call TLI.SimplifyDemandedVectorElts directly from every SimplifyDemandedBits call, use the more expressive wrappers instead first.
This reduces the number of places we call TLI.SimplifyDemandedVectorElts and CommitTargetLoweringOpt to make it easier to track.
Part of the work to process DAG nodes in topological order.
Commit: c2a91d4a33af49cd77c6d6ec731ae25538f746b8
https://github.com/llvm/llvm-project/commit/c2a91d4a33af49cd77c6d6ec731ae25538f746b8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/CodeGen/X86/combine-movmsk-avx.ll
Log Message:
-----------
[X86] combine-movmsk-avx.ll - add full AVX1/AVX2 VTEST/MOVMSK test coverage
Test all combos of avx1/avx2 and prefer-movmsk-over-vtest
Commit: 89ad31fd9356e2f999eb63fbac88d1338b8b3592
https://github.com/llvm/llvm-project/commit/89ad31fd9356e2f999eb63fbac88d1338b8b3592
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/Assembler/DIDefaultTemplateParam.ll
M llvm/test/Transforms/Attributor/ArgumentPromotion/pr33641_remove_arg_dbgvalue.ll
M llvm/test/Transforms/Scalarizer/dbginfo.ll
Log Message:
-----------
[RemoveDIs][DebugInfo] Perform some pre-turn-on test maintenence (#80885)
As we'll hopefully move away from using intrinsics for debug-info
shortly, this commit stabilizes a few tests to avoid spurious changes in
the process. Briefly, there are differences in output when we don't use
intrinsics that we're going to suppress in case we have to revert, these
are:
* The attributor test gets different attributes for the dbg.value
intrinsic because it's not present during optimisation. This has no
functional effect and there's no need to test for it.
* The Scalarizer test exposes a "debug-info affects codegen" problem,
but fixing it is fiddly (updating 20 IRBuilder object calls). Pin this
test to not change with RemoveDIs, we can relax it later and get the
correct behaviour.
* DIDefaultTemplateParam.ll tests for explicit metadata node numbers
which is generally bad. Add explicit node-number capturing CHECK lines.
Commit: fb581adbdd2264b3ab28394b5e8539d4d2c05fbd
https://github.com/llvm/llvm-project/commit/fb581adbdd2264b3ab28394b5e8539d4d2c05fbd
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/Transforms/SROA/select-gep.ll
Log Message:
-----------
[SROA] Add tests with gep of index select (NFC)
Commit: af6656c375b8aa9c9156575f7c0ac678a57070d5
https://github.com/llvm/llvm-project/commit/af6656c375b8aa9c9156575f7c0ac678a57070d5
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/Descriptor.cpp
Log Message:
-----------
[clang][Interp][NFC] Fix moveArrayTy byte offset
We need to account for the InitMapPtr here. This is NFC right now since
no test is affected by it.
Commit: df856e49773d0569741117cfd856818b7644ea85
https://github.com/llvm/llvm-project/commit/df856e49773d0569741117cfd856818b7644ea85
Author: Alexey Bataev <5361294+alexey-bataev at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
Log Message:
-----------
[SLP]Add GEP cost estimation for gathered loads.
When doing estimation for vectorization of gathered loads, need to
estimate the cost of the pointer (vectorization), as it is done for the
actual vectorized loads. Otherwise may be too optimistic about the cost
of the gathered loads.
Reviewers: preames
Reviewed By: preames
Pull Request: https://github.com/llvm/llvm-project/pull/80867
Commit: 61c7a69fa0c020e92b1b10882d5d2957f3b8da21
https://github.com/llvm/llvm-project/commit/61c7a69fa0c020e92b1b10882d5d2957f3b8da21
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp] Fix sizeof of reference types
Commit: a97ff2d35af0a5c640c20abf4215c08e0e69aa41
https://github.com/llvm/llvm-project/commit/a97ff2d35af0a5c640c20abf4215c08e0e69aa41
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp] Add missing static_assert message
This breaks builders:
https://lab.llvm.org/buildbot/#/builders/139/builds/58960
Commit: d109f94f29e2bc2fc31c8870b1e41759f524fe77
https://github.com/llvm/llvm-project/commit/d109f94f29e2bc2fc31c8870b1e41759f524fe77
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll
M llvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll
M llvm/test/Transforms/IROutliner/legal-debug.ll
M llvm/test/Transforms/InstCombine/cast-mul-select.ll
M llvm/test/Transforms/InstCombine/debuginfo_add.ll
M llvm/test/Transforms/InstCombine/sink-instruction-introduces-unnecessary-poison-value.ll
Log Message:
-----------
[DebugInfo][RemoveDIs] Re-enable some test coverage
We disabled these extra-special RUNlines due to unexpected interactions
between the various things we've been fixing. Re-enable them (they'll run
on the llvm-new-debug-iterators buildbot) as they all now pass.
Commit: f37d81f8a3e1475f30bec63bfc0b703fc9509d7c
https://github.com/llvm/llvm-project/commit/f37d81f8a3e1475f30bec63bfc0b703fc9509d7c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstSimplify/cast-unsigned-icmp-cmp-0.ll
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] Add a matching helper `m_ElementWiseBitCast`. NFC. (#80764)
This patch introduces a matching helper `m_ElementWiseBitCast`, which is
used for matching element-wise int <-> fp casts.
The motivation of this patch is to avoid duplicating checks in
https://github.com/llvm/llvm-project/pull/80740 and
https://github.com/llvm/llvm-project/pull/80414.
Commit: 6cb66ee5f8827040c5178fc2a479c138f4838eca
https://github.com/llvm/llvm-project/commit/6cb66ee5f8827040c5178fc2a479c138f4838eca
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Metadata.cpp
Log Message:
-----------
[RemoveDIs][DebugInfo] Handle RAUW from dead constants (#80837)
Ensure that when a constant value dies, all ValueAsMetadata uses of that
constant in a DebugValueUser will be replaced with a PoisonValue instead
of a nullptr. This has little visible effect currently, as any nullptr metadata
uses in a DebugValueUser would be converted to an empty MDNode in
the end anyway, but this patch adds an assert that would be triggered by
two existing tests without the functional component of this patch:
llvm/test/Transforms/Inline/delete-function-with-metadata-use.ll
llvm/test/DebugInfo/X86/array2.ll
Commit: accbcb9578959b86cadc901a57ffa4a0c3f23ead
https://github.com/llvm/llvm-project/commit/accbcb9578959b86cadc901a57ffa4a0c3f23ead
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/tools/llvm-objcopy/ELF/prefix-symbols-remove.test
Log Message:
-----------
[llvm-objcopy][test] Use actual temporary file names in the test for --remove-symbol-prefix
Commit: b0c6fc81fe132f20eed38bd836620dfcb5ac17e9
https://github.com/llvm/llvm-project/commit/b0c6fc81fe132f20eed38bd836620dfcb5ac17e9
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeStmtGen.cpp
M clang/test/SemaCXX/cxx20-using-enum.cpp
Log Message:
-----------
[clang][Interp] Ignore UsingEnumDecls
We previously aborted compilation when seeing one of them. Ignore
them instead, they have no effect on the generated bytecode.
Commit: 7ab0a871431375cb966b0653b9f5caaba15cb6d9
https://github.com/llvm/llvm-project/commit/7ab0a871431375cb966b0653b9f5caaba15cb6d9
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/free-inversion.ll
Log Message:
-----------
[InstCombine] Try to freely invert phi nodes (#80804)
This patch tries to invert phi nodes if all incoming values are either
constants or nots.
Commit: 0aacd44a4698da012ee0704815123b28f2a06d0f
https://github.com/llvm/llvm-project/commit/0aacd44a4698da012ee0704815123b28f2a06d0f
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
M llvm/test/Transforms/SpeculativeExecution/PR46267.ll
Log Message:
-----------
[RemoveDIs][DebugInfo] Hoist DPValues in SpeculativeExecution (#80886)
This patch modifies `SpeculativeExecutionPass::considerHoistingFromTo`
to treat DPValues the same way that it treats debug intrinsics, which is
to hoist them iff all of their instruction operands within the FromBlock
are also being hoisted. This is probably not the ideal behaviour, which
would be to not hoist debug info at all in this case, but this patch
simply ensures that DPValue behaviour is consistent with debug intrinsic
behaviour rather than trying to create new functional changes.
Commit: de7beb06e7b3864feec165f84f02e24f6c18870a
https://github.com/llvm/llvm-project/commit/de7beb06e7b3864feec165f84f02e24f6c18870a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Log Message:
-----------
[DAG] ExpandShiftWithKnownAmountBit - reduce number of repeated getOpcode / getOperand calls. NFC.
Commit: 50d38cf934861205768de9e3cf32827e73764001
https://github.com/llvm/llvm-project/commit/50d38cf934861205768de9e3cf32827e73764001
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
Log Message:
-----------
[X86] X86FixupVectorConstants.cpp - update comment to describe all the constant load ops performed by the pass
Commit: 4e58f03f298eb5c74877942c1c68911341c678bd
https://github.com/llvm/llvm-project/commit/4e58f03f298eb5c74877942c1c68911341c678bd
Author: Shourya Goel <114918019+Sh0g0-1758 at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/test/Frontend/verify.c
Log Message:
-----------
[Clang] Fix : More Detailed "No expected directives found" (#78338)
Updated the error message to use the proper prefix when
no expected directives are found by changing the hard coded expected in
the message to a dynamic value in two error messages.
Fixes #58290
Commit: c76b0eb898d1e5edc416b658a6902163d64db1ce
https://github.com/llvm/llvm-project/commit/c76b0eb898d1e5edc416b658a6902163d64db1ce
Author: Stephen Tozer <Stephen.Tozer at Sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
M llvm/test/Transforms/SpeculativeExecution/PR46267.ll
Log Message:
-----------
Revert "[RemoveDIs][DebugInfo] Hoist DPValues in SpeculativeExecution (#80886)"
Reverted due to buildbot failures resulting from failed compile due to a
missing brace error that got into the original commit.
This reverts commit 0aacd44a4698da012ee0704815123b28f2a06d0f.
Commit: 52bf531630d19e115d30b4ca46f1ef03b9a724c6
https://github.com/llvm/llvm-project/commit/52bf531630d19e115d30b4ca46f1ef03b9a724c6
Author: Sirraide <74590115+Sirraide at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang][Sema] Fix out-of-bounds access (#80978)
Trying to compile a C-style variadic member function with an explicit
object parameter was crashing in Sema because of an out-of-bounds
access.
This fixes #80971.
Commit: 5c84054223102b00cc0dd343a4023e3c6cba42b2
https://github.com/llvm/llvm-project/commit/5c84054223102b00cc0dd343a4023e3c6cba42b2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/docs/ClangLinkerWrapper.rst
M clang/docs/OffloadingDesign.rst
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
M llvm/include/llvm/Frontend/Offloading/OffloadWrapper.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Object/OffloadBinary.cpp
Log Message:
-----------
[LinkerWrapper] Support relocatable linking for offloading (#80066)
Summary:
The standard GPU compilation process embeds each intermediate object
file into the host file at the `.llvm.offloading` section so it can be
linked later. We also use a special section called something like
`omp_offloading_entries` to store all the globals that need to be
registered by the runtime. The linker-wrapper's job is to link the
embedded device code stored at this section and then emit code to
register the linked image and the kernels and globals in the offloading
entry section.
One downside to RDC linking is that it can become quite big for very
large projects that wish to make use of static linking. This patch
changes the support for relocatable linking via `-r` to support a kind
of "partial" RDC compilation for offloading languages.
This primarily requires manually editing the embedded data in the
output object file for the relocatable link. We need to rename the
output section to make it distinct from the input sections that will be
merged. We then delete the old embedded object code so it won't be
linked further. We then need to rename the old offloading section so
that it is private to the module. A runtime solution could also be done
to defer entries that don't belong to the given GPU executable, but this
is easier. Note that this does not work with COFF linking, only the ELF
method for handling offloading entries, that could be made to work
similarly.
Given this support, the following compilation path should produce two
distinct images for OpenMP offloading.
```
$ clang foo.c -fopenmp --offload-arch=native -c
$ clang foo.c -lomptarget.devicertl --offload-link -r -o merged.o
$ clang main.c merged.o -fopenmp --offload-arch=native
$ ./a.out
```
Or similarly for HIP to effectively perform non-RDC mode compilation for
a subset of files.
```
$ clang -x hip foo.c --offload-arch=native --offload-new-driver -fgpu-rdc -c
$ clang -x hip foo.c -lomptarget.devicertl --offload-link -r -o merged.o
$ clang -x hip main.c merged.o --offload-arch=native --offload-new-driver -fgpu-rdc
$ ./a.out
```
One question is whether or not this should be the default behavior of
`-r` when run through the linker-wrapper or a special option. Standard
`-r` behavior is still possible if used without invoking the
linker-wrapper and it guaranteed to be correct.
Commit: 5d8a7318b2192ce8e396ec420f3f4d8f1a07cc10
https://github.com/llvm/llvm-project/commit/5d8a7318b2192ce8e396ec420f3f4d8f1a07cc10
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/builtin-functions.cpp
Log Message:
-----------
[clang][Interp] Support __builtin_eh_return_data_regno
Commit: 66d4fe97d8d46195672117797b663c21cf576f33
https://github.com/llvm/llvm-project/commit/66d4fe97d8d46195672117797b663c21cf576f33
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
M llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
M llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.noglobals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.transitiveglobals.expected
M llvm/unittests/Transforms/Utils/DebugifyTest.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs] Final final test-maintenence patch (#80988)
This should be the final portion of shaping-up the test suite to be
ready for turning on non-intrinsic debug-info:
* Pin CostModel tests that expect to see intrinsics in their -debug
output to not use RemoveDIs. This is a spurious test output difference.
* Add 'tail' to a bunch of intrinsics in UpdateTestChecks. We're
cannonicalising intrinsics to be printed with "tail" in RemoveDI
conversion as dbg.values usually pick that up while being optimised.
This is another spurious output difference.
* The "DebugInfoDrop" pass used in the debugify unit-tests happens to
operate inside the pass manager, thus it sees non-intrinsic debug-info.
Update it to correctly drop it.
Commit: d42f3957cea0a8f45d5f3c11db229e2ea1e6d614
https://github.com/llvm/llvm-project/commit/d42f3957cea0a8f45d5f3c11db229e2ea1e6d614
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/test/AST/Interp/switch.cpp
Log Message:
-----------
[clang][Interp][NFC] Convert test to verify=expected,both style
Commit: 7718ac38a0c23597d7d02f0022eb89afe6d1b35f
https://github.com/llvm/llvm-project/commit/7718ac38a0c23597d7d02f0022eb89afe6d1b35f
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/lib/IR/AffineExpr.cpp
Log Message:
-----------
[MLIR] NFC. Fix remaining clang-tidy warnings in AffineExpr.cpp (#80933)
NFC. Fix remaining clang-tidy warnings in AffineExpr.cpp.
Commit: d4a2c7f95297d1865a457955dcf7b679dabb5e0e
https://github.com/llvm/llvm-project/commit/d4a2c7f95297d1865a457955dcf7b679dabb5e0e
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/records.cpp
M clang/test/SemaCXX/cxx1z-copy-omission.cpp
Log Message:
-----------
[clang][Interp] Fix record initialization from temporary in initlist
Commit: 7a71ac2b00cd6ec06c113f8813f085d5ed346ad9
https://github.com/llvm/llvm-project/commit/7a71ac2b00cd6ec06c113f8813f085d5ed346ad9
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/and-fcmp.ll
A llvm/test/Transforms/InstCombine/canonicalize-fcmp-inf.ll
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstCombine/fold-select-fmul-if-zero.ll
Log Message:
-----------
[InstCombine] Canonicalize fcmp with inf (#80986)
This patch canonicalizes floating-point comparisons with inf:
```
fcmp olt X, +inf -> fcmp one X, +inf
fcmp ole X, +inf -> fcmp ord X, 0
fcmp ogt X, +inf -> false
fcmp oge X, +inf -> fcmp oeq X, +inf
fcmp ult X, +inf -> fcmp une X, +inf
fcmp ule X, +inf -> true
fcmp ugt X, +inf -> fcmp uno X, 0
fcmp uge X, +inf -> fcmp ueq X, +inf
fcmp olt X, -inf -> false
fcmp ole X, -inf -> fcmp oeq X, -inf
fcmp ogt X, -inf -> fcmp one X, -inf
fcmp oge X, -inf -> fcmp ord X, 0
fcmp ult X, -inf -> fcmp uno X, 0
fcmp ule X, -inf -> fcmp ueq X, -inf
fcmp ugt X, -inf -> fcmp une X, -inf
fcmp uge X, -inf -> true
```
Alive2: https://alive2.llvm.org/ce/z/FRqqDg
The motivation of this patch is to fix the regression found in
https://github.com/dtcxzyw/llvm-opt-benchmark/pull/199#discussion_r1480974120.
Commit: aeb58844dd6673417ebd7fb83f3acdf7282397fb
https://github.com/llvm/llvm-project/commit/aeb58844dd6673417ebd7fb83f3acdf7282397fb
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/test/ThinLTO/X86/crash_debuginfo.ll
Log Message:
-----------
[RemoveDIs] Don't convert debug-info in bitcode-loading just now (#80865)
We've been building and testing this no-debug-intrinsic work inside of
the pass manager for a while, so that optimisation passes get exercised
and tested when we turn it on. However, by converting to the
non-intrinsic form in the bitcode loader, we accidentally caused all
parts of LLVM to potentially see non-intrinsic debug-info.
Seeing how we're trying to turn things on incrementally, it was a
mistake to go this far this fast: we can instead just focus on enabling
during optimisations for the moment, then all the other parts of LLVM
later.
Commit: c954986fec97ab22a9658b496731d0c280938a64
https://github.com/llvm/llvm-project/commit/c954986fec97ab22a9658b496731d0c280938a64
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
Log Message:
-----------
[GISel] Add support for scalable vectors in getGCDType (#80307)
This function can be called from buildCopyToRegs where at least one of
the types is a scalable vector type. This function crashed because it
did not know how to handle scalable vector types.
This patch extends the functionality of getGCDType to handle when at
least one of the types is a scalable vector. getGCDType between a fixed
and scalable vector is not implemented since the docstring of the
function explains that getGCDType is used to build MERGE/UNMERGE
instructions and we will never build a MERGE/UNMERGE between fixed and
scalable vectors.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 4d12292c2ac5caf93cd325a1516cbeacfc87b2e9
https://github.com/llvm/llvm-project/commit/4d12292c2ac5caf93cd325a1516cbeacfc87b2e9
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[AMDGPU] Clean up and share SOP Real instruction definitions (#80990)
The aim is to share definitions for all architectures that have the same
instruction (ignoring renaming) with the same opcode. Overall this saves
about 60 lines of tablegen.
Commit: 4f381afa09c2e60f48a65b10074f8b862a0b6738
https://github.com/llvm/llvm-project/commit/4f381afa09c2e60f48a65b10074f8b862a0b6738
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/or.ll
Log Message:
-----------
[InstCombine] Add additional multi-use test for and/or replacement (NFC)
Commit: 934ba0d59e650644fe69462935982318b265ad2c
https://github.com/llvm/llvm-project/commit/934ba0d59e650644fe69462935982318b265ad2c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Log Message:
-----------
[InstCombine] Handle missing cases in `visitFCmpInst`
Fiix buildbot failures.
Commit: 8c37e3e64bb1432f771ec4d191837e6b3be5bf0c
https://github.com/llvm/llvm-project/commit/8c37e3e64bb1432f771ec4d191837e6b3be5bf0c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_align_rvc.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call_boundary.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_relax_call_rvc.s
Log Message:
-----------
[RISCV] Only set Zca flag for EF_RISCV_RVC in ELFObjectFileBase::getRISCVFeatures(). (#80928)
This code appears to be a hack to set the features to include compressed
instructions if the ELF EFLAGS flags bit is present, but the ELF
attribute for the ISA string is no present or not accurate.
We can't remove the hack because llvm-mc doesn't create ELF attributes
by default so a lot of tests fail to disassembler properly. Using clang
as the assembler does set the attributes.
This patch changes the hack to only set Zca since that is the minimum
implied by the flag. Setting anything else potentially conflicts with
the ISA string containing Zcmp or Zcmt.
JITLink also needs to be updated to recognize Zca in addition to C.
Commit: 79fec2f8ba8ea0b0b1c2f13fb6355cb395e1d3af
https://github.com/llvm/llvm-project/commit/79fec2f8ba8ea0b0b1c2f13fb6355cb395e1d3af
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
Log Message:
-----------
[AtomicExpand][RISCV] Call shouldExpandAtomicRMWInIR before widenPartwordAtomicRMW (#80947)
This gives the target a chance to keep an atomicrmw op that is smaller
than the minimum cmpxchg size. This is needed to support the Zabha
extension for RISC-V which provides i8/i16 atomicrmw operations, but
does not provide an i8/i16 cmpxchg or LR/SC instructions.
This moves the widening until after the target requests
LLSC/CmpXChg/MaskedIntrinsic expansion. Once we widen, we call
shouldExpandAtomicRMWInIR again to give the target another chance to
make a decision about the widened operation.
I considered making the targets return AtomicExpansionKind::Expand or a
new expansion kind for And/Or/Xor, but that required the targets to
special case And/Or/Xor which they weren't currently doing.
Commit: 7212b4ae09abe5ba0f9a6ea608ebb6dbfad48b73
https://github.com/llvm/llvm-project/commit/7212b4ae09abe5ba0f9a6ea608ebb6dbfad48b73
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
Log Message:
-----------
[RemoveDIs] Remove unused debug-printing facility for DPMarkers
We originally thought that printing the DPMarker pointer after each
instruction was going to be useful, but it turns out it only serves to
generate spurious test output differences now. As it stands, the cannonical
way to debug RemoveDIs metadata is "dumpDbgValues".
Commit: 7e4ac8541dcc389ca8f0d11614e19ea7bae07af7
https://github.com/llvm/llvm-project/commit/7e4ac8541dcc389ca8f0d11614e19ea7bae07af7
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
Log Message:
-----------
[Flang] Use specific symbol rather than generic symbol as procInterface to declare procedure pointer. (#80738)
Flang crashes when lowering the type of `p1` with the following code.
The problem is when it sets up the `procInterface`, it uses the generic
symbol `int`, not the specific `int`. This PR is to correct that.
```
INTERFACE Int
integer FUNCTION Int(arg)
integer :: arg
END FUNCTION
END INTERFACE
integer :: res
procedure(int), pointer :: p1
p1 => int
res = p1(4)
end
```
Commit: ab92f6274b7c3a4b4445d47017bc481aa919545f
https://github.com/llvm/llvm-project/commit/ab92f6274b7c3a4b4445d47017bc481aa919545f
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M .github/workflows/llvm-project-tests.yml
Log Message:
-----------
[workflows] Fix libclc CI tests (#80942)
This was broken by 1a6426067fb33a8a789978f6e229108787a041be.
Commit: 65bf93dd7b4cfe96b549fd8248455ba4869ba27c
https://github.com/llvm/llvm-project/commit/65bf93dd7b4cfe96b549fd8248455ba4869ba27c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/or-xor.ll
M llvm/test/Transforms/InstCombine/or.ll
Log Message:
-----------
[InstCombine] Clean up bitwise folds without one-use check (#80587)
This patch removes some bitwise folds that fail to check the one-use
constraint on the operands.
See also the comments
https://github.com/llvm/llvm-project/pull/77231#issuecomment-1904090035.
Commit: bb531c9a0068a078c5bbe95298769b235aa1ad75
https://github.com/llvm/llvm-project/commit/bb531c9a0068a078c5bbe95298769b235aa1ad75
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineModuleInfo.h
M llvm/lib/CodeGen/MachineModuleInfo.cpp
M llvm/lib/CodeGen/MachinePassManager.cpp
M llvm/tools/llc/NewPMDriver.cpp
M llvm/unittests/CodeGen/PassManagerTest.cpp
M llvm/unittests/MIR/PassBuilderCallbacksTest.cpp
Log Message:
-----------
[NewPM/Codegen] Move MachineModuleInfo ownership outside of analysis (#80937)
With the legacy pass manager, MachineModuleInfoWrapperPass owned the
MachineModuleInfo used in the codegen pipeline. It can do this since
it's an ImmutablePass that doesn't get invalidated.
However, with the new pass manager, it is legal for the
ModuleAnalysisManager to clear all of its analyses, regardless of if the
analysis does not want to be invalidated. So we must move ownership of
the MachineModuleInfo outside of the analysis (this is similar to
PassInstrumentation). For now, make the PassBuilder user register a
MachineModuleAnalysis that returns a reference to a MachineModuleInfo
that the user owns. Perhaps we can find a better place to own the
MachineModuleInfo to make using the codegen pass manager less cumbersome
in the future.
Commit: 5a83bccb35d6b0e6914b52af6db067aa01dd3efb
https://github.com/llvm/llvm-project/commit/5a83bccb35d6b0e6914b52af6db067aa01dd3efb
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/tls-models.ll
Log Message:
-----------
[X86] Fix lowering TLS under darwin large code model (#80907)
OpFlag and WrapperKind should be chosen consistently with each other in
regards to PIC, otherwise we hit asserts later on.
Broken by c04a05d8.
Fixes #80831.
Commit: eaab6abd79bf1a377bf034e1cf652a93d10b45fb
https://github.com/llvm/llvm-project/commit/eaab6abd79bf1a377bf034e1cf652a93d10b45fb
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
A llvm/test/tools/llc/new-pm/pipeline.mir
M llvm/tools/llc/NewPMDriver.cpp
Log Message:
-----------
[llc] Respect --print-pipeline-passes when using -passes (#80940)
Commit: c1f7f4df01f48e771e501ea14fbef80a23c0e700
https://github.com/llvm/llvm-project/commit/c1f7f4df01f48e771e501ea14fbef80a23c0e700
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
R libc/src/__support/FPUtil/XFloat.h
Log Message:
-----------
[libc][NFC] Remove dead code (#81005)
Commit: e71a5f54d86be3ddf66d4a4e53d5083ef7f7a118
https://github.com/llvm/llvm-project/commit/e71a5f54d86be3ddf66d4a4e53d5083ef7f7a118
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/Register.h
Log Message:
-----------
[NFC] Typo in Register.h
Commit: 34f61cfa6656acffc1a969a21c934c24ad0073c3
https://github.com/llvm/llvm-project/commit/34f61cfa6656acffc1a969a21c934c24ad0073c3
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/test/Transforms/MergeFunc/mergefunc-preserve-debug-info.ll
Log Message:
-----------
[DebugInfo][RemoveDIs] Instrument MergeFunctions for DPValues (#80974)
The MergeFunctions pass has a "preserve some debug-info" mode that tries
to preserve parameter values. This patch generalises its decision-making
so that it applies to both debug-info stored in intrinsics, and
debug-info stored in DPValue objects. For the most part this involves
using a generic lambda and applying it to each type of object.
(Normally we avoid debug-info affecting the code generated, but this is
hidden behind a command line switch, so won't usually be encountered by
users).
Note that this diff is messy, but that's because I'm hoisting some code
into lambdas. The actual decision making processes here are identical.
Commit: e28ca2dd46c137fd33dd327aed1afb1e66a32908
https://github.com/llvm/llvm-project/commit/e28ca2dd46c137fd33dd327aed1afb1e66a32908
Author: Artem Tyurin <artem.tyurin at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M libc/src/stdio/printf_core/converter.cpp
M libc/src/stdio/printf_core/int_converter.h
M libc/src/stdio/printf_core/parser.h
M libc/test/src/stdio/printf_core/converter_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
Log Message:
-----------
[libc] Support C23 'b' (binary) modifier in printf (#80851)
Reference: https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2612.pdf.
Fixes https://github.com/llvm/llvm-project/issues/80727.
Commit: bcc1635c7f8cf25c05ca9ef1f4995ad3e01ddda4
https://github.com/llvm/llvm-project/commit/bcc1635c7f8cf25c05ca9ef1f4995ad3e01ddda4
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/docs/math/index.rst
Log Message:
-----------
[libc] Enable float128 entrypoints on aarch64 and riscv64. (#80682)
Commit: 9eed89908cc906850ef9c6a97ed7a5642ecd6599
https://github.com/llvm/llvm-project/commit/9eed89908cc906850ef9c6a97ed7a5642ecd6599
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof-import-fix.ll
Log Message:
-----------
[MemProf] Handle empty stack context during ThinLTO cloning (#81008)
Fix for assert after PR#78264.
Handle the case where the MIB context is empty after skipping the
callsite context, because the callsite context is actually longer than
the MIB context. Presumably this happened as a result of inlining, but
in theory the metadata should have been replaced with an attribute in
that case. Need to investigate why this is occuring, but for now handle
this gracefully to fix the build regression.
Commit: 7c16cb6b3361ff4217004d0cc43f158dea221620
https://github.com/llvm/llvm-project/commit/7c16cb6b3361ff4217004d0cc43f158dea221620
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir-opt][nfc] Remove dead function decls
This removes 3 dead function decls from mlir-opt:
- registerTestLowerToNVVM - recently removed in #75775 when NVVM was
productized.
- registerTestPreparationPassWithAllowedMemrefResults - removed in
D90778 (f7bc56826616).
- registerTestGenericIRVisitorsInterruptPass - added in D116230
(8067ced144a2) but never existed. Pass is registered by
registerTestGenericIRVisitorsPass.
Commit: b0b0bf6d579f26962ac29592feaacd54ae04b60d
https://github.com/llvm/llvm-project/commit/b0b0bf6d579f26962ac29592feaacd54ae04b60d
Author: YAMAMOTO Takashi <yamamoto at midokura.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
WebAssemblyTargetMachine.cpp: fix a typo in a message (#80958)
Commit: 347ab99a5c6d096beb7378794c6255dca2a866e6
https://github.com/llvm/llvm-project/commit/347ab99a5c6d096beb7378794c6255dca2a866e6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/docs/ClangLinkerWrapper.rst
M clang/docs/OffloadingDesign.rst
Log Message:
-----------
[Clang][Docs] Fix trailing whitespace warnings
Commit: 7880b2c8586eade00a4aa5ac11007317a61e376c
https://github.com/llvm/llvm-project/commit/7880b2c8586eade00a4aa5ac11007317a61e376c
Author: Max191 <44243577+Max191 at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/Utils/Utils.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
M mlir/test/Dialect/Linalg/vectorization.mlir
Log Message:
-----------
[mlir] Add direct vectorization lowering for `tensor.pack` ops (#78660)
This PR adds a direct vectorization lowering of `tensor.pack` into
`mask(vector.transfer_read)`->`vector.shape_cast`->`vector.transpose`->`vector.transfer_write`.
Commit: 3115ad8980e7d36adca95b5449db8ebf9bd94bf2
https://github.com/llvm/llvm-project/commit/3115ad8980e7d36adca95b5449db8ebf9bd94bf2
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
Log Message:
-----------
[AMDGPU] Accept arbitrary sized sources in CalculateByteProvider (#70240)
Reland the original patch with additional commit containing fix for two
issues:
1. Attempting to bitcast using MVTs with no corresponding LLVM type.
getDWordFromOffset now works directly with the original vector to get
the corresponding elements given the DWordOffset.
2. Improper bit tracking in CalculateByteProvider for vector types using
certain ops. Previously, bit tracking for certain ops (e.g.
ISD::TRUNCATE) assumed operands were scalar types, which is not correct
since these ops have different semantics depending on vector / scalar.
CalculateByteProvider / CalculateSrcByte now exit on vector types,
handling which is a TODO.
Commit: b89eb9790a8962ca634965d05491a93c58773faf
https://github.com/llvm/llvm-project/commit/b89eb9790a8962ca634965d05491a93c58773faf
Author: Shourya Goel <114918019+Sh0g0-1758 at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/bug69085.c
Log Message:
-----------
[Clang][OpenMP] Fix `!isNull() && "Cannot retrieve a NULL type pointer"' fail. (#81015)
Fixes : #69085 , #69200
**PR SUMMARY**: "Added Null check for negative sized array and a test
for the same"
Commit: 9c75a981554d5de4b909e6493f2c3dda03395aa2
https://github.com/llvm/llvm-project/commit/9c75a981554d5de4b909e6493f2c3dda03395aa2
Author: Ilya Leoshkevich <iii at linux.ibm.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/test/CodeGen/SystemZ/asm-01.ll
Log Message:
-----------
[SystemZ] Implement A, O and R inline assembly format flags (#80685)
Implement the following assembly format flags, which are already
supported by GCC:
'A': On z14 or higher: If operand is a mem print the alignment
hint usable with vl/vst prefixed by a comma.
'O': print only the displacement of a memory reference or address.
'R': print only the base register of a memory reference or address.
Implement 'A' conservatively, since the memory operand alignment
information is not available for INLINEASM at the moment.
Commit: 2ecf608829252d7d5b530a03b87817cd948a3386
https://github.com/llvm/llvm-project/commit/2ecf608829252d7d5b530a03b87817cd948a3386
Author: lonely eagle <2020382038 at qq.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/ComposeSubView.cpp
M mlir/test/Transforms/compose-subview.mlir
Log Message:
-----------
[mlir]Fix compose subview (#80551)
I found a bug in `test-compose-subview`,You can see the example I gave.
```
#map = affine_map<() -> ()>
module {
func.func private @fun(%arg0: memref<10x10xf32>, %arg1: memref<5x5xf32>) -> memref<5x5xf32> {
%c0 = arith.constant 0 : index
%c5 = arith.constant 5 : index
%c1 = arith.constant 1 : index
%subview = memref.subview %arg0[0, 0] [5, 5] [1, 1] : memref<10x10xf32> to memref<5x5xf32, strided<[10, 1]>>
%alloc = memref.alloc() : memref<5x5xf32>
scf.for %arg2 = %c0 to %c5 step %c1 {
scf.for %arg3 = %c0 to %c5 step %c1 {
%subview_0 = memref.subview %subview[%arg2, %arg3] [1, 1] [1, 1] : memref<5x5xf32, strided<[10, 1]>> to memref<f32, strided<[], offset: ?>>
%subview_1 = memref.subview %arg1[%arg2, %arg3] [1, 1] [1, 1] : memref<5x5xf32> to memref<f32, strided<[], offset: ?>>
%alloc_2 = memref.alloc() : memref<f32>
linalg.generic {indexing_maps = [#map, #map, #map], iterator_types = []} ins(%subview_0, %subview_1 : memref<f32, strided<[], offset: ?>>, memref<f32, strided<[], offset: ?>>) outs(%alloc_2 : memref<f32>) {
^bb0(%in: f32, %in_4: f32, %out: f32):
%0 = arith.addf %in, %in_4 : f32
linalg.yield %0 : f32
}
%subview_3 = memref.subview %alloc[%arg2, %arg3] [1, 1] [1, 1] : memref<5x5xf32> to memref<f32, strided<[], offset: ?>>
memref.copy %alloc_2, %subview_3 : memref<f32> to memref<f32, strided<[], offset: ?>>
}
}
return %alloc : memref<5x5xf32>
}
func.func @test(%arg0: memref<10x10xf32>, %arg1: memref<5x5xf32>) -> memref<5x5xf32> {
%0 = call @fun(%arg0, %arg1) : (memref<10x10xf32>, memref<5x5xf32>) -> memref<5x5xf32>
return %0 : memref<5x5xf32>
}
}
```
When I run `mlir-opt test.mlir ---test-compose-subview`.
```
test.mlir:14:9: error: 'linalg.generic' op expected operand rank (2) to match the result rank of indexing_map #0 (0)
linalg.generic {indexing_maps = [#map, #map, #map], iterator_types = []} ins(%subview_0, %subview_1 : memref<f32, strided<[], offset: ?>>, memref<f32, strided<[], offset: ?>>) outs(%alloc_2 : memref<f32>) {
^
test1.mlir:14:9: note: see current operation:
"linalg.generic"(%4, %5, %6) <{indexing_maps = [affine_map<() -> ()>, affine_map<() -> ()>, affine_map<() -> ()>], iterator_types = [], operandSegmentSizes = array<i32: 2, 1>}> ({
^bb0(%arg4: f32, %arg5: f32, %arg6: f32):
%8 = "arith.addf"(%arg4, %arg5) <{fastmath = #arith.fastmath<none>}> : (f32, f32) -> f32
"linalg.yield"(%8) : (f32) -> ()
}) : (memref<1x1xf32, strided<[10, 1], offset: ?>>, memref<f32, strided<[], offset: ?>>, memref<f32>) -> ()
```
This PR fixes that.In the meantime I've extended this PR to handle cases
where stride is greater than 1.
```
func.func private @Unknown0(%arg0: memref<10x10xf32>, %arg1: memref<5x5xf32>) -> memref<5x5xf32> {
%c0 = arith.constant 0 : index
%c5 = arith.constant 5 : index
%c1 = arith.constant 1 : index
%subview = memref.subview %arg0[0, 0] [5, 5] [2, 2] : memref<10x10xf32> to memref<5x5xf32, strided<[20, 2]>>
%alloc = memref.alloc() : memref<5x5xf32>
scf.for %arg2 = %c0 to %c5 step %c1 {
scf.for %arg3 = %c0 to %c5 step %c1 {
%subview_0 = memref.subview %subview[%arg2, %arg3] [1, 1] [1, 1] : memref<5x5xf32, strided<[20, 2]>> to memref<f32, strided<[], offset: ?>>
%subview_1 = memref.subview %arg1[%arg2, %arg3] [1, 1] [1, 1] : memref<5x5xf32> to memref<f32, strided<[], offset: ?>>
%alloc_2 = memref.alloc() : memref<f32>
linalg.generic {indexing_maps = [affine_map<() -> ()>, affine_map<() -> ()>, affine_map<() -> ()>], iterator_types = []} ins(%subview_0, %subview_1 : memref<f32, strided<[], offset: ?>>, memref<f32, strided<[], offset: ?>>) outs(%alloc_2 : memref<f32>) {
^bb0(%in: f32, %in_4: f32, %out: f32):
%0 = arith.addf %in, %in_4 : f32
linalg.yield %0 : f32
}
%subview_3 = memref.subview %alloc[%arg2, %arg3] [1, 1] [1, 1] : memref<5x5xf32> to memref<f32, strided<[], offset: ?>>
memref.copy %alloc_2, %subview_3 : memref<f32> to memref<f32, strided<[], offset: ?>>
}
}
return %alloc : memref<5x5xf32>
}
$ mlir-opt test.mlir -test-compose-subview
#map = affine_map<()[s0] -> (s0 * 2)>
#map1 = affine_map<() -> ()>
module {
func.func private @Unknown0(%arg0: memref<10x10xf32>, %arg1: memref<5x5xf32>) -> memref<5x5xf32> {
%c0 = arith.constant 0 : index
%c5 = arith.constant 5 : index
%c1 = arith.constant 1 : index
%alloc = memref.alloc() : memref<5x5xf32>
scf.for %arg2 = %c0 to %c5 step %c1 {
scf.for %arg3 = %c0 to %c5 step %c1 {
%0 = affine.apply #map()[%arg2]
%1 = affine.apply #map()[%arg3]
%subview = memref.subview %arg0[%0, %1] [1, 1] [2, 2] : memref<10x10xf32> to memref<f32, strided<[], offset: ?>>
%subview_0 = memref.subview %arg1[%arg2, %arg3] [1, 1] [1, 1] : memref<5x5xf32> to memref<f32, strided<[], offset: ?>>
%alloc_1 = memref.alloc() : memref<f32>
linalg.generic {indexing_maps = [#map1, #map1, #map1], iterator_types = []} ins(%subview, %subview_0 : memref<f32, strided<[], offset: ?>>, memref<f32, strided<[], offset: ?>>) outs(%alloc_1 : memref<f32>) {
^bb0(%in: f32, %in_3: f32, %out: f32):
%2 = arith.addf %in, %in_3 : f32
linalg.yield %2 : f32
}
%subview_2 = memref.subview %alloc[%arg2, %arg3] [1, 1] [1, 1] : memref<5x5xf32> to memref<f32, strided<[], offset: ?>>
memref.copy %alloc_1, %subview_2 : memref<f32> to memref<f32, strided<[], offset: ?>>
}
}
return %alloc : memref<5x5xf32>
}
}
```
Commit: 8b0f47bfa4b6aa1bafa10261444c93aba5a2d31d
https://github.com/llvm/llvm-project/commit/8b0f47bfa4b6aa1bafa10261444c93aba5a2d31d
Author: Derek Schuff <dschuff at chromium.org>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M lld/test/wasm/build-id.test
M lld/test/wasm/merge-string-debug.s
M lld/test/wasm/startstop.ll
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/test/tools/llvm-objdump/wasm/executable-without-symbols-debugnames.test
M llvm/test/tools/llvm-objdump/wasm/executable-without-symbols.test
M llvm/test/tools/llvm-objdump/wasm/no-codesec.test
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[Object][Wasm] Use file offset for section addresses in linked wasm files (#80529)
Wasm has no unified virtual memory space as other object formats and
architectures do, so previously WasmObjectFile reported 0 for all
section addresses, and until 428cf71ff used section offsets for function
symbols. Now we use file offsets for function symbols, and this change
switches section addresses to do the same (in linked files). The main
result of this is that objdump now reports VMAs in section listings, and
also uses file offets rather than section offsets when disassembling
linked binaries (matching the behavior of other disassemblers and stack
traces produced by browwsers). To make this work, this PR also updates
objdump's generation of synthetics fallback symbols to match lib/Object
and also correctly plumbs symbol types for regular and dummy symbols
through to the backend to avoid needing special knowledge of address 0.
This also paves the way for generating symbols from name sections rather
than symbol tables or imports (see #76107) by allowing the
disassembler's synthetic fallback symbols match the name-section
generated symbols (in a followup PR).
Commit: caf537ea493a7583bbc369c6a692842819daee74
https://github.com/llvm/llvm-project/commit/caf537ea493a7583bbc369c6a692842819daee74
Author: Stephen Tozer <Stephen.Tozer at Sony.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
M llvm/test/Transforms/SpeculativeExecution/PR46267.ll
Log Message:
-----------
Reapply "[RemoveDIs][DebugInfo] Hoist DPValues in SpeculativeExecution (#80886)"
Reapply the original commit, 0aacd44, which had a missing brace resulting in
an error in compilation.
This reverts commit c76b0eb898d1e5edc416b658a6902163d64db1ce.
Commit: 9f6c00565a82fc375d415804d54da1113f719b17
https://github.com/llvm/llvm-project/commit/9f6c00565a82fc375d415804d54da1113f719b17
Author: Kolya Panchenko <87679760+nikolaypanchenko at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
A mlir/include/mlir/Dialect/LLVMIR/VCIXDialect.h
A mlir/include/mlir/Dialect/LLVMIR/VCIXOps.td
M mlir/include/mlir/Target/LLVMIR/Dialect/All.h
A mlir/include/mlir/Target/LLVMIR/Dialect/VCIX/VCIXToLLVMIRTranslation.h
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
A mlir/lib/Dialect/LLVMIR/IR/VCIXDialect.cpp
M mlir/lib/Target/LLVMIR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
A mlir/lib/Target/LLVMIR/Dialect/VCIX/CMakeLists.txt
A mlir/lib/Target/LLVMIR/Dialect/VCIX/VCIXToLLVMIRTranslation.cpp
A mlir/test/Conversion/MathToVCIX/math-to-vcix.mlir
A mlir/test/Target/LLVMIR/vcix-rv32.mlir
A mlir/test/Target/LLVMIR/vcix-rv64.mlir
M mlir/test/lib/Conversion/CMakeLists.txt
A mlir/test/lib/Conversion/MathToVCIX/CMakeLists.txt
A mlir/test/lib/Conversion/MathToVCIX/TestMathToVCIXConversion.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[MLIR][VCIX] Support VCIX intrinsics in LLVMIR dialect (#75875)
The changeset extends LLVMIR intrinsics with VCIX intrinsics.
The VCIX intrinsics allow MLIR users to interact with RISC-V
co-processors that are compatible with `XSfvcp` extension
Source:
https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software
Commit: 7a9b0e4acb3b5ee15f8eb138aad937cfa4763fb8
https://github.com/llvm/llvm-project/commit/7a9b0e4acb3b5ee15f8eb138aad937cfa4763fb8
Author: Xing Xue <xingxue at outlook.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M openmp/runtime/src/kmp.h
M openmp/runtime/test/tasking/bug_nested_proxy_task.c
M openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
M openmp/runtime/test/tasking/hidden_helper_task/common.h
Log Message:
-----------
[OpenMP][test]Flip bit-fields in 'struct flags' for big-endian in test cases (#79895)
This patch flips bit-fields in `struct flags` for big-endian in test
cases to be consistent with the definition of the structure in libomp
`kmp.h`.
Commit: 369b82218419a0218400e7483255523b8dfd6cf0
https://github.com/llvm/llvm-project/commit/369b82218419a0218400e7483255523b8dfd6cf0
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRDialect.h
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Dialect/FIRDialect.cpp
M flang/tools/bbc/bbc.cpp
M flang/tools/fir-opt/fir-opt.cpp
M flang/tools/tco/tco.cpp
Log Message:
-----------
[flang] Introducing a method to dynamically and conditionally register dialect interfaces. (#80881)
This change introduces the `addFIRExtensions` method to dynamically and
conditionally register dialect interfaces. As a use case of
`addFIRExtensions`, this change moves the static registration of
`FIRInlinerInterface` out of the constructor of `FIROpsDialect` to be
dynamically registered while loading the necessary MLIR dialects
required by Flang. This registration of `FIRInlinerInterface` is also
guarded by a boolean `addFIRInlinerInterface` which defaults to true.
---------
Co-authored-by: Vijay Kandiah <vkandiah at nvidia.com>
Commit: c95693c74601521463e12ff358fed6fb9ee736b9
https://github.com/llvm/llvm-project/commit/c95693c74601521463e12ff358fed6fb9ee736b9
Author: Pranav Kant <prka at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[NFC][AMDGPU] Fix unused-variable warning (#81040)
This is only used in assert statement.
Commit: bb3ea6c810ccdffd176589e608bfa79dd25268ff
https://github.com/llvm/llvm-project/commit/bb3ea6c810ccdffd176589e608bfa79dd25268ff
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
Log Message:
-----------
[MemProf] Switch to DenseMap for performance (NFC) (#81035)
Some profiling showed that the accesses to this map during bitcode
reading was incurring over 10% of the time in a large thin link. There
is no need for it to be std::map, and I measured around 8.5% time
reduction in the same thin link from switching to DenseMap.
Commit: b1ac052ab07ea091c90c2b7c89445b2bfcfa42ab
https://github.com/llvm/llvm-project/commit/b1ac052ab07ea091c90c2b7c89445b2bfcfa42ab
Author: Arnold Schwaighofer <aschwaighofer at apple.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/test/Transforms/Coroutines/coro-async-addr-lifetime-infinite-loop-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-addr-lifetime-start-bug.ll
M llvm/test/Transforms/Coroutines/coro-async-dyn-align.ll
A llvm/test/Transforms/Coroutines/coro-async-mutal-recursive.ll
M llvm/test/Transforms/Coroutines/coro-async-unreachable.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/Coroutines/swift-async-dbg.ll
Log Message:
-----------
[Coro] [async] Disable inlining in async coroutine splitting (#80904)
The call to the inlining utility does not update the call graph. Leading
to assertion failures when calling the call graph utility to update the
call graph.
Instead rely on an inline pass to run after coro splitting and use
alwaysinline annotations.
github.com/apple/swift/issues/68708
Commit: d05bd34a1814f7b60265207b1b805572f79aca6d
https://github.com/llvm/llvm-project/commit/d05bd34a1814f7b60265207b1b805572f79aca6d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/lib/CodeGen/MachinePassManager.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
Log Message:
-----------
[NFC][NewPM/Codegen] Remove unused parameter from verifyMachineFunction
The MachineFunctionAnalysisManager forward declaration is messing with upcoming changes.
Commit: 50ffc53e4708f3484939ef82e7b0309600a8e19f
https://github.com/llvm/llvm-project/commit/50ffc53e4708f3484939ef82e7b0309600a8e19f
Author: jimingham <jingham at apple.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M lldb/source/Plugins/SymbolVendor/MacOSX/SymbolVendorMacOSX.cpp
Log Message:
-----------
Don't search for separate debug files for mach-o object files (#81041)
mach-o object files never have separate debug info, and in a big app
there can be quite a large number of object files, so even a few stats
per object file can slow launches considerably.
This patch avoids this search for Mach-o symbol files of object type.
I don't have a way to test this, the only effect is that you didn't do a
bunch of stats that weren't going to do any good anyway.
Commit: 514686acfda66401869f9599954d731619c12c99
https://github.com/llvm/llvm-project/commit/514686acfda66401869f9599954d731619c12c99
Author: Visoiu Mistrih Francis <890283+francisvm at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
A llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir
M llvm/test/CodeGen/RISCV/zcmp-cm-push-pop.mir
Log Message:
-----------
[RISCV] Add correct Uses, Defs, isReturn to Zcmp (#81039)
* they all do stack adjustments, so they all use and def x2.
* popret and popretz also return
* popretz also defines x10
This adds that to the TD file and updates the PushPopOptimizer to
preserve the extra implicit operands added during frame lowering when
converting to popret(z).
Commit: d6c2cbbc6513bd412b34f3bf70e21b5a363b2fd9
https://github.com/llvm/llvm-project/commit/d6c2cbbc6513bd412b34f3bf70e21b5a363b2fd9
Author: Yi Kong <yikong at google.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/utils/UpdateTestChecks/common.py
Log Message:
-----------
Fix test failure if CLANG_VENDOR contains spaces (#81017)
Commit: ff8c865838b46d0202963b816fbed50aaf96a7f4
https://github.com/llvm/llvm-project/commit/ff8c865838b46d0202963b816fbed50aaf96a7f4
Author: Daniel Hoekwater <hoekwater at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/fbasic-block-sections.c
Log Message:
-----------
[Driver] Allow -fbasic-block-sections for AArch64 ELF (#80916)
Basic block sections "all" doesn't work on AArch64 since branch
relaxation may create new basic blocks. However, the other basic
block section modes should work out of the box since machine function
splitting already uses the basic block sections pass.
Commit: 43badc0a9644d032fe0176410fabda6ac1fddf19
https://github.com/llvm/llvm-project/commit/43badc0a9644d032fe0176410fabda6ac1fddf19
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineModuleInfo.h
Log Message:
-----------
[NewPM/CodeGen] Move MachineModuleInfo::invalidate() to MachineModuleAnalysis::Result
Missed in #80937 since it's not currently being used.
Commit: 78b9dd6b206a151fe09b56fcb157f38321b84340
https://github.com/llvm/llvm-project/commit/78b9dd6b206a151fe09b56fcb157f38321b84340
Author: quanwanandy <150498259+quanwanandy at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
Fix Bazel build (#81064)
Commit: 4520b478d2512b0f39764e0464dcb4cb961845b5
https://github.com/llvm/llvm-project/commit/4520b478d2512b0f39764e0464dcb4cb961845b5
Author: YunQiang Su <syq at debian.org>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M libunwind/CMakeLists.txt
Log Message:
-----------
MIPS/libunwind: Use -mfp64 if compiler is FPXX (#68521)
Libunwind supports FP64 and FP32 modes, but not FPXX. The reason is
that, FP64 and FP32 have different way to save/restore FPRs. If
libunwind is built as FPXX, we have no idea which one should we use.
It's not due to the code bug, but rather the nature of FPXX.
FPXX is an ABI which uses only a common subset of FR=1(FP64) and FR=0
(FP32).
So that FPXX binaries can link with both FP64 and FP32 ones, aka.
FPXX + FP32 -> FP32
FPXX + FP64 -> FP64
While for libunwind, we should save/restore all of FPRs. If we use FPXX,
we can only save/restore a common subset of FPRs, instead of superset.
If libunwind is built as FP64, it will interoperatable with FPXX/FP64
APPs, and if it is built as FP32, it will interoperatable with
FP32/FPXX. Currently most of O32 APPs are FPXX or FP64, while few are
FP32.
So if the compiler is FPXX, which is the default value of most
toolchain, let's switch it to FP64.
Co-authored-by: YunQiang Su <yunqiang.su at cipunited.com>
Commit: 0d7f232baf6103529844c8977324bd45b21ad923
https://github.com/llvm/llvm-project/commit/0d7f232baf6103529844c8977324bd45b21ad923
Author: dhruvachak <Dhruva.Chakrabarti at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M openmp/libomptarget/include/OpenMP/OMPT/Interface.h
M openmp/libomptarget/src/LegacyAPI.cpp
M openmp/libomptarget/src/OpenMP/API.cpp
M openmp/libomptarget/src/OpenMP/OMPT/Callback.cpp
M openmp/libomptarget/src/device.cpp
M openmp/libomptarget/src/interface.cpp
M openmp/libomptarget/test/ompt/callbacks.h
A openmp/libomptarget/test/ompt/target_memcpy.c
M openmp/libomptarget/test/ompt/veccopy.c
M openmp/libomptarget/test/ompt/veccopy_data.c
M openmp/libomptarget/test/ompt/veccopy_emi.c
Log Message:
-----------
[libomptarget] [OMPT] Fixed return address computation for OMPT events. (#80498)
Currently, __builtin_return_address is used to generate the return
address when the callback invoker is created. However, this may result
in the return address pointing to an internal runtime function. This is
not what a tool would typically want. A tool would want to know the
corresponding user code from where the runtime entry point is invoked.
This change adds a thread local variable that is assigned the return
address at the OpenMP runtime entry points. An RAII is used to manage
the modifications to the thread local variable. Whenever the return
address is required for OMPT events, it is read from the thread local
variable.
Commit: ece66dbc60971cf43a96f63e05c5a507feae3854
https://github.com/llvm/llvm-project/commit/ece66dbc60971cf43a96f63e05c5a507feae3854
Author: Luke Lau <luke at igalia.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
Log Message:
-----------
[SelectionDAG] Add computeKnownBits support for ISD::STEP_VECTOR (#80452)
This handles two cases where we can work out some known-zero bits for
ISD::STEP_VECTOR.
The first case handles when we know the low bits are zero because the
step
amount is a power of two. This is taken from
https://reviews.llvm.org/D128159,
and even though the original patch didn't end up landing this case due
to it
not having any test difference, I've included it here for completeness's
sake.
The second case handles the case when we have an upper bound on
vscale_range.
We can use this to work out the upper bound on the number of elements,
and thus
what the maximum step will be. From the maximum step we then know which
hi bits
are zero.
On its own, computing the known hi bits results in some small
improvements for
RVV with -mrvv-vector-bits=zvl across the llvm-test-suite. However I'm
hoping
to be able to use this later to reduce the LMUL in index calculations
for
vrgather/indexed accesses.
---------
Co-authored-by: Philip Reames <preames at rivosinc.com>
Commit: 2df42fe0efd92a89ae191a598e2727c7b63de80b
https://github.com/llvm/llvm-project/commit/2df42fe0efd92a89ae191a598e2727c7b63de80b
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M lldb/docs/lldb-gdb-remote.txt
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb] [NFC] Remove min pkt size for compression setting (#81075)
debugserver will not compress small packets; the overhead of the
compression header makes this useful for larger packets. I default to
384 bytes in debugserver, and added an option for lldb to request a
different cutoff. This option has never been used in lldb in the past
nine years, so I don't think there's any point to keeping it around.
Commit: 7da1dda01eff708decbbb0b4cd52b2b95d89ea2a
https://github.com/llvm/llvm-project/commit/7da1dda01eff708decbbb0b4cd52b2b95d89ea2a
Author: David Green <david.green at arm.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/arm64-fminv.ll
M llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-vaddv.ll
Log Message:
-----------
[AArch64][GlobalISel] Update GISel check line and regenerate tests. NFC
Commit: 567d304e5344dfb408f2453390886fc229c09481
https://github.com/llvm/llvm-project/commit/567d304e5344dfb408f2453390886fc229c09481
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/utils/TableGen/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[TableGen][NFC] Replace hardcoded opcode numbering. (#81065)
This patch uses the recently introduced CodeGenTarget::getInstrIntValue
to replace hardcoded opcode enum value numbering in a few places.
Commit: 5c4a630ab70f98138d6f95d19712bb114d92323d
https://github.com/llvm/llvm-project/commit/5c4a630ab70f98138d6f95d19712bb114d92323d
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
Log Message:
-----------
[LLD][ELF] Silence warning when building with latest MSVC
This fixes:
```
[193/3517] Building CXX object
tools\lld\ELF\CMakeFiles\lldELF.dir\Arch\LoongArch.cpp.obj
C:\git\llvm-project\lld\ELF\Arch\LoongArch.cpp(683): warning C4334:
'<<': result of 32-bit shift implicitly converted to 64 bits (was 64-bit
shift intended?
```
Commit: d01864eb2f21d56cf432da7d80c505f510533c46
https://github.com/llvm/llvm-project/commit/d01864eb2f21d56cf432da7d80c505f510533c46
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/utils/TableGen/CodeGenInstruction.h
M llvm/utils/TableGen/CodeGenTarget.cpp
M llvm/utils/TableGen/CodeGenTarget.h
Log Message:
-----------
[TableGen] Remove map CodeGenTarget::InstrToIntMap. (#81079)
This patch removes CodeGenTarget::InstrToIntMap, using instead a new
member CodeGenInstruction::EnumVal to store each enum value. This value
is computed and set by CodeGenTarget::computeInstrsByEnum and queried by
CodeGenTarget::getInstrIntValue.
Commit: 05091aa3ac53a13d08c78882c0c2035e58a1b4c4
https://github.com/llvm/llvm-project/commit/05091aa3ac53a13d08c78882c0c2035e58a1b4c4
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[NFC][InstrProf]Generalize getParsedIRPGOFuncName to getParsedIRPGOName (#81054)
- Function getParsedIRPGOFuncName splits name by delimiter. The `[filename;]mangled-name` format could be generalized for non-function global values (e.g., vtables for type profiling). So rename the
function.
- Use kGlobalIdentifierDelimiter rather than semicolon directly for defragmentation.
Commit: d033799050b7bda70d80a933d5d99b7088a72a95
https://github.com/llvm/llvm-project/commit/d033799050b7bda70d80a933d5d99b7088a72a95
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Add Leave to AlwaysBreakTemplateDeclarations (#80569)
Closes #78067.
Commit: 351f94d981f363909ae6e76ed57cd0a75c3f5688
https://github.com/llvm/llvm-project/commit/351f94d981f363909ae6e76ed57cd0a75c3f5688
Author: Rageking8 <106309953+Rageking8 at users.noreply.github.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[clang][NFC] resolve redundant predicates (#79701)
Fixes #79686
Commit: 8f6e13e6da84510c8321717860fd506e12118514
https://github.com/llvm/llvm-project/commit/8f6e13e6da84510c8321717860fd506e12118514
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/test/Format/dump-config-objc-stdin.m
M clang/test/Format/verbose.cpp
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
[clang-format] Fix a regression in dumping the config (#80628)
Commit d813af73f70f addressed a regression introduced by commit
3791b3fca6ea
but caused `clang-format -dump-config` to "hang".
This patch reverts changes to ClangFormat.cpp by both commits and
reworks the cleanup.
Fixes #80621.
Commit: c8ca98a2a9796797f2eab00cc6516610c133633a
https://github.com/llvm/llvm-project/commit/c8ca98a2a9796797f2eab00cc6516610c133633a
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
Log Message:
-----------
[InstCombine] Handle IsInf/IsZero idioms (#80607)
This patch does the following folds:
```
icmp eq/ne (bitcast X to int), (bitcast +/-inf to int) -> llvm.is.fpclass(X, (~)fcPosInf/fcNegInf)
icmp eq/ne (bitcast X to int), (bitcast +0/-0 to int) -> llvm.is.fpclass(X, (~)fcPosZero/fcNegZero)
```
Alive2: https://alive2.llvm.org/ce/z/JJmEE9
Commit: e17dded8d712fb13c30fd88f7810edaa0ee3e60d
https://github.com/llvm/llvm-project/commit/e17dded8d712fb13c30fd88f7810edaa0ee3e60d
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstSimplify/logic-of-fcmps.ll
Log Message:
-----------
[InstSimplify] Generalize `simplifyAndOrOfFCmps` (#81027)
This patch generalizes `simplifyAndOrOfFCmps` to simplify patterns like:
```
define i1 @src(float %x, float %y) {
%or.cond.i = fcmp ord float %x, 0.000000e+00
%cmp.i.i34 = fcmp olt float %x, %y
%cmp.i2.sink.i = and i1 %or.cond.i, %cmp.i.i34
ret i1 %cmp.i2.sink.i
}
define i1 @tgt(float %x, float %y) {
%cmp.i.i34 = fcmp olt float %x, %y
ret i1 %cmp.i.i34
}
```
Alive2: https://alive2.llvm.org/ce/z/9rydcx
This patch and #80986 will fix the regression introduced by #80941.
See also the IR diff
https://github.com/dtcxzyw/llvm-opt-benchmark/pull/199#discussion_r1480974120.
Commit: 9ff3b82948c90c54f2f6ec20798c529cb93fab3b
https://github.com/llvm/llvm-project/commit/9ff3b82948c90c54f2f6ec20798c529cb93fab3b
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/include/llvm/Support/AMDGPUMetadata.h
M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
Log Message:
-----------
[AMDGPU] Revert Metadata Version Upgrade (#80995)
Metadata is still 1.2, not 1.3 after V6.
I thought that amdhsa.version mapped to the COV version but it's
separate, and there are no MD changes in V6, hence it doesn't need to be
updated.
Commit: a446c9bf69b4797da329977366ca62e55a429a90
https://github.com/llvm/llvm-project/commit/a446c9bf69b4797da329977366ca62e55a429a90
Author: martinboehme <mboehme at google.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang][dataflow] Add support for `CXXRewrittenBinaryOperator`. (#81086)
This occurs in rewritten candidates for binary operators (a C++20
feature).
The patch modifies UncheckedOptionalAccessModelTest to run in C++20 mode
(as
well as C++17 mode, as before) and to use rewritten candidates. The
modified
test fails without the newly added support for
`CXXRewrittenBinaryOperator`.
Commit: a24b0c351a75a87410203dd3777c0d8ee87f65c1
https://github.com/llvm/llvm-project/commit/a24b0c351a75a87410203dd3777c0d8ee87f65c1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
clang/AMDGPU: Regenerate test checks in hip header tests
Commit: decbd29f9e9be50756a083cd677f7fea22cd3c91
https://github.com/llvm/llvm-project/commit/decbd29f9e9be50756a083cd677f7fea22cd3c91
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
Log Message:
-----------
Reapply "InstCombine: Introduce SimplifyDemandedUseFPClass"" (#74056)
This reverts commit ef388334ee5a3584255b9ef5b3fefdb244fa3fd7.
The referenced issue violates the spec for finite-only math only by
using a return value for a constant infinity. If the interpretation
is results and arguments cannot violate nofpclass, then any
std::numeric_limits<T>::infinity() result is invalid under
-ffinite-math-only. Without this interpretation the utility of
nofpclass is slashed.
Commit: 35d6ae8110e082e9a4704416dfbe83d5a3b16ed1
https://github.com/llvm/llvm-project/commit/35d6ae8110e082e9a4704416dfbe83d5a3b16ed1
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/or.ll
Log Message:
-----------
[InstCombine] Handle multi-use in simplifyAndOrWithOpReplaced() (#81006)
Slightly generalize simplifyAndOrWithOpReplaced() by allowing it to
perform simplifications (without creating new instructions) in multi-use
cases. This way we can remove existing patterns without worrying about
multi-use edge cases.
I've opted to change the general way the implementation works to be more
similar to the standard simplifyWithOpReplaced(). We perform the operand
replacement generically, and then try to simplify the result or create a
new instruction if we're allowed to do so.
Commit: 7c0d52ca91d32e693ca245fb82f2402a34212fc3
https://github.com/llvm/llvm-project/commit/7c0d52ca91d32e693ca245fb82f2402a34212fc3
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Analysis/DomConditionCache.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
Log Message:
-----------
[ValueTracking] Support dominating known bits condition in and/or (#74728)
This extends computeKnownBits() support for dominating conditions to
also handle and/or conditions. We'll look through either and or or
depending on which edge we're considering.
This change is mainly for the sake of completeness, so we don't start
missing optimizations if SimplifyCFG decides to merge some branches.
Commit: 7ec6e7351458924946e9afaadf9788cb233095b9
https://github.com/llvm/llvm-project/commit/7ec6e7351458924946e9afaadf9788cb233095b9
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
Log Message:
-----------
[DAG] Fix typos in comments; NFC
Commit: dd9511d3e46094ec15282bce6eba163fed2226a4
https://github.com/llvm/llvm-project/commit/dd9511d3e46094ec15282bce6eba163fed2226a4
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/test/AST/Interp/builtin-functions.cpp
Log Message:
-----------
[clang][Interp][NFC] Convert test case to verify=expected,both style
Commit: ef05b4b520ee342db6a3d6c5607f8e8729246316
https://github.com/llvm/llvm-project/commit/ef05b4b520ee342db6a3d6c5607f8e8729246316
Author: David Green <david.green at arm.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/test/Analysis/BasicAA/vscale.ll
Log Message:
-----------
[BasicAA] More vscale tests. NFC
This time with i8 geps and scale intrinsics, along with mutiple vscale
intrinsics that can be treated as identical.
Commit: 9ac82f0d3ecf6c13669b0c7940920460c037a292
https://github.com/llvm/llvm-project/commit/9ac82f0d3ecf6c13669b0c7940920460c037a292
Author: Martin Storsjö <martin at martin.st>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M openmp/cmake/OpenMPTesting.cmake
Log Message:
-----------
[OpenMP] [cmake] In standalone mode, make Python3_EXECUTABLE available (#80828)
When running the tests, we try to invoke them as
"${Python3_EXECUTABLE} ${OPENMP_LLVM_LIT_EXECUTABLE}", but when running
"find_package(Python3)" within the function
"find_standalone_test_dependencies", the variable "Python3_EXECUTABLE"
only gets set within the function scope.
Tests have worked regardless of this in many cases, where executing the
python script directly succeeds. But for consistency, and for working in
cases when the python script can't be executed as such, make the
Python3_EXECUTABLE variable available as intended.
Commit: 49ee2ffc65b7660bfe84cd842e083d6c0ee3e991
https://github.com/llvm/llvm-project/commit/49ee2ffc65b7660bfe84cd842e083d6c0ee3e991
Author: Evgeniy <evgeniy.tyurin at intel.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
R llvm/test/CodeGen/X86/GlobalISel/br.ll
R llvm/test/CodeGen/X86/GlobalISel/brcond.ll
R llvm/test/CodeGen/X86/fast-isel-cmp-branch2.ll
R llvm/test/CodeGen/X86/fast-isel-cmp-branch3.ll
A llvm/test/CodeGen/X86/isel-br.ll
A llvm/test/CodeGen/X86/isel-brcond-fcmp.ll
A llvm/test/CodeGen/X86/isel-brcond-icmp.ll
Log Message:
-----------
[X86][GlobalISel] Reorganize br/brcond tests (NFC) (#80204)
Removing duplicating tests under GlobalISel, consolidating to perform
checks with all three selectors.
Commit: b85fe40cb88a6b4f640c2b757bd0d254ff1d032c
https://github.com/llvm/llvm-project/commit/b85fe40cb88a6b4f640c2b757bd0d254ff1d032c
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/Analysis/Inputs/std-c-library-functions-POSIX.h
M clang/test/Analysis/std-c-library-functions-POSIX.c
M clang/test/Analysis/std-c-library-functions.c
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream-noopen.c
M clang/test/Analysis/stream.c
Log Message:
-----------
[clang][analyzer] Add missing stream related functions to StdLibraryFunctionsChecker. (#76979)
Some stream functions were recently added to `StreamChecker` that were
not modeled by `StdCLibraryFunctionsChecker`. To ensure consistency
these functions are added to the other checker too.
Some of the related tests are re-organized.
Commit: 8f2378d7fcf19ea00fbd3366c2125569ef084f93
https://github.com/llvm/llvm-project/commit/8f2378d7fcf19ea00fbd3366c2125569ef084f93
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
Log Message:
-----------
[mlir][EmitC] Add builders for call_opaque op (#80879)
This allows to omit the default valued attributes and therefore write
more compact code.
Commit: 1a42b3804f0ed1c4958c4f17216543a1623e3452
https://github.com/llvm/llvm-project/commit/1a42b3804f0ed1c4958c4f17216543a1623e3452
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/IR/BasicBlock.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs] Erase ranges of instructions individually (#81007)
The BasicBlock::erase method simply removes a range of instructions from
the instlist by unlinking them. However, now that we're attaching
debug-info directly to instructions, some cleanup is required, so use
eraseFromParent on each instruction instead.
This is less efficient, but rare, and seemingly only WASM EH Prepare
uses this method of BasicBlock. Detected via a memory leak check in
asan.
(asan is always the final boss for whatever I do).
Commit: faa2f9658a0cd276f3415fad2676f8d90df51268
https://github.com/llvm/llvm-project/commit/faa2f9658a0cd276f3415fad2676f8d90df51268
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
A llvm/test/DebugInfo/X86/dont-drop-dbg-assigns-in-isels.ll
Log Message:
-----------
[DebugInfo] Handle dbg.assigns in FastISel (#80734)
There are some rare circumstances where dbg.assign intrinsics can reach
FastISel. They are a more specialised kind of dbg.value intrinsic with
more information about the originating alloca. They only occur during
optimisation, but might reach FastISel through always_inlining an
optimised function into an optnone function.
This is a slight problem as it's not safe (for debug-info accuracy) to
ignore any intrinsics, and for RemoveDIs (the intrinsic-replacement
project) it causes a crash through an unhandled switch case. To get
around this, we can just treat the dbg.assign as a dbg.value (it's an
actual subclass) and use the variable location information from the
dbg.value fields. This loses a small amount of debug-info about stack
locations, but is more accurate than just ignoring the intrinsic.
(This has popped up deep in an LTO build of a large codebase while
testing RemoveDIs, I figured it'd be good to fix it for the
intrinsic-form at the same time, just to demonstrate the correct
behaviour).
Commit: 878234b3202c9fe343cd59c71b50c4c4c5dc1b8c
https://github.com/llvm/llvm-project/commit/878234b3202c9fe343cd59c71b50c4c4c5dc1b8c
Author: David Green <david.green at arm.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/test/Analysis/BasicAA/vscale.ll
Log Message:
-----------
[BasicAA] Scalable offset with scalable typesize. (#80818)
This patch adds a simple alias analysis check for accesses that are scalable
with a offset between them that is also trivially scalable (there are no other
constant/variable offsets). We essentially divide each side by vscale and are
left needing to check that the offset >= typesize.
Commit: 455c3966cd7305b40d6941b544a16c22120b4512
https://github.com/llvm/llvm-project/commit/455c3966cd7305b40d6941b544a16c22120b4512
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[RISCV][test] Add test coverage for RISCVInstrInfo::isCopyInstrImpl
Commit: d7fb94b6daa643a764e9a756bc544f26c248dafd
https://github.com/llvm/llvm-project/commit/d7fb94b6daa643a764e9a756bc544f26c248dafd
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M lldb/include/lldb/DataFormatters/TypeSynthetic.h
M lldb/include/lldb/DataFormatters/VectorIterator.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Core/ValueObjectSyntheticFilter.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/Language/CPlusPlus/Coroutines.cpp
M lldb/source/Plugins/Language/CPlusPlus/Coroutines.h
M lldb/source/Plugins/Language/CPlusPlus/GenericBitset.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericOptional.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
M lldb/source/Plugins/Language/CPlusPlus/LibCxxAtomic.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxInitializerList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxList.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxQueue.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxRangesRefView.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxSpan.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxTuple.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxUnorderedMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVariant.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcppTuple.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcppUniquePointer.cpp
M lldb/source/Plugins/Language/ObjC/Cocoa.cpp
M lldb/source/Plugins/Language/ObjC/NSArray.cpp
M lldb/source/Plugins/Language/ObjC/NSDictionary.cpp
M lldb/source/Plugins/Language/ObjC/NSError.cpp
M lldb/source/Plugins/Language/ObjC/NSException.cpp
M lldb/source/Plugins/Language/ObjC/NSIndexPath.cpp
M lldb/source/Plugins/Language/ObjC/NSSet.cpp
Log Message:
-----------
[lldb][TypeSynthetic][NFC] Make SyntheticChildrenFrontend::Update() return an enum (#80167)
This patch changes the return value of
`SyntheticChildrenFrontend::Update` to a scoped enum that aims to
describe what the return value means.
Commit: b35c5197629494cb675948fe33d2fdcd75b5aafa
https://github.com/llvm/llvm-project/commit/b35c5197629494cb675948fe33d2fdcd75b5aafa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] tryToFoldExtendOfConstant - share the same SDLoc argument instead of recreating it over and over again.
Commit: a643ab852a63a14dba86e031247734c5e3d5adb9
https://github.com/llvm/llvm-project/commit/a643ab852a63a14dba86e031247734c5e3d5adb9
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/DebugInfo/Generic/assignment-tracking/codegenprepare/sunk-addr.ll
M llvm/test/Transforms/GlobalOpt/localize-constexpr-debuginfo.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs] Final omnibus test fixing for RemoveDIs (#81125)
With this, I get a clean test suite running under RemoveDIs, the
non-intrinsic representation of debug-info, including under asan. We've
previously established that we generate identical binaries for some
large projects, so this i just edge-case cleanup. The changes:
* CodeGenPrepare fixups need to apply to dbg.assigns as well as
dbg.values (a dbg.assign is a dbg.value).
* Pin a test for constant-deletion to intrinsic debug-info: this very
rare scenario uses a different kill-location sigil in dbg.value mode to
RemoveDIs mode, which generates spurious test differences.
* Suppress a memory leak in a unit test: the code for dealing with
trailing debug-info in a block is necessarily fiddly, leading to this
leak when testing it. Developer-facing interfaces for moving
instructions around always deal with this behind the scenes.
* SROA, when replacing some vector-loads, needs to insert the
replacement loads ahead of any debug-info records so that their values
remain dominated by a definition. Set the head-bit indicating our
insertion should come before debug-info.
Commit: 7d4733a267cafa2109dc43b151dbae5716f372e4
https://github.com/llvm/llvm-project/commit/7d4733a267cafa2109dc43b151dbae5716f372e4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerBUILD_VECTOR - share the same SDLoc argument instead of recreating it over and over again.
Commit: 8e707f8444692762b35fde3e94bbcb02686272a5
https://github.com/llvm/llvm-project/commit/8e707f8444692762b35fde3e94bbcb02686272a5
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M flang/test/Lower/target-features-amdgcn.f90
M flang/test/Lower/target-features-x86_64.f90
Log Message:
-----------
[Flang][Lower] NFC: Update target-features/target-cpu tests (#80984)
Previously, some of these lowering tests inadvertently relied on a
default triple not introducing any target features. This caused failures
when compiling on a ppc64le-linux-unknown-gnu system.
This patch updates these lowering tests to always explicitly set the
target triple and check that the -target-cpu and -target-features
compiler options are processed as expected.
Commit: 42902d22d1272c1bc10132b06be2d5251b17f225
https://github.com/llvm/llvm-project/commit/42902d22d1272c1bc10132b06be2d5251b17f225
Author: Zain Jaffal <zain at jjaffal.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
A llvm/test/Transforms/InstCombine/fdiv-sqrt.ll
Log Message:
-----------
[InstCombine] Add tests for x / sqrt(y / z) with fast-math
Commit: e50189b0fdf382e3e0d5fc5e58fe81a78d0de7c8
https://github.com/llvm/llvm-project/commit/e50189b0fdf382e3e0d5fc5e58fe81a78d0de7c8
Author: Zain Jaffal <zain at jjaffal.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/fdiv-sqrt.ll
Log Message:
-----------
[InstCombine] Add additional tests for fdiv-sqrt
Add more tests where some of the instructions have missing flags.
Commit: 4b72c5e8277f8688f7ce0bc953f9f3ea54420358
https://github.com/llvm/llvm-project/commit/4b72c5e8277f8688f7ce0bc953f9f3ea54420358
Author: whisperity <whisperity at gmail.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/test/Sema/conversion-64-32.c
A clang/test/Sema/conversion-implicit-int-includes-64-to-32.c
Log Message:
-----------
[clang][Sema] Subclass `-Wshorten-64-to-32` under `-Wimplicit-int-conversion` (#80814)
Although "implicit int conversions" is supposed to be a superset
containing the more specific "64-to-32" case, previously they were a
disjoint set, only enabled in common in the much larger `-Wconversion`.
Commit: 448fe73428a810eb67617e07c23510033a21de5a
https://github.com/llvm/llvm-project/commit/448fe73428a810eb67617e07c23510033a21de5a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[X86] Add X86::getVectorRegisterWidth helper. NFC.
Replaces internal helper used by addConstantComments to allow reuse in a future patch.
Commit: 6ea76c1328e04799981c78b3661a175a2ba47cec
https://github.com/llvm/llvm-project/commit/6ea76c1328e04799981c78b3661a175a2ba47cec
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[NFCI][RemoveDIs] Build LLVM with RemoveDIs iterators
This commit flips a bit to make LLVM build with "debuginfo iterators",
causing BasicBlock::iterator to contain a bit that's used for debug-info
purposes. More about this can be read on Discourse [0], but the runtime
impact of this should be negligable (iterators usually end up being
inlined), and there should be no change to LLVMs behaviour as a result of
this commit.
What this does mean though, is that roughly 400 debug-info tests where
we've added "--try-experimental-debuginfo-iterators" to RUNlines are going
to start operating in RemoveDIs mode. These are already tested on the
new-debug-iterators buildbot [1], and I've even tested with asan, so I'm
not _expecting_ any turbulence.
[0] https://discourse.llvm.org/t/rfc-instruction-api-changes-needed-to-eliminate-debug-intrinsics-from-ir/68939
[1] https://lab.llvm.org/buildbot/#/builders/275
Commit: ec1fcb381d884ca53e2e0dd4075f946c8f002de2
https://github.com/llvm/llvm-project/commit/ec1fcb381d884ca53e2e0dd4075f946c8f002de2
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[Flang][bbc] Prevent bbc -emit-fir command invoking OpenMP passes twice (#80927)
Currently when the bbc tool is invoked with the emit-fir command the pass pipeline will be invoked twice for verification causing the previously added OpenMP pass pipeline to be invoked multiple times.
This change seeks to prevent that from occurring by using a seperate pass manager and run command immediately when it is necessary for the OpenMP passes to be executed.
Commit: 72f04fa0734f8559ad515f507a4a3ce3f461f196
https://github.com/llvm/llvm-project/commit/72f04fa0734f8559ad515f507a4a3ce3f461f196
Author: Martin Storsjö <martin at martin.st>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M openmp/cmake/HandleOpenMPOptions.cmake
Log Message:
-----------
[OpenMP] [cmake] Don't use -fno-semantic-interposition on Windows (#81113)
This was added in 4b7beab4187ab0766c3d7b272511d5751431a8da. When the
flag was added implicitly elsewhere, it was added via
llvm/cmake/modules/HandleLLVMOptions.cmake, where it wasn't added on
Windows/Cygwin targets.
This avoids one warning per object file in OpenMP.
Commit: 8697bbe2d4aed109520e83c6beab52196ec5b702
https://github.com/llvm/llvm-project/commit/8697bbe2d4aed109520e83c6beab52196ec5b702
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaOpenCL/operators.cl
Log Message:
-----------
[clang] Use CPlusPlus language option instead of Bool (#80975)
As it was pointed out in
https://github.com/llvm/llvm-project/pull/80724, we should not be
checking `getLangOpts().Bool` when determining something related to
logical operators, since it only indicates that bool keyword is present,
not which semantic logical operators have. As a side effect a missing
`-Wpointer-bool-conversion` in OpenCL C was restored since like C23,
OpenCL C has bool keyword but logical operators still return int.
Commit: fe8a62c46365f5ef0c15df2265bbf0026d0a4047
https://github.com/llvm/llvm-project/commit/fe8a62c46365f5ef0c15df2265bbf0026d0a4047
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Utils/StructuredOpsUtils.h
M mlir/include/mlir/IR/AffineMap.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Split.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/IR/AffineMap.cpp
M mlir/lib/IR/BuiltinTypes.cpp
A mlir/unittests/IR/AffineMapTest.cpp
M mlir/unittests/IR/CMakeLists.txt
Log Message:
-----------
[MLIR] Fix crash in AffineMap::replace for zero result maps (#80930)
Fix obvious bug in AffineMap::replace for the case of zero result maps.
Extend/complete inferExprsFromList to work with empty expression lists.
Commit: d63c8bee58b5d4dad9f1c550a342e782e0038f28
https://github.com/llvm/llvm-project/commit/d63c8bee58b5d4dad9f1c550a342e782e0038f28
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][ExprConst] Remove unnecessary cast
FD is a FunctionDecl, so no need to cast a FunctionDecl to a
CXXMethodDecl just to assign it to a FunctionDecl.
Commit: 3ad63593dac390e320808f3de0e1906c5fa45c8a
https://github.com/llvm/llvm-project/commit/3ad63593dac390e320808f3de0e1906c5fa45c8a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] Add m_PtrAdd() matcher (NFC)
This matches a getelementptr i8 instruction or constant expression,
with a given pointer operand and index.
Commit: d9e92765c5f9b0fa7adafa769dd13d37b6bca038
https://github.com/llvm/llvm-project/commit/d9e92765c5f9b0fa7adafa769dd13d37b6bca038
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/IR/ConstantRange.cpp
A llvm/test/Transforms/SCCP/pr79696.ll
M llvm/unittests/IR/ConstantRangeTest.cpp
Log Message:
-----------
[ConstantRange] Improve ConstantRange::binaryXor (#80146)
`ConstantRange::binaryXor` gives poor results as it currently depends on
`KnownBits::operator^`.
Since `sub A, B` is canonicalized into `xor A, B` if `B` is the subset
of `A`, this patch reverts the transform in `ConstantRange::binaryXor`,
which will give better results.
Alive2: https://alive2.llvm.org/ce/z/bmTMV9
Fixes #79696.
Commit: 06774d6bbf32aff45b67d8c3753524ec36bf8869
https://github.com/llvm/llvm-project/commit/06774d6bbf32aff45b67d8c3753524ec36bf8869
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/test/AST/Interp/records.cpp
Log Message:
-----------
[clang][Interp] Handle CXXInheritedCtorInitExprs
We need to forward all arguments of the current function and
call the ctor function.
Commit: c4b0dfcc99da7506bff6b57d563e5cbce9caf4cd
https://github.com/llvm/llvm-project/commit/c4b0dfcc99da7506bff6b57d563e5cbce9caf4cd
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[Clang] Fix a non-effective assertion (#81083)
`PTy` here is literally `FTy->getParamType(i)`, which makes this
assertion not
work as expected.
Commit: fb6ef4233968ffefb616d1c779a5483ef1f140d3
https://github.com/llvm/llvm-project/commit/fb6ef4233968ffefb616d1c779a5483ef1f140d3
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/test/AST/Interp/records.cpp
Log Message:
-----------
[clang][Interp][NFC] Convert records test to verify=expected,both style
Commit: 10cd0e7a8bdcd80c0b017f8d0b6b71dd61973b54
https://github.com/llvm/llvm-project/commit/10cd0e7a8bdcd80c0b017f8d0b6b71dd61973b54
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M flang/docs/FortranLLVMTestSuite.md
Log Message:
-----------
[flang][docs] Update flang documentation regarding the test suite (#80755)
Remove redundant reference to flang not being able to generate code. Add
a reference to the gfortran tests that are part of the LLVM Test Suite.
Commit: cd183428a9af6d7dda2018a88aeb495f268716b5
https://github.com/llvm/llvm-project/commit/cd183428a9af6d7dda2018a88aeb495f268716b5
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/test/AST/Interp/lambda.cpp
Log Message:
-----------
[clang][Interp] Fix handling of generic lambdas
When compiling their static invoker, we need to get the
right specialization.
Commit: 3e33b6f5de6905c98395a77b41d474b87ef9e677
https://github.com/llvm/llvm-project/commit/3e33b6f5de6905c98395a77b41d474b87ef9e677
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M libcxx/include/ostream
M libcxx/include/scoped_allocator
M libcxx/include/shared_mutex
M libcxx/include/string
M libcxx/include/valarray
M libcxx/include/vector
Log Message:
-----------
[libc++][NFC] Reformat a few files that had gotten mis-formatted
Those appear to be oversights when committing patches
in the last few months.
Commit: 5452cbc4a6bfb905fedeacaa6f27895e249da1e5
https://github.com/llvm/llvm-project/commit/5452cbc4a6bfb905fedeacaa6f27895e249da1e5
Author: ostannard <oliver.stannard at arm.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/branch-target-enforcement-indirect-calls.ll
M llvm/test/CodeGen/AArch64/kcfi-bti.ll
Log Message:
-----------
[AArch64] Indirect tail-calls cannot use x16 with pac-ret+pc (#81020)
When using -mbranch-protection=pac-ret+pc, x16 is used in the function
epilogue to hold the address of the signing instruction. This is used by
a HINT instruction which can only use x16, so we can't change this. This
means that we can't use it to hold the function pointer for an indirect
tail-call.
There is existing code to force indirect tail-calls to use x16 or x17
when BTI is enabled, so there are now 4 combinations:
bti pac-ret+pc Valid function pointer registers
off off Any non callee-saved register
on off x16 or x17
off on Any non callee-saved register except x16
on on x17
Commit: 0802596df3d1ffd15f6b828a0f5c1e5b687a730f
https://github.com/llvm/llvm-project/commit/0802596df3d1ffd15f6b828a0f5c1e5b687a730f
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
Log Message:
-----------
[Flang] Update the fix of PR 80738 to cover generic interface inside modules (#81087)
The following test cases crashes. The problem is that the fix for PR
https://github.com/llvm/llvm-project/pull/80738 is not quite complete.
It should `GetUltimate()` of the `interface_` before check if it is
generic.
```
MODULE M
CONTAINS
FUNCTION Int(Arg)
INTEGER :: Int, Arg
Int = Arg
END FUNCTION
FUNCTION Int8(Arg)
INTEGER(8) :: Int8, Arg
Int8 = 8_8
END FUNCTION
END MODULE
MODULE M1
USE M
INTERFACE Int8
MODULE PROCEDURE Int
MODULE PROCEDURE Int8
END INTERFACE
END MODULE
PROGRAM PtrAssignGen
USE M
USE M1
IMPLICIT NONE
INTERFACE Int
MODULE PROCEDURE Int
MODULE PROCEDURE Int8
END INTERFACE
PROCEDURE(Int8), POINTER :: PtrInt8
PtrInt8 => Int8
IF ( PtrInt8(100_8) .NE. 8_8 ) ERROR STOP 12
END
```
Commit: dc5da4851de5d29dd040d85a8387e2e5b4b12b7b
https://github.com/llvm/llvm-project/commit/dc5da4851de5d29dd040d85a8387e2e5b4b12b7b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
A llvm/test/Transforms/InstCombine/dependent-ivs.ll
Log Message:
-----------
[InstCombine] Add tests for #77108 (NFC)
Commit: fffcc5ca83ad2700a3586c1b849a36c6081e2023
https://github.com/llvm/llvm-project/commit/fffcc5ca83ad2700a3586c1b849a36c6081e2023
Author: Francesco Petrogalli <francesco.petrogalli at apple.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
Log Message:
-----------
[CodeGen] Add ValueType v3i8 (NFCI). (#80826)
Commit: b14731fe93d0db9a59984783051880795ae0992d
https://github.com/llvm/llvm-project/commit/b14731fe93d0db9a59984783051880795ae0992d
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/lib/Parse/ParseOpenACC.cpp
Log Message:
-----------
[OpenACC][NFC] Fix parse result from 'set'
Apparently 'set' was being parsed as 'shutdown'. There isn't really any
way of detecting this without getting into a Sema implementation,
however fixing this now as I noticed it.
Commit: 067d2779fcfc62dd429177f350b8cefe49b65b51
https://github.com/llvm/llvm-project/commit/067d2779fcfc62dd429177f350b8cefe49b65b51
Author: ian Bearman <ianb at microsoft.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/lib/Dialect/Arith/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/lib/Dialect/Bufferization/TestTensorCopyInsertion.cpp
Log Message:
-----------
[MLIR] Setting MemorySpace During Bufferization (#78484)
Collection of changes with the goal of being able to convert `encoding`
to `memorySpace` during bufferization
- new API for encoder to allow implementation to select destination
memory space
- update existing bufferization implementations to support the new
interface
Commit: 92eaf036bf22ecc276146cd073208e6a867af8d4
https://github.com/llvm/llvm-project/commit/92eaf036bf22ecc276146cd073208e6a867af8d4
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/include/llvm/ADT/ilist_iterator.h
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/tools/llvm-lto/llvm-lto.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-reduce/llvm-reduce.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/ADT/IListIteratorBitsTest.cpp
M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
Log Message:
-----------
[NFC][RemoveDIs] Remove conditional compilation for RemoveDIs (#81149)
A colleague observes that switching the default value of
LLVM_EXPERIMENTAL_DEBUGINFO_ITERATORS to "On" hasn't flipped the value
in their CMakeCache.txt. This probably means that everyone with an
existing build tree is going to not have support built in, meaning
everyone in LLVM would need to clean+rebuild their worktree when we flip
the switch on... which doesn't sound good.
So instead, just delete the flag and everything it does, making everyone
build and run ~400 lit tests in RemoveDIs mode. None of the buildbots
have had trouble with this, so it Should Be Fine (TM).
(Sending for review as this is changing various comments, and touches
several different areas -- I don't want to get too punchy).
Commit: 7d19dc50de2c81ead6af750bcddd139ac99a48b5
https://github.com/llvm/llvm-project/commit/7d19dc50de2c81ead6af750bcddd139ac99a48b5
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
A llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
Log Message:
-----------
[AMDGPU][True16] Support VOP3 source DPP operands. (#80892)
Commit: b846613837d83989d99d33f4b90db7bad019aa8c
https://github.com/llvm/llvm-project/commit/b846613837d83989d99d33f4b90db7bad019aa8c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
Log Message:
-----------
[X86] X86FixupVectorConstants - add destination register width to rebuildSplatCst/rebuildZeroUpperCst/rebuildExtCst callbacks
As found on #81136 - we aren't correctly handling for cases where the constant pool entry is wider than the destination register width, causing incorrect scaling of the truncated constant for load-extension cases.
This first patch just pulls out the destination register width argument, its still currently driven by the constant pool entry but that will be addressed in a followup.
Commit: eb85c8edf576d27254fa37bf9ed72ec0867756f7
https://github.com/llvm/llvm-project/commit/eb85c8edf576d27254fa37bf9ed72ec0867756f7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
A llvm/test/CodeGen/X86/pr81136.ll
Log Message:
-----------
[X86] Add test case for #81136
Commit: f407be32fe8084fe02c4f16842548d21afdb447f
https://github.com/llvm/llvm-project/commit/f407be32fe8084fe02c4f16842548d21afdb447f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
Log Message:
-----------
[X86] X86FixupVectorConstants - rename FixupEntry::BitWidth to FixupEntry::MemBitWidth NFC.
Make it clearer that this refers to the width of the constant element stored in memory - which won't match the register element width after a sext/zextload
Commit: 5aeabf2df92b92c71b5dbdb9ae82a37431aa2ee4
https://github.com/llvm/llvm-project/commit/5aeabf2df92b92c71b5dbdb9ae82a37431aa2ee4
Author: stephenpeckham <118857872+stephenpeckham at users.noreply.github.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/include/llvm/ObjectYAML/XCOFFYAML.h
M llvm/lib/ObjectYAML/XCOFFEmitter.cpp
M llvm/lib/ObjectYAML/XCOFFYAML.cpp
M llvm/test/tools/obj2yaml/XCOFF/aix.yaml
M llvm/test/tools/obj2yaml/XCOFF/aux-symbols.yaml
A llvm/test/tools/yaml2obj/XCOFF/aux-aligntype.yaml
M llvm/test/tools/yaml2obj/XCOFF/aux-symbols.yaml
M llvm/tools/obj2yaml/xcoff2yaml.cpp
Log Message:
-----------
[XCOFF][obj2yaml] Support SymbolAlignmentAndType as 2 separate fields in YAML. (#76828)
XCOFF encodes a symbol type and alignment in a single 8-bit field. It is
easier to read and write YAML files if the fields can be specified
separately. This PR causes obj2yaml to write the fields separately and
allows yaml2obj to read either the single combined field or the separate
fields.
Commit: 58e8147d1690485ed0a6fcb59c7b6ea4b8cd2936
https://github.com/llvm/llvm-project/commit/58e8147d1690485ed0a6fcb59c7b6ea4b8cd2936
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-bounds.f90
Log Message:
-----------
[flang][openacc] Use original input for base address with optional (#80931)
In #80317 the data op generation was updated to use correctly the #0
result from the hlfir.delcare op. In case of optional that are not
descriptor, it is preferable to use the original input for the varPtr
value of the OpenACC data op.
This patch also make sure that the descriptor value of optional is only
accessed when present.
Commit: 66d462d0a1ba1e510fff479baff8f21ecb924b1f
https://github.com/llvm/llvm-project/commit/66d462d0a1ba1e510fff479baff8f21ecb924b1f
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M clang/include/module.modulemap
Log Message:
-----------
Add missing textual header to module map
Commit: 750981f1a2c6069cded709b75cc87d7abd05277a
https://github.com/llvm/llvm-project/commit/750981f1a2c6069cded709b75cc87d7abd05277a
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M lldb/test/API/macosx/universal/Makefile
Log Message:
-----------
Fix a truly strange triple in testcase
Commit: bdde5f9bea75e897bcc31a95b9c3376988c211cc
https://github.com/llvm/llvm-project/commit/bdde5f9bea75e897bcc31a95b9c3376988c211cc
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M llvm/lib/IR/BasicBlock.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs] Turn on non-instrinsic debug-info by default
This patch causes all variable-location debug-info to be converted into
non-intrinsic records as they passes through the optimisation /
instrumentation passes. There's a brief introduction here [0] and a more
detailed thread on what this means on discourse at [1].
If this commit is breaking your downstream tests, please see comment 12 in
[1], which documents the kind of variation in tests we'd expect to see from
this change and what to do about it.
[0] https://llvm.org/docs/RemoveDIsDebugInfo.html
[1] https://discourse.llvm.org/t/rfc-instruction-api-changes-needed-to-eliminate-debug-intrinsics-from-ir/68939
Commit: f219cda7bd43696792ca4668ca5a9fbf55a9f09f
https://github.com/llvm/llvm-project/commit/f219cda7bd43696792ca4668ca5a9fbf55a9f09f
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/TestDataFormatterLibcxxChrono.py
Log Message:
-----------
[lldb] Fix printf formatting of std::time_t seconds (#81078)
This formatter
https://github.com/llvm/llvm-project/pull/78609
was originally passing the signed seconds (which can refer to times in
the past) with an unsigned printf formatter, and had tests that expected
to see negative values from the printf which always failed on macOS. I'm
not clear how they ever passed on any platform.
Fix the printf to print seconds as a signed value, and re-enable the
tests.
Commit: 0a312e870855e518886319c9d36b77e898fcfa44
https://github.com/llvm/llvm-project/commit/0a312e870855e518886319c9d36b77e898fcfa44
Author: John Demme <john.demme at microsoft.com>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
R .ci/generate-buildkite-pipeline-scheduled
M .git-blame-ignore-revs
M .github/CODEOWNERS
M .github/new-prs-labeler.yml
M .github/workflows/build-ci-container.yml
R .github/workflows/containers/github-action-ci/Dockerfile
A .github/workflows/containers/github-action-ci/bootstrap.patch
A .github/workflows/containers/github-action-ci/stage1.Dockerfile
A .github/workflows/containers/github-action-ci/stage2.Dockerfile
A .github/workflows/containers/github-action-ci/storage.conf
A .github/workflows/email-check.yaml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-subscriber.yml
M .github/workflows/libclang-python-tests.yml
M .github/workflows/libclc-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/lldb-tests.yml
M .github/workflows/llvm-project-tests.yml
M .github/workflows/llvm-tests.yml
A .github/workflows/merged-prs.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/version-check.py
M bolt/docs/BAT.md
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Passes/HFSort.h
M bolt/include/bolt/Profile/BoltAddressTranslation.h
M bolt/include/bolt/Rewrite/DWARFRewriter.h
M bolt/include/bolt/Rewrite/MetadataManager.h
M bolt/include/bolt/Rewrite/MetadataRewriter.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/CMakeLists.txt
R bolt/lib/Passes/HFSortPlus.cpp
M bolt/lib/Passes/ReorderFunctions.cpp
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/StaleProfileMatching.cpp
M bolt/lib/Profile/YAMLProfileReader.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/LinuxKernelRewriter.cpp
M bolt/lib/Rewrite/MetadataManager.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/RuntimeLibs/RuntimeLibrary.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
M bolt/test/AArch64/ifunc.c
A bolt/test/X86/Inputs/dwarf4-debug-line-offset-change-after-bolt-helper.s
A bolt/test/X86/Inputs/dwarf4-debug-line-offset-change-after-bolt-main.s
A bolt/test/X86/Inputs/dwarf5-debug-line-offset-change-after-bolt-main.s
M bolt/test/X86/bolt-address-translation.test
A bolt/test/X86/dwarf-debug-line-stmt-list-offset-change.test
A bolt/test/X86/dwarf4-override-comp-dir.test
A bolt/test/X86/dwarf5-override-comp-dir.test
A bolt/test/X86/linux-orc.s
M bolt/test/X86/merge-fdata-bat-mode.test
A bolt/test/X86/merge-fdata-nobat-mode.test
R bolt/test/X86/orc_unwind.s
A bolt/test/X86/phdr-out-of-order.test
M bolt/test/X86/reader-stale-yaml.test
M bolt/tools/merge-fdata/merge-fdata.cpp
M clang-tools-extra/clang-apply-replacements/include/clang-apply-replacements/Tooling/ApplyReplacements.h
M clang-tools-extra/clang-apply-replacements/lib/Tooling/ApplyReplacements.cpp
M clang-tools-extra/clang-apply-replacements/tool/ClangApplyReplacementsMain.cpp
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-include-fixer/find-all-symbols/PathConfig.cpp
M clang-tools-extra/clang-move/Move.cpp
M clang-tools-extra/clang-move/tool/ClangMove.cpp
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang-tools-extra/clang-tidy/add_new_check.py
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/ChainedComparisonCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/ChainedComparisonCheck.h
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.h
M clang-tools-extra/clang-tidy/bugprone/EmptyCatchCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.h
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/cert/CMakeLists.txt
R clang-tools-extra/clang-tidy/cert/PostfixOperatorCheck.cpp
R clang-tools-extra/clang-tidy/cert/PostfixOperatorCheck.h
M clang-tools-extra/clang-tidy/cppcoreguidelines/PreferMemberInitializerCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/PreferMemberInitializerCheck.h
M clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
M clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.h
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.h
M clang-tools-extra/clang-tidy/google/IntegerTypesCheck.cpp
M clang-tools-extra/clang-tidy/google/UnnamedNamespaceInHeaderCheck.cpp
M clang-tools-extra/clang-tidy/google/UnnamedNamespaceInHeaderCheck.h
M clang-tools-extra/clang-tidy/llvm/HeaderGuardCheck.h
M clang-tools-extra/clang-tidy/misc/CoroutineHostileRAIICheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.cpp
M clang-tools-extra/clang-tidy/misc/UseAnonymousNamespaceCheck.h
M clang-tools-extra/clang-tidy/modernize/AvoidCArraysCheck.cpp
M clang-tools-extra/clang-tidy/modernize/AvoidCArraysCheck.h
M clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp
M clang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseAutoCheck.cpp
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/RedundantCastingCheck.cpp
A clang-tools-extra/clang-tidy/readability/RedundantCastingCheck.h
A clang-tools-extra/clang-tidy/readability/RedundantInlineSpecifierCheck.cpp
A clang-tools-extra/clang-tidy/readability/RedundantInlineSpecifierCheck.h
A clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.cpp
A clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.h
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.h
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/CompileCommands.cpp
M clang-tools-extra/clangd/Diagnostics.cpp
M clang-tools-extra/clangd/DumpAST.cpp
M clang-tools-extra/clangd/ExpectedTypes.cpp
M clang-tools-extra/clangd/FS.cpp
M clang-tools-extra/clangd/FindTarget.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/SourceCode.cpp
M clang-tools-extra/clangd/TidyFastChecks.inc
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/BackgroundIndexStorage.cpp
M clang-tools-extra/clangd/unittests/FindTargetTests.cpp
M clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
M clang-tools-extra/clangd/unittests/SourceCodeTests.cpp
M clang-tools-extra/clangd/xpc/cmake/modules/CreateClangdXPCFramework.cmake
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/chained-comparison.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/suspicious-include.rst
R clang-tools-extra/docs/clang-tidy/checks/cert/dcl21-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/prefer-member-initializer.rst
M clang-tools-extra/docs/clang-tidy/checks/google/build-namespaces.rst
M clang-tools-extra/docs/clang-tidy/checks/google/global-names-in-headers.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/llvm/header-guard.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/definitions-in-headers.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unused-using-decls.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/use-anonymous-namespace.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-c-arrays.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-casting.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-inline-specifier.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/use-std-min-max.rst
M clang-tools-extra/include-cleaner/test/tool.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang-tools-extra/modularize/ModularizeUtilities.cpp
A clang-tools-extra/test/clang-apply-replacements/Inputs/format_header/no.cpp
A clang-tools-extra/test/clang-apply-replacements/Inputs/format_header/no.yaml
A clang-tools-extra/test/clang-apply-replacements/Inputs/format_header/yes.cpp
A clang-tools-extra/test/clang-apply-replacements/Inputs/format_header/yes.yaml
A clang-tools-extra/test/clang-apply-replacements/Inputs/yml-basic/basic.h
A clang-tools-extra/test/clang-apply-replacements/Inputs/yml-basic/file1.yml
A clang-tools-extra/test/clang-apply-replacements/Inputs/yml-basic/file2.yml
A clang-tools-extra/test/clang-apply-replacements/format-header.cpp
A clang-tools-extra/test/clang-apply-replacements/yml-basic.cpp
M clang-tools-extra/test/clang-tidy/checkers/abseil/Inputs/absl/external-file.h
M clang-tools-extra/test/clang-tidy/checkers/abseil/faster-strsplit-delimiter.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/chained-comparison.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/chained-comparison.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-char.cpp
R clang-tools-extra/test/clang-tidy/checkers/cert/dcl21-cpp.cpp
R clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/prefer-member-initializer-modernize-use-default-member-init-assignment.cpp
R clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/prefer-member-initializer-modernize-use-default-member-init.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/prefer-member-initializer.cpp
M clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
M clang-tools-extra/test/clang-tidy/checkers/google/runtime-int.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/coroutine-hostile-raii.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-ignores-strings.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/concat-nested-namespaces.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/loop-convert-basic.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-auto-for-pointer.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-casting.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/redundant-inline-specifier.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/use-std-min-max.cpp
M clang/CMakeLists.txt
M clang/bindings/python/clang/cindex.py
A clang/bindings/python/tests/cindex/test_rewrite.py
M clang/cmake/caches/BOLT.cmake
M clang/cmake/caches/PGO.cmake
M clang/cmake/caches/Release.cmake
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ClangLinkerWrapper.rst
M clang/docs/HIPSupport.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/OffloadingDesign.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/ShadowCallStack.rst
M clang/docs/SourceBasedCodeCoverage.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/docs/UsersManual.rst
M clang/docs/tools/clang-formatted-files.txt
M clang/docs/tools/dump_format_style.py
M clang/include/clang-c/Index.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/ASTNodeTraverser.h
M clang/include/clang/AST/ComparisonCategories.h
M clang/include/clang/AST/ComputeDependence.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/ODRHash.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/AST/TemplateArgumentVisitor.h
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Analysis/Analyses/PostOrderCFGView.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Analysis/FlowSensitive/DataflowAnalysis.h
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/include/clang/Analysis/FlowSensitive/Transfer.h
M clang/include/clang/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/Builtins.def
M clang/include/clang/Basic/Builtins.h
A clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
R clang/include/clang/Basic/BuiltinsBPF.def
A clang/include/clang/Basic/BuiltinsBPF.td
A clang/include/clang/Basic/BuiltinsBase.td
M clang/include/clang/Basic/BuiltinsLoongArchBase.def
M clang/include/clang/Basic/BuiltinsLoongArchLASX.def
M clang/include/clang/Basic/BuiltinsLoongArchLSX.def
M clang/include/clang/Basic/BuiltinsNVPTX.def
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/CharInfo.h
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDocs.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Basic/DirectoryEntry.h
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/FileEntry.h
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/ObjCRuntime.h
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/TypeNodes.td
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_sme.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/Types.def
M clang/include/clang/ExtractAPI/API.h
M clang/include/clang/ExtractAPI/AvailabilityInfo.h
M clang/include/clang/ExtractAPI/DeclarationFragments.h
M clang/include/clang/ExtractAPI/ExtractAPIVisitor.h
M clang/include/clang/ExtractAPI/Serialization/SerializerBase.h
M clang/include/clang/ExtractAPI/Serialization/SymbolGraphSerializer.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Frontend/TextDiagnostic.h
M clang/include/clang/Frontend/Utils.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Lex/HeaderSearchOptions.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Lex/Token.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Rewrite/Core/HTMLRewrite.h
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/Lookup.h
M clang/include/clang/Sema/ScopeInfo.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/TypeBitCodes.def
M clang/include/clang/StaticAnalyzer/Core/BugReporter/BugSuppression.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
M clang/include/clang/Tooling/Inclusions/IncludeStyle.h
M clang/include/module.modulemap
M clang/lib/ARCMigrate/FileRemapper.cpp
M clang/lib/ARCMigrate/ObjCMT.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ASTTypeTraits.cpp
M clang/lib/AST/AttrDocTable.cpp
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/ComparisonCategories.cpp
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/lib/AST/Interp/ByteCodeEmitter.h
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/lib/AST/Interp/ByteCodeStmtGen.cpp
M clang/lib/AST/Interp/Context.cpp
M clang/lib/AST/Interp/Context.h
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Descriptor.h
M clang/lib/AST/Interp/Disasm.cpp
M clang/lib/AST/Interp/EvalEmitter.cpp
M clang/lib/AST/Interp/EvalEmitter.h
A clang/lib/AST/Interp/EvaluationResult.cpp
A clang/lib/AST/Interp/EvaluationResult.h
M clang/lib/AST/Interp/IntegralAP.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/lib/AST/Interp/Opcodes.td
M clang/lib/AST/Interp/Pointer.cpp
M clang/lib/AST/Interp/Pointer.h
M clang/lib/AST/Interp/PrimType.h
M clang/lib/AST/Interp/Program.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/Mangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/CalledOnceCheck.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp
M clang/lib/Analysis/FlowSensitive/HTMLLogger.css
M clang/lib/Analysis/FlowSensitive/HTMLLogger.html
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
M clang/lib/Analysis/ReachableCode.cpp
M clang/lib/Analysis/RetainSummaryManager.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/CodeGenOptions.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/Sarif.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Basic/Targets/CSKY.cpp
M clang/lib/Basic/Targets/CSKY.h
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/SystemZ.cpp
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCXX.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Driver/ToolChains/Arch/PPC.cpp
M clang/lib/Driver/ToolChains/Arch/SystemZ.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/CSKYToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Cuda.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/MSP430.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
M clang/lib/Driver/ToolChains/MipsLinux.cpp
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/RISCVToolchain.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Edit/RewriteObjCFoundationAPI.cpp
M clang/lib/ExtractAPI/API.cpp
M clang/lib/ExtractAPI/AvailabilityInfo.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Format/WhitespaceManager.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/LogDiagnosticPrinter.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Frontend/TextDiagnostic.cpp
M clang/lib/Frontend/TextDiagnosticBuffer.cpp
M clang/lib/Frontend/TextDiagnosticPrinter.cpp
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/__clang_cuda_intrinsics.h
M clang/lib/Headers/bmiintrin.h
M clang/lib/Headers/cpuid.h
M clang/lib/Headers/ia32intrin.h
M clang/lib/Headers/larchintrin.h
M clang/lib/Headers/lasxintrin.h
M clang/lib/Headers/lsxintrin.h
M clang/lib/Headers/sifive_vector.h
M clang/lib/Index/USRGeneration.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/JumpDiagnostics.cpp
M clang/lib/Sema/OpenCLBuiltins.td
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCVVectorLookup.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugContainerModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugIteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/InvalidatedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/IteratorRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Core/BugReporter.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/lib/Tooling/ASTDiff/ASTDiff.cpp
M clang/lib/Tooling/CompilationDatabase.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/Tooling/Inclusions/IncludeStyle.cpp
M clang/lib/Tooling/Tooling.cpp
A clang/test/AST/Interp/atomic.c
A clang/test/AST/Interp/atomic.cpp
M clang/test/AST/Interp/builtin-functions.cpp
M clang/test/AST/Interp/builtins.cpp
M clang/test/AST/Interp/c.c
M clang/test/AST/Interp/complex.cpp
M clang/test/AST/Interp/cxx11.cpp
M clang/test/AST/Interp/cxx17.cpp
M clang/test/AST/Interp/cxx20.cpp
M clang/test/AST/Interp/cxx23.cpp
M clang/test/AST/Interp/cxx98.cpp
M clang/test/AST/Interp/functions.cpp
M clang/test/AST/Interp/intap.cpp
M clang/test/AST/Interp/lambda.cpp
M clang/test/AST/Interp/literals.cpp
M clang/test/AST/Interp/records.cpp
M clang/test/AST/Interp/switch.cpp
A clang/test/AST/ast-crash-doc-function-template.cpp
M clang/test/AST/ast-dump-coroutine.cpp
A clang/test/AST/ast-dump-for-range-lifetime.cpp
A clang/test/AST/ast-dump-pack-indexing-crash.cpp
A clang/test/AST/ast-dump-static-operators.cpp
M clang/test/AST/ast-dump-templates.cpp
M clang/test/AST/ast-dump-using.cpp
A clang/test/AST/fixed-point-zero-init.cpp
M clang/test/AST/ms-constexpr.cpp
M clang/test/Analysis/Checkers/WebKit/call-args.cpp
A clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
M clang/test/Analysis/Inputs/std-c-library-functions-POSIX.h
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/additive-op-on-sym-int-expr.c
M clang/test/Analysis/bstring.c
M clang/test/Analysis/builtin-functions.cpp
M clang/test/Analysis/call-invalidation.cpp
M clang/test/Analysis/copypaste/suspicious-clones.cpp
M clang/test/Analysis/errno-stdlibraryfunctions.c
A clang/test/Analysis/html_diagnostics/counter.c
M clang/test/Analysis/malloc.mm
M clang/test/Analysis/out-of-bounds-diagnostics.c
A clang/test/Analysis/out-of-bounds-notes.c
M clang/test/Analysis/std-c-library-functions-POSIX.c
M clang/test/Analysis/std-c-library-functions.c
M clang/test/Analysis/stream-errno.c
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream-noopen.c
M clang/test/Analysis/stream-note.c
M clang/test/Analysis/stream.c
M clang/test/Analysis/taint-tester.c
M clang/test/Analysis/templates.cpp
M clang/test/Analysis/uninit-vals.m
A clang/test/C/C2x/n2940.c
M clang/test/C/C2x/n3042.c
M clang/test/C/drs/dr3xx.c
M clang/test/CXX/class.access/p4.cpp
M clang/test/CXX/class.derived/class.member.lookup/p11.cpp
A clang/test/CXX/dcl.dcl/dcl.enum/p1.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.type.elab/p1.cpp
M clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct/p13.cpp
A clang/test/CXX/dcl.decl/dcl.meaning/dcl.meaning.general/p3.cpp
M clang/test/CXX/drs/dr16xx.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/test/CXX/drs/dr23xx.cpp
A clang/test/CXX/drs/dr28xx.cpp
M clang/test/CXX/drs/dr4xx.cpp
M clang/test/CXX/drs/dr7xx.cpp
M clang/test/CXX/module/module.interface/p2-2.cpp
M clang/test/CXX/over/over.match/over.match.funcs/over.match.oper/p3-2a.cpp
M clang/test/CXX/special/class.temporary/p6.cpp
M clang/test/CXX/temp/p3.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.nontype/p1.cpp
M clang/test/CXX/temp/temp.decls/temp.class/temp.mem.func/p1.cpp
M clang/test/CXX/temp/temp.fct.spec/temp.deduct/temp.deduct.call/p1-0x.cpp
A clang/test/CXX/temp/temp.names/p5.cpp
M clang/test/CXX/temp/temp.res/temp.local/p6.cpp
M clang/test/CXX/temp/temp.spec/part.spec.cpp
A clang/test/ClangScanDeps/empty.cpp
A clang/test/ClangScanDeps/missing-vfs.m
A clang/test/ClangScanDeps/optimize-fmodulemap.m
A clang/test/ClangScanDeps/optimize-vfs-edgecases.m
A clang/test/ClangScanDeps/optimize-vfs-leak.m
A clang/test/ClangScanDeps/optimize-vfs-pch.m
A clang/test/ClangScanDeps/optimize-vfs.m
M clang/test/ClangScanDeps/strip-codegen-args.m
A clang/test/CodeGen/LoongArch/builtin-dbl-approximate.c
A clang/test/CodeGen/LoongArch/builtin-flt-approximate.c
M clang/test/CodeGen/LoongArch/intrinsic-la64-error.c
A clang/test/CodeGen/LoongArch/lasx/builtin-approximate-alias.c
A clang/test/CodeGen/LoongArch/lasx/builtin-approximate.c
M clang/test/CodeGen/LoongArch/lasx/builtin-error.c
A clang/test/CodeGen/LoongArch/lsx/builtin-approximate-alias.c
A clang/test/CodeGen/LoongArch/lsx/builtin-approximate.c
M clang/test/CodeGen/LoongArch/lsx/builtin-error.c
M clang/test/CodeGen/PowerPC/attr-target-ppc.c
M clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma.c
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/RISCV/riscv-inline-asm.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/xsfvcp-x-rv64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/xsfvcp-x.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsoxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsuxseg8ei8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei8.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vloxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg3e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg4e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg5e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg6e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg7e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e32ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e64ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg8e8ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg2e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg3e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg4e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg5e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg6e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg7e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlsseg8e8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg2ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg3ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg4ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg5ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg6ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg7ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei32.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei64.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vluxseg8ei8.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-tuple-type.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/xsfvcp-index-out-of-range.c
A clang/test/CodeGen/RISCV/tls-dialect.c
A clang/test/CodeGen/SystemZ/unaligned-symbols.c
M clang/test/CodeGen/aarch64-inline-asm.c
M clang/test/CodeGen/aarch64-ls64-inline-asm.c
M clang/test/CodeGen/aarch64-neon-intrinsics.c
M clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/aarch64-sme2-attrs.cpp
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_bmop.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_clamp.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvtn.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fp_dots.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_frint.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_int_dots.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_max.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_maxnm.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_min.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_minnm.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mop.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sqdmulh.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sub.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_unpkx4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vdot.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_add.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_rshl.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_selx4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_uzpx4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_zipx4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_zero_zt.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_x2.c
M clang/test/CodeGen/aarch64-targetattr.c
M clang/test/CodeGen/alloc-size.c
M clang/test/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CodeGen/arm-acle-coproc.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-bitcast.c
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-call.c
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-cast.c
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-codegen.c
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-globals.c
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGen/builtin-cpu-supports.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/callback_pthread_create.c
M clang/test/CodeGen/cleanup-destslot-simple.c
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/debug-info-cc.c
M clang/test/CodeGen/fat-lto-objects.c
M clang/test/CodeGen/fp128_complex.c
M clang/test/CodeGen/function-attributes.c
M clang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c
M clang/test/CodeGen/memtag-globals-asm.cpp
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGen/nofpclass.c
M clang/test/CodeGen/pragma-weak.c
M clang/test/CodeGen/preserve-call-conv.c
A clang/test/CodeGen/smiths-complex-div.c
M clang/test/CodeGen/target-builtin-noerror.c
A clang/test/CodeGen/ubsan-shift-bitint.c
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCUDA/amdgpu-code-object-version-linking.cu
M clang/test/CodeGenCUDA/amdgpu-code-object-version.cu
M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
A clang/test/CodeGenCUDA/printf-builtin.cu
M clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
M clang/test/CodeGenCXX/attr-target-version.cpp
M clang/test/CodeGenCXX/cxx2b-static-call-operator.cpp
M clang/test/CodeGenCXX/cxx2b-static-subscript-operator.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenCXX/dynamic-cast-dead.cpp
M clang/test/CodeGenCXX/dynamic-cast.cpp
M clang/test/CodeGenCXX/mangle-ms-templates.cpp
M clang/test/CodeGenCXX/mangle-template.cpp
M clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp
M clang/test/CodeGenCXX/microsoft-abi-typeid.cpp
M clang/test/CodeGenCXX/new-array-init.cpp
M clang/test/CodeGenCXX/riscv-mangle-rvv-fixed-vectors.cpp
A clang/test/CodeGenCXX/template-arguments.cpp
M clang/test/CodeGenCXX/visibility-dllstorageclass.cpp
A clang/test/CodeGenCXX/visibility-global-new-delete.cpp
M clang/test/CodeGenHIP/default-attributes.hip
A clang/test/CodeGenHIP/printf-builtin.hip
M clang/test/CodeGenObjC/arc-foreach.m
A clang/test/CodeGenObjC/gnustep2-direct-method.m
M clang/test/CodeGenObjCXX/arc-cxx11-init-list.mm
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-param-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/CoverageMapping/branch-constfolded.cpp
M clang/test/CoverageMapping/if.cpp
M clang/test/CoverageMapping/templates.cpp
A clang/test/Driver/Inputs/nvptx-arch/nvptx_arch_sm_89_sm_80
A clang/test/Driver/Inputs/rocm/amdgcn/bitcode/oclc_abi_version_600.bc
M clang/test/Driver/aarch64-mcpu.c
M clang/test/Driver/aix-small-local-exec-tls.c
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/amdgpu-toolchain-opencl.cl
R clang/test/Driver/android-version.cpp
M clang/test/Driver/arm-cortex-cpus-1.c
M clang/test/Driver/baremetal.cpp
A clang/test/Driver/basic-block-address-map.c
M clang/test/Driver/cuda-cross-compiling.c
M clang/test/Driver/dxc_spirv.hlsl
M clang/test/Driver/fat-lto-objects.c
M clang/test/Driver/fbasic-block-sections.c
M clang/test/Driver/fveclib.c
M clang/test/Driver/hip-code-object-version.hip
M clang/test/Driver/hip-device-libs.hip
M clang/test/Driver/hip-options.hip
M clang/test/Driver/hip-toolchain-mllvm.hip
M clang/test/Driver/hipstdpar.c
A clang/test/Driver/invalid-version.cpp
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/mingw.cpp
M clang/test/Driver/mips-features.c
A clang/test/Driver/modules-skip-odr-check-in-gmf.cpp
M clang/test/Driver/nvptx-cuda-system-arch.c
A clang/test/Driver/opencl_aot_save_temps.cl
M clang/test/Driver/ppc-dependent-options.cpp
M clang/test/Driver/range.c
M clang/test/Driver/riscv-arch.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/riscv-toolchain-gcc-multilib-reuse.c
M clang/test/Driver/riscv32-toolchain.c
M clang/test/Driver/riscv64-toolchain.c
M clang/test/Driver/rocm-detect.hip
A clang/test/Driver/s390x-unaligned-symbols.c
A clang/test/Driver/sparc64-codemodel.c
A clang/test/Driver/tls-dialect.c
A clang/test/Driver/unsupported-option-gpu.c
M clang/test/Driver/visibility-dllstorageclass.c
A clang/test/Driver/visibility-global-new-delete.cl
M clang/test/Driver/wasm-features.c
M clang/test/Driver/x86-target-features.c
M clang/test/ExtractAPI/availability.c
M clang/test/ExtractAPI/typedef.c
A clang/test/ExtractAPI/union.c
M clang/test/Format/clang-format-ignore.cpp
A clang/test/Format/dump-config-objc-stdin.m
M clang/test/Format/verbose.cpp
A clang/test/Frontend/diagnostic-pipe.c
M clang/test/Frontend/fixed_point_bit_widths.c
M clang/test/Frontend/fixed_point_errors.cpp
M clang/test/Frontend/verify.c
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Import/attr/Inputs/S.cpp
M clang/test/Import/attr/test.cpp
M clang/test/Import/cxx-default-init-expr/test.cpp
M clang/test/Index/Core/designated-inits.c
M clang/test/Index/Core/external-source-symbol-attr-cxx.cpp
M clang/test/Index/Core/external-source-symbol-attr.m
M clang/test/Index/Core/index-dependent-source.cpp
M clang/test/Index/Core/index-instantiated-source.cpp
M clang/test/Index/Core/index-source-invalid-name.cpp
M clang/test/Index/Core/index-source.cpp
M clang/test/Index/Core/index-source.m
M clang/test/Index/Core/index-source.mm
M clang/test/Index/Core/index-subkinds.m
M clang/test/Index/Core/index-with-module.m
A clang/test/Index/USR/structural-value-tpl-arg.cpp
M clang/test/Index/attributes.c
M clang/test/Index/ms-property.cpp
M clang/test/Index/using_if_exists.cpp
A clang/test/Interpreter/cxx20-modules.cppm
M clang/test/Interpreter/disambiguate-decl-stmt.cpp
M clang/test/Lexer/cxx-features.cpp
M clang/test/Lexer/has_extension_cxx.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Misc/target-invalid-cpu-note.c
M clang/test/Misc/warning-flags.c
M clang/test/Modules/aarch64-sme-keywords.cppm
M clang/test/Modules/concept.cppm
A clang/test/Modules/cxx20-modules-enum-odr.cppm
M clang/test/Modules/no-eager-load.cppm
M clang/test/Modules/odr_hash.cpp
M clang/test/Modules/polluted-operator.cppm
A clang/test/Modules/pr60085.cppm
M clang/test/Modules/pr76638.cppm
A clang/test/Modules/pr78830.cppm
A clang/test/Modules/skip-odr-check-in-gmf.cppm
M clang/test/OpenMP/atomic_ast_print.cpp
M clang/test/OpenMP/atomic_messages.cpp
M clang/test/OpenMP/bug57757.cpp
A clang/test/OpenMP/bug69085.c
M clang/test/OpenMP/declare_simd_messages.cpp
A clang/test/OpenMP/force-usm.c
A clang/test/PCH/pack_indexing.cpp
M clang/test/Parser/cxx0x-ambig.cpp
M clang/test/Parser/cxx0x-decl.cpp
A clang/test/Parser/cxx2c-pack-indexing.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
A clang/test/ParserOpenACC/parse-wait-clause.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/arm-target-features.c
A clang/test/Preprocessor/has_builtin_cpuid.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Preprocessor/ucn-pp-identifier.c
M clang/test/Preprocessor/wasm-target-features.c
M clang/test/Preprocessor/x86_target_features.c
M clang/test/Profile/c-general.c
A clang/test/Profile/c-mcdc-logicalop-ternary.c
M clang/test/Sema/PR2919-builtin-types-compat-strips-crv.c
M clang/test/Sema/aarch64-incompat-sm-builtin-calls.c
M clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp
M clang/test/Sema/aarch64-sme-func-attrs.c
M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp
M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_target.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
M clang/test/Sema/atomic-expr.c
M clang/test/Sema/attr-aligned.c
A clang/test/Sema/attr-lifetimebound-no-crash.cpp
M clang/test/Sema/attr-print.c
M clang/test/Sema/attr-riscv-rvv-vector-bits.c
M clang/test/Sema/attr-target-clones-aarch64.c
M clang/test/Sema/auto-type.c
M clang/test/Sema/builtin-cpu-supports.c
M clang/test/Sema/c2x-auto.c
M clang/test/Sema/c2x-bool.c
M clang/test/Sema/check-increment.c
M clang/test/Sema/conversion-64-32.c
A clang/test/Sema/conversion-implicit-int-includes-64-to-32.c
M clang/test/Sema/fp-eval-pragma-with-float-double_t-1.c
M clang/test/Sema/fp-eval-pragma-with-float-double_t-2.c
M clang/test/Sema/fp-eval-pragma-with-float-double_t-3.c
A clang/test/Sema/incorrect_pure.cpp
M clang/test/Sema/inline-asm-validate-aarch64.c
M clang/test/Sema/inline-asm-validate-riscv.c
M clang/test/Sema/no_callconv.cpp
M clang/test/Sema/objc-bool-constant-conversion.m
A clang/test/Sema/preserve-none-call-conv.c
M clang/test/Sema/rvv-required-features-invalid.c
M clang/test/Sema/struct-cast.c
M clang/test/Sema/warn-cast-qual.c
A clang/test/Sema/warn-infinity-nan-disabled-lnx.cpp
A clang/test/Sema/warn-infinity-nan-disabled-win.cpp
M clang/test/Sema/warn-int-in-bool-context.c
M clang/test/SemaCXX/attr-print.cpp
M clang/test/SemaCXX/attr-target-version.cpp
M clang/test/SemaCXX/builtin-std-move.cpp
A clang/test/SemaCXX/coroutine-promise-ctor.cpp
A clang/test/SemaCXX/coroutine-unreachable-warning.cpp
M clang/test/SemaCXX/cxx0x-cursory-default-delete.cpp
M clang/test/SemaCXX/cxx11-attr-print.cpp
M clang/test/SemaCXX/cxx11-default-member-initializers.cpp
M clang/test/SemaCXX/cxx1z-copy-omission.cpp
M clang/test/SemaCXX/cxx20-using-enum.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
A clang/test/SemaCXX/cxx2b-static-operator.cpp
A clang/test/SemaCXX/cxx2c-pack-indexing-ext-diags.cpp
A clang/test/SemaCXX/cxx2c-pack-indexing.cpp
M clang/test/SemaCXX/datasizeof.cpp
M clang/test/SemaCXX/decomposition-openmp.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaCXX/enum-scoped.cpp
M clang/test/SemaCXX/function-type-qual.cpp
A clang/test/SemaCXX/libstdcxx_is_nothrow_convertible_hack.cpp
M clang/test/SemaCXX/nested-name-spec.cpp
M clang/test/SemaCXX/overloaded-operator.cpp
M clang/test/SemaCXX/pr72025.cpp
M clang/test/SemaCXX/static-assert.cpp
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaCXX/warn-bool-conversion.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-debug.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-pointer-access.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-in-container-span-construct.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
M clang/test/SemaCXX/warn-unused-value-cxx11.cpp
M clang/test/SemaObjC/warn-called-once.m
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
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M clang/test/SemaOpenCL/operators.cl
A clang/test/SemaTemplate/PR77189.cpp
M clang/test/SemaTemplate/class-template-spec.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/concepts-recovery-expr.cpp
M clang/test/SemaTemplate/deduction.cpp
A clang/test/SemaTemplate/default-parm-init.cpp
M clang/test/SemaTemplate/elaborated-type-specifier.cpp
M clang/test/SemaTemplate/nested-implicit-deduction-guides.cpp
M clang/test/SemaTemplate/qualified-id.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
M clang/tools/c-index-test/c-index-test.c
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
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M clang/tools/clang-repl/CMakeLists.txt
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/diagtool/TreeView.cpp
M clang/tools/driver/CMakeLists.txt
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/CIndexCodeCompletion.cpp
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M clang/tools/libclang/CXCursor.cpp
M clang/tools/libclang/CXExtractAPI.cpp
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A clang/unittests/AST/ASTDumperTest.cpp
M clang/unittests/AST/ASTImporterGenericRedeclTest.cpp
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M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
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M clang/unittests/Format/FormatTestObjC.cpp
M clang/unittests/Format/SortIncludesTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/Tooling/CompilationDatabaseTest.cpp
M clang/utils/TableGen/CMakeLists.txt
M clang/utils/TableGen/ClangAttrEmitter.cpp
A clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangDiagnosticsEmitter.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M clang/utils/perf-training/CMakeLists.txt
M clang/utils/perf-training/bolt.lit.cfg
M clang/utils/perf-training/bolt.lit.site.cfg.in
M clang/utils/perf-training/perf-helper.py
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
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M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/include/CMakeLists.txt
A compiler-rt/include/profile/instr_prof_interface.h
M compiler-rt/lib/asan/asan_descriptions.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/aarch64/sme-libc-routines.c
M compiler-rt/lib/builtins/cpu_model/aarch64.c
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/hwcap.inc
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/builtins/i386/chkstk.S
M compiler-rt/lib/builtins/int_lib.h
M compiler-rt/lib/builtins/x86_64/chkstk.S
M compiler-rt/lib/dfsan/dfsan_custom.cpp
M compiler-rt/lib/dfsan/done_abilist.txt
M compiler-rt/lib/dfsan/libc_ubuntu1404_abilist.txt
M compiler-rt/lib/hwasan/hwasan_report.cpp
M compiler-rt/lib/memprof/memprof_allocator.cpp
M compiler-rt/lib/memprof/memprof_allocator.h
M compiler-rt/lib/memprof/memprof_descriptions.cpp
M compiler-rt/lib/memprof/memprof_interceptors.cpp
M compiler-rt/lib/memprof/memprof_internal.h
M compiler-rt/lib/memprof/memprof_malloc_linux.cpp
M compiler-rt/lib/memprof/memprof_mapping.h
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingPlatformWindows.c
M compiler-rt/lib/profile/WindowsMMap.c
M compiler-rt/lib/profile/WindowsMMap.h
M compiler-rt/lib/sanitizer_common/sanitizer_atomic_clang_other.h
M compiler-rt/lib/sanitizer_common/sanitizer_atomic_clang_x86.h
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_hash.h
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_printer.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
M compiler-rt/lib/sanitizer_common/tests/sanitizer_bitvector_test.cpp
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/stack_depot.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/scudo/standalone/tests/tsd_test.cpp
M compiler-rt/lib/scudo/standalone/tsd_exclusive.h
M compiler-rt/lib/scudo/standalone/tsd_shared.h
M compiler-rt/lib/tsan/rtl/tsan_dispatch_defs.h
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
M compiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
M compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
M compiler-rt/test/CMakeLists.txt
M compiler-rt/test/asan/TestCases/alloca_loop_unpoisoning.cpp
A compiler-rt/test/builtins/Unit/sme-string-test.cpp
M compiler-rt/test/fuzzer/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/lit.common.configured.in
A compiler-rt/test/profile/Linux/instrprof-weak-symbol.c
A compiler-rt/test/profile/instrprof-api.c
R compiler-rt/test/sanitizer_common/TestCases/FreeBSD/hexdump.cc
A compiler-rt/test/sanitizer_common/TestCases/Linux/allocator_returns_null_std.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
M compiler-rt/test/tsan/java_finalizer2.cpp
A cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w32.cl
A cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w64.cl
A cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
A cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w64.cl
M flang/docs/AliasingAnalysisFIR.md
M flang/docs/Directives.md
M flang/docs/Extensions.md
M flang/docs/FIRArrayOperations.md
M flang/docs/FlangDriver.md
M flang/docs/FortranLLVMTestSuite.md
M flang/docs/HighLevelFIR.md
M flang/docs/Intrinsics.md
M flang/docs/OpenACC-descriptor-management.md
A flang/docs/OpenMP-descriptor-management.md
M flang/docs/Overview.md
M flang/docs/ParameterizedDerivedTypes.md
M flang/docs/PolymorphicEntities.md
M flang/docs/ProcedurePointer.md
M flang/docs/conf.py
M flang/docs/fstack-arrays.md
M flang/docs/index.md
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Common/Fortran.h
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/common.h
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Lower/ConvertCall.h
M flang/include/flang/Lower/OpenACC.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Lower/PFTBuilder.h
R flang/include/flang/Optimizer/Builder/Array.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/MutableBox.h
M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
A flang/include/flang/Optimizer/CodeGen/CodeGenOpenMP.h
M flang/include/flang/Optimizer/CodeGen/Target.h
M flang/include/flang/Optimizer/Dialect/FIRDialect.h
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Runtime/descriptor.h
M flang/include/flang/Runtime/extensions.h
M flang/include/flang/Runtime/io-api.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/tools.h
M flang/include/flang/Tools/CLOptions.inc
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Frontend/TextDiagnosticBuffer.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertProcedureDesignator.cpp
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/BoxValue.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
A flang/lib/Optimizer/CodeGen/CodeGenOpenMP.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
M flang/lib/Optimizer/Dialect/FIRDialect.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
A flang/lib/Optimizer/Transforms/OMPDescriptorMapInfoGen.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/definable.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/symbol.cpp
M flang/lib/Semantics/tools.cpp
M flang/module/iso_c_binding.f90
M flang/module/iso_fortran_env.f90
M flang/runtime/assign.cpp
M flang/runtime/descriptor.cpp
M flang/runtime/edit-output.cpp
M flang/runtime/execute.cpp
M flang/runtime/extensions.cpp
M flang/runtime/format-implementation.h
M flang/runtime/format.h
M flang/runtime/io-api.cpp
M flang/runtime/namelist.cpp
M flang/runtime/numeric.cpp
M flang/runtime/pointer.cpp
M flang/runtime/stat.cpp
M flang/runtime/stat.h
A flang/test/Analysis/AliasAnalysis/alias-analysis-8.fir
A flang/test/Driver/aarch64-outline-atomics.f90
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
A flang/test/Driver/func-attr-fast-math.f90
M flang/test/Driver/linker-flags.f90
M flang/test/Driver/prescanner-diag.f90
M flang/test/Driver/save-mlir-temps.f90
M flang/test/Driver/target-cpu-features.f90
A flang/test/Evaluate/bug78932.f90
M flang/test/Evaluate/folding02.f90
A flang/test/Evaluate/rewrite07.f90
A flang/test/Fir/OpenACC/legalize-data.fir
A flang/test/Fir/OpenACC/propagate-attr-folding.fir
M flang/test/Fir/boxproc-2.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
A flang/test/Fir/target-rewrite-target-cpu.fir
A flang/test/Fir/target-rewrite-target-features.fir
A flang/test/HLFIR/as_expr-codegen-polymorphic.fir
M flang/test/HLFIR/bufferize-poly-expr.fir
M flang/test/HLFIR/invalid.fir
A flang/test/HLFIR/maxloc-elemental.fir
A flang/test/HLFIR/minloc-elemental.fir
M flang/test/HLFIR/no-block-merging.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
A flang/test/Integration/aarch64-outline-atomics.f90
M flang/test/Lower/AMD/code-object-version.f90
M flang/test/Lower/HLFIR/array-ctor-character.f90
A flang/test/Lower/HLFIR/assumed-rank-iface-alloc-ptr.f90
A flang/test/Lower/HLFIR/assumed-rank-iface.f90
A flang/test/Lower/HLFIR/assumed-size-cray-pointee.f90
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/function-return-as-expr.f90
M flang/test/Lower/HLFIR/ignore-rank-unlimited-polymorphic.f90
A flang/test/Lower/HLFIR/ignore-type-assumed-shape.f90
M flang/test/Lower/HLFIR/minval.f90
A flang/test/Lower/HLFIR/proc-pointer-comp-in-parent.f90
M flang/test/Lower/HLFIR/procedure-pointer.f90
A flang/test/Lower/Intrinsics/acosd.f90
A flang/test/Lower/Intrinsics/asind.f90
M flang/test/Lower/Intrinsics/associated-proc-pointers.f90
A flang/test/Lower/Intrinsics/atan2d.f90
A flang/test/Lower/Intrinsics/atan2pi.f90
M flang/test/Lower/Intrinsics/atand.f90
A flang/test/Lower/Intrinsics/atanpi.f90
M flang/test/Lower/Intrinsics/c_loc.f90
A flang/test/Lower/Intrinsics/cosd.f90
M flang/test/Lower/Intrinsics/execute_command_line-optional.f90
M flang/test/Lower/Intrinsics/execute_command_line.f90
M flang/test/Lower/Intrinsics/lbound.f90
A flang/test/Lower/Intrinsics/signal.f90
A flang/test/Lower/Intrinsics/sind.f90
A flang/test/Lower/Intrinsics/sleep.f90
A flang/test/Lower/Intrinsics/system-optional.f90
A flang/test/Lower/Intrinsics/system.f90
M flang/test/Lower/Intrinsics/ubound.f90
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-data-operands.f90
M flang/test/Lower/OpenACC/acc-data.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-device-type.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
M flang/test/Lower/OpenACC/acc-exit-data.f90
M flang/test/Lower/OpenACC/acc-host-data.f90
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-kernels.f90
M flang/test/Lower/OpenACC/acc-loop-exit.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-parallel.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenACC/acc-routine.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenACC/acc-serial.f90
M flang/test/Lower/OpenACC/acc-update.f90
M flang/test/Lower/OpenACC/locations.f90
M flang/test/Lower/OpenMP/FIR/array-bounds.f90
M flang/test/Lower/OpenMP/FIR/if-clause.f90
M flang/test/Lower/OpenMP/FIR/loop-combined.f90
A flang/test/Lower/OpenMP/FIR/map-component-ref.f90
M flang/test/Lower/OpenMP/FIR/sections.f90
M flang/test/Lower/OpenMP/FIR/target.f90
M flang/test/Lower/OpenMP/FIR/target_cpu_features.f90
A flang/test/Lower/OpenMP/Todo/omp-do-simd-aligned.f90
A flang/test/Lower/OpenMP/Todo/omp-do-simd-linear.f90
A flang/test/Lower/OpenMP/Todo/omp-do-simd-safelen.f90
A flang/test/Lower/OpenMP/Todo/omp-do-simd-simdlen.f90
A flang/test/Lower/OpenMP/allocatable-array-bounds.f90
A flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/if-clause.f90
A flang/test/Lower/OpenMP/infinite-loop-in-construct.f90
M flang/test/Lower/OpenMP/loop-combined.f90
A flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/sections.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/target_cpu_features.f90
A flang/test/Lower/OpenMP/threadprivate-commonblock-use.f90
A flang/test/Lower/OpenMP/threadprivate-default-clause.f90
A flang/test/Lower/OpenMP/wsloop-reduction-max-2.f90
A flang/test/Lower/OpenMP/wsloop-unstructured.f90
M flang/test/Lower/allocatable-polymorphic.f90
M flang/test/Lower/array-expression-assumed-size.f90
M flang/test/Lower/cray-pointer.f90
M flang/test/Lower/derived-pointer-components.f90
A flang/test/Lower/derived-types-kind-params-2.f90
A flang/test/Lower/io-asynchronous.f90
M flang/test/Lower/io-statement-1.f90
M flang/test/Lower/nullify-polymorphic.f90
M flang/test/Lower/structure-constructors-alloc-comp.f90
A flang/test/Lower/target-features-amdgcn.f90
A flang/test/Lower/target-features-x86_64.f90
M flang/test/Preprocessing/include-comment.F90
A flang/test/Preprocessing/macro-in-include.F90
A flang/test/Preprocessing/pp134.F90
M flang/test/Semantics/OpenACC/acc-loop.f90
M flang/test/Semantics/OpenMP/copyprivate03.f90
M flang/test/Semantics/c_f_pointer.f90
A flang/test/Semantics/declarations08.f90
M flang/test/Semantics/definable01.f90
A flang/test/Semantics/execute_command_line.f90
A flang/test/Semantics/generic08.f90
M flang/test/Semantics/ignore_tkr01.f90
A flang/test/Semantics/ignore_tkr03.f90
A flang/test/Semantics/image_index01.f90
A flang/test/Semantics/image_index02.f90
M flang/test/Semantics/local-vs-global.f90
A flang/test/Semantics/modfile62.f90
A flang/test/Semantics/present01.f90
M flang/test/Semantics/resolve107.f90
A flang/test/Semantics/resolve122.f90
M flang/test/Semantics/resolve17.f90
M flang/test/Semantics/resolve18.f90
M flang/test/Semantics/resolve53.f90
M flang/test/Semantics/resolve54.f90
M flang/test/Semantics/resolve63.f90
M flang/test/Semantics/resolve65.f90
M flang/test/Semantics/symbol27.f90
A flang/test/Semantics/typeinfo08.f90
M flang/test/Transforms/loop-versioning.fir
A flang/test/Transforms/omp-descriptor-map-info-gen.fir
M flang/test/Transforms/simplifyintrinsics.fir
M flang/tools/bbc/bbc.cpp
M flang/tools/f18/flang-to-external-fc.in
M flang/tools/fir-opt/fir-opt.cpp
M flang/tools/tco/tco.cpp
M flang/unittests/Evaluate/expression.cpp
M flang/unittests/Evaluate/folding.cpp
M flang/unittests/Evaluate/intrinsics.cpp
M flang/unittests/Frontend/CMakeLists.txt
M flang/unittests/Optimizer/FIRContextTest.cpp
M flang/unittests/Runtime/CommandTest.cpp
M flang/unittests/Runtime/NumericalFormatTest.cpp
M libc/CMakeLists.txt
M libc/cmake/modules/CheckCompilerFeatures.cmake
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCFlagRules.cmake
M libc/cmake/modules/LLVMLibCLibraryRules.cmake
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/config/baremetal/arm/headers.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/baremetal/riscv/headers.txt
M libc/config/config.json
M libc/config/darwin/arm/headers.txt
M libc/config/darwin/x86_64/headers.txt
M libc/config/gpu/headers.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/api.td
M libc/config/linux/app.h
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/syscall_numbers.h.inc
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/dev/printf_behavior.rst
A libc/docs/gpu/rpc-diagram.svg
M libc/docs/gpu/rpc.rst
M libc/docs/gpu/testing.rst
M libc/docs/index.rst
A libc/docs/libc_search.rst
M libc/docs/math/index.rst
A libc/docs/stdbit.rst
M libc/fuzzing/stdlib/strtofloat_fuzz.cpp
M libc/include/CMakeLists.txt
M libc/include/errno.h.def
A libc/include/float.h.def
M libc/include/inttypes.h.def
A libc/include/limits.h.def
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/containerof-macro.h
A libc/include/llvm-libc-macros/float-macros.h
A libc/include/llvm-libc-macros/inttypes-macros.h
A libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
R libc/include/llvm-libc-macros/linux/sys-mman-macros.h
A libc/include/llvm-libc-macros/offsetof-macro.h
A libc/include/llvm-libc-macros/stdbit-macros.h
M libc/include/llvm-libc-macros/sys-mman-macros.h
A libc/include/llvm-libc-macros/sys-queue-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/float128.h
A libc/include/llvm-libc-types/struct_epoll_data.h
A libc/include/llvm-libc-types/struct_epoll_event.h
A libc/include/stdbit.h.def
A libc/include/sys/epoll.h.def
A libc/include/sys/queue.h
M libc/lib/CMakeLists.txt
M libc/spec/gnu_ext.td
M libc/spec/linux.td
M libc/spec/posix.td
M libc/spec/spec.td
M libc/spec/stdc.td
M libc/src/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/expected.h
M libc/src/__support/CPP/limits.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/DivisionAndRemainderOperations.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/FPUtil/NearestIntegerOperations.h
M libc/src/__support/FPUtil/NormalFloat.h
R libc/src/__support/FPUtil/XFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/arm/FEnvImpl.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/except_value_utils.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/FMod.h
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/FPUtil/riscv/FMA.h
M libc/src/__support/FPUtil/riscv/sqrt.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/src/__support/GPU/amdgpu/utils.h
M libc/src/__support/GPU/generic/utils.h
M libc/src/__support/GPU/nvptx/utils.h
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/__support/HashTable/bitmask.h
M libc/src/__support/HashTable/table.h
M libc/src/__support/RPC/rpc.h
M libc/src/__support/RPC/rpc_util.h
M libc/src/__support/UInt.h
M libc/src/__support/float_to_string.h
A libc/src/__support/intrusive_list.h
M libc/src/__support/macros/properties/CMakeLists.txt
M libc/src/__support/macros/properties/float.h
M libc/src/__support/math_extras.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/callonce.cpp
M libc/src/errno/CMakeLists.txt
M libc/src/errno/libc_errno.cpp
M libc/src/errno/libc_errno.h
M libc/src/math/CMakeLists.txt
A libc/src/math/ceilf128.h
A libc/src/math/floorf128.h
A libc/src/math/fmaxf128.h
A libc/src/math/fminf128.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acosf.cpp
M libc/src/math/generic/acoshf.cpp
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/atanhf.cpp
A libc/src/math/generic/ceilf128.cpp
M libc/src/math/generic/cosf.cpp
M libc/src/math/generic/coshf.cpp
M libc/src/math/generic/exp.cpp
M libc/src/math/generic/exp10.cpp
M libc/src/math/generic/exp10f_impl.h
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/exp2f_impl.h
M libc/src/math/generic/expf.cpp
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/expm1.cpp
M libc/src/math/generic/expm1f.cpp
A libc/src/math/generic/floorf128.cpp
A libc/src/math/generic/fmaxf128.cpp
A libc/src/math/generic/fminf128.cpp
M libc/src/math/generic/hypotf.cpp
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log2f.cpp
M libc/src/math/generic/logf.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/range_reduction_fma.h
A libc/src/math/generic/roundf128.cpp
M libc/src/math/generic/sincosf.cpp
M libc/src/math/generic/sinf.cpp
M libc/src/math/generic/sinhf.cpp
A libc/src/math/generic/sqrtf128.cpp
M libc/src/math/generic/tanf.cpp
A libc/src/math/generic/truncf128.cpp
M libc/src/math/gpu/vendor/amdgpu/platform.h
A libc/src/math/roundf128.h
A libc/src/math/sqrtf128.h
A libc/src/math/truncf128.h
M libc/src/sched/linux/CMakeLists.txt
M libc/src/search/CMakeLists.txt
A libc/src/search/insque.cpp
A libc/src/search/insque.h
A libc/src/search/remque.cpp
A libc/src/search/remque.h
M libc/src/signal/linux/CMakeLists.txt
M libc/src/spawn/linux/CMakeLists.txt
A libc/src/stdbit/CMakeLists.txt
A libc/src/stdbit/stdc_leading_ones_uc.cpp
A libc/src/stdbit/stdc_leading_ones_uc.h
A libc/src/stdbit/stdc_leading_ones_ui.cpp
A libc/src/stdbit/stdc_leading_ones_ui.h
A libc/src/stdbit/stdc_leading_ones_ul.cpp
A libc/src/stdbit/stdc_leading_ones_ul.h
A libc/src/stdbit/stdc_leading_ones_ull.cpp
A libc/src/stdbit/stdc_leading_ones_ull.h
A libc/src/stdbit/stdc_leading_ones_us.cpp
A libc/src/stdbit/stdc_leading_ones_us.h
A libc/src/stdbit/stdc_leading_zeros_uc.cpp
A libc/src/stdbit/stdc_leading_zeros_uc.h
A libc/src/stdbit/stdc_leading_zeros_ui.cpp
A libc/src/stdbit/stdc_leading_zeros_ui.h
A libc/src/stdbit/stdc_leading_zeros_ul.cpp
A libc/src/stdbit/stdc_leading_zeros_ul.h
A libc/src/stdbit/stdc_leading_zeros_ull.cpp
A libc/src/stdbit/stdc_leading_zeros_ull.h
A libc/src/stdbit/stdc_leading_zeros_us.cpp
A libc/src/stdbit/stdc_leading_zeros_us.h
A libc/src/stdbit/stdc_trailing_ones_uc.cpp
A libc/src/stdbit/stdc_trailing_ones_uc.h
A libc/src/stdbit/stdc_trailing_ones_ui.cpp
A libc/src/stdbit/stdc_trailing_ones_ui.h
A libc/src/stdbit/stdc_trailing_ones_ul.cpp
A libc/src/stdbit/stdc_trailing_ones_ul.h
A libc/src/stdbit/stdc_trailing_ones_ull.cpp
A libc/src/stdbit/stdc_trailing_ones_ull.h
A libc/src/stdbit/stdc_trailing_ones_us.cpp
A libc/src/stdbit/stdc_trailing_ones_us.h
A libc/src/stdbit/stdc_trailing_zeros_uc.cpp
A libc/src/stdbit/stdc_trailing_zeros_uc.h
A libc/src/stdbit/stdc_trailing_zeros_ui.cpp
A libc/src/stdbit/stdc_trailing_zeros_ui.h
A libc/src/stdbit/stdc_trailing_zeros_ul.cpp
A libc/src/stdbit/stdc_trailing_zeros_ul.h
A libc/src/stdbit/stdc_trailing_zeros_ull.cpp
A libc/src/stdbit/stdc_trailing_zeros_ull.h
A libc/src/stdbit/stdc_trailing_zeros_us.cpp
A libc/src/stdbit/stdc_trailing_zeros_us.h
M libc/src/stdio/printf_core/converter.cpp
M libc/src/stdio/printf_core/float_dec_converter.h
M libc/src/stdio/printf_core/int_converter.h
M libc/src/stdio/printf_core/parser.h
M libc/src/stdio/scanf_core/float_converter.cpp
M libc/src/sys/CMakeLists.txt
A libc/src/sys/auxv/CMakeLists.txt
A libc/src/sys/auxv/getauxval.h
A libc/src/sys/auxv/linux/CMakeLists.txt
A libc/src/sys/auxv/linux/getauxval.cpp
A libc/src/sys/epoll/CMakeLists.txt
A libc/src/sys/epoll/epoll_pwait.h
A libc/src/sys/epoll/epoll_pwait2.h
A libc/src/sys/epoll/epoll_wait.h
A libc/src/sys/epoll/linux/CMakeLists.txt
A libc/src/sys/epoll/linux/epoll_pwait.cpp
A libc/src/sys/epoll/linux/epoll_pwait2.cpp
A libc/src/sys/epoll/linux/epoll_wait.cpp
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/mincore.cpp
A libc/src/sys/mman/linux/mlock.cpp
A libc/src/sys/mman/linux/mlock2.cpp
A libc/src/sys/mman/linux/mlockall.cpp
A libc/src/sys/mman/linux/munlock.cpp
A libc/src/sys/mman/linux/munlockall.cpp
A libc/src/sys/mman/mincore.h
A libc/src/sys/mman/mlock.h
A libc/src/sys/mman/mlock2.h
A libc/src/sys/mman/mlockall.h
A libc/src/sys/mman/munlock.h
A libc/src/sys/mman/munlockall.h
R libc/src/threads/linux/call_once.cpp
R libc/src/threads/linux/thread_start_args.h.def
M libc/src/time/CMakeLists.txt
M libc/src/time/gpu/nanosleep.cpp
M libc/src/time/gpu/time_utils.h
M libc/src/time/mktime.cpp
M libc/src/time/time_utils.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/pread.cpp
M libc/src/unistd/linux/read.cpp
M libc/src/unistd/linux/sysconf.cpp
M libc/startup/gpu/CMakeLists.txt
M libc/startup/gpu/amdgpu/CMakeLists.txt
M libc/startup/gpu/nvptx/CMakeLists.txt
M libc/startup/linux/do_start.cpp
M libc/test/CMakeLists.txt
M libc/test/IntegrationTest/CMakeLists.txt
M libc/test/IntegrationTest/test.h
M libc/test/UnitTest/ErrnoSetterMatcher.h
M libc/test/UnitTest/FPMatcher.h
M libc/test/UnitTest/FuchsiaTest.h
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/LibcTest.h
A libc/test/include/CMakeLists.txt
A libc/test/include/stdbit_test.cpp
A libc/test/include/sys/queue_test.cpp
M libc/test/integration/src/pthread/pthread_create_test.cpp
M libc/test/integration/src/pthread/pthread_join_test.cpp
M libc/test/integration/src/unistd/getcwd_test.cpp
M libc/test/integration/startup/linux/tls_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/FPUtil/CMakeLists.txt
M libc/test/src/__support/FPUtil/dyadic_float_test.cpp
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/dirent/dirent_test.cpp
M libc/test/src/errno/errno_test.cpp
M libc/test/src/fcntl/creat_test.cpp
M libc/test/src/fcntl/openat_test.cpp
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/CeilTest.h
M libc/test/src/math/CopySignTest.h
M libc/test/src/math/FAbsTest.h
M libc/test/src/math/FDimTest.h
M libc/test/src/math/FMaxTest.h
M libc/test/src/math/FMinTest.h
M libc/test/src/math/FloorTest.h
M libc/test/src/math/FmaTest.h
M libc/test/src/math/FrexpTest.h
M libc/test/src/math/HypotTest.h
M libc/test/src/math/ILogbTest.h
M libc/test/src/math/LdExpTest.h
M libc/test/src/math/LogbTest.h
M libc/test/src/math/ModfTest.h
M libc/test/src/math/NextAfterTest.h
M libc/test/src/math/RIntTest.h
M libc/test/src/math/RemQuoTest.h
M libc/test/src/math/RoundTest.h
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/SqrtTest.h
M libc/test/src/math/TruncTest.h
M libc/test/src/math/acosf_test.cpp
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/cos_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/coshf_test.cpp
M libc/test/src/math/differential_testing/BinaryOpSingleOutputDiff.h
M libc/test/src/math/differential_testing/SingleInputSingleOutputDiff.h
M libc/test/src/math/erff_test.cpp
M libc/test/src/math/exhaustive/exhaustive_test.h
M libc/test/src/math/exhaustive/hypotf_test.cpp
M libc/test/src/math/exhaustive/sincosf_test.cpp
M libc/test/src/math/exp10_test.cpp
M libc/test/src/math/exp10f_test.cpp
M libc/test/src/math/exp2_test.cpp
M libc/test/src/math/exp2f_test.cpp
M libc/test/src/math/exp_test.cpp
M libc/test/src/math/expf_test.cpp
M libc/test/src/math/expm1_test.cpp
M libc/test/src/math/expm1f_test.cpp
M libc/test/src/math/log10_test.cpp
M libc/test/src/math/log10f_test.cpp
M libc/test/src/math/log1p_test.cpp
M libc/test/src/math/log1pf_test.cpp
M libc/test/src/math/log2_test.cpp
M libc/test/src/math/log2f_test.cpp
M libc/test/src/math/log_test.cpp
M libc/test/src/math/logf_test.cpp
M libc/test/src/math/powf_test.cpp
M libc/test/src/math/sin_test.cpp
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/math/sinhf_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/FDimTest.h
M libc/test/src/math/smoke/FMaxTest.h
M libc/test/src/math/smoke/FMinTest.h
M libc/test/src/math/smoke/FmaTest.h
M libc/test/src/math/smoke/HypotTest.h
M libc/test/src/math/smoke/ILogbTest.h
M libc/test/src/math/smoke/LdExpTest.h
M libc/test/src/math/smoke/LogbTest.h
M libc/test/src/math/smoke/ModfTest.h
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/math/smoke/RemQuoTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
M libc/test/src/math/smoke/acosf_test.cpp
M libc/test/src/math/smoke/acoshf_test.cpp
M libc/test/src/math/smoke/asinf_test.cpp
M libc/test/src/math/smoke/asinhf_test.cpp
M libc/test/src/math/smoke/atanf_test.cpp
M libc/test/src/math/smoke/atanhf_test.cpp
A libc/test/src/math/smoke/ceilf128_test.cpp
M libc/test/src/math/smoke/cosf_test.cpp
M libc/test/src/math/smoke/coshf_test.cpp
M libc/test/src/math/smoke/exp10f_test.cpp
M libc/test/src/math/smoke/exp2f_test.cpp
M libc/test/src/math/smoke/expf_test.cpp
M libc/test/src/math/smoke/expm1f_test.cpp
A libc/test/src/math/smoke/floorf128_test.cpp
A libc/test/src/math/smoke/fmaxf128_test.cpp
A libc/test/src/math/smoke/fminf128_test.cpp
A libc/test/src/math/smoke/generic_sqrtf128_test.cpp
M libc/test/src/math/smoke/nan_test.cpp
M libc/test/src/math/smoke/nanf_test.cpp
A libc/test/src/math/smoke/roundf128_test.cpp
M libc/test/src/math/smoke/sincosf_test.cpp
M libc/test/src/math/smoke/sinf_test.cpp
M libc/test/src/math/smoke/sinhf_test.cpp
A libc/test/src/math/smoke/sqrtf128_test.cpp
M libc/test/src/math/smoke/tanf_test.cpp
M libc/test/src/math/smoke/tanhf_test.cpp
A libc/test/src/math/smoke/truncf128_test.cpp
M libc/test/src/math/tan_test.cpp
M libc/test/src/math/tanf_test.cpp
M libc/test/src/math/tanhf_test.cpp
M libc/test/src/sched/affinity_test.cpp
M libc/test/src/sched/cpu_count_test.cpp
M libc/test/src/sched/get_priority_test.cpp
M libc/test/src/sched/param_and_scheduler_test.cpp
M libc/test/src/sched/sched_rr_get_interval_test.cpp
M libc/test/src/sched/yield_test.cpp
M libc/test/src/search/CMakeLists.txt
A libc/test/src/search/insque_test.cpp
M libc/test/src/signal/sigaltstack_test.cpp
M libc/test/src/signal/signal_test.cpp
M libc/test/src/signal/sigprocmask_test.cpp
A libc/test/src/stdbit/CMakeLists.txt
A libc/test/src/stdbit/stdc_leading_ones_uc_test.cpp
A libc/test/src/stdbit/stdc_leading_ones_ui_test.cpp
A libc/test/src/stdbit/stdc_leading_ones_ul_test.cpp
A libc/test/src/stdbit/stdc_leading_ones_ull_test.cpp
A libc/test/src/stdbit/stdc_leading_ones_us_test.cpp
A libc/test/src/stdbit/stdc_leading_zeros_uc_test.cpp
A libc/test/src/stdbit/stdc_leading_zeros_ui_test.cpp
A libc/test/src/stdbit/stdc_leading_zeros_ul_test.cpp
A libc/test/src/stdbit/stdc_leading_zeros_ull_test.cpp
A libc/test/src/stdbit/stdc_leading_zeros_us_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_uc_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ui_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ul_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ull_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_us_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_uc_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ui_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ul_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ull_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_us_test.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/fgetc_test.cpp
M libc/test/src/stdio/fgetc_unlocked_test.cpp
M libc/test/src/stdio/fgets_test.cpp
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/stdio/fopencookie_test.cpp
M libc/test/src/stdio/printf_core/converter_test.cpp
M libc/test/src/stdio/remove_test.cpp
M libc/test/src/stdio/setvbuf_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
M libc/test/src/stdio/sscanf_test.cpp
M libc/test/src/stdio/unlocked_fileop_test.cpp
M libc/test/src/stdlib/AtoiTest.h
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/StrtolTest.h
M libc/test/src/stdlib/atof_test.cpp
M libc/test/src/stdlib/strtod_test.cpp
M libc/test/src/stdlib/strtof_test.cpp
M libc/test/src/stdlib/strtoint32_test.cpp
M libc/test/src/stdlib/strtoint64_test.cpp
M libc/test/src/stdlib/strtold_test.cpp
M libc/test/src/string/strdup_test.cpp
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/auxv/CMakeLists.txt
A libc/test/src/sys/auxv/linux/CMakeLists.txt
A libc/test/src/sys/auxv/linux/getauxval_test.cpp
A libc/test/src/sys/epoll/CMakeLists.txt
A libc/test/src/sys/epoll/linux/CMakeLists.txt
A libc/test/src/sys/epoll/linux/epoll_pwait2_test.cpp
A libc/test/src/sys/epoll/linux/epoll_pwait_test.cpp
A libc/test/src/sys/epoll/linux/epoll_wait_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/madvise_test.cpp
A libc/test/src/sys/mman/linux/mincore_test.cpp
A libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/mmap_test.cpp
M libc/test/src/sys/mman/linux/mprotect_test.cpp
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
M libc/test/src/sys/prctl/linux/prctl_test.cpp
M libc/test/src/sys/random/linux/getrandom_test.cpp
M libc/test/src/sys/resource/getrlimit_setrlimit_test.cpp
M libc/test/src/sys/select/select_ui_test.cpp
M libc/test/src/sys/sendfile/sendfile_test.cpp
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/test/src/sys/socket/linux/socket_test.cpp
M libc/test/src/sys/stat/chmod_test.cpp
M libc/test/src/sys/stat/fchmod_test.cpp
M libc/test/src/sys/stat/fchmodat_test.cpp
M libc/test/src/sys/stat/fstat_test.cpp
M libc/test/src/sys/stat/lstat_test.cpp
M libc/test/src/sys/stat/mkdirat_test.cpp
M libc/test/src/sys/stat/stat_test.cpp
M libc/test/src/termios/termios_test.cpp
M libc/test/src/time/CMakeLists.txt
M libc/test/src/time/asctime_r_test.cpp
M libc/test/src/time/asctime_test.cpp
M libc/test/src/time/clock_test.cpp
M libc/test/src/time/gmtime_test.cpp
M libc/test/src/time/mktime_test.cpp
M libc/test/src/time/nanosleep_test.cpp
M libc/test/src/time/time_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/access_test.cpp
M libc/test/src/unistd/chdir_test.cpp
M libc/test/src/unistd/dup2_test.cpp
M libc/test/src/unistd/dup3_test.cpp
M libc/test/src/unistd/dup_test.cpp
M libc/test/src/unistd/fchdir_test.cpp
M libc/test/src/unistd/ftruncate_test.cpp
M libc/test/src/unistd/isatty_test.cpp
M libc/test/src/unistd/link_test.cpp
M libc/test/src/unistd/linkat_test.cpp
M libc/test/src/unistd/lseek_test.cpp
M libc/test/src/unistd/pread_pwrite_test.cpp
M libc/test/src/unistd/read_write_test.cpp
M libc/test/src/unistd/readlink_test.cpp
M libc/test/src/unistd/readlinkat_test.cpp
M libc/test/src/unistd/rmdir_test.cpp
M libc/test/src/unistd/symlink_test.cpp
M libc/test/src/unistd/symlinkat_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/test/src/unistd/truncate_test.cpp
M libc/test/src/unistd/unlink_test.cpp
M libc/test/src/unistd/unlinkat_test.cpp
M libc/utils/MPFRWrapper/CMakeLists.txt
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/gpu/server/CMakeLists.txt
M libc/utils/gpu/server/rpc_server.h
M libclc/CMakeLists.txt
M libcxx/.clang-format
M libcxx/.clang-tidy
M libcxx/CMakeLists.txt
M libcxx/benchmarks/CMakeLists.txt
M libcxx/benchmarks/ContainerBenchmarks.h
A libcxx/benchmarks/exception_ptr.bench.cpp
M libcxx/benchmarks/vector_operations.bench.cpp
M libcxx/cmake/caches/Generic-cxx20.cmake
M libcxx/cmake/caches/Generic-cxx23.cmake
M libcxx/cmake/caches/Generic-cxx26.cmake
M libcxx/cmake/caches/Generic-hardening-mode-extensive.cmake
M libcxx/cmake/caches/Generic-no-exceptions.cmake
M libcxx/cmake/caches/Generic-no-experimental.cmake
M libcxx/cmake/caches/Generic-no-filesystem.cmake
M libcxx/cmake/caches/Generic-no-localization.cmake
M libcxx/cmake/caches/Generic-no-random_device.cmake
M libcxx/cmake/caches/Generic-no-threads.cmake
M libcxx/cmake/caches/Generic-no-tzdb.cmake
M libcxx/cmake/caches/Generic-no-unicode.cmake
M libcxx/cmake/caches/Generic-no-wide-characters.cmake
M libcxx/docs/BuildingLibcxx.rst
M libcxx/docs/Contributing.rst
M libcxx/docs/DesignDocs/ThreadingSupportAPI.rst
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/Hardening.rst
M libcxx/docs/Modules.rst
A libcxx/docs/ReleaseNotes.rst
M libcxx/docs/ReleaseNotes/18.rst
A libcxx/docs/ReleaseNotes/19.rst
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M libcxx/docs/Status/Cxx20Issues.csv
M libcxx/docs/Status/Cxx23Issues.csv
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M libcxx/docs/Status/Cxx2cIssues.csv
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M libcxx/docs/Status/Ranges.rst
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M libcxx/docs/UsingLibcxx.rst
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M libcxx/include/__algorithm/comp_ref_type.h
M libcxx/include/__algorithm/copy_move_common.h
M libcxx/include/__algorithm/equal.h
M libcxx/include/__algorithm/equal_range.h
M libcxx/include/__algorithm/fold.h
M libcxx/include/__algorithm/in_found_result.h
M libcxx/include/__algorithm/in_fun_result.h
M libcxx/include/__algorithm/in_in_out_result.h
M libcxx/include/__algorithm/in_in_result.h
M libcxx/include/__algorithm/in_out_out_result.h
M libcxx/include/__algorithm/includes.h
M libcxx/include/__algorithm/next_permutation.h
M libcxx/include/__algorithm/nth_element.h
M libcxx/include/__algorithm/partial_sort.h
M libcxx/include/__algorithm/partial_sort_copy.h
M libcxx/include/__algorithm/partition.h
M libcxx/include/__algorithm/prev_permutation.h
M libcxx/include/__algorithm/pstl_any_all_none_of.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/transform_reduce.h
M libcxx/include/__algorithm/pstl_copy.h
M libcxx/include/__algorithm/pstl_count.h
M libcxx/include/__algorithm/pstl_equal.h
M libcxx/include/__algorithm/pstl_fill.h
M libcxx/include/__algorithm/pstl_find.h
M libcxx/include/__algorithm/pstl_for_each.h
M libcxx/include/__algorithm/pstl_generate.h
M libcxx/include/__algorithm/pstl_is_partitioned.h
M libcxx/include/__algorithm/pstl_merge.h
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M libcxx/include/__algorithm/pstl_replace.h
M libcxx/include/__algorithm/pstl_rotate_copy.h
M libcxx/include/__algorithm/pstl_sort.h
M libcxx/include/__algorithm/pstl_stable_sort.h
M libcxx/include/__algorithm/pstl_transform.h
M libcxx/include/__algorithm/ranges_all_of.h
M libcxx/include/__algorithm/ranges_any_of.h
M libcxx/include/__algorithm/ranges_binary_search.h
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M libcxx/include/__algorithm/ranges_copy_backward.h
M libcxx/include/__algorithm/ranges_copy_if.h
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M libcxx/include/__algorithm/ranges_count_if.h
M libcxx/include/__algorithm/ranges_ends_with.h
M libcxx/include/__algorithm/ranges_equal.h
M libcxx/include/__algorithm/ranges_equal_range.h
M libcxx/include/__algorithm/ranges_fill.h
M libcxx/include/__algorithm/ranges_fill_n.h
M libcxx/include/__algorithm/ranges_find.h
M libcxx/include/__algorithm/ranges_find_end.h
M libcxx/include/__algorithm/ranges_find_first_of.h
M libcxx/include/__algorithm/ranges_find_if.h
M libcxx/include/__algorithm/ranges_find_if_not.h
M libcxx/include/__algorithm/ranges_for_each.h
M libcxx/include/__algorithm/ranges_for_each_n.h
M libcxx/include/__algorithm/ranges_generate.h
M libcxx/include/__algorithm/ranges_generate_n.h
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M libcxx/include/__algorithm/ranges_inplace_merge.h
M libcxx/include/__algorithm/ranges_is_heap.h
M libcxx/include/__algorithm/ranges_is_heap_until.h
M libcxx/include/__algorithm/ranges_is_partitioned.h
M libcxx/include/__algorithm/ranges_is_permutation.h
M libcxx/include/__algorithm/ranges_is_sorted.h
M libcxx/include/__algorithm/ranges_is_sorted_until.h
M libcxx/include/__algorithm/ranges_iterator_concept.h
M libcxx/include/__algorithm/ranges_lexicographical_compare.h
M libcxx/include/__algorithm/ranges_lower_bound.h
M libcxx/include/__algorithm/ranges_make_heap.h
M libcxx/include/__algorithm/ranges_max.h
M libcxx/include/__algorithm/ranges_max_element.h
M libcxx/include/__algorithm/ranges_merge.h
M libcxx/include/__algorithm/ranges_min.h
M libcxx/include/__algorithm/ranges_min_element.h
M libcxx/include/__algorithm/ranges_minmax_element.h
M libcxx/include/__algorithm/ranges_mismatch.h
M libcxx/include/__algorithm/ranges_move.h
M libcxx/include/__algorithm/ranges_move_backward.h
M libcxx/include/__algorithm/ranges_next_permutation.h
M libcxx/include/__algorithm/ranges_none_of.h
M libcxx/include/__algorithm/ranges_nth_element.h
M libcxx/include/__algorithm/ranges_partial_sort.h
M libcxx/include/__algorithm/ranges_partial_sort_copy.h
M libcxx/include/__algorithm/ranges_partition.h
M libcxx/include/__algorithm/ranges_partition_copy.h
M libcxx/include/__algorithm/ranges_partition_point.h
M libcxx/include/__algorithm/ranges_pop_heap.h
M libcxx/include/__algorithm/ranges_prev_permutation.h
M libcxx/include/__algorithm/ranges_push_heap.h
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M libcxx/include/__algorithm/ranges_remove_copy.h
M libcxx/include/__algorithm/ranges_remove_copy_if.h
M libcxx/include/__algorithm/ranges_remove_if.h
M libcxx/include/__algorithm/ranges_replace.h
M libcxx/include/__algorithm/ranges_replace_copy.h
M libcxx/include/__algorithm/ranges_replace_copy_if.h
M libcxx/include/__algorithm/ranges_replace_if.h
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M libcxx/include/__algorithm/ranges_sample.h
M libcxx/include/__algorithm/ranges_search_n.h
M libcxx/include/__algorithm/ranges_set_difference.h
M libcxx/include/__algorithm/ranges_set_intersection.h
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M libcxx/include/__algorithm/ranges_stable_partition.h
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M libcxx/include/__algorithm/set_symmetric_difference.h
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M libcxx/include/__algorithm/three_way_comp_ref_type.h
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M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__atomic/is_always_lock_free.h
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M libcxx/include/__condition_variable/condition_variable.h
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M libcxx/include/__expected/expected.h
M libcxx/include/__filesystem/directory_iterator.h
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A libcxx/include/__numeric/saturation_arithmetic.h
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M libcxx/test/libcxx/containers/views/mdspan/layout_right/assert.ctor.layout_stride.pass.cpp
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M libcxx/test/libcxx/containers/views/mdspan/layout_stride/assert.ctor.extents_array.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_stride/assert.ctor.extents_span.non_unique.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_stride/assert.ctor.extents_span.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_stride/assert.index_operator.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_stride/assert.stride.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/mdspan/assert.conversion.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/mdspan/assert.index_operator.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/mdspan/assert.size.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.cons/assert.iter_sent.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.cons/assert.iter_size.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.cons/assert.other_span.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.cons/assert.range.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.elem/assert.back.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.elem/assert.front.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.elem/assert.op_idx.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.sub/assert.first.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.sub/assert.last.pass.cpp
M libcxx/test/libcxx/containers/views/views.span/span.sub/assert.subspan.pass.cpp
M libcxx/test/libcxx/fuzzing/random.pass.cpp
M libcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp
M libcxx/test/libcxx/input.output/filesystems/class.path/path.itr/assert.iterator.pass.cpp
M libcxx/test/libcxx/iterators/assert.advance.pass.cpp
M libcxx/test/libcxx/iterators/assert.next.pass.cpp
M libcxx/test/libcxx/iterators/assert.prev.pass.cpp
M libcxx/test/libcxx/iterators/bounded_iter/dereference.pass.cpp
M libcxx/test/libcxx/iterators/predef.iterators/counted.iterator/assert.pass.cpp
M libcxx/test/libcxx/iterators/predef.iterators/iterators.common/assert.pass.cpp
A libcxx/test/libcxx/language.support/support.dynamic/assert.nothrow_new_not_overridden_fno_exceptions.pass.cpp
A libcxx/test/libcxx/language.support/support.dynamic/new_dont_return_nullptr.pass.cpp
M libcxx/test/libcxx/module_std.gen.py
M libcxx/test/libcxx/module_std_compat.gen.py
A libcxx/test/libcxx/numerics/numarray/class.gslice.array/assert.get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.gslice.array/get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.indirect.array/assert.get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.indirect.array/get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.mask.array/assert.get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.mask.array/get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.slice.array/assert.get.pass.cpp
A libcxx/test/libcxx/numerics/numarray/class.slice.array/get.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.chunk.by/assert.begin.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.chunk.by/assert.find-next.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.chunk.by/assert.find-prev.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.chunk.by/range.chunk.by.iter/assert.deref.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.chunk.by/range.chunk.by.iter/assert.increment.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.drop.while/assert.begin.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.lazy.split/range.lazy.split.inner/assert.equal.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer/assert.equal.pass.cpp
A libcxx/test/libcxx/selftest/modules/no-modules.sh.cpp
A libcxx/test/libcxx/selftest/modules/std-and-std.compat-module.sh.cpp
A libcxx/test/libcxx/selftest/modules/std-module.sh.cpp
A libcxx/test/libcxx/selftest/modules/std.compat-module.sh.cpp
M libcxx/test/libcxx/strings/basic.string/string.access/assert.back.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.access/assert.cback.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.access/assert.cfront.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.access/assert.cindex.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.access/assert.front.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.access/assert.index.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.capacity/allocation_size.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.capacity/max_size.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.modifiers/assert.erase_iter.null.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.modifiers/assert.pop_back.pass.cpp
R libcxx/test/libcxx/strings/char.traits/char.traits.specializations/arbitrary_char_type.deprecated.verify.cpp
R libcxx/test/libcxx/strings/char.traits/char.traits.specializations/arbitrary_char_type.pass.cpp
M libcxx/test/libcxx/strings/string.view/assert.ctor.length.pass.cpp
M libcxx/test/libcxx/strings/string.view/assert.ctor.pointer.pass.cpp
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/libcxx/thread/futures/futures.promise/assert.set_exception.pass.cpp
M libcxx/test/libcxx/thread/futures/futures.promise/assert.set_exception_at_thread_exit.pass.cpp
M libcxx/test/libcxx/thread/thread.barrier/assert.arrive.pass.cpp
M libcxx/test/libcxx/thread/thread.barrier/assert.ctor.pass.cpp
M libcxx/test/libcxx/thread/thread.latch/assert.arrive_and_wait.pass.cpp
M libcxx/test/libcxx/thread/thread.latch/assert.count_down.pass.cpp
M libcxx/test/libcxx/thread/thread.latch/assert.ctor.pass.cpp
M libcxx/test/libcxx/thread/thread.semaphore/assert.ctor.pass.cpp
M libcxx/test/libcxx/thread/thread.semaphore/assert.release.pass.cpp
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
A libcxx/test/libcxx/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/libcxx/utilities/assert.exception_guard.no_exceptions.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/assert.arrow.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/assert.deref.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/assert.error.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/no_unique_address.compile.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/assert.deref.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/assert.error.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/no_unique_address.compile.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
A libcxx/test/libcxx/utilities/expected/expected.void/value.lwg3940.verify.cpp
A libcxx/test/libcxx/utilities/format/format.functions/ascii.pass.cpp
A libcxx/test/libcxx/utilities/format/format.functions/escaped_output.ascii.pass.cpp
A libcxx/test/libcxx/utilities/memory/ptr.align/assume_aligned.const_eval.verify.cpp
M libcxx/test/libcxx/utilities/optional/optional.object/optional.object.observe/assert.dereference.pass.cpp
M libcxx/test/libcxx/utilities/optional/optional.object/optional.object.observe/assert.op_arrow.pass.cpp
M libcxx/test/libcxx/utilities/tuple/tuple.tuple/tuple.assign/tuple_array_template_depth.pass.cpp
A libcxx/test/libcxx/utilities/utility/mem.res/mem.poly.allocator.class/mem.poly.allocator.mem/assert.deallocate.pass.cpp
R libcxx/test/libcxx/utilities/utility/mem.res/mem.poly.allocator.class/mem.poly.allocator.mem/debug.deallocate.pass.cpp
R libcxx/test/lit.local.cfg
M libcxx/test/std/algorithms/alg.nonmodifying/alg.contains/ranges.contains.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/find.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.fold/left_folds.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.foreach/pstl.for_each_n.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/assign.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/compare_exchange_strong.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/compare_exchange_weak.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/ctor.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/exchange.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_add.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_sub.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/load.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/lockfree.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/notify_all.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/notify_one.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.float.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.minus_equals.pass.cpp
R libcxx/test/std/utilities/format/format.functions/ascii.pass.cpp
R libcxx/test/std/utilities/format/format.functions/escaped_output.ascii.pass.cpp
Log Message:
-----------
Merge branch 'main' into users/teqdruid/mlir/python-liveobjects
Compare: https://github.com/llvm/llvm-project/compare/8becc6ac2379...0a312e870855
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