[all-commits] [llvm/llvm-project] 5452cb: [AArch64] Indirect tail-calls cannot use x16 with ...

[ostannard via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5452cbc4a6bfb905fedeacaa6f27895e249da1e5
      https://github.com/llvm/llvm-project/commit/5452cbc4a6bfb905fedeacaa6f27895e249da1e5
  Author: ostannard <oliver.stannard at arm.com>
  Date:   2024-02-08 (Thu, 08 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/branch-target-enforcement-indirect-calls.ll
    M llvm/test/CodeGen/AArch64/kcfi-bti.ll

  Log Message:
  -----------
  [AArch64] Indirect tail-calls cannot use x16 with pac-ret+pc (#81020)

When using -mbranch-protection=pac-ret+pc, x16 is used in the function
epilogue to hold the address of the signing instruction. This is used by
a HINT instruction which can only use x16, so we can't change this. This
means that we can't use it to hold the function pointer for an indirect
tail-call.

There is existing code to force indirect tail-calls to use x16 or x17
when BTI is enabled, so there are now 4 combinations:

bti  pac-ret+pc  Valid function pointer registers
off  off         Any non callee-saved register
on   off         x16 or x17
off  on          Any non callee-saved register except x16
on   on          x17