[all-commits] [llvm/llvm-project] 62c352: [CLANG] Fix INF/NAN warning. (#80290)
Florian Hahn via All-commits
all-commits at lists.llvm.org
Wed Feb 7 03:06:02 PST 2024
Branch: refs/heads/users/fhahn/vplan-uniform-scalar-lanes
Home: https://github.com/llvm/llvm-project
Commit: 62c352e13c145b5606ace88ecbe9164ff011b5cf
https://github.com/llvm/llvm-project/commit/62c352e13c145b5606ace88ecbe9164ff011b5cf
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDocs.td
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/test/Sema/warn-infinity-nan-disabled-lnx.cpp
M clang/test/Sema/warn-infinity-nan-disabled-win.cpp
Log Message:
-----------
[CLANG] Fix INF/NAN warning. (#80290)
In https://github.com/llvm/llvm-project/pull/76873 a warning was added
when the macros INFINITY and NAN are used in binary expressions when
-menable-no-nans or -menable-no-infs are used. If the user uses an
option that nullifies these two options, the warning will still be
generated. This patch adds an additional information to the warning
comment to let the user know about this. It also suppresses the warning
when #ifdef INFINITY, #ifdef NAN, #ifdef NAN or #ifndef NAN are used in
the code.
Commit: d5a3de4aeef4f4f1c52692533ddb9fdf45aef9d3
https://github.com/llvm/llvm-project/commit/d5a3de4aeef4f4f1c52692533ddb9fdf45aef9d3
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/stdbit-macros.h
M libc/spec/stdc.td
M libc/src/stdbit/CMakeLists.txt
A libc/src/stdbit/stdc_trailing_zeros_uc.cpp
A libc/src/stdbit/stdc_trailing_zeros_uc.h
A libc/src/stdbit/stdc_trailing_zeros_ui.cpp
A libc/src/stdbit/stdc_trailing_zeros_ui.h
A libc/src/stdbit/stdc_trailing_zeros_ul.cpp
A libc/src/stdbit/stdc_trailing_zeros_ul.h
A libc/src/stdbit/stdc_trailing_zeros_ull.cpp
A libc/src/stdbit/stdc_trailing_zeros_ull.h
A libc/src/stdbit/stdc_trailing_zeros_us.cpp
A libc/src/stdbit/stdc_trailing_zeros_us.h
M libc/test/include/stdbit_test.cpp
M libc/test/src/stdbit/CMakeLists.txt
A libc/test/src/stdbit/stdc_trailing_zeros_uc_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ui_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ul_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ull_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_us_test.cpp
Log Message:
-----------
[libc][stdbit] implement stdc_trailing_zeros (C23) (#80344)
Commit: ca1da36aec963c5504ae7ae2e834b37856c476db
https://github.com/llvm/llvm-project/commit/ca1da36aec963c5504ae7ae2e834b37856c476db
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/inttypes.h.def
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/inttypes-macros.h
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/sprintf_test.cpp
Log Message:
-----------
[libc] add inttypes macros (#80726)
Standard file:
https://pubs.opengroup.org/onlinepubs/9699919799.2018edition/
Notice that we are not quite the same as other implementations:
1. MUSL: https://github.com/bminor/musl/blob/master/include/inttypes.h
2. GLIBC:
https://github.com/bminor/glibc/blob/bbd248ac0d75efdef8fe61ea69b1fb25fb95b6e7/stdlib/inttypes.h#L57
3. CheriBSD:
https://github.com/CTSRD-CHERI/cheribsd/blob/698d1636dd1fe2322e5bc7029e415928c80b76b1/sys/arm64/include/_inttypes.h
fixes #80186
Commit: 364f781344e11d6a781ebdd0a4d9689bc9c51cfb
https://github.com/llvm/llvm-project/commit/364f781344e11d6a781ebdd0a4d9689bc9c51cfb
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-logic-of-compare.mir
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
Log Message:
-----------
[GlobalIsel] Combine logic of icmps (#77855)
Inspired by InstCombinerImpl::foldAndOrOfICmpsUsingRanges with some
adaptations to MIR.
Commit: b1acb7a315e903ee340a33dbc9b2b61b0450bb67
https://github.com/llvm/llvm-project/commit/b1acb7a315e903ee340a33dbc9b2b61b0450bb67
Author: stephenpeckham <118857872+stephenpeckham at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/XCOFF.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/XCOFFObjectWriter.cpp
M llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll
M llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll
M llvm/test/CodeGen/PowerPC/aix-available-externally-linkage-fun.ll
M llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
M llvm/test/CodeGen/PowerPC/aix-extern.ll
M llvm/test/CodeGen/PowerPC/aix-filename-c.ll
M llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
M llvm/test/CodeGen/PowerPC/aix-filename-f.ll
M llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
M llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
M llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
M llvm/test/CodeGen/PowerPC/aix-relro-section.ll
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
M llvm/test/CodeGen/PowerPC/aix-tls-ie-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large32.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc32.ll
M llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
M llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
M llvm/test/CodeGen/PowerPC/aix-weak.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-cold.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
M llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll
M llvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-td.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-tw.ll
M llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll
M llvm/test/CodeGen/PowerPC/toc-data-const.ll
M llvm/test/MC/PowerPC/aix-file-symbols.s
M llvm/test/tools/llvm-objdump/XCOFF/symbol-table.test
Log Message:
-----------
[XCOFF] Add compiler version to an auxiliary symbol table entry (#80162)
C_FILE symbols. To match the behavior of the assembler and the legacy
compiler, this includes using the generic ".file" name for the C_FILE
symbol and generating the actual file name in an auxiliary entry.
Commit: d4c5acac99e83ffa12d2d720c9e502a181cbd7ea
https://github.com/llvm/llvm-project/commit/d4c5acac99e83ffa12d2d720c9e502a181cbd7ea
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/ExecutionEngine/GDBRegistrationListener.cpp
Log Message:
-----------
[ExecutionEngine] Fix a couple of typos (NFC)
Commit: d6c7253d32e4bdff619c39708170f1c1fa01ff95
https://github.com/llvm/llvm-project/commit/d6c7253d32e4bdff619c39708170f1c1fa01ff95
Author: David Stuttard <david.stuttard at amd.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
Log Message:
-----------
[AMDGPU] Add pal metadata 3.0 support to callable pal funcs (#67104)
PAL Metadata 3.0 introduces an explicit structure in metadata for the
programmable registers written out by the compiler backend.
The previous approach used opaque registers which can change between different
architectures and required encoding the bitfield information in the backend,
which may change between versions.
This change is an extension the previously added support - which only handled
entry functions. This adds support for all functions.
The change also includes some re-factoring to separate common code.
Commit: 40fd17a90d4dcfb4bada663d73111a43c4c6ccb1
https://github.com/llvm/llvm-project/commit/40fd17a90d4dcfb4bada663d73111a43c4c6ccb1
Author: hlivin01 <110549819+hlivin01 at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/test/CodeGen/aarch64-neon-intrinsics.c
Log Message:
-----------
[ARM][AARCH64][NEON]: Wrong return type of NEON intrinsic vqrshrunh_n_s16, vqrshruns_n_s32, and vqrshrund_n_s64 in arm_neon.h (#80819)
* fixes https://github.com/llvm/llvm-project/issues/71751
* changed return types in the table gen file responsible for generation
of the problematic intrinsics
* this is to ensure that the return type for the functions is the same
as specified in the Arm Developer Documentation and avoid casting
bugs
(https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrshrunh_n_s16)
* updated lit tests to reflect the change in return type, worth noting
that LLVM does not seems to differentiate signed and unsigned ints in
the IR, hence the change in type cannot be checked in IR as far as I am
aware
Commit: 9ea34be3e4c9deeabfc21cced1acb7f9593ffe93
https://github.com/llvm/llvm-project/commit/9ea34be3e4c9deeabfc21cced1acb7f9593ffe93
Author: Vinayak Dev <104419489+vinayakdsci at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/MC/MCObjectStreamer.cpp
Log Message:
-----------
[MC]: Fix typo in MCObjectStreamer.cpp (#80856)
Fixes a typo in llvm/lib/MC/MCObjectStreamer.cpp introduced in #80162
Commit: e5638c5a00682243b1ee012d7dd8292aa221dff8
https://github.com/llvm/llvm-project/commit/e5638c5a00682243b1ee012d7dd8292aa221dff8
Author: choikwa <5455710+choikwa at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
[AMDGPU] Use correct number of bits needed for div/rem shrinking (#80622)
There was an error where dividend of type i64 and actual used number of
bits of 32 fell into path that assumes only 24 bits being used. Check
that AtLeast field is used correctly when using computeNumSignBits and
add necessary extend/trunc for 32 bits path.
Regolden and update testcases.
@jrbyrnes @bcahoon @arsenm @rampitec
Commit: 36e8db7d8c9183c66363e76517772b074b4f53be
https://github.com/llvm/llvm-project/commit/36e8db7d8c9183c66363e76517772b074b4f53be
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Extract main part of GetGEPCostDiff to a function, NFC.
Commit: 388548359f5049b88a9738d8a9e67691503fbdef
https://github.com/llvm/llvm-project/commit/388548359f5049b88a9738d8a9e67691503fbdef
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/unittests/TestingSupport/TestUtilities.cpp
M lldb/unittests/TestingSupport/TestUtilities.h
Log Message:
-----------
[lldb][unittest] Add call_once flag to initialize debugger (#80786)
I tried adding a new unit test to the core test
suite (https://github.com/llvm/llvm-project/pull/79533) but it broke the
test suite on AArch64 Linux due to hitting an assertion for calling
`Debugger::Initialize` more than once. When the unit test suite is
invoked as a standalone binary the test suite state is shared, and
`Debugger::Initialize` gets called in `DiagnosticEventTest.cpp` before
being called in `ProgressReportTest.cpp`.
`DiagnosticEventTest.cpp` uses a call_once flag to initialize the
debugger but it's local to that test. This commit adds a once_flag to
`TestUtilities` so that `Debugger::Initialize` can be called once by the
tests that use it.
Commit: 299e5fef9dee3f2d3af8f9162075b8f1cfa34446
https://github.com/llvm/llvm-project/commit/299e5fef9dee3f2d3af8f9162075b8f1cfa34446
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Simplify/unify vectors for scattered/vectorized loads from
gathers, NFC.
Commit: 6ce418113746c1d8a85012d1f8e22270eb5fdaf1
https://github.com/llvm/llvm-project/commit/6ce418113746c1d8a85012d1f8e22270eb5fdaf1
Author: Jan Patrick Lehr <jplehr at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M openmp/libomptarget/test/lit.cfg
Log Message:
-----------
[OpenMP] HSA_ENABLE_SDMA visible in libomptarget tests (#80860)
Enable the environment variable inside the test environment. This allows
to disable SDMA engine transfers as a potential mitigation of flaky
OpenMP offloading tests on AMDGPU.
Motivated by the open ticket https://github.com/ROCm/ROCm/issues/2616
about a missed synchronization signal.
Commit: 93a2a8cb7f6ab815849e8320bff54c965edd09e7
https://github.com/llvm/llvm-project/commit/93a2a8cb7f6ab815849e8320bff54c965edd09e7
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
A clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
Log Message:
-----------
Fix a crash in clang::isGetterOfRefCounted by checking nullptr in tryToFindPtrOrigin (#80768)
Commit: 56900278b578b4f7beedb8ac1e52c541d347f401
https://github.com/llvm/llvm-project/commit/56900278b578b4f7beedb8ac1e52c541d347f401
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/unittests/Core/DiagnosticEventTest.cpp
Log Message:
-----------
[lldb][unittest] Use shared once_flag in DiagnosticEventTest (#80788)
Incorporates the changes from
https://github.com/llvm/llvm-project/pull/80786 to use a once_flag from
`TestUtilities` instead of a local flag in order to prevent hitting an
assertion that the debugger was initialized again in another test.
Commit: a628f68a9c4ce6f3dcd0c8bb3650db45671ed15a
https://github.com/llvm/llvm-project/commit/a628f68a9c4ce6f3dcd0c8bb3650db45671ed15a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Format/clang-format-ignore.cpp
Log Message:
-----------
Revert "[clang] Mark clang-format-ignore.cpp as unsupported on Windows"
This reverts commit dc61ebb44c11d2f5d03b7dd9cb80a0644a30775e.
See https://github.com/llvm/llvm-project/pull/76733#issuecomment-1890311152.
Commit: 8ea858b96787578e814723a009f443808f446378
https://github.com/llvm/llvm-project/commit/8ea858b96787578e814723a009f443808f446378
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/Analysis/TypeMetadataUtils.h
M llvm/lib/Analysis/TypeMetadataUtils.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
Log Message:
-----------
[CallPromotionUtil] See through function alias when devirtualizing a virtual call on an alloca. (#80736)
- Extract utility function from
`DevirtModule::tryFindVirtualCallTargets` [1], which sees through an alias to a function. Call this utility function in
the WPD callsite.
- For type profiling work, this helper function will be used by indirect-call-promotion pass to find the function pointer at a specified vtable offset (an example in [2])
[1] https://github.com/llvm/llvm-project/blob/b99163fe8feeacba7797d5479bbcd5d8f327dd2d/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp#L1069-L1082
[2] https://github.com/minglotus-6/llvm-project/blob/77a0ef12de82d11f448f7f9de6f2dcf87d9b74af/llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp#L347
Commit: 6b2fd7aed66d592738f26c76caa8fff95e168598
https://github.com/llvm/llvm-project/commit/6b2fd7aed66d592738f26c76caa8fff95e168598
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll
M llvm/test/CodeGen/Mips/compactbranches/unsafe-in-forbidden-slot.ll
M llvm/test/CodeGen/Mips/indirect-jump-hazard/jumptables.ll
M llvm/test/CodeGen/Mips/jump-table-mul.ll
M llvm/test/CodeGen/Mips/pseudo-jump-fill.ll
Log Message:
-----------
[MIPS] Use generic isBlockOnlyReachableByFallthrough (#80799)
FastISel may create a redundant BGTZ terminal which fallthroughes.
```
BGTZ %2:gpr32, %bb.1, implicit-def $at
bb.1.bb1:
; predecessors: %bb.0
```
The `!I->isBarrier()` check in
MipsAsmPrinter::isBlockOnlyReachableByFallthrough
will incorrectly not print a label, leading to a `Undefined temporary
symbol `
error when we try assembling the output assembly file. See the updated
`Fast-ISel/pr40325.ll` and
https://github.com/rust-lang/rust/issues/108835
In addition, the `SwitchInst` condition is too conservative and prints
many unneeded labels (see the updated tests).
Just use the generic isBlockOnlyReachableByFallthrough, updated by
commit 1995b9fead62f2f6c0ad217bd00ce3184f741fdb for SPARC, which also
handles MIPS.
Commit: cca49663a56d90f6773f140269940d606aa61430
https://github.com/llvm/llvm-project/commit/cca49663a56d90f6773f140269940d606aa61430
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/fast-isel-fcmp.ll
M llvm/test/CodeGen/X86/fast-isel-ret-ext.ll
M llvm/test/CodeGen/X86/keylocker-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/xaluo.ll
M llvm/test/CodeGen/X86/xmulo.ll
M llvm/test/DebugInfo/X86/convert-debugloc.ll
Log Message:
-----------
[FastISel][X86] Use getTypeForExtReturn in GetReturnInfo. (#80803)
The comment and code here seems to match getTypeForExtReturn. The
history shows that at the time this code was added, similar code existed
in SelectionDAGBuilder. SelectionDAGBuiler code has since been
refactored into getTypeForExtReturn.
This patch makes FastISel match SelectionDAGBuilder.
The test changes are because X86 has customization of
getTypeForExtReturn. So now we only extend returns to i8.
Stumbled onto this difference by accident.
Commit: 2a4f715b0797f235b58f6dfefbc369c2374c44c1
https://github.com/llvm/llvm-project/commit/2a4f715b0797f235b58f6dfefbc369c2374c44c1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVScheduleV.td
Log Message:
-----------
[RISCV] Adjust a few vector scheduler class names. NFC (#80795)
Shortening Iota to Iot seemed strange to me.
I also remove the M from VMIota and VMIdx. The instruction for viota
does have an m at the end of it, but vid.v does not. The M didn't seem
very important for viota.
Commit: 0fb9f68bae4743dbabbccf3bbc575ac569730840
https://github.com/llvm/llvm-project/commit/0fb9f68bae4743dbabbccf3bbc575ac569730840
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
Log Message:
-----------
[SelectionDAG] Use getRegisterType instead of getTypeToTransformTo in ComputePHILiveOutRegInfo. (#80773)
Since we used getNumRegisters right before this, I think this is the
correct interface we should be using here.
I'm experimenting with making i32 legal on RISC-V 64, but using i64 for
the register type between basic blocks. This was one of the first issues
I found trying to do that.
Commit: 1833de3ee364a996d03bb23b19fe472e3e2ddf3b
https://github.com/llvm/llvm-project/commit/1833de3ee364a996d03bb23b19fe472e3e2ddf3b
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/test/Transforms/HotColdSplit/split-out-dbg-label.ll
M llvm/test/Transforms/IROutliner/gvn-phi-debug.ll
Log Message:
-----------
[Extractor][DebugInfo] Don't pick DebugLocs from dbg intrinsics (#80863)
When picking the source location for a branch instruction in the
CodeExtractor, we can end up picking the source location of a debugging
intrinsic. This never makes sense because any variable assignment
information (or labels) might originate from completely different
lexical scopes that have been inlined, and also makes the line tables
change between -g and -gmlt. Fix this by skipping debug intrinsics when
looking for branch source locations.
Detected because of test differences with RemoveDIs, the non-intrinsinc
form of debug-info -- fixing in intrinsic form to avoid there being
spurious test differences when we turn it on.
Commit: 6eb7273b11e6a3ec7c5ddb2d55bc585a25c0a923
https://github.com/llvm/llvm-project/commit/6eb7273b11e6a3ec7c5ddb2d55bc585a25c0a923
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/TextAPI/BinaryReader/DylibReader.cpp
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
Log Message:
-----------
[readtapi] Ensure universal dylibs record the same input path location across slices (#80875)
resolves: https://github.com/llvm/llvm-project/issues/80868
Commit: 2faeea313fef284fa933e7adb1d4c44a33e943e5
https://github.com/llvm/llvm-project/commit/2faeea313fef284fa933e7adb1d4c44a33e943e5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add Ssqosid support to -march. (#80747)
Commit: c7d181cc67a7af122835bc51159baa0eb6c5ac7c
https://github.com/llvm/llvm-project/commit/c7d181cc67a7af122835bc51159baa0eb6c5ac7c
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[llvm][unittests] Put human-readable names on TargetParserTests. NFC (#80749)
Before:
```
[----------] 65 tests from AArch64CPUTests/AArch64CPUTestFixture
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/0
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/0 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/1
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/1 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/2
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/2 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/3
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/3 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/4
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/4 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/5
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/5 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/6
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/6 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/7
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/7 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/8
...
```
After:
```
[----------] 65 tests from AArch64CPUTests/AArch64CPUTestFixture
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a34
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a34 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a35
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a35 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a53
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a53 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a55
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a55 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a510
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a510 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a520
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a520 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a57
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a57 (0 ms)
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65 (0 ms)
...
```
Which improves the experience of finding and running this:
```
$ ./unittests/TargetParser/TargetParserTests --gtest_filter=AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65
Note: Google Test filter = AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65
[==========] Running 1 test from 1 test suite.
[----------] Global test environment set-up.
[----------] 1 test from AArch64CPUTests/AArch64CPUTestFixture
[ RUN ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65
[ OK ] AArch64CPUTests/AArch64CPUTestFixture.testAArch64CPU/cortex_a65 (0 ms)
[----------] 1 test from AArch64CPUTests/AArch64CPUTestFixture (0 ms total)
[----------] Global test environment tear-down
[==========] 1 test from 1 test suite ran. (0 ms total)
[ PASSED ] 1 test.
```
Commit: a4531108da358500939af95b53794591432aaf74
https://github.com/llvm/llvm-project/commit/a4531108da358500939af95b53794591432aaf74
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/test/Transforms/Util/Debugify/loc-only-original-mode.ll
Log Message:
-----------
[DebugInfo][RemoveDIs] Extend intrinsic-conversion in debugify (#80861)
A while back the entry/exit points of debugify were instrumented with
conversion functions to/from non-intrinsic-form debug-info. This is the
path of least resistance to incrementally converting parts of LLVM to
use the new format. However, it turns out that debugify registers
callbacks with the pass manager and can be fed non-intrinsic form
debug-info. Thus: this patch wraps each of the four major debugify
functions with the convertion utilities, and extends test coverage to a
test that exposes this problem.
(An alternative would be to put this code in the callback lambdas, but
then it would be fighting pass manager abstractions of what type the IR
has).
Handily debugify has been designed to record the /meaning/ of debug-info
rather than take pointers to intrinsics and the like, so the storage
mechanism for debug-info is transparent to it!
Commit: 33cfc1341fab1af8d0f2a8270332fcc91895f473
https://github.com/llvm/llvm-project/commit/33cfc1341fab1af8d0f2a8270332fcc91895f473
Author: Davide Italiano <davidino at fb.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[github][CODEOWNERS] Add BOLT.
Commit: f2508d0a406c8978636eafeb9a23e15984e68836
https://github.com/llvm/llvm-project/commit/f2508d0a406c8978636eafeb9a23e15984e68836
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][Docs] Use double underscore for external links in RISCVUsage.rst.
Using a single underscore creates a reference target. If the target
name has the same name as another link, we get a "Duplicate target name"
warning. This is currently happening for Ssqosid.
Using __ prevents this. I've converted all links so no one trips over
this in the future.
One link was missing any underscores so wasn't a link at all in the
generated html.
Commit: 5ac2320824fd545a0d746a1d989543ec4bbd03fa
https://github.com/llvm/llvm-project/commit/5ac2320824fd545a0d746a1d989543ec4bbd03fa
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/src/errno/libc_errno.cpp
M libc/src/errno/libc_errno.h
Log Message:
-----------
[libc][NFC] Fix extraneous namespace on Errno (#80894)
The Errno type doesn't need to be explicitly namespaced now that it's
enclosed in a namespace.
Commit: a8ab8306069e8e53b5148ceec7624d7d36ffb459
https://github.com/llvm/llvm-project/commit/a8ab8306069e8e53b5148ceec7624d7d36ffb459
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/unittests/Core/CMakeLists.txt
A lldb/unittests/Core/ProgressReportTest.cpp
Log Message:
-----------
Reland "[lldb][progress][NFC] Add unit test for progress reports" (#80791)
This file was previously approved and merged from this PR:
https://github.com/llvm/llvm-project/pull/79533 but caused a test
failure on the Linux AArch64 bots due to hitting an assertion that
`Debugger::Initialize` was already called.
To fix this, this commit uses the
changes made here: https://github.com/llvm/llvm-project/pull/80786 to
use a shared call_once flag to initialize the debugger.
Commit: cdd9221489ec4ed6afc0e5146c2fae4daa8ab260
https://github.com/llvm/llvm-project/commit/cdd9221489ec4ed6afc0e5146c2fae4daa8ab260
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/umulo-square.ll
Log Message:
-----------
[InstCombine] Simplify the overflow result of `umulov X, X` (#80796)
This patch does the following folds if only the overflow result is used:
```
extractvalue (umul.with.overflow iN X, X), 1 -> icmp ugt X, 2^(N/2)-1
```
Alive2: https://alive2.llvm.org/ce/z/a8yPC6
Commit: 6812bc40bd6c70f7cae10d1e0a2aeac31cfaef03
https://github.com/llvm/llvm-project/commit/6812bc40bd6c70f7cae10d1e0a2aeac31cfaef03
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/src/__support/float_to_string.h
Log Message:
-----------
[libc] Fix off by one in long double buffer size (#80889)
The size for the long double BLOCK_BUFFER_LEN is calculated based on the
properties of the long double type. Somewhere in the calculation, the
result was mis-rounded so that the buffer was one element too small.
This patch fixes the issue and adds asserts to catch it sooner in the
future.
Commit: 5f87957fefb21d454f2fd7e6b4891350170d8690
https://github.com/llvm/llvm-project/commit/5f87957fefb21d454f2fd7e6b4891350170d8690
Author: Adam Magier <83226568+AdamMagierFOSS at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
A clang/test/CodeGen/ubsan-shift-bitint.c
Log Message:
-----------
[clang][CodeGen][UBSan] Fixing shift-exponent generation for _BitInt (#80515)
Testing the shift-exponent check with small width _BitInt values exposed
a bug in ScalarExprEmitter::GetWidthMinusOneValue when using the result
to determine valid exponent sizes. False positives were reported for
some left shifts when width(LHS)-1 > range(RHS) and false negatives were
reported for right shifts when value(RHS) > range(LHS). This patch caps
the maximum value of GetWidthMinusOneValue to fit within range(RHS) to
fix the issue with left shifts and fixes a code generation in EmitShr to
fix the issue with right shifts and renames the function to
GetMaximumShiftAmount to better reflect the new behaviour.
Fixes #80135.
Co-authored-by: Adam Magier <adam.magier at ericsson.com>
Commit: c6691f689e9aa787b809fd3493bae8a5ca845cea
https://github.com/llvm/llvm-project/commit/c6691f689e9aa787b809fd3493bae8a5ca845cea
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/pread.cpp
Log Message:
-----------
[libc] Fix pread under msan (#80893)
The pread function wasn't properly unpoisoning its result under msan,
causing test failures downstream when I tried to roll it out. This patch
adds the msan unpoison call that fixes the issue.
Commit: ce00fdc91cb7a466054c3ffd8788ae2f9f5100f3
https://github.com/llvm/llvm-project/commit/ce00fdc91cb7a466054c3ffd8788ae2f9f5100f3
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Driver/wasm-features.c
M clang/test/Preprocessor/wasm-target-features.c
Log Message:
-----------
[WebAssembly] Cleanup feature tests (#80780)
This adds missing features to the tests and removes a stale feature
(unimplemented_simd128) from them.
Commit: 5b780c8c6c558ec283a9eec485a4f172df0f9fe1
https://github.com/llvm/llvm-project/commit/5b780c8c6c558ec283a9eec485a4f172df0f9fe1
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/lib/Sema/SemaOverload.cpp
M clang/test/Frontend/fixed_point_errors.cpp
Log Message:
-----------
Diagnose invalid fixed point conversion (#80763)
Commit: 5ce2f73b2e5e6664d74b49ee45f11505f8306577
https://github.com/llvm/llvm-project/commit/5ce2f73b2e5e6664d74b49ee45f11505f8306577
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/stack-tagging-dbg.ll
Log Message:
-----------
[DebugInfo][RemoveDIs] Add some missing test coverage
In github PR #78731 it looks like I added test coverage for RemoveDIs to
either the wrong test, or not enough. Adding
--try-experimental-debuginfo-iterators to this particular test is enough to
restore some coverage it seems.
Commit: c13e271a38363d354294e2af1651470bed8facb3
https://github.com/llvm/llvm-project/commit/c13e271a38363d354294e2af1651470bed8facb3
Author: Bhuminjay Soni <Soni5Happy at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.cpp
A clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/use-std-min-max.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/use-std-min-max.cpp
Log Message:
-----------
Add clang-tidy check to suggest replacement of conditional statement with std::min/std::max (#77816)
This pull request fixes #64914 where author suggests adding a
readability check to propose the replacement of conditional statements
with std::min/std::max for improved code readability. Additionally,
reference is made to PyLint's similar checks:
[consider-using-min-builtin](https://pylint.pycqa.org/en/latest/user_guide/messages/refactor/consider-using-min-builtin.html)
and
[consider-using-max-builtin](https://pylint.pycqa.org/en/latest/user_guide/messages/refactor/consider-using-max-builtin.html)
Commit: e197b957ce1061cb1bfbd586b703065367cce5dc
https://github.com/llvm/llvm-project/commit/e197b957ce1061cb1bfbd586b703065367cce5dc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
Log Message:
-----------
[RISCV] Fix typo in call to clearFeatureBits.
We had "+zca" instead of "zca". The previous line used "c", not "+c".
This may not be a functional change. I think the function we pass this
to strips any '+' or '-'.
Commit: 8bb827c0e67e51adba1252d23edc58197e025cf7
https://github.com/llvm/llvm-project/commit/8bb827c0e67e51adba1252d23edc58197e025cf7
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
A llvm/test/Verifier/verify-dwarf-no-operands.ll
Log Message:
-----------
Add test for iterating over MDNode operands when they are empty (#80737)
With e8512786fedbfa6ddba70ceddc29d7122173ba5e the for loop that iterates
over MDNode operands was changed to a range-based for loop. This change
surfaces a bug where if the result of MD->operands() is an ArrayRef that
has a size of 0, then iterating over that ArrayRef leads to a
segmentation fault, due to accessing invalid addresses.
This was reverted with 6ce03ff3fef8fb6fa9afe8eb22c6d98bced26d48 but this
test should be added to test that codepath in the future.
Commit: 4858e9c9feb94d65acdb284fc2eaa5fe131c6584
https://github.com/llvm/llvm-project/commit/4858e9c9feb94d65acdb284fc2eaa5fe131c6584
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
A llvm/test/Transforms/InstCombine/fcmp-range-check-idiom.ll
Log Message:
-----------
[InstCombine] Canonicalize the fcmp range check idiom into `fabs + fcmp` (#76367)
This patch canonicalizes the fcmp range check idiom into `fabs + fcmp`
since the canonicalized form is better than the original form for the
backends.
Godbolt: https://godbolt.org/z/x3eqPb1fz
```
and (fcmp olt/ole/ult/ule x, C), (fcmp ogt/oge/ugt/uge x, -C) --> fabs(x) olt/ole/ult/ule C
or (fcmp ogt/oge/ugt/uge x, C), (fcmp olt/ole/ult/ule x, -C) --> fabs(x) ogt/oge/ugt/uge C
```
Alive2: https://alive2.llvm.org/ce/z/MRtoYq
Commit: 90e8dc0f7cbd09cc653b497eb2dfc68edd800f48
https://github.com/llvm/llvm-project/commit/90e8dc0f7cbd09cc653b497eb2dfc68edd800f48
Author: stephenpeckham <118857872+stephenpeckham at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess2.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
Log Message:
-----------
Fix failing testcases (#80902)
Commit: 672fb27b267edc5dec4939b0295c8eebcdc57467
https://github.com/llvm/llvm-project/commit/672fb27b267edc5dec4939b0295c8eebcdc57467
Author: Yitzhak Mandelbaum <ymand at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/unittests/Analysis/FlowSensitive/SignAnalysisTest.cpp
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
Log Message:
-----------
[clang][dataflow] Add new `join` API and replace existing `merge` implementations. (#80361)
This patch adds a new interface for the join operation, now properly
called `join`. Originally, the framework offered a single `merge`
operation, which could serve either as a join or a widening. In
practice, though we found this conflation didn't work for non-trivial
anlyses, and split of the widening operation (`widen`). This change
completes the transition by introducing a proper `join` with strict join
semantics.
In the process, it drops an odd (and often misused) aspect of `merge`
wherein callees could implictly instruct the framework to drop the
current entry by returning `false`. This features was never used
correctly in analyses and doesn't belong in a join operation, so it is
omitted.
---------
Co-authored-by: Dmitri Gribenko <gribozavr at gmail.com>
Co-authored-by: martinboehme <mboehme at google.com>
Commit: 4607f385e005b3792b5669683d2c9b50d83e4e61
https://github.com/llvm/llvm-project/commit/4607f385e005b3792b5669683d2c9b50d83e4e61
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Log Message:
-----------
[RISCV] Use hasStdExtCOrZca instead of FeatureStdExtC to determine NOP size in RISCVAsmPrinter.cpp.
Found while auditing places where we only check C and not Zca.
Commit: 3f1e95a9d4cc1fdb933390247d0bd4391cf93f60
https://github.com/llvm/llvm-project/commit/3f1e95a9d4cc1fdb933390247d0bd4391cf93f60
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/test/AST/ms-constexpr.cpp
Log Message:
-----------
[clang][Interp] consider "MS constexpr" functions as well
This implements the minimum amout of support for this feature
to get the test/AST/ms-constexpr.cpp test working. More has to
be added to get SemaCXX tests to work.
Commit: cd0d11be7a6de335dcfcf2788a97d915f017e25e
https://github.com/llvm/llvm-project/commit/cd0d11be7a6de335dcfcf2788a97d915f017e25e
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/M68k/Alloc/dyn_alloca_aligned.ll
M llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll
M llvm/test/CodeGen/M68k/Arith/add.ll
M llvm/test/CodeGen/M68k/Arith/bitwise.ll
M llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
M llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll
M llvm/test/CodeGen/M68k/Atomics/load-store.ll
M llvm/test/CodeGen/M68k/CConv/c-args-inreg.ll
M llvm/test/CodeGen/M68k/CConv/c-args.ll
M llvm/test/CodeGen/M68k/CConv/fastcc-args.ll
M llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
M llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll
M llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
M llvm/test/CodeGen/M68k/CodeModel/medium-static.ll
M llvm/test/CodeGen/M68k/CodeModel/small-pic.ll
M llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
M llvm/test/CodeGen/M68k/CodeModel/small-static.ll
M llvm/test/CodeGen/M68k/Control/cmp.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
M llvm/test/CodeGen/M68k/inline-asm.ll
M llvm/test/CodeGen/M68k/link-unlnk.ll
M llvm/test/CodeGen/M68k/reserved-regs.ll
M llvm/test/CodeGen/M68k/varargs.ll
Log Message:
-----------
[M68k] Convert tests to opaque pointers (NFC)
Commit: 423ac3d9ee82ff48da91b35ec80497089bc55b9e
https://github.com/llvm/llvm-project/commit/423ac3d9ee82ff48da91b35ec80497089bc55b9e
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/CSKY/atomic-cmpxchg-flag.ll
M llvm/test/CodeGen/CSKY/atomic-cmpxchg.ll
M llvm/test/CodeGen/CSKY/atomic-load-store.ll
M llvm/test/CodeGen/CSKY/atomic-rmw.ll
M llvm/test/CodeGen/CSKY/call-16bit.ll
M llvm/test/CodeGen/CSKY/call.ll
M llvm/test/CodeGen/CSKY/constantpool.ll
M llvm/test/CodeGen/CSKY/dwarf-eh.ll
M llvm/test/CodeGen/CSKY/fpu/ldst-d.ll
M llvm/test/CodeGen/CSKY/fpu/ldst-f.ll
M llvm/test/CodeGen/CSKY/frameaddr-returnaddr.ll
M llvm/test/CodeGen/CSKY/indirectbr.ll
M llvm/test/CodeGen/CSKY/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/CSKY/inline-asm-f-constraint-f.ll
M llvm/test/CodeGen/CSKY/inline-asm.ll
M llvm/test/CodeGen/CSKY/ldst-i.ll
M llvm/test/CodeGen/CSKY/tls-models.ll
Log Message:
-----------
[CSKY] Convert tests to opaque pointers (NFC)
Commit: 1c22d3f55df852985c155742bbe96ab5e86aa6f0
https://github.com/llvm/llvm-project/commit/1c22d3f55df852985c155742bbe96ab5e86aa6f0
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/CodeGen/ARC/addrmode.ll
M llvm/test/CodeGen/ARC/call.ll
M llvm/test/CodeGen/ARC/ldst.ll
Log Message:
-----------
[ARC] Convert tests to opaque pointers (NFC)
Commit: 92b33822e989884d29465d34769b07d78aeb1a84
https://github.com/llvm/llvm-project/commit/92b33822e989884d29465d34769b07d78aeb1a84
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir
M llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
M llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir
M llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir
M llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
M llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir
M llvm/test/DebugInfo/MIR/ARM/if-coverter-call-site-info.mir
M llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
M llvm/test/DebugInfo/MIR/ARM/param-reg-const-mix.mir
M llvm/test/DebugInfo/MIR/ARM/split-superreg-complex.mir
M llvm/test/DebugInfo/MIR/ARM/split-superreg-piece.mir
M llvm/test/DebugInfo/MIR/ARM/split-superreg.mir
M llvm/test/DebugInfo/MIR/Hexagon/dbgcall-site-instr-before-bundled-call.mir
M llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir
M llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir
M llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir
M llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir
M llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir
M llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
M llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
M llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir
M llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir
M llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-copy-sub-reg.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation-64bit.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-delay-slot-interpretation.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu-64bit.mir
M llvm/test/DebugInfo/MIR/Mips/dbg-call-site-param-addiu.mir
M llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
M llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
M llvm/test/DebugInfo/MIR/X86/avoid-single-entry-value-location.mir
M llvm/test/DebugInfo/MIR/X86/backup-entry-values-usage.mir
M llvm/test/DebugInfo/MIR/X86/call-site-gnu-vs-dwarf5-attrs.mir
M llvm/test/DebugInfo/MIR/X86/clobbered-fragments.mir
M llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg-multiple-defs.mir
M llvm/test/DebugInfo/MIR/X86/dbg-call-site-spilled-arg.mir
M llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
M llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
M llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir
M llvm/test/DebugInfo/MIR/X86/dbgcall-site-reference.mir
M llvm/test/DebugInfo/MIR/X86/dbgcall-site-two-fwd-reg-defs.mir
M llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir
M llvm/test/DebugInfo/MIR/X86/debug-entry-value-operation.mir
M llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
M llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-movements.mir
M llvm/test/DebugInfo/MIR/X86/dvl-livedebugvars-stackptr.mir
M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
M llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
M llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks.mir
M llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks2.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
M llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir
M llvm/test/DebugInfo/MIR/X86/machinesink.mir
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
M llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
M llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
M llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir
M llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir
M llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir
M llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
M llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
Log Message:
-----------
[DebugInfo/MIR] Convert tests to opaque pointers (NFC)
Link: https://discourse.llvm.org/t/enabling-opaque-pointers-by-default/61322
Commit: cc55af777a19b69f466875683655810f5d485386
https://github.com/llvm/llvm-project/commit/cc55af777a19b69f466875683655810f5d485386
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/Sema/struct-cast.c
Log Message:
-----------
[clang][Interp] Only check ComparisonCategoryInfo in C++ (#80131)
Binary operators are also of struct type in C, when assigning. Don't try to get the ComparisonCategoryInfo in that case.
Commit: 3a05e01d1a76984fe1532bd237edbbb7ed9db6ea
https://github.com/llvm/llvm-project/commit/3a05e01d1a76984fe1532bd237edbbb7ed9db6ea
Author: Fangrui Song <i at maskray.me>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
M llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
M llvm/test/DebugInfo/AArch64/fallthrough-branch.ll
M llvm/test/DebugInfo/AArch64/frameindices.ll
M llvm/test/DebugInfo/AArch64/machine-outliner.ll
M llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
M llvm/test/DebugInfo/ARM/machine-cp-updates-dbg-reg.mir
M llvm/test/DebugInfo/COFF/function-options.ll
M llvm/test/DebugInfo/COFF/global_rust.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/thunk.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/COFF/types-basic.ll
M llvm/test/DebugInfo/COFF/types-cvarargs.ll
M llvm/test/DebugInfo/COFF/types-data-members.ll
M llvm/test/DebugInfo/COFF/vftables.ll
M llvm/test/DebugInfo/COFF/virtual-methods.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/dse-after-memcpyopt-merge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten-offset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/id.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/inline-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/memset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/storemerge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/licm/multi-exit.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/loop-deletion/dead-loop.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/memcpyopt/merge-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mldst-motion/diamond.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/remove-redundant-fwd-scan-linked.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/empty-block.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/speculated-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/alloca-single-slice.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/complex.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag-2.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/id.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memcpy.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/rewrite.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/unspecified-var-size.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/track-assignments.ll
M llvm/test/DebugInfo/Generic/import-inlined-declaration.ll
M llvm/test/DebugInfo/Generic/licm-hoist-debug-loc.ll
M llvm/test/DebugInfo/Generic/licm-hoist-intrinsic-debug-loc.ll
M llvm/test/DebugInfo/Generic/split-dwarf-local-import.ll
M llvm/test/DebugInfo/MSP430/dwarf-basics.ll
M llvm/test/DebugInfo/MSP430/fp-vla-callee-saved.ll
M llvm/test/DebugInfo/X86/DW_AT_calling-convention.ll
M llvm/test/DebugInfo/X86/PR37234.ll
M llvm/test/DebugInfo/X86/containing-type-extension-rust.ll
M llvm/test/DebugInfo/X86/dbg-value-list-selectiondag-salvage.ll
M llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir
M llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/debug-loc-asan.mir
M llvm/test/DebugInfo/X86/debug-loc-frame.ll
M llvm/test/DebugInfo/X86/debug-loc-offset.mir
M llvm/test/DebugInfo/X86/dw_op_minus.mir
M llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll
M llvm/test/DebugInfo/X86/fragment-offset-order.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
M llvm/test/DebugInfo/X86/linkage-name.ll
M llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
M llvm/test/DebugInfo/X86/live-debug-vars-discard-invalid.mir
M llvm/test/DebugInfo/X86/live-debug-vars-dse.mir
M llvm/test/DebugInfo/X86/live-debug-vars-intervals.mir
M llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir
M llvm/test/DebugInfo/X86/location-range.mir
M llvm/test/DebugInfo/X86/pr19307.mir
M llvm/test/DebugInfo/X86/prolog-params.mir
M llvm/test/DebugInfo/X86/single-location-inlined-param.mir
M llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir
M llvm/test/DebugInfo/X86/single-location.mir
M llvm/test/DebugInfo/assignment-tracking/X86/lower-offset-expression.ll
M llvm/test/DebugInfo/assignment-tracking/X86/lower-to-value.ll
M llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill-cfg.ll
M llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill.ll
M llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location-2.ll
M llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location.ll
Log Message:
-----------
[DebugInfo] Convert tests to opaque pointers (NFC)
Link: https://discourse.llvm.org/t/enabling-opaque-pointers-by-default/61322
Commit: 51a3019e4d096d93820f921af20d7a0bf3fffc48
https://github.com/llvm/llvm-project/commit/51a3019e4d096d93820f921af20d7a0bf3fffc48
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
A clang/test/CXX/drs/dr28xx.cpp
Log Message:
-----------
[Clang][Sema] Implement proposed resolution for CWG2847 (#80899)
Per the approved resolution for CWG2847, [temp.expl.spec] p8 will state:
> An explicit specialization shall not have a trailing _requires-clause_ unless it declares a function template.
We already implement this _partially_ insofar that a diagnostic is issued upon instantiation of `A<int>` in the following example:
```
template<typename>
struct A
{
template<typename>
void f();
template<>
void f<int>() requires true; // error: non-templated function cannot have a requires clause
};
template struct A<int>; // note: in instantiation of template class 'A<int>' requested here
```
This patch adds a bespoke diagnostic for such declarations, and moves the point of diagnosis for non-templated functions with trailing requires-clauses from `CheckFunctionDeclaration` to `ActOnFunctionDeclarator` (there is no point in diagnosing this during instantiation since we already have all the necessary information when parsing the declaration).
Commit: 12aad1a53c7ae70b88e7cb3fa3d04b6a3532f669
https://github.com/llvm/llvm-project/commit/12aad1a53c7ae70b88e7cb3fa3d04b6a3532f669
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M openmp/libomptarget/src/omptarget.cpp
A openmp/libomptarget/test/mapping/auto_zero_copy_globals.cpp
Log Message:
-----------
[OpenMP] Support for global variables when in auto zero-copy. (#80876)
When building without unified_shared_memory, global variables are
declared in the device binary and allocated upon loading onto GPU
memory. However, when running in zero-copy mode (same as with
unified_shared_memory) D2H and H2D copies for mapped local and global
variables are turned off. This patch turns back on H2D and D2H copies
when they refer to global variables, enabling an application built
without unified_shared_memory to work correctly with global variables
when run under automatic zero-copy.
Co-authored-by: Doru Bercea <doru.bercea at amd.com>
Co-authored-by: Jan-Patrick Lehr <janpatrick.lehr at amd.com>
Commit: 4c9717c3bee3525c2bf0251469191cc65e246a14
https://github.com/llvm/llvm-project/commit/4c9717c3bee3525c2bf0251469191cc65e246a14
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
M mlir/test/Dialect/OpenACC/legalize-data.mlir
Log Message:
-----------
[mlir][openacc] Add private/reduction in legalize data pass (#80882)
This is a follow up to #80351 and adds private and reduction operands
from acc.loop, acc.parallel and acc.serial operations.
Commit: e96ba2509d5a1a3ba4ebba806828fc62cd2c34de
https://github.com/llvm/llvm-project/commit/e96ba2509d5a1a3ba4ebba806828fc62cd2c34de
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Log Message:
-----------
[gn build] Port c13e271a3836
Commit: 091fc81d485594d4b751c10518230769c905430c
https://github.com/llvm/llvm-project/commit/091fc81d485594d4b751c10518230769c905430c
Author: Konstantin Varlamov <varconsteq at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M libcxx/include/__config
Log Message:
-----------
[libc++][hardening] Check that `_LIBCPP_HARDENING_MODE_DEFAULT` is defined (#80353)
If the `_LIBCPP_HARDENING_MODE_DEFAULT` macro is not defined,
`_LIBCPP_HARDENING_MODE` will be considered defined but fail the check
for a valid hardening mode, resulting in a slightly less understandable
error (that error is really meant more to prevent users from passing
incorrect values such as `0` or `1` directly rather than catching
configuration issues).
Commit: c8a97c0f30f3da86e892bf68d572068634994a1e
https://github.com/llvm/llvm-project/commit/c8a97c0f30f3da86e892bf68d572068634994a1e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Use hasStdExtCOrZca instead of hasStdExtC in estimateFunctionSizeInBytes. (#80905)
Commit: 1dd9162b95d29367635f32c7be24779b1ddaa7e5
https://github.com/llvm/llvm-project/commit/1dd9162b95d29367635f32c7be24779b1ddaa7e5
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/source/Target/TargetList.cpp
M lldb/test/API/python_api/target/TestTargetAPI.py
Log Message:
-----------
[lldb] Fix a crasher when using the public API. (#80508)
A user found a crash when they would do code like:
```
(lldb) script
>>> target = lldb.SBTarget()
>>> lldb.debugger.SetSelectedTarget(target)
```
We were not checking if the target was valid in and it caused a crash..
Commit: 1b5fae9118ab3450f22fb45f686a2cd0d979cbb4
https://github.com/llvm/llvm-project/commit/1b5fae9118ab3450f22fb45f686a2cd0d979cbb4
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/docs/UserGuides.rst
M llvm/docs/WritingAnLLVMNewPMPass.rst
M llvm/docs/WritingAnLLVMPass.rst
Log Message:
-----------
[docs] Try to make it easier to find info about new PM vs legacy PM (#80834)
Seen several beginner questions popping up in discourse about how to
implement and run custom passes. And then it turns out that they are
following the old "Writing an LLVM Pass" guide that describe legacy
passes, and then things are mixed up when they try to run that pass
using opt that nowadays default to the new pass manager.
This is an attempt to make it slightly clearer in the User Guides that
there are two different "Writing an LLVM Pass" pages depending on which
pass manager that should be used. This is done by renaming the legacy
version of "Writing an LLVM Pass" as "Writing an LLVM Pass (legacy PM
version)".
Also reordered the links to put the link to the new pass manager
documentation first.
This patch also moves the warning text that cross references the
description on how to write a pass for legacy/new PM to make sure it
ends up already in the beginning of the descriptions.
Also adding a new warning in the "Running a pass with opt" section of
the legacy PM version of the guide, to inform that those examples are
outdated.
Commit: e976385415da45650952316db63c4ccd370e4030
https://github.com/llvm/llvm-project/commit/e976385415da45650952316db63c4ccd370e4030
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
A llvm/test/Transforms/GlobalOpt/resolve-static-ifunc.ll
Log Message:
-----------
[llvm][GlobalOpt] Optimize statically resolvable IFuncs (#80606)
Commit: 16d890ced68aafae4cc8ba3efc9213bfab84ba54
https://github.com/llvm/llvm-project/commit/16d890ced68aafae4cc8ba3efc9213bfab84ba54
Author: Kojo Acquah <KoolJBlack at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
M mlir/test/Dialect/ArmNeon/invalid.mlir
M mlir/test/Dialect/ArmNeon/roundtrip.mlir
M mlir/test/Target/LLVMIR/arm-neon.mlir
Log Message:
-----------
[mlir][ArmNeon] Adds Arm Neon SMMLA, UMMLA, and USMMLA Intrinsics (#80511)
This adds the SMMLA, UMMLA, and USMMLA intrinsics to Neon dialect bringing it in line with the SVE dialect.
These ops enable matrix multiply-accumulate instructions with two e 2x8 matrix inputs of respective signage into a 2x2 32-bit integer accumulator. This is equivalent to performing an 8-way dot product per destination element.
Op details:
https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:@navigationhierarchiessimdisa=[Neon]&q=mmla
Commit: 8075f0db16f3291beed65cbcd034b047cc7373bf
https://github.com/llvm/llvm-project/commit/8075f0db16f3291beed65cbcd034b047cc7373bf
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M bolt/lib/Core/BinarySection.cpp
Log Message:
-----------
[BOLT] Use new contents when emitting sections with relocations (#80782)
We can use BinarySection::updateContents() to change section contents.
However, if we also add relocations for new contents, then the original
data (i.e. not updated) is going to be used. Fix that. A follow-up diff
will use the update interface and will include a test case.
Commit: b98db441f01ee8e0cdab8df1ef8a9b0aff2f6e5a
https://github.com/llvm/llvm-project/commit/b98db441f01ee8e0cdab8df1ef8a9b0aff2f6e5a
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M bolt/test/AArch64/ifunc.c
Log Message:
-----------
[BOLT] Make ifunc test not statically-resolvable. NFC
This fixes a breakage caused by e976385415da
Commit: 4d8e849dfbf3ca1301f208a7286b31215d2a94db
https://github.com/llvm/llvm-project/commit/4d8e849dfbf3ca1301f208a7286b31215d2a94db
Author: Alexander Shaposhnikov <6532716+alexander-shaposhnikov at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/abs.ll
Log Message:
-----------
[ConstraintElim] Add facts for llvm.abs >= 0 (#79070)
Add facts for llvm.abs >= 0.
https://alive2.llvm.org/ce/z/GXnMHu
Commit: fbded6663fb04d12f451c18bc8018989d2db3a87
https://github.com/llvm/llvm-project/commit/fbded6663fb04d12f451c18bc8018989d2db3a87
Author: ZijunZhaoCCK <88353225+ZijunZhaoCCK at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
R clang/test/Driver/android-version.cpp
A clang/test/Driver/invalid-version.cpp
Log Message:
-----------
[Driver] Check the environment version except wasm case. (#80783)
Add isWasm() check for here:
https://github.com/llvm/llvm-project/pull/78655#issuecomment-1928075569
Commit: 08457e1f7693bdafe5330cde2bf41290cad4cade
https://github.com/llvm/llvm-project/commit/08457e1f7693bdafe5330cde2bf41290cad4cade
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M libcxx/test/libcxx/containers/sequences/deque/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/list/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/vector.bool/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/vector/abi.compile.pass.cpp
Log Message:
-----------
[libc++] Add tests to pin down the ABI of deque, list and vector (#80191)
This patch adds tests that lock down the ABI of types like deque, list
and vector.
An upcoming patch will replace the usage of __compressed_pair in these
classes
by [[no_unique_address]], so we are adding these tests to pin down their
ABI
before making the change. That way, we can be confident that the patch
making
the actual ABI-sensitive change is safe if it doesn't break these tests.
Commit: 42357df2df4977c80aba77fcab706638a121bde0
https://github.com/llvm/llvm-project/commit/42357df2df4977c80aba77fcab706638a121bde0
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
A clang/test/AST/fixed-point-zero-init.cpp
Log Message:
-----------
[clang] Add zero-initialization for fixed point types (#80781)
Commit: 2f490583c368627f552c71e340c39f2b55c0526c
https://github.com/llvm/llvm-project/commit/2f490583c368627f552c71e340c39f2b55c0526c
Author: jkorous-apple <32549412+jkorous-apple at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-debug.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix debug notes for unclaimed DREs (#80787)
Debug notes for unclaimed DeclRefExpr should report any DRE of an unsafe
variable that is not covered by a Fixable (i. e. fixit for the
particular AST pattern isn't implemented for whatever reason). Currently
not all unclaimed DeclRefExpr-s are reported which is a bug. The debug
notes report only those DREs where the referred VarDecl has at least one
other DeclRefExpr which is claimed (covered by a fixit). If there is an
unsafe VarDecl that has exactly one DRE and the DRE isn't claimed then
the debug note about missing fixit won't be emitted. That is because the
debug note is emitted from within a loop over set of successfully
matched FixableGadgets which by-definition is missing those DRE that are
not matched at all.
The new code simply iterates over all unsafe VarDecls and all of their
unclaimed DREs.
Commit: 1b03cbc93989c84ad0b78c27d4427a7eaa5842f1
https://github.com/llvm/llvm-project/commit/1b03cbc93989c84ad0b78c27d4427a7eaa5842f1
Author: Fernando Tagawa <tagawafernando at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/lib/Format/BreakableToken.cpp
M clang/unittests/Format/FormatTestComments.cpp
Log Message:
-----------
[clang-format] Handle doxygen commands starting with \ (#80381)
Fixes llvm/llvm-project#63241
Doxygen commands can start with `@` or `\`.
Commit: 2217837c3377c22bffb6c498a732ce4672b8b535
https://github.com/llvm/llvm-project/commit/2217837c3377c22bffb6c498a732ce4672b8b535
Author: Wanyi <kusmour at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M lldb/bindings/headers.swig
A lldb/bindings/interface/SBStatisticsOptionsDocStrings.i
M lldb/bindings/interfaces.swig
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
A lldb/include/lldb/API/SBStatisticsOptions.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBStatisticsOptions.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Commands/CommandObjectStats.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
M lldb/test/API/functionalities/stats_api/main.c
Log Message:
-----------
Support statistics dump summary only mode (#80745)
Add a new --summary option to statistics dump command so that it is
much more light weight than the full version.
Introduce a new SBStatisticsOptions API setting the verbosity of statistics dump.
[PR
#80218](https://github.com/llvm/llvm-project/pull/80218#discussion_r1473639878)
Commit: bcd1490496a5bf06ce98470ef622db29a8eebbf7
https://github.com/llvm/llvm-project/commit/bcd1490496a5bf06ce98470ef622db29a8eebbf7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
Log Message:
-----------
[gn build] Port 2217837c3377
Commit: 44767278650227b30cf969170dc139197ce4338d
https://github.com/llvm/llvm-project/commit/44767278650227b30cf969170dc139197ce4338d
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Preprocessor/wasm-target-features.c
Log Message:
-----------
[WebAssembly] Add tests for generic CPU config (#80775)
This adds tests for `generic` cpu configuration. We had tests for `mvp`
and `bleeding-edge` configs but not `generic`.
Commit: 897297e8b09ed6076f5dc6883b459b209bb9e29f
https://github.com/llvm/llvm-project/commit/897297e8b09ed6076f5dc6883b459b209bb9e29f
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M clang/test/Driver/wasm-features.c
Log Message:
-----------
[WebAssembly] Fix CPU tests in wasm-features.c (#80900)
The CPU tests in this file are not working as intended. Specifying
`-mcpu=[mvp|generic|bleeding-edge]` in `clang` command line does NOT add
arguments like `-target-feature`, `+feature-name`, ... to `clang-14`
command line. Specifying `-mcpu=[mvp|generic|bleeding-edge]` in `clang`
command line will just add `-target-cpu` `[mvp|generic|bleeding-edge]`
to `clang-14` command line, and individual features are added here
within `clang-14` invocation:
https://github.com/llvm/llvm-project/blob/5b780c8c6c558ec283a9eec485a4f172df0f9fe1/clang/lib/Basic/Targets/WebAssembly.cpp#L150-L163
The reason these CPU tests are passing is because they only have `-NOT`
checks, and we don't emit `-target-feature` arguments for them anyway,
the test passes, but they don't check what they are supposed to check.
This make CPU tests only check `-target-cpu` lines instead of individual
features, which will not be emitted.
Commit: 055ac72ecca4b56826ac02851f8a18f20a8557df
https://github.com/llvm/llvm-project/commit/055ac72ecca4b56826ac02851f8a18f20a8557df
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
Log Message:
-----------
[GISel] Add support for scalable vectors in getLCMType (#80306)
This function can be called from buildCopyToRegs where at least one of
the types is a scalable vector type. This function crashed because it
did not know how to handle scalable vector types.
This patch extends the functionality of getLCMType to handle when at
least one of the types is a scalable vector. getLCMType between a fixed
and scalable vector is not implemented since the docstring of the
function explains that getLCMType is used to build MERGE/UNMERGE
instructions and we will never build a MERGE/UNMERGE between fixed and
scalable vectors.
Commit: 6d268577259071cb1d9cccd89006bae8570f6c51
https://github.com/llvm/llvm-project/commit/6d268577259071cb1d9cccd89006bae8570f6c51
Author: Wanyi <kusmour at gmail.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
R lldb/bindings/interface/SBStatisticsOptionsDocStrings.i
A lldb/bindings/interface/SBStatisticsOptionsDocstrings.i
Log Message:
-----------
Fix the Docstring.i filename (#80917)
The typo DocStrings.i broke linux buildbots
Commit: bd1324113e90884a4a83d6232ecf0c623e2e113e
https://github.com/llvm/llvm-project/commit/bd1324113e90884a4a83d6232ecf0c623e2e113e
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M compiler-rt/lib/memprof/memprof_allocator.cpp
M compiler-rt/lib/memprof/memprof_allocator.h
M compiler-rt/lib/memprof/memprof_interceptors.cpp
M compiler-rt/lib/memprof/memprof_internal.h
M compiler-rt/lib/memprof/memprof_malloc_linux.cpp
Log Message:
-----------
[MemProf][NFC] Clean up runtime code (#80581)
Commit: c5bf1f4b8f5ba1912f18729f0726c9227f567c9d
https://github.com/llvm/llvm-project/commit/c5bf1f4b8f5ba1912f18729f0726c9227f567c9d
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
Log Message:
-----------
[test] Autogen a test for ease of update in forthcoming patch
Commit: 1aafe7605b295bdb6e9951f4ca86390d306152d2
https://github.com/llvm/llvm-project/commit/1aafe7605b295bdb6e9951f4ca86390d306152d2
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
Log Message:
-----------
[test] Regen a test for naming changes
Commit: 69a661cbae10495e9556d195fa683c0100ae299c
https://github.com/llvm/llvm-project/commit/69a661cbae10495e9556d195fa683c0100ae299c
Author: Visoiu Mistrih Francis <890283+francisvm at users.noreply.github.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
A llvm/test/CodeGen/RISCV/zcmp-cm-push-pop.mir
Log Message:
-----------
[RISCV] Remove CalleeSavedInfo for Zcmp/save-restore-libcalls registers (#79535)
Registers that are pushed/popped by Zcmp or libcalls have pre-defined
frame indices that are never allocated in MachineFrameInfo. They're
being used throughout PEI, but the rest of codegen doesn't work that way
and expects each frame index to be a valid index in MFI.
This patch keeps it local to PEI and removes them from the
CalleeSavedInfo list at the end of the pass.
Before this pass, any MIR testing post-PEI is broken and asserts (see
issue #79491).
Commit: cf0773fb14e18e97de3f66b4f21f286ca4f97eae
https://github.com/llvm/llvm-project/commit/cf0773fb14e18e97de3f66b4f21f286ca4f97eae
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/include/llvm/Target/TargetSchedule.td
Log Message:
-----------
[TableGen][NFC] Remove EponymousProcResourceKind (#80812)
We can use `!cast` to cast `NAME` to `ProcResourceKind`.
Commit: c7fa25f0b2398f7037af6e10b18456b69178f7c5
https://github.com/llvm/llvm-project/commit/c7fa25f0b2398f7037af6e10b18456b69178f7c5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/test/MC/RISCV/elf-flags.s
Log Message:
-----------
[RISCV] Set the RVC bit in the ELF EFlags for C or Zca. (#80913)
Commit: 8ea7f1d20ad8ab8c381800eefda948d85c6860cc
https://github.com/llvm/llvm-project/commit/8ea7f1d20ad8ab8c381800eefda948d85c6860cc
Author: Maksim Panchenko <maks at fb.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M bolt/lib/Passes/BinaryPasses.cpp
Log Message:
-----------
[BOLT][NFCI] Keep instruction annotations (#80382)
We used to delete most instruction annotations before code emission. It
was done to release memory taken by annotations and to reduce overall
memory consumption. However, since the implementation of annotations has
moved to using existing instruction operands, the memory overhead
associated with them has reduced drastically. I measured that savings
are less than 0.5% on large binaries and processing time is just
slightly reduced if we keep them. Additionally, I plan to use
annotations in pre-emission passes for the Linux kernel rewriter.
Commit: 8ae048507086cc3a2ceb6974506d3048c516a726
https://github.com/llvm/llvm-project/commit/8ae048507086cc3a2ceb6974506d3048c516a726
Author: Jason Eckhardt <jeckhardt at nvidia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/docs/TableGen/BackEnds.rst
M llvm/test/TableGen/generic-tables-instruction.td
M llvm/utils/TableGen/CodeGenTarget.cpp
M llvm/utils/TableGen/CodeGenTarget.h
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[TableGen] Extend direct lookup to instruction values in generic tables. (#80486)
Currently, for some tables involving a single primary key field which is
integral and densely numbered, a direct lookup is generated rather than
a binary search. This patch extends the direct lookup function
generation to instructions, where the integral value corresponds to the
instruction's enum value.
While this isn't as common as for other tables, it does occur in at
least one downstream backend and one in-tree backend.
Added a unit test and minimally updated the documentation.
Commit: adbf21f12b3069b2554efb39f2e92c6cf6f24940
https://github.com/llvm/llvm-project/commit/adbf21f12b3069b2554efb39f2e92c6cf6f24940
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
A mlir/include/mlir/Dialect/Func/Extensions/MeshShardingExtensions.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.td
A mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterfaceImpl.h
M mlir/include/mlir/Dialect/Mesh/Transforms/Passes.td
M mlir/include/mlir/Dialect/Mesh/Transforms/Spmdization.h
M mlir/lib/Dialect/Func/Extensions/AllExtensions.cpp
M mlir/lib/Dialect/Func/Extensions/CMakeLists.txt
A mlir/lib/Dialect/Func/Extensions/MeshShardingExtensions.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/lib/Dialect/Mesh/Transforms/ShardingPropagation.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Tosa/IR/ShardingInterfaceImpl.cpp
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
A mlir/test/Dialect/Mesh/spmdization.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][mesh] Add spmdization pass (#80518)
Add a pass that converts a function that has sharding annotations into
SPMD form.
Commit: b0785cd1cbf97dbd4eb39647ff22771ef0a7cfea
https://github.com/llvm/llvm-project/commit/b0785cd1cbf97dbd4eb39647ff22771ef0a7cfea
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
A llvm/test/CodeGen/ARM/GlobalISel/select-const.mir
Log Message:
-----------
[GlobalISel][ARM] Support missing case for G_CONSTANT (#80555)
Global Instruction Selector could not select the code:
%0:gprb(s32) = G_CONSTANT i32 -1
In DAG selector the similar code is selected to the instruction MVNi
using custom operand `mod_imm_not`. Changing its definition from
`PatLeaf` to `ImmLeaf` and providing counterpart for `imm_not_XFORM`
make the relevant rule available for GlobalISel too.
Commit: 966f78bdf849d1ae4ce205f93f5967df71e95f4c
https://github.com/llvm/llvm-project/commit/966f78bdf849d1ae4ce205f93f5967df71e95f4c
Author: AtariDreams <83477269+AtariDreams at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/fdiv.ll
Log Message:
-----------
[InstCombine] Resolve TODO: nnan nsz X / -0.0 -> copysign(inf, X) (#79766)
Commit: 86fa21e93efe6d8079d202bf30e7e8db66cc32a0
https://github.com/llvm/llvm-project/commit/86fa21e93efe6d8079d202bf30e7e8db66cc32a0
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
Log Message:
-----------
[mlir] Fix -Wunused-function in ShardingInterface.cpp (NFC)
llvm-project/mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp:522:1:
error: unused function 'isValueCompatibleWithFullReplicationSharding' [-Werror,-Wunused-function]
isValueCompatibleWithFullReplicationSharding(Value value,
^
1 error generated.
Commit: 679d0d70295cab1f3692fc1919299d8c16070863
https://github.com/llvm/llvm-project/commit/679d0d70295cab1f3692fc1919299d8c16070863
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-02-06 (Tue, 06 Feb 2024)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][Docs] Fix link to Zjpm spec in RISCVUsage.rst.
Commit: c5e5661591a90094eeb5831de86d701419c74f07
https://github.com/llvm/llvm-project/commit/c5e5661591a90094eeb5831de86d701419c74f07
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/Headers/cpuid.h
Log Message:
-----------
[X86] Add missing MACROs in cpuid.h (#80815)
Relate gcc file:
https://github.com/gcc-mirror/gcc/blob/master/gcc/config/i386/cpuid.h
Commit: 8c84096da195ae38336ba9aa700dc35e567157ba
https://github.com/llvm/llvm-project/commit/8c84096da195ae38336ba9aa700dc35e567157ba
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Fix initializing _Complex values from DeclRefExpr
See the comment I added. When initializing a complex value from a
DeclRefExpr, we need to manually copy both array elements.
This adds some unfortunate code duplication that I'm still pondering
on how to get rid of best.
Commit: 28b82075ff3e58ba9c6959a585d3d0fc5d0325e5
https://github.com/llvm/llvm-project/commit/28b82075ff3e58ba9c6959a585d3d0fc5d0325e5
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Support ImplicitValueInitExpr for complex types
Initialize both elements to 0, once again.
Commit: cb7561ac5a8445f5c526c949efd50f45f55bb089
https://github.com/llvm/llvm-project/commit/cb7561ac5a8445f5c526c949efd50f45f55bb089
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Log Message:
-----------
[Sched] Add MacroFusion mutation if fusions are not empty (#72227)
We can get the fusions list by `getMacroFusions` and if it is not
empty, then we will add the MacroFusion mutation automatically.
Commit: ea4f44e85f7ca884d42b9b12bd13bab47c3e5d3c
https://github.com/llvm/llvm-project/commit/ea4f44e85f7ca884d42b9b12bd13bab47c3e5d3c
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Log Message:
-----------
[RISCV] Remove unused variable 'ST' in RISCVTargetMachine.cpp (NFC)
llvm-project/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp:358:27:
error: unused variable 'ST' [-Werror,-Wunused-variable]
const RISCVSubtarget &ST = C->MF->getSubtarget<RISCVSubtarget>();
^
1 error generated.
Commit: 9bda1de0b6096d26e87fed18cb681cc3e5b8319a
https://github.com/llvm/llvm-project/commit/9bda1de0b6096d26e87fed18cb681cc3e5b8319a
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
Log Message:
-----------
[TwoAddressInstruction] Propagate undef flags for partial defs (#79286)
If part of a register (lowered from REG_SEQUENCE) is undefined then we
should propagate undef flags to uses of those lanes. This is only
performed when live intervals are present as it requires live intervals
to correctly match uses to defs, and the primary goal is to allow
precise computation of subrange intervals.
Commit: e7c0e59bbcf713d09ca7a09cd513399d66a94ca5
https://github.com/llvm/llvm-project/commit/e7c0e59bbcf713d09ca7a09cd513399d66a94ca5
Author: Job Noorman <jnoorman at igalia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Fix crash for relocs in data sections against ABS symbols (#76026)
Fixes #75771
Commit: 93962ea1176b91239496378e7141a44dc95a5efd
https://github.com/llvm/llvm-project/commit/93962ea1176b91239496378e7141a44dc95a5efd
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/docs/Passes.rst
Log Message:
-----------
[docs][passes] Update documentation of Analysis and Transform Passes (#80835)
- Added a warning about the pass list being incomplete (and hint about
"opt -print-passes" listing known passes).
- Removed legacy PM example involving "opt -analyze".
- print-function and print-module does not exist with those names in the
new PM. Since the document has been updated to reflect the new PM names
earlier, those names were changed into referring to function(print) and
module(print) instead.
- Resolved some FIXME:s around strip* passes.
Commit: 9a028afdd655f8e378819e4125292d973985f3f4
https://github.com/llvm/llvm-project/commit/9a028afdd655f8e378819e4125292d973985f3f4
Author: Matthias Springer <me at m-sp.org>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Dialect/Transform/IR/TransformInterfaces.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
Log Message:
-----------
[mlir][IR][NFC] `Listener::notifyMatchFailure` returns `void` (#80704)
There are two `notifyMatchFailure` methods: one in the rewriter and one
in the listener. The one in the rewriter notifies the listener and
returns "failure" for convenience. The one in the listener should not
return anything; it is just a notification. It can currently be abused
to return "success" from the rewriter function. That would be a
violation of the rewriter API rules.
Also make sure that the listener is always notified about match
failures, not just with `NDEBUG`. The current implementation is
consistent: one `notifyMatchFailure` overload notifies only in debug
mode and another one notifies all the time.
Commit: 2ad6fd6735150e44e2170368968c0006df4d8387
https://github.com/llvm/llvm-project/commit/2ad6fd6735150e44e2170368968c0006df4d8387
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
Log Message:
-----------
[RISCV][NFC] Move SFB pseudos and patterns to RISCVInstrInfoSFB.td (#80945)
To make the structure of TableGen files clear.
Commit: 7d508eb5d38f4bbbab4230a666d9e742e271af61
https://github.com/llvm/llvm-project/commit/7d508eb5d38f4bbbab4230a666d9e742e271af61
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
R llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
Log Message:
-----------
Revert "[AMDGPU] Add pal metadata 3.0 support to callable pal funcs (#67104)"
This reverts commit d6c7253d32e4bdff619c39708170f1c1fa01ff95.
Change causing CTS failures due to incomplete metadata.
Commit: fff86c6111b6d3ed68a8ea57ab5e7d3d716472c6
https://github.com/llvm/llvm-project/commit/fff86c6111b6d3ed68a8ea57ab5e7d3d716472c6
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Dialect/ArmSME/invalid.mlir
M mlir/test/Dialect/ArmSME/outer-product-fusion.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir
Log Message:
-----------
[mlir][ArmSME] Support 4-way widening outer products (#79288)
This patch introduces support for 4-way widening outer products. This
enables the fusion of 4 'arm_sme.outerproduct' operations that are
chained via the accumulator into single widened operations.
Changes:
- Adds the following operations:
- smopa_4way, smops_4way
- umopa_4way, umops_4way
- sumopa_4way, sumops_4way
- sumopa_4way, sumops_4way
- Implements conversions for the above ops to intrinsics in ArmSMEToLLVM.
- Extends 'arm-sme-outer-product' pass.
For a detailed description of these operations see the
'arm_sme.smopa_4way' description.
Commit: 67402fe5e4bf7a706d47bc106113f599a8d59947
https://github.com/llvm/llvm-project/commit/67402fe5e4bf7a706d47bc106113f599a8d59947
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M flang/include/flang/Lower/ConvertCall.h
M flang/include/flang/Optimizer/Builder/MutableBox.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/test/Lower/HLFIR/function-return-as-expr.f90
Log Message:
-----------
[flang] Do not move finalized function results in lowering (#80683)
Fortran requires finalizing function results when the result type have
final procedures.
Lowering was unconditionally "moving" function results into values
"hlfir.expr". This is not correct when the results are finalized because
it means the function result storage will be used after the hlfir.expr.
Only move function results that are not finalized.
Commit: 1b87ebce924e507cbc27c2e0dc623941d16388c9
https://github.com/llvm/llvm-project/commit/1b87ebce924e507cbc27c2e0dc623941d16388c9
Author: Yi Kong <yikong at google.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/lib/ObjCopy/ConfigManager.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
A llvm/test/tools/llvm-objcopy/ELF/prefix-symbols-remove.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
Log Message:
-----------
[llvm-objcopy] Add --remove-symbol-prefix (#79415)
Commit: e1d564ac130fb6ec14d1e237a123373d64249e55
https://github.com/llvm/llvm-project/commit/e1d564ac130fb6ec14d1e237a123373d64249e55
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/tools/llvm-exegesis/X86/latency/middle-half.s
Log Message:
-----------
[llvm-exegesis] Allow retries on flaky middle half test
The middle half repetition mode test sometimes fails on the avx512
buildbots due to a negative value being produced. This needs more
investigation, but add a retry count temporarily to alleviate
false-positive errors on the buildbots.
This is being tracked in #80957.
Commit: 0f439f374f9cec73466c5166b9a8764214a74069
https://github.com/llvm/llvm-project/commit/0f439f374f9cec73466c5166b9a8764214a74069
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
A flang/test/HLFIR/as_expr-codegen-polymorphic.fir
M flang/test/HLFIR/bufferize-poly-expr.fir
Log Message:
-----------
[flang] Fix hlfir.as_expr codegen for polymorphic entities (#80824)
https://github.com/llvm/llvm-project/pull/80683 revealed that
hlfir.as_expr was propagating the temporary buffer for polymorphic
values as an allocatable while codegen later expects to be working with
fir.box/fir.class but not fir.ref<box/class> when processing the
operations using the hlfir.as_expr result.
Dereference the temporary allocatable as soon as it is created.
Commit: 88c830a1a5687bec597ca947159e4dd9a3f2ac2d
https://github.com/llvm/llvm-project/commit/88c830a1a5687bec597ca947159e4dd9a3f2ac2d
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
Log Message:
-----------
[TOSA] Fix avgpool2d accum in wider type (#80849)
Truncate result of avgpool when accumulation is done in a wider type
than the result element type, such as when doing a f16 avgpool2d with a
f32 accumulator type.
Commit: f8562e245c0c3ebaa8c75575fac566497a0c9245
https://github.com/llvm/llvm-project/commit/f8562e245c0c3ebaa8c75575fac566497a0c9245
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[flang][OpenMP][NFC] Further refactoring for `genOpWithBody` & (#80839)
`createBodyOfOp`
This refactors the arguments to the above functions in 2 ways:
- Combines the 2 structs of arguments into one since they were almost
identical.
- Replaces the `args` argument with a callback to a rebion-body
generation function. This is a preparation for delayed privatization as
we will need different callbacks for ws loops and parallel ops with
delayed privatization.
Commit: 365bf43b8b290ab64b5b82879bc9d1dfdd5d6aa9
https://github.com/llvm/llvm-project/commit/365bf43b8b290ab64b5b82879bc9d1dfdd5d6aa9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
Log Message:
-----------
[LSR] Regenerate test checks (NFC)
Check output IR instead of debug output. The debug output will
change in an upcoming patch in an irrecoverable way.
Commit: e60c4b61f8bab25a137a481e4d2d3dbfa656807b
https://github.com/llvm/llvm-project/commit/e60c4b61f8bab25a137a481e4d2d3dbfa656807b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Log Message:
-----------
[InstCombine] Change order of checks for dominating conditions (NFC)
Check whether the condition is in the expected format before
performing more expensive dominator checks.
Commit: bec7181d5b9d1828129d78d440fd9e02d5cb63e8
https://github.com/llvm/llvm-project/commit/bec7181d5b9d1828129d78d440fd9e02d5cb63e8
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
A llvm/test/Transforms/LoopIdiom/pr80954.ll
Log Message:
-----------
[SCEVExpander] Don't use recursive expansion for ptr IV inc
Similar to the non-ptr case, directly create the getelementptr
instruction. Going through expandAddToGEP() no longer makes sense
with opaque pointers, where generating the necessary instruction
is trivial.
This avoids recursive expansion of (the SCEV of) StepV while the
IR is in an inconsistent state, in particular with an incomplete
IV phi node, which utilities may not be prepared to deal with.
Fixes https://github.com/llvm/llvm-project/issues/80954.
Commit: eeb60e335e4fecb9ce3ed62cf081568cecf1d4ac
https://github.com/llvm/llvm-project/commit/eeb60e335e4fecb9ce3ed62cf081568cecf1d4ac
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[AMDGPU] Remove unused multiclass
Commit: 7760006d8d39e7624601936e2b1b428d850726b8
https://github.com/llvm/llvm-project/commit/7760006d8d39e7624601936e2b1b428d850726b8
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/stdbit-macros.h
M libc/spec/stdc.td
M libc/src/stdbit/CMakeLists.txt
A libc/src/stdbit/stdc_trailing_ones_uc.cpp
A libc/src/stdbit/stdc_trailing_ones_uc.h
A libc/src/stdbit/stdc_trailing_ones_ui.cpp
A libc/src/stdbit/stdc_trailing_ones_ui.h
A libc/src/stdbit/stdc_trailing_ones_ul.cpp
A libc/src/stdbit/stdc_trailing_ones_ul.h
A libc/src/stdbit/stdc_trailing_ones_ull.cpp
A libc/src/stdbit/stdc_trailing_ones_ull.h
A libc/src/stdbit/stdc_trailing_ones_us.cpp
A libc/src/stdbit/stdc_trailing_ones_us.h
M libc/test/include/stdbit_test.cpp
M libc/test/src/stdbit/CMakeLists.txt
A libc/test/src/stdbit/stdc_trailing_ones_uc_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ui_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ul_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ull_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_us_test.cpp
Log Message:
-----------
[libc][stdbit] implement stdc_trailing_ones (C23) (#80459)
Commit: 82d74df4af305df00027ce72639e6a8cdc05a169
https://github.com/llvm/llvm-project/commit/82d74df4af305df00027ce72639e6a8cdc05a169
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-02-07 (Wed, 07 Feb 2024)
Changed paths:
M .github/CODEOWNERS
M bolt/lib/Core/BinarySection.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/ifunc.c
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
A clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.cpp
A clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/use-std-min-max.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/use-std-min-max.cpp
M clang/include/clang/AST/Type.h
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Headers/cpuid.h
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPExpressions.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/test/AST/Interp/complex.cpp
A clang/test/AST/fixed-point-zero-init.cpp
M clang/test/AST/ms-constexpr.cpp
A clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
A clang/test/CXX/drs/dr28xx.cpp
M clang/test/CodeGen/aarch64-neon-intrinsics.c
A clang/test/CodeGen/ubsan-shift-bitint.c
R clang/test/Driver/android-version.cpp
A clang/test/Driver/invalid-version.cpp
M clang/test/Driver/wasm-features.c
M clang/test/Format/clang-format-ignore.cpp
M clang/test/Frontend/fixed_point_errors.cpp
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Preprocessor/wasm-target-features.c
M clang/test/Sema/struct-cast.c
M clang/test/Sema/warn-infinity-nan-disabled-lnx.cpp
M clang/test/Sema/warn-infinity-nan-disabled-win.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-debug.cpp
M clang/unittests/Analysis/FlowSensitive/SignAnalysisTest.cpp
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M compiler-rt/lib/memprof/memprof_allocator.cpp
M compiler-rt/lib/memprof/memprof_allocator.h
M compiler-rt/lib/memprof/memprof_interceptors.cpp
M compiler-rt/lib/memprof/memprof_internal.h
M compiler-rt/lib/memprof/memprof_malloc_linux.cpp
M flang/include/flang/Lower/ConvertCall.h
M flang/include/flang/Optimizer/Builder/MutableBox.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/OpenMP.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
A flang/test/HLFIR/as_expr-codegen-polymorphic.fir
M flang/test/HLFIR/bufferize-poly-expr.fir
M flang/test/Lower/HLFIR/function-return-as-expr.f90
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/include/inttypes.h.def
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/inttypes-macros.h
M libc/include/llvm-libc-macros/stdbit-macros.h
M libc/spec/stdc.td
M libc/src/__support/float_to_string.h
M libc/src/errno/libc_errno.cpp
M libc/src/errno/libc_errno.h
M libc/src/stdbit/CMakeLists.txt
A libc/src/stdbit/stdc_trailing_ones_uc.cpp
A libc/src/stdbit/stdc_trailing_ones_uc.h
A libc/src/stdbit/stdc_trailing_ones_ui.cpp
A libc/src/stdbit/stdc_trailing_ones_ui.h
A libc/src/stdbit/stdc_trailing_ones_ul.cpp
A libc/src/stdbit/stdc_trailing_ones_ul.h
A libc/src/stdbit/stdc_trailing_ones_ull.cpp
A libc/src/stdbit/stdc_trailing_ones_ull.h
A libc/src/stdbit/stdc_trailing_ones_us.cpp
A libc/src/stdbit/stdc_trailing_ones_us.h
A libc/src/stdbit/stdc_trailing_zeros_uc.cpp
A libc/src/stdbit/stdc_trailing_zeros_uc.h
A libc/src/stdbit/stdc_trailing_zeros_ui.cpp
A libc/src/stdbit/stdc_trailing_zeros_ui.h
A libc/src/stdbit/stdc_trailing_zeros_ul.cpp
A libc/src/stdbit/stdc_trailing_zeros_ul.h
A libc/src/stdbit/stdc_trailing_zeros_ull.cpp
A libc/src/stdbit/stdc_trailing_zeros_ull.h
A libc/src/stdbit/stdc_trailing_zeros_us.cpp
A libc/src/stdbit/stdc_trailing_zeros_us.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/pread.cpp
M libc/test/include/stdbit_test.cpp
M libc/test/src/stdbit/CMakeLists.txt
A libc/test/src/stdbit/stdc_trailing_ones_uc_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ui_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ul_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_ull_test.cpp
A libc/test/src/stdbit/stdc_trailing_ones_us_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_uc_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ui_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ul_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_ull_test.cpp
A libc/test/src/stdbit/stdc_trailing_zeros_us_test.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/sprintf_test.cpp
M libcxx/include/__config
M libcxx/test/libcxx/containers/sequences/deque/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/list/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/vector.bool/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/sequences/vector/abi.compile.pass.cpp
M lldb/bindings/headers.swig
A lldb/bindings/interface/SBStatisticsOptionsDocstrings.i
M lldb/bindings/interfaces.swig
M lldb/include/lldb/API/LLDB.h
M lldb/include/lldb/API/SBDefines.h
A lldb/include/lldb/API/SBStatisticsOptions.h
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Target/Statistics.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/API/CMakeLists.txt
A lldb/source/API/SBStatisticsOptions.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Commands/CommandObjectStats.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Statistics.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetList.cpp
M lldb/test/API/functionalities/stats_api/TestStatisticsAPI.py
M lldb/test/API/functionalities/stats_api/main.c
M lldb/test/API/python_api/target/TestTargetAPI.py
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Core/DiagnosticEventTest.cpp
A lldb/unittests/Core/ProgressReportTest.cpp
M lldb/unittests/TestingSupport/TestUtilities.cpp
M lldb/unittests/TestingSupport/TestUtilities.h
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/Passes.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/docs/TableGen/BackEnds.rst
M llvm/docs/UserGuides.rst
M llvm/docs/WritingAnLLVMNewPMPass.rst
M llvm/docs/WritingAnLLVMPass.rst
M llvm/include/llvm/Analysis/TypeMetadataUtils.h
M llvm/include/llvm/BinaryFormat/XCOFF.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetSchedule.td
M llvm/lib/Analysis/TypeMetadataUtils.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/ExecutionEngine/GDBRegistrationListener.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/XCOFFObjectWriter.cpp
M llvm/lib/ObjCopy/ConfigManager.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVScheduleV.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/TextAPI/BinaryReader/DylibReader.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-logic-of-compare.mir
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AArch64/stack-tagging-dbg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/ARC/addrmode.ll
M llvm/test/CodeGen/ARC/call.ll
M llvm/test/CodeGen/ARC/ldst.ll
A llvm/test/CodeGen/ARM/GlobalISel/select-const.mir
M llvm/test/CodeGen/CSKY/atomic-cmpxchg-flag.ll
M llvm/test/CodeGen/CSKY/atomic-cmpxchg.ll
M llvm/test/CodeGen/CSKY/atomic-load-store.ll
M llvm/test/CodeGen/CSKY/atomic-rmw.ll
M llvm/test/CodeGen/CSKY/call-16bit.ll
M llvm/test/CodeGen/CSKY/call.ll
M llvm/test/CodeGen/CSKY/constantpool.ll
M llvm/test/CodeGen/CSKY/dwarf-eh.ll
M llvm/test/CodeGen/CSKY/fpu/ldst-d.ll
M llvm/test/CodeGen/CSKY/fpu/ldst-f.ll
M llvm/test/CodeGen/CSKY/frameaddr-returnaddr.ll
M llvm/test/CodeGen/CSKY/indirectbr.ll
M llvm/test/CodeGen/CSKY/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/CSKY/inline-asm-f-constraint-f.ll
M llvm/test/CodeGen/CSKY/inline-asm.ll
M llvm/test/CodeGen/CSKY/ldst-i.ll
M llvm/test/CodeGen/CSKY/tls-models.ll
M llvm/test/CodeGen/M68k/Alloc/dyn_alloca_aligned.ll
M llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll
M llvm/test/CodeGen/M68k/Arith/add.ll
M llvm/test/CodeGen/M68k/Arith/bitwise.ll
M llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
M llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll
M llvm/test/CodeGen/M68k/Atomics/load-store.ll
M llvm/test/CodeGen/M68k/CConv/c-args-inreg.ll
M llvm/test/CodeGen/M68k/CConv/c-args.ll
M llvm/test/CodeGen/M68k/CConv/fastcc-args.ll
M llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
M llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll
M llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
M llvm/test/CodeGen/M68k/CodeModel/medium-static.ll
M llvm/test/CodeGen/M68k/CodeModel/small-pic.ll
M llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
M llvm/test/CodeGen/M68k/CodeModel/small-static.ll
M llvm/test/CodeGen/M68k/Control/cmp.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
M llvm/test/CodeGen/M68k/inline-asm.ll
M llvm/test/CodeGen/M68k/link-unlnk.ll
M llvm/test/CodeGen/M68k/reserved-regs.ll
M llvm/test/CodeGen/M68k/varargs.ll
M llvm/test/CodeGen/Mips/Fast-ISel/pr40325.ll
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll
M llvm/test/CodeGen/Mips/compactbranches/unsafe-in-forbidden-slot.ll
M llvm/test/CodeGen/Mips/indirect-jump-hazard/jumptables.ll
M llvm/test/CodeGen/Mips/jump-table-mul.ll
M llvm/test/CodeGen/Mips/pseudo-jump-fill.ll
M llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll
M llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll
M llvm/test/CodeGen/PowerPC/aix-available-externally-linkage-fun.ll
M llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
M llvm/test/CodeGen/PowerPC/aix-extern.ll
M llvm/test/CodeGen/PowerPC/aix-filename-c.ll
M llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll
M llvm/test/CodeGen/PowerPC/aix-filename-f.ll
M llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
M llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
M llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
M llvm/test/CodeGen/PowerPC/aix-relro-section.ll
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess.ll
M llvm/test/CodeGen/PowerPC/aix-small-local-exec-tls-largeaccess2.ll
M llvm/test/CodeGen/PowerPC/aix-tls-ie-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc-large32.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-tls-le-xcoff-reloc32.ll
M llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
M llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
M llvm/test/CodeGen/PowerPC/aix-weak.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-cold.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
M llvm/test/CodeGen/PowerPC/basic-toc-data-def.ll
M llvm/test/CodeGen/PowerPC/basic-toc-data-extern.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-td.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap-annotations-tw.ll
M llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll
M llvm/test/CodeGen/PowerPC/toc-data-const.ll
M llvm/test/CodeGen/RISCV/attributes.ll
A llvm/test/CodeGen/RISCV/zcmp-cm-push-pop.mir
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/fast-isel-fcmp.ll
M llvm/test/CodeGen/X86/fast-isel-ret-ext.ll
M llvm/test/CodeGen/X86/keylocker-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/xaluo.ll
M llvm/test/CodeGen/X86/xmulo.ll
M llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
M llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
M llvm/test/DebugInfo/AArch64/fallthrough-branch.ll
M llvm/test/DebugInfo/AArch64/frameindices.ll
M llvm/test/DebugInfo/AArch64/machine-outliner.ll
M llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
M llvm/test/DebugInfo/ARM/machine-cp-updates-dbg-reg.mir
M llvm/test/DebugInfo/COFF/function-options.ll
M llvm/test/DebugInfo/COFF/global_rust.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/thunk.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/COFF/types-basic.ll
M llvm/test/DebugInfo/COFF/types-cvarargs.ll
M llvm/test/DebugInfo/COFF/types-data-members.ll
M llvm/test/DebugInfo/COFF/vftables.ll
M llvm/test/DebugInfo/COFF/virtual-methods.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/dse-after-memcpyopt-merge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten-offset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/id.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/inline/inline-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/memset.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/storemerge.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/licm/multi-exit.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/loop-deletion/dead-loop.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/memcpyopt/merge-stores.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/mldst-motion/diamond.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/remove-redundant-fwd-scan-linked.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/empty-block.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/speculated-store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll
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M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memcpy.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/rewrite.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/unspecified-var-size.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/track-assignments.ll
M llvm/test/DebugInfo/Generic/import-inlined-declaration.ll
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M llvm/test/DebugInfo/Generic/split-dwarf-local-import.ll
M llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir
M llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir
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M llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks2.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
M llvm/test/DebugInfo/MIR/X86/live-debug-values.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
M llvm/test/DebugInfo/MIR/X86/livedebugvars-crossbb-interval.mir
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
M llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir
M llvm/test/DebugInfo/MIR/X86/machinesink.mir
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
M llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
M llvm/test/DebugInfo/MIR/X86/no-cfi-loc.mir
M llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir
M llvm/test/DebugInfo/MIR/X86/prolog-epilog-indirection.mir
M llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir
M llvm/test/DebugInfo/MIR/X86/remove-redundant-dbg-vals.mir
M llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
M llvm/test/DebugInfo/MSP430/dwarf-basics.ll
M llvm/test/DebugInfo/MSP430/fp-vla-callee-saved.ll
M llvm/test/DebugInfo/X86/DW_AT_calling-convention.ll
M llvm/test/DebugInfo/X86/PR37234.ll
M llvm/test/DebugInfo/X86/containing-type-extension-rust.ll
M llvm/test/DebugInfo/X86/convert-debugloc.ll
M llvm/test/DebugInfo/X86/dbg-value-list-selectiondag-salvage.ll
M llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_at_return.mir
M llvm/test/DebugInfo/X86/dbg_entity_calc_ignores_KILL_instruction_still_clobbers.mir
M llvm/test/DebugInfo/X86/debug-info-blocks.ll
M llvm/test/DebugInfo/X86/debug-loc-asan.mir
M llvm/test/DebugInfo/X86/debug-loc-frame.ll
M llvm/test/DebugInfo/X86/debug-loc-offset.mir
M llvm/test/DebugInfo/X86/dw_op_minus.mir
M llvm/test/DebugInfo/X86/empty-and-one-elem-array.ll
M llvm/test/DebugInfo/X86/fragment-offset-order.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
M llvm/test/DebugInfo/X86/linkage-name.ll
M llvm/test/DebugInfo/X86/live-debug-values-constprop.mir
M llvm/test/DebugInfo/X86/live-debug-vars-discard-invalid.mir
M llvm/test/DebugInfo/X86/live-debug-vars-dse.mir
M llvm/test/DebugInfo/X86/live-debug-vars-intervals.mir
M llvm/test/DebugInfo/X86/location-range-inlined-xblock.mir
M llvm/test/DebugInfo/X86/location-range.mir
M llvm/test/DebugInfo/X86/pr19307.mir
M llvm/test/DebugInfo/X86/prolog-params.mir
M llvm/test/DebugInfo/X86/single-location-inlined-param.mir
M llvm/test/DebugInfo/X86/single-location-interrupted-scope.mir
M llvm/test/DebugInfo/X86/single-location.mir
M llvm/test/DebugInfo/assignment-tracking/X86/lower-offset-expression.ll
M llvm/test/DebugInfo/assignment-tracking/X86/lower-to-value.ll
M llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill-cfg.ll
M llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill.ll
M llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location-2.ll
M llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location.ll
M llvm/test/MC/PowerPC/aix-file-symbols.s
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/elf-flags.s
M llvm/test/TableGen/generic-tables-instruction.td
M llvm/test/Transforms/ConstraintElimination/abs.ll
A llvm/test/Transforms/GlobalOpt/resolve-static-ifunc.ll
M llvm/test/Transforms/HotColdSplit/split-out-dbg-label.ll
M llvm/test/Transforms/IROutliner/gvn-phi-debug.ll
A llvm/test/Transforms/InstCombine/fcmp-range-check-idiom.ll
M llvm/test/Transforms/InstCombine/fdiv.ll
A llvm/test/Transforms/InstCombine/umulo-square.ll
A llvm/test/Transforms/LoopIdiom/pr80954.ll
M llvm/test/Transforms/LoopStrengthReduce/Power/incomplete-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/Util/Debugify/loc-only-original-mode.ll
A llvm/test/Verifier/verify-dwarf-no-operands.ll
M llvm/test/tools/llvm-exegesis/X86/latency/middle-half.s
A llvm/test/tools/llvm-objcopy/ELF/prefix-symbols-remove.test
M llvm/test/tools/llvm-objdump/XCOFF/symbol-table.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
M llvm/unittests/Support/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/CodeGenTarget.cpp
M llvm/utils/TableGen/CodeGenTarget.h
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/API/BUILD.gn
M mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
A mlir/include/mlir/Dialect/Func/Extensions/MeshShardingExtensions.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.td
A mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterfaceImpl.h
M mlir/include/mlir/Dialect/Mesh/Transforms/Passes.td
M mlir/include/mlir/Dialect/Mesh/Transforms/Spmdization.h
M mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/ArmSME/Transforms/OuterProductFusion.cpp
M mlir/lib/Dialect/Func/Extensions/AllExtensions.cpp
M mlir/lib/Dialect/Func/Extensions/CMakeLists.txt
A mlir/lib/Dialect/Func/Extensions/MeshShardingExtensions.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/lib/Dialect/Mesh/Transforms/ShardingPropagation.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
M mlir/lib/Dialect/Tosa/IR/ShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Transform/IR/TransformInterfaces.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Dialect/ArmNeon/invalid.mlir
M mlir/test/Dialect/ArmNeon/roundtrip.mlir
M mlir/test/Dialect/ArmSME/invalid.mlir
M mlir/test/Dialect/ArmSME/outer-product-fusion.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
A mlir/test/Dialect/Mesh/spmdization.mlir
M mlir/test/Dialect/OpenACC/legalize-data.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-i8i8i32.mlir
M mlir/test/Target/LLVMIR/arm-neon.mlir
M openmp/libomptarget/src/omptarget.cpp
M openmp/libomptarget/test/lit.cfg
A openmp/libomptarget/test/mapping/auto_zero_copy_globals.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/fhahn/vplan-uniform-scalar-lanes
Compare: https://github.com/llvm/llvm-project/compare/d2c51ec80522...82d74df4af30
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