[all-commits] [llvm/llvm-project] ff9af4: [CodeGen] Convert tests to opaque pointers (NFC)
Nikita Popov via All-commits
all-commits at lists.llvm.org
Mon Feb 5 05:07:26 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: ff9af4c43ad71eeba2cabe99609cfaa0fd54c1d0
https://github.com/llvm/llvm-project/commit/ff9af4c43ad71eeba2cabe99609cfaa0fd54c1d0
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M llvm/test/CodeGen/BPF/BTF/builtin-btf-type-id.ll
M llvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll
M llvm/test/CodeGen/BPF/BTF/type-tag-fixup-fwd.ll
M llvm/test/CodeGen/BPF/BTF/type-tag-fixup-resolved.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll
M llvm/test/CodeGen/BPF/ex1.ll
M llvm/test/CodeGen/BPF/reloc.ll
M llvm/test/CodeGen/BPF/remove_truncate_3.ll
M llvm/test/CodeGen/BPF/sockex2.ll
M llvm/test/CodeGen/BPF/xadd.ll
M llvm/test/CodeGen/BPF/xadd_legal.ll
M llvm/test/CodeGen/Generic/DbgValueAggregate.ll
M llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables-x.mir
M llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir
M llvm/test/CodeGen/Generic/MIRStripDebug/all.mir
M llvm/test/CodeGen/Generic/MIRStripDebug/dont-strip-real-debug-info.mir
M llvm/test/CodeGen/Generic/MIRStripDebug/multiple-moduleflags.mir
M llvm/test/CodeGen/Hexagon/autohvx/fsplat.ll
M llvm/test/CodeGen/Hexagon/autohvx/hfsplat.ll
M llvm/test/CodeGen/Hexagon/cmpy-round.ll
M llvm/test/CodeGen/Hexagon/const-pool-tf.ll
M llvm/test/CodeGen/Hexagon/debug-prologue-loc.ll
M llvm/test/CodeGen/Hexagon/fixed-spill-mutable.ll
M llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
M llvm/test/CodeGen/Hexagon/memcpy-likely-aligned.ll
M llvm/test/CodeGen/Hexagon/swp-carried-dep1.mir
M llvm/test/CodeGen/Hexagon/swp-carried-dep2.mir
M llvm/test/CodeGen/Hexagon/swp-memrefs-epilog.ll
M llvm/test/CodeGen/Hexagon/swp-new-phi.ll
M llvm/test/CodeGen/Hexagon/v5_insns.ll
M llvm/test/CodeGen/Hexagon/v60Vasr.ll
M llvm/test/CodeGen/Hexagon/vdmpy-halide-test.ll
M llvm/test/CodeGen/Hexagon/vect-regpairs.ll
M llvm/test/CodeGen/Hexagon/vect_setcc_v2i16.ll
M llvm/test/CodeGen/Hexagon/vmpa-halide-test.ll
M llvm/test/CodeGen/Lanai/codemodel.ll
M llvm/test/CodeGen/Lanai/inlineasm-output-template.ll
M llvm/test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
M llvm/test/CodeGen/Lanai/mem_alu_combiner.ll
M llvm/test/CodeGen/Lanai/peephole-compare.mir
M llvm/test/CodeGen/Lanai/set_and_hi.ll
M llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll
M llvm/test/CodeGen/Lanai/subword.ll
M llvm/test/CodeGen/LoongArch/frame.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld-non-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl-non-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-st-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-st-non-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-st.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm-non-imm.ll
M llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ld-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ld-non-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ld.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ldrepl-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ldrepl-non-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-ldrepl.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-st-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-st-non-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-st.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm-invalid-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm-non-imm.ll
M llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm.ll
M llvm/test/CodeGen/LoongArch/tail-calls.ll
M llvm/test/CodeGen/MIR/AArch64/expected-target-flag-name.mir
M llvm/test/CodeGen/MIR/AArch64/invalid-target-flag-name.mir
M llvm/test/CodeGen/MIR/AArch64/machine-metadata-error.mir
M llvm/test/CodeGen/MIR/AArch64/machine-metadata.mir
M llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
M llvm/test/CodeGen/MIR/AArch64/swp.mir
M llvm/test/CodeGen/MIR/AArch64/target-flags.mir
M llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll
M llvm/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir
M llvm/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
M llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
M llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir
M llvm/test/CodeGen/MIR/ARM/expected-closing-brace.mir
M llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir
M llvm/test/CodeGen/MIR/Generic/frame-info.mir
M llvm/test/CodeGen/MIR/Generic/llvm-ir-error-reported.mir
M llvm/test/CodeGen/MIR/Mips/memory-operands.mir
M llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
M llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
M llvm/test/CodeGen/MIR/X86/block-address-operands.mir
M llvm/test/CodeGen/MIR/X86/branch-folder-with-label.mir
M llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
M llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
M llvm/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir
M llvm/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir
M llvm/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir
M llvm/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir
M llvm/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir
M llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
M llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
M llvm/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir
M llvm/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir
M llvm/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir
M llvm/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir
M llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir
M llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir
M llvm/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir
M llvm/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir
M llvm/test/CodeGen/MIR/X86/expected-number-after-bb.mir
M llvm/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir
M llvm/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir
M llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir
M llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation2.mir
M llvm/test/CodeGen/MIR/X86/expected-stack-object.mir
M llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir
M llvm/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir
M llvm/test/CodeGen/MIR/X86/external-symbol-operands.mir
M llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir
M llvm/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
M llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
M llvm/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
M llvm/test/CodeGen/MIR/X86/frame-info-stack-references.mir
M llvm/test/CodeGen/MIR/X86/global-value-operands.mir
M llvm/test/CodeGen/MIR/X86/instr-heap-alloc-operands.mir
M llvm/test/CodeGen/MIR/X86/instr-pcsections.mir
M llvm/test/CodeGen/MIR/X86/instructions-debug-location.mir
M llvm/test/CodeGen/MIR/X86/invalid-metadata-node-type.mir
M llvm/test/CodeGen/MIR/X86/invalid-target-flag-name.mir
M llvm/test/CodeGen/MIR/X86/large-index-number-error.mir
M llvm/test/CodeGen/MIR/X86/large-offset-number-error.mir
M llvm/test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir
M llvm/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
M llvm/test/CodeGen/MIR/X86/machine-metadata-error.mir
M llvm/test/CodeGen/MIR/X86/machine-metadata.mir
M llvm/test/CodeGen/MIR/X86/machine-verifier-address.mir
M llvm/test/CodeGen/MIR/X86/metadata-operands.mir
M llvm/test/CodeGen/MIR/X86/missing-closing-quote.mir
M llvm/test/CodeGen/MIR/X86/missing-implicit-operand.mir
M llvm/test/CodeGen/MIR/X86/null-register-operands.mir
M llvm/test/CodeGen/MIR/X86/pr38773.mir
M llvm/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir
M llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir
M llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir
M llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
M llvm/test/CodeGen/MIR/X86/stack-object-debug-info.mir
M llvm/test/CodeGen/MIR/X86/stack-object-invalid-name.mir
M llvm/test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir
M llvm/test/CodeGen/MIR/X86/stack-object-operands.mir
M llvm/test/CodeGen/MIR/X86/stack-object-redefinition-error.mir
M llvm/test/CodeGen/MIR/X86/stack-objects.mir
M llvm/test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir
M llvm/test/CodeGen/MIR/X86/undefined-global-value.mir
M llvm/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir
M llvm/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir
M llvm/test/CodeGen/MIR/X86/undefined-named-global-value.mir
M llvm/test/CodeGen/MIR/X86/undefined-stack-object.mir
M llvm/test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir
M llvm/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir
M llvm/test/CodeGen/MIR/X86/unknown-metadata-keyword.mir
M llvm/test/CodeGen/MIR/X86/unknown-metadata-node.mir
M llvm/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir
M llvm/test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir
M llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
M llvm/test/CodeGen/MSP430/2009-05-10-CyclicDAG.ll
M llvm/test/CodeGen/MSP430/2009-05-17-Rot.ll
M llvm/test/CodeGen/MSP430/2009-05-17-Shift.ll
M llvm/test/CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll
M llvm/test/CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll
M llvm/test/CodeGen/MSP430/2009-10-10-OrImpDef.ll
M llvm/test/CodeGen/MSP430/2009-11-08-InvalidResNo.ll
M llvm/test/CodeGen/MSP430/2009-12-21-FrameAddr.ll
M llvm/test/CodeGen/MSP430/2009-12-22-InlineAsm.ll
M llvm/test/CodeGen/MSP430/2010-05-01-CombinerAnd.ll
M llvm/test/CodeGen/MSP430/AddrMode-bis-rx.ll
M llvm/test/CodeGen/MSP430/AddrMode-bis-xr.ll
M llvm/test/CodeGen/MSP430/AddrMode-mov-rx.ll
M llvm/test/CodeGen/MSP430/AddrMode-mov-xr.ll
M llvm/test/CodeGen/MSP430/BranchSelector.ll
M llvm/test/CodeGen/MSP430/Inst16mi.ll
M llvm/test/CodeGen/MSP430/Inst16mm.ll
M llvm/test/CodeGen/MSP430/Inst16mr.ll
M llvm/test/CodeGen/MSP430/Inst16rm.ll
M llvm/test/CodeGen/MSP430/Inst8mi.ll
M llvm/test/CodeGen/MSP430/Inst8mm.ll
M llvm/test/CodeGen/MSP430/Inst8mr.ll
M llvm/test/CodeGen/MSP430/Inst8rm.ll
M llvm/test/CodeGen/MSP430/InstII.ll
M llvm/test/CodeGen/MSP430/bit.ll
M llvm/test/CodeGen/MSP430/byval.ll
M llvm/test/CodeGen/MSP430/callee-saved.ll
M llvm/test/CodeGen/MSP430/calls.ll
M llvm/test/CodeGen/MSP430/cc_args.ll
M llvm/test/CodeGen/MSP430/cc_ret.ll
M llvm/test/CodeGen/MSP430/fp.ll
M llvm/test/CodeGen/MSP430/hwmult16.ll
M llvm/test/CodeGen/MSP430/hwmult32.ll
M llvm/test/CodeGen/MSP430/hwmultf5.ll
M llvm/test/CodeGen/MSP430/indirectbr.ll
M llvm/test/CodeGen/MSP430/indirectbr2.ll
M llvm/test/CodeGen/MSP430/inline-asm-absolute-addressing.ll
M llvm/test/CodeGen/MSP430/inline-asm.ll
M llvm/test/CodeGen/MSP430/inlineasm-output-template.ll
M llvm/test/CodeGen/MSP430/interrupt.ll
M llvm/test/CodeGen/MSP430/jumptable.ll
M llvm/test/CodeGen/MSP430/libcalls.ll
M llvm/test/CodeGen/MSP430/memset.ll
M llvm/test/CodeGen/MSP430/misched-msp430.ll
M llvm/test/CodeGen/MSP430/mult-alt-generic-msp430.ll
M llvm/test/CodeGen/MSP430/postinc.ll
M llvm/test/CodeGen/MSP430/promote-i8-mul.ll
M llvm/test/CodeGen/MSP430/spill-to-stack.ll
M llvm/test/CodeGen/MSP430/stacksave_restore.ll
M llvm/test/CodeGen/MSP430/struct-return.ll
M llvm/test/CodeGen/MSP430/struct_layout.ll
M llvm/test/CodeGen/MSP430/transient-stack-alignment.ll
M llvm/test/CodeGen/MSP430/vararg.ll
M llvm/test/CodeGen/Mips/GlobalISel/instruction-select/var_arg.mir
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/store_split_because_of_memsize_or_align.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/var_arg.mir
M llvm/test/CodeGen/Mips/GlobalISel/mips-prelegalizer-combiner/inline-memcpy.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/var_arg.mir
M llvm/test/CodeGen/Mips/hf16call32.ll
M llvm/test/CodeGen/Mips/hfptrcall.ll
M llvm/test/CodeGen/Mips/mips16_fpret.ll
M llvm/test/CodeGen/Mips/msa/emergency-spill.mir
M llvm/test/CodeGen/Mips/mulull.ll
M llvm/test/CodeGen/NVPTX/addrspacecast.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/ld-addrspace.ll
M llvm/test/CodeGen/NVPTX/ldu-ldg.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-ocl.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-opaque.ll
M llvm/test/CodeGen/NVPTX/short-ptr.ll
M llvm/test/CodeGen/NVPTX/st-addrspace.ll
M llvm/test/CodeGen/PowerPC/2007-11-04-CoalescerCrash.ll
M llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll
M llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll
M llvm/test/CodeGen/PowerPC/aix-complex.ll
M llvm/test/CodeGen/PowerPC/aix-tls-gd-target-flags.ll
M llvm/test/CodeGen/PowerPC/block-placement.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs-R0-special-handling.mir
M llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
M llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
M llvm/test/CodeGen/PowerPC/fast-isel-branch.ll
M llvm/test/CodeGen/PowerPC/lsr-insns-cost.ll
M llvm/test/CodeGen/PowerPC/ppc-TOC-stats.ll
M llvm/test/CodeGen/PowerPC/ppc32-selectcc-i64.ll
M llvm/test/CodeGen/PowerPC/preincprep-i64-check.ll
M llvm/test/CodeGen/PowerPC/preincprep-nontrans-crash.ll
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
M llvm/test/CodeGen/PowerPC/sink-down-more-instructions-regpressure-high.mir
M llvm/test/CodeGen/PowerPC/sms-phi-1.ll
M llvm/test/CodeGen/PowerPC/sms-phi-3.ll
M llvm/test/CodeGen/PowerPC/stack-coloring-vararg.mir
M llvm/test/CodeGen/PowerPC/toc-load-sched-bug.ll
M llvm/test/CodeGen/PowerPC/vsx-infl-copy1.ll
M llvm/test/CodeGen/PowerPC/vsx-infl-copy2.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/copy-frameindex.mir
M llvm/test/CodeGen/RISCV/copyprop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/fli-licm.ll
M llvm/test/CodeGen/RISCV/live-sp.mir
M llvm/test/CodeGen/RISCV/make-compressible-rv64.mir
M llvm/test/CodeGen/RISCV/make-compressible.mir
M llvm/test/CodeGen/RISCV/misched-load-clustering.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/prefetch.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/xtheadmemidx.ll
M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
M llvm/test/CodeGen/RISCV/rv64-stackmap-frame-setup.ll
M llvm/test/CodeGen/RISCV/rv64-stackmap.ll
M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
M llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir
M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll
M llvm/test/CodeGen/RISCV/rvv/implicit-def-copy.ll
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/legalize-store-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/load-mask.ll
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll
M llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/masked-store-fp.ll
M llvm/test/CodeGen/RISCV/rvv/masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/masked-tama.ll
M llvm/test/CodeGen/RISCV/rvv/masked-tamu.ll
M llvm/test/CodeGen/RISCV/rvv/masked-tuma.ll
M llvm/test/CodeGen/RISCV/rvv/masked-tumu.ll
M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/narrow-shift-extend.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-masked-vops.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops-mir.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
M llvm/test/CodeGen/RISCV/rvv/scalable-vector-struct.ll
M llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/tail-agnostic-impdef-copy.mir
M llvm/test/CodeGen/RISCV/rvv/unaligned-loads-stores.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
M llvm/test/CodeGen/RISCV/rvv/vle.ll
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
M llvm/test/CodeGen/RISCV/rvv/vleff.ll
M llvm/test/CodeGen/RISCV/rvv/vlm.ll
M llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vloxei.ll
M llvm/test/CodeGen/RISCV/rvv/vlse.ll
M llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vluxei.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vse.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
M llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll
M llvm/test/CodeGen/RISCV/rvv/vsm.ll
M llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsoxei.ll
M llvm/test/CodeGen/RISCV/rvv/vsse.ll
M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vsuxei.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
M llvm/test/CodeGen/RISCV/rvv/zve32-types.ll
M llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir
M llvm/test/CodeGen/RISCV/stack-realignment.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/xtheadfmemidx.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
M llvm/test/CodeGen/RISCV/xtheadmempair.ll
M llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll
M llvm/test/CodeGen/SPARC/2008-10-10-InlineAsmRegOperand.ll
M llvm/test/CodeGen/SPARC/2009-08-28-PIC.ll
M llvm/test/CodeGen/SPARC/2011-01-11-CC.ll
M llvm/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
M llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
M llvm/test/CodeGen/SPARC/2011-01-21-ByValArgs.ll
M llvm/test/CodeGen/SPARC/2011-01-22-SRet.ll
M llvm/test/CodeGen/SPARC/2011-12-03-TailDuplication.ll
M llvm/test/CodeGen/SPARC/2012-05-01-LowerArguments.ll
M llvm/test/CodeGen/SPARC/2013-05-17-CallFrame.ll
M llvm/test/CodeGen/SPARC/32abi.ll
M llvm/test/CodeGen/SPARC/64abi.ll
M llvm/test/CodeGen/SPARC/64atomics.ll
M llvm/test/CodeGen/SPARC/64bit.ll
M llvm/test/CodeGen/SPARC/64cond.ll
M llvm/test/CodeGen/SPARC/LeonCASAInstructionUT.ll
M llvm/test/CodeGen/SPARC/LeonFixAllFDIVSQRTPassUT.ll
M llvm/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll
M llvm/test/CodeGen/SPARC/LeonItinerariesUT.ll
M llvm/test/CodeGen/SPARC/LeonSMACUMACInstructionUT.ll
M llvm/test/CodeGen/SPARC/atomics.ll
M llvm/test/CodeGen/SPARC/basictest.ll
M llvm/test/CodeGen/SPARC/bigreturn.ll
M llvm/test/CodeGen/SPARC/blockaddr.ll
M llvm/test/CodeGen/SPARC/cast-sret-func.ll
M llvm/test/CodeGen/SPARC/constructor.ll
M llvm/test/CodeGen/SPARC/exception.ll
M llvm/test/CodeGen/SPARC/fail-alloca-align.ll
M llvm/test/CodeGen/SPARC/float.ll
M llvm/test/CodeGen/SPARC/fp128.ll
M llvm/test/CodeGen/SPARC/fp16-promote.ll
M llvm/test/CodeGen/SPARC/func-addr.ll
M llvm/test/CodeGen/SPARC/globals.ll
M llvm/test/CodeGen/SPARC/inlineasm-output-template.ll
M llvm/test/CodeGen/SPARC/inlineasm-v9.ll
M llvm/test/CodeGen/SPARC/inlineasm.ll
M llvm/test/CodeGen/SPARC/leafproc.ll
M llvm/test/CodeGen/SPARC/missing-sret.ll
M llvm/test/CodeGen/SPARC/mult-alt-generic-sparc.ll
M llvm/test/CodeGen/SPARC/obj-relocs.ll
M llvm/test/CodeGen/SPARC/overflow-intrinsic-optimizations.ll
M llvm/test/CodeGen/SPARC/pic.ll
M llvm/test/CodeGen/SPARC/private.ll
M llvm/test/CodeGen/SPARC/reserved-regs.ll
M llvm/test/CodeGen/SPARC/select-mask.ll
M llvm/test/CodeGen/SPARC/setjmp.ll
M llvm/test/CodeGen/SPARC/spillsize.ll
M llvm/test/CodeGen/SPARC/sret-secondary.ll
M llvm/test/CodeGen/SPARC/stack-align.ll
M llvm/test/CodeGen/SPARC/stack-protector.ll
M llvm/test/CodeGen/SPARC/tailcall.ll
M llvm/test/CodeGen/SPARC/thread-pointer.ll
M llvm/test/CodeGen/SPARC/tls.ll
M llvm/test/CodeGen/SPARC/varargs-v8.ll
M llvm/test/CodeGen/SPARC/varargs.ll
M llvm/test/CodeGen/SPARC/vector-extract-elt.ll
M llvm/test/CodeGen/SPARC/zerostructcall.ll
M llvm/test/CodeGen/SystemZ/Large/branch-01.ll
M llvm/test/CodeGen/SystemZ/RAbasic-invalid-LR-update.mir
M llvm/test/CodeGen/SystemZ/clear-liverange-spillreg.mir
M llvm/test/CodeGen/SystemZ/cond-move-04.mir
M llvm/test/CodeGen/SystemZ/cond-move-05.mir
M llvm/test/CodeGen/SystemZ/cond-move-08.mir
M llvm/test/CodeGen/SystemZ/cond-move-regalloc-hints-02.mir
M llvm/test/CodeGen/SystemZ/cond-move-regalloc-hints.mir
M llvm/test/CodeGen/SystemZ/dag-combine-02.ll
M llvm/test/CodeGen/SystemZ/debuginstr-00.mir
M llvm/test/CodeGen/SystemZ/debuginstr-01.mir
M llvm/test/CodeGen/SystemZ/debuginstr-cgp.mir
M llvm/test/CodeGen/SystemZ/foldmemop-imm-02.mir
M llvm/test/CodeGen/SystemZ/foldmemop-msc.mir
M llvm/test/CodeGen/SystemZ/foldmemop-vec-binops.mir
M llvm/test/CodeGen/SystemZ/foldmemop-vec-cc.mir
M llvm/test/CodeGen/SystemZ/foldmemop-vec-cmp.mir
M llvm/test/CodeGen/SystemZ/foldmemop-vec-fusedfp.mir
M llvm/test/CodeGen/SystemZ/fp-conv-17.mir
M llvm/test/CodeGen/SystemZ/frame-26.mir
M llvm/test/CodeGen/SystemZ/int-cmp-56.mir
M llvm/test/CodeGen/SystemZ/isel-debug.ll
M llvm/test/CodeGen/SystemZ/load-and-test-RA-hints.mir
M llvm/test/CodeGen/SystemZ/loop-04.ll
M llvm/test/CodeGen/SystemZ/multiselect-02.mir
M llvm/test/CodeGen/SystemZ/postra-sched-expandedops.mir
M llvm/test/CodeGen/SystemZ/regalloc-GR128-02.mir
M llvm/test/CodeGen/SystemZ/selectcc-04.ll
M llvm/test/CodeGen/SystemZ/subregliveness-06.mir
M llvm/test/CodeGen/SystemZ/zos-landingpad.ll
M llvm/test/CodeGen/VE/Scalar/pic_access_data.ll
M llvm/test/CodeGen/VE/Scalar/pic_indirect_func_call.ll
M llvm/test/CodeGen/WebAssembly/cfg-stackify.ll
M llvm/test/CodeGen/WebAssembly/global.ll
M llvm/test/CodeGen/WebAssembly/userstack.ll
M llvm/test/CodeGen/WinCFGuard/cfguard-cast.ll
M llvm/test/CodeGen/WinCFGuard/cfguard-giats.ll
M llvm/test/CodeGen/WinCFGuard/cfguard.ll
M llvm/test/CodeGen/XCore/threads.ll
Log Message:
-----------
[CodeGen] Convert tests to opaque pointers (NFC)
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