[all-commits] [llvm/llvm-project] 1aee1e: [Analysis] Convert tests to opaque pointers (NFC)

[Nikita Popov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1aee1e1f4c4b504becc06521546de992a662694b
      https://github.com/llvm/llvm-project/commit/1aee1e1f4c4b504becc06521546de992a662694b
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-02-05 (Mon, 05 Feb 2024)

  Changed paths:
    M llvm/test/Analysis/BasicAA/assume-index-positive.ll
    M llvm/test/Analysis/BasicAA/index-size.ll
    M llvm/test/Analysis/BasicAA/noalias-bugs.ll
    M llvm/test/Analysis/BasicAA/vscale.ll
    M llvm/test/Analysis/BlockFrequencyInfo/basic.ll
    M llvm/test/Analysis/BlockFrequencyInfo/irreducible_loop_crash.ll
    M llvm/test/Analysis/BlockFrequencyInfo/irreducible_pgo.ll
    M llvm/test/Analysis/BlockFrequencyInfo/loop_with_invoke.ll
    M llvm/test/Analysis/BlockFrequencyInfo/loops_with_profile_info.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-7.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-6.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-7.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-7.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-7.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-6.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-7.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-8.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-4.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-5.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-7.ll
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-8.ll
    M llvm/test/Analysis/Dominators/2007-01-14-BreakCritEdges.ll
    M llvm/test/Analysis/Dominators/2007-07-12-SplitBlock.ll
    M llvm/test/Analysis/Dominators/invoke.ll
    M llvm/test/Analysis/FunctionPropertiesAnalysis/matmul.ll
    M llvm/test/Analysis/IVUsers/deep_recursion_in_scev.ll
    M llvm/test/Analysis/LazyCallGraph/non-leaf-intrinsics.ll
    M llvm/test/Analysis/LazyValueAnalysis/invalidation.ll
    M llvm/test/Analysis/LoopAccessAnalysis/forked-pointers.ll
    M llvm/test/Analysis/LoopAccessAnalysis/underlying-objects-2.ll
    M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/LoopnestFixedSize.ll
    M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
    M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost.ll
    M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/loads-store.ll
    M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll
    M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matvecmul.ll
    M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/single-store.ll
    M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/stencil.ll
    M llvm/test/Analysis/LoopCacheAnalysis/compute-cost.ll
    M llvm/test/Analysis/LoopInfo/annotated-parallel-complex.ll
    M llvm/test/Analysis/LoopInfo/annotated-parallel-simple.ll
    M llvm/test/Analysis/LoopNestAnalysis/duplicate-successors.ll
    M llvm/test/Analysis/LoopNestAnalysis/imperfectnest.ll
    M llvm/test/Analysis/LoopNestAnalysis/infinite.ll
    M llvm/test/Analysis/LoopNestAnalysis/perfectnest.ll
    M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform-gmir.mir
    M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
    M llvm/test/Analysis/UniformityAnalysis/AMDGPU/atomics.ll

  Log Message:
  -----------
  [Analysis] Convert tests to opaque pointers (NFC)