[all-commits] [llvm/llvm-project] 32b996: [RISCV] Custom promote i32 UADDSAT/USUBSAT for -ri...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 32b99617acbc4773caee45df10a7fd602b8db0ff
      https://github.com/llvm/llvm-project/commit/32b99617acbc4773caee45df10a7fd602b8db0ff
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-04 (Sun, 04 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/uadd_sat.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/uadd_sat_plus.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/usub_sat.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/usub_sat_plus.ll

  Log Message:
  -----------
  [RISCV] Custom promote i32 UADDSAT/USUBSAT for -riscv-experimental-rv64-legal-i32 with Zbb.


  Commit: 146e5ce481f3a9232f2188cc664a65e98f8a0985
      https://github.com/llvm/llvm-project/commit/146e5ce481f3a9232f2188cc664a65e98f8a0985
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-04 (Sun, 04 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
    M llvm/test/CodeGen/RISCV/rv64-legal-i32/uadd_sat_plus.ll
    M llvm/test/CodeGen/RISCV/rv64-legal-i32/usub_sat_plus.ll

  Log Message:
  -----------
  [RISCV] Add i32 zext.h pattern for -riscv-experimental-rv64-legal-i32.


Compare: https://github.com/llvm/llvm-project/compare/256200732111...146e5ce481f3