[all-commits] [llvm/llvm-project] f2cf8d: [RISCV] Add more XTheadMemIdx patterns for -riscv-...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f2cf8da636ee2b27b54f14fea540d7ef75cebc05
      https://github.com/llvm/llvm-project/commit/f2cf8da636ee2b27b54f14fea540d7ef75cebc05
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-03 (Sat, 03 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/xtheadmemidx.ll

  Log Message:
  -----------
  [RISCV] Add more XTheadMemIdx patterns for -riscv-experimental-rv64-legal-i32.