[all-commits] [llvm/llvm-project] 08e942: [RISCV] Combine (xor (trunc (X cc Y)) 1) -> (trunc...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 08e942aca64d4d16e55a25d7e7eda8ef192727fd
      https://github.com/llvm/llvm-project/commit/08e942aca64d4d16e55a25d7e7eda8ef192727fd
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-02-03 (Sat, 03 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll

  Log Message:
  -----------
  [RISCV] Combine (xor (trunc (X cc Y)) 1) -> (trunc (X !cc Y)) for RV64LegalI32.

This is needed with RV64LegalI32 when the setcc is created after type
legalization. An i1 xor would have been promoted to i32, but the setcc
would have i64 result.