[all-commits] [llvm/llvm-project] d1e162: [AArch64] Add custom lowering for load <3 x i8>. (...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d1e162e5d94e8c0b1c46bc0c9c45f96eacdd75c8
      https://github.com/llvm/llvm-project/commit/d1e162e5d94e8c0b1c46bc0c9c45f96eacdd75c8
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-01-30 (Tue, 30 Jan 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll

  Log Message:
  -----------
  [AArch64] Add custom lowering for load <3 x i8>. (#78632)

Add custom combine to lower load <3 x i8> as the more efficient sequence
below:
   ldrb wX, [x0, #2]
   ldrh wY, [x0]
   orr wX, wY, wX, lsl #16
   fmov s0, wX

At the moment, there are almost no cases in which such vector operations
will be generated automatically. The motivating case is non-power-of-2
SLP vectorization: https://github.com/llvm/llvm-project/pull/77790