[all-commits] [llvm/llvm-project] fb94c6: [RISCV][SiFive] Reduce intrinsics of SiFive VCIX e...

[Brandon Wu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fb94c6491a114ebd5815b1d42665a8f6bcd9d639
      https://github.com/llvm/llvm-project/commit/fb94c6491a114ebd5815b1d42665a8f6bcd9d639
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2024-01-26 (Fri, 26 Jan 2024)

  Changed paths:
    M clang/include/clang/Basic/riscv_sifive_vector.td
    M clang/lib/Headers/sifive_vector.h
    M clang/lib/Sema/SemaChecking.cpp
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/xsfvcp-x-rv64.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/xsfvcp-x.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/xsfvcp-index-out-of-range.c
    M llvm/include/llvm/IR/IntrinsicsRISCVXsf.td
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-x.ll
    M llvm/test/CodeGen/RISCV/rvv/xsfvcp-x.ll

  Log Message:
  -----------
  [RISCV][SiFive] Reduce intrinsics of SiFive VCIX extension (#79407)

This patch models LMUL and SEW as inputs in sf_vc_x_se and sf_vc_i_se,
it reduces 42 intrinsics in the lookup table.