[all-commits] [llvm/llvm-project] cfddb5: [AMDGPU][GFX12] VOP encoding and codegen - add sup...

[Mariusz Sikora via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cfddb59be2124f7ec615f48a2d0395c6fdb1bb56
      https://github.com/llvm/llvm-project/commit/cfddb59be2124f7ec615f48a2d0395c6fdb1bb56
  Author: Mariusz Sikora <mariusz.sikora at amd.com>
  Date:   2024-01-24 (Wed, 24 Jan 2024)

  Changed paths:
    M clang/test/CodeGenOpenCL/amdgpu-features.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/lib/Target/AMDGPU/VOP1Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/AMDGPU/VOPInstructions.td
    M llvm/lib/TargetParser/TargetParser.cpp
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.mir
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
    M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
    M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt

  Log Message:
  -----------
  [AMDGPU][GFX12] VOP encoding and codegen - add support for v_cvt fp8/… (#78414)

…bf8 instructions

    Add VOP1, VOP1_DPP8, VOP1_DPP16, VOP3, VOP3_DPP8, VOP3_DPP16
    instructions that were supported on GFX940 (MI300):
    - V_CVT_F32_FP8
    - V_CVT_F32_BF8
    - V_CVT_PK_F32_FP8
    - V_CVT_PK_F32_BF8
    - V_CVT_PK_FP8_F32
    - V_CVT_PK_BF8_F32
    - V_CVT_SR_FP8_F32
    - V_CVT_SR_BF8_F32

---------

Co-authored-by: Mateja Marjanovic <mateja.marjanovic at amd.com>
Co-authored-by: Mirko Brkušanin <Mirko.Brkusanin at amd.com>