[all-commits] [llvm/llvm-project] bb8a87: [RISCV] Exploit register boundaries when lowering ...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bb8a8770e203ba027d141cd1200e93809ea66c8f
      https://github.com/llvm/llvm-project/commit/bb8a8770e203ba027d141cd1200e93809ea66c8f
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-01-23 (Tue, 23 Jan 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll

  Log Message:
  -----------
  [RISCV] Exploit register boundaries when lowering shuffle with exact vlen (#79072)

If we have a shuffle which is larger than m1, we may be able to split it
into a series of individual m1 shuffles. This patch starts with the
subcase where the mask allows a 1-to-1 mapping from source register to
destination register - each with a possible permutation of their own. We
can potentially extend this later, thought in practice this seems to
already catch a number of the most interesting cases.