[all-commits] [llvm/llvm-project] d8628a: [RISCV] Add IntrArgMemOnly for vector unit stride ...

[Jianjian Guan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d8628a00fd92c6f9db631f817a63eada90707ad2
      https://github.com/llvm/llvm-project/commit/d8628a00fd92c6f9db631f817a63eada90707ad2
  Author: Jianjian Guan <jacquesguan at me.com>
  Date:   2024-01-23 (Tue, 23 Jan 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsRISCV.td

  Log Message:
  -----------
  [RISCV] Add IntrArgMemOnly for vector unit stride load/store intrinsics (#78415)

IntrArgMemOnly means the intrinsic only accesses memory that its
pointer-typed argument(s) points to. I think RVV load/store intrinsics
meets it. Add IntrArgMemOnly would help in some passes, by example, it
could add `alais.scope` to intrinsics callee when try to inline a
function that has noalais parameter(s).