[all-commits] [llvm/llvm-project] 5c68c6: [X86] Support encoding/decoding and lowering for A...

[Shengchen Kan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5c68c6d70fc204b0efdb2af95dfb328d616129e3
      https://github.com/llvm/llvm-project/commit/5c68c6d70fc204b0efdb2af95dfb328d616129e3
  Author: Shengchen Kan <shengchen.kan at intel.com>
  Date:   2024-01-23 (Tue, 23 Jan 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrCompiler.td
    M llvm/lib/Target/X86/X86InstrShiftRotate.td
    M llvm/lib/Target/X86/X86InstrUtils.td
    A llvm/test/CodeGen/X86/apx/rol.ll
    A llvm/test/CodeGen/X86/apx/ror.ll
    A llvm/test/CodeGen/X86/apx/sar.ll
    A llvm/test/CodeGen/X86/apx/shl.ll
    A llvm/test/CodeGen/X86/apx/shld.ll
    A llvm/test/CodeGen/X86/apx/shr.ll
    A llvm/test/CodeGen/X86/apx/shrd.ll
    A llvm/test/MC/Disassembler/X86/apx/rcl.txt
    A llvm/test/MC/Disassembler/X86/apx/rcr.txt
    A llvm/test/MC/Disassembler/X86/apx/rol.txt
    A llvm/test/MC/Disassembler/X86/apx/ror.txt
    A llvm/test/MC/Disassembler/X86/apx/sar.txt
    A llvm/test/MC/Disassembler/X86/apx/shl.txt
    A llvm/test/MC/Disassembler/X86/apx/shld.txt
    A llvm/test/MC/Disassembler/X86/apx/shr.txt
    A llvm/test/MC/Disassembler/X86/apx/shrd.txt
    A llvm/test/MC/X86/apx/rcl-att.s
    A llvm/test/MC/X86/apx/rcl-intel.s
    A llvm/test/MC/X86/apx/rcr-att.s
    A llvm/test/MC/X86/apx/rcr-intel.s
    A llvm/test/MC/X86/apx/rol-att.s
    A llvm/test/MC/X86/apx/rol-intel.s
    A llvm/test/MC/X86/apx/ror-att.s
    A llvm/test/MC/X86/apx/ror-intel.s
    A llvm/test/MC/X86/apx/sar-att.s
    A llvm/test/MC/X86/apx/sar-intel.s
    A llvm/test/MC/X86/apx/shl-att.s
    A llvm/test/MC/X86/apx/shl-intel.s
    A llvm/test/MC/X86/apx/shld-att.s
    A llvm/test/MC/X86/apx/shld-intel.s
    A llvm/test/MC/X86/apx/shr-att.s
    A llvm/test/MC/X86/apx/shr-intel.s
    A llvm/test/MC/X86/apx/shrd-att.s
    A llvm/test/MC/X86/apx/shrd-intel.s
    M llvm/test/TableGen/x86-fold-tables.inc

  Log Message:
  -----------
  [X86] Support encoding/decoding and lowering for APX variant SHL/SHR/SAR/ROL/ROR/RCL/RCR/SHLD/SHRD (#78853)

Four variants: promoted legacy, ND (new data destination), NF (no flags
update) and NF_ND (NF + ND).

The syntax of NF instructions is aligned with GNU binutils.
https://sourceware.org/pipermail/binutils/2023-September/129545.html