[all-commits] [llvm/llvm-project] 7c8030: [RISCV] Combine HasStdExtZfhOrZfhmin and HasStdExt...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7c8030e9bbad913a6a87ddf9ea4d69ab33ffb6c4
      https://github.com/llvm/llvm-project/commit/7c8030e9bbad913a6a87ddf9ea4d69ab33ffb6c4
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-01-22 (Mon, 22 Jan 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td

  Log Message:
  -----------
  [RISCV] Combine HasStdExtZfhOrZfhmin and HasStdExtZfhmin. NFC (#78826)

I kept the AssemblerPredicate and diagnostic from HasStdExtZfhOrZfhmin
that mentions both extensions, but replaced all uses with
HasStdExtZfhmin.

Same for the Zhinxmin equivalent.