[all-commits] [llvm/llvm-project] bfef16: [AArch64][GlobalISel] Legalize Shifts for Smaller/...

[chuongg3 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bfef161a80b62723bedad996aa7a697f99e6802a
      https://github.com/llvm/llvm-project/commit/bfef161a80b62723bedad996aa7a697f99e6802a
  Author: chuongg3 <chuong.goh at arm.com>
  Date:   2024-01-22 (Mon, 22 Jan 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/fcmp.ll
    M llvm/test/CodeGen/AArch64/icmp.ll
    M llvm/test/CodeGen/AArch64/sext.ll
    M llvm/test/CodeGen/AArch64/shift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Legalize Shifts for Smaller/Larger Vectors (#78750)

Legalize shl/lshr/ashr for smaller/larger vector widths with legal
element sizes

Smaller than legal vector types does not work at the moment as it relies
on G_ANYEXT to work with smaller than legal vector types