[all-commits] [llvm/llvm-project] 5cd8d5: [RISCV] Teach RISCVMergeBaseOffset to handle inlin...
Wang Pengcheng via All-commits
all-commits at lists.llvm.org
Mon Jan 22 01:36:44 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 5cd8d53cac00feafd739dba6215e1f6eed502e46
https://github.com/llvm/llvm-project/commit/5cd8d53cac00feafd739dba6215e1f6eed502e46
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-22 (Mon, 22 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineOperand.h
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
Log Message:
-----------
[RISCV] Teach RISCVMergeBaseOffset to handle inline asm (#78945)
For inline asm with memory operands, we can merge the offset into
the second operand of memory constraint operands.
Differential Revision: https://reviews.llvm.org/D158062
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