[all-commits] [llvm/llvm-project] 9f7fff: [mlir][ArmSME] Add arith-to-arm-sme conversion pas...

[Cullen Rhodes via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9f7fff7f1391ea3bec394d8251b81cea92175cca
      https://github.com/llvm/llvm-project/commit/9f7fff7f1391ea3bec394d8251b81cea92175cca
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2024-01-22 (Mon, 22 Jan 2024)

  Changed paths:
    A mlir/include/mlir/Conversion/ArithToArmSME/ArithToArmSME.h
    M mlir/include/mlir/Conversion/Passes.h
    M mlir/include/mlir/Conversion/Passes.td
    M mlir/include/mlir/Dialect/ArmSME/Utils/Utils.h
    A mlir/lib/Conversion/ArithToArmSME/ArithToArmSME.cpp
    A mlir/lib/Conversion/ArithToArmSME/CMakeLists.txt
    M mlir/lib/Conversion/CMakeLists.txt
    M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
    M mlir/lib/Dialect/ArmSME/IR/Utils.cpp
    A mlir/test/Conversion/ArithToArmSME/arith-to-arm-sme.mlir
    R mlir/test/Dialect/ArmSME/arith-ops-to-sme.mlir
    M mlir/test/Dialect/ArmSME/vector-ops-to-llvm.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir
    M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir

  Log Message:
  -----------
  [mlir][ArmSME] Add arith-to-arm-sme conversion pass (#78197)

Existing 'arith::ConstantOp' conversion and tests are moved from
VectorToArmSME. There's currently only a single op that's converted at
the moment, but this will grow in the future as things like in-tile add
are implemented. Also, 'createLoopOverTileSlices' is moved to ArmSME
utils since it's relevant for both conversions.