[all-commits] [llvm/llvm-project] 351326: [mlir] Add op printing flag to skip regions (#77726)
Amir Ayupov via All-commits
all-commits at lists.llvm.org
Thu Jan 18 14:35:29 PST 2024
Branch: refs/heads/users/aaupov/spr/main.bolt-deduplicate-equal-offsets-in-bat
Home: https://github.com/llvm/llvm-project
Commit: 3513267770802b79fe5c020cf651942678b1e951
https://github.com/llvm/llvm-project/commit/3513267770802b79fe5c020cf651942678b1e951
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/lib/IR/AsmPrinter.cpp
A mlir/test/IR/print-skip-regions.mlir
Log Message:
-----------
[mlir] Add op printing flag to skip regions (#77726)
The new flag, `--mlir-print-skip-regions`, sets the op printing option
that disables region printing. This results in the usual
`--mlir-print-ir-*` debug options printing only the names of the
executed passes and the signatures of the ops.
Example:
```mlir
// -----// IR Dump Before CSE (cse) //----- //
func.func @bar(%arg0: f32, %arg1: f32) -> f32 {...}
// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @bar(%arg0: f32, %arg1: f32) -> f32 {...}
```
The main use-case is to be triage compilation issues (crashes, slowness)
on very deep pass pipelines and with very large IR files, where printing
IR is prohibitively slow otherwise.
Commit: b58f91a31b288a7078e3b0330bd92bb14f3649de
https://github.com/llvm/llvm-project/commit/b58f91a31b288a7078e3b0330bd92bb14f3649de
Author: James Y Knight <jyknight at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
Log Message:
-----------
Set the default value for MaxAtomicSizeInBitsSupported to 0.
This was planned since its introduction, but wasn't rolled out for a
little bit longer than intended (ahem...8 years).
All in-tree targets have now been adjusted to call
setMaxAtomicSizeInBitsSupported explicitly where required, so this
should be a no-op. The docs in docs/Atomics.rst already claimed the
default was 0, so that doesn't need updating.
Commit: 649b391799ac48766186a58f385595876f3c779a
https://github.com/llvm/llvm-project/commit/649b391799ac48766186a58f385595876f3c779a
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
Log Message:
-----------
Revert "[mlir][spirv] Lower `arith` overflow flags to corresponding SPIR-V op decorations (#77714)"
Temporaryly reverting as it broke python bindings
This reverts commit 4278d9b593d31a644e4be3bb9386e2c0ed6ac6f1.
Commit: 5afc4f3a5f6cc1bae4348bdd5f479451773d09a8
https://github.com/llvm/llvm-project/commit/5afc4f3a5f6cc1bae4348bdd5f479451773d09a8
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/lib/Conversion/ArithCommon/AttrToLLVMConverter.cpp
Log Message:
-----------
Revert "[mlir][arith][nfc] Fix typos (#77700)"
Temporarily reverting as it broke python bindings
This reverts commit 9ed30012fb4f43de42ef2f265fe384d9d0b0edf2.
Commit: 5f59b720a8fc41d65964b88c64f803af86ed3cc8
https://github.com/llvm/llvm-project/commit/5f59b720a8fc41d65964b88c64f803af86ed3cc8
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/lib/Conversion/ArithCommon/AttrToLLVMConverter.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/python/ir/diagnostic_handler.py
Log Message:
-----------
Revert "[mlir][arith] Add overflow flags support to arith ops (#77211)"
Temporarily reverting as it broke python bindings
This reverts commit a7262d2d9bee9bdfdbcd03ca27a0128c2e2b1c1a.
Commit: 721dd3bc2f159f58542653b56ae272f1504875f8
https://github.com/llvm/llvm-project/commit/721dd3bc2f159f58542653b56ae272f1504875f8
Author: Artem Dergachev <adergachev at apple.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
Log Message:
-----------
[analyzer] NFC: Don't regenerate duplicate HTML reports.
This is a performance optimization for HTML diagnostics output mode.
Currently they're incredibly inefficient:
* The HTMLRewriter is re-run from scratch on every file on every report.
Each such re-run involves re-lexing the entire file and producing
a syntax-highlighted webpage of the entire file, with text behind macros
duplicated as pop-up macro expansion tooltips. Then, warning and note
bubbles are injected into the page. Only the bubble part is different
across reports; everything else can theoretically be cached.
* Additionally, if duplicate reports are emitted (with the same issue hash),
HTMLRewriter will be re-run even though the output file is going to be
discarded due to filename collision. This is mostly an issue for
path-insensitive bug reports because path-sensitive bug reports
are already deduplicated by the BugReporter as part of searching
for the shortest bug path. But on some translation units almost 80% of
bug reports are dry-run here.
We only get away with all this because there are usually very few reports
emitted per file. But if loud checkers are enabled, such as `webkit.*`,
this may explode in complexity and even cause the compiler to run over
the 32-bit SourceLocation addressing limit. (We're re-lexing everything
each time, remember?)
This patch hotfixes the *second* problem. Adds a FIXME for the first problem,
which will require more yak shaving to solve.
rdar://120801986
Commit: 93b47053c6bce5862ba4a5f7d9f6d5cbaa8cbf41
https://github.com/llvm/llvm-project/commit/93b47053c6bce5862ba4a5f7d9f6d5cbaa8cbf41
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
Log Message:
-----------
[compiler-rt][fuchsia] Preallocate a vmar for sanitizer internals (#75256)
In an effort to reduce more mmap fragmentation, allocate a large enough
vmar where we can map sanitizer internals via DoAnonymousMmap. Objects
being mapped here include asan's FakeStack, LowLevelAllocator mappings,
the primary allocator's TwoLevelMap, InternalMmapVector, StackStore, and
asan's thread internals. The vmar is large enough to hold the total size
of these objects seen in a "typical" process lifetime. If the vmar is
full, it will fallback to mapping in the root vmar.
Commit: 4cee0e3c88d4e5c96cda0a4c3e2e91d4d4b1df69
https://github.com/llvm/llvm-project/commit/4cee0e3c88d4e5c96cda0a4c3e2e91d4d4b1df69
Author: Alexandre Ganea <37383324+aganea at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M lld/cmake/modules/AddLLD.cmake
M lld/test/CMakeLists.txt
M lld/tools/lld/CMakeLists.txt
Log Message:
-----------
[LLD] Fix llvm-driver cmake integration for LLD (#76305)
Previously, even though LLD was linked as part of llvm-driver when using
`cmake ... -DLLVM_TOOL_LLVM_DRIVER_BUILD=ON`, there were build issues
when compiling incrementally. Sometimes link errors when linking LLD,
other times, the `llvm.exe` would be impropely be replaced by `lld.exe`.
Commit: 3c6f47d6b879ddd2842925d2e5da54657d9e5631
https://github.com/llvm/llvm-project/commit/3c6f47d6b879ddd2842925d2e5da54657d9e5631
Author: Alexandre Ganea <37383324+aganea at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/driver/driver.cpp
M lld/Common/DriverDispatcher.cpp
M lld/tools/lld/lld.cpp
M llvm/cmake/modules/llvm-driver-template.cpp.in
M llvm/lib/Support/InitLLVM.cpp
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/llvm-ar/llvm-ar.cpp
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
M llvm/tools/llvm-driver/llvm-driver.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp
M llvm/tools/llvm-lipo/llvm-lipo.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/tools/llvm-mt/llvm-mt.cpp
M llvm/tools/llvm-nm/llvm-nm.cpp
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-rc/llvm-rc.cpp
M llvm/tools/llvm-readobj/llvm-readobj.cpp
M llvm/tools/llvm-size/llvm-size.cpp
M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
M llvm/tools/sancov/sancov.cpp
Log Message:
-----------
[llvm-driver] Fix usage of `InitLLVM` on Windows (#76306)
Previously, some tools such as `clang` or `lld` which require strict
order for certain command-line options, such as `clang -cc1` or `lld
-flavor`, would not longer work on Windows, when these tools were linked
as part of `llvm-driver`. This was caused by `InitLLVM` which was part
of the `*_main()` function of these tools, which in turn calls
`windows::GetCommandLineArguments`. That function completly replaces
argc/argv by new UTF-8 contents, so any ajustements to argc/argv made by
`llvm-driver` prior to calling these tools was reset.
`InitLLVM` is now called by the `llvm-driver`. Any tool that
participates in (or is part of) the `llvm-driver` doesn't call
`InitLLVM` anymore.
Commit: dc61ebb44c11d2f5d03b7dd9cb80a0644a30775e
https://github.com/llvm/llvm-project/commit/dc61ebb44c11d2f5d03b7dd9cb80a0644a30775e
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/test/Format/clang-format-ignore.cpp
Log Message:
-----------
[clang] Mark clang-format-ignore.cpp as unsupported on Windows
To heal bots that have been broken for days while discussions on
https://github.com/llvm/llvm-project/pull/76733 are ongoing.
Commit: ae1c1ed6af8dd7efeb284c23ee8694fad30fff1f
https://github.com/llvm/llvm-project/commit/ae1c1ed6af8dd7efeb284c23ee8694fad30fff1f
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
A llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
Log Message:
-----------
[CodeGen] Allow `CodeGenPassBuilder` to add module pass after function pass (#77084)
In fact, there are several backends, e.g. AArch64, AMDGPU etc. add
module pass after function pass, this patch removes this constraint.
This patch also adds a simple unit test for `CodeGenPassBuilder`.
Commit: 22bc74e4432c704e42c367af558b34b2b285ab3c
https://github.com/llvm/llvm-project/commit/22bc74e4432c704e42c367af558b34b2b285ab3c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port ae1c1ed6af8d
Commit: f626b1f4ca2a6fd2b6c5eea3b53c15c4502d29fa
https://github.com/llvm/llvm-project/commit/f626b1f4ca2a6fd2b6c5eea3b53c15c4502d29fa
Author: Matthew Voss <matthew.voss at sony.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/matrix.c
Log Message:
-----------
[clang][FatLTO][UnifiedLTO] Pass -enable-matrix to the LTO driver
Unified LTO and Fat LTO do not use the regular LTO prelink pipeline when
-flto/-flto=full is specified on the command line, thus they require
LowerMatrixIntrinsicsPass to be run during the link stage. To enable
this, we pass -enable-matrix to the LTO driver, replicating ThinLTO
behavior. This fix was applied to ThinLTO in https://reviews.llvm.org/D153583.
This fixes #77621.
Commit: 8e9c531922c4f9a1ee583ef3553b8529bb8e9a9a
https://github.com/llvm/llvm-project/commit/8e9c531922c4f9a1ee583ef3553b8529bb8e9a9a
Author: Haowei <haowei at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/InterfaceStub/IFSHandler.cpp
M llvm/lib/InterfaceStub/IFSStub.cpp
A llvm/test/tools/llvm-ifs/ifs-read-invalid-symbol-type.test
M llvm/unittests/InterfaceStub/ELFYAMLTest.cpp
Log Message:
-----------
[llvm-ifs] Treat unknown symbol types as error. (#75872)
Before this patch, when an unknown symbol type is used in IFS stub, it
will be treated as a NO_TYPE and parsed without error. This patch makes
llvm-ifs throw an error when this scenario happens.
Commit: 3ef20e3fc1910977630b0392558731b199cf38e5
https://github.com/llvm/llvm-project/commit/3ef20e3fc1910977630b0392558731b199cf38e5
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/cmake/caches/Release.cmake
Log Message:
-----------
[CMake][Release] Add option for enabling LTO to cache file (#77035)
This option is LLVM_RELEASE_ENABLE_LTO and it's turned on by default.
Commit: f33e9276e2e2e34f7dd372f80612709e11d4b74f
https://github.com/llvm/llvm-project/commit/f33e9276e2e2e34f7dd372f80612709e11d4b74f
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
github-automation: Use the llvm/llvm-project repo for backport pull requests (#71727)
Now that the project uses PRs for code review, we don't need to use the
llvm/llvm-project-release-prs repo for reviewing backports.
Commit: ab02372c23d736390587aab141fe69c142373002
https://github.com/llvm/llvm-project/commit/ab02372c23d736390587aab141fe69c142373002
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M openmp/libomptarget/test/libc/assert.c
M openmp/libomptarget/test/mapping/target_derefence_array_pointrs.cpp
M openmp/libomptarget/test/mapping/target_uses_allocator.c
M openmp/libomptarget/test/mapping/target_wrong_use_device_addr.c
M openmp/libomptarget/test/offloading/bug64959.c
M openmp/libomptarget/test/offloading/info.c
M openmp/libomptarget/test/offloading/std_complex_arithmetic.cpp
M openmp/libomptarget/test/unified_shared_memory/close_enter_exit.c
M openmp/libomptarget/test/unified_shared_memory/close_modifier.c
M openmp/libomptarget/test/unified_shared_memory/shared_update.c
Log Message:
-----------
[OpenMP] Fix or disable NVPTX tests failing currently (#77844)
Summary:
This patch is an attempt to get a clean run of `check-openmp` running on
an NVPTX machine. I simply took the lists of tests that failed on my
`sm_89` machine and disabled them or fixed them. A lot of these tests
are disabled on AMDGPU already, so it makes sense that NVPTX fails. The
others are simply problems with NVPTX optimized debugging which will
need to be fixed. I opened an issue on one of them.
Commit: 17c062c0c5624b19cd99237bb5fffe37de8aa623
https://github.com/llvm/llvm-project/commit/17c062c0c5624b19cd99237bb5fffe37de8aa623
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
Log Message:
-----------
[CodeGen] Make CodeGenPassBuilder Pipeline test x86-64 only (#77860)
Should fix arm build bots
Commit: 791637e78236541a871f9474e0c8918354ca310f
https://github.com/llvm/llvm-project/commit/791637e78236541a871f9474e0c8918354ca310f
Author: Emilia Kond <emilia at rymiel.space>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Don't allow casts in front of ampamp (#77704)
clang-format performs a heuristic to see if a right parenthesis is the
parenthesis of a cast expression. This check never looked ahead to see
if the next token is an ampamp && token. This resulted in the paren
being set as an CastRParen, and the following ampamp got annotated as an
UnaryOperator!
Since && can never be a unary operator is standard C++, this patch
forbids the right paren from ever becoming a cast.
Fixes https://github.com/llvm/llvm-project/issues/77680
Commit: 9095eec0524d39d447d6f94cd3f9896cc5fc656f
https://github.com/llvm/llvm-project/commit/9095eec0524d39d447d6f94cd3f9896cc5fc656f
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/compress-evex.mir
M llvm/test/CodeGen/X86/apx/dec.ll
M llvm/test/CodeGen/X86/apx/inc.ll
M llvm/test/CodeGen/X86/apx/or.ll
M llvm/test/CodeGen/X86/apx/sbb.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/apx/xor.ll
Log Message:
-----------
[X86][CodeGen] Support EVEX compression: NDD to nonNDD (#77731)
Commit: 6a0c440159aa2b2e895fe6e04af39c91e54733ce
https://github.com/llvm/llvm-project/commit/6a0c440159aa2b2e895fe6e04af39c91e54733ce
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
Log Message:
-----------
[Driver,sanitizer] Remove RequiresPIE and msan's NeedPIE setting (#77689)
The two variables cause clang to default to -fPIE when no PIC/PIC option
is
specified.
msan used to require PIE because many `kMemoryLayout` made the low
address (used by ET_EXEC executables) invalid. Current msan.h no longer
does so, rendering this PIE requirement unneeded. The same argument
applies to -fsanitize=dataflow.
On Linux, most builds set CLANG_DEFAULT_PIE_ON_LINUX to 1, making
`RequiresPIE/NeedPIE` redundant on Linux.
(`NeedPIE` is not removed for now due to the -fsanitize-cfi-cross-dso
comment. If it's indeed incompatible with explicit -fno-pic, a warning
is probably better.)
Commit: 3f032312c17e26be0a356630a062b760b62d3379
https://github.com/llvm/llvm-project/commit/3f032312c17e26be0a356630a062b760b62d3379
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
Log Message:
-----------
[CodeGen] Fix ponential memory leak in CodeGenPassBuilderTest (#77864)
Found by https://lab.llvm.org/buildbot/#/builders/5/builds/40038.
Commit: c185a66d8330c07d5878f95d007ba10d107dd59e
https://github.com/llvm/llvm-project/commit/c185a66d8330c07d5878f95d007ba10d107dd59e
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
[SelectionDAG,TableGen] Use stable_sort after #73310
to ensure determinism with
https://libcxx.llvm.org/DesignDocs/UnspecifiedBehaviorRandomization.html#unspecified-behavior-randomization
Commit: 5e5e98e36e570f017e46ad05245d8561edb734e1
https://github.com/llvm/llvm-project/commit/5e5e98e36e570f017e46ad05245d8561edb734e1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Cleanup MAIFrag predicate code (#77734)
Move the complex predicates into separate variables.
Commit: c230138011cbf07ad7caf9d256ae9d0c5032a974
https://github.com/llvm/llvm-project/commit/c230138011cbf07ad7caf9d256ae9d0c5032a974
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
[SelectionDAG,TableGen] Use MapVector after #73310
Otherwise `ComplexPatternList` order can be non-deterministic.
Commit: d1d1e7d6d0f6c0fd745760ed1d10efc812b4c2ac
https://github.com/llvm/llvm-project/commit/d1d1e7d6d0f6c0fd745760ed1d10efc812b4c2ac
Author: Dรกvid Ferenc Szabรณ <30732159+dfszabo at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir
Log Message:
-----------
[NFC] Updating the tests for combine-ext.mir (#77756)
Commit: 9e40ba0c2d2cd03f0b99da191b1e6bef8f3d8953
https://github.com/llvm/llvm-project/commit/9e40ba0c2d2cd03f0b99da191b1e6bef8f3d8953
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/MC/RISCV/rvv/zvbb.s
Log Message:
-----------
[RISCV] Remove period from Zvbb extension description.
No other instruction extension has a period.
There are also periods in 'ssaia' and 'smaia', but those descriptions
need a different update.
Commit: a2af3742847899070322f15d6cefb7e9c738f40d
https://github.com/llvm/llvm-project/commit/a2af3742847899070322f15d6cefb7e9c738f40d
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/TableGen/address-space-patfrags.td
M llvm/test/TableGen/predicate-patfags.td
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
[SelectionDAG] Add space-optimized forms of OPC_CheckPredicate (#77763)
We record the usage of each `Predicate` and sort them by usage.
For the top 8 `Predicate`s, we will emit a `PC_CheckPredicateN` to
save one byte.
Overall this reduces the llc binary size with all in-tree targets by
about 61K.
This is a recommit of 1a57927, which was reverted in bc98c31.
The CI failures occurred when doing expensive checks (with option
`LLVM_ENABLE_EXPENSIVE_CHECKS` being ON).
The key point here is that we need stable sorting result in the
test, but doing expensive checks uncovered the non-determinism of
`llvm::sort`. So `llvm::sort` is changed to `llvm::stable_sort`
in this revised patch.
And we use `llvm::MapVector` to keep insertion order.
Commit: 54c19546ba6ffd24a3bcb0c0d145309ed6f8ce46
https://github.com/llvm/llvm-project/commit/54c19546ba6ffd24a3bcb0c0d145309ed6f8ce46
Author: darkbuck <michael.hliao at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/Target/ARM/ARMCallLowering.cpp
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
Log Message:
-----------
[GlobalISel] Revise 'assignCustomValue' interface (#77824)
- Previously, 'assignCustomValue' requests the number of assigned VAs
minus 1 is returned and treats 0 as the assignment failure. However,
under that arrangment, we cannot tell a successful *single* VA custom
assignment from the failure case.
- This change requests that 'assignCustomValue' just return the number
of all VAs assigned, including the first WA so that it won't be ambigous
to tell the failure case from the single VA custom assignment.
Commit: 3baedb411121c188c4bb07f47efb755bf4d4cf87
https://github.com/llvm/llvm-project/commit/3baedb411121c188c4bb07f47efb755bf4d4cf87
Author: Emil J <emil.tywoniak at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-prop-extends-phi.mir
Log Message:
-----------
[GISel] Fix #77762: extend correct source registers in combiner helper rule extend_through_phis (#77765)
Since we already know which register we want to extend, we don't have to
ask its defining MI about it
---------
Co-authored-by: Emil Tywoniak <Emil.Tywoniak at hightec-rt.com>
Commit: cc0065a7d082f0bd322a538cf62cfaef1c8f89f8
https://github.com/llvm/llvm-project/commit/cc0065a7d082f0bd322a538cf62cfaef1c8f89f8
Author: Sean Perry <39927768+perry-ca at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M compiler-rt/lib/builtins/divtc3.c
M compiler-rt/lib/builtins/fp_lib.h
M compiler-rt/lib/builtins/int_types.h
M compiler-rt/lib/builtins/multc3.c
Log Message:
-----------
[builtins] Generate __multc3 for z/OS (#77554)
https://github.com/llvm/llvm-project/pull/68132 ended up removing
__multc3 & __divtc3 from compiler-rt library builds that have
QUAD_PRECISION but not TF_MODE due to missing int128 support. I added support for QUAD_PRECISION to
use the native hex float long double representation.
---------
Co-authored-by: Alexander Richardson <mail at alexrichardson.me>
Commit: 6752f1517dcfa7e54271c98459a3d52c823c0d60
https://github.com/llvm/llvm-project/commit/6752f1517dcfa7e54271c98459a3d52c823c0d60
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
A llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
Log Message:
-----------
[TwoAddressInstruction] Recompute live intervals for partial defs (#74431)
Force live interval recomputation for a register if its definition is
narrowed to become partial. The live interval repair process cannot
otherwise detect these changes.
Commit: 4f71068b727231589d415dbad2edc90e08f7ced4
https://github.com/llvm/llvm-project/commit/4f71068b727231589d415dbad2edc90e08f7ced4
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/apx/compress-evex.mir
Log Message:
-----------
[X86] Correct the asm comment for compression NF_ND -> NF
Commit: c39926e6792bfaca9ecf890473dd0d778bb4867d
https://github.com/llvm/llvm-project/commit/c39926e6792bfaca9ecf890473dd0d778bb4867d
Author: Bharathi Ramana Joshi <joshibharathiramana at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Analysis/Presburger/PresburgerSpace.cpp
Log Message:
-----------
[MLIR][Presburger] Fix style violations in ff80414 (NFC) (#76720)
Use preincrement not postincrement; use `Identifier::getIds` not
`getVarKindOffset`
Commit: 369981181ffa75a8500416982417662f1fa04704
https://github.com/llvm/llvm-project/commit/369981181ffa75a8500416982417662f1fa04704
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
Log Message:
-----------
[AMDGPU] Handle bf16 operands the same way as f16. NFC. (#77826)
This is infrastructure change which shall allow use of bf16 operands
with instruction definitions.
Commit: aa2a96a24ae3a8cc04635ab6ede474c5f2665053
https://github.com/llvm/llvm-project/commit/aa2a96a24ae3a8cc04635ab6ede474c5f2665053
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/Interfaces/TilingInterface/lower-to-loops-using-interface.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-using-interface.mlir
M mlir/test/Interfaces/TilingInterface/tile-fuse-and-yield-using-interface.mlir
M mlir/test/Interfaces/TilingInterface/tile-pad-using-interface.mlir
M mlir/test/Interfaces/TilingInterface/tile-using-interface.mlir
M mlir/test/Interfaces/TilingInterface/tile-using-scfforall.mlir
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
R mlir/test/lib/Interfaces/TilingInterface/TestTilingInterface.cpp
A mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
A mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
A mlir/test/lib/Interfaces/TilingInterface/lit.local.cfg
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][TilingInterface] Move TilingInterface tests to use transform dialect ops. (#77204)
In the process a couple of test transform dialect ops are added just
for testing. These operations are not intended to use as full flushed
out of transformation ops, but are rather operations added for testing.
A separate operation is added to `LinalgTransformOps.td` to convert a
`TilingInterface` operation to loops using the
`generateScalarImplementation` method implemented by the
operation. Eventually this and other operations related to tiling
using the `TilingInterface` need to move to a better place (i.e. out
of `Linalg` dialect)
Commit: dc4e85bd79ff17014cbbe4a9db1d9b91929e91ce
https://github.com/llvm/llvm-project/commit/dc4e85bd79ff17014cbbe4a9db1d9b91929e91ce
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/CodeGenCXX/module-initializer-guard-elision.cpp
M clang/test/CodeGenCXX/module-intializer.cpp
M clang/test/CodeGenCXX/partitions.cpp
M clang/test/Modules/cxx20-10-1-ex1.cpp
M clang/test/Modules/cxx20-importing-function-bodies.cppm
M clang/test/Modules/cxx20-module-file-info.cpp
M clang/test/Modules/cxx20-partition-redeclarations.cpp
M clang/test/Modules/eagerly-load-cxx-named-modules.cppm
M clang/test/Modules/implicit-module-with-missing-path.cpp
M clang/test/Modules/module-init-duplicated-import.cppm
M clang/test/Modules/no-duplicate-codegen-in-GMF.cppm
M clang/test/Modules/no-implicit-std-cxx-module.cppm
M clang/test/Modules/no-import-func-body.cppm
M clang/test/Modules/pr61067.cppm
M clang/test/Modules/pr62705.cppm
M clang/test/Modules/pr67893.cppm
Log Message:
-----------
[C++20] [Modules] Remove hardcoded path to imported module in BMIs
Close https://github.com/llvm/llvm-project/issues/62707
As we discussed before, we'll forbid the use of implicit generated path
for C++20 modules. And as I mentioned in
https://github.com/llvm/llvm-project/issues/62707, we've emitted a
warning for clang17 and we'll make it a hard error in clang18. And the
patch addresses the decision.
Commit: 1833e3fafa229c0a784005fe2925290406154117
https://github.com/llvm/llvm-project/commit/1833e3fafa229c0a784005fe2925290406154117
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-prop-extends-phi.mir
Log Message:
-----------
Fix test failure introduced in 3baedb411121c188c4bb07f47efb755bf4d4cf87
Commit: 4b99af34199208e82f6a8806bfae1d3dea007936
https://github.com/llvm/llvm-project/commit/4b99af34199208e82f6a8806bfae1d3dea007936
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/docs/StandardCPlusPlusModules.rst
Log Message:
-----------
[docs] Update doc for C++20 Modules after dc4e85b
After
https://github.com/llvm/llvm-project/commit/dc4e85bd79ff17014cbbe4a9db1d9b91929e91ce,
we need to update the examples in the documents.
This patch also fix some other places where is no longer relevant.
Commit: a946934a122abae22ef4610acc26daf5891b4b72
https://github.com/llvm/llvm-project/commit/a946934a122abae22ef4610acc26daf5891b4b72
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
Log Message:
-----------
[GlobalISel][NFC] Use GPhi wrapper in more places instead of iterating over operands.
Commit: bfb026e17ce288cd446d19f5d6329d08b4f46e04
https://github.com/llvm/llvm-project/commit/bfb026e17ce288cd446d19f5d6329d08b4f46e04
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
Log Message:
-----------
[StaticAnalyzer] Use StringRef::contains_insensitive (NFC)
Commit: 5e9da33b8743d13e29be1350e357f2d527a417dd
https://github.com/llvm/llvm-project/commit/5e9da33b8743d13e29be1350e357f2d527a417dd
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/DebugInfo/Symbolize/MarkupFilter.cpp
M llvm/lib/Support/StringRef.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
Log Message:
-----------
[llvm] Use StringRef::consume_front_insensitive (NFC)
Commit: 7b9bc4729b2601a075ca3531c3ad30baab174f87
https://github.com/llvm/llvm-project/commit/7b9bc4729b2601a075ca3531c3ad30baab174f87
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
Log Message:
-----------
[IPO] Use a range-based for loop (NFC)
Commit: d7ab65f8f59efc612aa851c6f9ee1612a5201073
https://github.com/llvm/llvm-project/commit/d7ab65f8f59efc612aa851c6f9ee1612a5201073
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M compiler-rt/lib/builtins/divtc3.c
M compiler-rt/lib/builtins/fp_lib.h
M compiler-rt/lib/builtins/int_types.h
M compiler-rt/lib/builtins/multc3.c
Log Message:
-----------
Revert "[builtins] Generate __multc3 for z/OS" (#77881)
Reverts llvm/llvm-project#77554 because of #77880
Commit: 528cd28de83c0a4bef74cec69038005c4a24d724
https://github.com/llvm/llvm-project/commit/528cd28de83c0a4bef74cec69038005c4a24d724
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[mlir][Bazel] Adjust BUILD file for aa2a96a24ae3a8cc04635ab6ede474c5f2665053
Commit: 2b83ceee3d2736cff89ece661683e3507aafcc6c
https://github.com/llvm/llvm-project/commit/2b83ceee3d2736cff89ece661683e3507aafcc6c
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-simplify-image-buffer-stores.ll
Log Message:
-----------
[AMDGPU][GFX12] Default component broadcast store (#76212)
For image and buffer stores the default behaviour on GFX12 is to set all
unset components to the value of the first component. So if we pass only
X component, it will be the same as XXXX, or XY same as XYXX.
This patch simplifies the passed vector of components in InstCombine by
removing components from the end that are equal to the first component.
For image stores it also trims DMask if necessary.
---------
Co-authored-by: Mateja Marjanovic <mmarjano at amd.com>
Commit: a5dc3f68a86d1fb533cdba880514507f1348bc3d
https://github.com/llvm/llvm-project/commit/a5dc3f68a86d1fb533cdba880514507f1348bc3d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/WindowsDriver/MSVCPaths.cpp
Log Message:
-----------
[llvm] Use SmallString::operator std::string() (NFC)
Commit: 7e604485e18d40be6ce6310e4a3e583ca0b7df47
https://github.com/llvm/llvm-project/commit/7e604485e18d40be6ce6310e4a3e583ca0b7df47
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
A clang/test/CodeGen/X86/inline-asm-constraints.c
R clang/test/CodeGen/X86/x86-inline-asm-v-constraint.c
R llvm/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
A llvm/test/CodeGen/X86/asm-modifier-32.ll
M llvm/test/CodeGen/X86/asm-modifier-error.ll
A llvm/test/CodeGen/X86/asm-modifier-macho.ll
M llvm/test/CodeGen/X86/asm-modifier.ll
R llvm/test/CodeGen/X86/inline-asm-bad-modifier.ll
R llvm/test/CodeGen/X86/inline-asm-modifier-V.ll
R llvm/test/CodeGen/X86/inline-asm-modifier-c.ll
R llvm/test/CodeGen/X86/inline-asm-modifier-n.ll
R llvm/test/CodeGen/X86/inline-asm-modifier-q.ll
Log Message:
-----------
[test] Improve x86 inline asm tests
Reorganize *asm-modifier* and make other cleanups.
Commit: 2e78c220fc18bc79cf396b96c65de6d4446318c6
https://github.com/llvm/llvm-project/commit/2e78c220fc18bc79cf396b96c65de6d4446318c6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Simplify the description for ssaia and smaia. (#77870)
It feels more important to expand out Advanced Interrupt Architecture
for users than to have a description that explains how one extension is
different from the other.
Commit: 249186701d5c74a36d5a1c8ccb5de2deac42944a
https://github.com/llvm/llvm-project/commit/249186701d5c74a36d5a1c8ccb5de2deac42944a
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/test/Dialect/NVGPU/invalid.mlir
Log Message:
-----------
[mlir][nvgpu] Improve verifier of `ldmatrix` (#77807)
PR improves the verifier of `nvgpu.ldmatrix` Op, so `nvgpu-to-nvvm`
lowering does not crash.
Commit: c297597e1cc0e731540ec72334a305490db21fe6
https://github.com/llvm/llvm-project/commit/c297597e1cc0e731540ec72334a305490db21fe6
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/test/lib/Interfaces/TilingInterface/CMakeLists.txt
Log Message:
-----------
[mlir] Fix linking failure of libMLIRTilingInterfaceTestPasses.dylib (NFC)
Commit: f489fb3d75aaedf6f056113370a8b3b8659b9f17
https://github.com/llvm/llvm-project/commit/f489fb3d75aaedf6f056113370a8b3b8659b9f17
Author: Kon <kinsei0916 at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/CompileCommands.cpp
M clang-tools-extra/clangd/unittests/CompileCommandsTests.cpp
Log Message:
-----------
[clangd] Fix sysroot flag handling in CommandMangler to prevent duplicates (#75694)
CommandMangler should guess the sysroot path of the host system and add
that through `-isysroot` flag only when there is no `--sysroot` or
`-isysroot` flag in the original compile command to avoid duplicate
sysroot.
Previously, CommandMangler appropriately avoided adding a guessed
sysroot flag if the original command had an argument in the form of
`--sysroot=<sysroot>`, `--sysroot <sysroot>`, or `-isysroot <sysroot>`.
However, when presented as `-isysroot<sysroot>` (without spaces after
`-isysroot`), CommandMangler mistakenly appended the guessed sysroot
flag, resulting in duplicated sysroot in the final command.
This commit fixes it, ensuring the final command has no duplicate
sysroot flags. Also adds unit tests for this fix.
Commit: dabc9018ee856dee672fb1035fd3eb1bb39bd7a6
https://github.com/llvm/llvm-project/commit/dabc9018ee856dee672fb1035fd3eb1bb39bd7a6
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/CompileCommands.cpp
Log Message:
-----------
[clangd] Use starts_with instead of startswith in CompileCommands.cpp (NFC)
llvm-project/clang-tools-extra/clangd/CompileCommands.cpp:324:52:
error: 'startswith' is deprecated: Use starts_with instead [-Werror,-Wdeprecated-declarations]
324 | Cmd, [&](llvm::StringRef Arg) { return Arg.startswith(Flag); });
| ^~~~~~~~~~
| starts_with
Commit: 537bbb4688b021c7eb7045ffd0d5f63087af83c3
https://github.com/llvm/llvm-project/commit/537bbb4688b021c7eb7045ffd0d5f63087af83c3
Author: martinboehme <mboehme at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
M clang/unittests/Analysis/FlowSensitive/LoggerTest.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Process terminator condition within `transferCFGBlock()`. (#77750)
In particular, it's important that we create the "fallback" atomic at
this point
(which we produce if the transfer function didn't produce a value for
the
expression) so that it is placed in the correct environment.
Previously, we processed the terminator condition in the
`TerminatorVisitor`,
which put the fallback atomic in a copy of the environment that is
produced as
input for the _successor_ block, rather than the environment for the
block
containing the expression for which we produce the fallback atomic.
As a result, we produce different fallback atomics every time we process
the
successor block, and hence we don't have a consistent representation of
the
terminator condition in the flow condition.
This patch includes a test (authored by ymand@) that fails without the
fix.
Commit: ef156f91262e960eea5ca93f95dd6111cfa3c5cc
https://github.com/llvm/llvm-project/commit/ef156f91262e960eea5ca93f95dd6111cfa3c5cc
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
Log Message:
-----------
[clang][dataflow] Remove unused private field 'StmtToEnv' (NFC)
llvm-project/clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp:148:23:
error: private field 'StmtToEnv' is not used [-Werror,-Wunused-private-field]
148 | const StmtToEnvMap &StmtToEnv;
| ^
1 error generated.
Commit: c65b939fb795ce4688d33531341d460a47d16664
https://github.com/llvm/llvm-project/commit/c65b939fb795ce4688d33531341d460a47d16664
Author: MyDeveloperDay <mydeveloperday at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTestJava.cpp
Log Message:
-----------
[clang-format] SpacesInSquareBrackets not working for Java (#77833)
spaces in [] needs to be handled the same in Java the same as C#.
Co-authored-by: paul_hoad <paul_hoad at amat.com>
Commit: 011ba725070360341f5473e88ebb4c956574805f
https://github.com/llvm/llvm-project/commit/011ba725070360341f5473e88ebb4c956574805f
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
A flang/test/Fir/struct-passing-x86-64-several-fields-inreg.fir
Log Message:
-----------
[flang] finish BIND(C) VALUE derived type passing ABI on X86-64 (#77742)
Derived type passed with VALUE in BIND(C) context must be passed like C
struct and LLVM is not implementing the ABI for this (it is up to the
frontends like clang).
Previous patch #75802 implemented the simple cases where the derived
type have one field, this patch implements the general case. Note that
the generated LLVM IR is compliant from a X86-64 C ABI point of view and
compatible with clang generated assembly, but that it is not guaranteed
to match the LLVM IR signatures generated by clang for the C equivalent
functions because several LLVM IR signatures may lead to the same X86-64
signature.
Commit: 1aacdfe473276ad631db773310fe167ec93fb764
https://github.com/llvm/llvm-project/commit/1aacdfe473276ad631db773310fe167ec93fb764
Author: martinboehme <mboehme at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
M clang/unittests/Analysis/FlowSensitive/LoggerTest.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
Revert "[clang][dataflow] Process terminator condition within `transferCFGBlock()`." (#77895)
Reverts llvm/llvm-project#77750
Commit: 0a8e3dd432ff15ce871e4b9df0645e8a7e011fb3
https://github.com/llvm/llvm-project/commit/0a8e3dd432ff15ce871e4b9df0645e8a7e011fb3
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/include/mlir/Interfaces/DestinationStyleOpInterface.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/BubbleUpExtractSlice.cpp
M mlir/lib/Dialect/Linalg/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/ConstantFold.cpp
M mlir/lib/Dialect/Linalg/Transforms/DecomposeLinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Linalg/Transforms/EraseUnusedOperandsAndResults.cpp
M mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
M mlir/lib/Dialect/Linalg/Transforms/InlineScalarOperands.cpp
M mlir/lib/Dialect/Linalg/Transforms/Loops.cpp
M mlir/lib/Dialect/Linalg/Transforms/NamedOpConversions.cpp
M mlir/lib/Dialect/Linalg/Transforms/Padding.cpp
M mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/NVGPU/Transforms/CreateAsyncGroups.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Interfaces/DestinationStyleOpInterface.cpp
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
Log Message:
-----------
[mlir][Interfaces] `DestinationStyleOpInterface`: Rename `hasTensor/BufferSemantics` (#77574)
Rename interface functions as follows:
* `hasTensorSemantics` -> `hasPureTensorSemantics`
* `hasBufferSemantics` -> `hasPureBufferSemantics`
These two functions return "true" if the op has tensor/buffer operands
but not buffer/tensor operands.
Also drop the "ranked" part from the interface, i.e., do not distinguish
between ranked/unranked types.
The new function names describe the functions more accurately. They also
align their semantics with the notion of "tensor semantics" with the
bufferization framework. (An op is supposed to be bufferized if it has
tensor operands, and we don't care if it also has memref operands.)
This change is in preparation of #75273, which adds
`BufferizableOpInterface::hasTensorSemantics`. By renaming the functions
in the `DestinationStyleOpInterface`, we can avoid name clashes between
the two interfaces.
Commit: 3168192de567815c511e384707a3a5063b81189b
https://github.com/llvm/llvm-project/commit/3168192de567815c511e384707a3a5063b81189b
Author: Frederik Carlier <frederik.carlier at keysight.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/test/CodeGenObjC/dllstorage.m
M clang/test/CodeGenObjC/encode-test-6.m
Log Message:
-----------
[ObjC]: Make type encoding safe in symbol names (#77797)
Type encodings are part of symbol names in the Objective C ABI. Replace
characters which are reseved in symbol names:
- ELF: avoid including '@' characters in type encodings
- Windows: avoid including '=' characters in type encodings
Commit: 9c9bffe213415eabee1f7751e8e7150d94b36308
https://github.com/llvm/llvm-project/commit/9c9bffe213415eabee1f7751e8e7150d94b36308
Author: ostannard <oliver.stannard at arm.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
A llvm/test/MC/AArch64/no-fp-errors.s
Log Message:
-----------
[AArch64] Disable FP loads/stores when fp-armv8 not enabled (#77817)
Most of the floating-point instructions are already gated on the
fp-armv8 subtarget feature (or some other feature), but most of the load
and store instructions, and one move instruction, were not.
I found this list of instructions with a script which consumes the
output of llvm-tblgen --dump-json, looking for instructions which have
an FPR operand but no predicate. That script now finds zero
instructions.
This only affects assembly, not codegen, because the floating-point
types and registers are already not marked as legal when the FPU is
disabled, so it is impossible for any of these to be selected.
Commit: fbac3b0db5ff1d409f90219aeb6460ec5d14f19a
https://github.com/llvm/llvm-project/commit/fbac3b0db5ff1d409f90219aeb6460ec5d14f19a
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
Log Message:
-----------
Revert "[clang][dataflow] Remove unused private field 'StmtToEnv' (NFC)"
Revert it after 1aacdfe473276ad631db773310fe167ec93fb764
Commit: a8f83cc1597216821b41c69dcfc8251f73b08848
https://github.com/llvm/llvm-project/commit/a8f83cc1597216821b41c69dcfc8251f73b08848
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/test/CodeGen/AArch64/sme2-intrinsics-cvt.ll
Log Message:
-----------
[AArch64][SME] Fix multi vector cvt builtins (#77656)
This fixes cvt multi vector builtins that erroneously had inverted
return vectors and vector parameters. This caused the incorrect
instructions to be emitted.
Commit: 42fe3bc186b938197b3dfe3bd0445674c33fc5eb
https://github.com/llvm/llvm-project/commit/42fe3bc186b938197b3dfe3bd0445674c33fc5eb
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
Log Message:
-----------
[AArch64][SME2] Fix SME2 mla/mls tests (#76711)
The ACLE defines these builtins as svmla[_single]_za32[_f32]_vg1x2,
which means the SVE_ACLE_FUNC macro should test the overloaded forms as
SVE_ACLE_FUNC(svmla,_single,_za32,_f32,_vg1x2)
https://github.com/ARM-software/acle/blob/b88cbf7e9c104100bb5016c848763171494dee44/main/acle.md?plain=1#L10170-L10205
Commit: 2adbf254a12beca76ed25a1c575f11d5e72a0018
https://github.com/llvm/llvm-project/commit/2adbf254a12beca76ed25a1c575f11d5e72a0018
Author: Mirko Brkuลกanin <Mirko.Brkusanin at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[AMDGPU][NFC] Rename DotIUVOP3PMods to VOP3PModsNeg (#77785)
This is used to select the source modifier (neg) from the immediate
operand. After a follow up commit this will no longer be DOTIU specific.
Co-authored-by: Changpeng Fang <changpeng.fang at amd.com>
Commit: 4d467215f162b487381e17b8cb59283af75ca50e
https://github.com/llvm/llvm-project/commit/4d467215f162b487381e17b8cb59283af75ca50e
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/.clang-tidy
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[Clang] Revert inintentional changes to cmake committed in 33e5db6e0
Commit: 35c19fdde2583e74d940f6cd47b97a5c28bfe368
https://github.com/llvm/llvm-project/commit/35c19fdde2583e74d940f6cd47b97a5c28bfe368
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
Log Message:
-----------
[mlir][vector] Support warp distribution of `transfer_read` with dependencies (#77779)
Support distribution of `vector.transfer_read` ops when operands are
defined inside of the region of `warp_execute_on_lane_0` (except for the
buffer from which the op is reading).
Such IR was previously not supported. This commit changes the
implementation such that indices and the padding value are also
distributed.
This commit simplifies the implementation considerably: the original
implementation created a new `transfer_read` op and then checked if this
new op is valid. If not, the rewrite pattern failed. This was a bit
hacky. It was also a violation of the rewrite pattern API (detected by
`MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`) because the IR was modified,
but the pattern returned "failure".
Commit: a762cc21556bbd90ae7d9ee13c33213501195f64
https://github.com/llvm/llvm-project/commit/a762cc21556bbd90ae7d9ee13c33213501195f64
Author: Dan McGregor <dan.mcgregor at usask.ca>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M flang/runtime/execute.cpp
Log Message:
-----------
[flang] include sys/wait.h for EXECUTE_COMMAND_LINE (#77675)
Linux defines WEXITSTATUS in stdlib.h, but at least FreeBSD and NetBSD
only define it in sys/wait.h. Include this header unconditionally, since
it is required on the BSDs and should be harmless on other platforms.
Fixes FreeBSD build after #74077.
Commit: c87e94b0303cef11d24c5a3cf14bec570d850362
https://github.com/llvm/llvm-project/commit/c87e94b0303cef11d24c5a3cf14bec570d850362
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M flang/include/flang/Parser/provenance.h
M flang/lib/Parser/provenance.cpp
M flang/test/Lower/macro-debug-file-loc.f90
A flang/test/Semantics/assign15.f90
Log Message:
-----------
[flang] Get ProvenanceRange from CharBlock starting with expanded macro (#77791)
When a CharBlock starts with an expanded macro but does not end in this
macro expansion, GetProvenanceRange fails to return a ProvenanceRange
which may cause error message to be emitted without location or lowering
to emit code without source location (which is problematic if this code
contains calls to procedures defined in the same file since LLVM will
later crash with the error:
"inlinable function call in a function with a DISubprogram location must
have a debug location"
Fix this situation by returning the ProvenanceRange starting at the
replaced macro reference.
Commit: 2798b72ae7e5caad793169b77cbac47fe2362d0f
https://github.com/llvm/llvm-project/commit/2798b72ae7e5caad793169b77cbac47fe2362d0f
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/docs/Dialects/Transform.md
M mlir/docs/Tutorials/transform/Ch1.md
M mlir/docs/Tutorials/transform/Ch4.md
M mlir/include/mlir/Dialect/Transform/CMakeLists.txt
A mlir/include/mlir/Dialect/Transform/DebugExtension/CMakeLists.txt
A mlir/include/mlir/Dialect/Transform/DebugExtension/DebugExtension.h
A mlir/include/mlir/Dialect/Transform/DebugExtension/DebugExtensionOps.h
A mlir/include/mlir/Dialect/Transform/DebugExtension/DebugExtensionOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h
M mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.td
M mlir/include/mlir/Dialect/Transform/LoopExtension/LoopExtension.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Dialect/Transform/CMakeLists.txt
A mlir/lib/Dialect/Transform/DebugExtension/CMakeLists.txt
A mlir/lib/Dialect/Transform/DebugExtension/DebugExtension.cpp
A mlir/lib/Dialect/Transform/DebugExtension/DebugExtensionOps.cpp
M mlir/test/Dialect/Linalg/match-ops-interpreter.mlir
M mlir/test/Dialect/Linalg/transform-op-bufferize-to-allocation.mlir
M mlir/test/Dialect/Linalg/transform-op-fuse-into-containing.mlir
M mlir/test/Dialect/Linalg/transform-op-match.mlir
M mlir/test/Dialect/Linalg/transform-op-multitile-sizes.mlir
M mlir/test/Dialect/Linalg/transform-op-pad.mlir
M mlir/test/Dialect/MemRef/extract-address-computations.mlir
M mlir/test/Dialect/MemRef/transform-ops.mlir
M mlir/test/Dialect/SCF/transform-ops.mlir
M mlir/test/Dialect/SparseTensor/transform-ops.mlir
M mlir/test/Dialect/Transform/expensive-checks.mlir
M mlir/test/Dialect/Transform/include/test-interpreter-external-concurrent-source.mlir
M mlir/test/Dialect/Transform/include/test-interpreter-external-source.mlir
M mlir/test/Dialect/Transform/include/test-interpreter-external-symbol-def-invalid.mlir
M mlir/test/Dialect/Transform/include/test-interpreter-library-invalid/definitions-invalid.mlir
M mlir/test/Dialect/Transform/include/test-interpreter-library/definitions-self-contained.mlir
M mlir/test/Dialect/Transform/infer-effects.mlir
M mlir/test/Dialect/Transform/multi-arg-top-level-ops.mlir
M mlir/test/Dialect/Transform/multi-arg-top-level-params.mlir
M mlir/test/Dialect/Transform/multi-arg-top-level-values.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/Dialect/Transform/test-interpreter-debug.mlir
M mlir/test/Dialect/Transform/test-interpreter-external-symbol-decl-invalid.mlir
M mlir/test/Dialect/Transform/test-interpreter-external-symbol-decl.mlir
M mlir/test/Dialect/Transform/test-interpreter-multiple-top-level-ops.mlir
M mlir/test/Dialect/Transform/test-interpreter.mlir
M mlir/test/Dialect/Transform/test-loop-transforms.mlir
M mlir/test/Dialect/Transform/test-pattern-application.mlir
M mlir/test/Dialect/Transform/test-pdl-extension.mlir
M mlir/test/Dialect/Transform/test-repro-dump.mlir
M mlir/test/Examples/transform/Ch1/invalidation-1.mlir
M mlir/test/Examples/transform/Ch1/invalidation-2.mlir
M mlir/test/Examples/transform/Ch4/features.mlir
M mlir/test/Examples/transform/Ch4/multiple.mlir
M mlir/test/Examples/transform/Ch4/sequence.mlir
M mlir/test/Integration/Dialect/Transform/match_batch_matmul.mlir
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
M mlir/test/Integration/Dialect/Transform/match_reduction.mlir
M mlir/test/lib/Dialect/Transform/CMakeLists.txt
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.td
M mlir/test/lib/Dialect/Transform/TestTransformDialectInterpreter.cpp
M mlir/unittests/Dialect/Transform/CMakeLists.txt
M mlir/unittests/Dialect/Transform/Preload.cpp
Log Message:
-----------
[mlir] introduce debug transform dialect extension (#77595)
Introduce a new extension for simple print-debugging of the transform
dialect scripts. The initial version of this extension consists of two
ops that are printing the payload objects associated with transform
dialect values. Similar ops were already available in the test extenion
and several downstream projects, and were extensively used for testing.
Commit: 35708b07547950ec94e5481227da4b47fcc629b7
https://github.com/llvm/llvm-project/commit/35708b07547950ec94e5481227da4b47fcc629b7
Author: Alexey Lapshin <55248412+avl-llvm at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M bolt/lib/Rewrite/CMakeLists.txt
M llvm/lib/DWARFLinker/CMakeLists.txt
M llvm/lib/DWARFLinker/Classic/CMakeLists.txt
M llvm/lib/DWARFLinker/Parallel/CMakeLists.txt
M llvm/tools/dsymutil/CMakeLists.txt
M llvm/tools/llvm-dwarfutil/CMakeLists.txt
M llvm/unittests/DWARFLinkerParallel/CMakeLists.txt
Log Message:
-----------
[DWARFLinker][NFC] Rename libraries to match with directories name. (#77592)
It was noted that new DWARFLinker libraries do not follow naming
agreement -
https://github.com/llvm/llvm-project/pull/75925#issuecomment-1883301659
This patch rename libraries to match with the agreement.
Rename LLVMDWARFLinkerBase library into the LLVMDWARFLinker. Rename
LLVMDWARFLinker library into the LLVMDWARFLinkerClassic. Correct include
path according to the new directory structure.
Commit: aa2dc792abd5f6b061e277607722b9b773ce2178
https://github.com/llvm/llvm-project/commit/aa2dc792abd5f6b061e277607722b9b773ce2178
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
Log Message:
-----------
[mlir][vector] Fix rewrite pattern API violation in `VectorToSCF` (#77909)
A rewrite pattern is not allowed to change the IR if it returns
"failure". This commit fixes
`test/Conversion/VectorToSCF/vector-to-scf.mlir` when running with
`MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`.
```
Processing operation : 'vector.transfer_read'(0x55823a409a60) {
%5 = "vector.transfer_read"(%arg0, %0, %0, %2, %4) <{in_bounds = [true, true], operandSegmentSizes = array<i32: 1, 2, 1, 1>, permutation_map = affine_map<(d0, d1) -> (d0, d1)>}> : (memref<?x4xf32>, index, index, f32, vector<[4]x4xi1>) -> vector<[4]x4xf32>
* Pattern (anonymous namespace)::lowering_n_d_unrolled::UnrollTransferReadConversion : 'vector.transfer_read -> ()' {
Trying to match "(anonymous namespace)::lowering_n_d_unrolled::UnrollTransferReadConversion"
** Insert : 'vector.splat'(0x55823a445640)
"(anonymous namespace)::lowering_n_d_unrolled::UnrollTransferReadConversion" result 0
} -> failure : pattern failed to match
LLVM ERROR: pattern returned failure but IR did change
```
Commit: 39b2104b4a4e0990eddc763eab99b28e8deab953
https://github.com/llvm/llvm-project/commit/39b2104b4a4e0990eddc763eab99b28e8deab953
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reused-reductions-with-minbitwidth.ll
Log Message:
-----------
[SLP]Fix a crash for reduced values with minbitwidth, which are reused.
If the reduced values are additionally affected by minbitwidth analysis,
need to cast them to a proper type before doing any math, if they are
reused.
Commit: 59d6f033a25d161e494457e8bb6e30375eb7f40f
https://github.com/llvm/llvm-project/commit/59d6f033a25d161e494457e8bb6e30375eb7f40f
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/trunc-loads-p16.ll
Log Message:
-----------
[VPlan] Support narrowing widened loads in truncateToMinimimalBitwidths.
MinBWs may also contain widened load instructions, handle them by only
narrowing their result.
Fixes https://github.com/llvm/llvm-project/issues/77468
Commit: ae5d63924a6214154194c286a13c6ae74d31c086
https://github.com/llvm/llvm-project/commit/ae5d63924a6214154194c286a13c6ae74d31c086
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
Log Message:
-----------
[mlir][nvvm] Introduce `cp.async.bulk.wait_group` (#77917)
Commit: 6c2fbc3a68ba6d4bd1c8c2c43c98cff5e82f2ba4
https://github.com/llvm/llvm-project/commit/6c2fbc3a68ba6d4bd1c8c2c43c98cff5e82f2ba4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/unittests/Analysis/BasicAliasAnalysisTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
Log Message:
-----------
[IRBuilder] Add CreatePtrAdd() method (NFC) (#77582)
This abstracts over the common pattern of creating a gep with i8 element
type.
Commit: b32001a232831b98fbcfff7b642a7c1dc05127ad
https://github.com/llvm/llvm-project/commit/b32001a232831b98fbcfff7b642a7c1dc05127ad
Author: Alex Zinenko <zinenko at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/unittests/BUILD.bazel
Log Message:
-----------
[mlir] update bazel for transform debug extension
Commit: 39bb790b906f4921a5d9fc09e856abe53ae7a320
https://github.com/llvm/llvm-project/commit/39bb790b906f4921a5d9fc09e856abe53ae7a320
Author: Qiongsi Wu <274595+qiongsiwu at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
Log Message:
-----------
[SimplifyCFG] `switch`: Do Not Transform the Default Case if the Condition is Too Wide (#77831)
https://github.com/llvm/llvm-project/pull/76669 taught SimplifyCFG to
handle switches when `default` has only one case. When the `switch`'s
condition is wider than 64 bit, the current implementation can calculate
the wrong default value. This PR skips cases where the condition is too
wide.
Commit: 45568135cbb31bb3b345a8355134970742248120
https://github.com/llvm/llvm-project/commit/45568135cbb31bb3b345a8355134970742248120
Author: antangelo <contact at antangelo.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
A clang/test/SemaTemplate/GH75426.cpp
Log Message:
-----------
[Sema] Use lexical DC for friend functions when getting constraint instantiation args (#77552)
Fixes a crash where the template argument depth computed in the semantic
context for a friend FunctionDecl with a constrained parameter is
compared against arguments in the lexical context for the purpose of
checking if the constraint depends on enclosing template parameters.
Since getTemplateInstantiationArgs in this case follows the semantic DC
for friend FunctionDecls, the resulting depth is incorrect and trips an
assertion.
Fixes #75426
Commit: 460ff58f62456a1f3ccf61ec9cf9d10781bd41bb
https://github.com/llvm/llvm-project/commit/460ff58f62456a1f3ccf61ec9cf9d10781bd41bb
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CXX/over/over.match/over.match.funcs/over.match.oper/p3-2a.cpp
Log Message:
-----------
[clang] Reapply Handle templated operators with reversed arguments (#72213)
Re-applies https://github.com/llvm/llvm-project/pull/69595 with extra
[diff](https://github.com/llvm/llvm-project/pull/72213/commits/79181efd0d7aef1b8396d44cdf40c0dfa4054984)
### New changes
Further relax ambiguities with a warning for member operators of a
template class (primary templates of such ops do not match). Eg:
```cpp
template <class T>
struct S {
template <typename OtherT>
bool operator==(const OtherT &rhs);
};
struct A : S<int> {};
struct B : S<bool> {};
bool x = A{} == B{}; // accepted with a warning.
```
This is important for making llvm build using previous clang versions in
C++20 mode (eg: this makes the commit
e558be51bab051d1471d92e967f8a2aecc13567a keep working with a warning
instead of an error).
### Description from https://github.com/llvm/llvm-project/pull/69595
https://github.com/llvm/llvm-project/pull/68999 correctly computed
conversion sequence for reversed args to a template operator. This was a
breaking change as code, previously accepted in C++17, starts to break
in C++20.
Example:
```cpp
struct P {};
template<class S> bool operator==(const P&, const S &);
struct A : public P {};
struct B : public P {};
bool check(A a, B b) { return a == b; } // This is now ambiguous in C++20.
```
In order to minimise widespread breakages, as a clang extension, we had
previously accepted such ambiguities with a warning
(`-Wambiguous-reversed-operator`) for non-template operators. Due to the
same reasons, we extend this relaxation for template operators.
Fixes https://github.com/llvm/llvm-project/issues/53954
Commit: ad100b36e728880391df0c3941cdfb1d53517ac7
https://github.com/llvm/llvm-project/commit/ad100b36e728880391df0c3941cdfb1d53517ac7
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
Log Message:
-----------
[mlir][vector] Fix dominance error in warp vector distribution (#77771)
This commit fixes a test in `vector-warp-distribute.mlir` when
`MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS` is enabled.
```
within split at /usr/local/google/home/springerm/mlir_public/llvm-project/mlir/test/Dialect/Vector/vector-warp-distribute.mlir:1 offset :18:10: error: operand #0 does not dominate this use
%1 = vector.extract %0[9] : f32 from vector<64xf32>
^
within split at /usr/local/google/home/springerm/mlir_public/llvm-project/mlir/test/Dialect/Vector/vector-warp-distribute.mlir:1 offset :18:10: note: see current operation: %1 = "affine.apply"(%8) <{map = affine_map<()[s0] -> (s0 ceildiv 2)>}> : (index) -> index
within split at /usr/local/google/home/springerm/mlir_public/llvm-project/mlir/test/Dialect/Vector/vector-warp-distribute.mlir:1 offset :18:10: note: operand defined here (op in a child region)
"func.func"() <{function_type = (index) -> f32, sym_name = "vector_extract_1d"}> ({
^bb0(%arg0: index):
%0:2 = "vector.warp_execute_on_lane_0"(%arg0) <{warp_size = 32 : i64}> ({
%7 = "some_def"() : () -> vector<64xf32>
%8 = "arith.constant"() <{value = 9 : index}> : () -> index
%9 = "vector.extractelement"(%7, %8) : (vector<64xf32>, index) -> f32
"vector.yield"(%9, %7) : (f32, vector<64xf32>) -> ()
}) : (index) -> (f32, vector<2xf32>)
%1 = "affine.apply"(%8) <{map = affine_map<()[s0] -> (s0 ceildiv 2)>}> : (index) -> index
%2 = "affine.apply"(%8) <{map = affine_map<()[s0] -> (s0 mod 2)>}> : (index) -> index
%3 = "vector.extractelement"(%0#1, %2) : (vector<2xf32>, index) -> f32
%4 = "arith.index_cast"(%1) : (index) -> i32
%5 = "arith.constant"() <{value = 32 : i32}> : () -> i32
%6:2 = "gpu.shuffle"(%3, %4, %5) <{mode = #gpu<shuffle_mode idx>}> : (f32, i32, i32) -> (f32, i1)
"func.return"(%6#0) : (f32) -> ()
}) : () -> ()
LLVM ERROR: IR failed to verify after pattern application
```
The position at which `vector.extractelement` extracts must also be
distributed. The fix in `WarpOpExtractElement` is similar to
`WarpOpInsertElement`.
Commit: 7700ea103187ba6e547deb501ca4a1402e8a23fd
https://github.com/llvm/llvm-project/commit/7700ea103187ba6e547deb501ca4a1402e8a23fd
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement the 'rest' of the simple 'var-list' clauses
A large number of clauses are simple, required parens with a var-list.
This patch adds them all, as adding them is quite trivial.
Commit: dec908a285b58787f5b211a600c90b63ca0c5778
https://github.com/llvm/llvm-project/commit/dec908a285b58787f5b211a600c90b63ca0c5778
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
Log Message:
-----------
[mlir][Transforms] `GreedyPatternRewriteDriver`: log successful folding (#77796)
Similar to successful pattern applications, dump the rewritten IR after
each successful folding when running with `-debug`.
Commit: 8751bbe7d3642e2641dad02da7ad9b95a3f77d4f
https://github.com/llvm/llvm-project/commit/8751bbe7d3642e2641dad02da7ad9b95a3f77d4f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/include/__memory/allocator.h
M libcxx/test/libcxx/depr/depr.default.allocator/allocator.members/address.depr_in_cxx17.verify.cpp
M libcxx/test/libcxx/depr/depr.default.allocator/allocator.members/allocate.depr_in_cxx17.verify.cpp
A libcxx/test/libcxx/depr/depr.default.allocator/enable_removed_allocator_members.deprecated.verify.cpp
Log Message:
-----------
[libc++] Deprecate the _LIBCPP_ENABLE_CXX20_REMOVED_ALLOCATOR_MEMBERS macro (#77692)
As described in #69994, using the escape hatch makes us non-conforming
in C++20 due to incorrect constexpr-ness. It also leads to bad
diagnostics as reported by #63900. We discussed the issue in the libc++
monthly meeting and we agreed that we should deprecate the macro in LLVM
18, and then remove it in LLVM 19 since it causes too many problems.
This patch does the first part of this -- it deprecates the macro.
Fixes #69994
Fixes #63900
Partially addresses #75975
Commit: 5417a5fed6e1e026fa040de2e83872fa9fa1a443
https://github.com/llvm/llvm-project/commit/5417a5fed6e1e026fa040de2e83872fa9fa1a443
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.h
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Dialect/ArmSME/IR/Utils.cpp
M mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
A mlir/test/Conversion/ArmSMEToLLVM/tile-spills-and-fills.mlir
M mlir/test/Dialect/ArmSME/tile-allocation.mlir
A mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir
Log Message:
-----------
[mlir][ArmSME] Add rudimentary support for tile spills to the stack (#76086)
This adds very basic (and inelegant) support for something like spilling
and reloading tiles, if you use more SME tiles than physically exist.
This is purely implemented to prevent the compiler from aborting if a
function uses too many tiles (i.e. due to bad unrolling), but is
expected to perform very poorly.
Currently, this works in two stages:
During tile allocation, if we run out of tiles instead of giving up, we
switch to allocating 'in-memory' tile IDs. These are tile IDs that start
at 16 (which is higher than any real tile ID). A warning will also be
emitted for each (root) tile op assigned an in-memory tile ID:
```
warning: failed to allocate SME virtual tile to operation, all tile operations will go through memory, expect degraded performance
```
Everything after this works like normal until `-convert-arm-sme-to-llvm`
Here the in-memory tile op:
```mlir
arm_sme.tile_op { tile_id = <IN MEMORY TILE> }
```
Is lowered to:
```mlir
// At function entry:
%alloca = memref.alloca ... : memref<?x?xty>
// Around the op:
// Swap the contents of %alloca and tile 0.
scf.for %slice_idx {
%current_slice = "arm_sme.intr.read.horiz" ... <{tile_id = 0 : i32}>
"arm_sme.intr.ld1h.horiz"(%alloca, %slice_idx) <{tile_id = 0 : i32}>
vector.store %current_slice, %alloca[%slice_idx, %c0]
}
// Execute op using tile 0.
arm_sme.tile_op { tile_id = 0 }
// Swap the contents of %alloca and tile 0.
// This restores tile 0 to its original state.
scf.for %slice_idx {
%current_slice = "arm_sme.intr.read.horiz" ... <{tile_id = 0 : i32}>
"arm_sme.intr.ld1h.horiz"(%alloca, %slice_idx) <{tile_id = 0 : i32}>
vector.store %current_slice, %alloca[%slice_idx, %c0]
}
```
This is inserted during the lowering to LLVM as spilling/reloading
registers is a very low-level concept, that can't really be modeled
correctly at a high level in MLIR.
Note: This is always doing the worst case full-tile swap. This could be
optimized to only spill/load data the tile op will use, which could be
just a slice. It's also not making any use of liveness, which could
allow reusing tiles. But these is not seen as important as correct code
should only use the available number of tiles.
Commit: d199ab469949b104bc4fbb888251ee184fd53de1
https://github.com/llvm/llvm-project/commit/d199ab469949b104bc4fbb888251ee184fd53de1
Author: Alexander Yermolovich <43973793+ayermolo at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
A clang/test/CodeGen/debug-names-compound-type-units.ll
A clang/test/CodeGen/thinlto-debug-names-tu-reuse.ll
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Log Message:
-----------
[LLVM][DWARF] Fix accelerator table switching between CU and TU (#77511)
Bug 1 is triggered when a TU is already created, and we process the same
DICompositeType at a top level. We would switch to TU accelerator table,
but
would not switch back on early exit. As the result we would add CU
entries to the TU
accelerator table. When we try to write out TUs and normalize entries,
the
offsets for DIEs that are part of a CU would not have been computed, and
it
would assert on getOffset().
Bug 2 is triggered when processing nested TUs. When we exit from
addDwarfTypeUnitType we switched back to CU accelerator table. If we
were processing nested TUs, the rest of the entries from TUs would be
added to CU accelerator table. When we write out TUs, all the DIE
pointers will become invalid. Eventually it will assert during
normalization step after CU is processed.
Commit: 2aae304cbcc0ec4d57e9cd002887f26daa7dfd5d
https://github.com/llvm/llvm-project/commit/2aae304cbcc0ec4d57e9cd002887f26daa7dfd5d
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/cast_ptr.ll
Log Message:
-----------
[InstCombine] Fold `icmp pred (inttoptr X), (inttoptr Y) -> icmp pred X, Y` (#77832)
NOTE: Alive2 proofs are unavailable because `inttoptr` is unsupported.
Commit: 4f47372f8c0733b3846d3a6dbdfffc6b644d9be4
https://github.com/llvm/llvm-project/commit/4f47372f8c0733b3846d3a6dbdfffc6b644d9be4
Author: Natalie Chouinard <sudonatalie at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/basic_float_types.ll
Log Message:
-----------
[SPIR-V] Add Float16 support when targeting Vulkan (#77115)
Add Float16 to Vulkan's available capabilities, and guard Float16Buffer
(Kernel-only capability) against being added outside OpenCL
environments.
Add tests to verify half and half vector types, and validate with
spirv-val.
Fixes #66398
Commit: 4210eb1d704c3ba602328efc8924147b2e98ed18
https://github.com/llvm/llvm-project/commit/4210eb1d704c3ba602328efc8924147b2e98ed18
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M flang/runtime/extensions.cpp
Log Message:
-----------
Revert "[flang] Fix a warning"
This reverts commit 18734f606635f4f4270f911b68060890ce3dd94a.
This caused a test suite failure on our bots:
https://lab.llvm.org/buildbot/#/builders/184/builds/9407
```
$ ~/stage1.install/bin/flang-new flush_1.f90
/usr/bin/ld: /home/david.spickett/stage1.install/lib/libFortranRuntime.a(extensions.cpp.o): in function `getlog_':
extensions.cpp:(.text.getlog_+0x1c): undefined reference to `operator new(unsigned long)'
/usr/bin/ld: extensions.cpp:(.text.getlog_+0x7c): undefined reference to `operator delete(void*)'
/usr/bin/ld: extensions.cpp:(.text.getlog_+0xc4): undefined reference to `operator delete(void*)'
/usr/bin/ld: extensions.cpp:(.text.getlog_+0xe8): undefined reference to `operator delete(void*)'
flang-new: error: linker command failed with exit code 1 (use -v to see invocation)
```
Commit: 5dbf178154c57851f3519c0e6c36d69b18648d37
https://github.com/llvm/llvm-project/commit/5dbf178154c57851f3519c0e6c36d69b18648d37
Author: Maciej Gabka <maciej.gabka at arm.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
Log Message:
-----------
[TLI][NFC] Fix ordering of ArmPL and SLEEF tests (#77609)
This patch sorts the tests which check if SLEEF and ArmPL mappings are
used, in the order of the math functions base names.
Commit: 6fdc2ce8c507d3acf4e4b65beb66cfed68045588
https://github.com/llvm/llvm-project/commit/6fdc2ce8c507d3acf4e4b65beb66cfed68045588
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-resized.ll
Log Message:
-----------
[SLP]Fix PR77916: transform the whole mask, not only the elements for
the second vector.
Need to transform all elements in the long mask, if we decided to
produce shorter version, some elements may still have incorrect inifices
after transformation for the first vector in the permutation.
Commit: eaa4b6cf2914435c7549d5caa09b5f2d87082ed0
https://github.com/llvm/llvm-project/commit/eaa4b6cf2914435c7549d5caa09b5f2d87082ed0
Author: donald chen <62002319+cxy-1993 at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/test/Dialect/Bufferization/canonicalize.mlir
Log Message:
-----------
[mlir][bufferization] Clone simplify fails when input and result type not cast compatiable (#71310)
The simplify of bufferization.clone generates a memref.cast op, but the
checks in simplify do not verify whether the operand types and return
types of clone op is compatiable, leading to errors. This patch
addresses this issue.
Commit: 9fdc568824b0992d48704dfa530a12073cc02f5e
https://github.com/llvm/llvm-project/commit/9fdc568824b0992d48704dfa530a12073cc02f5e
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/unittests/Analysis/CMakeLists.txt
A llvm/unittests/Analysis/ReplaceWithVecLibTest.cpp
Log Message:
-----------
[TLI] Fix replace-with-veclib crash with invalid arguments (#77112)
Fix a crash of `replace-with-veclib` pass, when the arguments of the TLI
mapping do not match the original call.
Now, it simply ignores such cases.
Test require assertions as it accesses programmatically the debug log.
Commit: 5b14bd01f500be33ad94f14dca6f5cb33c623ee7
https://github.com/llvm/llvm-project/commit/5b14bd01f500be33ad94f14dca6f5cb33c623ee7
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M flang/runtime/extensions.cpp
Log Message:
-----------
Reland "[flang] Fix a warning"
This reverts commit 4210eb1d704c3ba602328efc8924147b2e98ed18.
I didn't realise this was going to break every -Werror bot,
so I guess we'll take the test suite failure until a fix is found,
it's less disruptive.
Commit: 89c0ea88b1126521ed68d669cf8b8433cdbb475e
https://github.com/llvm/llvm-project/commit/89c0ea88b1126521ed68d669cf8b8433cdbb475e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port 9fdc568824b0
Commit: e4d01bb2273804355cf84a8a560e578735590ac2
https://github.com/llvm/llvm-project/commit/e4d01bb2273804355cf84a8a560e578735590ac2
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
Log Message:
-----------
[SCEV] Special case sext in isKnownNonZero (#77834)
The existing logic in isKnownNonZero relies on unsigned ranges, which
can be problematic when our range calculation is imprecise. Consider the
following:
%offset.nonzero = or i32 %offset, 1
--> %offset.nonzero U: [1,0) S: [1,0)
%offset.i64 = sext i32 %offset.nonzero to i64
--> (sext i32 %offset.nonzero to i64) U: [-2147483648,2147483648)
S: [-2147483648,2147483648)
Note that the unsigned range for the sext does contain zero in this case
despite the fact that it can never actually be zero.
Instead, we can push the query down one level - relying on the fact that
the sext is an invertible operation and that the result can only be zero
if the input is. We could likely generalize this reasoning for other
invertible operations, but special casing sext seems worthwhile.
Commit: a300b2403784f416f36a1cee8d0425975f790b45
https://github.com/llvm/llvm-project/commit/a300b2403784f416f36a1cee8d0425975f790b45
Author: Paschalis Mpeis <Paschalis.Mpeis at arm.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/unittests/Analysis/CMakeLists.txt
R llvm/unittests/Analysis/ReplaceWithVecLibTest.cpp
Log Message:
-----------
Revert "[TLI] Fix replace-with-veclib crash with invalid arguments (#77112)"
This reverts commit 9fdc568824b0992d48704dfa530a12073cc02f5e,
as it linker crashes on some platforms.
Commit: 8550e8845c4fe1aea3bd3d69bcc33d33040b1f13
https://github.com/llvm/llvm-project/commit/8550e8845c4fe1aea3bd3d69bcc33d33040b1f13
Author: Balรกzs Kรฉri <balazs.keri at ericsson.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream.c
Log Message:
-----------
[clang][analyzer] Add function 'fprintf' to StreamChecker. (#77613)
[clang][analyzer] Add function 'fprintf' to StreamChecker.
Commit: 6f55c134d4aaa9eab9ef53886c2532d6da72ca47
https://github.com/llvm/llvm-project/commit/6f55c134d4aaa9eab9ef53886c2532d6da72ca47
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/test/CodeGen/debug-names-compound-type-units.ll
M clang/test/CodeGen/thinlto-debug-names-tu-reuse.ll
Log Message:
-----------
[clang[test] Require x86 target for new tests
Fixes d199ab469949b104bc4fbb888251ee184fd53de1.
Commit: 844a8dcaafb3efcac936e0d89df857f818e5a209
https://github.com/llvm/llvm-project/commit/844a8dcaafb3efcac936e0d89df857f818e5a209
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M lldb/include/lldb/Core/ValueObject.h
M lldb/source/Core/ValueObject.cpp
Log Message:
-----------
[lldb][ValueObject][NFC] Remove unused parameter to ReadPointedString (#77919)
All its usages were removed in
`2206b48d6ddabad61979fa69ba09e6b6fb19b0b2`.
Commit: f02b7770bb04b88455804b371dba1f44a86b90da
https://github.com/llvm/llvm-project/commit/f02b7770bb04b88455804b371dba1f44a86b90da
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port a300b2403784
Commit: dc1ae8378926e9a730fa7b87ecf73aa9493760ca
https://github.com/llvm/llvm-project/commit/dc1ae8378926e9a730fa7b87ecf73aa9493760ca
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M libcxx/test/support/filesystem_test_helper.h
Log Message:
-----------
[libc++][test] Fix a logical mistake introduced by #77058 (#77867)
A logical mistake is made in #77058, we should try to find a new file
path for socket creation when the path's length generated is bigger than
the socket length limit.
Commit: 108bedee448684fa9495de928f4951162deb7943
https://github.com/llvm/llvm-project/commit/108bedee448684fa9495de928f4951162deb7943
Author: Alex Zinenko <zinenko at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir] fix bazel
Commit: dec74a834700d0cc5aecc570aca464b1cdffce66
https://github.com/llvm/llvm-project/commit/dec74a834700d0cc5aecc570aca464b1cdffce66
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
A llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
Log Message:
-----------
[AMDGPU] Fix VS_CNT overflow assertion (#77935)
Always set the upper bound for VS_CNT higher than the lower bound.
Before #77439 this code was only executed on function entry where the
lower bound was 0 so it was not a problem.
Fixes #77931
Commit: 9d8e53818ded8268da2df43e73880073fcf02922
https://github.com/llvm/llvm-project/commit/9d8e53818ded8268da2df43e73880073fcf02922
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU] Refactor getNonSoftWaitcntOpcode and its callers (#77933)
This avoids listing all soft waitcnt opcodes in two places
(getNonSoftWaitcntOpcode and isSoftWaitcnt) and avoids the need for
helpers isWaitcnt and isWaitcntVsCnt.
Commit: 88871784fd722efd3c94954e460acb32446142f2
https://github.com/llvm/llvm-project/commit/88871784fd722efd3c94954e460acb32446142f2
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
Log Message:
-----------
[AMDGPU] Allow buffer intrinsics to be marked volatile at the IR level (#77847)
In order to ensure the correctness of ptr addrspace(7) lowering, we need
a backwards-compatible way to flag buffer intrinsics as volatile that
can't be dropped (unlike metadata).
To acheive this in a backwards-compatible way, we use bit 31 of the
auxilliary immediates of buffer intrinsics as the volatile flag. When
this bit is set, the MachineMemOperand for said intrinsic is marked
volatile. Existing code will ensure that this results in the appropriate
use of flags like glc and dlc.
This commit also harmorizes the handling of the auxilliary immediate for
atomic intrinsics, which new go through extract_cpol like loads and
stores, which masks off the volatile bit.
Commit: 3af6ae0fbea40097e159c11893ee7ab57d00480c
https://github.com/llvm/llvm-project/commit/3af6ae0fbea40097e159c11893ee7ab57d00480c
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/StaticAssertCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/static-assert.cpp
Log Message:
-----------
[clang-tidy] Fix false-positives in misc-static-assert caused by non-constexpr variables (#77203)
Ignore false-positives when referring to non-constexpr variables in
non-unevaluated context (like decltype, sizeof, ...).
Moved from https://reviews.llvm.org/D158657
Fixes: #24066
Commit: 2f2217a8f7ad68b2d9374e0515f02e6752acd126
https://github.com/llvm/llvm-project/commit/2f2217a8f7ad68b2d9374e0515f02e6752acd126
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/vp-inttoptr-ptrtoint.ll
Log Message:
-----------
[RISCV] Add missing tests for inttoptr/ptrtoint on scalable vectors (#77857)
Add missing tests for inttoptr/ptrtoint on scalable vectors. Previously we only had inttoptr/ptrtoint tests for fixed vectors.
Commit: f6f1ab9d90252f9b943e77a64e30a3d26ef7cbbb
https://github.com/llvm/llvm-project/commit/f6f1ab9d90252f9b943e77a64e30a3d26ef7cbbb
Author: Felix Schneider <fx.schn at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/test/Dialect/SCF/for-loop-peeling.mlir
Log Message:
-----------
[mlir][scf] Fix `for-loop-peeling` crash (#77697)
Before applying the peeling patterns, it can happen that the `ForOp`
gets a step of zero during folding. This leads to a division-by-zero
down the line.
This patch adds an additional check for a constant-zero step and a
test.
Fix https://github.com/llvm/llvm-project/issues/75758
Commit: 3bbc912d37f03d9ad3be330b81d91c2eaf6c37f2
https://github.com/llvm/llvm-project/commit/3bbc912d37f03d9ad3be330b81d91c2eaf6c37f2
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/test/Driver/fsanitize.c
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[Driver,test] Update sanitizer test after RequiresPIE removal #77689
They fail in a CLANG_DEFAULT_PIE_ON_LINUX=off build.
Commit: 97a9dbb64919fe71379cda5f043633cbeb6438e5
https://github.com/llvm/llvm-project/commit/97a9dbb64919fe71379cda5f043633cbeb6438e5
Author: XDeme <66138117+XDeme at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Format/WhitespaceManager.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Handle possible crash in `getCells` (#77723)
Done as requested in llvm/llvm-project#77045
I have changed the test a bit, because since the root problem was fixed,
the original test would possibly never crash.
Commit: 0daf303e79906196ee8ea5c5c9db375b7c8fcc31
https://github.com/llvm/llvm-project/commit/0daf303e79906196ee8ea5c5c9db375b7c8fcc31
Author: spupyrev <spupyrev at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M bolt/lib/Passes/CacheMetrics.cpp
Log Message:
-----------
[BOLT] Fix double conversion in CacheMetrics (#75253)
The change (i) fixes an issue with double-int conversion in CacheMetrics
and
(ii) removes command-line options for computing metrics (which aren't
modified
anyway).
This change might break some tests verifying the exact output of
CacheMetrics.
Commit: 85b7d54385ab65dc5d924f78613fab182529d2c3
https://github.com/llvm/llvm-project/commit/85b7d54385ab65dc5d924f78613fab182529d2c3
Author: Emilio Cota <ecg at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] fix for 5417a5fed6e1e026
Commit: 9f8c818141720c1bb69f9e023396a9aa0733ccf6
https://github.com/llvm/llvm-project/commit/9f8c818141720c1bb69f9e023396a9aa0733ccf6
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
[CommandLine][NFCI] Do not add 'All' to 'RegisteredSubCommands' (#77722)
After #75679, it is no longer necessary to add the `All` pseudo
subcommand to the list of registered subcommands. The change causes the
list to contain only real subcommands, i.e. an unnamed top-level
subcommand and named ones. This simplifies the code a bit by removing
some checks for this special case.
This is a fixed version of #77041, where options of the 'All' subcommand
were not added to subcommands defined after them.
Commit: 792fa23c1bd0df92f4835f50300399c5db2d80b4
https://github.com/llvm/llvm-project/commit/792fa23c1bd0df92f4835f50300399c5db2d80b4
Author: Usman Nadeem <mnadeem at quicinc.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve2-sli-sri.ll
Log Message:
-----------
[AArch64][SVE2] Lower OR to SLI/SRI (#77555)
Code builds on NEON code and the tests are adapted from NEON tests
minus the tests for illegal types.
Commit: b348126b21ee4a3189dde946e70f2b0e899f86e9
https://github.com/llvm/llvm-project/commit/b348126b21ee4a3189dde946e70f2b0e899f86e9
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M libc/utils/HdrGen/CMakeLists.txt
M llvm/cmake/modules/CrossCompile.cmake
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[libc] Build native libc-hdrgen when crosscompiling (#77848)
When crosscompiling tools for a different architecture, we need to build
native libc-hdrgen which can be achieved using the existing CMake
support for crosscompiling tablegen tools.
Commit: 882b4fccd26264be15aed5ec531ab6c879d8cc2a
https://github.com/llvm/llvm-project/commit/882b4fccd26264be15aed5ec531ab6c879d8cc2a
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M libcxx/test/libcxx/containers/views/mdspan/layout_left/assert.stride.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_right/assert.stride.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_stride/assert.stride.pass.cpp
M libcxx/test/support/check_assertion.h
Log Message:
-----------
[libc++][NFC] Make AssertionInfoMatcher::CheckMessageMatches Stricter (#77721)
Rather than allow for a message to be considered a match for the actual
assertion if it is anywhere in the assertion text, make sure that the
expected and the actual assertion are identical.
Addresses #77701
Commit: 8cd956197fc08debb8b2ce6894bad59800e1993e
https://github.com/llvm/llvm-project/commit/8cd956197fc08debb8b2ce6894bad59800e1993e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Update descriptions for Zvk* shorthands. (#77961)
This makes them more consistent with other extensions so they appear
move similar in the -print-supported-extensions output.
Commit: 1048b5999b4b1c970f3b454040d4352770e5cf5c
https://github.com/llvm/llvm-project/commit/1048b5999b4b1c970f3b454040d4352770e5cf5c
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/math/CMakeLists.txt
A libc/src/math/fabsf128.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/fabsf128.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/fabsf128_test.cpp
Log Message:
-----------
[libc][math] Add C23 math function fabsf128. (#77825)
Commit: f05b0812145897ba34bc2d7fda436a54f9fbca22
https://github.com/llvm/llvm-project/commit/f05b0812145897ba34bc2d7fda436a54f9fbca22
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/large-data-threshold.c
M clang/test/Driver/large-data-threshold.c
Log Message:
-----------
[clang] Adjust -mlarge-data-threshold handling (#77958)
Make it apply to x86-64 medium and large code models since that's what
the backend does.
Limit logic to exclude x86-32.
Default to 0, let the driver set it to 65536 for the medium code model
if one is not passed. Set it to 0 for the large code model by default to
match gcc and since some users make assumptions about the large code
model that any small data will break.
Commit: cd753c70e66f557e27bef8c04d98c4cf3667f566
https://github.com/llvm/llvm-project/commit/cd753c70e66f557e27bef8c04d98c4cf3667f566
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
Log Message:
-----------
[libc][math] Remove wrong fabsf128 entrypoint in aarch64 list. (#77974)
Commit: 3add9491cd748cb9d71ff38f1517cf06b9708d01
https://github.com/llvm/llvm-project/commit/3add9491cd748cb9d71ff38f1517cf06b9708d01
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M openmp/libomptarget/test/lit.cfg
M openmp/libomptarget/test/lit.site.cfg.in
M openmp/libomptarget/test/unified_shared_memory/api.c
M openmp/libomptarget/test/unified_shared_memory/close_enter_exit.c
Log Message:
-----------
[OpenMP] Fix two usm tests for amdgpus. (#77851)
Some are missing setting of HSA_XNACK=1 environment variable, used to
enable unified memory support on amdgpu's when it's not been set at
kernel boot time. Some others needed to be marked as supporting
unified_shared_memory in the lit test harness.
Commit: 4c41449edd8d37f103d75c105d13593e1fe0e6fe
https://github.com/llvm/llvm-project/commit/4c41449edd8d37f103d75c105d13593e1fe0e6fe
Author: Ryan Prichard <rprichard at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
A libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
A libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++][Android] Add NDK ABI lists for i686 and x86_64 (#69272)
This commit adds ABI lists for the Android NDK.
Fixes: https://github.com/llvm/llvm-project/issues/69270
Differential Revision: https://reviews.llvm.org/D155341
Commit: 93efa2b8b9eb46fcf79a71f594cd5ac377302184
https://github.com/llvm/llvm-project/commit/93efa2b8b9eb46fcf79a71f594cd5ac377302184
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M openmp/libomptarget/test/lit.cfg
M openmp/libomptarget/test/lit.site.cfg.in
M openmp/libomptarget/test/unified_shared_memory/api.c
M openmp/libomptarget/test/unified_shared_memory/close_enter_exit.c
Log Message:
-----------
Revert "[OpenMP] Fix two usm tests for amdgpus." (#77983)
Reverts llvm/llvm-project#77851
Commit: dcba077146b92634f6a6b6e86970d59aaf7baf28
https://github.com/llvm/llvm-project/commit/dcba077146b92634f6a6b6e86970d59aaf7baf28
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M bolt/docs/BAT.md
M bolt/include/bolt/Profile/BoltAddressTranslation.h
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/test/X86/bolt-address-translation.test
Log Message:
-----------
[BOLT] Embed cold mapping info into function entry in BAT (#76903)
Reduces BAT section size:
- large binary: to 12283500 bytes (0.32x original size),
- medium binary: to 1616020 bytes (0.27x original size),
- small binary: to 404 bytes (0.28x original size).
Test Plan: Updated bolt/test/X86/bolt-address-translation.test
Commit: e27561fc7de0231f2efdb750f2092c3ac807c1a3
https://github.com/llvm/llvm-project/commit/e27561fc7de0231f2efdb750f2092c3ac807c1a3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M lldb/include/lldb/Utility/FileSpec.h
M lldb/include/lldb/Utility/FileSpecList.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Utility/FileSpec.cpp
M lldb/unittests/Utility/FileSpecTest.cpp
Log Message:
-----------
[lldb] Move MD5 Checksum from FileSpec to SupportFile
When I added the MD5 checksum I was on the fence between storing it in
FileSpec or creating a new SupportFile abstraction. The latter was
deemed overkill for just the MD5 hashes, but support for inline sources
in the DWARF 5 line table tipped the scales. This patch moves the MD5
checksum into the new SupportFile class.
Commit: 4618ef8cf5d8fa406c34ce2770c304cac95310b6
https://github.com/llvm/llvm-project/commit/4618ef8cf5d8fa406c34ce2770c304cac95310b6
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/DIContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/lib/DebugInfo/DWARF/DWARFCompileUnit.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
A llvm/test/tools/llvm-dwarfdump/Inputs/dump_dwo.dwo.yaml
A llvm/test/tools/llvm-dwarfdump/Inputs/dump_dwo.o.yaml
A llvm/test/tools/llvm-dwarfdump/dump_dwo.test
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
Log Message:
-----------
Allow the dumping of .dwo files contents to show up when dumping an executable with split DWARF. (#66726)
Allow the dumping of .dwo files contents to show up when dumping an
executable with split DWARF.
Currently if you run llvm-dwarfdump on a binary that has skeleton
compile units, you only see the skeleton compile units. Since the main
binary has the linked addresses it would be nice to be able to dump
DWARF from the .dwo files and how the resolved addresses instead of
showing the address index and "<unresolved>" in the output. This patch
adds an option that can be specified to dump the non skeleton DIEs named
--dwo.
Added the ability to use the following options with split dwarf as well:
--name <name>
--lookup <addr>
--debug-info <die-offset>
Commit: c8ef88c446a3ff773c5be2fbf3df84b8b40c0c41
https://github.com/llvm/llvm-project/commit/c8ef88c446a3ff773c5be2fbf3df84b8b40c0c41
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
Log Message:
-----------
[lldb][NFCI] Remove CommandReturnObject from BreakpointIDList (#77858)
BreakpointIDList does not need to know about CommandReturnObject.
BreakpointIDList::FindAndReplaceIDRanges is the last place that uses it
in BreakpointIDList.
Instead of passing in a CommandReturnObject, it now returns an
llvm::Error. The callsite uses the Error to populate the
CommandReturnObject as needed.
Commit: 45ccc3b968cd40a07c653afeb4f548fd34433da1
https://github.com/llvm/llvm-project/commit/45ccc3b968cd40a07c653afeb4f548fd34433da1
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
Log Message:
-----------
[compiler-rt][builtins] Add a missing 'const' to the Apple __init_cpu_features_resolver
Commit: 060505aa0d49f31e6f2fd4e137c76d86f571f66b
https://github.com/llvm/llvm-project/commit/060505aa0d49f31e6f2fd4e137c76d86f571f66b
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Parse/ParseOpenACC.cpp
Log Message:
-----------
[OpenACC] Remove mistakenly left TODO and fix format issue
Commit: 40a361acf5ce255054c5b2e5f67a24325bfe0398
https://github.com/llvm/llvm-project/commit/40a361acf5ce255054c5b2e5f67a24325bfe0398
Author: John Harrison <harjohn at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/main.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Updating VariableDescription to use GetDescription() as a fallback. (#77026)
When generating a `display_value` for a variable the current approach
calls `SBValue::GetValue()` and `SBValue::GetSummary()` to generate a
`display_value` for the `SBValue`. However, there are cases where both
of these return an empty string and the fallback is to print a pointer
and type name instead (e.g. `FooBarType @ 0x00321`).
For swift types, lldb includes a langauge runtime plugin that can
generate a description of the object but this is only used with
`SBValue::GetDescription()`.
For example:
```
$ lldb swift-binary
... stop at breakpoint ...
lldb> script
>>> event = lldb.frame.GetValueForVariablePath("event")
>>> print("Value", event.GetValue())
Value None
>>> print("Summary", event.GetSummary())
Summary None
>>> print("Description", event) # __str__ calls SBValue::GetDescription()
Description (main.Event) event = (name = "Greetings", time = 2024-01-04 23:38:06 UTC)
```
With this change, if GetValue and GetSummary return empty then we try
`SBValue::GetDescription()` as a fallback before using the previous
logic of printing `<type> @ <addr>`.
Commit: 974ded972564c87683fdfc057e07ba6d83710f51
https://github.com/llvm/llvm-project/commit/974ded972564c87683fdfc057e07ba6d83710f51
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/vectorization.mlir
M mlir/test/Interfaces/TilingInterface/lower-to-loops-using-interface.mlir
Log Message:
-----------
[mlir][Linalg] Change `linalg.transpose` to use the output indexing map as identity. (#77951)
This makes it consistent with how other linalg operations represent
indexing maps.
Commit: f4461cf4f30417be118487142bca6635e07ed1e6
https://github.com/llvm/llvm-project/commit/f4461cf4f30417be118487142bca6635e07ed1e6
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/main.cpp
Log Message:
-----------
[lldb][test] Add tests for target.max-string-summary-length setting (#77920)
This adds API tests for the `target.max-string-summary-length`, which
was recently fixed in https://github.com/llvm/llvm-project/pull/72233
Commit: 2b2310484f5fc30c9da914caa8d2bd12ab25b3e6
https://github.com/llvm/llvm-project/commit/2b2310484f5fc30c9da914caa8d2bd12ab25b3e6
Author: Dominik Wรณjt <dominik.wojt at arm.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M libcxx/utils/ci/build-picolibc.sh
Log Message:
-----------
[libc++] tests with picolibc: update picolibc (#77908)
The updated picolibc version has "isblank" function with external
linkage. This is required for C++ modules support.
This should solve all the problems reported in #76980, but
we'll wait to validate this with the modules build without
closing that issue.
Commit: e13ee61553403722c89586b9758f8b9395820fad
https://github.com/llvm/llvm-project/commit/e13ee61553403722c89586b9758f8b9395820fad
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP] Separate creation of work-sharing and SIMD loops, NFC (#77757)
These two constructs were both handled in `genOMP` for loop constructs.
There is some shared code between the two, but there are also enough
differences to separate these two cases into individual functions.
The shared code converting loop bounds and steps has been extracted
into a separate function.
Recursive lowering [1/5]
Commit: dc1e2790e476499f6007efcd73ab9d648bfc48bb
https://github.com/llvm/llvm-project/commit/dc1e2790e476499f6007efcd73ab9d648bfc48bb
Author: Greg Clayton <clayborg at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/test/tools/llvm-dwarfdump/dump_dwo.test
Log Message:
-----------
Fix buildbots after #66726.
Some builds don't enable the x86_64 target, so we sometimes don't see register names in DWARF output.
Commit: 21a77e8a92a8d97f0dfd5f9f4faa7b6bc82887aa
https://github.com/llvm/llvm-project/commit/21a77e8a92a8d97f0dfd5f9f4faa7b6bc82887aa
Author: Reid Kleckner <rnk at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/Value.h
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR] Reorder Value fields to put the SubclassID first (#53520)
Placing the class id at offset 0 should make `isa` and `dyn_cast` faster
by eliminating the field offset (previously 0x10) from the memory
operand, saving encoding space on x86, and, in theory, an add micro-op.
You can see the load encodes one byte smaller here:
https://godbolt.org/z/Whvz4can9
The compile time tracker shows some modestly positive results in the
on the `cycle` metric and in the final clang binary size metric:
https://llvm-compile-time-tracker.com/compare.php?from=33b54f01fe32030ff60d661a7a951e33360f82ee&to=2530347a57401744293c54f92f9781fbdae3d8c2&stat=cycles
Clicking through to the per-library size breakdown shows that
instcombine size reduces by 0.68%, which is meaningful, and I believe
instcombine is known to be a hotspot.
It is, however, potentially noise. I still think we should do this,
because notionally, the class id really acts as the vptr of the Value,
and conventionally the vptr is always at offset 0.
Commit: e028bee52ffc2ab9883d3d9a7dc66fe7b7c50a65
https://github.com/llvm/llvm-project/commit/e028bee52ffc2ab9883d3d9a7dc66fe7b7c50a65
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unconventional-assign-operator.rst
Log Message:
-----------
[NFC]update autosar link in clang-tidy doc
Commit: 5ca2d75f2046612978ba71c4b36714b2a0a01886
https://github.com/llvm/llvm-project/commit/5ca2d75f2046612978ba71c4b36714b2a0a01886
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/misc/unconventional-assign-operator.rst
Log Message:
-----------
[NFC]fix incorrect autosar link in clang-tidy doc
Commit: 3edf82d5566ed5c9898f52b5591c05f6366d6bac
https://github.com/llvm/llvm-project/commit/3edf82d5566ed5c9898f52b5591c05f6366d6bac
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/XRay/Trace.cpp
Log Message:
-----------
[XRay] Reserve memory space ahead-of-time when reading native format log (#76853)
XRay used to struggle reading large log files. It turned out the
bottleneck was primarily caused by the reallocation happens when
appending log entries into a std::vector.
This patch reserves the memory space ahead-of-time since the number of
entries is known for most cases. Making llvm-xray runs 1.8 times faster
and uses 1.4 times less physical memory when reading large (~2.6GB) log
files.
Commit: 7dd4d28e4196fad83ed78ea342d65e7eaec4a6f1
https://github.com/llvm/llvm-project/commit/7dd4d28e4196fad83ed78ea342d65e7eaec4a6f1
Author: Yi Wu <43659785+yi-wu-arm at users.noreply.github.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/runtime/execute.cpp
M flang/runtime/tools.cpp
M flang/runtime/tools.h
Log Message:
-----------
[flang] Fix const cast issue in FreeMemory function call in execute_command_line (#77906)
The FreeMemory function only accepts a void pointer, but it was being
called with a const char pointer, resulting in a type-casting issue.
To address this, the const was removed, use char * instead.
Commit: 5fa4b1d83c80769f6003ae8aa504a21e64ddde63
https://github.com/llvm/llvm-project/commit/5fa4b1d83c80769f6003ae8aa504a21e64ddde63
Author: Koakuma <koachan at protonmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/Sparc/SparcSubtarget.h
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
Log Message:
-----------
[SPARC] Consume `tune-cpu` directive in the backend (#77195)
This lets the backend read the `tune-cpu` directive that is emitted by the frontend.
No changes are needed for clang as it is already emits it.
Commit: 15179aa433dfb50e025ee054aea50f428933bb22
https://github.com/llvm/llvm-project/commit/15179aa433dfb50e025ee054aea50f428933bb22
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Log Message:
-----------
[llvm] Use llvm::is_contained (NFC)
Commit: eccd279979ac210248cdf7d583169df6a8e552bd
https://github.com/llvm/llvm-project/commit/eccd279979ac210248cdf7d583169df6a8e552bd
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/tools/driver/driver.cpp
Log Message:
-----------
[clang] Use SmallString::operator std::string() (NFC)
Commit: 771ab15e4881b9c4adaabb694d901c3dbeb1fa47
https://github.com/llvm/llvm-project/commit/771ab15e4881b9c4adaabb694d901c3dbeb1fa47
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
Log Message:
-----------
[clang-tidy] Use StringRef::ltrim (NFC)
Commit: 1df4fb98813a33d14f2112a1bb906039d112fa3f
https://github.com/llvm/llvm-project/commit/1df4fb98813a33d14f2112a1bb906039d112fa3f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Support/StringRef.cpp
Log Message:
-----------
[Support] Use StringRef::ltrim (NFC)
Commit: a08402f95bc785c124702b075904cc110128661f
https://github.com/llvm/llvm-project/commit/a08402f95bc785c124702b075904cc110128661f
Author: Leonard Chan <leonardchan at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
Log Message:
-----------
[sanitizer_common][fuchsia] Get correct vmar info
Forward fix for https://github.com/llvm/llvm-project/pull/75256
The process for MmapAlignedOrDieOnFatalError involves trimming the start
and end of a mapping to ensure it's aligned correctly. This invloves
calling zx_vmar_map again but overwriting a part of the original vmar
which involves a call to zx_object_get_info(ZX_INFO_VMAR). After
https://github.com/llvm/llvm-project/pull/75256, we unconditionally
called this on gSanitizerHeapVmar but this can lead to a
ZX_ERR_INVALID_ARGS if the prior mapping was on the root vmar.
This can be fixed by also returning the vmar we did the last mapping to
and using that for followup operations that specifically involve the
same vmar. This way we don't have to try each syscall for both vmars.
Commit: 8566cd61246cf8649eb12c4cf96a72f3203fee98
https://github.com/llvm/llvm-project/commit/8566cd61246cf8649eb12c4cf96a72f3203fee98
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/unittests/MIR/CMakeLists.txt
A llvm/unittests/MIR/PassBuilderCallbacksTest.cpp
Log Message:
-----------
[CodeGen] Let `PassBuilder` support machine passes (#76320)
`PassBuilder` would be a better place to parse MIR pipeline. We can
reuse the code to support parsing pass with parameters and targets can
reuse `registerPassBuilderCallbacks` to register the target specific
passes. `PassBuilder` also has ability to check whether a Pass is a
machine pass.
Commit: 99b7c770c2bebd1d83f06595b670d9385f6d3c52
https://github.com/llvm/llvm-project/commit/99b7c770c2bebd1d83f06595b670d9385f6d3c52
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M flang/test/Driver/isysroot.f90
Log Message:
-----------
[flang] Allow different linker name (#77849)
The linker name is different if the `lld` project is enabled
`-DLLVM_ENABLE_PROJECTS="...;lld"`.
---------
Co-authored-by: Leandro Lupori <leandro.lupori at gmail.com>
Commit: 96b9b630348591ca112c8bae1eed550a4958448f
https://github.com/llvm/llvm-project/commit/96b9b630348591ca112c8bae1eed550a4958448f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/MIR/BUILD.gn
Log Message:
-----------
[gn build] Port 8566cd61246c
Commit: 33aaad94279e5e2b7ab413786abdde48e3486ad9
https://github.com/llvm/llvm-project/commit/33aaad94279e5e2b7ab413786abdde48e3486ad9
Author: Gonsolo <gonsolo at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl02.rst
M llvm/examples/Kaleidoscope/Chapter2/CMakeLists.txt
Log Message:
-----------
[Kaleidoscope] LLVM is not needed for chapter two (#69823)
Since the example (llvm/examples/Kaleidoscope/Chapter2/toy.cpp) is
self-contained there is no need to use LLVM.
Commit: fc2766c1d4776a8e56a7b931a779c57bf7ed3d8b
https://github.com/llvm/llvm-project/commit/fc2766c1d4776a8e56a7b931a779c57bf7ed3d8b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/test/AST/Interp/arrays.cpp
M clang/test/AST/Interp/cxx23.cpp
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp] Diagnose reads from non-const global variables (#71919)
This fixes a long-standing FIXME item.
Unfortunately it changes the diagnostic output of the tests added in
`cxx23.cpp`, but they were wrong before and are wrong after, so no big
deal.
Commit: 51fb76ff1d4a888342c4a406904096b32cc49866
https://github.com/llvm/llvm-project/commit/51fb76ff1d4a888342c4a406904096b32cc49866
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M lld/COFF/DriverUtils.cpp
M lld/Common/Args.cpp
M lld/MachO/Driver.cpp
Log Message:
-----------
[lld] Use StringRef::consume_front_insensitive (NFC)
Commit: 6bd488dd24cc06daea0d9a9dea0e2843f4c8d38e
https://github.com/llvm/llvm-project/commit/6bd488dd24cc06daea0d9a9dea0e2843f4c8d38e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CoverageMappingGen.cpp
Log Message:
-----------
[CodeGen] Use DenseMap::contains (NFC)
Commit: 8e8bbbd48ee23764cc6030fd259dde6a1107c00c
https://github.com/llvm/llvm-project/commit/8e8bbbd48ee23764cc6030fd259dde6a1107c00c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/ConvertToDestinationStyle.cpp
M mlir/lib/Dialect/Vector/Transforms/BufferizableOpInterfaceImpl.cpp
Log Message:
-----------
[mlir] Use llvm::is_contained (NFC)
Commit: 8e8c954a173e0e814de1207513f357e99dff2e85
https://github.com/llvm/llvm-project/commit/8e8c954a173e0e814de1207513f357e99dff2e85
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/test/TableGen/DefaultOpsGlobalISel.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-permutations.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter-input-discard.td
M llvm/test/TableGen/GlobalISelEmitter-multiple-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter-multiple-output.td
M llvm/test/TableGen/GlobalISelEmitter-nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitter-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter-zero-reg.td
M llvm/test/TableGen/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizer.td
M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizerSameOperand-invalid.td
M llvm/test/TableGen/GlobalISelEmitterRegSequence.td
M llvm/test/TableGen/GlobalISelEmitterSubreg.td
M llvm/test/TableGen/HasNoUse.td
M llvm/test/TableGen/gisel-physreg-input.td
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/GlobalISelMatchTable.cpp
Log Message:
-----------
[GISel] Erase the root instruction after emitting all its potential uses (#77494)
This tries to fix a bug by resolving a few FIXMEs. The bug is that
`EraseInstAction` is emitted after emitting the _first_ `BuildMIAction`,
which is too early because the erased instruction may still be used by
subsequent `BuildMIAction`s (in particular, by `CopyRenderer`).
An example of the bug (from `match-table-operand-types.td`):
```
def InstTest0 : GICombineRule<
(defs root:$a),
(match (G_MUL i32:$x, i32:$b, i32:$c),
(G_MUL $a, i32:$b, i32:$x)),
(apply (G_ADD i64:$tmp, $b, i32:$c),
(G_ADD i8:$a, $b, i64:$tmp))>;
GIR_EraseFromParent, /*InsnID*/0,
GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(TargetOpcode::G_ADD),
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/0, // a
GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // b
GIR_AddSimpleTempRegister, /*InsnID*/1, /*TempRegID*/0,
```
Here, the root instruction is destroyed before copying its operands ('a'
and 'b') to the new instruction.
The solution is to emit `EraseInstAction` for the root instruction as
the last action in the emission pipeline.
Commit: 8d817f6479a5df874028a8b40fd30aecd3479005
https://github.com/llvm/llvm-project/commit/8d817f6479a5df874028a8b40fd30aecd3479005
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/intrinsics-sm90.ll
Log Message:
-----------
[LLVM][NVPTX]: Add aligned versions of cluster barriers (#77940)
Commit: e3fde348514529bfb699005fdc5af80bdddf7cfe
https://github.com/llvm/llvm-project/commit/e3fde348514529bfb699005fdc5af80bdddf7cfe
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/TestDataFormatterLibcxxChrono.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/main.cpp
Log Message:
-----------
[lldb][libc++] Adds missing C++20 calendar data formatters. (#77954)
This is a followup of #76983 and adds the libc++ data formatters for
- weekday,
- weekday_indexed,
- weekday_last,
- month_weekday,
- month_weekday_last,
- year_month,
- year_month_day_last
- year_month_weekday, and
- year_month_weekday_last.
Commit: 1e51b35981063ea3408d3dab6c103a23f94c25e0
https://github.com/llvm/llvm-project/commit/1e51b35981063ea3408d3dab6c103a23f94c25e0
Author: Jim Lin <jim at andestech.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Sema/SemaRISCVVectorLookup.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[RISCV] Change required features for Zvfhmin intrinsics from ZvfhminOrZvfh to Zvfhmin (#77866)
>From #75735, Zvfh implies Zvfhmin.
Commit: 66786a79d6f622012879e94a92838449bf175a71
https://github.com/llvm/llvm-project/commit/66786a79d6f622012879e94a92838449bf175a71
Author: Bharathi Ramana Joshi <joshibharathiramana at gmail.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/Matrix.h
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/unittests/Analysis/Presburger/MatrixTest.cpp
Log Message:
-----------
[MLIR][Presburger] Implement Matrix::moveColumns (#68362)
Commit: 01ddc0edf9f525af2e4a4c63bd3ef9484d82db4c
https://github.com/llvm/llvm-project/commit/01ddc0edf9f525af2e4a4c63bd3ef9484d82db4c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M README.md
Log Message:
-----------
Add OpenSSF Best Practice Badge (#77398)
This tracks our progress implementing the OpenSSF Best Practices for
LLVM.
Commit: 850f713e80426f1706c0d3dad143c330ca872d5d
https://github.com/llvm/llvm-project/commit/850f713e80426f1706c0d3dad143c330ca872d5d
Author: Abhinav271828 <71174780+Abhinav271828 at users.noreply.github.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/Barvinok.h
M mlir/include/mlir/Analysis/Presburger/QuasiPolynomial.h
M mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/QuasiPolynomial.cpp
M mlir/unittests/Analysis/Presburger/BarvinokTest.cpp
Log Message:
-----------
[MLIR][Presburger] Helper functions to compute the constant term of a generating function (#77819)
We implement two functions that are needed to compute the constant term
of a GF.
One finds a vector not orthogonal to all the non-null vectors in a given
set.
One computes the coefficient of any term in an arbitrary rational
function (quotient of two polynomials).
Commit: 9c33a2e9a3202c9e04bd359df14708ad2fa45387
https://github.com/llvm/llvm-project/commit/9c33a2e9a3202c9e04bd359df14708ad2fa45387
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M mlir/lib/Analysis/Presburger/Barvinok.cpp
Log Message:
-----------
[MLIR][Presburger] Fold loop into assert
This way it doesn't trigger -Wunused-variable when assertions are disabled.
Commit: 60ac394dc9ed617f802b33c3b9ac8881ca6a940c
https://github.com/llvm/llvm-project/commit/60ac394dc9ed617f802b33c3b9ac8881ca6a940c
Author: Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M libcxx/include/string
A libcxx/test/libcxx/containers/strings/basic.string/asan.pass.cpp
A libcxx/test/libcxx/containers/strings/basic.string/asan_turning_off.pass.cpp
M libcxx/test/support/asan_testing.h
Log Message:
-----------
[ASan][libc++] Annotating `std::basic_string` with all allocators (#75845)
This commit turns on ASan annotations in `std::basic_string` for all
allocators by default.
Originally suggested here: https://reviews.llvm.org/D146214
String annotations added here:
https://github.com/llvm/llvm-project/pull/72677
This commit is part of our efforts to support container annotations with
(almost) every allocator. Annotating `std::basic_string` with default
allocator is implemented in
https://github.com/llvm/llvm-project/pull/72677.
Additionally it removes `__begin != nullptr` because `data()` should
never return a nullptr.
Support in ASan API exists since
https://github.com/llvm/llvm-project/commit/1c5ad6d2c01294a0decde43a88e9c27d7437d157.
This patch removes the check in std::basic_string annotation member
function (__annotate_contiguous_container) to support different
allocators.
You can turn off annotations for a specific allocator based on changes
from
https://github.com/llvm/llvm-project/commit/2fa1bec7a20bb23f2e6620085adb257dafaa3be0.
The motivation for a research and those changes was a bug, found by
Trail of Bits, in a real code where an out-of-bounds read could happen
as two strings were compared via a call to `std::equal` that took
`iter1_begin`, `iter1_end`, `iter2_begin` iterators (with a custom
comparison function). When object `iter1` was longer than `iter2`, read
out-of-bounds on `iter2` could happen. Container sanitization would
detect it.
If you have any questions, please email:
- advenam.tacet at trailofbits.com
- disconnect3d at trailofbits.com
Commit: e9df6fec59b3ea9bc7f66236bc94517bcb00f15a
https://github.com/llvm/llvm-project/commit/e9df6fec59b3ea9bc7f66236bc94517bcb00f15a
Author: Fรฉlix-Antoine Constantin <60141446+felix642 at users.noreply.github.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ImplicitWideningOfMultiplicationResultCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-array-subscript-expression.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-int.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-pointer-offset.cpp
Log Message:
-----------
[clang-tidy]ย Invalid Fix-It generated for implicit-widening-multiplication-result (#76315)
The check currently emits warnings for the following code:
`uint64_t fn() { return 1024 * 1024; }`
But the code generated after applying the notes will look like this:
`uint64_t fn() { return static_cast<uint64_t>(1024 * )1024; }`
This is because when generating the notes the check will use the
beginLoc() and EndLoc() of the subexpr of the implicit cast.
But in some cases the AST Node might not have a beginLoc and EndLoc.
This seems to be true when the Node is composed of only 1 token (for
example an integer literal). Calling the getEndLoc() on this type of
node will simply return the known location which is, in this case, the
beginLoc.
Fixes #63070 #56728
Commit: 3f21253ddd9f74d68f0b822bc2aac79b17f26787
https://github.com/llvm/llvm-project/commit/3f21253ddd9f74d68f0b822bc2aac79b17f26787
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
Log Message:
-----------
[libc++][NFC] Release notes: fixed formatting (#78058)
Co-authored-by: Zingam <zingam at outlook.com>
Commit: 270c6cbda2acf1f60891e10667af6d9741b62009
https://github.com/llvm/llvm-project/commit/270c6cbda2acf1f60891e10667af6d9741b62009
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M libcxx/docs/index.rst
Log Message:
-----------
[libc++][doc] Bump required GCC version.
GCC 13 is the latest GCC release and tested in the libc++ CI for several
month. According to our policy we only support the latest version,
update the documentation to the latest version.
Commit: 253d2f931e530f6fbc12bc8646e70ed7090baf20
https://github.com/llvm/llvm-project/commit/253d2f931e530f6fbc12bc8646e70ed7090baf20
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/cast_ptr.ll
Log Message:
-----------
Revert "[InstCombine] Fold `icmp pred (inttoptr X), (inttoptr Y) -> icmp pred X, Y`" (#78023)
Reverts llvm/llvm-project#77832
To fix https://lab.llvm.org/buildbot/#/builders/236/builds/8673
Also truncation to shorter type looks incorrect.
Issue for tracking #78024 .
Commit: d8cd55414f79c44065753c38d1b5ad5b91e02df9
https://github.com/llvm/llvm-project/commit/d8cd55414f79c44065753c38d1b5ad5b91e02df9
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr13xx.cpp
M clang/test/CXX/drs/dr15xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add test for CWG1350 (#78040)
Test is based on [P0136R1](https://wg21.link/p0136r1) wording instead of proposed resolution in the issue itself.
This patch also expands related CWG1573 test with an additional test case. Existing `3.9` status of 1573 is still relevant even with this new test case.
Commit: 91b53a2c791c65e17aa80dce7c357ff705d3fd4e
https://github.com/llvm/llvm-project/commit/91b53a2c791c65e17aa80dce7c357ff705d3fd4e
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr13xx.cpp
M clang/test/CXX/drs/dr18xx.cpp
A clang/test/CXX/drs/dr2335.cpp
M clang/test/CXX/drs/dr23xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add tests for DRs about complete-class context (#77444)
[P1787](https://wg21.link/p1787): The intent for CWG2335 (contra those of the older CWG1890, CWG1626, CWG1255, and CWG287) is supported by retaining the unrestricted forward lookup in complete-class contexts (despite current implementation behavior for non-templates).
Wording: The declaration set is the result of a single search in the scope of C for N from immediately after the class-specifier of C if P is in a complete-class context of C or from P otherwise. [Drafting note: The plan for CWG2335 is to describe forbidden dependency cycles among the complete-class contexts of a class. โ end drafting note] ([class.member.lookup]/4)
Complete-class context is described in [class.mem.general] [p7](http://eel.is/c++draft/class#mem.general-7) and
[p8](http://eel.is/c++draft/class#mem.general-8). In this patch I add tests only for CWG issues that fall under current definition of complete-class context, because I'm not sure how CWG1255 and CWG287 are going to work. That's why I skip over them, but mark CWG1308 as superseded by CWG1330.
Commit: d871f40deb7a7e6286b6d6b4476f6d30e444075e
https://github.com/llvm/llvm-project/commit/d871f40deb7a7e6286b6d6b4476f6d30e444075e
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp
M llvm/test/CodeGen/WebAssembly/cfg-stackify-dbg-skip.ll
M llvm/test/DebugInfo/WebAssembly/dbg-value-move-clone.mir
M llvm/test/DebugInfo/WebAssembly/dbg-value-reg-stackify.mir
Log Message:
-----------
[WebAssembly] Use DebugValueManager only when subprogram exists (#77978)
We previously scanned the whole BB for `DBG_VALUE` instruction even when
the program doesn't have debug info, i.e., the function doesn't have a
subprogram associated with it, which can make compilation unnecessarily
slow. This disables `DebugValueManager` when a `DISubprogram` doesn't
exist for a function.
This only reduces unnecessary work in non-debug mode and does not change
output, so it's hard to add a test to test this behavior.
Test changes were necessary because their `DISubprogram`s were not
correctly linked with the functions, so with this PR the compiler
incorrectly assumed the functions didn't have a subprogram and the tests
started to fail.
Fixes https://github.com/emscripten-core/emscripten/issues/21048.
Commit: 21b2f305c90c99066ce251e7c63b411bf1a9e765
https://github.com/llvm/llvm-project/commit/21b2f305c90c99066ce251e7c63b411bf1a9e765
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr0xx.cpp
M clang/test/CXX/drs/dr1xx.cpp
M clang/test/CXX/drs/dr26xx.cpp
M clang/test/CXX/drs/dr2xx.cpp
M clang/test/CXX/drs/dr3xx.cpp
M clang/test/CXX/drs/dr4xx.cpp
M clang/test/CXX/drs/dr6xx.cpp
Log Message:
-----------
[clang][NFC] Improve formatting in C++ DR tests
Refactoring started in https://github.com/llvm/llvm-project/pull/73879 has unfortunately missed to add indentation to `expected-note` directives. This patch is a follow-up to that refactoring.
Commit: 5295ca1a8e5844b44d6b4140ea46405301e9c63f
https://github.com/llvm/llvm-project/commit/5295ca1a8e5844b44d6b4140ea46405301e9c63f
Author: Danny Mรถsch <danny.moesch at icloud.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/SimplifyBooleanExprCheck.cpp
M clang-tools-extra/clang-tidy/readability/SimplifyBooleanExprCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/simplify-boolean-expr-macros.cpp
Log Message:
-----------
[clang-tidy] Add option to ignore macros in `readability-simplify-boolean-expr` check (#78043)
Commit: 0e93d04001e45f39cabf0ffb5093512a7f622cc0
https://github.com/llvm/llvm-project/commit/0e93d04001e45f39cabf0ffb5093512a7f622cc0
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang/docs/UsersManual.rst
Log Message:
-----------
[AVX10][Doc] Add documentation about AVX10 options and their attentions (#77925)
Commit: 96f14ea61847da9b89732cd86ff2ba5ceac252d3
https://github.com/llvm/llvm-project/commit/96f14ea61847da9b89732cd86ff2ba5ceac252d3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
M llvm/lib/TextAPI/RecordsSlice.cpp
Log Message:
-----------
[llvm] Use range-based for loops with llvm::drop_begin (NFC)
Commit: b5d6ea4d8b195558f1b79970368b185d232754d9
https://github.com/llvm/llvm-project/commit/b5d6ea4d8b195558f1b79970368b185d232754d9
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/FormatVariadic.cpp
M llvm/lib/Support/VersionTuple.cpp
Log Message:
-----------
[Support] Use StringRef::consume_front (NFC)
Commit: e4a6be0fc0b8dcc57c555baa6dea0097c5fb0f7b
https://github.com/llvm/llvm-project/commit/e4a6be0fc0b8dcc57c555baa6dea0097c5fb0f7b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-13 (Sat, 13 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Log Message:
-----------
[CodeGen] Use getConstantOperandVal (NFC)
Commit: 49138d97c0d8a6d1c6935da414a1f3fea839263b
https://github.com/llvm/llvm-project/commit/49138d97c0d8a6d1c6935da414a1f3fea839263b
Author: Nicholas Mosier <nmosier at stanford.edu>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/test/CodeGen/X86/speculative-load-hardening.ll
Log Message:
-----------
[X86] Fix SLH crash on llvm.eh.sjlh.longjmp (#77959)
Fix #60081.
Commit: c0cb80338f7fe7c6041350481eb3abc28dc28447
https://github.com/llvm/llvm-project/commit/c0cb80338f7fe7c6041350481eb3abc28dc28447
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Globals.cpp
Log Message:
-----------
[IR] Use StringRef::consume_front (NFC)
Commit: fd358997b3e6f0400b9d4570d5075d729f11484f
https://github.com/llvm/llvm-project/commit/fd358997b3e6f0400b9d4570d5075d729f11484f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/lib/IR/Dominators.cpp
M llvm/lib/IR/StructuralHash.cpp
Log Message:
-----------
[IR] Use range-based for loops (NFC)
Commit: 7528cf5ef23e392110e8d58ac2ccf7610123d889
https://github.com/llvm/llvm-project/commit/7528cf5ef23e392110e8d58ac2ccf7610123d889
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Log Message:
-----------
[Target] Use getConstantOperandVal (NFC)
Commit: b0aebbd41a19045baa80aef3d269514be24f9fde
https://github.com/llvm/llvm-project/commit/b0aebbd41a19045baa80aef3d269514be24f9fde
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
Log Message:
-----------
[mlir][ArmSME] Workaround for old versions of GCC (NFC) (#78046)
See:
https://github.com/llvm/llvm-project/pull/76086#issuecomment-1890424955
Commit: d3ac676ea4d87142ff43f5a64cda1ad181b3ad47
https://github.com/llvm/llvm-project/commit/d3ac676ea4d87142ff43f5a64cda1ad181b3ad47
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang/test/Format/clang-format-ignore.cpp
Log Message:
-----------
[clang-format][NFC] Use FileCheck for clang-format-ignore lit test (#77977)
Commit: 356c2c2399e1041439af817e3e179aa35361502e
https://github.com/llvm/llvm-project/commit/356c2c2399e1041439af817e3e179aa35361502e
Author: Da-Viper <57949090+Da-Viper at users.noreply.github.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
M clang-tools-extra/clang-tidy/performance/NoexceptSwapCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/exception-escape.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/noexcept-swap.cpp
Log Message:
-----------
Fix #75686: add iter_swap and iter_move to the matched name (#76117)
Added support for iter_swap, iter_move in bugprone-exception-escape
and performance-noexcept-swap checks.
Fixes #75686
Commit: db17a3f69fab16d45d08243b3e711940b6ae3b0d
https://github.com/llvm/llvm-project/commit/db17a3f69fab16d45d08243b3e711940b6ae3b0d
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy][DOC] Fix some speling mistakes in release notes
Reorder checks & fix some formating.
Commit: 785167070982a75d1b123fbbf0917cc457846ec1
https://github.com/llvm/llvm-project/commit/785167070982a75d1b123fbbf0917cc457846ec1
Author: Jie Fu (ๅ
ๆฐ) <jiefu at tencent.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang/tools/libclang/linker-script-to-export-list.py
Log Message:
-----------
[clang] SyntaxWarning: invalid escape sequence '\s' with Python3.12 (#78036)
llvm-project/clang/tools/libclang/linker-script-to-export-list.py:9: SyntaxWarning: invalid escape sequence '\s'
m = re.search("^\s+(clang_[^;]+)", line)
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: 4ed696c34869233362395b78a52191e5c39f8a18
https://github.com/llvm/llvm-project/commit/4ed696c34869233362395b78a52191e5c39f8a18
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M mlir/lib/Transforms/Utils/OneToNTypeConversion.cpp
Log Message:
-----------
[mlir][Transforms] `OneToNTypeConversion.cpp`: Fix invalid IR (#77922)
`buildUnrealizedCast` used to generate invalid
`builtin.unrealized_conversion_cast` ops with zero results. This commit
fixes
`test/Conversion/OneToNTypeConversion/one-to-n-type-conversion.mlir`
when running with `MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`.
```
* Pattern (anonymous namespace)::ConvertMakeTupleOp : 'test.make_tuple -> ()' {
Trying to match "(anonymous namespace)::ConvertMakeTupleOp"
[...]
"(anonymous namespace)::ConvertMakeTupleOp" result 1
} -> success : pattern applied successfully
// *** IR Dump After Pattern Application ***
mlir-asm-printer: Verifying operation: func.func
'builtin.unrealized_conversion_cast' op expected at least one result for cast operation
mlir-asm-printer: 'func.func' failed to verify and will be printed in generic form
"func.func"() <{function_type = (i1, i2) -> (i1, i2), sym_name = "pack_unpack"}> ({
^bb0(%arg0: i1, %arg1: i2):
%0 = "test.make_tuple"() : () -> tuple<>
"builtin.unrealized_conversion_cast"(%0) {"__one-to-n-type-conversion_cast-kind__" = "target"} : (tuple<>) -> ()
[...]
}) : () -> ()
within split at /usr/local/google/home/springerm/mlir_public/llvm-project/mlir/test/Conversion/OneToNTypeConversion/one-to-n-type-conversion.mlir:1 offset :20:8: error: 'builtin.unrealized_conversion_cast' op expected at least one result for cast operation
%0 = "test.make_tuple"() : () -> tuple<>
^
within split at /usr/local/google/home/springerm/mlir_public/llvm-project/mlir/test/Conversion/OneToNTypeConversion/one-to-n-type-conversion.mlir:1 offset :20:8: note: see current operation: "builtin.unrealized_conversion_cast"(%0) {"__one-to-n-type-conversion_cast-kind__" = "target"} : (tuple<>) -> ()
LLVM ERROR: IR failed to verify after pattern application
```
Commit: 777a67b2d9fbf9a871d8951e6e7fd0f9f16ea54b
https://github.com/llvm/llvm-project/commit/777a67b2d9fbf9a871d8951e6e7fd0f9f16ea54b
Author: Shahid Iqbal <150978350+shahidiqbal13 at users.noreply.github.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/DOTGraphTraitsPass.h
Log Message:
-----------
PR#72453 : Exceeding maximum file name length (#72654)
Commit: fb2cc9b9fc5ae5a544e3009ae153f5ae83c5a89c
https://github.com/llvm/llvm-project/commit/fb2cc9b9fc5ae5a544e3009ae153f5ae83c5a89c
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/DOTGraphTraitsPass.h
Log Message:
-----------
[Analysis] 'static' function 'shortenFileName' should be declared 'static inline' (NFC)
llvm-project/llvm/include/llvm/Analysis/DOTGraphTraitsPass.h:89:13:
error: 'static' function 'shortenFileName' declared in header file should be declared 'static inline' [-Werror,-Wunneeded-internal-declaration]
static void shortenFileName(std::string &FN, unsigned char len = 250) {
Commit: 59e79f0de59d9e4576b6bf562de40a914702efd4
https://github.com/llvm/llvm-project/commit/59e79f0de59d9e4576b6bf562de40a914702efd4
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/RedundantMemberInitCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-member-init.cpp
Log Message:
-----------
[clang-tidy] Add support for in-class initializers in readability-redundant-member-init (#77206)
Support detecting redundant in-class initializers.
Moved from https://reviews.llvm.org/D157262
Fixes: #62525
Commit: 7f1d757fb40f06cc1c6b134d770987b340286996
https://github.com/llvm/llvm-project/commit/7f1d757fb40f06cc1c6b134d770987b340286996
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ContainerSizeEmptyCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/container-size-empty.cpp
Log Message:
-----------
[clang-tidy] Fix false-positives in readability-container-size-empty (#74140)
Added support for size-like method returning signed type, and corrected
false positive caused by always-false check for size bellow zero.
Closes #72619
Commit: 60a9874f54922a0fd9bfca9a028c32473f7ef85f
https://github.com/llvm/llvm-project/commit/60a9874f54922a0fd9bfca9a028c32473f7ef85f
Author: rmarker <37921131+rmarker at users.noreply.github.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Add PenaltyBreakScopeResolution option. (#78015)
Resolves #78014
Commit: 2ae795d3d65ec584865491af7e6ab16b8d22acef
https://github.com/llvm/llvm-project/commit/2ae795d3d65ec584865491af7e6ab16b8d22acef
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
Log Message:
-----------
[LV] Add test case where variable induction step needs truncating.
Commit: bc27f3573d61012771aa3fee2427f0dd5b8a1288
https://github.com/llvm/llvm-project/commit/bc27f3573d61012771aa3fee2427f0dd5b8a1288
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/GlobList.cpp
Log Message:
-----------
[clang-tidy] Use StringRef::consume_front (NFC)
Commit: 10b1c29e396ffb83b0da989740382d5db14fcd9c
https://github.com/llvm/llvm-project/commit/10b1c29e396ffb83b0da989740382d5db14fcd9c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
Log Message:
-----------
[CodeGen] Use a range-based for loop (NFC)
Commit: 21edd381e403079baa2d01754e3d3ae7b3469932
https://github.com/llvm/llvm-project/commit/21edd381e403079baa2d01754e3d3ae7b3469932
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
Log Message:
-----------
[clang-doc] Use SmallString::operator std::string (NFC)
Commit: bddd8f46f81477a52ff7ef2873e5671db71c431e
https://github.com/llvm/llvm-project/commit/bddd8f46f81477a52ff7ef2873e5671db71c431e
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M libcxx/include/__concepts/arithmetic.h
A libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_integer.compile.pass.cpp
A libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_signed_integer.compile.pass.cpp
A libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_unsigned_integer.compile.pass.cpp
Log Message:
-----------
[libc++][concepts] Implements concept helper `__libcpp_integer` (#78086)
...and tests.
---------
Co-authored-by: Zingam <zingam at outlook.com>
Commit: 510ec2079e8fe9d6705466ecfbd3e91f5798998a
https://github.com/llvm/llvm-project/commit/510ec2079e8fe9d6705466ecfbd3e91f5798998a
Author: Yuanqiang Liu <liuyuanqiang.yqliu at bytedance.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M mlir/lib/Pass/IRPrinting.cpp
Log Message:
-----------
[mlir] fix IRPrinterInstrumentation to use the user-provided IRPrinting config (#70023)
Commit: 7c773558ca43c03163f1df5deae7537f1f789cb5
https://github.com/llvm/llvm-project/commit/7c773558ca43c03163f1df5deae7537f1f789cb5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
Log Message:
-----------
[RISCV] Combine repeated calls to MachineFunction::getSubtarget. NFC
Commit: 332be179e13df924971f752236f5cf3c6483b588
https://github.com/llvm/llvm-project/commit/332be179e13df924971f752236f5cf3c6483b588
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion-allow-in-conditions.cpp
Log Message:
-----------
[clang-tidy]fix readability-implicit-bool-conversion false-positives when comparison bool bitfield (#77878)
Fixes: #76817
For ignoring comparison and xor operator, it needs
to use `ImplicitCastFromBool` without ignoring
exception cases.
This patch splits ignoring exception cases logic
from `ImplicitCastFromBool` and only applies
it during matching targeted AST.
Commit: 2e0a105761cd33e42b915da5aab35c966daf8241
https://github.com/llvm/llvm-project/commit/2e0a105761cd33e42b915da5aab35c966daf8241
Author: Brad Smith <brad at comstyle.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/lib/Support/CMakeLists.txt
M llvm/tools/llvm-jitlink/CMakeLists.txt
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/CMakeLists.txt
Log Message:
-----------
[CMake] Fix building on Haiku and Solaris after c0d5d36dda04cdd409aabc015da0beb810842fcd (#78084)
Haiku and Solaris need some additional libraries after the commit
c0d5d36dda04cdd409aabc015da0beb810842fcd
Otherwise fails to link a whole bunch of the tools and other binaries
with undefined symbols with accept() and connect().
I did a static and dynamic build on illumos and a dynamic build on
Haiku.
```
-DLLVM_ENABLE_PROJECTS='clang;clang-tools-extra;lld;mlir'
```
and on illumos
```
-DLLVM_ENABLE_RUNTIMES='openmp'
```
Commit: a1eaed7a21e1cc750e78420f298514edee1cb1ad
https://github.com/llvm/llvm-project/commit/a1eaed7a21e1cc750e78420f298514edee1cb1ad
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/Dialect/GPU/ops.mlir
Log Message:
-----------
[mlir][gpu] Fix GPU YieldOP format and traits (#78006)
This patch adds assembly format to `gpu::YieldOp`. It also adds the
return like trait, to make it compatible with `RegionBranchOpInterface`.
Commit: 48e8cd83453ec02e6d6c9f501990bc7ef99a35e8
https://github.com/llvm/llvm-project/commit/48e8cd83453ec02e6d6c9f501990bc7ef99a35e8
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
A mlir/test/mlir-cpu-runner/global-constructors.mlir
Log Message:
-----------
[mlir][ExecutionEngine] Add support for global constructors and destructors (#78070)
This patch add support for executing global constructors and destructors
in the `ExecutionEngine`.
Commit: e3acfbc471ac74425c2a4b54546b322b42c4cf00
https://github.com/llvm/llvm-project/commit/e3acfbc471ac74425c2a4b54546b322b42c4cf00
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/unittests/Format/FormatTestCSharp.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
Log Message:
-----------
[clang-format] Stop aligning the to continuation lines (#76378)
Some unwrapped lines are marked as continuations of the previous lines,
for example the ports in a Verilog module header. Previously, if the
first line following the ports line was changed, and git-clang-format
was run, the changed line would be indented by an extra continuation
indentation.
Commit: 85071a3c74f531ade3709351638c1380c4503d2c
https://github.com/llvm/llvm-project/commit/85071a3c74f531ade3709351638c1380c4503d2c
Author: Qiu Chaofan <qiucofan at cn.ibm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/lib/Basic/Targets/PPC.cpp
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
A llvm/test/CodeGen/PowerPC/fence.ll
Log Message:
-----------
[PowerPC] Implement fence builtin (#76495)
Commit: c07a1fe7b448a7af72b931440be02bd9d2551138
https://github.com/llvm/llvm-project/commit/c07a1fe7b448a7af72b931440be02bd9d2551138
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll
Log Message:
-----------
[RISCV] Lower vfmv.s.f intrinsics to VFMV_S_F_VL first (#76699)
Currently vfmv.s.f intrinsics are directly selected to their pseudos via
a
tablegen pattern in RISCVInstrInfoVPseudos.td, whereas the other move
instructions (vmv.s.x/vmv.v.x/vmv.v.f etc.) first get lowered to their
corresponding VL SDNode, then get selected from a pattern in
RISCVInstrInfoVVLPatterns.td
This patch brings vfmv.s.f inline with the other move instructions.
Split out from #71501, where we did this to preserve the behaviour of
selecting
vmv_s_x for VFMV_S_F_VL for small enough immediates.
Commit: 148e55c2302fecf4e2e951e9a806d7c4b45cc733
https://github.com/llvm/llvm-project/commit/148e55c2302fecf4e2e951e9a806d7c4b45cc733
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-14 (Sun, 14 Jan 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
Log Message:
-----------
[RISCV] Add sifive-p450 to release notes. NFC
Commit: fa5255eee22bf9b0368f6b980adb050b114d9cbd
https://github.com/llvm/llvm-project/commit/fa5255eee22bf9b0368f6b980adb050b114d9cbd
Author: Christian Ulmann <christianulmann at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugFoundation.cpp
M flang/test/Transforms/debug-line-table.fir
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
[MLIR][LLVM] Enable export of DISubprograms on function declarations (#78026)
This commit changes the MLIR to LLVMIR export to also attach subprogram
debug attachements to function declarations.
This commit additonally fixes the two passes that produce subprograms to
not attach the "Definition" flag to function declarations. This
otherwise results in invalid LLVM IR.
Commit: 0cf768e7f12dfb581fbae40a3b9b77f6c4533c29
https://github.com/llvm/llvm-project/commit/0cf768e7f12dfb581fbae40a3b9b77f6c4533c29
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
Log Message:
-----------
[RISCV] Handle disjoint or in RISCVGatherScatterLowering (#77800)
This patch adds support for the disjoint flag in the non-recursive case,
as well as adding an additional check for it in the recursive case. Note
that haveNoCommonBitsSet should be equivalent to having the disjoint
flag set, and the check can be removed in a follow-up patch.
Co-authored-by: Philip Reames <preames at rivosinc.com>
---------
Co-authored-by: Philip Reames <preames at rivosinc.com>
Commit: e040252b545229041d0e51d397acd333936c5b42
https://github.com/llvm/llvm-project/commit/e040252b545229041d0e51d397acd333936c5b42
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][Bazel] Add missing dependency needed after a1eaed7a21e1cc750e78420f298514edee1cb1ad
Commit: 3b7abf38fb934324ca38bc741ea59266a9c4e130
https://github.com/llvm/llvm-project/commit/3b7abf38fb934324ca38bc741ea59266a9c4e130
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
Log Message:
-----------
[RISCV] Add disjoint flag to or ops in RISCVGatherScatterLowering tests. NFC
InstCombine will add the disjoint flag to these or instructions. This patch
adds them to the tests so that it matches the input RISCVGatherScatterLowering
will receive in practice, allowing us to rely on said disjoint flag:
https://github.com/llvm/llvm-project/pull/77800#discussion_r1449231844
Commit: cd1d3445d8a53ef4d667908f0539eda37345defa
https://github.com/llvm/llvm-project/commit/cd1d3445d8a53ef4d667908f0539eda37345defa
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
Log Message:
-----------
[RISCV] Don't check haveNoCommonBitsSet in RISCVGatherScatterLowering
If an or instruction has no common bits set in its operands, InstCombine will
set the disjoint flag. This means we shouldn't need to compute it ourselves
anymore in RISCVGatherScatterLowering, and can just rely on said flag being
set.
Originally split out from #77800
Commit: ce1f9465b0ee86571955769e47640f2d271ef2a7
https://github.com/llvm/llvm-project/commit/ce1f9465b0ee86571955769e47640f2d271ef2a7
Author: Qiu Chaofan <qiucofan at cn.ibm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/ppcsoftops.ll
Log Message:
-----------
[NFC] Pre-commit case of ppcf128 extractelt soften
Commit: 844f8335f211da19ae4b375761013909a3394d9a
https://github.com/llvm/llvm-project/commit/844f8335f211da19ae4b375761013909a3394d9a
Author: Jonas Hahnfeld <jonas.hahnfeld at cern.ch>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
A clang/test/Modules/pr68702.cpp
Log Message:
-----------
Fix crash with modules and constexpr destructor (#69076)
With modules, serialization might omit the outer ExprWithCleanups
as it calls ParmVarDecl::getDefaultArg(). Complementary to fixing
this in a separate change, make the code more robust by adding a
FullExpressionRAII and avoid the llvm_unreachable in the added test
clang/test/Modules/pr68702.cpp.
Closes https://github.com/llvm/llvm-project/issues/68702
Commit: 0cb024b357aff294b1ba0f9d3de8f48ab684962b
https://github.com/llvm/llvm-project/commit/0cb024b357aff294b1ba0f9d3de8f48ab684962b
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
Log Message:
-----------
[mlir][Mesh] Fix invalid IR in rewrite pattern (#78094)
This commit fixes `test/Dialect/Mesh/folding.mlir` when running with
`MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`.
```
/usr/local/google/home/springerm/mlir_public/llvm-project/mlir/test/Dialect/Mesh/folding.mlir:19:10: error: Unexpected number of results 0. Expected 2.
%0:2 = mesh.cluster_shape @mesh1 : index, index
^
/usr/local/google/home/springerm/mlir_public/llvm-project/mlir/test/Dialect/Mesh/folding.mlir:19:10: note: see current operation: "mesh.cluster_shape"() <{axes = array<i16>, mesh = @mesh1}> : () -> ()
mlir-asm-printer: Verifying operation: builtin.module
Unexpected number of results 0. Expected 2.
mlir-asm-printer: 'builtin.module' failed to verify and will be printed in generic form
"builtin.module"() ({
"mesh.cluster"() <{dim_sizes = array<i64: 2, 3>, rank = 2 : i64, sym_name = "mesh1"}> : () -> ()
"func.func"() <{function_type = () -> (index, index), sym_name = "cluster_shape_op_folding_all_axes_static_mesh"}> ({
%0 = "arith.constant"() <{value = 2 : index}> : () -> index
%1 = "arith.constant"() <{value = 3 : index}> : () -> index
"mesh.cluster_shape"() <{axes = array<i16>, mesh = @mesh1}> : () -> ()
%2:2 = "mesh.cluster_shape"() <{axes = array<i16>, mesh = @mesh1}> : () -> (index, index)
"func.return"(%0, %1) : (index, index) -> ()
}) : () -> ()
}) : () -> ()
LLVM ERROR: IR failed to verify after pattern application
```
If `axes` is empty, the op verifier assumes that all dimensions are
queried. (Expected 2 results.)
Commit: 08e4386a2c91befabab317498b50ffc326ff4eae
https://github.com/llvm/llvm-project/commit/08e4386a2c91befabab317498b50ffc326ff4eae
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/test/Fir/boxproc-2.fir
Log Message:
-----------
[flang][fir] update block argument types in boxed-procedure pass (#77914)
The boxed-procedure pass is lowering the fir.boxproc type. Although this
is not common, this types may end-up as block arguments (or be part of
derived type that are block arguments).
Update the pass to update block argument types too.
Commit: c3ced6ac62cdd7c50f2429beb8ab5fc69a1a1a75
https://github.com/llvm/llvm-project/commit/c3ced6ac62cdd7c50f2429beb8ab5fc69a1a1a75
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/IntegralAP.h
M clang/test/AST/Interp/intap.cpp
Log Message:
-----------
[clang][Interp] Implement IntegralAP::{div, rem} (#72614)
Commit: 8cac995eadebbf23b10f8cebc9a42adcf91cc26b
https://github.com/llvm/llvm-project/commit/8cac995eadebbf23b10f8cebc9a42adcf91cc26b
Author: Andrzej Warzyลski <andrzej.warzynski at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/unsupported-vscale-max-min.f90
Log Message:
-----------
[flang][driver] Limit the usage of -mvscale-max and -mvscale-min (#77905)
Make sure that `-mvscale-max` and `-mvscale-min` are only available for
targets that are known to support vscale and scalable vectors.
Also fix capitalization of function variables.
Commit: c4b591a10f2f604291da14aea7983a5fa7837ce8
https://github.com/llvm/llvm-project/commit/c4b591a10f2f604291da14aea7983a5fa7837ce8
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Frontend/FrontendActions.cpp
M flang/test/Lower/RISCV/riscv-vector-bits-vscale-range.f90
Log Message:
-----------
[Flang][RISCV] Set vscale_range based off zvl*b (#77277)
This patch implements the logic (for now, copied from
RISCVTargetInfo::getVScaleRange) so that we can compute the vscale_range
based off of the zvl*b extension, e.g. using an arch with zvl256b now
implies vscale_range(2,1024).
It's worth noting that we don't have to exactly copy the behaviour of
clang with regards to how it interacts with the
-mvscale-min/-mvscale-max flags, but changing it can be left to a future
patch.
This also adds a guard for +sve so that we only check for it on aarch64,
which was the behaviour prior to 898db1136e679
Commit: 9c4cd7971382ecbaf8e1530e381aa54ed23a2b0e
https://github.com/llvm/llvm-project/commit/9c4cd7971382ecbaf8e1530e381aa54ed23a2b0e
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
Log Message:
-----------
[Clang][SME2] Fix PSEL builtin predicates (#77097)
PSEL intrinsics which return a predicate-as-counter are available
in SVE2p1 & SME2.
Commit: 7bc170a261ae0daaddcc1abeacf7e9e0f1f66d02
https://github.com/llvm/llvm-project/commit/7bc170a261ae0daaddcc1abeacf7e9e0f1f66d02
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/pr77995.cppm
Log Message:
-----------
[C++20] [Modules] [Serialization] Don't record '#pragma once' information in named modules
Close https://github.com/llvm/llvm-project/issues/77995
The cause of the issue is that straight forward that we recorded the
'#pragma once' information in named modules, which is an overlook.
I tried to not record the header's information completely within named
modules. But the tests look not happy with some diagnosing problems,
which needs to be looked in details.
Commit: 87bc91d4259c53d98d8c5c6b7c622f65ddb4c62a
https://github.com/llvm/llvm-project/commit/87bc91d4259c53d98d8c5c6b7c622f65ddb4c62a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/pr77748.ll
Log Message:
-----------
[PowerPC] Fix shuffle combine with undef elements (#77787)
This custom DAG combine works on a shuffle where one source vector is a
zero splat, which means we can adjust the shuffle indices to refer to
any element of the splat -- as long as we stay in the same vector.
In the case where an undef (-1) index into the non-splat vector was
used, we ended up adjusting the splat index to -1+NumElements, which
points into the wrong vector.
Fix this by using the first element from the splat if the other one is undef.
There are four cases this theoretically affects, but in practice I only
managed to demonstrate a miscompile with one of them. I think two of
theses are effectively dead due to the operand canonicalization at the
start of the transform.
Fixes https://github.com/llvm/llvm-project/issues/77748.
Commit: 06e3abcb54f339edc2ba757cfa947e024677b21e
https://github.com/llvm/llvm-project/commit/06e3abcb54f339edc2ba757cfa947e024677b21e
Author: martin-luecke <martin.luecke at ed.ac.uk>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/python/mlir/dialects/transform/extras/__init__.py
M mlir/test/python/dialects/transform_extras.py
Log Message:
-----------
[MLIR][transform][python] Introduce abstractions for handles to values and parameters (#77305)
In addition to the existing `OpHandle` which provides an abstraction to
emit transform ops targeting operations this introduces a similar
concept for _values_ and _parameters_ in form of `ValueHandle` and
`ParamHandle`.
New core transform abstractions:
- `constant_param`
- `OpHandle.get_result`
- `OpHandle.print`
- `ValueHandle.get_defining_op`
Commit: 8e7f073eb42c92aa7a2b651ca314d7fcebf296e3
https://github.com/llvm/llvm-project/commit/8e7f073eb42c92aa7a2b651ca314d7fcebf296e3
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/TokenKinds.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/AST/ast-dump-sme-attributes.cpp
M clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_bmop.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fp_dots.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_int_dots.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mop.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sub.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vdot.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_zero_zt.c
M clang/test/Modules/aarch64-sme-keywords.cppm
M clang/test/Parser/c2x-attribute-keywords.c
M clang/test/Parser/c2x-attribute-keywords.m
M clang/test/Parser/cxx0x-keyword-attributes.cpp
M clang/test/Sema/aarch64-incompat-sm-builtin-calls.c
M clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp
M clang/test/Sema/aarch64-sme-func-attrs.c
M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp
M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_target.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[Clang][AArch64] Change SME attributes for shared/new/preserved state. (#76971)
This patch replaces the `__arm_new_za`, `__arm_shared_za` and
`__arm_preserves_za` attributes in favour of:
* `__arm_new("za")`
* `__arm_in("za")`
* `__arm_out("za")`
* `__arm_inout("za")`
* `__arm_preserves("za")`
As described in https://github.com/ARM-software/acle/pull/276.
One change is that `__arm_in/out/inout/preserves(S)` are all mutually
exclusive, whereas previously it was fine to write `__arm_shared_za
__arm_preserves_za`. This case is now represented with `__arm_in("za")`.
The current implementation uses the same LLVM attributes under the hood,
since `__arm_in/out/inout` are all variations of "shared ZA", so can use
the existing `aarch64_pstate_za_shared` attribute in LLVM.
#77941 will add support for the new "zt0" state as introduced
with SME2.
Commit: f9e67da4bf68796cd9d3419a16753c2ee4a2340c
https://github.com/llvm/llvm-project/commit/f9e67da4bf68796cd9d3419a16753c2ee4a2340c
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrShiftRotate.td
Log Message:
-----------
[X86][NFC] Simplify the definitions of shift instructions
Commit: b61e5b08446c235127ccf98df70585df232c681b
https://github.com/llvm/llvm-project/commit/b61e5b08446c235127ccf98df70585df232c681b
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU][NFC] Add GFX numbers to DefaultComponent feature (#77894)
Commit: 3dff20cfa27e0988840d5d13a169482269aa4fa5
https://github.com/llvm/llvm-project/commit/3dff20cfa27e0988840d5d13a169482269aa4fa5
Author: mlevesquedion <mlevesquedion at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/tools/mlir-tblgen/DialectGen.cpp
M mlir/tools/mlir-tblgen/PassGen.cpp
Log Message:
-----------
[mlir] Reformat whitespace in dependent dialects codegen (#78090)
The generated code for dependent dialects is awkwardly formatted, making
the code harder to read. This change reformats the whitespace to align
code in its context and avoid unnecessary empty lines.
Also included are some typo fixes.
Below are examples of the codegen for a dialect before and after the
change.
Before:
```
GPUDialect::GPUDialect(::mlir::MLIRContext *context)
: ::mlir::Dialect(getDialectNamespace(), context, ::mlir::TypeID::get<GPUDialect>()) {
getContext()->loadDialect<arith::ArithDialect>();
initialize();
}
```
After:
```
GPUDialect::GPUDialect(::mlir::MLIRContext *context)
: ::mlir::Dialect(getDialectNamespace(), context, ::mlir::TypeID::get<GPUDialect>()) {
getContext()->loadDialect<arith::ArithDialect>();
initialize();
}
```
Below are examples of the codegen for a pass before and after the
change.
Before:
```
/// Return the dialect that must be loaded in the context before this pass.
void getDependentDialects(::mlir::DialectRegistry ®istry) const override {
registry.insert<func::FuncDialect>();
registry.insert<tensor::TensorDialect>();
registry.insert<tosa::TosaDialect>();
}
```
After:
```
/// Register the dialects that must be loaded in the context before this pass.
void getDependentDialects(::mlir::DialectRegistry ®istry) const override {
registry.insert<func::FuncDialect>();
registry.insert<tensor::TensorDialect>();
registry.insert<tosa::TosaDialect>();
}
```
Commit: 8e21557d0401a0046ff110daa50f21d02b71a2ee
https://github.com/llvm/llvm-project/commit/8e21557d0401a0046ff110daa50f21d02b71a2ee
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
A clang-tools-extra/clang-tidy/readability/AvoidNestedConditionalOperatorCheck.cpp
A clang-tools-extra/clang-tidy/readability/AvoidNestedConditionalOperatorCheck.h
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/avoid-nested-conditional-operator.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/avoid-nested-conditional-operator.cpp
Log Message:
-----------
[clang-tidy]Add new check readability-avoid-nested-conditional-operator (#78022)
Finds nested conditional operator.
Nested conditional operators lead code hard to understand, so they
should be splited as several statement and stored in temporary varibale.
Commit: 019ffbf32469b6fd2e75efc154d9480d00b593bd
https://github.com/llvm/llvm-project/commit/019ffbf32469b6fd2e75efc154d9480d00b593bd
Author: XChy <xxs_chy at outlook.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
Log Message:
-----------
[DFAJumpThreading] Extends the bitwidth of state from uint64_t to APInt (#78134)
Fixes #78059
Commit: 0e1037edbf790478358eb11b373d356aefdbc7a6
https://github.com/llvm/llvm-project/commit/0e1037edbf790478358eb11b373d356aefdbc7a6
Author: Nathan Gauรซr <brioche at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
A llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll
Log Message:
-----------
[SPIR-V] Strip convergence intrinsics before ISel (#75948)
The structurizer will require the frontend to emit convergence
intrinsics. Once uses to restructurize the control-flow, those
intrinsics shall be removed, as they cannot be converted to
SPIR-V.
This commit adds a new pass to the SPIR-V backend which strips those
intrinsics.
Those 2 new steps are not limited to Vulkan as OpenCL could
also benefit from not crashing if a convertent operation is in
the IR (even though the frontend doesn't generate such intrinsics).
Signed-off-by: Nathan Gauรซr <brioche at google.com>
Commit: 8dd0d95c7c022c05aa5ab519bab6b537714cd0e9
https://github.com/llvm/llvm-project/commit/8dd0d95c7c022c05aa5ab519bab6b537714cd0e9
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
Log Message:
-----------
[mlir][nvgpu] Add `nvgpu.tma.async.store` (#77811)
PR adds `nvgpu.tma.async.store` Op for asynchronous stores using the
Tensor Memory Access (TMA) unit.
It also implements Op lowering to NVVM dialect. The Op currently
performs asynchronous stores of a tile memory region from shared to
global memory for a single CTA.
Commit: a9309e4a168a7f7c1313cc1b488d988cc3b0a8d4
https://github.com/llvm/llvm-project/commit/a9309e4a168a7f7c1313cc1b488d988cc3b0a8d4
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/runtime/execute.cpp
Log Message:
-----------
[flang][runtime] Fix seg fault in intrinsic execute_command_line (#78126)
Fixes #77975
Commit: 826fe84a2cb7dd7e488bc6dc53ce6342f6e17e93
https://github.com/llvm/llvm-project/commit/826fe84a2cb7dd7e488bc6dc53ce6342f6e17e93
Author: Timm Bรคder <tbaeder at redhat.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/records.cpp
Log Message:
-----------
[clang][Interp][NFC] Remove outdated FIXME comment
Virtual desturctors are already supported and tested in
AST/Interp/records.cpp.
Commit: 4056287d3a286da3cbc1b036d626b7b1f4aead24
https://github.com/llvm/llvm-project/commit/4056287d3a286da3cbc1b036d626b7b1f4aead24
Author: David Green <david.green at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
Log Message:
-----------
[Flang] Clean up LoopVersioning LLVM_DEBUG blocks. NFC (#77818)
Just a little trick to put LLVM_DEBUG blocks into separate { } scopes,
so they clang-format better.
Commit: 4c7e4e18fa7aeb2748c714ab7a91621c45e5d8b8
https://github.com/llvm/llvm-project/commit/4c7e4e18fa7aeb2748c714ab7a91621c45e5d8b8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/pow-1.ll
Log Message:
-----------
[InstCombine] pow-1.ll - regenerate checks
Move to using update_test_checks script + cleanup check-prefixes.
Help simplify diff for #68736
Commit: 5e355942cd8e5826394cdeceb140fb6d0a1f9561
https://github.com/llvm/llvm-project/commit/5e355942cd8e5826394cdeceb140fb6d0a1f9561
Author: Balรกzs Kรฉri <balazs.keri at ericsson.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang][ASTImporter] Fix import of variable template redeclarations. (#72841)
In some cases variable templates (specially if static member of record)
were not correctly imported and an assertion "Missing call to
MapImported?" could happen.
Commit: 47c6815ba9fd5d6837074f7bd418221167b1c11c
https://github.com/llvm/llvm-project/commit/47c6815ba9fd5d6837074f7bd418221167b1c11c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
A llvm/test/Analysis/CostModel/AArch64/vec3-ops.ll
Log Message:
-----------
[AArch64] Add costmodel tests for vectors with non-power-of-2 elements.
Extend cost-model test coverage for vectors with non-power-of-2
elements.
Commit: 1fb7c5d5a3cb4a791b92c215821c56b54daf8cd5
https://github.com/llvm/llvm-project/commit/1fb7c5d5a3cb4a791b92c215821c56b54daf8cd5
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
[AMDGPU] Simplify GFX12 FLAT Real instruction definitions. NFC. (#78147)
Use default values for opName and ps arguments to avoid repeating the
instruction name.
Commit: baba0a4cb43181a78881fce683e3a5016daa8ce6
https://github.com/llvm/llvm-project/commit/baba0a4cb43181a78881fce683e3a5016daa8ce6
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Port 8e7f073eb42c92aa7a2b651ca314d7fcebf296e3
Commit: 14268ad2a2ea0b3bbe6b767d67ace1d0ae992a6d
https://github.com/llvm/llvm-project/commit/14268ad2a2ea0b3bbe6b767d67ace1d0ae992a6d
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
Log Message:
-----------
[lldb] Skip part of TestDataFormatterAdv (#72233)
libstdc++ data formatter simply forwards to the `const char *` formatter
-- which means it suffers from the same problem/bug as that one.
Commit: cfa30fa4852275eed0c59b81b5d8088d3e55f778
https://github.com/llvm/llvm-project/commit/cfa30fa4852275eed0c59b81b5d8088d3e55f778
Author: Timm Bรคder <tbaeder at redhat.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/test/SemaCXX/constexpr-ackermann.cpp
M clang/test/SemaCXX/constexpr-default-arg.cpp
M clang/test/SemaCXX/constexpr-late-instantiation.cpp
M clang/test/SemaCXX/constexpr-nqueens.cpp
M clang/test/SemaCXX/constexpr-unsigned-high-bit.cpp
Log Message:
-----------
[clang][test][NFC] Enable more tests with new constexpr interpreter
Commit: 74cb2879ba10dcad7c745ffc4e8ed3092a5c0f15
https://github.com/llvm/llvm-project/commit/74cb2879ba10dcad7c745ffc4e8ed3092a5c0f15
Author: Haydn Trigg <me at haydntrigg.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Support/Windows/Path.inc
Log Message:
-----------
[Support] Windows Filesystem fs::status Conditionally Call GetFileAttributes (#78118)
Rather than conditionally using the output from GetFileAttributesW move
the branch to avoid calling GetFileAttributesW entirely if not required.
This avoids hitting IO an extra time for a small performance
improvement.
Commit: dc01b597baa63cdcd1132d3260f9642cdd37f5a7
https://github.com/llvm/llvm-project/commit/dc01b597baa63cdcd1132d3260f9642cdd37f5a7
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Add support for aligned variants of cluster barriers (#78142)
This patch adds:
* Support for the 'aligned' variants of the cluster barrier Ops, by
extending the existing Op with an 'aligned' attribute.
* Docs for these Ops.
* Test cases to verify the lowering to the corresponding intrinsics.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 5723fce088068cc91cf22e3a3da5700e213ce63e
https://github.com/llvm/llvm-project/commit/5723fce088068cc91cf22e3a3da5700e213ce63e
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[Format] Fix isStartOfName to recognize attributes (#76804)
This addresses a problem with formatting attributes. Some context:
- eaff083035c8 changed `isStartOfName` to fix problems inside
`#pragma`s, but this behavior changed formatting of attribute macros in
an undesirable way.
- efeb546865c233dfa7706ee0316c676de9f69897 changed Google format style
to fix some widely used attributes.
Instead of changing the format style, this commit specializes behavior
introduced in eaff083035c8 to `#pragma`s. This seems to work well in
both cases.
Also update the test with two `GUARDED_BY` directives. While the
formatting after efeb546865c233dfa7706ee0316c676de9f69897 seems better,
this case is rare enough to not warrant the extra complexity. We are
reverting it back to the state it had before
efeb546865c233dfa7706ee0316c676de9f69897.
---------
Co-authored-by: Owen Pan <owenpiano at gmail.com>
Commit: c5a9e354379d29ee763e9982faf57398789c8d5b
https://github.com/llvm/llvm-project/commit/c5a9e354379d29ee763e9982faf57398789c8d5b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/include/flang/Lower/OpenMP.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP] Push genEval calls to individual operations, NFC (#77758)
Introduce `genNestedEvaluations` that will lower all evaluations nested
in the given, accouting for a potential COLLAPSE directive.
Recursive lowering [2/5]
Commit: 3295b88a664405f6e39b8df26f97e68ed1c5ab1f
https://github.com/llvm/llvm-project/commit/3295b88a664405f6e39b8df26f97e68ed1c5ab1f
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
R mlir/test/mlir-cpu-runner/global-constructors.mlir
Log Message:
-----------
Revert "[mlir][ExecutionEngine] Add support for global constructors and destructors" (#78164)
this is causing test failures on AArch64 linux, hitting the
following assert:
# | mlir-cpu-runner: /home/culrho01/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp:519: void llvm::RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &, uint64_t, uint64_t, uint32_t, int64_t): Assertion `isInt<33>(Result) && "overflow check failed for relocation"' failed.
Seeing the same in buildbot as well, e.g.
https://lab.llvm.org/buildbot/#/builders/179/builds/9094/steps/12/logs/FAIL__MLIR__sparse_codegen_dim_mlir
Reverts llvm/llvm-project#78070
Commit: 705d9273c5417e04dc542f0e46b90960c235c753
https://github.com/llvm/llvm-project/commit/705d9273c5417e04dc542f0e46b90960c235c753
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP] Minor cosmetic changes post-PR#77758, NFC
Rename `getCollapsedEval` to `getCollapsedLoopEval`, and move condition
check from `getCollapsedLoopEval` to `genNestedEvaluations` (the only
caller).
Commit: 5ccf19ded09f68bef43275c81c20b0e65f7c0b75
https://github.com/llvm/llvm-project/commit/5ccf19ded09f68bef43275c81c20b0e65f7c0b75
Author: Ties Stuij <ties.stuij at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
Log Message:
-----------
[ARM] add execute-only Armv6-M support to the release notes (#77937)
Commit: 12e425d0cf9bca072c7b2138e50acbc5f1cd818c
https://github.com/llvm/llvm-project/commit/12e425d0cf9bca072c7b2138e50acbc5f1cd818c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Support __real/__imag on primitives (#75485)
Commit: f112cafa1f180f5fcb8fd2fd238c8615872d1329
https://github.com/llvm/llvm-project/commit/f112cafa1f180f5fcb8fd2fd238c8615872d1329
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_undef_bool.c
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
Log Message:
-----------
[Clang] Rename and enable boolean get, set, create and undef for sme2 (#77338)
This patch renames the get, set, create and undef functions that deal
with tuples of booleans to match the ACLE at
https://github.com/ARM-software/acle/pull/257/files . It also enables
them for SME2.
Commit: 48e5b5ea92674ded69b998cf35724d9012c0f57d
https://github.com/llvm/llvm-project/commit/48e5b5ea92674ded69b998cf35724d9012c0f57d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
Log Message:
-----------
[libc++abi] Improve error message when libunwind is missing from LLVM_ENABLE_RUNTIMES (#77991)
This doesn't actually prevent the build from failing, but it provides a
better diagnostic that explains what is needed in order to fix the build.
Fixes #77846
Fixes #77843
Commit: d85df3f2d6e8687c44e6802dcc0e59c14ff32c9b
https://github.com/llvm/llvm-project/commit/d85df3f2d6e8687c44e6802dcc0e59c14ff32c9b
Author: Yusra Syeda <99052248+ysyeda at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGCleanup.h
M clang/lib/CodeGen/CGException.cpp
M clang/test/CodeGenCXX/personality.cpp
Log Message:
-----------
[SystemZ][z/OS] Add support for recognizing z/OS personality function in Clang (#76073)
This PR adds support makes Clang aware of the name of the personality
function on z/OS.
Co-authored-by: Yusra Syeda <yusra.syeda at ibm.com>
Commit: 5df2c00af381326340dd2f75615c4b4222ae6d96
https://github.com/llvm/llvm-project/commit/5df2c00af381326340dd2f75615c4b4222ae6d96
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/test/Dialect/Mesh/canonicalization.mlir
M mlir/test/Dialect/Mesh/folding.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/process-multi-index-op-lowering.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/Mesh/simplifications.mlir
Log Message:
-----------
[mlir][mesh] Remove rank attribute and rename dim_sizes to shape in ClusterOp (#77838)
Remove the somewhat redundant rank attribute.
Before this change
```
mesh.cluster @mesh(rank = 3, dim_sizes = 2x3)
```
After
```
mesh.cluster @mesh(shape = 2x3x?)
```
The rank is instead determined by the provided shape. With this change
no longer `getDimSizes()` can be wrongly assumed to have size equal to
the cluster rank.
Now `getShape().size()` will always equal `getRank()`.
Commit: 2eb71e8b142a0d099cef668fd84ffc4c1c508d60
https://github.com/llvm/llvm-project/commit/2eb71e8b142a0d099cef668fd84ffc4c1c508d60
Author: Qi Hu <qi.hu at huawei.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/test/CodeGen/aarch64-targetattr.c
M clang/test/Preprocessor/aarch64-target-features.c
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/Target/AArch64/AArch64.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[TargetParser] Define AEK_FCMA and AEK_JSCVT for tsv110 (#75516)
This patch defines AEK_JSCVT and AEK_FCMA for CPU features FEAT_JSCVT
and FEAT_FCMA respectively, and add them to the feature set of TSV110.
Commit: 3ae87467a6ba4c91fb4c94ca80aeac528e636b88
https://github.com/llvm/llvm-project/commit/3ae87467a6ba4c91fb4c94ca80aeac528e636b88
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/resolve05.f90
Log Message:
-----------
[Flang][OpenMP] Avoid default none errors for seq loop indices in parโฆ (#76258)
โฆallel
Commit: 24c89bbfd7ad1d1d6b2c037a56d78722411b26e1
https://github.com/llvm/llvm-project/commit/24c89bbfd7ad1d1d6b2c037a56d78722411b26e1
Author: Pavel Gueorguiev <32593957+pav-code at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/test/CXX/drs/dr16xx.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/test/Lexer/SourceLocationsOverflow.c
M clang/test/SemaCXX/constexpr-default-arg.cpp
M clang/test/SemaCXX/eval-crashes.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
Log Message:
-----------
[clang] Reword apologetic Clang diagnostic messages (#76310)
Fixes Issue: https://github.com/llvm/llvm-project/issues/61256
Commit: c32d02efd2564891b8edeef20083c3b5055c7cbd
https://github.com/llvm/llvm-project/commit/c32d02efd2564891b8edeef20083c3b5055c7cbd
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/select-anyext-indexed-load-crash.ll
Log Message:
-----------
[AArch64][GlobalISel] Fix not extending GPR32->GPR64 result of anyext indexed load.
Was causing assertions to fail.
Commit: f3d07881c81bce817bd5009e883c9cfaa51bf39a
https://github.com/llvm/llvm-project/commit/f3d07881c81bce817bd5009e883c9cfaa51bf39a
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
A llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
Log Message:
-----------
[AMDGPU] Remove functions with incompatible gws attribute (#78143)
This change is to remove incompatible gws related functions
in order to make device-libs work correctly under -O0 for
gfx1200+
Co-authored-by: Changpeng Fang <changpeng.fang at amd.com>
Commit: 3b16d8c8eaf24edf572d92d375852daad457d71b
https://github.com/llvm/llvm-project/commit/3b16d8c8eaf24edf572d92d375852daad457d71b
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
A llvm/test/CodeGen/SystemZ/regcoal_undefsrc.mir
Log Message:
-----------
[SystemZ] Don't crash on undef source in shouldCoalesce() (#78056)
SystemZRegisterInfo::shouldCoalesce() has to be able to handle an undef
source.
Commit: 677ced8af239024439e377e06c93704252a8f179
https://github.com/llvm/llvm-project/commit/677ced8af239024439e377e06c93704252a8f179
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/fence.ll
Log Message:
-----------
Require asserts for llvm/test/CodeGen/PowerPC/fence.ll
Commit: 0ff3d729f92b3878d48eb1179649d7bb5feecd02
https://github.com/llvm/llvm-project/commit/0ff3d729f92b3878d48eb1179649d7bb5feecd02
Author: Dรกvid Ferenc Szabรณ <30732159+dfszabo at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/phi-with-empty-type.ll
Log Message:
-----------
[GlobalISel] Make IRTranslator able to handle PHIs with empty types. (#73235)
SelectionDAG already handle this since
e53b7d1a11d180ed7b33190a837d8898ab2a0b71.
Commit: 62b7e35f10f9b1676dde2efeccb95b623cbb4d29
https://github.com/llvm/llvm-project/commit/62b7e35f10f9b1676dde2efeccb95b623cbb4d29
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
A llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
Log Message:
-----------
[SystemZ] Don't assert for i128 vectors in getInterleavedMemoryOpCost() (#78009)
This assert does not seem justified given that the LoopVectorizer can
form interleave groups containing i128 elements where the number of
elements per vector is indeed just one.
Commit: fcfe1b648219f40514b8934bc32543b8d739509d
https://github.com/llvm/llvm-project/commit/fcfe1b648219f40514b8934bc32543b8d739509d
Author: chuongg3 <chuong.goh at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
Log Message:
-----------
[GlobalISel] Refactor extractParts() (#75223)
Moved extractParts() and extractVectorParts() from LegalizerHelper
to Utils to be able to use it in different passes.
extractParts() will also try to use unmerge when doing irregular
splits where possible, falling back to extract elements when not.
Commit: c1730f42219365f5105148870422592c25083104
https://github.com/llvm/llvm-project/commit/c1730f42219365f5105148870422592c25083104
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/test/Dialect/SCF/for-loop-peeling.mlir
M mlir/test/Dialect/SCF/invalid.mlir
Log Message:
-----------
[mlir][SCF] Do not verify step size of `scf.for` (#78141)
An op verifier should verify only local properties. This commit removes
the verification of `scf.for` step sizes. (Verifiers can check
attributes but should not follow SSA values.) This verification could
reject IR that is actually valid, e.g.:
```mlir
scf.if %always_false {
// Branch is never entered.
scf.for ... step %c0 { ... }
}
```
This commit fixes `for-loop-peeling.mlir` when running with
`MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`:
```
within split at llvm-project/mlir/test/Dialect/SCF/for-loop-peeling.mlir:293 offset :9:3: note: see current operation:
"scf.for"(%0, %3, %2) ({
^bb0(%arg1: index):
%4 = "arith.index_cast"(%arg1) : (index) -> i64
"memref.store"(%4, %arg0) : (i64, memref<i64>) -> ()
"scf.yield"() : () -> ()
}) {__peeled_loop__} : (index, index, index) -> ()
LLVM ERROR: IR failed to verify after folding
```
Note: `%2` is `arith.constant 0 : index`.
Commit: 4aa04245e5c10508e287699f6299362af8530715
https://github.com/llvm/llvm-project/commit/4aa04245e5c10508e287699f6299362af8530715
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/include/flang/Runtime/extensions.h
M flang/runtime/execute.cpp
M flang/runtime/extensions.cpp
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang][runtime] Clean up code to unblock development (#78063)
Clean up recently-added code to avoid warnings and to eliminate a
needless dependence from the Fortran runtime support library on C++
runtimes.
Commit: 01dbc5da336de0dc2dbba31900fbc9572f39443d
https://github.com/llvm/llvm-project/commit/01dbc5da336de0dc2dbba31900fbc9572f39443d
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
A mlir/test/mlir-cpu-runner/global-constructors.mlir
Log Message:
-----------
Reland [mlir][ExecutionEngine] Add support for global constructors and destructors #78070 (#78170)
This patch add support for executing global constructors and destructors
in the ExecutionEngine.
Commit: 6d4c88786aa503f803a6ec881e66fe1e1f38f6d8
https://github.com/llvm/llvm-project/commit/6d4c88786aa503f803a6ec881e66fe1e1f38f6d8
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/call10.f90
Log Message:
-----------
[flang] Allow use of COMMON in PURE (#76741)
Although COMMON variables implicitly have the SAVE attribute, and
variables with the SAVE attribute are generally disallowed in PURE
subprograms, we must allow the use of COMMON in PURE as an exception.
F'2023 constraint C1598 applies only to local variables.
Commit: 219c14a2609aaced2823f5a1b0a22584559bddad
https://github.com/llvm/llvm-project/commit/219c14a2609aaced2823f5a1b0a22584559bddad
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M flang/lib/Frontend/FrontendActions.cpp
Log Message:
-----------
[Flang] Remove dead -mvscale-{min,max} logic from getVScaleRange. NFCI (#78133)
After #77905, setting -mvscale-min or -mvscale-max on targets other than
AArch64 and RISC-V should be an error now, so we no longer need this
target-agnostic code in getVScaleRange.
Commit: 22f6e97d24f6e7190a447fd60e11e8ea03fd8356
https://github.com/llvm/llvm-project/commit/22f6e97d24f6e7190a447fd60e11e8ea03fd8356
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP] Handle SECTION construct from within SECTIONS (#77759)
Introduce `genSectionOp`, invoke it from the SECTIONS construct for
each nested SECTION construct. This makes it unnecessary to embed
OpenMPSectionConstruct inside of OpenMPConstruct anymore.
Recursive lowering [3/5]
Commit: c6dfb62d4df969fc50f42cf2889b10bb82f51b1f
https://github.com/llvm/llvm-project/commit/c6dfb62d4df969fc50f42cf2889b10bb82f51b1f
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Parser/characters.h
M flang/lib/Evaluate/character.h
M flang/lib/Parser/characters.cpp
M flang/runtime/edit-input.cpp
A flang/test/Semantics/modfile60.f90
Log Message:
-----------
[flang] Support \u Unicode escape sequences (#76757)
Support \uNNNN and \uNNNNNNNN escape sequences for CHARACTER(KIND=2) and
CHARACTER(KIND=4) literal constants for better GNU Fortran
compatibility.
Fixes llvm-test-suite/Fortran/gfortran/regression/achar_6.F90 and
.../widechar_1.f90.
Commit: 304119860ac0ded0a126ab1c8cc30367e29ebd01
https://github.com/llvm/llvm-project/commit/304119860ac0ded0a126ab1c8cc30367e29ebd01
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
Log Message:
-----------
[DebugInfo][RemoveDIs][NFC] Split findDbgDeclares into two functions (#77478)
This patch follows on from comments on
https://github.com/llvm/llvm-project/pull/73498, implementing the
proposed split of findDbgDeclares into two separate functions for
DbgDeclareInsts and DPVDeclares, which return containers rather than
taking containers by reference.
Commit: 2e08e821b7ea5bf7c0fe0775feb94a7fdb5204c7
https://github.com/llvm/llvm-project/commit/2e08e821b7ea5bf7c0fe0775feb94a7fdb5204c7
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/runtime/edit-input.cpp
Log Message:
-----------
[flang][runtime] Extension: allow a comma to terminate a fixed input โฆ (#76768)
โฆfield
When a comma appears in a fixed-width input field for integer editing,
many compilers accept it without error and interpret the comma as
terminating the field early.
Commit: 22c24be37c806e9295b05a34546b61a3164be267
https://github.com/llvm/llvm-project/commit/22c24be37c806e9295b05a34546b61a3164be267
Author: Tuan Chuong Goh <chuong.goh at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
Log Message:
-----------
[AArch64][GlobalISel] Pre-commit for Combine vecreduce(ext) to {U/S}ADDLV
Commit: f08b55d1a62863f27df51921c1c87125e77a3298
https://github.com/llvm/llvm-project/commit/f08b55d1a62863f27df51921c1c87125e77a3298
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/runtime/namelist.cpp
M flang/unittests/Runtime/Namelist.cpp
Log Message:
-----------
[flang][runtime] Emit leading spaces in NAMELIST output (#76846)
As NAMELIST output is a variant of list-directed output, its editing
must produce leading spaces on (most) output records to effect carriage
control. These spaces are required by the language standard and
implemented by nearly all other Fortran compilers (except GNU).
Fixes https://github.com/llvm/llvm-project/issues/76798.
Commit: e2ce91f48cd606955ce125b009ccc6b5464cb05f
https://github.com/llvm/llvm-project/commit/e2ce91f48cd606955ce125b009ccc6b5464cb05f
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/regcoal_undefsrc.mir
Log Message:
-----------
Fix test output for 3b16d8c
Commit: e06b5a2435f2e4d422dfcf099ba5e4b9b2573fa9
https://github.com/llvm/llvm-project/commit/e06b5a2435f2e4d422dfcf099ba5e4b9b2573fa9
Author: AtariDreams <83477269+AtariDreams at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/Headers/llvm_libc_wrappers/string.h
M clang/test/Analysis/Inputs/system-header-simulator-for-simple-stream.h
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/bsd-string.c
M clang/test/Analysis/string.c
M libc/spec/bsd_ext.td
M libc/src/string/strsep.cpp
M libc/src/string/strsep.h
Log Message:
-----------
[libc] Give more functions restrict qualifiers (NFC) (#78061)
strsep, strtok_r, strlcpy, and strlcat take restricted pointers as
parameters.
Add the restrict qualifiers to them.
Sources:
https://man7.org/linux/man-pages/man3/strsep.3.html
https://man7.org/linux/man-pages/man3/strtok_r.3.html
https://man.freebsd.org/cgi/man.cgi?strlcpy
Commit: 3d6c6855c1f0b8570f280adb9a3dbb1f950b9115
https://github.com/llvm/llvm-project/commit/3d6c6855c1f0b8570f280adb9a3dbb1f950b9115
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/runtime/extrema.cpp
Log Message:
-----------
[flang][runtime] Fix total MAXLOC/MINLOC over CHARACTER data (#76880)
The implementation of MAXLOC/MINLOC without DIM=1 is wrong for CHARACTER
data -- change it to use the character comparator rather than the
numeric comparator.
Fixes llvm-test-suite/Fortran/gfortran/regression/maxloc_string_1.f90.
Commit: 85705bbf1dada62c7ee266bb3071e9c4ab4a4bfb
https://github.com/llvm/llvm-project/commit/85705bbf1dada62c7ee266bb3071e9c4ab4a4bfb
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
Log Message:
-----------
[AMDGPU] Disable hasVALUMaskWriteHazard for GFX12 (#78187)
Commit: ed60cb8fb98bf3cfede8c0912fe2845a4166370b
https://github.com/llvm/llvm-project/commit/ed60cb8fb98bf3cfede8c0912fe2845a4166370b
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/partial-forwarding-hazards.mir
Log Message:
-----------
[AMDGPU] Disable hasVALUPartialForwardingHazard for GFX12 (#78188)
Commit: ba131b7017ce99d56a0584e630ed542d8cd48488
https://github.com/llvm/llvm-project/commit/ba131b7017ce99d56a0584e630ed542d8cd48488
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
Log Message:
-----------
[AMDGPU] Do not generate s_set_inst_prefetch_distance for GFX12 (#78190)
GFX12 can still encode the s_set_inst_prefetch_distance instruction but
it has no effect.
Commit: 927b8a0f4f57a11b245da359b5076b16d969f75d
https://github.com/llvm/llvm-project/commit/927b8a0f4f57a11b245da359b5076b16d969f75d
Author: chuongg3 <chuong.goh at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrGISel.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
Log Message:
-----------
[AArch64][GlobalISel] Combine vecreduce(ext) to {U/S}ADDLV (#75832)
Commit: 82e1e412e3249e15908c3f916eeaa04b96d4b453
https://github.com/llvm/llvm-project/commit/82e1e412e3249e15908c3f916eeaa04b96d4b453
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/lib/Evaluate/fold-character.cpp
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/fold-reduction.h
M flang/runtime/extrema.cpp
M flang/runtime/reduction-templates.h
M flang/test/Evaluate/fold-findloc.f90
M flang/test/Evaluate/folding20.f90
Log Message:
-----------
[flang][runtime] Treatment of NaN in MAXVAL/MAXLOC/MINVAL/MINLOC (#76999)
Detect NaN elements in data and handle them like gfortran does (at
runtime); namely, NaN can be returned if all the data are NaNs, but any
non-NaN value is preferable. Ensure that folding returns the same
results as runtime computation.
Fixes llvm-test-suite/Fortran/gfortran/regression/maxloc_2.f90 (and
probably others).
Commit: 1d1893097a6319a6402331a54a588b1a5d961808
https://github.com/llvm/llvm-project/commit/1d1893097a6319a6402331a54a588b1a5d961808
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrFP.td
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZPatterns.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/test/CodeGen/SystemZ/fp-cmp-04.ll
R llvm/test/CodeGen/SystemZ/fp-cmp-07.mir
A llvm/test/CodeGen/SystemZ/fp-cmp-zero.ll
M llvm/test/CodeGen/SystemZ/fp-strict-cmp-04.ll
M llvm/test/CodeGen/SystemZ/tdc-06.ll
M llvm/test/CodeGen/SystemZ/vec-max-05.ll
M llvm/test/CodeGen/SystemZ/vec-min-05.ll
Log Message:
-----------
[SystemZ] Don't use FP Load and Test as comparisons to same reg (#78074)
The usage of FP Load and Test instructions as a comparison against zero
with the assumption that the dest reg will always reflect the source reg is
actually incorrect: Unfortunately, a SNaN will be converted to a QNaN, so the
instruction may actually change the value as opposed to being a pure register
move with a test.
This patch
- changes instruction selection to always emit FP LT with a scratch def
reg, which will typically be allocated to the same reg if dead.
- Removes the conversions into FP LT in SystemZElimcompare.
Commit: add189cdf01e92ca30687291a98e936b7706ee38
https://github.com/llvm/llvm-project/commit/add189cdf01e92ca30687291a98e936b7706ee38
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/runtime/edit-input.cpp
Log Message:
-----------
[flang][runtime] Resume rounding hexadecimal floating-point input (#77006)
This reverts commit cab156c4129e5948a6322054480e66d3ca17b919, and adds
language to Extensions.md documenting the discrepancy with the letter of
the language standard.
Commit: c0944f52c17a30762b81446183967ce3ef6b9aed
https://github.com/llvm/llvm-project/commit/c0944f52c17a30762b81446183967ce3ef6b9aed
Author: Eleanor Bonnici <eleanor.bonnici at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
M llvm/test/MC/ARM/pcrel-global.s
M llvm/test/MC/ARM/pcrel-ldr-relocs.s
A llvm/test/MC/ARM/pcrel-ldrd-diff-section.s
A llvm/test/MC/ARM/pcrel-ldrd-same-section.s
A llvm/test/MC/ARM/pcrel-vldr-diff-section.s
A llvm/test/MC/ARM/pcrel-vldr-same-section.s
Log Message:
-----------
[llvm][MC][ARM] Don't autoresolve fixups (#76574)
Removes logic that caused some fixups to be marked as resolved in the
assembler without actually resolving them. Assembler must either resolve
the fixup, reject the code (error out) or defer the resolution to the
linker. In general assembler can resolve offsets in pcrel instructions
if the symbol referred to is in the same section and it cannot make
assumptions about relative position of sections. For example, when LDRD
instruction in arm mode is encountered, fixup_arm_pcrel_10_unscaled is
raised. Prior to https://github.com/llvm/llvm-project/pull/72873/ the
assembler would always mark it as resolved without generating a
relocation. The resulting code would likely be incorrect whenever the
label referred to is in a different section.
This patch finishes the series to prevent incorrect code being generated
for pcrel instructions referring to labels in different sections. This
kind of assembly code is very rare and most likely a user error, so both
options (relocation or error) are acceptable. In previous patches this
was resolved by adding relocations. Here, for VLDR instructions an error
is generated as relocation does not exist for Thumb mode and we wanted
the tool's behaviour to be consistent across modes. In the LDRD case,
Thumb mode does not have a relocation and errors out, but LDRD in Arm
mode generates R_ARM_LDRS_PC_G0 relocation because its fixup kind is
shared with other instructions.
It also fixed the case when ADR is used in the big-endian mode, which is
not covered by the ADR patch.
Patch series:
https://github.com/llvm/llvm-project/pull/72873 - LDRx
https://github.com/llvm/llvm-project/pull/73834 - ADR
this PR - LDRD and VLDR
Commit: 90828d67ea35c86b76fc8f3dec5da03f645eadaf
https://github.com/llvm/llvm-project/commit/90828d67ea35c86b76fc8f3dec5da03f645eadaf
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Common/Fortran-features.h
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/dosemantics12.f90
M flang/test/Semantics/forall01.f90
M flang/test/Semantics/resolve35.f90
M flang/test/Semantics/resolve99.f90
M flang/test/Semantics/symbol09.f90
Log Message:
-----------
[flang] Weird restrictions on index variables (#77019)
There are some very odd (even for Fortran) rules in F'2023 subclause
19.4 (paras 6 & 8) pertaining to the index variables of FORALL and DO
CONCURRENT constructs/statements, and they are not currently implemented
correctly.
Although these index variables are construct entities, they have
restrictions in the standard that would essentially allow them to also
be variables in their enclosing scopes. If their names are present in
the enclosing scope, and the construct does not have an explicit type
specification for its indices, then the names in the enclosing scope
must either be scalar variables or COMMON blocks, and their type must be
integer.
Reimplement these restrictions largely with portability warnings rather
than hard errors. Retain the semantic interpretation that the type of an
untyped index variable be taken from the type of a variable of the same
name in the enclosing scope, if it exists, although that bit of the
standard could be interpreted otherwise.
Fixes https://github.com/llvm/llvm-project/issues/76978.
Commit: 6719a5a3f6744efdb31095933e272163b294c8f7
https://github.com/llvm/llvm-project/commit/6719a5a3f6744efdb31095933e272163b294c8f7
Author: David Green <david.green at arm.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/test/CodeGen/Thumb2/mve-gather-optimisation-deep.ll
Log Message:
-----------
[ARM] Extra test for MVE gather optimization with commuted phi operands. NFC
Commit: d0708e6285b88510649722fe8e6832ee1d7abfb1
https://github.com/llvm/llvm-project/commit/d0708e6285b88510649722fe8e6832ee1d7abfb1
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/modfile61.f90
Log Message:
-----------
[flang] Refine IMPORT processing in module file generation (#77133)
Procedure interfaces emitted to module files are including IMPORT
statements for some symbols that don't need to be imported (base types
and procedure interfaces for components of imported derived types) and
omitting others (procedure interfaces for bindings in locally-defined
derived types that are material to the interface).
Commit: f0896911570eae97507f9e3ccf2732182404981e
https://github.com/llvm/llvm-project/commit/f0896911570eae97507f9e3ccf2732182404981e
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Evaluate/real.h
M flang/lib/Evaluate/real.cpp
M flang/runtime/numeric.cpp
M flang/test/Evaluate/fold-mod.f90
Log Message:
-----------
[flang][runtime] Better real MOD/MODULO results (#77167)
The Fortran standard defines real MOD and MODULO with expressions like
MOD(a,p) = a - AINT(a/p)*p. Unfortunately, these definitions have poor
accuracy when a is much larger in magnitude than p, and every Fortran
compiler uses better algorithms instead.
Fixes llvm-test-suite/Fortran/gfortran/regression/mod_large_1.f90.
Commit: f9b089a7c01dd3fe7de3d397520172ec3b8fb9f1
https://github.com/llvm/llvm-project/commit/f9b089a7c01dd3fe7de3d397520172ec3b8fb9f1
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/move_alloc.f90
Log Message:
-----------
[flang] Fix semantic checks for MOVE_ALLOC (#77362)
The checking of calls to the intrinsic subroutine MOVE_ALLOC is not
insisting that its first two arguments be whole allocatable variables or
components. Fix, move the code into check-calls.cpp (a better home for
such things), and clean up the tests.
Fixes https://github.com/llvm/llvm-project/issues/77230.
Commit: 73863a48352c48b0c37a49c5dcfa521eb0cfcb5b
https://github.com/llvm/llvm-project/commit/73863a48352c48b0c37a49c5dcfa521eb0cfcb5b
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
A llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
Log Message:
-----------
[InstCombine] Add tests for folding `(add/sub/disjoint_or/icmp C, (ctpop (not x)))`; NFC
Commit: 60e8915d2277ab784f4d27139c479868255b22bf
https://github.com/llvm/llvm-project/commit/60e8915d2277ab784f4d27139c479868255b22bf
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
Log Message:
-----------
[InstCombine] Add folds for `(add/sub/disjoint_or/icmp C, (ctpop (not x)))`
`(ctpop (not x))` <-> `(sub nuw nsw BitWidth(x), (ctpop x))`. The
`sub` expression can sometimes be constant folded depending on the use
case of `(ctpop (not x))`.
This patch adds fold for the following cases:
`(add/sub/disjoint_or C, (ctpop (not x))`
-> `(add/sub/disjoint_or C', (ctpop x))`
`(cmp pred C, (ctpop (not x))`
-> `(cmp swapped_pred C', (ctpop x))`
Where `C'` depends on how we constant fold `C` with `BitWidth(x)` for
the given opcode.
Proofs: https://alive2.llvm.org/ce/z/qUgfF3
Closes #77859
Commit: 7b8012338745ab16a88d78b3772d21dd6f87224b
https://github.com/llvm/llvm-project/commit/7b8012338745ab16a88d78b3772d21dd6f87224b
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-namelist.cpp
Log Message:
-----------
[flang] More support for assumed-size Cray pointees (#77381)
Recognize Cray pointees as such when they are declared as assumed size
arrays, and don't emit a bogus error message about implied shape arrays.
Fixes https://github.com/llvm/llvm-project/issues/77330.
Commit: 9fdd25e18c04f3543f7de9727f11f034498ca07e
https://github.com/llvm/llvm-project/commit/9fdd25e18c04f3543f7de9727f11f034498ca07e
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/runtime/allocatable.cpp
Log Message:
-----------
[flang] Don't change size of allocatable in error situation (#77386)
When an already-allocated allocatable array is about to fail
reallocation, don't allow its size or other characteristics to be
changed.
Fixes
llvm-test-suite/Fortran/gfortran/regression/multiple_allocation_1.f90
and .../multiple_allocation_3.f90.
Commit: f3524e9aebbfabed0c60d0087b39ce14d8f778da
https://github.com/llvm/llvm-project/commit/f3524e9aebbfabed0c60d0087b39ce14d8f778da
Author: Diogo Teles Sant'Anna <diogoteles at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
A .github/dependabot.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-tasks.yml
A llvm/docs/requirements-hashed.txt
Log Message:
-----------
Hashpin sensitive dependencies and configure dependabot to update them automatically (#75859)
Closes #75620
As I mentioned on the issue, this PR aims to hash-pin the CI
dependencies used on sensitive context -- i.e., they either are called
with write permissions, or are being used to build critical artifacts
like a release. In summary, this PR brings 3 changes:
1. Hash pin GitHub Actions called on sensitive context
2. Hash pin python dependencies used on sensitive context
3. Configure dependabot to automatically update those hashes
I'm further explaining the steps bellow.
The dependencies in format of GitHub Actions, I simply hash-pinned them.
I also made sure to keep the human-readable version as comments at the
same line.
At the
[release-tasks.yml](https://github.com/llvm/llvm-project/blob/main/.github/workflows/release-tasks.yml)
file, I've changed the installation method of some python dependencies
to install them considering their hashpinning. That required the
generation of a requirements file that had all the correct hashes, and
for that I used [pip-tools](https://pypi.org/project/pip-tools/2.0.0/).
While configuring dependabot, I set it to send a monthly PR updating all
the GitHub Actions, and a weekly PR to update any python dependency
required by
[/llvm/docs/requirements.txt](https://github.com/llvm/llvm-project/blob/main/llvm/docs/requirements.txt).
Let me know if you have any questions or concerns, I'd be happy to
clarify and help.
Thanks!
---------
Signed-off-by: Diogo Teles Sant'Anna <diogoteles at google.com>
Commit: 691770ca67986d9450ac2b22335cc9c01c6c27e4
https://github.com/llvm/llvm-project/commit/691770ca67986d9450ac2b22335cc9c01c6c27e4
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/call14.f90
Log Message:
-----------
[flang] Add portability warning for F'2008 feature (#77526)
Using the VALUE attribute for assumed-length CHARACTER dummy arguments
became standard in F'2008 but still lacks widespread implementation;
emit a portability warning when they are enabled.
Resolves llvm-test-suite/Fortran/gfortran/regression/value_5.f90.
Commit: 6e0a2031f09819425480df8d44122530275b2347
https://github.com/llvm/llvm-project/commit/6e0a2031f09819425480df8d44122530275b2347
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/call24.f90
M flang/test/Semantics/call25.f90
M flang/test/Semantics/local-vs-global.f90
M flang/test/Semantics/reshape.f90
M flang/test/Semantics/resolve09.f90
Log Message:
-----------
[flang] Catch name resolution error due to global scoping (#77683)
In
CALL FOO
PRINT *, ABS(FOO)
we currently resolve the first FOO to a global external subprogram, but
then the second FOO is treated as an implicitly typed local variable.
This happens because the name FOO is not present in the local scope.
Fix by adding FOO to the local scope using a place-holding
HostAssocDetails symbol whose existence prevents the creation of another
FOO in the local scope. The symbol stored in the parser::Name parse tree
nodes or used in typed expressions will all continue to point to the
global external subprogram.
Resolves llvm-test-suite/Fortran/gfortran/regression/pr71859.f90.
Commit: 4fcefbd3a41d77b2471c78c5b2e50d058ee46b97
https://github.com/llvm/llvm-project/commit/4fcefbd3a41d77b2471c78c5b2e50d058ee46b97
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/runtime/io-stmt.cpp
Log Message:
-----------
[flang][runtime] Emit leading space before zero-length list-directed โฆ (#77835)
โฆcharacter
Don't omit the leading space in list-directed output before a line
comprising only a zero-length character value.
Fixes https://github.com/llvm/llvm-project/issues/77736.
Commit: 92126ca62e5764f9267524c18f78fe0b8c5751c0
https://github.com/llvm/llvm-project/commit/92126ca62e5764f9267524c18f78fe0b8c5751c0
Author: Martin Storsjรถ <martin at martin.st>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/test/COFF/print-search-paths.s
Log Message:
-----------
[LLD] [COFF] Prefer paths specified with -libpath: over toolchain paths (#78039)
The main reason for adding the toolchain paths early was to prefer
libraries from the toolchain over ones from MSVC (primarily for
compiler-rt builtins). But if the user specifies a directory explicitly
with the -libpath: option, that should be preferred over the built-in
default paths.
This fixes an issue raised at
https://discourse.llvm.org/t/lld-prefers-system-llvm-libraries-to-user-provided-ones-on-windows/76148.
Commit: 837503023a196fef76abe66102a89ca4dedee039
https://github.com/llvm/llvm-project/commit/837503023a196fef76abe66102a89ca4dedee039
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
Log Message:
-----------
[sanitizer] Fix builds after #77991
Commit: c66645da55b9f4c13f4a612392dcc5a84b086ba7
https://github.com/llvm/llvm-project/commit/c66645da55b9f4c13f4a612392dcc5a84b086ba7
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/init01.f90
M flang/test/Semantics/pointer01.f90
Log Message:
-----------
[flang] Catch more initialization errors (#77850)
[flang] Catch more initialization errors
Diagnose some error cases related to initialization that are
slipping past semantic checking: don't allow multiple initializations
of the same symbol, and don't allow an object that was initialized
as a scalar to become an array afterward.
Fixes llvm-test-suite/Fortran/gfortran/regression/initialization_17.f90.
Commit: 2bb2a42fa261d728e32ba0b1f9cf27ba7991440f
https://github.com/llvm/llvm-project/commit/2bb2a42fa261d728e32ba0b1f9cf27ba7991440f
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M lldb/include/lldb/Core/ValueObject.h
M lldb/source/Core/ValueObject.cpp
Log Message:
-----------
[lldb][ValueObject][NFC] Further remove redundant parameters to ReadPointedString (#78029)
We only ever call this function once, without relying on the defaulted
`honor_array` parameter, so make it non-defaulted. Also `max_length` is
always set to `0`, so remove it entirely.
This simplifies some upcoming refactoring.
Commit: 8f3bdea9b4083a7b9a7a4fb79d2d918575d42d57
https://github.com/llvm/llvm-project/commit/8f3bdea9b4083a7b9a7a4fb79d2d918575d42d57
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
Log Message:
-----------
[flang][NFC] Restore documentation (#78211)
Add a paragraph to Extensions.md that fell out of a recent patch.
Commit: 9fa9d9a7e1cd0a7fd8c35bdfc642793447bf70aa
https://github.com/llvm/llvm-project/commit/9fa9d9a7e1cd0a7fd8c35bdfc642793447bf70aa
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
M clang/tools/clang-linker-wrapper/CMakeLists.txt
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
R clang/tools/clang-linker-wrapper/OffloadWrapper.cpp
R clang/tools/clang-linker-wrapper/OffloadWrapper.h
A llvm/include/llvm/Frontend/Offloading/OffloadWrapper.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/CMakeLists.txt
A llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
Log Message:
-----------
[llvm][frontend][offloading] Move clang-linker-wrapper/OffloadWrapper.* to llvm/Frontend/Offloading (#78057)
This patch moves `clang/tools/clang-linker-wrapper/OffloadWrapper.*` to
`llvm/Frontend/Offloading` allowing them to be re-utilized by other
projects.
Additionally, it makes minor modifications to the API to make it more
flexible.
Concretely:
- The `wrap*` methods now have additional arguments `EntryArray`,
`Suffix` and `EmitSurfacesAndTextures` to specify some additional options.
- The `EntryArray` is now constructed by the caller. This change is needed to
enable JIT compilation, as ORC doesn't fully support `__start_` and `__stop_`
symbols. Thus, to JIT the code, the `EntryArray` has to be constructed explicitly in the IR.
- The `Suffix` field is used when emitting the descriptor, registration
methods, etc, to make them more readable. It is empty by default.
- The `EmitSurfacesAndTextures` field controls whether to emit surface
and texture registration code, as those functions were removed from `CUDART`
in CUDA 12. It is true by default.
- The function `getOffloadingEntryInitializer` was added to help create
the `EntryArray`, as it returns the constant initializer and not a global
variable.
Commit: ab33c0b96e26430b22e152cb6ecbab54dd2cfa41
https://github.com/llvm/llvm-project/commit/ab33c0b96e26430b22e152cb6ecbab54dd2cfa41
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
A llvm/test/Transforms/LoopStrengthReduce/rewrite-to-add-neg-1-expansion-flags.ll
Log Message:
-----------
[LSR] Add test showing incorrectly adding nuw with #77827.
Extra test for https://github.com/llvm/llvm-project/pull/77827, where
NUW gets added the AddRec due to the BTC being 0.
Commit: 8b6b882f27e86bae717ffcbaef6da3f00af86003
https://github.com/llvm/llvm-project/commit/8b6b882f27e86bae717ffcbaef6da3f00af86003
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M flang/runtime/extensions.cpp
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang] allow _POSIX_SOURCE to be defined without a value (#78179)
The `_POSIX_SOURCE` macro is defined without a value on AIX. Change the check to `defined(_POSIX_SOURCE)`.
Commit: 5b4f2b906ba697c276b3e0940c24ae640cfde695
https://github.com/llvm/llvm-project/commit/5b4f2b906ba697c276b3e0940c24ae640cfde695
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Transforms/ModuleToBinary.cpp
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/module-to-binary-nvvm.mlir
M mlir/test/Dialect/GPU/ops.mlir
Log Message:
-----------
[mlir][gpu] Add an offloading handler attribute to `gpu.module` (#78047)
This patch adds an optional offloading handler attribute to
the`gpu.module` op. This attribute will be used during
`gpu-module-to-binary` pass to override the offloading handler used in
the `gpu.binary` op.
Commit: 071207ea415d73844f6d48be3b83a7e010e3759b
https://github.com/llvm/llvm-project/commit/071207ea415d73844f6d48be3b83a7e010e3759b
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
Log Message:
-----------
[mlir] Fix -Wsign-compare in MeshOps.cpp (NFC)
llvm-project/mlir/lib/Dialect/Mesh/IR/MeshOps.cpp:204:25:
error: comparison of integers of different signs: 'size_t' (aka 'unsigned long') and 'int64_t' (aka 'long') [-Werror,-Wsign-compare]
if (getShape().size() > rank)
~~~~~~~~~~~~~~~~~ ^ ~~~~
1 error generated.
Commit: 10602c2b4a662872d1aaeda1dbc58e5d6f613fda
https://github.com/llvm/llvm-project/commit/10602c2b4a662872d1aaeda1dbc58e5d6f613fda
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/AvoidNestedConditionalOperatorCheck.cpp
Log Message:
-----------
[NFC]add - at the beginning for alignment
Commit: c58bc24fcf678c55b0bf522be89eff070507a005
https://github.com/llvm/llvm-project/commit/c58bc24fcf678c55b0bf522be89eff070507a005
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CXX/over/over.load/p2-0x.cpp
A clang/test/Modules/GH77953.cpp
Log Message:
-----------
[Clang] Only compare template params of potential overload after checking their decl context (#78139)
Fixes a regression from 69066ab3 in which we compared the template lists
of potential overloads before checkings their declaration contexts.
This would cause a crash when doing constraint substitution as part of
that template check, because we would try to refer to not yet
instantiated entities (the underlying cause is unclear).
This patch reorders (again) when we look at template parameter so we
don't do it when checkings friends in different lexical contexts.
Fixes #77953
Fixes #78101
Commit: 89cdd48a22cb7aca1695746b70428ac910396d3e
https://github.com/llvm/llvm-project/commit/89cdd48a22cb7aca1695746b70428ac910396d3e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Libomptarget] Remove temporary files in AMDGPU JIT impl (#77980)
Summary:
This patch cleans up some of the JIT handling for AMDGPU as well as
removing its temporary files. Previously these would be left in the
temporary directory after the program was run. This costs some extra
time, but the correct solution to avoid that is to create a sufficient
entrypoint into `ld.lld` that we can simply pass a memory buffer into.
Commit: 2c0fc0f37f29d54e0376a5e1f7cbb386a37a177d
https://github.com/llvm/llvm-project/commit/2c0fc0f37f29d54e0376a5e1f7cbb386a37a177d
Author: XChy <xxs_chy at outlook.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
Log Message:
-----------
[DFAJumpThreading] Handle circular determinator (#78177)
Fixes the buildbot failure in
https://github.com/llvm/llvm-project/pull/78134#issuecomment-1892195197
When we meet the path with single `determinator`, the determinator
actually takes itself as a predecessor. Thus, we need to let `Prev` be
the determinator when `PathBBs` has only one element.
Commit: 58b33d0301a36900fc641b4b0e110b683064bab8
https://github.com/llvm/llvm-project/commit/58b33d0301a36900fc641b4b0e110b683064bab8
Author: SihangZhu <zhusihang at huawei.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libunwind/src/libunwind.cpp
Log Message:
-----------
[libunwind] fix dynamic .eh_frame registration (#77185)
Fix this issue
[#76957](https://github.com/llvm/llvm-project/issues/76957)
Libgcc provides __register_frame to register a dynamic .eh_frame
section, while __unw_add_dynamic_eh_frame_section can be used to do the
same in libunwind. However, the address after dynamic .eh_frame are
padding with 0 value, it will be identified as
legal CIE. And __unw_add_dynamic_eh_frame_section will continue to parse
subsequent addresses until illegal memory or other sections are
accessed.
This patch adds length formal parameter for dynamic registration.
Commit: eb009ed2495d495e0c9bb10c29c484d563bb5cdf
https://github.com/llvm/llvm-project/commit/eb009ed2495d495e0c9bb10c29c484d563bb5cdf
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
Log Message:
-----------
[GlobalISel] Fix the select->minmax combine from trying to operate on pointer types.
Commit: a511c1a9eccf93d3c4cbf724864fbc0b86c517f4
https://github.com/llvm/llvm-project/commit/a511c1a9eccf93d3c4cbf724864fbc0b86c517f4
Author: Rashmi Mudduluru <r_mudduluru at apple.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/TypoCorrection.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
R clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/bounds-checking.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
R clang/test/Sema/attr-counted-by.c
Log Message:
-----------
Revert "[Clang] Implement the 'counted_by' attribute (#76348)"
This reverts commit 164f85db876e61cf4a3c34493ed11e8f5820f968.
Commit: eca2529592b59fe2c4b2e06adf15900c7a2ca95f
https://github.com/llvm/llvm-project/commit/eca2529592b59fe2c4b2e06adf15900c7a2ca95f
Author: AtariDreams <83477269+AtariDreams at users.noreply.github.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/include/llvm/Support/MathExtras.h
Log Message:
-----------
Use Log2_64_Ceil to compute PowerOf2Ceil (#67580)
Instead of calling NextPowerOf2, which is only useful for constants,
we should call Log2_64_Ceil, which is faster because it uses compiler
intrinsics where supported.
Commit: 855e863004966e8856c0ab518c08079a1d192df2
https://github.com/llvm/llvm-project/commit/855e863004966e8856c0ab518c08079a1d192df2
Author: Nicholas Mosier <nmosier at stanford.edu>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
Log Message:
-----------
[X86] Add MI-layer routine for getting the index of the first address operand, NFC (#78019)
Add the MI-layer routine X86::getFirstAddrOperandIdx(), which returns
the index of the first address operand of a MachineInstr (or -1 if there
is none).
X86II::getMemoryOperandNo(), the existing MC-layer routine used to
obtain the index of the first address operand in a 5-operand X86 memory
reference, is incomplete: it does not handle pseudo-instructions like
TCRETURNmi, resulting in security holes in the mitigation passes that
use it (e.g., x86-slh and x86-lvi-load).
X86::getFirstAddrOperandIdx() handles both pseudo and real instructions
and is thus more suitable for most use cases than
X86II::getMemoryOperandNo(), especially in mitigation passes like
x86-slh and x86-lvi-load. For this reason, this patch replaces all uses
of X86II::getMemoryOperandNo() with X86::getFirstAddrOperandIdx() in the
aforementioned mitigation passes.
Commit: b6e8f6604c1ca79e01d3db816c16101ae2834f60
https://github.com/llvm/llvm-project/commit/b6e8f6604c1ca79e01d3db816c16101ae2834f60
Author: Mel Chen <mel.chen at sifive.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
A llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
Log Message:
-----------
[LV] Skipping all debug instructions when native vplan is enabled (#77413)
The following internal error occurred when using native vplan to
vectorize the program with the debug info generation.
Assertion `!isa<DbgInfoIntrinsic>(CI) && "DbgInfoIntrinsic should have been dropped during VPlan construction"' failed.
This patch ignored all debug instructions to fix the error when native
vplan is enabled.
Commit: 3d68217454fe600c492314f458df36f9e26ce475
https://github.com/llvm/llvm-project/commit/3d68217454fe600c492314f458df36f9e26ce475
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrShiftRotate.td
M llvm/lib/Target/X86/X86InstrUtils.td
Log Message:
-----------
[X86][NFC] Simplify the definitions of rotate instructions
Commit: 1b6c1a3bd73be4dd904230c637d65810cf3334cd
https://github.com/llvm/llvm-project/commit/1b6c1a3bd73be4dd904230c637d65810cf3334cd
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/test/Modules/GH77953.cpp
Log Message:
-----------
[NFC] Improve test for clang/test/Modules/GH77953.cpp
Generally we'll use `-fsyntax-only` when it is sufficient and we'll use
`expected-no-diagnostics` to test the behavior doesn't trigger any
problems. This patch applies these two improvements to
`clang/test/Modules/GH77953.cpp`.
Commit: 59e5cb7b83fbbce2423e0c024861f83c0390670f
https://github.com/llvm/llvm-project/commit/59e5cb7b83fbbce2423e0c024861f83c0390670f
Author: Michal Paszkowski <michal at paszkowski.org>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/SPIRV/logical-struct-access.ll
A llvm/test/CodeGen/SPIRV/pointers/getelementptr-bitcast-load.ll
Log Message:
-----------
[SPIR-V] Do not emit spv_ptrcast if GEP result is of expected type (#78122)
Prior to this change spv_ptrcast (and OpBitcast) was never emitted for
GEP resulting pointers. While such SPIR-V was (mostly) accepted by the
NEO GPU driver, the generated SPIR-V was incorrect.
The newly added test (pointers/getelementptr-bitcast-load.ll) verifies
that a correct bitcast is added for more complex cases and passes
spirv-val. The test is based on an OpenCL CTS test (basic/prefetch).
Commit: d338d15243d221198ec35fbe97525ca3b1de1470
https://github.com/llvm/llvm-project/commit/d338d15243d221198ec35fbe97525ca3b1de1470
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
Log Message:
-----------
[X86] Fix -Wunused-variable in X86InstrInfo.cpp (NFC)
llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp:3467:14:
error: unused variable 'isMemOp' [-Werror,-Wunused-variable]
3467 | const auto isMemOp = [](const MCOperandInfo &OpInfo) -> bool {
| ^~~~~~~
1 error generated.
Commit: d63c2e52e6e2f904e61562a8ebc48faa7195a2de
https://github.com/llvm/llvm-project/commit/d63c2e52e6e2f904e61562a8ebc48faa7195a2de
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot4.ll
M llvm/test/MC/Disassembler/AMDGPU/gfx1011-xdl-insts.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1011_dlops.txt
Log Message:
-----------
[AMDGPU][MC] Remove incorrect `_e32` suffix from `v_dot2c_f32_f16` and `v_dot4c_i32_i8` (#77993)
The two VOP2 instructions cannot be encoded as VOP3.
Fix #54691.
Commit: 43414e736cd122032c07d60ca990655733e52a89
https://github.com/llvm/llvm-project/commit/43414e736cd122032c07d60ca990655733e52a89
Author: XChy <xxs_chy at outlook.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
Log Message:
-----------
[DFAJumpThreading][NFC] Reduce tests
Commit: f6ff7574a6fc979583b8105f0d3f2fac165b6d61
https://github.com/llvm/llvm-project/commit/f6ff7574a6fc979583b8105f0d3f2fac165b6d61
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/include/mlir/IR/Attributes.h
M mlir/lib/IR/AsmPrinter.cpp
M mlir/unittests/IR/AttributeTest.cpp
Log Message:
-----------
[mlir] Attribute add printStripped (#78008)
Enable printing without dialect wrapping.
This closely matches `AsmPrinter::printStrippedAttrOrType`
implementation wise except templating component.
Commit: b984045d4fbd061c6ddb25beeff9797f78b26e27
https://github.com/llvm/llvm-project/commit/b984045d4fbd061c6ddb25beeff9797f78b26e27
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
Log Message:
-----------
Apply clang-tidy fixes for readability-simplify-boolean-expr in VectorToGPU.cpp (NFC)
Commit: 39c0ebd5584f0649d36eb2d3f0bc0363c9e40a86
https://github.com/llvm/llvm-project/commit/39c0ebd5584f0649d36eb2d3f0bc0363c9e40a86
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/lib/Debug/CLOptionsSetup.cpp
Log Message:
-----------
Apply clang-tidy fixes for readability-identifier-naming in CLOptionsSetup.cpp (NFC)
Commit: e5e08955af215ac9c918212de2b24036b4d7208c
https://github.com/llvm/llvm-project/commit/e5e08955af215ac9c918212de2b24036b4d7208c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
Log Message:
-----------
Apply clang-tidy fixes for performance-move-const-arg in IntRangeOptimizations.cpp (NFC)
Commit: 75e185d50c3f83c82c02e9df587139a41bf96412
https://github.com/llvm/llvm-project/commit/75e185d50c3f83c82c02e9df587139a41bf96412
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
Log Message:
-----------
Apply clang-tidy fixes for readability-simplify-boolean-expr in LegalizeForLLVMExport.cpp (NFC)
Commit: d8ed736c0e7da7752a3e6f4781d9741aae294f81
https://github.com/llvm/llvm-project/commit/d8ed736c0e7da7752a3e6f4781d9741aae294f81
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
Log Message:
-----------
Apply clang-tidy fixes for bugprone-macro-parentheses in Utils.cpp (NFC)
Commit: 199117ae09ed6bab54277e8007f98404834e277e
https://github.com/llvm/llvm-project/commit/199117ae09ed6bab54277e8007f98404834e277e
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
Log Message:
-----------
[X86] Fix error: unused variable 'isMemOp' after #78019, NFCI
BTW, I adjust the code by LLVM coding standards.
Commit: ed7f4edc19ada006789318a0929b57d1b5a761bd
https://github.com/llvm/llvm-project/commit/ed7f4edc19ada006789318a0929b57d1b5a761bd
Author: Jinyang He <hejinyang at loongson.cn>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Object/RelocationResolver.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
A llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
A llvm/test/DebugInfo/LoongArch/lit.local.cfg
Log Message:
-----------
[LoongArch] Add relaxDwarfLineAddr and relaxDwarfCFA to handle the mutable label diff in dwarfinfo (#77728)
When linker-relaxation is enabled, part of the label diff in dwarfinfo
cannot be computed before static link. Refer to RISCV, we add the
relaxDwarfLineAddr and relaxDwarfCFA to add relocations for these label
diffs. Calculate whether the label diff is mutable. For immutable label
diff, return false and do the other works by its parent function.
Commit: d34ac450a74657f03e15dd6776b406d1f31e054a
https://github.com/llvm/llvm-project/commit/d34ac450a74657f03e15dd6776b406d1f31e054a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Warnings.cpp
Log Message:
-----------
[Basic] Use StringRef::consume_front (NFC)
Commit: d041af3019984f505530bac3acb94ca2f13f33cd
https://github.com/llvm/llvm-project/commit/d041af3019984f505530bac3acb94ca2f13f33cd
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
Log Message:
-----------
[Transforms] Use a range-based for loop (NFC)
Commit: 481fd41aaa343e2ee2c86c2444fbc2e5ad1f3831
https://github.com/llvm/llvm-project/commit/481fd41aaa343e2ee2c86c2444fbc2e5ad1f3831
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang-tools-extra/modularize/ModularizeUtilities.cpp
Log Message:
-----------
[modularize] Use SmallString::operator std::string (NFC)
Commit: 6da4a7a8e2f13bcb8889898323e72270829ce63a
https://github.com/llvm/llvm-project/commit/6da4a7a8e2f13bcb8889898323e72270829ce63a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M bolt/tools/bat-dump/bat-dump.cpp
M bolt/tools/driver/llvm-bolt.cpp
M bolt/tools/heatmap/heatmap.cpp
Log Message:
-----------
[BOLT] Use SmallString::operator std::string (NFC)
Commit: 001fb1fa1ca31110693065297e4f02ba15b8298f
https://github.com/llvm/llvm-project/commit/001fb1fa1ca31110693065297e4f02ba15b8298f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[TableGen] Use llvm::drop_begin (NFC)
Commit: 44aa4d7d826f83777b99c07576cfb88e54266928
https://github.com/llvm/llvm-project/commit/44aa4d7d826f83777b99c07576cfb88e54266928
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-15 (Mon, 15 Jan 2024)
Changed paths:
M llvm/tools/dsymutil/SymbolMap.cpp
Log Message:
-----------
[dsymutil] Use StringRef::consume_front (NFC)
Commit: 286a366d057112a112507b9e34c68d35b3b820f7
https://github.com/llvm/llvm-project/commit/286a366d057112a112507b9e34c68d35b3b820f7
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
Log Message:
-----------
[RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (#71501)
vmv.s.x and vmv.x.s ignore LMUL, so we can replace the PseudoVMV_S_X_MX
and
PseudoVMV_X_S_MX with just one pseudo each. These pseudos use the VR
register
class (just like the actual instruction), so we now only have TableGen
patterns for vectors of LMUL <= 1.
We now rely on the existing combines that shrink LMUL down to 1 for
vmv_s_x_vl (and vfmv_s_f_vl). We could look into removing these combines
later and just inserting the nodes with the correct type in a later
patch.
The test diff is due to the fact that a PseudoVMV_S_X/PsuedoVMV_X_S no
longer
carries any information about LMUL, so if it's the only vector pseudo
instruction in a block then it now defaults to LMUL=1.
Commit: 5f24e779426594448d803906d44481f5137ed052
https://github.com/llvm/llvm-project/commit/5f24e779426594448d803906d44481f5137ed052
Author: Christian Sigg <chsigg at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Fix build after 9fa9d9a7e1cd0a7fd8c35bdfc642793447bf70aa
Commit: 57d517c2571d16837a018740c068cca89435ea65
https://github.com/llvm/llvm-project/commit/57d517c2571d16837a018740c068cca89435ea65
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[RISCV] Implement RISCVInsrInfo::getConstValDefinedInReg (#77610)
This helper function handles common cases where we can determine a
constant value is being defined in a register. Although it looks like
codegen changes are possible due to this being called in
PeepholeOptimizer, my main motivation is to use this in
describeLoadedValue.
Commit: 84f7fb6217fd417f3b5cb65fe7636e0aab84f6c7
https://github.com/llvm/llvm-project/commit/84f7fb6217fd417f3b5cb65fe7636e0aab84f6c7
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/misched-load-clustering.ll
Log Message:
-----------
[MachineScheduler] Add option to control reordering for store/load clustering (#75338)
Reordering based on the sort order of the MemOpInfo array was disabled
in <https://reviews.llvm.org/D72706>. However, it's not clear this is
desirable for al targets. It also makes it more difficult to compare the
incremental benefit of enabling load clustering in the selectiondag
scheduler as well was the machinescheduler, as the sdag scheduler does
seem to allow this reordering.
This patch adds a parameter that can control the behaviour on a
per-target basis.
Split out from #73789.
Commit: 2c2b27c0eae900977e4d6e0dfc58832270c73682
https://github.com/llvm/llvm-project/commit/2c2b27c0eae900977e4d6e0dfc58832270c73682
Author: Christian Sigg <chsigg at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Fix build after 9fa9d9a7e1cd0a7fd8c35bdfc642793447bf70aa
Commit: af9f2dc7fd45fd07559bd1084b1e6ce170082b70
https://github.com/llvm/llvm-project/commit/af9f2dc7fd45fd07559bd1084b1e6ce170082b70
Author: Christian Sigg <chsigg at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Fix build after 9fa9d9a7e1cd0a7fd8c35bdfc642793447bf70aa
Commit: af1463d403182720ae0e3fab07634817dd0f41be
https://github.com/llvm/llvm-project/commit/af1463d403182720ae0e3fab07634817dd0f41be
Author: martinboehme <mboehme at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/Formula.h
M clang/lib/Analysis/FlowSensitive/DataflowAnalysisContext.cpp
M clang/unittests/Analysis/FlowSensitive/DataflowAnalysisContextTest.cpp
Log Message:
-----------
[clang][dataflow] Add an early-out to `flowConditionImplies()` / `flowConditionAllows()`. (#78172)
This saves having to assemble the set of constraints and run the SAT
solver in
the trivial case of `flowConditionImplies(true)` or
`flowConditionAllows(false)`.
This is an update / reland of my previous reverted
[#77453](https://github.com/llvm/llvm-project/pull/77453). That PR
contained a
logic bug -- the early-out for `flowConditionAllows()` was wrong because
my
intuition about the logic was wrong. (In particular, note that
`flowConditionImplies(F)` does not imply `flowConditionAllows(F)`, even
though
this may run counter to intuition.)
I've now done what I should have done on the first iteration and added
more
tests. These pass both with and without my early-outs.
This patch is a performance win on the benchmarks for the Crubit
nullability
checker, except for one slight regression on a relatively short
benchmark:
```
name old cpu/op new cpu/op delta
BM_PointerAnalysisCopyPointer 68.5ยตs ยฑ 7% 67.6ยตs ยฑ 4% ~ (p=0.159 n=18+19)
BM_PointerAnalysisIntLoop 173ยตs ยฑ 3% 162ยตs ยฑ 4% -6.40% (p=0.000 n=19+20)
BM_PointerAnalysisPointerLoop 307ยตs ยฑ 2% 312ยตs ยฑ 4% +1.56% (p=0.013 n=18+20)
BM_PointerAnalysisBranch 199ยตs ยฑ 4% 181ยตs ยฑ 4% -8.81% (p=0.000 n=20+20)
BM_PointerAnalysisLoopAndBranch 503ยตs ยฑ 3% 508ยตs ยฑ 2% ~ (p=0.081 n=18+19)
BM_PointerAnalysisTwoLoops 304ยตs ยฑ 4% 286ยตs ยฑ 2% -6.04% (p=0.000 n=19+20)
BM_PointerAnalysisJoinFilePath 4.78ms ยฑ 3% 4.54ms ยฑ 4% -4.97% (p=0.000 n=20+20)
BM_PointerAnalysisCallInLoop 3.05ms ยฑ 3% 2.90ms ยฑ 4% -5.05% (p=0.000 n=19+20)
```
When running clang-tidy on real-world code, the results are less clear.
In
three runs, averaged, on an arbitrarily chosen input file, I get 11.60 s
of user
time without this patch and 11.40 s with it, though with considerable
measurement noise (I'm seeing up to 0.2 s of variation between runs).
Still, this is a very simple change, and it is a clear win in
benchmarks, so I
think it is worth making.
Commit: a02a0e806fab01f4cf4307443cdaed76a2488752
https://github.com/llvm/llvm-project/commit/a02a0e806fab01f4cf4307443cdaed76a2488752
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
Log Message:
-----------
[mlir][Transforms] `GreedyPatternRewriteDriver`: Better expensive checks encapsulation (#78175)
This change moves most IR verification logic (which is part of the
expensive checks) into `DebugFingerPrints` and renames the struct to
`ExpensiveChecks`. This isolates the debugging logic better from the
remaining code.
This commit also removes a redundant check: the IR is no longer verified
after a failed pattern application. We already assert that the IR did
not change. (We know that the IR was valid before the attempted pattern
application.)
Commit: 480cc413b7f7e73f90646e5feeb598e36e4e9565
https://github.com/llvm/llvm-project/commit/480cc413b7f7e73f90646e5feeb598e36e4e9565
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
Log Message:
-----------
AMDGPU/GlobalISel: Handle inreg arguments as SGPRs (#78123)
This is the missing GISel part of
54470176afe20b16e6b026ab989591d1d19ad2b7
Commit: c0a354dfabfd1534bc6f992b242e5d0ea043120d
https://github.com/llvm/llvm-project/commit/c0a354dfabfd1534bc6f992b242e5d0ea043120d
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/test/Dialect/Vector/vector-contract-to-outerproduct-matvec-transforms.mlir
R mlir/test/Dialect/Vector/vector-contract-to-outerproduct-transforms-unsupported.mlir
Log Message:
-----------
[mlir][vector] Fix invalid IR in `ContractionOpLowering` (#78130)
If a rewrite pattern returns "failure", it must not have modified the
IR. This commit fixes
`Dialect/Vector/vector-contract-to-outerproduct-transforms-unsupported.mlir`
when running with `MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`.
```
* Pattern (anonymous namespace)::ContractionOpToOuterProductOpLowering : 'vector.contract -> ()' {
Trying to match "(anonymous namespace)::ContractionOpToOuterProductOpLowering"
** Insert : 'vector.transpose'(0x5625b3a8cb30)
** Insert : 'vector.transpose'(0x5625b3a8cbc0)
"(anonymous namespace)::ContractionOpToOuterProductOpLowering" result 0
} -> failure : pattern failed to match
} -> failure : pattern failed to match
LLVM ERROR: pattern returned failure but IR did change
```
Note: `vector-contract-to-outerproduct-transforms-unsupported.mlir` is
merged into `vector-contract-to-outerproduct-matvec-transforms.mlir`.
The `greedy pattern application failed` error is not longer produced.
This error indicates that the greedy pattern rewrite did not
convergence; it does not mean that a pattern could not be applied.
Commit: 510626fa65841c5a7d0d909cd343e64c3a9246be
https://github.com/llvm/llvm-project/commit/510626fa65841c5a7d0d909cd343e64c3a9246be
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
Log Message:
-----------
[mlir][vector] Fix invalid IR in `RewriteBitCastOfTruncI` (#78146)
This commit fixes `Dialect/Vector/vector-rewrite-narrow-types.mlir` when
running with `MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`.
```
within split at llvm-project/mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir:1 offset :118:8: error: 'arith.trunci' op operand type 'vector<3xi16>' and result type 'vector<3xi16>' are cast incompatible
%1 = vector.bitcast %0 : vector<16xi3> to vector<3xi16>
^
within split at llvm-project/mlir/test/Dialect/Vector/vector-rewrite-narrow-types.mlir:1 offset :118:8: note: see current operation: %48 = "arith.trunci"(%47) : (vector<3xi16>) -> vector<3xi16>
LLVM ERROR: IR failed to verify after pattern application
```
Commit: cd263a7ee00cf508fef54aa9e42789e6a2e60137
https://github.com/llvm/llvm-project/commit/cd263a7ee00cf508fef54aa9e42789e6a2e60137
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/NameAnonGlobals.h
Log Message:
-----------
[NameAnonGlobals] Mark the pass as required (#78161)
NameAnonGlobals is required when emitting ThinLTO bitcode, otherwise the
bitcode writer will crash.
Commit: f725bb960d45ada3cc4667dd7aa22792d389c7e7
https://github.com/llvm/llvm-project/commit/f725bb960d45ada3cc4667dd7aa22792d389c7e7
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaCXX/cxx1z-class-template-argument-deduction.cpp
Log Message:
-----------
[clang] Fix CTAD not work for function-type and array-type arguments. (#78159)
Fixes https://github.com/llvm/llvm-project/issues/51710.
When transforming a constructor into a corresponding deduction guide,
the decayed types (function/array type) were not handled properly which
made clang fail to compile valid code. The patch teaches clang handle
these decayed type in the transformation.
Commit: 27d963a7089b050d402dbc1ae210d505f7affff6
https://github.com/llvm/llvm-project/commit/27d963a7089b050d402dbc1ae210d505f7affff6
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/Analysis/std-c-library-functions-POSIX.c
M clang/test/Analysis/stream-errno.c
Log Message:
-----------
[clang][analyzer] Improve modeling of 'fseeko' and 'ftello' in StdLibraryFunctionsChecker (#77902)
Commit: 8fd32b96caf37113dd425cd9d0ff8c839c6a048a
https://github.com/llvm/llvm-project/commit/8fd32b96caf37113dd425cd9d0ff8c839c6a048a
Author: Clement Courbet <courbet at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/for-range-copy.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
Log Message:
-----------
[clang-tidy] Handle C++ structured bindings in `performance-for-range-copy` (#77105)
Right now we are not triggering on:
```
for (auto [x, y] : container) {
// const-only access
}
```
Commit: 4b0a76a3d7d590ca1ec60e8a703969be6550ba17
https://github.com/llvm/llvm-project/commit/4b0a76a3d7d590ca1ec60e8a703969be6550ba17
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslate-bf16.ll
Log Message:
-----------
[GlobalISel] Fix buildCopyFromRegs for split vectors (#77448)
Fixes #77055
Commit: 8f2d83da260fc7e1334ee975d9b00344aab51410
https://github.com/llvm/llvm-project/commit/8f2d83da260fc7e1334ee975d9b00344aab51410
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.td
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
Log Message:
-----------
[mlir][bufferization] Add `BufferizableOpInterface::hasTensorSemantics` (#75273)
Add a new interface method to `BufferizableOpInterface`:
`hasTensorSemantics`. This method returns "true" if the op has tensor
semantics and should be bufferized.
Until now, we assumed that an op has tensor semantics if it has tensor
operands and/or tensor op results. However, there are ops like
`ml_program.global` that do not have any results/operands but must still
be bufferized (#75103). The new interface method can return "true" for
such ops.
This change also decouples `bufferization::bufferizeOp` a bit from the
func dialect.
Commit: 01f4d40aad58c5c34a8ae30edbf4e0ebbf235838
https://github.com/llvm/llvm-project/commit/01f4d40aad58c5c34a8ae30edbf4e0ebbf235838
Author: elhewaty <mohamedatef1698 at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/test/Transforms/InstCombine/icmp.ll
Log Message:
-----------
Simplify `(a % b) lt/ge (b-1)` into `(a % b) eq/ne (b-1)` (#72504)
Alive2: https://alive2.llvm.org/ce/z/i7zYtE
Fixes: https://github.com/llvm/llvm-project/issues/71280
Commit: d69efa4015ca41746b1aa517976cc376bce48860
https://github.com/llvm/llvm-project/commit/d69efa4015ca41746b1aa517976cc376bce48860
Author: David Green <david.green at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/test/Analysis/BasicAA/gep-alias.ll
Log Message:
-----------
[BasicAA] Handle disjoint or as add in DecomposeGEP. (#78209)
This removes the MaskedValueIsZero check in decomposing geps in BasicAA, using
the isDisjoint flags instead. This relies on the disjoint flags being present
when AA is ran. The alternative would be to keep the old MaskedValueIsZero check
too if this causes issues.
Commit: e366e04d5a3ae8d469ce8e3c88360a9b5ea51054
https://github.com/llvm/llvm-project/commit/e366e04d5a3ae8d469ce8e3c88360a9b5ea51054
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/PerfHelper.cpp
M llvm/tools/llvm-exegesis/lib/PerfHelper.h
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
M llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp
M llvm/tools/llvm-exegesis/lib/X86/X86Counter.h
Log Message:
-----------
[llvm-exegesis] Refactor Counter to CounterGroup (#77887)
This refactoring gets things ready for validation counters where the
plan is to reuse the existing Counter infrastructure to contain event
groups that consist of a single event that is being measured along with
validation counters.
Commit: 2b08de43506350ec4bd083e320a1913efe76684a
https://github.com/llvm/llvm-project/commit/2b08de43506350ec4bd083e320a1913efe76684a
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/lib/IR/DebugProgramInstruction.cpp
Log Message:
-----------
[RemoveDIs][DebugInfo][NFC] Add Instruction and convenience functions to DPValue (#77896)
This patch adds a set of functions to the DPValue class that
conveniently perform some common operations, and some that replicate
existing functions on `DbgVariableIntrinsic` and its subclasses.
Commit: a690e8675395563aa74d026dc5c0ecc71009f824
https://github.com/llvm/llvm-project/commit/a690e8675395563aa74d026dc5c0ecc71009f824
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
M llvm/unittests/TargetParser/Host.cpp
Log Message:
-----------
[AArch64] Add native CPU detection for Microsoft Azure Cobalt 100. (#77793)
This patch extends the -mcpu/mtune=native support to handle the
Microsoft Azure Cobalt 100 CPU as a Neoverse N2. We expect users to use
-mcpu=neoverse-n2 when targeting this CPU and all the architecture and
codegen decisions to be identical.
The only difference is that the Microsoft Azure Cobalt 100 has a
different Implementer ID in the /proc/cpuinfo entry that needs to be
detected in getHostCPUNameForARM appropriately.
Commit: dca6f60bcdd4a8e6c5defad454d9c470a27701fe
https://github.com/llvm/llvm-project/commit/dca6f60bcdd4a8e6c5defad454d9c470a27701fe
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
Log Message:
-----------
[NFC][clang-tidy]improve performance for misc-unused-using-decls check (#78231)
`UnusedUsingDeclsCheck::removeFromFoundDecls` will be called with high
frequency. At current time it will check every `Context`.
This patch adds a cache to reduce algorithm complexity.
Commit: 2c4a53ad519c64e66257e712d0371f1ab01116d9
https://github.com/llvm/llvm-project/commit/2c4a53ad519c64e66257e712d0371f1ab01116d9
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrShiftRotate.td
M llvm/lib/Target/X86/X86InstrUtils.td
Log Message:
-----------
[X86][NFC] Simplify the definitions of double precision shift instructions
Commit: fd0e06d1118f14e5a90d5f30b1c9d4b69b0a72eb
https://github.com/llvm/llvm-project/commit/fd0e06d1118f14e5a90d5f30b1c9d4b69b0a72eb
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion-allow-in-conditions.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion-cxx98.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.cpp
Log Message:
-----------
[clang-tidy] Fix missing parentheses in readability-implicit-bool-conversion fixes (#74891)
Check now more properly add missing parentheses to code like this: 'bool
bar = true ? 1 : 0 != 0;'.
Closes #71867
Commit: a974303e0c9f0654a76f82e0a3221b6d866a5037
https://github.com/llvm/llvm-project/commit/a974303e0c9f0654a76f82e0a3221b6d866a5037
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/PerfHelper.cpp
M llvm/tools/llvm-exegesis/lib/PerfHelper.h
M llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp
Log Message:
-----------
[llvm-exegesis] Refactor individual counter data to ConfiguredEvent (#77900)
This further sets things up for validation events. Having a separate
abstraction for a configured event that is setup as a counter allows for
much easier creation of more events in the future within a single
counter group (like validation counters) without duplicating any code.
Commit: 8e514c572e44eda237417236b4c92176dfce9cd9
https://github.com/llvm/llvm-project/commit/8e514c572e44eda237417236b4c92176dfce9cd9
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/unittests/Analysis/CMakeLists.txt
A llvm/unittests/Analysis/ReplaceWithVecLibTest.cpp
Log Message:
-----------
Reapply [TLI] Fix replace-with-veclib crash with invalid arguments (#77945)
Fix a crash of `replace-with-veclib` pass, when the arguments of the TLI
mapping do not match the original call.
Now, it simply ignores such cases.
Test require assertions as it accesses programmatically the debug log.
Reapplies reverted PR #77112
Commit: c4c53aee584d51b984d3ee4e4cc11c1bfaf9d3f3
https://github.com/llvm/llvm-project/commit/c4c53aee584d51b984d3ee4e4cc11c1bfaf9d3f3
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] Fix a typo in predicate expression (NFC) (#78162)
This would cause compiler errors if ISel tried to match affected
instructions.
Commit: 8e9e4f8809f6ce93ddc0feb35aee3cc121a2753a
https://github.com/llvm/llvm-project/commit/8e9e4f8809f6ce93ddc0feb35aee3cc121a2753a
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
Log Message:
-----------
[AMDGPU] Remove VT helpers isFloatType, isPackedType, simplify isIntType (#77987)
Commit: 1074b94f5df6e164997cdb494f47657fd49d7cb5
https://github.com/llvm/llvm-project/commit/1074b94f5df6e164997cdb494f47657fd49d7cb5
Author: David Green <david.green at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
M llvm/test/CodeGen/Thumb2/mve-gather-optimisation-deep.ll
Log Message:
-----------
[ARM] Fix phi operand order issue in MVEGatherScatterLowering (#78208)
With commuted operands on the phi node, the two old incoming values
could be removed in the wrong order, removing newly added operand
instead of the old one.
Commit: 60c775769b0ee8f57a41c0667664afb12958eeac
https://github.com/llvm/llvm-project/commit/60c775769b0ee8f57a41c0667664afb12958eeac
Author: Alfie Richards <156316945+AlfieRichardsArm at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
A llvm/test/CodeGen/ARM/sqrshr-uqrshl-unpredictable.ll
A llvm/test/MC/ARM/mve-sqrshr-uqrshl-earlyclobber.s
Log Message:
-----------
[ARM] Add missing earlyclobber to sqrshr and uqrshl instructions. (#77782)
This avoids possible undefined behavior using the same register for Rm
and Rda.
Additionally adds a check in MC to produce an error upon parsing this
case.
Commit: 289999bad76e34441a3a43f4bf32e028b43fad93
https://github.com/llvm/llvm-project/commit/289999bad76e34441a3a43f4bf32e028b43fad93
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-dots.ll
Log Message:
-----------
[Clang] Make sdot builtins available to SME (#77792)
See the specification for more details:
*
https://github.com/ARM-software/acle/blob/main/main/acle.md#udot-sdot-fdot-vectors
*
https://github.com/ARM-software/acle/blob/main/main/acle.md#udot-sdot-fdot-indexed
Commit: de8f782355842a5d3ad44ad8861c53e3ef6fa73a
https://github.com/llvm/llvm-project/commit/de8f782355842a5d3ad44ad8861c53e3ef6fa73a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/test/Transforms/InstCombine/icmp.ll
Log Message:
-----------
Revert "Simplify `(a % b) lt/ge (b-1)` into `(a % b) eq/ne (b-1)` (#72504)"
This reverts commit 01f4d40aad58c5c34a8ae30edbf4e0ebbf235838.
Causes test failures.
Commit: 26d3cd1d07ae3fc8312feb2ab3a3a86414f28c70
https://github.com/llvm/llvm-project/commit/26d3cd1d07ae3fc8312feb2ab3a3a86414f28c70
Author: XChy <xxs_chy at outlook.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
A llvm/test/Transforms/MoveAutoInit/catchswitch.ll
M llvm/test/Transforms/MoveAutoInit/loop.ll
Log Message:
-----------
[MoveAutoInit] Ignore unreachable basicblocks and handle catchswitch (#78232)
Fixes #78049
This patch has done:
- Ignore unreachable predecessors when looking for nearest common
dominator.
- Check catchswitch with `getFirstNonPHI`, instead of
`getFirstInsertionPt`. The latter skips EHPad.
Commit: 17058940c0187f5c4e2118ab0fed22ebe4bf6f26
https://github.com/llvm/llvm-project/commit/17058940c0187f5c4e2118ab0fed22ebe4bf6f26
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxx/include/__utility/cmp.h
Log Message:
-----------
[libc++][utility][NFC] Refactored safe integer `cmp_xxxx` functions to use the `__libcpp_is_integer` concept (#78115)
Replaced a functionally identical internal concept helper.
References:
- https://eel.is/c++draft/utility.intcmp
- https://eel.is/c++draft/basic.fundamental
Co-authored-by: Zingam <zingam at outlook.com>
Commit: 076eb4c79ec7e489a041379b82279bf1740f2bb3
https://github.com/llvm/llvm-project/commit/076eb4c79ec7e489a041379b82279bf1740f2bb3
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Add dependencies for 8e514c572e44eda237417236b4c92176dfce9cd9
Commit: 032c832719b5b2c44b78359ed54b91964ef15b79
https://github.com/llvm/llvm-project/commit/032c832719b5b2c44b78359ed54b91964ef15b79
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[Clang][AArch64] Remove unnecessary and incorrect attributes from arm_sme.h.
These attributes were using the GNU attribute syntax, rather than the new
keyword attribute syntax, and they are no longer required as we have code
in SemaChecking to verify whether a builtin is compatible with its caller.
Commit: c19cacfa34f52b65addeb7239d564b20e3cf2c61
https://github.com/llvm/llvm-project/commit/c19cacfa34f52b65addeb7239d564b20e3cf2c61
Author: martinboehme <mboehme at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/ControlFlowContext.h
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/lib/Analysis/FlowSensitive/ControlFlowContext.cpp
M clang/lib/Analysis/FlowSensitive/DataflowAnalysisContext.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
Log Message:
-----------
[clang][dataflow] Tighten checking for existence of a function body. (#78163)
In various places, we would previously call `FunctionDecl::hasBody()`
(which
checks whether any redeclaration of the function has a body, not
necessarily the
one on which `hasBody()` is being called).
This is bug-prone, as a recent bug in Crubit's nullability checker has
shown
([fix](https://github.com/google/crubit/commit/4b01ed0f14d953cda20f92d62256e7365d206b2e),
[fix for the
fix](https://github.com/google/crubit/commit/e0c5d8ddd7d647da483c2ae198ff91d131c12055)).
Instead, we now use `FunctionDecl::doesThisDeclarationHaveABody()`
which, as the
name implies, checks whether the specific redeclaration it is being
called on
has a body.
Alternatively, I considered being more lenient and "canonicalizing" to
the
`FunctionDecl` that has the body if the `FunctionDecl` being passed is a
different redeclaration. However, this also risks hiding bugs: A caller
might
inadverently perform the analysis for all redeclarations of a function
and end
up duplicating work without realizing it. By accepting only the
redeclaration
that contains the body, we prevent this.
I've checked, and all clients that I'm aware of do currently pass in the
redeclaration that contains the function body. Typically this is because
they
use the `ast_matchers::hasBody()` matcher which, unlike
`FunctionDecl::hasBody()`, only matches for the redeclaration containing
the
body.
Commit: 86bc18ade8f335f03f607142311957129e156efc
https://github.com/llvm/llvm-project/commit/86bc18ade8f335f03f607142311957129e156efc
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrShiftRotate.td
Log Message:
-----------
[X86][NFC] Simplify the definitions of BMI shift/rotate instructions
Commit: b1eaffd389045827a649b95726824bfc5d0de0fd
https://github.com/llvm/llvm-project/commit/b1eaffd389045827a649b95726824bfc5d0de0fd
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/apx/and.ll
Log Message:
-----------
[X86][test] Add test for lowering NDD AND
We supported encoding/decoding for APX AND in #76319
This test should be added in #77564 but was missing.
Commit: e2bb47caa69f393b011c2d8e3295587ae35699b5
https://github.com/llvm/llvm-project/commit/e2bb47caa69f393b011c2d8e3295587ae35699b5
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeVectorStorage.cpp
Log Message:
-----------
[mlir][Arm] Fix invalid rewrite pattern API violations (#78246)
This commit fixes rewrite pattern API violations:
* Rewrite pattern must return "failure" if the IR was not modified.
* In-place op modifications must be communicated to the rewriter
(`updateRootInPlace`).
This commit fixes `test/Dialect/ArmSVE/legalize-vector-storage.mlir`,
`test/Dialect/ArmSME/vector-ops-to-llvm.mlir`,
`test/Dialect/ArmSME/tile-allocation-invalid.mlir`,
`test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir`,
`test/Conversion/ArmSMEToLLVM/tile-spills-and-fills.mlir`,
`test/Conversion/ArmSMEToLLVM/unsupported.mlir` when running with
`MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`.
---------
Co-authored-by: Benjamin Maxwell <macdue at dueutil.tech>
Commit: 3ac9fe69f70a2b3541266daedbaaa7dc9c007a2a
https://github.com/llvm/llvm-project/commit/3ac9fe69f70a2b3541266daedbaaa7dc9c007a2a
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv32-abi.c
A clang/test/CodeGen/RISCV/riscv32-ilp32e-error.c
M clang/test/CodeGen/RISCV/riscv32-vararg.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGen/RISCV/riscv64-vararg.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/Support/RISCVAttributes.h
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
A llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
A llvm/test/CodeGen/RISCV/calling-conv-lp64e.ll
A llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32e.ll
M llvm/test/CodeGen/RISCV/interrupt-attr.ll
A llvm/test/CodeGen/RISCV/rv32e.ll
A llvm/test/CodeGen/RISCV/rv64e.ll
R llvm/test/CodeGen/RISCV/rve.ll
M llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/RISCV/stack-realignment.ll
M llvm/test/CodeGen/RISCV/target-abi-valid.ll
A llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/MC/RISCV/option-invalid.s
M llvm/test/MC/RISCV/target-abi-invalid.s
Log Message:
-----------
[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)
This commit includes the necessary changes to clang and LLVM to support
codegen of `RVE` and the `ilp32e`/`lp64e` ABIs.
The differences between `RVE` and `RVI` are:
* `RVE` reduces the integer register count to 16(x0-x16).
* The ABI should be `ilp32e` for 32 bits and `lp64e` for 64 bits.
`RVE` can be combined with all current standard extensions.
The central changes in ilp32e/lp64e ABI, compared to ilp32/lp64 are:
* Only 6 integer argument registers (rather than 8).
* Only 2 callee-saved registers (rather than 12).
* A Stack Alignment of 32bits (rather than 128bits).
* ilp32e isn't compatible with D ISA extension.
If `ilp32e` or `lp64` is used with an ISA that has any of the registers
x16-x31 and f0-f31, then these registers are considered temporaries.
To be compatible with the implementation of ilp32e in GCC, we don't use
aligned registers to pass variadic arguments and set stack alignment\
to 4-bytes for types with length of 2*XLEN.
FastCC is also supported on RVE, while GHC isn't since there is only one
avaiable register.
Differential Revision: https://reviews.llvm.org/D70401
Commit: 12c7d4c4b4ddbb9ee407bcfbfb79e47ae1de832a
https://github.com/llvm/llvm-project/commit/12c7d4c4b4ddbb9ee407bcfbfb79e47ae1de832a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP] Remove space before :: in member function definition,โฆ (#78205)
โฆ NFC
The names were
```
bool DataSharingProcessor ::needBarrier()
void DataSharingProcessor ::insertBarrier()
```
It seems like clang-format treats those as references to the global
namespace instead of separators in a qualified name.
Commit: da6806dcb45d311efceaba0d770d9027d68a0de9
https://github.com/llvm/llvm-project/commit/da6806dcb45d311efceaba0d770d9027d68a0de9
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
Log Message:
-----------
Improve modeling of two functions in StdLibraryFunctionsChecker (#78079)
Improve 'errno' modeling of 'opendir' and 'fdopendir'.
Commit: c20811b659766469e80317702ee204ef6c4375b4
https://github.com/llvm/llvm-project/commit/c20811b659766469e80317702ee204ef6c4375b4
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libc/CMakeLists.txt
M libc/utils/HdrGen/CMakeLists.txt
M llvm/cmake/modules/CrossCompile.cmake
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[libc] Fix libc-hdrgen crosscompiling (#78227)
The support introduced in 675702f356b0c3a540fa2e8af4192f7d658b2988 is
not working correctly in all scenarios. Instead of setup_host_tool
function, we can use the existing targets introduced by add_tablegen
macro.
Commit: d499df02a2508641d67918d7dc41b2e01a4a4114
https://github.com/llvm/llvm-project/commit/d499df02a2508641d67918d7dc41b2e01a4a4114
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Metadata.cpp
Log Message:
-----------
[RemoveDIs][DebugInfo] Add DPVAssign variant of DPValue (#77912)
This implements the DbgAssignIntrinsic class as a variant of DPValues -
unfortunately this involves increasing the size of the `DebugValueUser`
storage by 3x, but this is necessary to enable assigns to be
represented, and can be offset in a future patch by splitting DPValue
into subclasses such that each variant can store only the fields it
needs. This patch does not actually create DPVAssigns in any case;
future patches will handle this variant in all cases where generic
DPValue handling does not. This patch also does not implement tracking
support for DIAssignIDs, which is necessary to find DPVAssigns that
reference a given DIAssignID; that is added in a subsequent patch.
Commit: 4967d98eda48bed4a6f382d240f5a33177bc654c
https://github.com/llvm/llvm-project/commit/4967d98eda48bed4a6f382d240f5a33177bc654c
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libunwind/src/libunwind.cpp
Log Message:
-----------
[libunwind][WebAssembly] Fix libunwind.cpp guard (#78230)
This should have been `&&`, meaning neither SjLj nor Wasm uses this
file.
Commit: a9bfad2b9b04772836827c351a9365a7cbddcba0
https://github.com/llvm/llvm-project/commit/a9bfad2b9b04772836827c351a9365a7cbddcba0
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][llvm] Sort load statements
Commit: 93d39657f5e60db99b004d898406d1304705a87f
https://github.com/llvm/llvm-project/commit/93d39657f5e60db99b004d898406d1304705a87f
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
Log Message:
-----------
[RISCV] Remove -riscv-v-vector-bits-min flag that was left behind. NFC
This should have been removed in 74f985b793bf4005e49736f8c2cef8b5cbf7c1ab
Commit: 9e068cd78491d371f30fa2c5eeed98585adbef80
https://github.com/llvm/llvm-project/commit/9e068cd78491d371f30fa2c5eeed98585adbef80
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-cache-construct.c
Log Message:
-----------
[OpenACC} Improve diagnostics for 'tag's on clauses/directives (#77957)
The 'cache' directive and various clauses have a 'tag' name that is
optional. This patch cleans up the use of the 'cache' version so that we
get a nicer diagnostic, and enables us to do the same with clauses in
the same situation.
Commit: da7607307a5eed532d1ad9d2cd020e67b299b129
https://github.com/llvm/llvm-project/commit/da7607307a5eed532d1ad9d2cd020e67b299b129
Author: Stephen Tozer <Stephen.Tozer at Sony.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/IR/Metadata.cpp
Log Message:
-----------
[RemoveDIs][DebugInfo] Explicitly convert iterator to pointer for std::distance
This is a small patch attempting to fix an error with a prior patch which
caused buildbot failures on certain targets; for example:
https://lab.llvm.org/buildbot/#/builders/127/builds/60931
The compile error comes from std::distance not having an overload for a
std::array iterator and a raw pointer; this patch converts the iterator
to a pointer to resolve this.
Fixes d499df02
Commit: 6011d6b2cceaed14b03c6a9759b4af3b56bdc262
https://github.com/llvm/llvm-project/commit/6011d6b2cceaed14b03c6a9759b4af3b56bdc262
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Use start value of reduction phi to determine type (NFCI).
Instead of accessing the underlying original IR value, check the type of
the start value from the recipe directly.
Commit: fdbf255c96cb18bc1fb08fa7264446bcbbd5fbd0
https://github.com/llvm/llvm-project/commit/fdbf255c96cb18bc1fb08fa7264446bcbbd5fbd0
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
R libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/utils/FPUtil/x86_long_double_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
Log Message:
-----------
[libc][NFC] Refactor FPBits and remove LongDoubleBits specialization (#78192)
This patch removes the `FPBits` specialization for x86 Extended Precision by moving it up to `FPRep`.
It also introduces enums (`Exponent`, `BiasedExponent` and `Significand`) to represent the exponent and significant parts of the floating point numbers. These enums are used to construct and observe floating point representations.
Additionally, we remove `LongDoubleBits.h` that is now unnecessary.
Commit: 19cab7ef2e14d6e6b174019b6fd1549b476e1907
https://github.com/llvm/llvm-project/commit/19cab7ef2e14d6e6b174019b6fd1549b476e1907
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/pseudo/lib/grammar/BUILD.gn
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Log Message:
-----------
[gn] port 8e7f073eb42c (-gen-clang-regular-keyword-attr-info)
Commit: 23bfc271a316345459809427d98e942455d0e2b6
https://github.com/llvm/llvm-project/commit/23bfc271a316345459809427d98e942455d0e2b6
Author: martinboehme <mboehme at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/unittests/Analysis/FlowSensitive/DataflowEnvironmentTest.cpp
Log Message:
-----------
[clang][dataflow] Use `ignoreCFGOmittedNodes()` in `setValue()`. (#78245)
This is to be consistent with `getValue()`, which also uses
`ignoreCFGOmittedNodes()`.
Before this fix, it was not possible to retrieve a `Value` from a "CFG
omitted"
node that had previously been set using `setValue()`; see the
accompanying test,
which fails without the fix.
I discovered this issue while running internal integration tests on
https://github.com/llvm/llvm-project/pull/78127.
Commit: 279dfe77da718734ccc6ebd8ae6c40357c9d6721
https://github.com/llvm/llvm-project/commit/279dfe77da718734ccc6ebd8ae6c40357c9d6721
Author: Maciej Gabka <maciej.gabka at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
Log Message:
-----------
[TLI][AArch64] Add extra SLEEF mappings and tests (#78140)
This patch is adding more scalar to vector mappings to the TLI
for the SLEEF vector library.
The added mappings are for the following functions:
acosh, asinh, cbrt, copysign, cospi
erf, erfc, expm1, fdim, fma, fmax, fmin
hypot, ilogb, ldexp, log1p, nextafter, sinpi.
It also brings back accidentally removed tests for sincospi.
Commit: d79fdb2749b26d1d6801a85090fa36a66a56036f
https://github.com/llvm/llvm-project/commit/d79fdb2749b26d1d6801a85090fa36a66a56036f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
Log Message:
-----------
[SLP]Fix PR78236: correctly track external values, replaced several
times during reduction vectorization.
If the external value was replaced in the vectorizer several times during reduction vectorization, need to find the original value to correctly handle external uses and emit extractelement instructions properly.
Commit: dfaf09b5d1a0da1a700808d35a12a2a15f38f4ab
https://github.com/llvm/llvm-project/commit/dfaf09b5d1a0da1a700808d35a12a2a15f38f4ab
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrShiftRotate.td
Log Message:
-----------
[X86][NFC] Simplify the patterns of BMI shift/rotate instructions in X86InstrShiftRotate.td
This patch is to extract NFC in #77433 into a separate commit.
Commit: a63d7872f059784c9bfd24adb37e868247f3cfc9
https://github.com/llvm/llvm-project/commit/a63d7872f059784c9bfd24adb37e868247f3cfc9
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Revert "[bazel][llvm] Sort load statements"
This reverts commit a9bfad2b9b04772836827c351a9365a7cbddcba0.
Commit: d835d6f4fface8ac093b7583e07f4ce5b1802042
https://github.com/llvm/llvm-project/commit/d835d6f4fface8ac093b7583e07f4ce5b1802042
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/Parse/ParseOpenACC.cpp
Log Message:
-----------
[OpenACC} Improve diagnostics for 'tag's on clauses/directives
The 'cache' directive and various clauses have a 'tag' name that is
optional. This patch cleans up the use of the 'cache' version so that
we get a nicer diagnostic, and enables us to do the same with clauses in
the same situation.
Commit: d5000e9cd95b720fc9082da6cdcdb2c865303dcf
https://github.com/llvm/llvm-project/commit/d5000e9cd95b720fc9082da6cdcdb2c865303dcf
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/Parse/ParseOpenACC.cpp
Log Message:
-----------
rename to 'try' isntead of 'Try'x
Commit: eca25bbdbb4f4681cd82de80e92b5f1315f0996a
https://github.com/llvm/llvm-project/commit/eca25bbdbb4f4681cd82de80e92b5f1315f0996a
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'copyout' clause parsing.
This is a fairly simple clause that just requires parsing a potential
'zero:' in front of a Clause var-list. This patch implements/tests
that.
Commit: aa440aae36474525211d02bbc0d120cc90c91cbf
https://github.com/llvm/llvm-project/commit/aa440aae36474525211d02bbc0d120cc90c91cbf
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
A flang/test/Driver/pthread.f90
Log Message:
-----------
[flang][Driver] Support -pthread in the frontend (#77360)
The -pthread option seems to be extensively tested for various platforms by
clang. Since flang uses those parts of the clang driver, the only test added
is to ensure that the option is recognized by the frontend.
Commit: e7671bc9d6da20ed7ed5877bb3c43c373019886f
https://github.com/llvm/llvm-project/commit/e7671bc9d6da20ed7ed5877bb3c43c373019886f
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Fix indent for loop in adjustRecipesForReductions (NFC).
Commit: c1a442462d9d47f86392da7e7019ab218d7a3088
https://github.com/llvm/llvm-project/commit/c1a442462d9d47f86392da7e7019ab218d7a3088
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind] Move errno.h and signal.h includes under the block where they're needed (#78054)
Commit fc1c478709e3 added includes of <signal.h> and <errno.h> to
UnwindCursor.hpp. The library previously built on platforms where these
headers are not provided. These headers should be included only in the
case where they are actually needed, i.e. on Linux.
Commit: bd26ce47c820858856bd33f20b0c606973155f51
https://github.com/llvm/llvm-project/commit/bd26ce47c820858856bd33f20b0c606973155f51
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp
M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
Log Message:
-----------
[mlir][llvm] Fix loop annotation parser (#78266)
This revision moves the ArrayRef field of the LoopAnnotation attribute
to the end of the struct to enable printing and parsing of the
attribute. Previously, the parsing could fail in the presence of a start
or end loc.
Commit: 118d4234ac6d0893974d324cdb738a1e0255c08d
https://github.com/llvm/llvm-project/commit/118d4234ac6d0893974d324cdb738a1e0255c08d
Author: Koakuma <koachan at protonmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
A llvm/test/CodeGen/SPARC/getpcx-call.ll
A llvm/test/CodeGen/SPARC/getpcx-rdpc.ll
Log Message:
-----------
[SPARC] Prefer RDPC over CALL to implement GETPCX for 64-bit target
On 64-bit target, prefer using RDPC over CALL to get the value of %pc.
This is faster on modern processors (Niagara T1 and newer) and avoids
polluting the processor's predictor state.
The old behavior of using a fake CALL is still done when tuning for
classic UltraSPARC processors, since RDPC is much slower there.
A quick pgbench test on a SPARC T4 shows about 2% speedup on SELECT
loads, and about 7% speedup on INSERT/UPDATE loads.
Reviewed By: @s-barannikov
Github PR: https://github.com/llvm/llvm-project/pull/78280
Commit: 7b8f7f75a0be5571f3b01a9cebbfce929bbc76b3
https://github.com/llvm/llvm-project/commit/7b8f7f75a0be5571f3b01a9cebbfce929bbc76b3
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement copyin/create clause parsing.
Implement two more clauses, copyin and create. These are both pretty
simple in that they are just a tag followed by a var-list.
Commit: 9a402d6fbbeff21d72fc49befef7571ddaf39227
https://github.com/llvm/llvm-project/commit/9a402d6fbbeff21d72fc49befef7571ddaf39227
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
Log Message:
-----------
[LV] Make DL optional argument for VPBuilder member functions (NFCI).
Commit: 1617c8d3b8c5fc5d1ec54e4e1b2c43679e573065
https://github.com/llvm/llvm-project/commit/1617c8d3b8c5fc5d1ec54e4e1b2c43679e573065
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/include/lldb/Host/Config.h.cmake
M lldb/tools/driver/Driver.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/tools/lldb-server/lldb-server.cpp
M llvm/CMakeLists.txt
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
Log Message:
-----------
[lldb] Add LLDB_BUG_REPORT_URL macro to allow a different URL for lldb bug reporting. (#78210)
This allows release teams to customize the bug report url for lldb. It
also removes unnecessary constructions of
`llvm::PrettyStackTraceProgram` as it's already constructed inside
`llvm::InitLLVM`.
Commit: 77610dd10454e87bb387040d2b51100a17ac5755
https://github.com/llvm/llvm-project/commit/77610dd10454e87bb387040d2b51100a17ac5755
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
Log Message:
-----------
[libc++abi] Fix typo in CMake error message
Commit: f1ef910b97d6acb80480b79a4144541311369cc9
https://github.com/llvm/llvm-project/commit/f1ef910b97d6acb80480b79a4144541311369cc9
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/include/lldb/Core/DebuggerEvents.h
M lldb/include/lldb/Core/Progress.h
M lldb/source/Core/Progress.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolLocator/Default/SymbolLocatorDefault.cpp
M lldb/test/API/functionalities/progress_reporting/TestProgressReporting.py
Log Message:
-----------
[lldb][Progress] Separate title and details (#77547)
Per this RFC:
https://discourse.llvm.org/t/rfc-improve-lldb-progress-reporting/75717
on improving progress reports, this commit separates the title field and
details field so that the title specifies the category that the progress
report falls under. The details field is added as a part of the
constructor for progress reports and by default is an empty string. In addition, changes the total amount of progress completed into a std::optional. Also
updates the test to check for details being correctly reported from the
event structured data dictionary.
Commit: 6c1b5ec213ee7376bed9357211e5582931318974
https://github.com/llvm/llvm-project/commit/6c1b5ec213ee7376bed9357211e5582931318974
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrShiftRotate.td
Log Message:
-----------
[X86][NFC] Simplify the patterns of BMI shift/rotate instructions in X86InstrCompiler.td
This patch is to extract NFC in #77433 into a separate commit.
Commit: 154cea4d4ab762174bc44676452fb94879a5659e
https://github.com/llvm/llvm-project/commit/154cea4d4ab762174bc44676452fb94879a5659e
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Log Message:
-----------
[gn build] Port 8e21557d0401
Commit: a7d01da7d7d2b1936755b85c2553abaed19fdb16
https://github.com/llvm/llvm-project/commit/a7d01da7d7d2b1936755b85c2553abaed19fdb16
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port 8e514c572e44
Commit: 27acfdd2ded8c3b246dc2580ba43c285741b1dfd
https://github.com/llvm/llvm-project/commit/27acfdd2ded8c3b246dc2580ba43c285741b1dfd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/tools/clang-linker-wrapper/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Frontend/Offloading/BUILD.gn
Log Message:
-----------
[gn build] Port 9fa9d9a7e1cd
Commit: cbaadb1f0ff9966a65c926b3d8c32f2f47281b73
https://github.com/llvm/llvm-project/commit/cbaadb1f0ff9966a65c926b3d8c32f2f47281b73
Author: Julian Schmidt <44101708+5chmidti at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Log Message:
-----------
[clang][ASTMatcher] Add matchers for CXXFoldExpr (#71245)
Adds support for the following matchers related to `CXXFoldExpr`:
`cxxFoldExpr`, `callee`,
`hasInit`, `hasPattern`, `isRightFold`, `isLeftFold`,
`isUnaryFold`, `isBinaryFold`, `hasOperator`, `hasLHS`, `hasRHS`.
Commit: f1f1875c18b8ba794a073e924b5c61f0ff7ae60b
https://github.com/llvm/llvm-project/commit/f1f1875c18b8ba794a073e924b5c61f0ff7ae60b
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libc/CMakeLists.txt
Log Message:
-----------
[libc][cmake] reset COMPILE_DEFINITIONS (#77810)
While trying to enable -Werror (#74506), the 32b ARM build bot reported
an
error stemming from -Wshorten-64-to-32 related to usages of `off_t`.
I failed to fix these properly in #77350 (the 32b ARM build is not a
fullbuild)
and #77396.
It turns out, the preprocessor defines `-D_LARGEFILE_SOURCE` and
`-D_FILE_OFFSET_BITS=64` were being set for llvmlibc when using the
cmake build
system. In particular, these preprocessor defines are feature test
macros used
by glibc, and which have effects no the corresponding ABI for types like
`off_t` (for instance, should `off_t` be 32b or 64b on 32b targets).
But who was setting these? Turns out that the use of
add_compile_definitions
in llvm/cmake/modules/HandleLLVMOptions.cmake was setting these (and
more),
which is then inherited by every subdirectory. While some of these
defines
maybe make sense for host builds, they do not make sense for libraries
for the
target. The full list of defines being set prior to this commit:
- `-D_GNU_SOURCE`
- `-D_FILE_OFFSET_BITS=64`
- `-D_DEBUG`
- `-D_GLIBCXX_ASSERTIONS`
- `-D_LARGEFILE_SOURCE`
- `-D_FILE_OFFSET_BITS=64`
- `-D__STDC_CONSTANT_MACROS`
- `-D__STDC_FORMAT_MACROS`
- `-D__STDC_LIMIT_MACROS`
If we desire any of the above, we should manually reset them.
Fix this by resetting COMPILE_DEFINITIONS for the libc/ subdirectory.
Side note: to debug 'directory properties' in cmake, you first need to
use
`get_directory_property` to fetch the corresponding value into a
variable
first, then that variable can be printed via `message`.
Link:
https://www.gnu.org/software/libc/manual/html_node/Feature-Test-Macros.html#index-_005fFILE_005fOFFSET_005fBITS
Link:
https://www.gnu.org/software/libc/manual/html_node/Feature-Test-Macros.html#index-_005fFILE_005fOFFSET_005fBITS
Fixes: #77395
Commit: a4ec04ea77afa8fb6c08fe8f77c664c95a5eb62e
https://github.com/llvm/llvm-project/commit/a4ec04ea77afa8fb6c08fe8f77c664c95a5eb62e
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
M llvm/test/Verifier/sme-attributes.ll
M llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
Log Message:
-----------
[AArch64][SME2] Add ZT0 attributes to SMEAttrs (#77607)
This patch extends SMEAttrs to interpret the following new attributes,
which are mutually exclusive and apply to SME2 only:
- aarch64_sme_zt0_in (ZT0_In)
- aarch64_sme_zt0_out (ZT0_Out)
- aarch64_sme_zt0_inout (ZT0_InOut)
- aarch64_sme_zt0_new (ZT0_New)
- aarch64_sme_zt0_preserved (ZT0_Preserved)
ZT0_In, ZT0_Out, ZT0_InOut & ZT0_Preserved are all considered to share
ZT0. These attributes will be required by later patches to determine
if ZT0 should be preserved around function calls, or cleared on entry
to the function.
Commit: 127fc7930a7571694888f057ca6f17314b23d355
https://github.com/llvm/llvm-project/commit/127fc7930a7571694888f057ca6f17314b23d355
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
R libcxx/docs/ReleaseNotes/17.rst
M libcxx/docs/index.rst
Log Message:
-----------
[libc++][doc] Removes LLVM-17 release notes. (#78062)
The old notes are kept to make it easier to backport changes to the
release branch. There are no LLVM-17 releases expected and this
documentation should not be available in the LLVM-18 release.
Note after branching LLVM-18 both LLVM-18 and LLVM-19 release notes
should be available.
Commit: a8b3deb2c8be419c06c258751d4d5ba03699afac
https://github.com/llvm/llvm-project/commit/a8b3deb2c8be419c06c258751d4d5ba03699afac
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxx/include/ostream
M libcxx/include/print
Log Message:
-----------
[libc++][print] Renames __use_unicode. (#76290)
This is addresses a review comment in #73262.
Commit: 82d21814e6556480a71c83a2f8da350d0c8cadf6
https://github.com/llvm/llvm-project/commit/82d21814e6556480a71c83a2f8da350d0c8cadf6
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxx/include/ostream
M libcxx/include/print
A libcxx/test/libcxx/input.output/iostream.format/output.streams/ostream.syn/includes.compile.pass.cpp
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
A libcxx/test/std/input.output/iostream.format/print.fun/includes.compile.pass.cpp
Log Message:
-----------
[libc++][print] Includes <format>. (#76333)
The overloads of `println` are specified in terms of `format`. The
function `format` is specified to work with ranges.
The implementations for `println` do not include `<format>`, but
libc++'s granularized header. This means the following example does not
work
#include <vector>
#include <print>
int main() {
std::vector<int> v{1, 2, 3};
std::println("{}", v);
}
(The other print functions also require this to work, they are specified
in terms of other format functions.)
Fixes: https://github.com/llvm/llvm-project/issues/71925
Commit: 662d1cb86bc156f4c8b5d991b3262e3649479540
https://github.com/llvm/llvm-project/commit/662d1cb86bc156f4c8b5d991b3262e3649479540
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/pr78109.ll
Log Message:
-----------
[X86] Add test case for Issue #78109
Commit: be690ea3dbd3b92265ecf620b158f4715c97d040
https://github.com/llvm/llvm-project/commit/be690ea3dbd3b92265ecf620b158f4715c97d040
Author: yonillasky <yonillasky at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
Log Message:
-----------
[Coroutines] Fix incorrect attribute name coroutine.presplit (NFC) (#78296)
Those are probably leftovers from an old name of the same attribute.
Fixed for the sake of consistency.
Co-authored-by: Yoni Lavi <yoni.lavi at nextsilicon.com>
Commit: 7fe5269b544b33c9e32de50b76fe0b67022de6d3
https://github.com/llvm/llvm-project/commit/7fe5269b544b33c9e32de50b76fe0b67022de6d3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Bump Zfbfmin, Zvfbfmin, and Zvfbfwma to 1.0. (#78021)
Commit: 847c78726920e4a29d71bdc3a46c92a0bc26bfc4
https://github.com/llvm/llvm-project/commit/847c78726920e4a29d71bdc3a46c92a0bc26bfc4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
A llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
Log Message:
-----------
[RISCV] Add scheduler model for sifive-p450. (#77989)
This is a slightly cleaned up version of what we've been using in our
downstream toolchain.
Commit: 03f260fd831fb0e5cd77599afb0437a36bc1cd0c
https://github.com/llvm/llvm-project/commit/03f260fd831fb0e5cd77599afb0437a36bc1cd0c
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M flang/CMakeLists.txt
Log Message:
-----------
[flang] Add install target to install flang headers (#78151)
This makes it more convenient to install flang without using the general
`ninja install` to install everything.
To install flang-new and associated things one needs `ninja
install-flang-new install-flang-libraries install-flang-headers`.
Commit: d88c1f94894ff568d1f5fa2dfc9219a9361d9932
https://github.com/llvm/llvm-project/commit/d88c1f94894ff568d1f5fa2dfc9219a9361d9932
Author: Alina Sbirlea <asbirlea at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/test/MC/ARM/pcrel-ldrd-same-section.s
Log Message:
-----------
[MC][ARM] Fix test.
Commit: 371fdbaa57c3eaeea0f99591ae9675ecaa0cd1ad
https://github.com/llvm/llvm-project/commit/371fdbaa57c3eaeea0f99591ae9675ecaa0cd1ad
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll
Log Message:
-----------
[AMDGPU] Sign extend simm16 in setreg intrinsic (#77997)
We currently force users to use a negative contant in the intrinsic
call. Changing it zext would break existing programs, so just sign
extend an argument.
Commit: 093206bb7eddf53cf6e1ffe4c0ffc09d37785e27
https://github.com/llvm/llvm-project/commit/093206bb7eddf53cf6e1ffe4c0ffc09d37785e27
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/gep-nonconst-idx-transformed-to-const.ll
Log Message:
-----------
[SLP]Fix PR78298: Assertion `GEP->getNumIndices() == 1 &&
!isa<Constant>(GEPIdx)' failed.
The non-constant index might be folded to constant during earlier stages
of vectorization. Need to consider this option and filter out out GEP
with the constant indices from the candidates list.
Commit: 7850c94b86ac4889f4c792a487f4c0b0c5759a98
https://github.com/llvm/llvm-project/commit/7850c94b86ac4889f4c792a487f4c0b0c5759a98
Author: David Green <david.green at arm.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/MC/MCSymbol.h
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Transforms/ObjCARC/DependencyAnalysis.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
Log Message:
-----------
[NFC] sentinal -> sentinel
Commit: d6ee91b1100a3356506643da37cbd6891a663db9
https://github.com/llvm/llvm-project/commit/d6ee91b1100a3356506643da37cbd6891a663db9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
Log Message:
-----------
[X86] Add test case for Issue #77805
Commit: 9c4e7a159b1f2228ddf146c58c2478418cd63e86
https://github.com/llvm/llvm-project/commit/9c4e7a159b1f2228ddf146c58c2478418cd63e86
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'self' clause parsing on 'update'.
The update directive has its own version of 'self' that has a 'var-list'
instead of a 'condition' (like the serial/parallel/kernel/combined
constructs). This patch special cases it on 'update' to make sure we
parse this correctly.
Commit: fc64a7342c6cec1a3a1a62348990b912ac7dfaf0
https://github.com/llvm/llvm-project/commit/fc64a7342c6cec1a3a1a62348990b912ac7dfaf0
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[mlir][sparse][codeowners] add MLIR sparsifier team to codeowners (#78319)
Commit: 65ecbdf61f5a3fb53f05abc610b90a8671f93730
https://github.com/llvm/llvm-project/commit/65ecbdf61f5a3fb53f05abc610b90a8671f93730
Author: Yitzhak Mandelbaum <ymand at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Value.cpp
M clang/unittests/Analysis/FlowSensitive/ValueTest.cpp
Log Message:
-----------
[clang][dataflow] Fix bug in `Value` comparison. (#76746)
Makes value equivalence require that the values have no properties,
except in
the case of equivalence by pointer equality (if the pointers are equal,
nothing
else is checked).
Fixes issue #76459.
Commit: e0443624b9b418cd2a1b26cac662885aedfb4977
https://github.com/llvm/llvm-project/commit/e0443624b9b418cd2a1b26cac662885aedfb4977
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/UsingLibcxx.rst
M libcxx/include/__config
M libcxx/test/libcxx/depr/enable_removed_cpp17_features.compile.pass.cpp
A libcxx/test/libcxx/depr/enable_removed_cpp17_features.deprecated.verify.cpp
A libcxx/test/libcxx/depr/enable_removed_cpp20_features.deprecated.verify.cpp
Log Message:
-----------
[libc++] Deprecate removed features macros. (#77879)
We discussed the removal of these enable-all macros in the libc++
monthly meeting and we agreed that we should deprecate these macros in
LLVM 18, and then remove them in LLVM 19 since they can silently enable
deprecated features that are implemented after the first release of the
macro.
This patch does the first part of this -- it deprecates the macro.
Note that the file
test/libcxx/depr/enable_removed_cpp20_features.compile.pass.cpp
does not exist so this file is not adapted. Since the feature is
deprecated and slated for removal soon the missing test is not
implemented.
Partly addresses: https://github.com/llvm/llvm-project/issues/75976
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 34933d1872b5eefb94dbd30dce3c342db008ad1c
https://github.com/llvm/llvm-project/commit/34933d1872b5eefb94dbd30dce3c342db008ad1c
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxx/include/barrier
M libcxx/include/future
M libcxx/include/latch
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/stop_token
M libcxx/include/thread
Log Message:
-----------
[libc++] Improves _LIBCPP_HAS_NO_THREADS guards. (#76624)
Previously the header included several headers, possibly granularized
threading headers. This could lead to build errors when these headers
were incompatible with threading disabled.
Now test the guard before inclusion. This matches the pattern used for
no localization and no wide characters.
Fixes: https://github.com/llvm/llvm-project/issues/76620
Commit: 4a87db6b10a075849673247ded426504561a8a25
https://github.com/llvm/llvm-project/commit/4a87db6b10a075849673247ded426504561a8a25
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxx/include/__availability
M libcxx/include/ostream
M libcxx/src/ostream.cpp
M libcxx/test/libcxx/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/locale-specific_form.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/print.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/println.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_nonunicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libc++][print] Enables it on Apple backdeployment. (#76293)
As suggested in #73262 this enable the stream printing on Apple
backdeployment targets. This omits the check whether the file is a
terminal. This is not entirely conforming, but the differences should be
minor and are typically not observable.
Fixes https://github.com/llvm/llvm-project/issues/75225
Commit: 8803112beedde4d7b7d396bea457085a754914f3
https://github.com/llvm/llvm-project/commit/8803112beedde4d7b7d396bea457085a754914f3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxx/docs/UsingLibcxx.rst
Log Message:
-----------
[libc++][NFC] Add deprecated mention for _LIBCPP_ENABLE_CXX20_REMOVED_ALLOCATOR_MEMBERS in the docs
This was missed in the patch where I marked the macro as deprecated.
Commit: 127c390fc413f8f267b085b153e6d21f84c7886e
https://github.com/llvm/llvm-project/commit/127c390fc413f8f267b085b153e6d21f84c7886e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxx/include/libcxx.imp
M libcxx/utils/generate_iwyu_mapping.py
M libcxx/utils/libcxx/header_information.py
Log Message:
-----------
[libc++] Rewrite the IWYU generation (#78295)
This simplifies the IWYU generation script by treating everything as a
file, instead of dealing with directories and files separately.
This has the downside that the `libcxx.imp` file is a lot larger than it
used to be, however we now have the flexibility of mapping files under
detail directories to different public headers. For example, this allows
us to map <__fwd/subrange.h> to <ranges> but <__fwd/pair.h> to
<utility>.
This patch also adds basic validation to ensure that we never map a
header to a public header that doesn't exist. We may still be missing
some mappings or we may be mapping to incorrect headers, but we won't be
mapping to headers that downright don't exist.
Fixes #63346
Commit: 8d7bba0d5a8f024f44995adb9f3286c00b316689
https://github.com/llvm/llvm-project/commit/8d7bba0d5a8f024f44995adb9f3286c00b316689
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/Fuchsia.cmake
Log Message:
-----------
[CMake] Include riscv32-unknown-elf runtimes in Fuchsia toolchain (#78323)
This contains compiler-rt builtins and llvm-libc for baremetal use.
Differential Revision: https://reviews.llvm.org/D155337
Commit: 7e909d58d1862686375a0a71fd907151b109c2db
https://github.com/llvm/llvm-project/commit/7e909d58d1862686375a0a71fd907151b109c2db
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M .github/workflows/docs.yml
Log Message:
-----------
[libc++][CI] Fixes documentation builder. (#78327)
The documentation CI no longer builds. This is likely introduced by
8f90e6937a1fac80873bb2dab5f382c82ba1ba4e. This fixes the issue.
Commit: aa23e493f2b363982a472fe38caffc69d907402c
https://github.com/llvm/llvm-project/commit/aa23e493f2b363982a472fe38caffc69d907402c
Author: mmoadeli <mmoadeli at hotmail.co.uk>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/shuffle-vec-undef-init.ll
Log Message:
-----------
[NVPTX] Fix generating permute bytes from register pair when the initial values are undefined (#74437)
When generating the permute bytes for the prmt instruction, the
existence of an undefined initial value initialises the int32 that holds
the mask with all 1's (0xFFFFFFFF). That initialization subsequently
leads to complications during the subsequent OR operation, leading to
inaccuracies in populating mask values for the following bytes.
Consequently, the final value persists as a constant -1, irrespective of
the actual mask values that succeed the initial set value.
Commit: ab398416a7932d9b85e216353b7c847189c1a597
https://github.com/llvm/llvm-project/commit/ab398416a7932d9b85e216353b7c847189c1a597
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libcxx/modules/std/memory.inc
Log Message:
-----------
[libc++][modules] Fixes RTTI build.
This was reviewed in https://github.com/llvm/llvm-project/pull/76246
Commit: 070738ba8894ed2c4ef02b07cfb7ce27d3d024ec
https://github.com/llvm/llvm-project/commit/070738ba8894ed2c4ef02b07cfb7ce27d3d024ec
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf][NFC] Explicitly specify llvm version of function_ref (#77783)
As suggested in https://github.com/llvm/llvm-project/pull/75823, to
avoid confusion with std::function_ref, qualify all uses with llvm::
(we were already using the llvm version, but this avoids ambiguity).
Commit: 32dd5b20973bde1ef77fa3b84b9f85788a1a303a
https://github.com/llvm/llvm-project/commit/32dd5b20973bde1ef77fa3b84b9f85788a1a303a
Author: jimingham <jingham at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
Log Message:
-----------
Work around a bug in the interaction between newer dyld's and older simulator dyld's (#78004)
There's a bad interaction between the macOS 14 dyld and the "dyld_sim"
shim that comes from older (iOS 15) simulator downloads that results in
dyld reporting some modules twice in the return from the dyld callback
to list modules. The records were identical, but lldb wasn't happy with
seeing the duplicates...
Since it's not possible to load two different modules at the same
address, this change just picks the first instance of any entries that
have the same load address.
There really isn't a good way to test this patch.
Commit: 3973955282121cf97fb3b77c4bac0a89dcf82591
https://github.com/llvm/llvm-project/commit/3973955282121cf97fb3b77c4bac0a89dcf82591
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'reduction' clause parsing.
The 'reduction' clause takes a mandatory operator followed by a colon,
followed by a 'var-list'. This patch implements the parsing for the
'reduction' clause.
Commit: 16b238798250cb16ac78c710958b353cb45b11a0
https://github.com/llvm/llvm-project/commit/16b238798250cb16ac78c710958b353cb45b11a0
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
Log Message:
-----------
[llvm-exegesis] Fix snippet value scaling (#77226)
Currently, BenchmarkRunner scales the per snippet counters by
multiplying the raw counter values by the number of instructions (casted
to a double) divided by the minimum number of instructions. This is
incorrect for the loop repetition mode for snippets that don't fit a
whole number of times into the minimum instruction count. For example,
with 3 instructions in the snippet and the minimum number of
instructions set to 4, the loop repetitor will execute a total of six
instructions, but BenchmarkRunner will scale the raw count by 3/4
instead of 3/6=1/2. This will also be incorrect for the duplicate
snippet repetitor after #77224.
This patch fixes this behavior by dividing the raw count by the ceiling
of the number of repetitions divided by the instruction count.
Commit: bbb3f9b1321176a012dac7d50da54b869a85e9bc
https://github.com/llvm/llvm-project/commit/bbb3f9b1321176a012dac7d50da54b869a85e9bc
Author: Pranav Kant <prka at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/test/MC/ARM/pcrel-vldr-same-section.s
Log Message:
-----------
[MC][ARM] Fix test
Similar to d88c1f94894ff568d1f5fa2dfc9219a9361d9932
Commit: 184784690dabba638730c2d365a5e9f4062317d3
https://github.com/llvm/llvm-project/commit/184784690dabba638730c2d365a5e9f4062317d3
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/MIR/BUILD.gn
Log Message:
-----------
[gn build] Manually port 8566cd61
Commit: 337b7715929909fd2bb55069ecb939cf23dbfe52
https://github.com/llvm/llvm-project/commit/337b7715929909fd2bb55069ecb939cf23dbfe52
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
A libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/utils/FPUtil/x86_long_double_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
R utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
Log Message:
-----------
Revert "[libc][NFC] Refactor FPBits and remove LongDoubleBits specialization (#78192)" (#78329)
This reverts commit fdbf255c96cb18bc1fb08fa7264446bcbbd5fbd0.
Causes build breakage on 32b arm (see reports:
https://github.com/llvm/llvm-project/pull/78192).
These are reproducible for the 32b arm baremetal target on x86 hosts as
well.
Commit: 4737959d91fab7673b1bb642f88658bb2a24d723
https://github.com/llvm/llvm-project/commit/4737959d91fab7673b1bb642f88658bb2a24d723
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
A clang/include/clang/AST/APNumericStorage.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/Expr.h
M clang/lib/AST/Decl.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
Log Message:
-----------
[AST] Use APIntStorage to fix memory leak in EnumConstantDecl. (#78311)
EnumConstantDecl is allocated by the ASTContext allocator so the
destructor is never called.
This patch takes a similar approach to IntegerLiteral by using
APIntStorage to allocate large APSInts using the ASTContext allocator as
well.
The downside is that an additional heap allocation and copy of the data
needs to be made when calling getInitValue if the APSInt is large.
Fixes #78160.
Commit: 59a265311a072437232767c228263bea0c0074b5
https://github.com/llvm/llvm-project/commit/59a265311a072437232767c228263bea0c0074b5
Author: serbanu <serban.ungureanu1 at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/unittests/Format/ConfigParseTest.cpp
Log Message:
-----------
[clang-format] Add parse tests for SeparateDefinitionBlocks option (#78256)
Add config parse tests for SeparateDefinitionBlocks option.
Commit: f3d534c4251bb08ee210a49fcf721cefff7ded11
https://github.com/llvm/llvm-project/commit/f3d534c4251bb08ee210a49fcf721cefff7ded11
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
R clang/include/clang/AST/APNumericStorage.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/Expr.h
M clang/lib/AST/Decl.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
Log Message:
-----------
Revert "[AST] Use APIntStorage to fix memory leak in EnumConstantDecl. (#78311)"
This reverts commit 4737959d91fab7673b1bb642f88658bb2a24d723.
Missed an lldb update.
Commit: 41b09bbe98fc8d5952beeeb34fcb07caeecfbdcb
https://github.com/llvm/llvm-project/commit/41b09bbe98fc8d5952beeeb34fcb07caeecfbdcb
Author: Charlie Barto <chbarto at microsoft.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[ASAN][sanitizers][win] Allow windows-asan to be built with /MDd and intercept functions from the debug runtimes. (#77840)
It turns out this works _mostly_ fine, even when mixing debug versions
of asan with programs built with the release runtime. Using /MT (or
/MTd) with a dynamically linked asan has never really worked that well,
and I am planning on opening a PR that will completely remove the
static-asan configuration for windows and make programs linked with the
static CRT/runtime work with the DLL version of asan. This is better
than the current situation because the static linked version of asan
doesn't work well on windows if there are multiple DLLs in the process
using it.
The check for building asan with only /MD or /MT has been removed. It
was in AsanDoesNotSupportStaticLinkage, but was checking for debug CRTs,
not static linkage. The kind of static linkage this function is supposed
to check for (on linux for example) doesn't really exist on windows.
Note: There is one outstanding issue with this approach, if you mix a
/MDd DLLs and /MD dlls in the same process then the "real" function
called by asan interceptors will be the same for calls from both
contexts, potentially screwing up things like errno. This only happens
if you mix /MD and /MDd in the same process, because otherwise asan
won't find functions from both runtimes to intercept. We are working on
a fix for this, and it mainly hits with the CRT functions exported from
both ucrtbase and ntdll.
This change is being upstreamed from Microsoft's fork.
Commit: 03abf7fe09bb13d387660bcd5abaf8257de2c152
https://github.com/llvm/llvm-project/commit/03abf7fe09bb13d387660bcd5abaf8257de2c152
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
Log Message:
-----------
[AMDGPU] Fix predicates for V_DOT instructions. (#78198)
Resolves AsmParser ambiguities, e.g., between V_DOT4C_I32_I8_dpp_vi and
V_DOT4C_I32_I8_dpp_gfx10. The latter is predicated with isGFX10Only
while the first has no subtarget generation predicates.
Part of <https://github.com/llvm/llvm-project/issues/69256>.
Commit: dda2ce82c2ec8a3b988636c6cebb76eb32b4de05
https://github.com/llvm/llvm-project/commit/dda2ce82c2ec8a3b988636c6cebb76eb32b4de05
Author: Yeoul Na <yeoul_na at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
A clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyImplPlans.rst
M clang/docs/index.rst
Log Message:
-----------
[BoundsSafety] Initial documentation for -fbounds-safety (#70749)
The document is mostly the exact copy of RFC: Enforcing Bounds Safety in
C, except some clarifications made over the PR review:
https://discourse.llvm.org/t/rfc-enforcing-bounds-safety-in-c-fbounds-safety/70854
Further changes and clarifications for the programming model will be
done as separate patches to make it easier to track history of changes.
Commit: 142f270c279f2576e4618fc0d1121181c7531fdf
https://github.com/llvm/llvm-project/commit/142f270c279f2576e4618fc0d1121181c7531fdf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
A clang/include/clang/AST/APNumericStorage.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/Expr.h
M clang/lib/AST/Decl.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
Recommit "[AST] Use APIntStorage to fix memory leak in EnumConstantDecl. (#78311)"
With lldb build fix.
Original message:
EnumConstantDecl is allocated by the ASTContext allocator so the
destructor is never called.
This patch takes a similar approach to IntegerLiteral by using
APIntStorage to allocate large APSInts using the ASTContext allocator as
well.
The downside is that an additional heap allocation and copy of the data
needs to be made when calling getInitValue if the APSInt is large.
Fixes #78160.
Commit: ad50676055cf03fd4fecdda5736c7ac1a940231f
https://github.com/llvm/llvm-project/commit/ad50676055cf03fd4fecdda5736c7ac1a940231f
Author: Victor Mustya <victor.mustya at intel.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/IR/Instructions.cpp
M llvm/test/Transforms/InstCombine/fptrunc.ll
Log Message:
-----------
[InstCombine] Only fold bitcast(fptrunc) if destination type matches fptrunc result type. (#77046)
It's not enough to just make sure destination type is floating point,
because the following chain may be incorrectly optimized:
```LLVM
%trunc = fptrunc float %src to bfloat
%cast = bitcast bfloat %trunc to half
```
Before the fix, the instruction sequence mentioned above used to be
translated into single fptrunc instruction as follows:
```LLVM
%trunc = fptrunc float %src to half
```
Such transformation was semantically incorrect.
Commit: e1616ef9d742ebcc226451c4ca5ec2204c460840
https://github.com/llvm/llvm-project/commit/e1616ef9d742ebcc226451c4ca5ec2204c460840
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/test/CodeGen/X86/basic-block-sections-clusters-error.ll
A llvm/test/CodeGen/X86/basic-block-sections-entryblock.ll
Log Message:
-----------
[BasicBlockSections] Always keep the entry block in the beginning of the function. (#74696)
BasicBlockSections must enforce placing the entry block at the beginning
of the function regardless of the basic block sections profile.
Commit: 6ba2c2bb804532e97180d548957bb231d994c8ff
https://github.com/llvm/llvm-project/commit/6ba2c2bb804532e97180d548957bb231d994c8ff
Author: Rahman Lavaee <rahmanl at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[SHT_LLVM_BB_ADDR_MAP,NFC] Add SCOPED_TRACE for convenient mapping of failures to test cases. (#78335)
Although parameterized gtests are preferred for this, our tests are not
very straightforward. So I decided to add SCOPED_TRACE for different
test cases and the lambda checks as well.
Typical test failure message now looks like:
```
...llvm-project/llvm/unittests/Object/ELFObjectFileTest.cpp:737
Expected equality of these values:
*BBAddrMaps
Which is: { 32-byte object <11-11 01-00 00-00 00-00 C0-A9 FB-3E E4-55 00-00 D0-A9 FB-3E E4-55 00-00 D0-A9 FB-3E E4-55 00-00>, 32-byte object <22-22 02-00 00-00 00-00 F0-8E FB-3E E4-55 00-00 00-8F FB-3E E4-55 00-00 00-8F FB-3E E4-55 00-00> }
ExpectedResult
Which is: { 32-byte object <33-33 03-00 00-00 00-00 50-A7 FB-3E E4-55 00-00 60-A7 FB-3E E4-55 00-00 60-A7 FB-3E E4-55 00-00> }
Google Test trace:
...llvm-project/llvm/unittests/Object/ELFObjectFileTest.cpp:726: for TextSectionIndex: 1 and object yaml:
--- !ELF
FileHeader:
Class: ELFCLASS64
Data: ELFDATA2LSB
Type: ET_EXEC
Sections:
- Name: .llvm_bb_addr_map_1
Type: SHT_LLVM_BB_ADDR_MAP
Link: 1
Entries:
- Version: 2
Address: 0x11111
BBEntries:
- ID: 1
AddressOffset: 0x0
Size: 0x1
Metadata: 0x2
- Name: .llvm_bb_addr_map_2
Type: SHT_LLVM_BB_ADDR_MAP
Link: 1
Entries:
- Version: 2
Address: 0x22222
BBEntries:
- ID: 2
AddressOffset: 0x0
Size: 0x2
Metadata: 0x4
- Name: .llvm_bb_addr_map_3
Type: SHT_LLVM_BB_ADDR_MAP
Link: 2
Entries:
- Version: 1
Address: 0x33333
BBEntries:
- ID: 0
AddressOffset: 0x0
Size: 0x3
Metadata: 0x6
- Name: .llvm_bb_addr_map_4
Type: SHT_LLVM_BB_ADDR_MAP_V0
# Link: 0 (by default, can be overriden)
Entries:
- Version: 0
Address: 0x44444
BBEntries:
- ID: 0
AddressOffset: 0x0
Size: 0x4
Metadata: 0x18
...llvm-project/llvm/unittests/Object/ELFObjectFileTest.cpp:757: normal sections
```
Commit: 1b5f72c5ece4442ca29ced45f8bcb25ed0d57790
https://github.com/llvm/llvm-project/commit/1b5f72c5ece4442ca29ced45f8bcb25ed0d57790
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/include/lldb/Utility/FileSpecList.h
A lldb/include/lldb/Utility/SupportFile.h
Log Message:
-----------
[lldb] Hoist SupportFile out of FileSpecList (NFC)
This hoists SupportFile out of FileSpecList. SupportFileList is still
implemented there as it's very similar to FileSpecList.
Commit: 00b6d032a22196bc14e4e30e413c040eb1b65da4
https://github.com/llvm/llvm-project/commit/00b6d032a22196bc14e4e30e413c040eb1b65da4
Author: Bill Wendling <5993918+bwendling at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/TypoCorrection.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
A clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/bounds-checking.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Sema/attr-counted-by.c
Log Message:
-----------
[Clang] Implement the 'counted_by' attribute (#76348)
The 'counted_by' attribute is used on flexible array members. The
argument for the attribute is the name of the field member holding the
count of elements in the flexible array. This information is used to
improve the results of the array bound sanitizer and the
'__builtin_dynamic_object_size' builtin. The 'count' field member must
be within the same non-anonymous, enclosing struct as the flexible array
member. For example:
```
struct bar;
struct foo {
int count;
struct inner {
struct {
int count; /* The 'count' referenced by 'counted_by' */
};
struct {
/* ... */
struct bar *array[] __attribute__((counted_by(count)));
};
} baz;
};
```
This example specifies that the flexible array member 'array' has the
number of elements allocated for it in 'count':
```
struct bar;
struct foo {
size_t count;
/* ... */
struct bar *array[] __attribute__((counted_by(count)));
};
```
This establishes a relationship between 'array' and 'count';
specifically that 'p->array' must have *at least* 'p->count' number of
elements available. It's the user's responsibility to ensure that this
relationship is maintained throughout changes to the structure.
In the following, the allocated array erroneously has fewer elements
than what's specified by 'p->count'. This would result in an
out-of-bounds access not not being detected:
```
struct foo *p;
void foo_alloc(size_t count) {
p = malloc(MAX(sizeof(struct foo),
offsetof(struct foo, array[0]) + count *
sizeof(struct bar *)));
p->count = count + 42;
}
```
The next example updates 'p->count', breaking the relationship
requirement that 'p->array' must have at least 'p->count' number of
elements available:
```
void use_foo(int index, int val) {
p->count += 42;
p->array[index] = val; /* The sanitizer can't properly check this access */
}
```
In this example, an update to 'p->count' maintains the relationship
requirement:
```
void use_foo(int index, int val) {
if (p->count == 0)
return;
--p->count;
p->array[index] = val;
}
```
Commit: 8947469ec1ad6d35b2feec0acc43d0d191514f0b
https://github.com/llvm/llvm-project/commit/8947469ec1ad6d35b2feec0acc43d0d191514f0b
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/progress_reporting/TestTrimmedProgressReporting.py
Log Message:
-----------
[lldb][Progress] Fix test for trimmed progress reports (#78357)
The test TestTrimmedProgressReporting tests that progress reports are
being sent by listening for events with the titles of specific progress
reports. Commit f1ef910b removed the report for Apple DWARF indices
which was one of the reports being listened for in this test, so that
report is removed here as well.
That commit also now creates all progress reports with details so
reports string are prepended with the details count. This changes the
length of the trimmed progress report title string that's checked for
here so this commit changes the string to match as well.
This test was skipped on non-Apple platforms, but since the progress
report for Apple DWARF indices has been removed this commit removes that
decorator.
Commit: e9e3e9d23dd4e06ed5d9adb156ced4ab3a1f34bc
https://github.com/llvm/llvm-project/commit/e9e3e9d23dd4e06ed5d9adb156ced4ab3a1f34bc
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.h
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
M llvm/test/MC/ELF/rtti-proxy-gotpcrel.ll
Log Message:
-----------
[llvm] Indirect symbol replacement with GOTPCREL for aarch64 and riscโฆ (#78003)
โฆv64 ELF
This is similar to https://github.com/llvm/llvm-project/pull/67754 but
adds support for ELF aarch64 and riscv64 now that GOTPCREL-equivalent
relocations have been added for those archs.
Commit: 894c22406f68af6574a62a40ec49e058344c324b
https://github.com/llvm/llvm-project/commit/894c22406f68af6574a62a40ec49e058344c324b
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/PCH/gch-probe.c
M llvm/include/llvm/BinaryFormat/Magic.h
M llvm/lib/BinaryFormat/Magic.cpp
M llvm/lib/Object/Binary.cpp
M llvm/lib/Object/ObjectFile.cpp
Log Message:
-----------
[clang][Driver] Don't ignore -gmodules .gch files (#77711)
A previous commit (82f75ed) made clang ignore .gch files that were not
Clang AST files. This broke `-gmodules`, which embeds the Clang AST into
an object file containing debug info.
This changes the probing to detect any file format recognized by
`llvm::identify_magic()` as potentially containing a Clang AST.
Previous PR: https://github.com/llvm/llvm-project/pull/69204
Commit: 06328d55c39b73fae3611bb076ee8d4a75f3c989
https://github.com/llvm/llvm-project/commit/06328d55c39b73fae3611bb076ee8d4a75f3c989
Author: Stefan Grรคnitz <stefan.graenitz at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/aarch32.h
Log Message:
-----------
[JITLink][AArch32] In warning output add decimal value for CPUArch and missing newline
Commit: 539c557a7fe050b19ba08dc1bf7f65cb2a56337f
https://github.com/llvm/llvm-project/commit/539c557a7fe050b19ba08dc1bf7f65cb2a56337f
Author: Stefan Grรคnitz <stefan.graenitz at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
A llvm/test/ExecutionEngine/JITLink/AArch32/ELF_relocations_arm.s
A llvm/test/ExecutionEngine/JITLink/AArch32/ELF_relocations_data.s
A llvm/test/ExecutionEngine/JITLink/AArch32/ELF_relocations_thumb.s
R llvm/test/ExecutionEngine/JITLink/AArch32/ELF_static_arm_reloc.s
R llvm/test/ExecutionEngine/JITLink/AArch32/ELF_static_data_reloc.s
R llvm/test/ExecutionEngine/JITLink/AArch32/ELF_static_thumb_reloc.s
A llvm/test/ExecutionEngine/JITLink/AArch32/ELF_stubs_thumb.s
R llvm/test/ExecutionEngine/JITLink/AArch32/ELF_thumb_stubs.s
Log Message:
-----------
[JITLink][AArch32] Streamline file-names of tests (NFC)
All other backends use the full term "relocations". Also, sorting by type (relocations/stubs/etc.) before CPU states (arm/thumb/other) makes it easier to filter in LIT.
Commit: 079706df0225902054cf7b7a0388a60db59ac426
https://github.com/llvm/llvm-project/commit/079706df0225902054cf7b7a0388a60db59ac426
Author: Stefan Grรคnitz <stefan.graenitz at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/AArch32/ELF_stubs_thumb.s
Log Message:
-----------
[JITLink][AArch32] Fix typos in Thumb stubs test (NFC)
Commit: a979797dc2f460003e2b923b4ee6bbd977253d98
https://github.com/llvm/llvm-project/commit/a979797dc2f460003e2b923b4ee6bbd977253d98
Author: Stefan Grรคnitz <stefan.graenitz at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/aarch32.h
M llvm/lib/ExecutionEngine/JITLink/ELF_aarch32.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch32.cpp
Log Message:
-----------
[JITLink][AArch32] Rename stubs flavor Thumbv7 to v7 (NFC)
Commit: 9c607e77eae75f0f9152eb3e6ba2a69616aba4fa
https://github.com/llvm/llvm-project/commit/9c607e77eae75f0f9152eb3e6ba2a69616aba4fa
Author: Stefan Grรคnitz <stefan.graenitz at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/aarch32.h
M llvm/lib/ExecutionEngine/JITLink/ELF_aarch32.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch32.cpp
Log Message:
-----------
[JITLink][AArch32] Refactor StubsManager (NFC)
Commit: 854aa9112df253bcad4db6f21ea9b2fbca4ed83e
https://github.com/llvm/llvm-project/commit/854aa9112df253bcad4db6f21ea9b2fbca4ed83e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/include/lldb/Utility/FileSpecList.h
M lldb/source/Utility/FileSpecList.cpp
Log Message:
-----------
[lldb] Store SupportFile as shared_ptr (NFC)
Commit: a43a4a5329fbb4c5bedddb9cbbe89d3659422be3
https://github.com/llvm/llvm-project/commit/a43a4a5329fbb4c5bedddb9cbbe89d3659422be3
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/test/API/macosx/rosetta/Makefile
Log Message:
-----------
[lldb] Build the TestRosetta.py executable with system stdlib (#78370)
This is a speculative fix for TestRosetta.py which is currently failing
on Green Dragon.
TestRosetta just makes sure we can debug an x86_64 process on Apple
Silicon. However, we're failing to build the x86_64 test binary. The
linker is failing with some warnings about libc++ and libunwind being
build for arm64 while the target binary is x86_64. I'm going to try
building with the system standard libraries instead of the just-built
ones to workaround it.
Commit: 7d3466b5c30878c5e014949ebf1dc44bb2160995
https://github.com/llvm/llvm-project/commit/7d3466b5c30878c5e014949ebf1dc44bb2160995
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/MachO.def
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/TextAPI/Platform.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[llvm] Introduce XROS platform (#77707)
Accepts but otherwise ignores visionOS/XROS target triples as Darwin
based platform.
https://developer.apple.com/documentation/visionos
Commit: 25c7c231149813692db1dbfc348d2df87ecc5307
https://github.com/llvm/llvm-project/commit/25c7c231149813692db1dbfc348d2df87ecc5307
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
Log Message:
-----------
[llvm][MC] silence xros platform warnings, NFC
Commit: 32382bb8329a0931456ab0c60e351cf3a18ab6f3
https://github.com/llvm/llvm-project/commit/32382bb8329a0931456ab0c60e351cf3a18ab6f3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/include/lldb/Symbol/LineEntry.h
M lldb/source/Symbol/LineEntry.cpp
Log Message:
-----------
[lldb] Remove unused LineEntry ctor (NFC)
Commit: f3190c78ec6f3db77defd28d1b25aba0ef4834f6
https://github.com/llvm/llvm-project/commit/f3190c78ec6f3db77defd28d1b25aba0ef4834f6
Author: Florian Mayer <fmayer at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll
Log Message:
-----------
Revert "[AMDGPU] Sign extend simm16 in setreg intrinsic" (#78372)
Reverts llvm/llvm-project#77997
Broke UBSan bots.
Commit: c3f96acb41ef20a1f84715b1b6fb39e916f9aac8
https://github.com/llvm/llvm-project/commit/c3f96acb41ef20a1f84715b1b6fb39e916f9aac8
Author: Zixu Wang <9819235+zixu-w at users.noreply.github.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/test/Driver/fdefine-target-os-macros.c
Log Message:
-----------
Revert "[Fix] Disable fdefine-target-os-macros for now" (#78353)
https://github.com/llvm/llvm-test-suite/pull/65 fixed the
llvm-test-suite errors. Reapply the change to enable
`fdefine-target-os-macros` by default for Darwin targets.
This reverts commit 63be986f612c175559efffed9daebcb944fa5cea.
Commit: b6f922fbf5e983122271aa12acb33f6172046d4d
https://github.com/llvm/llvm-project/commit/b6f922fbf5e983122271aa12acb33f6172046d4d
Author: Davide Italiano <davidino at fb.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/test/CodeGen/debug-info-codeview-unnamed.c
M clang/test/CodeGen/debug-info-unused-types.c
M clang/test/CodeGen/debug-info-unused-types.cpp
M clang/test/CodeGenCXX/debug-info-access.cpp
M clang/test/CodeGenCXX/debug-info-anon-union-vars.cpp
M clang/test/CodeGenCXX/debug-info-codeview-unnamed.cpp
M clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp
M clang/test/CodeGenCXX/debug-lambda-this.cpp
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
R llvm/test/Bitcode/clone-local-types.ll
M llvm/test/Bitcode/upgrade-cu-locals.ll
M llvm/test/Bitcode/upgrade-cu-locals.ll.bc
R llvm/test/DebugInfo/Generic/inlined-local-type.ll
R llvm/test/DebugInfo/Generic/lexical-block-retained-types.ll
R llvm/test/DebugInfo/Generic/lexical-block-types.ll
A llvm/test/DebugInfo/Generic/split-dwarf-local-import.ll
A llvm/test/DebugInfo/Generic/split-dwarf-local-import2.ll
A llvm/test/DebugInfo/Generic/split-dwarf-local-import3.ll
M llvm/test/DebugInfo/Generic/verifier-invalid-disubprogram.ll
R llvm/test/DebugInfo/X86/local-type-as-template-parameter.ll
M llvm/test/DebugInfo/X86/set.ll
R llvm/test/DebugInfo/X86/split-dwarf-local-import.ll
R llvm/test/DebugInfo/X86/split-dwarf-local-import2.ll
R llvm/test/DebugInfo/X86/split-dwarf-local-import3.ll
M llvm/unittests/Transforms/Utils/CloningTest.cpp
Log Message:
-----------
Revert "[CloneFunction][DebugInfo] Avoid cloning DILocalVariables of inlined functions (#75385)"
This reverts commit fc6faa1113e9069f41b5500db051210af0eea843.
Commit: 0266f414f624ebd74f8607ebd3ac94bbb93b0ebb
https://github.com/llvm/llvm-project/commit/0266f414f624ebd74f8607ebd3ac94bbb93b0ebb
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Drop COMPILER_RT_BUILD_CRT workaround (#78331)
This variable was explicitly removed from the cache to ease transition
from existing build directories but that breaks passing
COMPILER_RT_BUILD_CRT=OFF on the command line. I was surprised to see
the CRT builds being run for my builtins-only build config (I noticed
because one of the tests was failing despite having `REQUIRES: crt`).
If I pass `-DCOMPILER_RT_BUILD_CRT=OFF` to cmake and add some prints
around the `unset` statement it shows the following:
```
-- before unset(): COMPILER_RT_BUILD_CRT=OFF
-- after unset: COMPILER_RT_BUILD_CRT=
-- after cmake_dependent_option COMPILER_RT_BUILD_CRT=ON
```
Drop this temporary workaround now that over 6 months have passed.
Commit: a4cd99ea8736eda2b8b4de34453f55008bcf9c30
https://github.com/llvm/llvm-project/commit/a4cd99ea8736eda2b8b4de34453f55008bcf9c30
Author: jimingham <jingham at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/source/Core/ModuleList.cpp
A lldb/test/API/functionalities/executable_first/Makefile
A lldb/test/API/functionalities/executable_first/TestExecutableFirst.py
A lldb/test/API/functionalities/executable_first/b.cpp
A lldb/test/API/functionalities/executable_first/main.cpp
Log Message:
-----------
Ensure that the executable module is ModuleList[0] (#78360)
We claim in a couple places that the zeroth element of the module list
for a target is the main executable, but we don't actually enforce that
in the ModuleList class. As we saw, for instance, in
32dd5b20973bde1ef77fa3b84b9f85788a1a303a
it's not all that hard to get this to be off. This patch ensures that
the first object file of type Executable added to it is moved to the
front of the ModuleList. I also added a test for this.
In the normal course of operation, where the executable is added first,
this only adds a check for whether the first element in the module list
is an executable. If that's true, we just append as normal.
Note, the code in Target::GetExecutableModule doesn't actually agree
that the zeroth element must be the executable, it instead returns the
first Module of type Executable. But I can't tell whether that was a
change in intention or just working around the bug that we don't always
maintain this ordering. But given we've said this in scripting as well
as internally, I think we shouldn't change our minds about this.
Commit: 29b5f8f977af9b09aa8f56152baca04cf8750981
https://github.com/llvm/llvm-project/commit/29b5f8f977af9b09aa8f56152baca04cf8750981
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang][Sema] Extract ellipsis location from CXXFoldExpr for reattaching constraints on NTTPs (#78080)
We build up a `CXXFoldExpr` for immediately declared constraints as per
C++20 [temp.param]/4. This is done by
`formImmediatelyDeclaredConstraint` where an `EllipsisLoc` is essential
to determine whether this is a pack.
On the other hand, when attempting to instantiate a class template,
member templates might not be instantiated immediately, so we leave them
intact. For function templates with NTTPs, we reattach constraints if
possible so that they can be evaluated later. To properly form that, we
attempted to extract an ellipsis location if the param per se was a
parameter pack. Unfortunately, for the following NTTP case, we seemingly
failed to handle:
```cpp
template <Constraint auto... Pack>
void member();
```
The NTTPD Pack is neither an `ExpandedParameterPack` nor a
`PackExpansion` (its type does not expand anything). As a result, we end
up losing track of the constraints on packs, although we have them
inside the associated `CXXFoldExpr`.
This patch fixes that by extracting the ellipsis location out of the
previous constraint expression. Closes
https://github.com/llvm/llvm-project/issues/63837.
Commit: 705c5b80ace9d6fb1b9d1129ca1529d6645f1f24
https://github.com/llvm/llvm-project/commit/705c5b80ace9d6fb1b9d1129ca1529d6645f1f24
Author: jimingham <jingham at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/executable_first/TestExecutableFirst.py
Log Message:
-----------
Add the Linux "you can use this binary" bits to run_to_source_breakpoint (#78377)
Follow-on to a4cd99ea8736eda2b8b4de34453f55008bcf9c30 - I forgot you
have to add ANY shared library you want to use to extra_images...
Commit: 46a395d8c41f6009a7fbae51f408c3c6ea2399d3
https://github.com/llvm/llvm-project/commit/46a395d8c41f6009a7fbae51f408c3c6ea2399d3
Author: antangelo <contact at antangelo.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CXX/dcl.decl/dcl.decl.general/p4-20.cpp
M clang/test/SemaTemplate/GH71595.cpp
M clang/test/SemaTemplate/concepts-friends.cpp
Log Message:
-----------
[clang] Emit error for invalid friend functions under [temp.friend]p9 (#78083)
Emits an error for friend FunctionDecls that either:
* are not templates and have a requires clause
* are templates, and have a constrained parameter that depends on a
template parameter from an enclosing template
and are not a definition.
For a non-template friend function with a requires clause, if the
function is not templated then the original error message indicating
that such a function is disallowed is shown instead, as the function
will still be rejected if a definition is added.
Commit: 9745c13ca82538d30a04db7da40d3c4cd9f7f13c
https://github.com/llvm/llvm-project/commit/9745c13ca82538d30a04db7da40d3c4cd9f7f13c
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/test/CodeGen/X86/bfloat.ll
Log Message:
-----------
[X86][BF16] Improve float -> bfloat lowering under AVX512BF16 and AVXNECONVERT (#78042)
Commit: 8934b10642664c0824f45f115b2a0afcb56a5e5f
https://github.com/llvm/llvm-project/commit/8934b10642664c0824f45f115b2a0afcb56a5e5f
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/lib/Conversion/ArithCommon/AttrToLLVMConverter.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Dialect/Arith/ops.mlir
A mlir/test/python/dialects/arith_llvm.py
M mlir/test/python/ir/diagnostic_handler.py
Log Message:
-----------
[mlir][arith] Add overflow flags support to arith ops (#78376)
Add overflow flags support to the following ops:
* `arith.addi`
* `arith.subi`
* `arith.muli`
Example of new syntax:
```
%res = arith.addi %arg1, %arg2 overflow<nsw> : i64
```
Similar to existing LLVM dialect syntax
```
%res = llvm.add %arg1, %arg2 overflow<nsw> : i64
```
Tablegen canonicalization patterns updated to always drop flags, proper
support with tests will be added later.
Updated LLVMIR translation as part of this commit as it currenly written
in a way that it will crash when new attributes added to arith ops
otherwise.
Also lower `arith` overflow flags to corresponding SPIR-V op decorations
Discussion
https://discourse.llvm.org/t/rfc-integer-overflow-flags-support-in-arith-dialect/76025
This effectively rolls forward #77211, #77700 and #77714 while adding a
test to ensure the Python usage is not broken. More follow up needed but
unrelated to the core change here. The changes here are minimal and just
correspond to "textual namespacing" ODS side, no C++ or Python changes
were needed.
---------
---------
Co-authored-by: Ivan Butygin <ivan.butygin at gmail.com>, Yi Wu <yi.wu2 at arm.com>
Commit: 84bdee2875da364be7eb2144b1ae530f6a05f0e2
https://github.com/llvm/llvm-project/commit/84bdee2875da364be7eb2144b1ae530f6a05f0e2
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/MC/LoongArch/Basic/Float/d-arith.s
M llvm/test/MC/LoongArch/Basic/Float/f-arith.s
M llvm/test/MC/LoongArch/Basic/Integer/atomic.s
M llvm/test/MC/LoongArch/lasx/frecip.s
M llvm/test/MC/LoongArch/lasx/frsqrt.s
M llvm/test/MC/LoongArch/lsx/frecip.s
M llvm/test/MC/LoongArch/lsx/frsqrt.s
Log Message:
-----------
[LoongArch] Add LoongArch V1.1 instructions definitions and MC tests (#78238)
LoongArch V1.1 instrucions include floating-point approximate reciprocal
instructions and atomic instrucions. And add testcases for these
instrucions meanwhile.
Commit: 8d6e82d501cda1946c7d99658241033d78676e95
https://github.com/llvm/llvm-project/commit/8d6e82d501cda1946c7d99658241033d78676e95
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/X86/avx512-kconstraints-att_inline_asm.c
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr41678.ll
Log Message:
-----------
[X86] Use vXi1 for `k` constraint in inline asm (#77733)
Fixes #77172
Commit: 8371cdca12b1510d9ac6a1d13d573ced6c05402f
https://github.com/llvm/llvm-project/commit/8371cdca12b1510d9ac6a1d13d573ced6c05402f
Author: Pranav Kant <prka at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
Disable ConstraintSystemTest for now
as it started failing after https://github.com/llvm/llvm-project/commit/8e514c572e44eda237417236b4c92176dfce9cd9
Above commit enables llvm::DebugFlag which is a global variable.
Commit: 0a64367a72f1634321f5051221f05f2f364bd882
https://github.com/llvm/llvm-project/commit/0a64367a72f1634321f5051221f05f2f364bd882
Author: YunQiang Su <wzssyqa at gmail.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M compiler-rt/lib/interception/interception.h
M compiler-rt/lib/sanitizer_common/sanitizer_asm.h
Log Message:
-----------
Sanitizer/MIPS: Use $t9 for preemptible function call (#76894)
Currently, almost all of the shared libraries of MIPS, rely on $t9
to get the address of current function, instead of PCREL instructions,
even on MIPSr6. So we have to set $t9 properly.
To get the address of preemptible function, we need the help of GOT.
MIPS/O32 has .cpload, which can help to generate 3 instructions to get GOT.
For __mips64, we can get GOT by:
lui $t8, %hi(%neg(%gp_rel(SANITIZER_STRINGIFY(TRAMPOLINE(func)))))
daddu $t8, $t8, $t9
daddiu $t8, $t8, %hi(%neg(%gp_rel(SANITIZER_STRINGIFY(TRAMPOLINE(func)))))
And then get the address of __interceptor_func, and jump to it
ld $t9, %got_disp(_interceptor" SANITIZER_STRINGIFY(func) ")($t8)
jr $t9
Fixes #74047
Co-authored-by: YunQiang Su <yunqiang.su at cipunited.com>
Commit: 3e0d71cdf4a406c6a1de825cf69d889d97ede46b
https://github.com/llvm/llvm-project/commit/3e0d71cdf4a406c6a1de825cf69d889d97ede46b
Author: h-vetinari <h.vetinari at gmx.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/docs/CommandGuide/clang.rst
M clang/docs/UsersManual.rst
Log Message:
-----------
[clang-cl] document correct defaults for `-fms-compatibility-version` / `-fmsc-version` (#76418)
The UserManual states wrongly (AFAICT) that these default are not being
defined for clang-cl, whereas further up the opposite is stated:
https://github.com/llvm/llvm-project/blob/c86fe3ee0b92934f5d18394d9a0cdc1d3f0eef64/clang/docs/UsersManual.rst#L3375-L3382
I've chosen to follow that wording, as it's the latest related update.
CC @RIscRIpt who recently touched this in
b3e6ff331925dde24a4707452d657da0fdf7f588
CC @AaronBallman who cared about this, c.f.
8fc0dcf036bf199b2af2e10a4f81215dbd706daf
Commit: 933c25e558e6d0d8766d024a329d003a8d4c1162
https://github.com/llvm/llvm-project/commit/933c25e558e6d0d8766d024a329d003a8d4c1162
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/include/lldb/Symbol/LineEntry.h
M lldb/include/lldb/Utility/FileSpecList.h
M lldb/include/lldb/Utility/SupportFile.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Breakpoint/BreakpointResolver.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Symbol/LineEntry.cpp
M lldb/source/Symbol/LineTable.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Target/ThreadPlanStepRange.cpp
Log Message:
-----------
[lldb] Store SupportFile in LineEntry (NFC) (#77999)
Store a SupportFile, rather than a FileSpec, in LineEntry. This commit
works towards having the SourceManageroperate on SupportFiles so that it
can (1) validate the Checksum and (2) materialize the content of inline
source information.
Commit: 4e64159c866446ed7f5783649f8f5699f84bb1a6
https://github.com/llvm/llvm-project/commit/4e64159c866446ed7f5783649f8f5699f84bb1a6
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclCXX.h
M clang/lib/AST/DeclCXX.cpp
M clang/test/CXX/drs/dr20xx.cpp
M clang/test/CXX/drs/dr25xx.cpp
M clang/test/SemaCXX/literal-type.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Implement CWG2598: Union of non-literal types (#78195)
A union is considered a literal type unless it has no non-literal
member.
This resolves CWG2096 (which makes unions with literal members literal)
and CWG2598 (empty unions are literal types).
Fixes #77924
Commit: ff9fcc74a356b8542e5ac782426c9d4c817143f3
https://github.com/llvm/llvm-project/commit/ff9fcc74a356b8542e5ac782426c9d4c817143f3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Symbol/CompileUnit.cpp
Log Message:
-----------
[lldb] Store SupportFile in CompileUnit (NFC)
Store a SupportFile, rather than a FileSpec, in CompileUnit. This commit
works towards having the SourceManager operate on SupportFiles so that
it can (1) validate the Checksum and (2) materialize the content of
inline source information.
Commit: 5aea6ba8f5f06e06887fe5c5c8740895907f6540
https://github.com/llvm/llvm-project/commit/5aea6ba8f5f06e06887fe5c5c8740895907f6540
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/source/Core/Module.cpp
Log Message:
-----------
[lldb] Fix trailing whitespace & formatting in Core/Module.cpp (NFC)
I have my editor configured to remove trailing whitespace and every time
I touch this file I end up with a bunch of clang-format changes to lines
that were modified because of it. Nobody likes trailing whitespace so
this cleans up the file.
Commit: 9e9907f1cfa424366fba58d9520f9305b537cec9
https://github.com/llvm/llvm-project/commit/9e9907f1cfa424366fba58d9520f9305b537cec9
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-prelegalizer-combiner-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fabs-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-post-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-pre-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-foldable-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsub-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-redundant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-neg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-illegal-types.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shift.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.i16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.u16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.i16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.u16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ds.swizzle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmad.ftz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mbcnt.lo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mul.u24.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mulhi.i24.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mulhi.u24.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.reloc.constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.barrier.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sffbh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-wave-address.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-region.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-region.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-region.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-br.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctlz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-cttz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fconstant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frame-index.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-i1-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.s96.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pseudo-scalar-transcendental.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-returnaddress.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sopc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-packed.xfail.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-stacksave-stackrestore.invalid.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-stacksave-stackrestore.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.s96.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.gfx10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp-s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-rotl-rotr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer-wrong-insert-point.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-reassoc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp-compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.class.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.cvt.pkrtz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.scale.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpermute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.permute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.swizzle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fmul.legacy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.groupstaticsize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kernarg.segment.ptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.live.mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx90a.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx940.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memrealtime.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update.dpp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.vote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-wave-address.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-align.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomic-cmpxchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-max.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-min.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-concat-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-flog2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-frame-index.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-merge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-pseudo-scalar-transcendental.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-reg-sequence.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/add-debug.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.r600.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-cse.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-propagation.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/agpr-to-agpr-copy.mir
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx908.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/artificial-terminators.mir
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/assert-wrong-alloca-addrspace.ll
M llvm/test/CodeGen/AMDGPU/atomic-optimizer-strict-wqm.ll
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/barrier-elimination.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bf16-ops.ll
M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfe_uint.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.r600.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/big_alu.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-condition-and.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/break-smem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-emitcopyfromreg.ll
M llvm/test/CodeGen/AMDGPU/bug-vopc-commute.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/bundle-latency.mir
M llvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
M llvm/test/CodeGen/AMDGPU/call-to-kernel.ll
M llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/call_fs.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cayman-loop-bug.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cf-stack-bug.ll
M llvm/test/CodeGen/AMDGPU/cf_end.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-smem.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads.mir
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/coalescer-remat-dead-use.mir
M llvm/test/CodeGen/AMDGPU/coalescer-removepartial-extend-undef-subrange.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-prune-kill-copy.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subreg-join.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
M llvm/test/CodeGen/AMDGPU/coalescing-subreg-was-undef-but-became-def.mir
M llvm/test/CodeGen/AMDGPU/coalescing_makes_lanes_undef.mir
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf-broken.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf2.mir
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-sreg64-inits.mir
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_vloads.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute-vop3.mir
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg.ll
M llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-mullohi.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-v1i8-extractvecelt-crash.ll
M llvm/test/CodeGen/AMDGPU/dagcombiner-bug-illegal-vec4-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
M llvm/test/CodeGen/AMDGPU/dead_bundle.mir
M llvm/test/CodeGen/AMDGPU/dead_copy.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/disconnected-predset-break-bug.ll
M llvm/test/CodeGen/AMDGPU/diverge-switch-default.ll
M llvm/test/CodeGen/AMDGPU/divergence-at-use.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bitreverse.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-min-max.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-negsubinlineconst.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-not-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/early-term.mir
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/empty-function.ll
M llvm/test/CodeGen/AMDGPU/enable-no-signed-zeros-fp-math.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/endpgm-dce.mir
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/expand-si-indirect.mir
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
M llvm/test/CodeGen/AMDGPU/fadd64.ll
M llvm/test/CodeGen/AMDGPU/fail-select-buffer-atomic-fadd.ll
M llvm/test/CodeGen/AMDGPU/fail.llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
M llvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fceil.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp-cnd.ll
M llvm/test/CodeGen/AMDGPU/fcmp-cnde-int-args.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp.ll
M llvm/test/CodeGen/AMDGPU/fcmp64.ll
M llvm/test/CodeGen/AMDGPU/fconst64.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.r600.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll
M llvm/test/CodeGen/AMDGPU/fetch-limits.r700+.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
M llvm/test/CodeGen/AMDGPU/fmad.ll
M llvm/test/CodeGen/AMDGPU/fmax.ll
M llvm/test/CodeGen/AMDGPU/fmax3.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.r600.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_fmax_legacy.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fminnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.r600.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul.ll
M llvm/test/CodeGen/AMDGPU/fmul64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.legal.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.si.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fold-agpr-phis.mir
M llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir
M llvm/test/CodeGen/AMDGPU/fold-cndmask.mir
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll
M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
M llvm/test/CodeGen/AMDGPU/fold-implicit-operand.mir
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fold-multiple-commute.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-remove-m0-redef.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-scalar-fmac.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/fold-short-64-bit-literals.mir
M llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/fold_acc_copy_into_valu.mir
M llvm/test/CodeGen/AMDGPU/folding-of-i32-as-i64.mir
M llvm/test/CodeGen/AMDGPU/force-store-sc0-sc1.ll
M llvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-flat-atomics-f64.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-global-atomics-f64.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/frexp-constant-fold.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.r600.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/fsub64.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-atomic.ll
M llvm/test/CodeGen/AMDGPU/gds-unsupported.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/gfx940-hazards.mir
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/greedy-broken-ssa-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/gws-hazards.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses.mir
M llvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
M llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
M llvm/test/CodeGen/AMDGPU/hazard-kill.mir
M llvm/test/CodeGen/AMDGPU/hazard-lds-addtid.mir
M llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-meta-insts.mir
M llvm/test/CodeGen/AMDGPU/hazard-shift64.mir
M llvm/test/CodeGen/AMDGPU/hazard.mir
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/i1_copy_phi_with_phi_incoming_value.mir
M llvm/test/CodeGen/AMDGPU/i8-to-double-to-float.ll
M llvm/test/CodeGen/AMDGPU/icmp-select-sete-reverse-args.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/image-attributes.ll
M llvm/test/CodeGen/AMDGPU/image-resource-id.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-pregfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/input-mods.r600.ll
M llvm/test/CodeGen/AMDGPU/insert-branch-w32.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert-singleuse-vdst.mir
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem-ds.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invariant-image-load.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/jump-address.ll
M llvm/test/CodeGen/AMDGPU/kcache-fold.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/knownbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-graphics.ll
M llvm/test/CodeGen/AMDGPU/large-constant-initializer.ll
M llvm/test/CodeGen/AMDGPU/lcssa-optnone.ll
M llvm/test/CodeGen/AMDGPU/lds-atomic-fadd.ll
M llvm/test/CodeGen/AMDGPU/lds-atomic-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-branch-vmem-hazard.mir
M llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx11.mir
M llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx12.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-hazards.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll
M llvm/test/CodeGen/AMDGPU/lds-initializer.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll
M llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/legalizedag-bug-expand-setcc.ll
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/literal-constant-like-operand-instruction-size.ll
M llvm/test/CodeGen/AMDGPU/literals.ll
M llvm/test/CodeGen/AMDGPU/liveness.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.fadd.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.sc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx10.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.prim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdiv.fast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.o.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.x.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx940.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.u32.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.msad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.i24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.u24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.get.waveid.in.workgroup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.getpc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memtime.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.nop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sethalt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.hi.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sffbh.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umax.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umin.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.pow-gfx9.ll
M llvm/test/CodeGen/AMDGPU/llvm.pow.ll
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.cube.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.dot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.clamped.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.ieee.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.tex.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/lo16-hi16-illegal-copy.mir
M llvm/test/CodeGen/AMDGPU/lo16-hi16-physreg-copy.mir
M llvm/test/CodeGen/AMDGPU/lo16-lo16-physreg-copy-agpr.mir
M llvm/test/CodeGen/AMDGPU/lo16-lo16-physreg-copy-sgpr.mir
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i1.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/load-input-fold.ll
M llvm/test/CodeGen/AMDGPU/load-lo16.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32-no-ds128.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32.ll
M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i32.ll
M llvm/test/CodeGen/AMDGPU/load-local-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/load-store-opt-dlc.mir
M llvm/test/CodeGen/AMDGPU/load-store-opt-scc.mir
M llvm/test/CodeGen/AMDGPU/load-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
M llvm/test/CodeGen/AMDGPU/local-atomics.ll
M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-memory.r600.ll
M llvm/test/CodeGen/AMDGPU/local-stack-slot-offset.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/AMDGPU/loop-idiom.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-other-terminators.mir
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll
M llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-ignorable-exec-use.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-convergent.mir
M llvm/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_int24.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/madak-inline-constant.mir
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/mai-inline.ll
M llvm/test/CodeGen/AMDGPU/make-buffer-rsrc-lds-fails.ll
M llvm/test/CodeGen/AMDGPU/max-literals.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/mcp-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/mcp-implicit-clobber.mir
M llvm/test/CodeGen/AMDGPU/mcp-overlap-after-propagation.mir
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/mem-builtins.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-region.mir
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load-gfx10.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load-gfx11.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load-gfx12.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx10.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx11.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx12.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-agpr.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
M llvm/test/CodeGen/AMDGPU/merge-s-load.mir
M llvm/test/CodeGen/AMDGPU/merge-sbuffer-load.mir
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/merge-store-usedef.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/merge-tbuffer-gfx12.mir
M llvm/test/CodeGen/AMDGPU/merge-tbuffer.mir
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx940.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/missing-store.ll
M llvm/test/CodeGen/AMDGPU/mmo-target-flags-folding.ll
M llvm/test/CodeGen/AMDGPU/mode-register-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/mode-register.mir
M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-lshlrev.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/movreld-bug.ll
M llvm/test/CodeGen/AMDGPU/movrels-bug.mir
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
M llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-r600.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nand.ll
M llvm/test/CodeGen/AMDGPU/neighboring-mfma-padding.mir
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/nor.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.mir
M llvm/test/CodeGen/AMDGPU/nsa-vmem-hazard.mir
M llvm/test/CodeGen/AMDGPU/nullptr-long-address-spaces.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod-nsz-flag.mir
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/operand-spacing.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/opt_exec_copy_fold.mir
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-copies-extra-insts-after-copy.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-non-empty-but-used-interval.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-masking-strip-terminator-bits.mir
M llvm/test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking-wave32.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-op-sel.ll
M llvm/test/CodeGen/AMDGPU/packetizer.ll
M llvm/test/CodeGen/AMDGPU/parallelandifcollapse.ll
M llvm/test/CodeGen/AMDGPU/parallelorifcollapse.ll
M llvm/test/CodeGen/AMDGPU/partial-forwarding-hazards.mir
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/partially-dead-super-register-immediate.ll
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
M llvm/test/CodeGen/AMDGPU/perfhint.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/permlane16_var-op-sel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
M llvm/test/CodeGen/AMDGPU/pk_max_f16_literal.ll
M llvm/test/CodeGen/AMDGPU/post-ra-sched-reset.mir
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir
M llvm/test/CodeGen/AMDGPU/postra-machine-sink.mir
M llvm/test/CodeGen/AMDGPU/postra-norename.mir
M llvm/test/CodeGen/AMDGPU/power-sched-no-cycle.mir
M llvm/test/CodeGen/AMDGPU/power-sched-no-instr-sunit.mir
M llvm/test/CodeGen/AMDGPU/predicate-dp4.ll
M llvm/test/CodeGen/AMDGPU/predicates.ll
M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
M llvm/test/CodeGen/AMDGPU/preserve-user-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/private-memory-r600.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-globals.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx10.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/pv-packing.ll
M llvm/test/CodeGen/AMDGPU/pv.ll
M llvm/test/CodeGen/AMDGPU/r600-encoding.ll
M llvm/test/CodeGen/AMDGPU/r600-export-fix.ll
M llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll
M llvm/test/CodeGen/AMDGPU/r600.add.ll
M llvm/test/CodeGen/AMDGPU/r600.alu-limits.ll
M llvm/test/CodeGen/AMDGPU/r600.bitcast.ll
M llvm/test/CodeGen/AMDGPU/r600.func-alignment.ll
M llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
M llvm/test/CodeGen/AMDGPU/r600.private-memory.ll
M llvm/test/CodeGen/AMDGPU/r600.sub.ll
M llvm/test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/r600cfg.ll
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/readlane_exec0.mir
M llvm/test/CodeGen/AMDGPU/reduce-build-vec-ext-to-ext-build-vec.ll
M llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduce-saveexec.mir
M llvm/test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
M llvm/test/CodeGen/AMDGPU/regcoalescer-resolve-lane-conflict-by-subranges.mir
M llvm/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir
M llvm/test/CodeGen/AMDGPU/reject-agpr-usage-before-gfx908.ll
M llvm/test/CodeGen/AMDGPU/rel32.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs.mir
M llvm/test/CodeGen/AMDGPU/remat-dead-subreg.mir
M llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-wave32-feature.ll
M llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-gpr-idx-mode.mir
M llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-special-instructions.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/reorder-stores.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/reserved-reg-in-clause.mir
M llvm/test/CodeGen/AMDGPU/resource-usage-crash-unhandled-reg.mir
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/rotl.i64.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.i64.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/rv7x0_count3.ll
M llvm/test/CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir
M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_or_saveexec_xor_combine.mir
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/sampler-resource-id.ll
M llvm/test/CodeGen/AMDGPU/save-fp.ll
M llvm/test/CodeGen/AMDGPU/scalar-branch-missing-and-exec.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/scalar-store-cache-flush.mir
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/sched-barrier-hang-weak-dep.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-post-RA.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-pre-RA.mir
M llvm/test/CodeGen/AMDGPU/sched-group-barrier-pipeline-solver.mir
M llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
M llvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir
M llvm/test/CodeGen/AMDGPU/sched-setprio.ll
M llvm/test/CodeGen/AMDGPU/sched.barrier.inverted.mask.ll
M llvm/test/CodeGen/AMDGPU/schedule-addrspaces.ll
M llvm/test/CodeGen/AMDGPU/schedule-avoid-spills.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-fpmode.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier.mir
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop.ll
M llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-ilp.ll
M llvm/test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-physregdeps.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-misched-max-waves.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
M llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
M llvm/test/CodeGen/AMDGPU/sdivrem64.r600.ll
M llvm/test/CodeGen/AMDGPU/sdwa-gfx9.mir
M llvm/test/CodeGen/AMDGPU/sdwa-op64-test.ll
M llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
M llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
M llvm/test/CodeGen/AMDGPU/sdwa-stack.mir
M llvm/test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select-constant-xor.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.f16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.legal.f16.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.ll
M llvm/test/CodeGen/AMDGPU/select64.ll
M llvm/test/CodeGen/AMDGPU/selectcc-cnd.ll
M llvm/test/CodeGen/AMDGPU/selectcc-cnde-int.ll
M llvm/test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll
M llvm/test/CodeGen/AMDGPU/selectcc-opt.ll
M llvm/test/CodeGen/AMDGPU/selectcc.ll
M llvm/test/CodeGen/AMDGPU/sendmsg-m0-hazard.mir
M llvm/test/CodeGen/AMDGPU/set-dx10.ll
M llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/setcc-equivalent.ll
M llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll
M llvm/test/CodeGen/AMDGPU/setcc-limit-load-shrink.ll
M llvm/test/CodeGen/AMDGPU/setcc-multiple-use.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc-sext.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/seto.ll
M llvm/test/CodeGen/AMDGPU/setuo.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sext-eliminate.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-failure-r600.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-partially-undef.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/sgprcopies.ll
M llvm/test/CodeGen/AMDGPU/shared-op-cycle.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-i64-opts.ll
M llvm/test/CodeGen/AMDGPU/shift-select.ll
M llvm/test/CodeGen/AMDGPU/shl-add-to-add-shl.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shl_add_constant.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/shrink-carry.mir
M llvm/test/CodeGen/AMDGPU/shrink-i32-kimm.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-implicit-vcclo.mir
M llvm/test/CodeGen/AMDGPU/shrink-mad-fma.mir
M llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/si-i1-copies.mir
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
M llvm/test/CodeGen/AMDGPU/si-scheduler-exports.ll
M llvm/test/CodeGen/AMDGPU/si-scheduler.ll
M llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow-postra.mir
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow.mir
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/smem-no-clause-coalesced.mir
M llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/smrd-fold-offset.mir
M llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll
M llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/spill-alloc-sgpr-init-bug.ll
M llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill192.mir
M llvm/test/CodeGen/AMDGPU/spill224.mir
M llvm/test/CodeGen/AMDGPU/spill288.mir
M llvm/test/CodeGen/AMDGPU/spill320.mir
M llvm/test/CodeGen/AMDGPU/spill352.mir
M llvm/test/CodeGen/AMDGPU/spill384.mir
M llvm/test/CodeGen/AMDGPU/split-mbb-lis-subrange.mir
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
M llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
M llvm/test/CodeGen/AMDGPU/splitkit-copy-live-lanes.mir
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
M llvm/test/CodeGen/AMDGPU/splitkit-nolivesubranges.mir
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
M llvm/test/CodeGen/AMDGPU/stale-livevar-in-twoaddr-pass.mir
M llvm/test/CodeGen/AMDGPU/store-barrier.ll
M llvm/test/CodeGen/AMDGPU/store-global.ll
M llvm/test/CodeGen/AMDGPU/store-hi16.ll
M llvm/test/CodeGen/AMDGPU/store-local.ll
M llvm/test/CodeGen/AMDGPU/store-private.ll
M llvm/test/CodeGen/AMDGPU/store-v3i64.ll
M llvm/test/CodeGen/AMDGPU/store-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/store_typed.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f64.ll
M llvm/test/CodeGen/AMDGPU/structurize.ll
M llvm/test/CodeGen/AMDGPU/structurize1.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
M llvm/test/CodeGen/AMDGPU/subreg-intervals.mir
M llvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
M llvm/test/CodeGen/AMDGPU/subvector-test.mir
M llvm/test/CodeGen/AMDGPU/switch-unreachable.ll
M llvm/test/CodeGen/AMDGPU/swizzle-export.ll
M llvm/test/CodeGen/AMDGPU/tail-dup-bundle.mir
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
M llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll
M llvm/test/CodeGen/AMDGPU/texture-input-merge.ll
M llvm/test/CodeGen/AMDGPU/threeaddr-wmma.mir
M llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll
M llvm/test/CodeGen/AMDGPU/trans-forwarding-hazards.mir
M llvm/test/CodeGen/AMDGPU/triv-disjoint-mem-access-neg-offset.mir
M llvm/test/CodeGen/AMDGPU/true16-ra-pre-gfx11-regression-test.mir
M llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i64.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/trunc-store.ll
M llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-wmma.mir
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/udivrem64.r600.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/AMDGPU/undef-build-vector.ll
M llvm/test/CodeGen/AMDGPU/undef-copy-propagation.mir
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-crash.ll
M llvm/test/CodeGen/AMDGPU/uniform-load-from-tid.ll
M llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/uniform-phi-with-undef.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unknown-processor.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/unsupported-atomics.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/unsupported-cc.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-sample.ll
M llvm/test/CodeGen/AMDGPU/urem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v1024.ll
M llvm/test/CodeGen/AMDGPU/v1i64-kernel-arg.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/v_mac_f16.ll
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expand_and_shrink.mir
M llvm/test/CodeGen/AMDGPU/v_mov_b64_expansion.mir
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
M llvm/test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx-set-kill.mir
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx-wrong-kill-flags.mir
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.ll
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-exec-war-hazard.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard-sdwa.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane16var-hazard.mir
M llvm/test/CodeGen/AMDGPU/vector-alloca.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
M llvm/test/CodeGen/AMDGPU/vectorize-global-local.ll
M llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir
M llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx12-gds.mir
M llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/verify-image.mir
M llvm/test/CodeGen/AMDGPU/verify-scalar-store.mir
M llvm/test/CodeGen/AMDGPU/verify-sop.mir
M llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
M llvm/test/CodeGen/AMDGPU/verify-vopd-gfx12.mir
M llvm/test/CodeGen/AMDGPU/verify-vopd.mir
M llvm/test/CodeGen/AMDGPU/vertex-fetch-encoding.ll
M llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/vgpr-remat.mir
M llvm/test/CodeGen/AMDGPU/vi-removed-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir
M llvm/test/CodeGen/AMDGPU/vmem-vcc-hazard.mir
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
M llvm/test/CodeGen/AMDGPU/vopc_dpp.ll
M llvm/test/CodeGen/AMDGPU/vopc_dpp.mir
M llvm/test/CodeGen/AMDGPU/vopd-combine.mir
M llvm/test/CodeGen/AMDGPU/vopd-src2acc-delay.mir
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/vselect64.ll
M llvm/test/CodeGen/AMDGPU/vtx-fetch-branch.ll
M llvm/test/CodeGen/AMDGPU/vtx-schedule.ll
M llvm/test/CodeGen/AMDGPU/wait.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-agpr.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-bvh.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-irreducible.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-single-basic-block.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-meta-instructions.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-preexisting-vscnt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-skip-meta.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vinterp.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vmem-waw.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.mir
M llvm/test/CodeGen/AMDGPU/waitcnt.mir
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wmma-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll
M llvm/test/CodeGen/AMDGPU/wqm-terminators.mir
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/wqm.mir
M llvm/test/CodeGen/AMDGPU/write-register-vgpr-into-sgpr.ll
M llvm/test/CodeGen/AMDGPU/write_register.ll
M llvm/test/CodeGen/AMDGPU/wrong-transalu-pos-fix.ll
M llvm/test/CodeGen/AMDGPU/xfail.r600.bitcast.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
M llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
M llvm/test/CodeGen/AMDGPU/xnor.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
M llvm/test/CodeGen/AMDGPU/zero_extend.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
M llvm/test/CodeGen/AMDGPU/zext-lid.ll
M llvm/test/CodeGen/MIR/AMDGPU/empty-custom-regmask.mir
M llvm/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir
M llvm/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir
M llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir
M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-register-parse-error1.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-register-parse-error2.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-frame-offset-reg-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-frame-offset-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-scratch-rsrc-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-parse-error-stack-ptr-offset-reg.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-scratch-rsrc-reg-reg-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/mfi-stack-ptr-offset-reg-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/mir-canon-multi.mir
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-order-reserved-regs.mir
M llvm/test/CodeGen/MIR/AMDGPU/stack-id-assert.mir
M llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir
M llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir
M llvm/test/CodeGen/MIR/AMDGPU/target-flags.mir
M llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
M llvm/test/CodeGen/MIR/AMDGPU/target-memoperands.mir
M llvm/test/MachineVerifier/test_g_intrinsic.mir
M llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
M llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void-inseltpoison.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-address-space.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-readonly-address-space.ll
M llvm/test/tools/llvm-objdump/AMDGPU/elf-disassemble-symbolize-operands.yaml
Log Message:
-----------
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
Similar to 806761a7629df268c8aed49657aeccffa6bca449.
For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.
This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:
```
LLVM :: CodeGen/AMDGPU/fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fabs.ll
LLVM :: CodeGen/AMDGPU/floor.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
Commit: 46a929f0a077186034d5692b013730578a2a2d36
https://github.com/llvm/llvm-project/commit/46a929f0a077186034d5692b013730578a2a2d36
Author: Danila Malyutin <danilaml at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
Log Message:
-----------
[SelectionDAG] Fix isKnownNeverZeroFloat for vectors (#78308)
Return true iff all of vector elements are constant AND not zero
Fixes #77805
Previously, it'd return `true` (as in - the value is known to be never
zero) for any build_vector/splat_vector with non-constant elements.
Commit: 00d6232d6b331f7d82823c508684be81239a2897
https://github.com/llvm/llvm-project/commit/00d6232d6b331f7d82823c508684be81239a2897
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
Log Message:
-----------
[RISCV][GISel] Don't create generic virtual registers in selectSHXADDOp/selectSHXADD_UWOp. (#78396)
Since we're creating target specific instructions, I think we should be
creating registers with the GPR register class.
Commit: 069e9b44954cad452eb6be4d1e3b924e7dda8de0
https://github.com/llvm/llvm-project/commit/069e9b44954cad452eb6be4d1e3b924e7dda8de0
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
Log Message:
-----------
[RISCV] Overwrite cpu target features for full arch string in target attribute (#77426)
This patch reworks RISCVTargetInfo::initFeatureMap to fix the issue
described
in
https://github.com/llvm/llvm-project/pull/74889#pullrequestreview-1773445559
(and is an alternative to #75804)
When a full arch string is specified, a "full" list of extensions is now
passed
after the __RISCV_TargetAttrNeedOverride marker feature, which includes
any
negative features that disable ISA extensions.
In initFeatureMap, there are now two code paths:
1. If the arch string was overriden, use the "full" list of override
features,
only adding back any non-isa features that were specified.
Using the full list of positive and negative features will mean that the
target-cpu will have no effect on the final arch, e.g.
__attribute__((target("arch=rv64i"))) with -mcpu=sifive-x280 will have
the
features for rv64i, not a mix of both.
2. Otherwise, parse and *append* the list of implied features. By
appending, we
turn back on any features that might have been disabled by a negative
extension, i.e. this handles the case fixed in #74889.
Commit: e8af89ef3de45b3058041388267d728c4ade16e8
https://github.com/llvm/llvm-project/commit/e8af89ef3de45b3058041388267d728c4ade16e8
Author: Robin Caloudis <53619127+robincaloudis at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/LibASTMatchersTutorial.rst
Log Message:
-----------
[clang][docs] Improve "Obtaining Clang" section (#71313)
## Why
The documentation is written relatively to `clang-llvm`, not the root
repository directory. However, some steps in the documentation are
relative to the repository root, which is not correct.
## What
Documentation steps have been modified to make them correct and outdated
ones were updated. Some details:
* Correct paths in documentation
* Change `bootstrap.py` -> `configure.py` since bootstraping Ninja has
[slightly
changed](https://github.com/ninja-build/ninja/tree/master?tab=readme-ov-file#python)
Commit: d89a0a65947eb0c7bce733ee76991f900209d139
https://github.com/llvm/llvm-project/commit/d89a0a65947eb0c7bce733ee76991f900209d139
Author: Aviad Cohen <aviadcohen7 at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaFolders.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][Tosa]: Add folder to ReciprocalOp of splat constant inputs (#78137)
Commit: d06ae33ec32122bb526fb35025c1f0cf979f1090
https://github.com/llvm/llvm-project/commit/d06ae33ec32122bb526fb35025c1f0cf979f1090
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/CMakeLists.txt
M libcxx/cmake/caches/Generic-cxx26.cmake
M libcxx/cmake/caches/Generic-hardening-mode-extensive.cmake
M libcxx/cmake/caches/Generic-no-exceptions.cmake
M libcxx/cmake/caches/Generic-no-experimental.cmake
M libcxx/cmake/caches/Generic-no-filesystem.cmake
M libcxx/cmake/caches/Generic-no-localization.cmake
M libcxx/cmake/caches/Generic-no-random_device.cmake
M libcxx/cmake/caches/Generic-no-threads.cmake
M libcxx/cmake/caches/Generic-no-tzdb.cmake
M libcxx/cmake/caches/Generic-no-unicode.cmake
M libcxx/cmake/caches/Generic-no-wide-characters.cmake
M libcxx/docs/Modules.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/modules/CMakeLists.txt
R libcxx/modules/CMakeLists.txt.in
M libcxx/test/CMakeLists.txt
M libcxx/test/configs/cmake-bridge.cfg.in
R libcxx/test/lit.local.cfg
M libcxx/test/std/modules/std.compat.pass.cpp
M libcxx/test/std/modules/std.pass.cpp
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/features.py
M libcxx/utils/libcxx/test/modules.py
Log Message:
-----------
[libc++][modules] Removes module testing. (#76083)
This removes the entire modules testing infrastructure.
The current infrastructure uses CMake to generate the std and std.compat
module. This requires quite a bit of plumbing and uses CMake. Since
CMake introduced module support in CMake 3.26, modules have a higher
CMake requirement than the rest of the LLVM project. (The LLVM project
requires 3.20.) The main motivation for this approach was how libc++
generated its modules. Every header had its own module partition. This
was changed to improve performance and now only two modules remain. The
code to build these can be manually crafted.
A followup patch will reenable testing modules, using a different
approach.
Commit: 57ca74843586c9a93c425036c5538aae0a2cfa60
https://github.com/llvm/llvm-project/commit/57ca74843586c9a93c425036c5538aae0a2cfa60
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libcxx/docs/TestingLibcxx.rst
M libcxx/test/libcxx/module_std.gen.py
M libcxx/test/libcxx/module_std_compat.gen.py
A libcxx/test/libcxx/selftest/modules/no-modules.sh.cpp
A libcxx/test/libcxx/selftest/modules/std-and-std.compat-module.sh.cpp
A libcxx/test/libcxx/selftest/modules/std-module.sh.cpp
A libcxx/test/libcxx/selftest/modules/std.compat-module.sh.cpp
M libcxx/test/std/modules/std.compat.pass.cpp
M libcxx/test/std/modules/std.pass.cpp
M libcxx/utils/libcxx/test/config.py
M libcxx/utils/libcxx/test/features.py
M libcxx/utils/libcxx/test/format.py
M libcxx/utils/libcxx/test/modules.py
Log Message:
-----------
[libc++][modules] Adds module testing. (#76246)
This adds a new module test infrastructure. This requires tagging tests
using modules. The test runner uses this information to determine the
compiler flags needed to build and use the module.
Currently modules are build per test, which allows testing them for
tests with ADDITIONAL_COMPILE_FLAGS. At the moment only 4 tests use
modules. Therefore the performance penalty is not measurable. If in the
future more tests use modules it would be good to measure the overhead
and determine whether it's acceptable.
Commit: e6ac33b9369252b616625195bffc9ed6eb92cb52
https://github.com/llvm/llvm-project/commit/e6ac33b9369252b616625195bffc9ed6eb92cb52
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libc++][modules] Increase clang-tidy version used. (#76268)
As suggested in #71438 we should use
export import std;
in the std.compat module.
Testing this locally failed when building with the clang-tidy-17 plugin.
The std module was considered corrupt in the test
libcxx/test/libcxx/module_std_compat.gen.py
however the test
libcxx/test/libcxx/module_std.gen.py
passed. Both test generated identical std.pcm files. Using the
clang-tidy-18 plugin solves the issue.
Commit: 020ea3e8d1075ab4a388ecd0d6e7a9d4cd415392
https://github.com/llvm/llvm-project/commit/020ea3e8d1075ab4a388ecd0d6e7a9d4cd415392
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libcxx/.clang-tidy
M libcxx/include/__atomic/is_always_lock_free.h
M libcxx/include/locale
Log Message:
-----------
[libc++] Clang-tidy enable modernize-use-nullptr. (#76659)
Clang-tidy 18 no longer has false positives with the spaceship operator.
Note that I'm quite sure there are more occurrences in our headers that
are not caught.
Commit: fb79f80bf6bb7d70d0446894d8c531d584012adf
https://github.com/llvm/llvm-project/commit/fb79f80bf6bb7d70d0446894d8c531d584012adf
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
Log Message:
-----------
[libc++][modules] Fixes clang-tidy exports. (#76288)
As suggested in #71438 we should use
export import std;
in the std.compat module.
Using this exports some named declarations from functions and records,
adding them to the global namespace. Clang correctly does not export
these and it's an issue in the declaration filtering. Declarations in
function or record context are not considered a global named
declaration.
Commit: 2b3cdd69f7fa8f84513390fff06d0a9c28126717
https://github.com/llvm/llvm-project/commit/2b3cdd69f7fa8f84513390fff06d0a9c28126717
Author: Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libcxx/include/vector
Log Message:
-----------
[ASan][libc++][NFC] refactor vector annotations arguments (#78322)
This commit simplifies ASan helper functions in `std::vector` by
removing arguments which can be calculated later.
Short term it improves readability of helper functions in `std::vector`.
Long term it aims to help with a bigger refactor of container
annotations.
Commit: d4cb5d9f2ba636b0049fc5791d378e224e3a3ae7
https://github.com/llvm/llvm-project/commit/d4cb5d9f2ba636b0049fc5791d378e224e3a3ae7
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/X86/inline-asm-constraints.c
M clang/test/Sema/inline-asm-validate-x86.c
M llvm/docs/LangRef.rst
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/inline-asm-Ws-constraint-error.ll
A llvm/test/CodeGen/X86/inline-asm-Ws-constraint.ll
Log Message:
-----------
[X86] Add "Ws" constraint and "p" modifier for symbolic address/label reference (#77886)
Printing the raw symbol is useful in inline asm (e.g. getting the C++
mangled name, referencing a symbol in a custom way while ensuring it is
not optimized out even if internal). Similar constraints are available
in other targets (e.g. "S" for aarch64/riscv, "Cs" for m68k).
```
namespace ns { extern int var, a[4]; }
void foo() {
asm(".pushsection .xxx,\"aw\"; .dc.a %p0; .popsection" :: "Ws"(&ns::var));
asm(".reloc ., BFD_RELOC_NONE, %p0" :: "Ws"(&ns::a[3]));
}
```
Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105576
Commit: cbb46d94e771b1961faf03371de4a893e044979a
https://github.com/llvm/llvm-project/commit/cbb46d94e771b1961faf03371de4a893e044979a
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/rvv-load-store.ll
Log Message:
-----------
[RISCV] Add run line for code size in rvv load/store cost model test. NFC
This illustrates #78352. There are other tests for gathers/scatters and masked
load/stores which likely have the same issue, but I've left them out for now
since they don't seem to be affected by fixing RISCVTTIImpl::getMemoryOpCost.
Commit: 54d81936393758fff8982aa4f4f997f4d9062828
https://github.com/llvm/llvm-project/commit/54d81936393758fff8982aa4f4f997f4d9062828
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-01-16 (Tue, 16 Jan 2024)
Changed paths:
M lldb/source/Target/Process.cpp
Log Message:
-----------
Return high address masks correctly in Process (#78379)
In https://reviews.llvm.org/D151292 I added the ability to track address
masks separately for high and low memory addresses, a capability of
AArch64. I did my testing with manual address mask settings (via
target.process.highmem-virtual-addressable-bits) but didn't have a real
corefile that included this metadata and required it.
My intention is that when the high address mask isn't specified, by the
user (via the setting) or the Process plugin, we fall back to using the
low address mask. The low and high address mask is the same for almost
all environments.
But the patch I wrote never uses the Process plugin high address mask if
it was set, e.g. from corefile metadata. This patch corrects that.
I also have an old patch in Phabractor that was approved to add
FixAddress methods to SBProcess; I need to pick that patch up and finish
it (I wanted to add an enum to specify which mask is being requested
iirc), so I can do address masks tests in API tests.
rdar://120926000
Commit: da0755f7b7ccb08c8819125bc7b75e0129e4be42
https://github.com/llvm/llvm-project/commit/da0755f7b7ccb08c8819125bc7b75e0129e4be42
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/spill-fill-fold.ll
Log Message:
-----------
[RISCV][test] Test showing missed optimisation for spills/fills of GPR<->FPR moves
The fmv can be removed through appropriate logic in
RISCVInstrInfo::foldMemoryOperandImpl.
Commit: 55172b7005a6f972272f6d79f2b0d15063bc1b1c
https://github.com/llvm/llvm-project/commit/55172b7005a6f972272f6d79f2b0d15063bc1b1c
Author: Dรกvid Ferenc Szabรณ <30732159+dfszabo at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir
Log Message:
-----------
[GlobalISel] Improve combines for extend operation by taking hint insโฆ (#74125)
โฆtructions into account
Hint instructions like G_ASSERT_ZEXT cann be viewed as a copy. Including
this fact into the combiner allows the match more patterns involving
such instructions.
Commit: 5f57ad85a1a7c46eb43eee3c7d93b11d8fd7fcfa
https://github.com/llvm/llvm-project/commit/5f57ad85a1a7c46eb43eee3c7d93b11d8fd7fcfa
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/test/Analysis/BasicAA/inttoptr_constexpr.ll
Log Message:
-----------
[BasicAA] Remove incorrect rule about constant pointers (#76815)
BasicAA currently says that any Constant cannot alias an identified
local object. This is not correct if the local object escaped, as it's
possible to create a pointer to the escaped object using an inttoptr
constant expression base.
To compensate for this, make sure that inttoptr constant expressions are
treated as escape sources, just like inttoptr instructions. This ensures
that the optimization can still be applied if the local object is
non-escaping. This is sufficient to still optimize the original
motivating case from c53e2ecf0296a55d3c33c19fb70a3aa7f81f2732.
Fixes https://github.com/llvm/llvm-project/issues/76789.
Commit: cde780c18f8cde22ffd377bf6bcc098c52640f00
https://github.com/llvm/llvm-project/commit/cde780c18f8cde22ffd377bf6bcc098c52640f00
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/X86/dag-combine-counter.ll
Log Message:
-----------
[DAGCombine] Add debug counter (#78259)
Add a debug counter for DAGCombine. This can help with bisecting which
DAG combine introduced a miscompile.
Commit: 435bcea83bd5fc3e4195fc811d89b2de0163d8e5
https://github.com/llvm/llvm-project/commit/435bcea83bd5fc3e4195fc811d89b2de0163d8e5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/counter-fallback.ll
Log Message:
-----------
[GISel] Add debug counter to force sdag fallback (#78257)
Add a debug counter that allows forcing an sdag fallback after a certain
number of functions.
The intended use-case is to bisect which function gets miscompiled by
global isel using `-debug-counter=globalisel-count=N` (in cases where
sdag doesn't also miscompile it, of course).
The "falling back" debug line is printed unconditionally, because using
`-debug-only` is usually too spammy for the intended purpose.
Commit: 34b106789ac2b3a0b8728e003dc63224a1d008fb
https://github.com/llvm/llvm-project/commit/34b106789ac2b3a0b8728e003dc63224a1d008fb
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
A llvm/test/Assembler/implicit-intrinsic-declaration-invalid.ll
A llvm/test/Assembler/implicit-intrinsic-declaration.ll
Log Message:
-----------
[AsmParser] Implicitly declare intrinsics (#78251)
We currently require that all referenced globals have an explicit
declaration or definition in the IR. For intrinsics, this requirement is
redundant, because they cannot be called indirectly (including "direct"
calls with mismatched function type). The function type used in the call
directly determines the function type of the intrinsic declaration.
Relax this requirement, and implicitly declare any intrinsics that do
not have an explicit declaration. This will remove a common annoyance
when writing tests and alive2 proofs.
(I also plan to introduce a mode where declarations for all missing
symbols will be automatically added, to make working with incomplete IR
easier -- but that will be behind a default-disabled flag.)
Commit: 75f232181a2b9c9bd85823f88b2d63559c592556
https://github.com/llvm/llvm-project/commit/75f232181a2b9c9bd85823f88b2d63559c592556
Author: Craig Hesling <craig at hesling.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/bindings/python/README.txt
M clang/bindings/python/clang/cindex.py
Log Message:
-----------
[libclang/python] Bump minimum compatibility to Python 3.6 (#77228)
Remove Python 2 support and clean up code that conditions based on
version.
Issue #76664.
Commit: 588802a6708d8d3116331d975eb80eba7cfdae24
https://github.com/llvm/llvm-project/commit/588802a6708d8d3116331d975eb80eba7cfdae24
Author: Craig Hesling <craig at hesling.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M .github/workflows/libclang-python-tests.yml
M .github/workflows/llvm-project-tests.yml
Log Message:
-----------
[GitHub] Add python 3.7 to libclang python test (#77219)
This enables the libclang python binding test to check
the oldest version of Python supported in addition
to the normal python version.
It is important to check this for issue #76664, since
many new mainstream python type annotation features
and best practices are not compatible with older
versions of python.
Additionally, frustration around ever increasing
platform dependencies and versions has been raised.
This will help ensure that python maintains reasonable
backwards compatibility.
Adding this additional build step will increase the
run time, but this should always be minimal, since
the additional libclang compilation should see 100%
cache hit rate.
Issue #76664.
Fixes #76601.
Commit: baa39b789bbcf3c597945e6794a02c8e32ccbbd5
https://github.com/llvm/llvm-project/commit/baa39b789bbcf3c597945e6794a02c8e32ccbbd5
Author: Alex Zinenko <zinenko at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
Log Message:
-----------
[mlir] fix wording in transform dialect docs
The wording "fails silently" has been sometimes used to indicate that a
silenceable failure was emitted by the operation. The meaning is exactly
the opposite: silenceable failure is _not_ silent unless silenced.
Commit: 94da2b21ee3f2baed729333ec8bbf96f92c1fa84
https://github.com/llvm/llvm-project/commit/94da2b21ee3f2baed729333ec8bbf96f92c1fa84
Author: Konstantin Varlamov <varconsteq at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libcxx/.clang-tidy
M libcxx/include/__atomic/is_always_lock_free.h
M libcxx/include/locale
Log Message:
-----------
Revert "[libc++] Clang-tidy enable modernize-use-nullptr. (#76659)" (#78409)
This reverts commit 020ea3e8d1075ab4a388ecd0d6e7a9d4cd415392.
This seems to break `test/libcxx/clang_tidy.gen.py/regex.sh.cpp` (in
C++03 mode for some reason):
```
2024-01-17T07:32:22.1759374Z # RUN: at line 12
2024-01-17T07:32:22.1773919Z clang-tidy-18 /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/test/libcxx/clang_tidy.gen.py/regex.sh.cpp --warnings-as-errors=* -header-filter=.* --config-file=/home/runner/_work/llvm-project/llvm-project/libcxx/.clang-tidy -- -Wweak-vtables -nostdinc++ -I /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/include/c++/v1 -I /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/include/c++/v1 -I /home/runner/_work/llvm-project/llvm-project/libcxx/test/support -std=c++03 -Werror -Wall -Wctad-maybe-unsupported -Wextra -Wshadow -Wundef -Wunused-template -Wno-unused-command-line-argument -Wno-attributes -Wno-pessimizing-move -Wno-noexcept-type -Wno-atomic-alignment -Wno-reserved-module-identifier -Wdeprecated-copy -Wdeprecated-copy-dtor -Wno-user-defined-literals -Wno-tautological-compare -Wsign-compare -Wunused-variable -Wunused-parameter -Wunreachable-code -Wno-unused-local-typedef -Wno-local-type-template-args -Wno-c++11-extensions -Wno-unknown-pragmas -Wno-pass-failed -Wno-mismatched-new-delete -Wno-redundant-move -Wno-self-move -D_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER -D_LIBCPP_ENABLE_EXPERIMENTAL -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_NONE -Werror=thread-safety -Wuser-defined-warnings -fno-modules
2024-01-17T07:32:22.1803227Z # executed command: clang-tidy-18 /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/test/libcxx/clang_tidy.gen.py/regex.sh.cpp '--warnings-as-errors=*' '-header-filter=.*' --config-file=/home/runner/_work/llvm-project/llvm-project/libcxx/.clang-tidy -- -Wweak-vtables -nostdinc++ -I /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/include/c++/v1 -I /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/include/c++/v1 -I /home/runner/_work/llvm-project/llvm-project/libcxx/test/support -std=c++03 -Werror -Wall -Wctad-maybe-unsupported -Wextra -Wshadow -Wundef -Wunused-template -Wno-unused-command-line-argument -Wno-attributes -Wno-pessimizing-move -Wno-noexcept-type -Wno-atomic-alignment -Wno-reserved-module-identifier -Wdeprecated-copy -Wdeprecated-copy-dtor -Wno-user-defined-literals -Wno-tautological-compare -Wsign-compare -Wunused-variable -Wunused-parameter -Wunreachable-code -Wno-unused-local-typedef -Wno-local-type-template-args -Wno-c++11-extensions -Wno-unknown-pragmas -Wno-pass-failed -Wno-mismatched-new-delete -Wno-redundant-move -Wno-self-move -D_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER -D_LIBCPP_ENABLE_EXPERIMENTAL -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_NONE -Werror=thread-safety -Wuser-defined-warnings -fno-modules
2024-01-17T07:32:22.1817757Z # .---command stdout------------
2024-01-17T07:32:22.1820160Z # | /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/include/c++/v1/__iterator/iterator_traits.h:124:50: error: use nullptr [modernize-use-nullptr,-warnings-as-errors]
2024-01-17T07:32:22.1822498Z # | 124 | static const bool value = decltype(__test<_Tp>(0, 0, 0, 0, 0))::value;
2024-01-17T07:32:22.1823337Z # | | ^
2024-01-17T07:32:22.1824052Z # | | nullptr
2024-01-17T07:32:22.1826651Z # | /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/include/c++/v1/__iterator/iterator_traits.h:124:53: error: use nullptr [modernize-use-nullptr,-warnings-as-errors]
2024-01-17T07:32:22.1829325Z # | 124 | static const bool value = decltype(__test<_Tp>(0, 0, 0, 0, 0))::value;
2024-01-17T07:32:22.1831137Z # | | ^
2024-01-17T07:32:22.1831963Z # | | nullptr
2024-01-17T07:32:22.1834149Z # | /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/include/c++/v1/__iterator/iterator_traits.h:124:56: error: use nullptr [modernize-use-nullptr,-warnings-as-errors]
2024-01-17T07:32:22.1848711Z # | 124 | static const bool value = decltype(__test<_Tp>(0, 0, 0, 0, 0))::value;
2024-01-17T07:32:22.1849506Z # | | ^
2024-01-17T07:32:22.1849997Z # | | nullptr
2024-01-17T07:32:22.1851528Z # | /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/include/c++/v1/__iterator/iterator_traits.h:124:59: error: use nullptr [modernize-use-nullptr,-warnings-as-errors]
2024-01-17T07:32:22.1853391Z # | 124 | static const bool value = decltype(__test<_Tp>(0, 0, 0, 0, 0))::value;
2024-01-17T07:32:22.1854277Z # | | ^
2024-01-17T07:32:22.1854841Z # | | nullptr
2024-01-17T07:32:22.1856314Z # | /home/runner/_work/llvm-project/llvm-project/build/generic-cxx03/include/c++/v1/__iterator/iterator_traits.h:124:62: error: use nullptr [modernize-use-nullptr,-warnings-as-errors]
2024-01-17T07:32:22.1857768Z # | 124 | static const bool value = decltype(__test<_Tp>(0, 0, 0, 0, 0))::value;
2024-01-17T07:32:22.1858493Z # | | ^
2024-01-17T07:32:22.1858998Z # | | nullptr
2024-01-17T07:32:22.1859503Z # `-----------------------------
2024-01-17T07:32:22.1859900Z # .---command stderr------------
2024-01-17T07:32:22.1860259Z # | 43 warnings generated.
2024-01-17T07:32:22.1860710Z # | Suppressed 33 warnings (33 in non-user code).
2024-01-17T07:32:22.1861809Z # | Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
2024-01-17T07:32:22.1862750Z # | 5 warnings treated as errors
2024-01-17T07:32:22.1863229Z # `-----------------------------
2024-01-17T07:32:22.1863622Z # error: command failed with exit status: 1
```
(see
https://github.com/llvm/llvm-project/actions/runs/7552394884/job/20561192096)
Commit: 4426a1b7593a6e15caa09006d2446c95c19b5193
https://github.com/llvm/llvm-project/commit/4426a1b7593a6e15caa09006d2446c95c19b5193
Author: Tanmay <tnmysachan at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/log-pow.ll
Log Message:
-----------
[InstCombine] Add log-pow simplification for FP exponent edge case. (#76641)
Fixes https://github.com/llvm/llvm-project/issues/76549
The cause of the optimization miss was -
1. `optimizePow` converting almost integer FP exponents to integer, and
turning `pow` to `powi`.
2. `optimizeLog` not accepting `Intrinsic::powi` as a target.
This patch converts constantInt back to constantFP where applicable and
adds a test.
Commit: 53a3c738a95ec654b0b2196cdbd454a8d6d1be0e
https://github.com/llvm/llvm-project/commit/53a3c738a95ec654b0b2196cdbd454a8d6d1be0e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/strict_fpext.ll
Log Message:
-----------
AMDGPU: Remove fixed fixme from a test
Commit: 92289db82fb2334593e21995bb140b4bc95926e3
https://github.com/llvm/llvm-project/commit/92289db82fb2334593e21995bb140b4bc95926e3
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
A llvm/include/llvm/IR/VFABIDemangler.h
M llvm/include/llvm/Transforms/Utils/ModuleUtils.h
M llvm/lib/Analysis/CMakeLists.txt
R llvm/lib/Analysis/VFABIDemangling.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/IR/CMakeLists.txt
A llvm/lib/IR/VFABIDemangler.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/lib/Transforms/Utils/ModuleUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
A llvm/test/Verifier/vector-function-abi-variant.ll
M llvm/tools/vfabi-demangle-fuzzer/vfabi-demangler-fuzzer.cpp
M llvm/unittests/Analysis/CMakeLists.txt
R llvm/unittests/Analysis/VectorFunctionABITest.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/VFABIDemanglerTest.cpp
M llvm/unittests/Transforms/Utils/CMakeLists.txt
R llvm/unittests/Transforms/Utils/VFABIUtils.cpp
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Utils/BUILD.gn
Log Message:
-----------
[VFABI] Move the Vector ABI demangling utility to LLVMCore. (#77513)
This fixes #71892 allowing us to check magled names in the IR verifier.
Commit: 7f7bbb9b441eb4311419be051de4cc8e3cd3ab3c
https://github.com/llvm/llvm-project/commit/7f7bbb9b441eb4311419be051de4cc8e3cd3ab3c
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
Log Message:
-----------
[AArch64] Use parseArchExtension function. NFC (#78158)
Commit: 57b50ef0174b6fdf7b554c4ae2691e2fa4f78f96
https://github.com/llvm/llvm-project/commit/57b50ef0174b6fdf7b554c4ae2691e2fa4f78f96
Author: Valery Pykhtin <valery.pykhtin at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
[AMDGPU] Add InstCombine rule for ballot.i64 intrinsic in wave32 mode. (#71556)
Substitute with zero-extended to i64 ballot.i32 intrinsic.
Commit: 5fcf907b34355980f77d7665a175b05fea7a6b7b
https://github.com/llvm/llvm-project/commit/5fcf907b34355980f77d7665a175b05fea7a6b7b
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M mlir/docs/PatternRewriter.md
M mlir/examples/standalone/lib/Standalone/StandalonePasses.cpp
M mlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp
M mlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp
M mlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/OpenACCToSCF/OpenACCToSCF.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/DecomposeAffineOps.cpp
M mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LegalizeVectorStorage.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferDeallocationSimplification.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/Func/Transforms/DecomposeCallGraphTypes.cpp
M mlir/lib/Dialect/Func/Transforms/FuncConversions.cpp
M mlir/lib/Dialect/Func/Transforms/OneToNFuncConversions.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/TypeConsistency.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ConvertToDestinationStyle.cpp
M mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Linalg/Transforms/EliminateEmptyTensors.cpp
M mlir/lib/Dialect/Linalg/Transforms/EraseUnusedOperandsAndResults.cpp
M mlir/lib/Dialect/Linalg/Transforms/HoistPadding.cpp
M mlir/lib/Dialect/Linalg/Transforms/Interchange.cpp
M mlir/lib/Dialect/Linalg/Transforms/Split.cpp
M mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
M mlir/lib/Dialect/MemRef/Transforms/IndependenceTransforms.cpp
M mlir/lib/Dialect/MemRef/Transforms/MultiBuffer.cpp
M mlir/lib/Dialect/NVGPU/Transforms/MmaSyncTF32Transform.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopCanonicalization.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/lib/Dialect/SCF/Transforms/OneToNTypeConversion.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/Transforms/DecorateCompositeTypeLayoutPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorInterfaces.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/lib/Transforms/Mem2Reg.cpp
M mlir/lib/Transforms/Utils/CommutativityUtils.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][IR] Rename "update root" to "modify op" in rewriter API (#78260)
This commit renames 4 pattern rewriter API functions:
* `updateRootInPlace` -> `modifyOpInPlace`
* `startRootUpdate` -> `startOpModification`
* `finalizeRootUpdate` -> `finalizeOpModification`
* `cancelRootUpdate` -> `cancelOpModification`
The term "root" is a misnomer. The root is the op that a rewrite pattern
matches against
(https://mlir.llvm.org/docs/PatternRewriter/#root-operation-name-optional).
A rewriter must be notified of all in-place op modifications, not just
in-place modifications of the root
(https://mlir.llvm.org/docs/PatternRewriter/#pattern-rewriter). The old
function names were confusing and have contributed to various broken
rewrite patterns.
Note: The new function names use the term "modify" instead of "update"
for consistency with the `RewriterBase::Listener` terminology
(`notifyOperationModified`).
Commit: 36ef291d632e3c0ac109e8e1b19ae09d39ac5496
https://github.com/llvm/llvm-project/commit/36ef291d632e3c0ac109e8e1b19ae09d39ac5496
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
A llvm/test/CodeGen/AMDGPU/insert-waitcnts-hang.mir
Log Message:
-----------
[AMDGPU] Fix hang caused by VS_CNT handling at calls (#78318)
Fix a potential hang introduced by #77439 and #77935. This line:
setScoreUB(VS_CNT, getScoreLB(VS_CNT) + getWaitCountMax(VS_CNT));
could potentialy set UB lower than it was before, which confused
SIInsertWaitcnts's fixed point algorithm.
This was only triggered a STORE instruction with an implicit-def, which
seems odd but apparently happens for some spills.
Commit: 42b9ea841e2d9fe186b8892be713443b5f680565
https://github.com/llvm/llvm-project/commit/42b9ea841e2d9fe186b8892be713443b5f680565
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
Log Message:
-----------
[AMDGPU] Increase max scratch allocation for GFX12 (#77625)
Commit: 4a77414660d9ccd5c39cecfcc2dc1bf7fa6866e5
https://github.com/llvm/llvm-project/commit/4a77414660d9ccd5c39cecfcc2dc1bf7fa6866e5
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
A llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
Log Message:
-----------
[AMDGPU] CodeGen for GFX12 8/16-bit SMEM loads (#77633)
Commit: bbf2304d0a5c61565f82aac1a2e2209ed980be39
https://github.com/llvm/llvm-project/commit/bbf2304d0a5c61565f82aac1a2e2209ed980be39
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M .github/workflows/issue-subscriber.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-subscriber.yml
Log Message:
-----------
[GitHub][workflows] Replace curl with sparse checkout (#78303)
Commit: 15311d5822f5fcaf53bc7cfc728ad2b477a430e4
https://github.com/llvm/llvm-project/commit/15311d5822f5fcaf53bc7cfc728ad2b477a430e4
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/executable_first/TestExecutableFirst.py
Log Message:
-----------
[lldb] Skip TestExecutableFirst.test_executable_is_first_before_run on ELF
ELF does not have a hard distinction between shared libraries (and
position-independent) executables. It is possible to create a shared
library that will also be executable.
Commit: a3fc0f9d2b73b2bf6afbf420d204ab30253ebf33
https://github.com/llvm/llvm-project/commit/a3fc0f9d2b73b2bf6afbf420d204ab30253ebf33
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU] Add comments on SITargetLowering::widenLoad
Commit: 68ae1e49d24ce186331866ddae71063f4b8056e2
https://github.com/llvm/llvm-project/commit/68ae1e49d24ce186331866ddae71063f4b8056e2
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaType.cpp
Log Message:
-----------
[Clang][Sema][NFC] Remove unused Scope* parameter from Sema::GetTypeForDeclarator and Sema::ActOnTypeName (#78325)
Split from #78274
Commit: 1fbf5332863e9f7319ce4a91931b2c4ab089d6bb
https://github.com/llvm/llvm-project/commit/1fbf5332863e9f7319ce4a91931b2c4ab089d6bb
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
Log Message:
-----------
AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#76145)
Implement PhiLoweringHelper for GlobalISel in DivergenceLoweringHelper.
Use machine uniformity analysis to find divergent i1 phis and select
them as lane mask phis in same way SILowerI1Copies select VReg_1 phis.
Note that divergent i1 phis include phis created by LCSSA and all cases
of uses outside of cycle are actually covered by "lowering LCSSA phis".
GlobalISel lane masks are registers with sgpr register class and S1 LLT.
TODO: General goal is that instructions created in this pass are fully
instruction-selected so that selection of lane mask phis is not split
across multiple passes.
patch 3 from: https://github.com/llvm/llvm-project/pull/73337
Commit: 8f7fdd94ef19af7b4905b316c253a78219a6038f
https://github.com/llvm/llvm-project/commit/8f7fdd94ef19af7b4905b316c253a78219a6038f
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/AST/ast-dump-invalid-initialized.cpp
Log Message:
-----------
[clang][AST] Invalidate DecompositionDecl if it has invalid initializer. (#72428)
Fix #67495, #72198
We build ill-formed AST nodes for invalid structured binding. For case
`int [_, b] = {0, 0};`, the `DecompositionDecl` is valid, and its
children `BindingDecl`s are valid but with a NULL type, this breaks
clang invariants in many places, and using these `BindingDecl`s can lead
to crashes. This patch fixes them by marking the DecompositionDecl and
its children invalid.
Commit: e9e9d1b0b1c617481341957a9bedee89a08c3bfd
https://github.com/llvm/llvm-project/commit/e9e9d1b0b1c617481341957a9bedee89a08c3bfd
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
Log Message:
-----------
[AMDGPU] Disable V_MAD_U64_U32/V_MAD_I64_I32 workaround for GFX12 (#77927)
Commit: f12059eb3fd07d3a0cb0b9e8853e1583681d1a36
https://github.com/llvm/llvm-project/commit/f12059eb3fd07d3a0cb0b9e8853e1583681d1a36
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
Log Message:
-----------
[AMDGPU] Fix llvm.amdgcn.s.wait.event.export.ready for GFX12 (#78191)
The meaning of bit 0 of the immediate operand of S_WAIT_EVENT has been
flipped from GFX11.
Commit: 2db9244b6f66a4fd4c937de7b33a5b6dda4a06a8
https://github.com/llvm/llvm-project/commit/2db9244b6f66a4fd4c937de7b33a5b6dda4a06a8
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[RemoveDIs][DebugInfo] Make DIAssignID always replaceable (#78300)
This patch is a necessary step to allowing the new non-intrinsic debug
info to replace llvm.dbg.assign intrinsics. DIAssignIDs must be able to
look up the debug assigns that refer to them, and this patch makes them
always be considered "replaceable", allowing us to track and replace uses
for non-temporary instances.
Commit: e3702f6225fe4438ccffcac3f612e902c7b3db22
https://github.com/llvm/llvm-project/commit/e3702f6225fe4438ccffcac3f612e902c7b3db22
Author: Hirofumi Nakamura <k.nakamura.hirofumi at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] TableGen multi line string support. (#78032)
Support the handling of TableGen's multiline string (code) literal.
That has the form,
[{ this is the string possibly with multi line... }]
Commit: e6bd9835d90c8c30ceeb05338e80d75cf41a3b84
https://github.com/llvm/llvm-project/commit/e6bd9835d90c8c30ceeb05338e80d75cf41a3b84
Author: Mikael Holmen <mikael.holmen at ericsson.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[clang][CodeGen] Fix gcc warning about unused variable [NFC]
Without the fix gcc warned with
../../clang/lib/CodeGen/CGBuiltin.cpp:1022:19: warning: unused variable 'DRE' [-Wunused-variable]
1022 | if (const auto *DRE = dyn_cast<DeclRefExpr>(Base)) {
| ^~~
Fix the warning by removing the unused variable and change the "dyn_cast"
to "isa".
Commit: c5bbf40d9836409837696e4d60e94ed2ad3d6a32
https://github.com/llvm/llvm-project/commit/c5bbf40d9836409837696e4d60e94ed2ad3d6a32
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M openmp/libomptarget/src/OpenMP/InteropAPI.cpp
Log Message:
-----------
[openmp] Remove extra ';' outside of function
Fixes:
```
[4038/11058] Building CXX object projects/openmp/libomptarget/src/CMakeFiles/omptarget.dir/OpenMP/InteropAPI.cpp.o
/home/aganea/llvm-project/openmp/libomptarget/src/OpenMP/InteropAPI.cpp:202:2: warning: extra ';' outside of a function is incompatible with C++98 [-Wc++98-compat-extra-semi]
};
^
1 warning generated.
```
Commit: 63a3c4cc85066a5fc44ae7f55d5b42a5708b9724
https://github.com/llvm/llvm-project/commit/63a3c4cc85066a5fc44ae7f55d5b42a5708b9724
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M compiler-rt/lib/orc/coff_platform.cpp
Log Message:
-----------
[compiler-rt] Silence warning with MSVC 19.38 (Visual Studio 2022 17.8.3)
This fixes:
```
C:\git\llvm-project\compiler-rt\lib\orc\coff_platform.cpp(512): warning C4189: 'JDState': local variable is initialized but not referenced
```
Commit: 92f91dde6975a09830a3453f94f05452789c952f
https://github.com/llvm/llvm-project/commit/92f91dde6975a09830a3453f94f05452789c952f
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M third-party/benchmark/src/benchmark.cc
Log Message:
-----------
[third-party] Silence warning on benchmark when building with Clang ToT
fixes:
```
[7409/7446] Building CXX object third-party\benchmark\src\CMakeFiles\benchmark.dir\benchmark.cc.obj
C:\git\llvm-project\third-party\benchmark\src\benchmark.cc(172,17): warning: offset of on non-standard-layout type 'State' [-Winvalid-offsetof]
172 | static_assert(offsetof(State, error_occurred_) <=
| ^ ~~~~~~~~~~~~~~~
C:\git\llvm_package_18.0.0\build64_stage0\lib\clang\18\include\__stddef_offsetof.h(11,24): note: expanded from macro 'offsetof'
11 | #define offsetof(t, d) __builtin_offsetof(t, d)
| ^ ~
1 warning generated.
```
Commit: 935c652d07145960124ab1264ed1accc26759401
https://github.com/llvm/llvm-project/commit/935c652d07145960124ab1264ed1accc26759401
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
Log Message:
-----------
[lldb] Silence warning when building with Clang ToT
Fixes:
```
C:\git\llvm-project\lldb\source\Plugins\Process\Windows\Common\x64\RegisterContextWindows_x64.cpp(195,5): warning: missing field 'flags_type' initializer [-Wmissing-field-initializers]
```
Commit: 6f8b633d0b0615c2f46f818b70901d880c205631
https://github.com/llvm/llvm-project/commit/6f8b633d0b0615c2f46f818b70901d880c205631
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingMerge.c
M compiler-rt/lib/profile/InstrProfilingValue.c
Log Message:
-----------
[compiler-rt] Silence warnings when building with Clang ToT
Fixes several warnings such as:
```
C:\git\llvm-project\compiler-rt\lib\profile\InstrProfilingFile.c(760,18): warning: cast from 'const char *' to 'void *' drops const qualifier [-Wcast-qual]
760 | free((void *)lprofCurFilename.FilenamePat);
| ^
3 warnings generated.
```
Commit: 6736cc60ed85e52c26d6643301d45c7d98a85698
https://github.com/llvm/llvm-project/commit/6736cc60ed85e52c26d6643301d45c7d98a85698
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M compiler-rt/lib/orc/wrapper_function_utils.h
Log Message:
-----------
[ORC-RT] Silence warning when building with Clang ToT on Windows
This fixes several of these:
```
[3524/7446] Building CXX object projects\compiler-rt\lib\orc\CMakeFiles\RTOrc.x86_64.dir\dlfcn_wrapper.cpp.obj
In file included from C:\git\llvm-project\compiler-rt\lib\orc\dlfcn_wrapper.cpp:15:
C:\git\llvm-project\compiler-rt\lib\orc\wrapper_function_utils.h(299,27): warning: address of '__orc_rt_jit_dispatch_ctx' will always evaluate to 'true' [-Wpointer-bool-conversion]
299 | if (ORC_RT_UNLIKELY(!&__orc_rt_jit_dispatch_ctx))
| ~ ^~~~~~~~~~~~~~~~~~~~~~~~~
C:\git\llvm-project\compiler-rt\lib\orc\compiler.h(60,55): note: expanded from macro 'ORC_RT_UNLIKELY'
60 | #define ORC_RT_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false)
| ^~~~
1 warning generated.
```
Commit: 2ce430ab2f2964de2fb278467be7bc39fc296792
https://github.com/llvm/llvm-project/commit/2ce430ab2f2964de2fb278467be7bc39fc296792
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/tools/c-index-test/c-index-test.c
Log Message:
-----------
[clang][tools] Silence const cast warning when building with Clang ToT
This fixes:
```
[4960/7446] Building C object tools\clang\tools\c-index-test\CMakeFiles\c-index-test.dir\c-index-test.c.obj
C:\git\llvm-project\clang\tools\c-index-test\c-index-test.c(49,19): warning: cast from 'const char *' to 'char *' drops const qualifier [-Wcast-qual]
49 | return((char*)path);
| ^
C:\git\llvm-project\clang\tools\c-index-test\c-index-test.c(239,18): warning: cast from 'const char *' to 'char *' drops const qualifier [-Wcast-qual]
239 | free((char *)unsaved_files[i].Filename);
| ^
C:\git\llvm-project\clang\tools\c-index-test\c-index-test.c(240,18): warning: cast from 'const char *' to 'char *' drops const qualifier [-Wcast-qual]
240 | free((char *)unsaved_files[i].Contents);
| ^
```
Commit: 0f62e7ea2c608be525bcf0635d8b58190f93c8c3
https://github.com/llvm/llvm-project/commit/0f62e7ea2c608be525bcf0635d8b58190f93c8c3
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M compiler-rt/test/fuzzer/lit.cfg.py
Log Message:
-----------
[compiler-rt] Fix fuzzer tests on Windows
This fixes a link-time mismatch between the clang_rt.fuzzer-x86_64.lib
and the fuzzer tests, which happen to build with -fsanitize=address.
See: https://learn.microsoft.com/en-us/cpp/sanitizers/error-container-overflow?view=msvc-170
Commit: bd9bec8e78a8f1f4229c18713425406007a92b64
https://github.com/llvm/llvm-project/commit/bd9bec8e78a8f1f4229c18713425406007a92b64
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M compiler-rt/lib/orc/CMakeLists.txt
Log Message:
-----------
[compiler-rt][ORC] Silence warning when building on MSVC/Windows
This fixes (the ORC lib already builds with exceptions disabled):
```
[5/11] Building CXX object projects\compiler-rt\lib\orc\CMakeFiles\RTOrc.x86_64.dir\dlfcn_wrapper.cpp.obj
C:\Program Files\Microsoft Visual Studio\2022\Community\VC\Tools\MSVC\14.38.33130\include\vector(1619): warning C4530: C++ exception handler used, but unwind semantics are not enabled. Specify /EHsc
```
Commit: 47bd76d80fefdcef13a764dbc4c1f7e8320252dd
https://github.com/llvm/llvm-project/commit/47bd76d80fefdcef13a764dbc4c1f7e8320252dd
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lldb/source/API/SBTypeFilter.cpp
M lldb/source/API/SBTypeFormat.cpp
M lldb/source/API/SBTypeSummary.cpp
M lldb/source/API/SBTypeSynthetic.cpp
M lldb/source/Core/ModuleList.cpp
Log Message:
-----------
[lldb] Replace deprecated `std::unique_ptr::unique()` to silence a warning with MS-STL. NFC.
MS-STL warns about this with `warning STL4016: std::shared_ptr::unique() is deprecated in C++17`.
Commit: 994e478601bad117057d27b9d1c98c97d21cdf99
https://github.com/llvm/llvm-project/commit/994e478601bad117057d27b9d1c98c97d21cdf99
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
Log Message:
-----------
[lldb] Use `LLVM_FALLTHROUGH` to avoid a compiler error when building with MSVC.
Commit: 8ef7aaa637fbf1b0ae1ccfb102c081f58e22444d
https://github.com/llvm/llvm-project/commit/8ef7aaa637fbf1b0ae1ccfb102c081f58e22444d
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
Log Message:
-----------
[lldb] Silence warning with Clang ToT
This fixes `-Wcovered-switch-default` warnings. This is a reminiscent of an old refactoring, see ce03a862372a6f36d2fcf80dc80052aa155fcae8.
Commit: 64874e5ab5fd102344d43ac9465537a44130bf19
https://github.com/llvm/llvm-project/commit/64874e5ab5fd102344d43ac9465537a44130bf19
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_atomic.h
M openmp/runtime/src/kmp_barrier.cpp
M openmp/runtime/src/kmp_dispatch.h
M openmp/runtime/src/kmp_io.cpp
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_wait_release.h
M openmp/runtime/src/z_Windows_NT_util.cpp
Log Message:
-----------
[openmp] Silence warnings when building the LLVM release with MSVC
Commit: 61b5bf85f0908b75f736c77f619480094697c435
https://github.com/llvm/llvm-project/commit/61b5bf85f0908b75f736c77f619480094697c435
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M compiler-rt/lib/builtins/fp_extend_impl.inc
Log Message:
-----------
[compiler-rt] On Windows, silence warning when building with latest MSVC
This fixes:
```
[3334/7449] Building C object projects\compiler-rt\lib\builtins\CMakeFiles\clang_rt.builtins-x86_64.dir\extendsfdf2.c.obj
C:\git\llvm-project\compiler-rt\lib\builtins\fp_extend_impl.inc(63): warning C4018: '<': signed/unsigned mismatch
```
Commit: 9110c2b40215e64b8cb95ff83877bd50d4e365d1
https://github.com/llvm/llvm-project/commit/9110c2b40215e64b8cb95ff83877bd50d4e365d1
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lldb/source/Commands/CommandObjectFrame.cpp
Log Message:
-----------
[lldb] On Windows, silence warning with latest MSVC
This fixes:
```
[6083/7449] Building CXX object tools\lldb\source\Commands\CMakeFiles\lldbCommands.dir\CommandObjectFrame.cpp.obj
C:\git\llvm-project\lldb\source\Commands\CommandObjectFrame.cpp(497) : warning C4715: 'CommandObjectFrameVariable::ScopeRequested': not all control paths return a value
```
Commit: cee60a80101dbc2494865910fc7acef4fcab42bd
https://github.com/llvm/llvm-project/commit/cee60a80101dbc2494865910fc7acef4fcab42bd
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV] Remove dead early exit in performCombineVMergeAndVOps. NFC
Because a masked instruction always has a tied dest (because it has a
passthru), the early exit if Merge is an implicit def will have always already
been taken in the branch above that handles HasTiedDest.
Commit: 5e8def2f14151655b0cfdb5d3ad591e3b4771e7d
https://github.com/llvm/llvm-project/commit/5e8def2f14151655b0cfdb5d3ad591e3b4771e7d
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
Revert "[RISCV] Remove dead early exit in performCombineVMergeAndVOps. NFC"
This reverts commit cee60a80101dbc2494865910fc7acef4fcab42bd.
This change is not NFC because there is also an additional check for
isImplicitDef in the branch above.
Commit: 67f5df78d7d1d925100cc318e629bbde64337015
https://github.com/llvm/llvm-project/commit/67f5df78d7d1d925100cc318e629bbde64337015
Author: Sanjay Marreddi <sanjay.mareddi at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libcxx/include/regex
M libcxx/test/std/re/re.const/re.matchflag/match_not_eol.pass.cpp
Log Message:
-----------
Revert "[libc++] Fix `regex_search` to match `$` alone with `match_default` flag" (#78349)
The behavior of `std::regex_search` for patterns anchored both to the
start and to the end of the input went wrong after merging #77256 .
Patterns like `"^b*$"` started matching the strings such as `"a"`, which
is not expected.
Reverts the PR: #77256
Commit: 2fe5b157189906cac86c300f1a4c89614087c0f4
https://github.com/llvm/llvm-project/commit/2fe5b157189906cac86c300f1a4c89614087c0f4
Author: Qizhi Hu <836744285 at qq.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaStmt.cpp
A clang/test/SemaCXX/PR76631.cpp
Log Message:
-----------
[Clang][Sema] improve sema check of clang::musttail attribute (#77727)
Call function with no-return attribute generates code with unreachable
instruction instead of return and if the call statement has
`clang::musttail` attribute, it would crash in `VerifyPass`. Check this
condition in Sema ahead.
Fix [issue](https://github.com/llvm/llvm-project/issues/76631)
Co-authored-by: huqizhi <836744285 at qq.com>
Commit: 837cde8aa15b0eb17aefc24530e82e25000d9fe0
https://github.com/llvm/llvm-project/commit/837cde8aa15b0eb17aefc24530e82e25000d9fe0
Author: Victor Campos <victor.campos at arm.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/Headers/arm_acle.h
Log Message:
-----------
[NFC][Clang][Headers] Update refs to ACLE in comments (#78305)
Co-authored-by: Max Iyengar <Max.Iyengar at arm.com>
Commit: 9791e5414960f92396582b9e9ee503ac15799312
https://github.com/llvm/llvm-project/commit/9791e5414960f92396582b9e9ee503ac15799312
Author: Valery Pykhtin <valery.pykhtin at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-wave32.cl
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
Revert "[AMDGPU] Add InstCombine rule for ballot.i64 intrinsic in wave32 mode." (#78429)
Reverts llvm/llvm-project#71556
Fixes failures:
https://lab.llvm.org/buildbot/#/builders/188/builds/40541
https://lab.llvm.org/buildbot/#/builders/91/builds/21847
https://lab.llvm.org/buildbot/#/builders/98/builds/31671
https://lab.llvm.org/buildbot/#/builders/139/builds/57289
Commit: 77d21e758ea9665631b211abc0e424d7a7c44989
https://github.com/llvm/llvm-project/commit/77d21e758ea9665631b211abc0e424d7a7c44989
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Lex/Lexer.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/test/Sema/ns_error_enum.m
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[APINotes] Upstream dependencies of Sema logic to apply API Notes to decls
This upstreams more of the Clang API Notes functionality that is
currently implemented in the Apple fork:
https://github.com/apple/llvm-project/tree/next/clang/lib/APINotes
This is the largest chunk of the API Notes functionality in the
upstreaming process. I will soon submit a follow-up patch to actually
enable usage of this functionality by having a Clang driver flag that
enables API Notes, along with tests.
Commit: fc0253264445be7f88d4cf0f9129dcb10c2fb84b
https://github.com/llvm/llvm-project/commit/fc0253264445be7f88d4cf0f9129dcb10c2fb84b
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CXX/temp/temp.res/temp.local/p6.cpp
Log Message:
-----------
[Clang][Sema] Diagnose function/variable templates that shadow their own template parameters (#78274)
Previously, we skipped through template parameter scopes (until we hit a
declaration scope) prior to redeclaration lookup for declarators. For
template declarations, the meant that their template parameters would
not be found and shadowing would not be diagnosed. With these changes
applied, the following declarations are correctly diagnosed:
```cpp
template<typename T> void T(); // error: declaration of 'T' shadows template parameter
template<typename U> int U; // error: declaration of 'U' shadows template parameter
```
The reason for skipping past non-declaration & template parameter scopes
prior to lookup appears to have been because `GetTypeForDeclarator`
needed this adjusted scope... but it doesn't actually use this parameter
anymore.
The scope adjustment now happens prior to calling
`ActOnFunctionDeclarator`/`ActOnVariableDeclarator`/`ActOnTypedefDeclarator`
(just in case they depend on this behavior... I didn't check in depth).
Commit: fca6992be1f272f5e997bd510ca03c9389550c13
https://github.com/llvm/llvm-project/commit/fca6992be1f272f5e997bd510ca03c9389550c13
Author: David Sherwood <57997763+david-arm at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.cpp
M llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
Log Message:
-----------
[AArch64] Fix a minor issue with AArch64LoopIdiomTransform (#78136)
I found another case where in the end block we could have a PHI that we
deal with incorrectly. The two incoming values are unique - one of them
is
the induction variable and another one is a value defined outside the
loop, e.g.
%final_val = phi i32 [ %inc, %while.body ], [ %d, %while.cond ]
We won't correctly select between the two values in the new end block
that
we create and so we will get the wrong result.
Commit: a348397a1c694b3b294c995c3ea6ebac7e5dda6d
https://github.com/llvm/llvm-project/commit/a348397a1c694b3b294c995c3ea6ebac7e5dda6d
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/rvv-load-store.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
Log Message:
-----------
[RISCV] Don't scale cost by LMUL for TCK_CodeSize in getMemoryOpCost (#78407)
Commit: af4f1766ae5e16152e468d927c0d2faf0e1338db
https://github.com/llvm/llvm-project/commit/af4f1766ae5e16152e468d927c0d2faf0e1338db
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
A llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
Log Message:
-----------
AMDGPU: Allocate special SGPRs before user SGPR arguments (#78234)
Commit: 82811a8f50f7a8a2afab3207f51670a7d9b57d4d
https://github.com/llvm/llvm-project/commit/82811a8f50f7a8a2afab3207f51670a7d9b57d4d
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/utils/gn/build/sync_source_lists_from_cmake.py
Log Message:
-----------
[gn] fix minor mistake from f7cb1afa0633
The script printed two `/` when one suffices.
Commit: 3a82a1c3f6bdc9259cc4641f66fc76d1e171e382
https://github.com/llvm/llvm-project/commit/3a82a1c3f6bdc9259cc4641f66fc76d1e171e382
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
A clang/test/ParserOpenACC/parse-clauses.cpp
Log Message:
-----------
[OpenACC] Implement 'collapse' clause parsing.
The 'collapse' clause takes an optional 'force:' followed by an integer
constant expression. For now, parse this as an assignment expression,
and we'll check it for value/ICE later.
Commit: 8fb685fb7ea165f2bc27a3f19b1cffc3f5a4b329
https://github.com/llvm/llvm-project/commit/8fb685fb7ea165f2bc27a3f19b1cffc3f5a4b329
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
A mlir/test/Target/LLVMIR/Import/target-cpu.ll
A mlir/test/Target/LLVMIR/target-cpu.mlir
Log Message:
-----------
[MLIR][LLVM] Add explicit target_cpu attribute to llvm.func (#78287)
This patch adds the target_cpu attribute to llvm.func MLIR operations
and updates the translation to/from LLVM IR to match "target-cpu"
function attributes.
Commit: 656bf13004d62b8f8360d8d496bb1e6e08407c22
https://github.com/llvm/llvm-project/commit/656bf13004d62b8f8360d8d496bb1e6e08407c22
Author: Bruno De Fraine <brunodf at synopsys.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/AliasSetTracker.h
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
M llvm/test/Analysis/AliasSet/argmemonly.ll
M llvm/test/Analysis/AliasSet/guards.ll
M llvm/test/Analysis/AliasSet/intrinsics.ll
M llvm/test/Analysis/AliasSet/memloc-vscale.ll
M llvm/test/Analysis/AliasSet/memset.ll
M llvm/test/Analysis/AliasSet/memtransfer.ll
M llvm/test/Analysis/AliasSet/saturation.ll
M llvm/test/Transforms/LICM/variant-aainfo.ll
M polly/lib/Analysis/ScopBuilder.cpp
M polly/lib/Analysis/ScopDetection.cpp
M polly/lib/Analysis/ScopDetectionDiagnostic.cpp
Log Message:
-----------
[AST] Don't merge memory locations in AliasSetTracker (#65731)
This changes the AliasSetTracker to track memory locations instead of
pointers in its alias sets. The motivation for this is outlined in an RFC
posted on LLVM discourse:
https://discourse.llvm.org/t/rfc-dont-merge-memory-locations-in-aliassettracker/73336
In the data structures of the AST implementation, I made the choice to
replace the linked list of `PointerRec` entries (that had to go anyway)
with a simple flat vector of `MemoryLocation` objects, but for the
`AliasSet` objects referenced from a lookup table, I retained the
mechanism of a linked list, reference counting, forwarding, etc. The
data structures could be revised in a follow-up change.
Commit: cab041fe63f1eba4cf7a43f713dcb4fb06da7e00
https://github.com/llvm/llvm-project/commit/cab041fe63f1eba4cf7a43f713dcb4fb06da7e00
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
R libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/src/__support/UInt.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/utils/FPUtil/x86_long_double_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
Log Message:
-----------
[reland][libc][NFC] Refactor FPBits and remove LongDoubleBits specialization (#78447)
- [reland] #78192
- Make the implementation work when `__uint128_t` is not available on
the plaftorm.
Commit: 59cdf41f077661cd2178123cf27dc688823b6b0f
https://github.com/llvm/llvm-project/commit/59cdf41f077661cd2178123cf27dc688823b6b0f
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
Log Message:
-----------
[AMDGPU] Do not run GCNNSAReassign pass for GFX12 (#78185)
GFX12 does not have separate NSA and non-NSA encodings.
---------
Co-authored-by: Mirko Brkusanin <Mirko.Brkusanin at amd.com>
Commit: 4f57e2076bd21b573411bd40ec770a1b6785eee8
https://github.com/llvm/llvm-project/commit/4f57e2076bd21b573411bd40ec770a1b6785eee8
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[RemoveDIs][DebugInfo] Create overloads of debug intrinsic utilities for DPValues (#78313)
In preparation for the major chunk of the assignment tracking
implementation, this patch adds a new set of overloaded versions of
existing functions that take DbgVariableIntrinsics, with the overloads
taking DPValues. This is used specifically to allow us to use generic code
to handle both DbgVariableIntrinsics and DPValues, reducing code
duplication. This patch doesn't actually add the uses of these functions.
Commit: d8627cb1389c9e6485d41028012c7a36b731d72a
https://github.com/llvm/llvm-project/commit/d8627cb1389c9e6485d41028012c7a36b731d72a
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
A libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/src/__support/UInt.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/utils/FPUtil/x86_long_double_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
R utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
Log Message:
-----------
Revert "[reland][libc][NFC] Refactor FPBits and remove LongDoubleBits specialization" (#78457)
Reverts llvm/llvm-project#78447
This broke the gcc buildbot.
Commit: 69ec35fbecc74b3dd917b659e082ce2353303ca9
https://github.com/llvm/llvm-project/commit/69ec35fbecc74b3dd917b659e082ce2353303ca9
Author: Stephen Tozer <Stephen.Tozer at Sony.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
Revert "Create overloads of debug intrinsic utilities for DPValues (#78313)"
This reverts commit 4f57e207, which added several unused functions, causing
build errors on some buildbots.
Commit: e4c8c5851738b7475efa1b9d500078133159369a
https://github.com/llvm/llvm-project/commit/e4c8c5851738b7475efa1b9d500078133159369a
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
M llvm/test/MC/AMDGPU/gfx1150_asm_features.s
M llvm/test/MC/AMDGPU/gfx12_asm_features.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_features.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_features.txt
Log Message:
-----------
[AMDGPU] Src1 of VOP3 DPP instructions can be SGPR on GFX12 (#77929)
Commit: d92ce344bf641e6bb025b41b3f1a77dd25e2b3e9
https://github.com/llvm/llvm-project/commit/d92ce344bf641e6bb025b41b3f1a77dd25e2b3e9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/ARM/vector-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll
M llvm/test/CodeGen/X86/pr78109.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
Log Message:
-----------
Revert faecc736e2ac3cd8c77 #74443 [DAG] isSplatValue - node is a splat if all demanded elts have the same whole constant value (#74443)
Relying on ComputeKnownBits to find a splat is causing miscompilations where a shift of zero is being assumed to give zero, but further simplification leads to a shift of zero by undef, resulting in an unexpected undef value.
Fixes #78109
Commit: 58564ddf5c338edb4dee4d36db83be0136f84935
https://github.com/llvm/llvm-project/commit/58564ddf5c338edb4dee4d36db83be0136f84935
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel]Sort loads in llvm/BUILD.bazel
Commit: b7c81c1f91994fb6938875b62337ddc2a49bfd51
https://github.com/llvm/llvm-project/commit/b7c81c1f91994fb6938875b62337ddc2a49bfd51
Author: Alexandre Ganea <37383324+aganea at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
On Windows, make the release script work with the local git checkout (#78273)
Add two new flags to the release script:
`--skip-checkout` builds from the local source folder, instead of the downloaded source package
`--local-python` uses whichever local Python version is installed, instead of a specific version (3.10)
If the LLVM source is already in `C:\git\llvm-project` then one can do in a admin prompt:
```
C:\git>llvm-project\llvm\utils\release\build_llvm_release.bat --version 18.0.0 --x64 --skip-checkout
...
```
This allows for iterating more easily on build issues, just before a new LLVM package is made.
Also fix some warnings on the second stage build (`-Wbackend-plugin`).
Commit: 13e977d1738261487d8157918f14497517d75821
https://github.com/llvm/llvm-project/commit/13e977d1738261487d8157918f14497517d75821
Author: ostannard <oliver.stannard at arm.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/test/Driver/aarch64-bf16.c
M clang/test/Driver/aarch64-cortex-a510.c
M clang/test/Driver/aarch64-cortex-a710.c
M clang/test/Driver/aarch64-cortex-x2.c
M clang/test/Driver/aarch64-d128.c
M clang/test/Driver/aarch64-fp16.c
M clang/test/Driver/aarch64-implied-sme-features.c
M clang/test/Driver/aarch64-implied-sve-features.c
M clang/test/Driver/aarch64-ite.c
M clang/test/Driver/aarch64-lrcpc3.c
M clang/test/Driver/aarch64-ls64.c
M clang/test/Driver/aarch64-lse128.c
M clang/test/Driver/aarch64-march.c
M clang/test/Driver/aarch64-mgeneral_regs_only.c
M clang/test/Driver/aarch64-mte.c
M clang/test/Driver/aarch64-perfmon.c
M clang/test/Driver/aarch64-predres.c
M clang/test/Driver/aarch64-rand.c
M clang/test/Driver/aarch64-ras.c
M clang/test/Driver/aarch64-rdm.c
M clang/test/Driver/aarch64-ssbs.c
M clang/test/Driver/aarch64-sve2.c
M clang/test/Driver/aarch64-the.c
M clang/test/Driver/aarch64-v81a.c
M clang/test/Driver/aarch64-v82a.c
M clang/test/Driver/aarch64-v83a.c
M clang/test/Driver/aarch64-v84a.c
M clang/test/Driver/aarch64-v85a.c
M clang/test/Driver/aarch64-v86a.c
M clang/test/Driver/aarch64-v87a.c
M clang/test/Driver/aarch64-v88a.c
M clang/test/Driver/aarch64-v89a.c
M clang/test/Driver/aarch64-v91a.c
M clang/test/Driver/aarch64-v92a.c
M clang/test/Driver/aarch64-v93a.c
M clang/test/Driver/aarch64-v94a.c
M clang/test/Driver/aarch64-v95a.c
M clang/test/Driver/arm-sb.c
M clang/test/Preprocessor/aarch64-target-features.c
M flang/test/Driver/target-cpu-features.f90
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][Driver] Better handling of target feature dependencies (#78270)
Currently there are several bits of code in the AArch64 driver which
attempt to enforce dependencies between optional features in the -march=
and -mcpu= options. However, these are based on the list of feature
names being enabled/disabled, so they have a lot of logic to consider
the order in which features were turned on and off, which doesn't scale
well as dependency chains get longer.
This patch moves the code handling these dependencies to TargetParser,
and changes them to use a Bitset of enabled features. This makes it easy
to check which features are enabled, and is converted back to a list of
LLVM feature names once all of the command-line options are parsed.
The motivating example for this was the -mcpu=cortex-r82+nofp option.
Previously, the code handling the dependency between the fp16 and
fp16fml extensions did not consider the nofp modifier, so it added
+fullfp16 to the feature list. This should have been disabled by the
+nofp modifier, and also the backend did follow the dependency between
fullfp16 and fp, resulting in fp being turned back on in the backend.
Most of the dependencies added to AArch64TargetParser.h weren't known
about by clang before, I built that list by checking what the backend
thinks the dependencies between SubtargetFeatures are.
Commit: 3d3c63da6bb68d5306cdc9f9fbf867b428e9b0bf
https://github.com/llvm/llvm-project/commit/3d3c63da6bb68d5306cdc9f9fbf867b428e9b0bf
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold.cpp
M flang/lib/Lower/ConvertConstant.cpp
A flang/test/Lower/structure-constructors-alloc-comp.f90
M flang/test/Semantics/structconst06.f90
M flang/test/Semantics/structconst07.f90
A flang/test/Semantics/structconst08.f90
Log Message:
-----------
[flang] Add structure constructor with allocatable component (#77845)
Enable the structure constructor with allocatable component support.
Handling of `null()` for the allocatable component is added.
Commit: 509f634f76caa40d522875e17188ca77df9159b5
https://github.com/llvm/llvm-project/commit/509f634f76caa40d522875e17188ca77df9159b5
Author: Bruno De Fraine <brunodf at synopsys.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/test/Analysis/BasicAA/separate_storage-alias-sets.ll
Log Message:
-----------
[BasicAA] Fix new test Analysis/BasicAA/separate_storage-alias-sets.ll
An update of the test was not included in 656bf13004 since it was added
after the branch point of that patch.
Commit: abeb6c9f58f69a7e8395ea4a84a0e6f6889eaf78
https://github.com/llvm/llvm-project/commit/abeb6c9f58f69a7e8395ea4a84a0e6f6889eaf78
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/convert-to-llvm.fir
Log Message:
-----------
[Flang][MLIR] Add basic initial support for alloca and program address space handling in FIR->LLVMIR codegen (#77518)
This is a slightly more slimmed down and up-to-date version of the older
PR from here: https://reviews.llvm.org/D144203, written by @jsjodin,
which has already under gone some review.
This PR places allocas in the alloca address space specified by the
provided data layout (default is 0 for all address spaces, unless
explicitly specified by the layout), and then will cast these alloca's
to the program address space if this address space is different from the
allocation address space. For most architectures data layouts, this will
be a no-op, as they have a flat address space. But in the case of AMDGPU
it will result in allocas being placed in the correct address space (5,
private), and then casted into the correct program address space (0,
generic). This results in correct (partially, a follow up PR will be
forthcoming soon) generation of allocations inside of device code.
This PR is in addition to the work by @skatrak in this PR:
https://github.com/llvm/llvm-project/pull/69599 and adds seperate and
neccesary functionality of casting alloca's from their address space to
the program address space, both are independent PRs, although there is
some minor overlap e.g. this PR incorporates some of the useful helper
functions from 69599, so whichever lands first will need a minor rebase.
Co-author: jsjodin
Commit: 5ddd7bc38ce3c417637c1c5c506353f1faad4e2d
https://github.com/llvm/llvm-project/commit/5ddd7bc38ce3c417637c1c5c506353f1faad4e2d
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
R libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/src/__support/UInt.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/utils/FPUtil/x86_long_double_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
Log Message:
-----------
[reland][libc][NFC] Refactor FPBits and remove LongDoubleBits specialization (#78465)
- [reland] #78192
- [reland] #78447
- Turn `as` static function into a `to_storage_type` member function.
Commit: 90bdf76fdbe5f4c38a14494a2e8d254ed70c166a
https://github.com/llvm/llvm-project/commit/90bdf76fdbe5f4c38a14494a2e8d254ed70c166a
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
Log Message:
-----------
Revert "AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis" (#78468)
Reverts llvm/llvm-project#76145
Commit: a96b4671b97b167230986bd2811676064c608596
https://github.com/llvm/llvm-project/commit/a96b4671b97b167230986bd2811676064c608596
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
A flang/test/Lower/HLFIR/bindc-module-var.f90
Log Message:
-----------
[flang] Lower BIND(C) module variables (#78279)
Lower initialized BIND(C) module variable as regular module variable,
except that the fir.global symbol name is the binding label.
For uninitialized variables, add the common linkage so that C code may
define the variables. The standard does not provide a way to indicate
that a variable is defined in C, but there are use cases.
Beware that if the module file compiled object is added to a shared
library, the variable will become a regular global definition and may
override the C variable depending on the linking order.
Commit: 5b65f6f5864ff23e4d87ab1d954a77be343b4c4b
https://github.com/llvm/llvm-project/commit/5b65f6f5864ff23e4d87ab1d954a77be343b4c4b
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
Log Message:
-----------
[gn] fix mistake from 92289db82fb2
Commit: 74cf9bcf71d94f4df80578bccec6ed6d51dd9682
https://github.com/llvm/llvm-project/commit/74cf9bcf71d94f4df80578bccec6ed6d51dd9682
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/TransformOps/Utils.h
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
Log Message:
-----------
Apply clang-tidy fixes for performance-unnecessary-value-param in Utils.cpp (NFC)
Commit: 9a2a6a728ae0397584fcfb8b2919970d1128e7f5
https://github.com/llvm/llvm-project/commit/9a2a6a728ae0397584fcfb8b2919970d1128e7f5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
Log Message:
-----------
Apply clang-tidy fixes for readability-identifier-naming in Utils.cpp (NFC)
Commit: e730f7600525fd5a9764b5076c6af08dbf477014
https://github.com/llvm/llvm-project/commit/e730f7600525fd5a9764b5076c6af08dbf477014
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemrefs.cpp
Log Message:
-----------
Apply clang-tidy fixes for llvm-qualified-auto in DecomposeMemrefs.cpp (NFC)
Commit: 04e2a5d9837959522eb0ab7b7da499e34a0f07ae
https://github.com/llvm/llvm-project/commit/04e2a5d9837959522eb0ab7b7da499e34a0f07ae
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/lib/Dialect/IRDL/IRDLLoading.cpp
Log Message:
-----------
Apply clang-tidy fixes for readability-identifier-naming in IRDLLoading.cpp (NFC)
Commit: 2cd013a7869a341a6536324c34f0c4e68bf01a38
https://github.com/llvm/llvm-project/commit/2cd013a7869a341a6536324c34f0c4e68bf01a38
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/lib/Dialect/IRDL/IRDLVerifiers.cpp
Log Message:
-----------
Apply clang-tidy fixes for llvm-else-after-return in IRDLVerifiers.cpp (NFC)
Commit: 4ea1994a0307b09532d519292d34dad7555598ca
https://github.com/llvm/llvm-project/commit/4ea1994a0307b09532d519292d34dad7555598ca
Author: John Harrison <harjohn at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/completions/TestDAP_completions.py
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Adjusting how repl-mode auto determines commands vs variable expressions. (#78005)
The previous logic for determining if an expression was a command or
variable expression in the repl would incorrectly identify the context
in many common cases where a local variable name partially overlaps with
the repl input.
For example:
```
int foo() {
int var = 1; // break point, evaluating "p var", previously emitted a warning
}
```
Instead of checking potentially multiple conflicting values against the
expression input, I updated the heuristic to only consider the first
term. This is much more reliable at eliminating false positives when the
input does not actually hide a local variable.
Additionally, I updated the warning on conflicts to occur anytime the
conflict is detected since the specific conflict can change based on the
current input. This also includes additional details on how users can
change the behavior.
Example Debug Console output from
lldb/test/API/tools/lldb-dap/evaluate/main.cpp:11 breakpoint 3.
```
lldb-dap> var + 3
Warning: Expression 'var' is both an LLDB command and variable. It will be evaluated as a variable. To evaluate the expression as an LLDB command, use '`' as a prefix.
45
lldb-dap> var + 1
Warning: Expression 'var' is both an LLDB command and variable. It will be evaluated as a variable. To evaluate the expression as an LLDB command, use '`' as a prefix.
43
```
Commit: d525e2b31b999fb2c989fb0986332066466c61c7
https://github.com/llvm/llvm-project/commit/d525e2b31b999fb2c989fb0986332066466c61c7
Author: Paul T Robinson <paul.robinson at sony.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/Headers/ia32intrin.h
M clang/lib/Headers/immintrin.h
Log Message:
-----------
[Headers][X86] Add more descriptions to ia32intrin.h and immintrin.h (#77686)
ia32intrin.h gets descriptions for all remaining non-privileged
intrinsic functions; the macros providing alternate names are not
described. immintrin.h ditto, except for the InterlockedExchange
functions.
Commit: 3b6a8f823bf873aa74cdb738f517e7333e20de7a
https://github.com/llvm/llvm-project/commit/3b6a8f823bf873aa74cdb738f517e7333e20de7a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
M lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/MacOSX/CMakeLists.txt
M lldb/source/Plugins/Platform/MacOSX/PlatformAppleSimulator.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.cpp
A lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleXR.cpp
A lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleXR.h
M lldb/source/Plugins/Platform/MacOSX/objcxx/PlatformiOSSimulatorCoreSimulatorSupport.h
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
Log Message:
-----------
[lldb] Upstream xros support in lldb (#78389)
Upstream support for debugging xros applications through LLDB.
Commit: ae1355cdb7b13ec8f5c8b8644d62679ff274b508
https://github.com/llvm/llvm-project/commit/ae1355cdb7b13ec8f5c8b8644d62679ff274b508
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Platform/MacOSX/BUILD.gn
Log Message:
-----------
[gn build] Port 3b6a8f823bf8
Commit: 2d5cc1c9b3c8b8b7cd0ed9dec79489940161d73a
https://github.com/llvm/llvm-project/commit/2d5cc1c9b3c8b8b7cd0ed9dec79489940161d73a
Author: alexfh <alexfh at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
R llvm/test/Transforms/SimplifyCFG/switch-dead-default-lookup-table.ll
M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
Log Message:
-----------
Revert "[SimplifyCFG] `switch`: Do Not Transform the Default Case if the Condition is Too Wide" (#78469)
Reverts llvm/llvm-project#77831, which depends on #76669, which
seriously regresses compilation time / memory usage see
https://github.com/llvm/llvm-project/pull/76669#issuecomment-1889271710.
Commit: badf0ee80c2b53bbc227f5d12c74819c01ceaf3c
https://github.com/llvm/llvm-project/commit/badf0ee80c2b53bbc227f5d12c74819c01ceaf3c
Author: Chris Apple <14171107+cjappl at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
Log Message:
-----------
Remove maximum OSX version for sanitizers (#77543)
Remove a block preventing newer versions of the MacOS SDK from being
selected for compiling the sanitizers.
Commit: c99da46fc182bd28b0661b1b1a6f0a4c1aef2392
https://github.com/llvm/llvm-project/commit/c99da46fc182bd28b0661b1b1a6f0a4c1aef2392
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/atomics.ll
A llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vbuffer_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
Log Message:
-----------
[AMDGPU][GFX12] Add Atomic cond_sub_u32 (#76224)
Co-authored-by: Vang Thao <Vang.Thao at amd.com>
Commit: 735adbf1a80db3fe9ea8edaa172582ed2729a220
https://github.com/llvm/llvm-project/commit/735adbf1a80db3fe9ea8edaa172582ed2729a220
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/TargetParser/ARMTargetParser.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/MC/MachO/AArch64/arm-darwin-version-min-load-command.s
M llvm/test/MC/MachO/ARM/build-version-sdk-version.s
M llvm/test/MC/MachO/ARM/build-version.s
M llvm/unittests/TextAPI/TextStubV4Tests.cpp
Log Message:
-----------
[llvm] Teach MachO about XROS (#78373)
Add support for XROS to encode in Mach-O file formats.
Commit: da7462a6ae3730551efe0be5d7d525195dc3678f
https://github.com/llvm/llvm-project/commit/da7462a6ae3730551efe0be5d7d525195dc3678f
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/test/CodeGen/NVPTX/surf-tex.py
Log Message:
-----------
[NVPTX] Add tex.grad.cube{array} intrinsics (#77693)
Extend IR support for PTX `tex` instruction described in [PTX ISA.
9.7.9.3. Texture Instructions:
tex](https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#texture-instructions-tex).
Add support for unified-move versions of `tex.grad.cube{array}` variants
added in PTX ISA 4.3.
Commit: bd5d41a3401f2dc31a82bb04deb0f47fd768a270
https://github.com/llvm/llvm-project/commit/bd5d41a3401f2dc31a82bb04deb0f47fd768a270
Author: Valentin Clement (ใใฌใณใฟใคใณ ใฏใฌใกใณ) <clementval at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[mlir][openacc][NFC] Use interleaveComma in printers (#78347)
Simplify printer code and use llvm::interleaveComma to print comma
separated list.
Commit: 0c6dc80531ed332e346934019095ad9518f465f3
https://github.com/llvm/llvm-project/commit/0c6dc80531ed332e346934019095ad9518f465f3
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Support/BalancedPartitioning.cpp
M llvm/unittests/ProfileData/BPFunctionNodeTest.cpp
Log Message:
-----------
BalancedPartitioning: minor updates (#77568)
When LargestTraceSize is a power of two, createBPFunctionNodes does not
allocate a group ID for Trace[LargestTraceSize-1] (as N is off by 1).
Fix
this and change floor+log2 to Log2_64.
BalancedPartitioning::bisect can use unstable sort because `Nodes`
contains distinct `InputOrderIndex`s.
BalancedPartitioning::runIterations: use one DenseMap and simplify the
node renumbering code.
Commit: a451c3b9e2124ba2875be678aaafde322057d575
https://github.com/llvm/llvm-project/commit/a451c3b9e2124ba2875be678aaafde322057d575
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
Log Message:
-----------
[lldb] Support changes to TLS on macOS (#77988)
The TLS implementation on apple platforms has changed. Instead of
invoking pthread_getspecific with a pthread_key_t, we instead perform a
virtual function call.
Note: Some versions of Apple's new linker do not emit debug symbols for
TLS symbols. This causes the TLS tests to fail because LLDB and dsymutil
expects there to be debug symbols to resolve the relevant TLS block. You
may work around this by switching to the older linker (ld-classic) or by
disabling the TLS tests until you have a newer version of the new
linker.
rdar://120676969
Commit: bc90b91885263eb2128315ff636b7f2d200eab48
https://github.com/llvm/llvm-project/commit/bc90b91885263eb2128315ff636b7f2d200eab48
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
Revert "[RISCV] Implement RISCVInsrInfo::getConstValDefinedInReg"
This reverts commit 4b7d997aaed7a2399d5e73fc3adfaaa6a3d35d1f.
A miscompile was reported
<https://github.com/llvm/llvm-project/pull/77610#issuecomment-1896193835>.
Reverting so it can be investigated.
Commit: 103fa3250c46b0c4cf04573c5e075185ca574016
https://github.com/llvm/llvm-project/commit/103fa3250c46b0c4cf04573c5e075185ca574016
Author: Derek Schuff <dschuff at chromium.org>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lld/wasm/InputFiles.cpp
M lld/wasm/SymbolTable.cpp
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/BinaryFormat/WasmTraits.h
M llvm/include/llvm/MC/MCSymbolWasm.h
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/tools/obj2yaml/wasm2yaml.cpp
Log Message:
-----------
[WebAssembly] Use ValType instead of integer types to model wasm tables (#78012)
LLVM models some features found in the binary format with raw integers
and others with nested or enumerated types. This PR switches modeling of
tables and segments to use wasm::ValType rather than uint32_t. This NFC
change is in preparation for modeling more reference types, but IMO is
also cleaner and closer to the spec.
Commit: b1ae461a5358932851de42b66ffde8748da51a83
https://github.com/llvm/llvm-project/commit/b1ae461a5358932851de42b66ffde8748da51a83
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[CodeGen][MISched][NFC] Rename some instances of Cycle -> ReleaseAtCycle
This is to match the naming of arguments in MachineScheduler.h
Commit: de423cfe3d5de0110b4f55ff1742988b529be6d2
https://github.com/llvm/llvm-project/commit/de423cfe3d5de0110b4f55ff1742988b529be6d2
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/load-add-store.ll
Log Message:
-----------
[RISCV] Prefer vsetivli for VLMAX when VLEN is exactly known (#75509)
If VLEN is exactly known, we may be able to use the vsetivli encoding
instead of the vsetvli a0, zero, <vtype> encoding. This slightly reduces
register pressure.
This builds on 632f1c5, but reverses course a bit. It turns out to be
quite complicated to canonicalize from VLMAX to immediate early because
the sentinel value is widely used in tablegen patterns without knowledge
of LMUL. Instead, we canonicalize towards the VLMAX representation, and
then pick the immediate form during insertion since we have the LMUL
information there.
Within InsertVSETVLI, this could reasonable fit in a couple places. If
reviewers want me to e.g. move it to emission, let me know. Doing so may
require a bit of extra code to e.g. handle comparisons of the two forms,
but shouldn't be too complicated.
Commit: 67dc6e907577e8c96adcf574c5787fe5bdf9bb1a
https://github.com/llvm/llvm-project/commit/67dc6e907577e8c96adcf574c5787fe5bdf9bb1a
Author: Thorsten Schรผtt <schuett at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/icmp.ll
Log Message:
-----------
[GlobalIsel][AArch64] more legal icmps (#78239)
In https://github.com/llvm/llvm-project/pull/78181 the godbolt
(https://llvm.godbolt.org/z/vMsnxMf1v) crashed with GlobalIsel.
LLVM ERROR: unable to legalize instruction: %90:_(<3 x s32>) = G_ICMP
intpred(uge), %15:_(<3 x s32>), %0:_ (in function: vec3_i32)
Commit: c1f433849be5e19127f23c1b4c5f1d0ee0ec63ca
https://github.com/llvm/llvm-project/commit/c1f433849be5e19127f23c1b4c5f1d0ee0ec63ca
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rotate-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/shift-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/shift-rv64.mir
Log Message:
-----------
[GISel][RISCV] Implement selectShiftMask. (#77572)
Implement `selectShiftMask` in `GlobalISel`.
Commit: e473daa7797db6e0f45ef9e12081ccce7d2ed26f
https://github.com/llvm/llvm-project/commit/e473daa7797db6e0f45ef9e12081ccce7d2ed26f
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/vec3-ops.ll
Log Message:
-----------
[AArch64] Improve cost computations for odd vector mem ops. (#78181)
Improve cost computaton for odd vector mem ops by breaking them down
into smaller power-of-2 parts and sum up the cost of those parts.
This fixes the current cost estimates, which for most parts
underestimated the cos, due to using getTypeLegalizationCost, which
widens to the next power-of-2 in a single step in most cases. This
doesn't reflect the actual cost.
See https://llvm.godbolt.org/z/vMsnxMf1v for codegen for the tests.
Note that there is a special case for v3i8, for which current codegen is
pretty bad, due to automatic widening to v4i8, which in turn requires
the conversion to go through memory ops in the stack. I am planning on
fixing that as a follow-up, but I am not yet sure where to best fix
this.
At the moment, there are almost no cases in which such vector operations
will be generated automatically. The motivating case is non-power-of-2
SLP vectorization: https://github.com/llvm/llvm-project/pull/77790
PR: https://github.com/llvm/llvm-project/pull/78181
Commit: b26bfcc1ecc3c56d36fe6e525788024d1fdee01c
https://github.com/llvm/llvm-project/commit/b26bfcc1ecc3c56d36fe6e525788024d1fdee01c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/Object/COFFImportFile.h
M llvm/lib/Object/COFFImportFile.cpp
M llvm/test/tools/llvm-dlltool/coff-exports.def
M llvm/test/tools/llvm-lib/arm64ec-implib.test
M llvm/test/tools/llvm-readobj/COFF/exports-implib.test
M llvm/test/tools/llvm-readobj/COFF/file-headers.test
M llvm/tools/llvm-readobj/COFFImportDumper.cpp
Log Message:
-----------
[llvm-readobj][Object][COFF] Include COFF import file machine type in format string. (#78366)
Commit: 03e43cf1c7ed0770b4afef915f82f2503a9f18fb
https://github.com/llvm/llvm-project/commit/03e43cf1c7ed0770b4afef915f82f2503a9f18fb
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/UnicodeCharSets.h
M clang/test/Lexer/unicode.c
M llvm/lib/Support/Unicode.cpp
M llvm/lib/Support/UnicodeCaseFold.cpp
M llvm/lib/Support/UnicodeNameToCodepoint.cpp
M llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
M llvm/unittests/Support/UnicodeTest.cpp
M llvm/utils/UnicodeData/UnicodeNameMappingGenerator.cpp
Log Message:
-----------
[Clang] Update Unicode version to 15.1 (#77147)
This update all of our Unicode tables to Unicode 15.1. This is a minor
version so only a relatively small numbers of characters are added,
mainly ideographs
https://www.unicode.org/versions/Unicode15.1.0/#Appendices_nb
Commit: 345c1ea881012d84a10b3fe6c2c420dbf8e3ef31
https://github.com/llvm/llvm-project/commit/345c1ea881012d84a10b3fe6c2c420dbf8e3ef31
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang] Avoid new spurious error under -fopenacc (#78504)
Don't create HostAssocDetails symbols for subprograms in OpenACC
regions; it can cause warnings to became errors later in compilation
when calls do not appear to be to external procedures with implicit
interfaces.
Commit: 58b77b8581989a960bcb3bd088ac4a3e00c9fdb5
https://github.com/llvm/llvm-project/commit/58b77b8581989a960bcb3bd088ac4a3e00c9fdb5
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/ParserOpenACC/parse-constructs.cpp
Log Message:
-----------
[OpenACC] Implement 'bind' clause parsing.
'bind' takes either a string literal, or an 'identifier' representing
the device-side function that this routine is intended to 'bind' to
(that is, to call). However, it seems that the intent is to permit the
'identifier' to reference any function, thus we're implementing this as
an ID expression.
Additionally, while working on this I discovered that the 'routine' ID
expression parsing for C++ wouldn't allow non-static member functions to
be referenced since it expected us to call it, this was fixed as a part
of this patch as the 'bind' support needed it too. A test was added for
routine.
Commit: 47d59670230fe6940fafd3844c219c4c4636ea76
https://github.com/llvm/llvm-project/commit/47d59670230fe6940fafd3844c219c4c4636ea76
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
Log Message:
-----------
[libc][obvious] disable fabsf128 on aarch64 (#78511)
It's not working on the buildbot, so I've disabled it until we fix it.
Commit: 17c390fc789e0f0b33577add7364e89d15a44efa
https://github.com/llvm/llvm-project/commit/17c390fc789e0f0b33577add7364e89d15a44efa
Author: modiking <modiking213 at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos.ll
Log Message:
-----------
[WPD][LLD] Allow glob matching of --lto-known-safe-vtables (#78505)
Makes it easier to exclude a pattern of safe vtable symbols
Testing:
ninja check-all
Commit: 987123e4f1a6e1713b7c684e696e9b1cd8d595ea
https://github.com/llvm/llvm-project/commit/987123e4f1a6e1713b7c684e696e9b1cd8d595ea
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
Log Message:
-----------
[LLD][RISCV] Report error for unsatisfiable RISCV_ALIGN (#74121)
If we have a RISCV_ALIGN relocation which can't be satisfied with the
available space provided, report an error rather than silently
continuing with a corrupt state.
For context, https://github.com/llvm/llvm-project/pull/73977 fixes an
LLD bug which can cause this effect, but that's not the only source of
such cases.
Another is our hard-to-fix set of LTO problems. We can have a single
function which was compiled without C in an otherwise entirely C module.
Until we have all of the mapping symbols and related mechanisms
implemented, this case can continue to arise.
I think it's very important from a user interface perspective to have
non-assertion builds report an error in this case. If we don't report an
error here, we can crash the linker (due to the fatal error at the
bottom of the function), or if we're less lucky silently produce a
malformed binary.
There's a couple of known defects with this patch.
First, there's no test case. I don't know how to write a stable test
case for this that doesn't involve hex editing an object file, or
abusing the LTO bug that we hope to fix.
Second, this will report an error on each relax iteration. I explored
trying to report an error only once after relaxation, but ended up
deciding I didn't have the context to implement it safely.
I would be thrilled if someone more knowledgeable of this code wants to
write a better version of this patch, but in the meantime, I believe we
should land this to address the user experience problem described above.
Commit: 4fffb0401be10dc155e8b51321735f14f88c2589
https://github.com/llvm/llvm-project/commit/4fffb0401be10dc155e8b51321735f14f88c2589
Author: Samuel Thibault <samuel.thibault at ens-lyon.org>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Hurd.cpp
A clang/test/Driver/Inputs/basic_cross_hurd_tree/usr/lib/gcc/x86_64-gnu/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cross_hurd_tree/usr/x86_64-gnu/bin/as
A clang/test/Driver/Inputs/basic_cross_hurd_tree/usr/x86_64-gnu/bin/ld
A clang/test/Driver/Inputs/basic_cross_hurd_tree/usr/x86_64-gnu/lib/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/lib/x86_64-gnu/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/lib64/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/usr/include/x86_64-gnu/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/usr/include/x86_64-gnu/c++/10/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib/gcc/x86_64-gnu/10/crtbegin.o
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib/gcc/x86_64-gnu/10/crtbeginS.o
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib/gcc/x86_64-gnu/10/crtbeginT.o
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib/x86_64-gnu/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib64/.keep
M clang/test/Driver/hurd.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
Hurd: Add x86_64 support (#78065)
This adds Hurd toolchain support to Clang's driver in addition to
handling
translating the triple from GCC toolchain-compatible form (x86_64-gnu)
to
the actual triple registered in LLVM (x86_64-pc-hurd-gnu).
Commit: 5133a8f5590d74d9d15631742a3d84f978394dbd
https://github.com/llvm/llvm-project/commit/5133a8f5590d74d9d15631742a3d84f978394dbd
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/test/Driver/Inputs/basic_android_tree/sysroot/usr/lib/crt_pad_segment.o
M clang/test/Driver/linux-ld.c
Log Message:
-----------
[Driver] Add -fandroid-pad-segment/-fno-android-pad-segment (#77244)
-fandroid-pad-segment is an Android-specific opt-in option that
links in crt_pad_segment.o (beside other crt*.o relocatable files).
crt_pad_segment.o contains a note section, which will be included in the
linker-created PT_NOTE segment. This PT_NOTE tell Bionic that: when
create a map for a PT_LOAD segment, extend the end to cover the gap so
that we will have fewer kernel 'struct vm_area_struct' objects when
page_size < MAXPAGESIZE.
See also https://sourceware.org/bugzilla/show_bug.cgi?id=31076
Link: https://r.android.com/2902180
Commit: 0f67c7a0af271888930bb315c85d05d3936e265a
https://github.com/llvm/llvm-project/commit/0f67c7a0af271888930bb315c85d05d3936e265a
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/test/PCH/gch-probe.c
Log Message:
-----------
[clang] Disable gch-probe.c on AIX as `-gmodules` is not supported there yet. (#78513)
Followup fix for https://github.com/llvm/llvm-project/pull/77711
Commit: 3db5c058ff595e7d2f3a9df8c3bf265e54332a07
https://github.com/llvm/llvm-project/commit/3db5c058ff595e7d2f3a9df8c3bf265e54332a07
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/include/clang/AST/DeclBase.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
Log Message:
-----------
Add Variadic 'dropAttrs' (#78476)
As suggested in https://github.com/llvm/llvm-project/pull/78200
This adds a variadic 'dropAttrs', which drops all attributes of any of
the types specified.
Commit: 04a69a10f63dae3c03cdfa5e199d8ea4458398b5
https://github.com/llvm/llvm-project/commit/04a69a10f63dae3c03cdfa5e199d8ea4458398b5
Author: antangelo <contact at antangelo.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaTemplate/nested-implicit-deduction-guides.cpp
Log Message:
-----------
[clang] Fix CTAD for aggregates for nested template classes (#78387)
Use the template pattern in determining whether to synthesize the
aggregate deduction guide, and update
DeclareImplicitDeductionGuideFromInitList to substitute outer template
arguments.
Fixes #77599
Commit: af0ee617fc5f69051297b0c23f8c818b20f02c3a
https://github.com/llvm/llvm-project/commit/af0ee617fc5f69051297b0c23f8c818b20f02c3a
Author: Sirraide <74590115+Sirraide at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
A clang/test/CodeGenCXX/ms-property-new.cpp
A clang/test/CodeGenCXX/placement-new-ms-__noop.cpp
A clang/test/CodeGenObjCXX/property-placement-new.mm
M clang/test/SemaCXX/builtin-std-move.cpp
A clang/test/SemaCXX/ms-property-new.cpp
A clang/test/SemaCXX/placement-new-bound-member-function.cpp
A clang/test/SemaCXX/placement-new-builtin.cpp
A clang/test/SemaCXX/placement-new-matrix.cpp
A clang/test/SemaCXX/placement-new-ms-__noop.cpp
A clang/test/SemaObjCXX/property-placement-new.mm
Log Message:
-----------
[Clang] Support MSPropertyRefExpr as placement arg to new-expression (#75883)
It seems we were forgetting to call `checkArgsForPlaceholders` on the
placement arguments of new-expressions in Sema. I don't think that was
intendedโat least doing so doesn't seem to break anythingโso this pr
adds that.
This also fixes #65053
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: 1b60ddd920e0caadfa85cc7013b559d6453d7e3e
https://github.com/llvm/llvm-project/commit/1b60ddd920e0caadfa85cc7013b559d6453d7e3e
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Hurd.cpp
Log Message:
-----------
[Hurd] Fix -Wswitch in Hurd::getDynamicLinker (NFC)
llvm-project/clang/lib/Driver/ToolChains/Hurd.cpp:137:11:
error: 60 enumeration values not handled in switch: 'UnknownArch', 'arm', 'armeb'... [-Werror,-Wswitch]
switch (getArch()) {
^~~~~~~~~
1 error generated.
Commit: 00647a18cee6ced40757d03a8c0d61d7571d22d3
https://github.com/llvm/llvm-project/commit/00647a18cee6ced40757d03a8c0d61d7571d22d3
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/TargetMachine.cpp
M llvm/test/CodeGen/X86/code-model-elf-sections.ll
Log Message:
-----------
[X86] Don't respect large data threshold for globals with an explicit section (#78348)
If multiple globals are placed in an explicit section, there's a chance
that the large data threshold will cause the different globals to be
inconsistent in whether they're large or small. Mixing sections with
mismatched large section flags can cause undesirable issues like
increased relocation pressure because there may be 32-bit references to
the section in some TUs, but the section is considered large since input
section flags are unioned and other TUs added the large section flag.
An explicit code model on the global still overrides the decision. We
can do this for globals without any references to them, like what we did
with asan_globals in #74514. If we have some precompiled small code
model files where asan_globals is not considered large mixed with
medium/large code model files, that's ok because the section is
considered large and placed farther. However, overriding the code model
for globals in some TUs but not others and having references to them
from code will still result in the above undesired behavior.
This mitigates a whole class of mismatched large section flag issues
like what #77986 was trying to fix.
This ends up not adding the SHF_X86_64_LARGE section flag on explicit
sections in the medium/large code model. This is ok for the large code
model since all references from large text must use 64-bit relocations
anyway.
Commit: 1d4c0092a82aa351c5a6e9e501cc5edbc6c0477f
https://github.com/llvm/llvm-project/commit/1d4c0092a82aa351c5a6e9e501cc5edbc6c0477f
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M lld/ELF/Relocations.cpp
A lld/test/ELF/x86-64-pc32-overflow-large.s
Log Message:
-----------
[lld/ELF] Hint if R_X86_64_PC32 overflows and references a SHF_X86_64_LARGE section (#73045)
Makes it clearer what the issue is when hand-written assembly doesn't
follow medium code model assumptions in a medium code model build.
Alternative to #71248 by only hinting on an overflow.
Commit: b647a34c9f4ef1527c4641eaa51a771ce81a1fe7
https://github.com/llvm/llvm-project/commit/b647a34c9f4ef1527c4641eaa51a771ce81a1fe7
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/TargetParser/AArch64TargetParser.cpp
Log Message:
-----------
[AArch64] Fix -Wreturn-type in AArch64TargetParser.cpp (NFC)
llvm-project/llvm/lib/TargetParser/AArch64TargetParser.cpp:157:1:
error: non-void function does not return a value in all control paths [-Werror,-Wreturn-type]
}
^
1 error generated.
Commit: f2b5a314b29275f2092af3ec26f42272daa4312c
https://github.com/llvm/llvm-project/commit/f2b5a314b29275f2092af3ec26f42272daa4312c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add LUI/AUIPC+ADDI fusions to sifive-p450. (#78501)
Commit: 430a40d12eaa5a61792c4670955c110146902afb
https://github.com/llvm/llvm-project/commit/430a40d12eaa5a61792c4670955c110146902afb
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
A llvm/test/CodeGen/NVPTX/sad-intrins.ll
Log Message:
-----------
[NVPTX] extend type support for nvvm.{min,max,mulhi,sad} (#78385)
Ensure intrinsics and auto-upgrades support i16, i32, and i64 for for
`nvvm.{min,max,mulhi,sad}`
- `nvvm.min` and `nvvm.max`: These are auto-upgraded to `select`
instructions but it is still nice to support the 16 bit variants just in
case any generators of IR are still trying to use these intrinsics.
- `nvvm.sad` added both the 16 and 64 bit variants, also marked this
instruction as speculateble. These directly correspond to the PTX
`sad.{u16,s16,u64,s64}` instructions.
- `nvvm.mulhi` added the 16 bit variants. These directly correspond to
the PTX `mul.hi.{s,u}16` instructions.
Commit: 67e0f410ff2dbac83602357619a7c931518afc73
https://github.com/llvm/llvm-project/commit/67e0f410ff2dbac83602357619a7c931518afc73
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M compiler-rt/lib/dfsan/dfsan_custom.cpp
M compiler-rt/test/dfsan/custom.cpp
M compiler-rt/test/dfsan/release_shadow_space.c
Log Message:
-----------
[dfsan] Make sprintf interceptor compatible with glibc 2.37+ and musl (#78363)
snprintf interceptors call `format_buffer` with `size==~0ul`, which
may eventually lead to `snprintf(s, n, "Hello world!")` where `s+n`
wraps around. Since glibc 2.37 (https://sourceware.org/PR30441), the
snprintf call does not write the last char. musl snprintf returns -1
with EOVERFLOW when `n > INT_MAX`.
Change `size` to INT_MAX to work with glibc 2.37+ and musl.
snprintf interceptors are not changed. It's user responsibility to not
cause a compatibility issue with libc implementations.
Fix #60678
Commit: aa02002491333c42060373bc84f1ff5d2c76b4ce
https://github.com/llvm/llvm-project/commit/aa02002491333c42060373bc84f1ff5d2c76b4ce
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M .github/workflows/release-binaries.yml
A .github/workflows/release-documentation.yml
A .github/workflows/release-doxygen.yml
A .github/workflows/release-lit.yml
M .github/workflows/release-tasks.yml
M .github/workflows/set-release-binary-outputs.sh
M llvm/utils/release/github-upload-release.py
Log Message:
-----------
workflows: Refactor release-tasks.yml (#69523)
* Split out the lit release job and the documentation build job into
their own workflow files. This makes it possible to manually run these
jobs via workflow_dispatch.
* Improve tag/user validation and ensure it gets run for each release
task.
Commit: f3a4de395c167aeb8207294222c6ff5719ef6f62
https://github.com/llvm/llvm-project/commit/f3a4de395c167aeb8207294222c6ff5719ef6f62
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/TargetParser/X86TargetParser.cpp
Log Message:
-----------
[X86] Support "f16c" and "avx512fp16" for __builtin_cpu_supports (#78384)
This resolves issue #65320.
This also supports clarify sapphirerapids and cooperlake for
cpu_specific/dispatch.
Commit: 558ea411599a42d2a15dd6a878700cf62a8b36e7
https://github.com/llvm/llvm-project/commit/558ea411599a42d2a15dd6a878700cf62a8b36e7
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll
Log Message:
-----------
[AMDGPU] Reapply 'Sign extend simm16 in setreg intrinsic' (#78492)
We currently force users to use a negative contant in the intrinsic
call. Changing it zext would break existing programs, so just sign
extend an argument.
Commit: f6617091a982c0802e9b980f2ce7e11a1355c38b
https://github.com/llvm/llvm-project/commit/f6617091a982c0802e9b980f2ce7e11a1355c38b
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/and.ll
M llvm/test/CodeGen/X86/apx/or.ll
M llvm/test/CodeGen/X86/apx/sbb.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/apx/xor.ll
Log Message:
-----------
[X86][test] Add --show-mc-encoding for lowering tests of NDD arithmetic instructions (#78406)
#77564 added lowering tests for NDD arithmetic instructions.
It would be great to add `--show-mc-encoding` to check the NDD variant
is selected first.
Commit: 2d92f7de800a1b1b3dca3dab1e11da712cd55f2b
https://github.com/llvm/llvm-project/commit/2d92f7de800a1b1b3dca3dab1e11da712cd55f2b
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrShiftRotate.td
M llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll
M llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/bmi-x86_64.ll
M llvm/test/CodeGen/X86/bmi.ll
M llvm/test/CodeGen/X86/bmi2-x86_64.ll
M llvm/test/CodeGen/X86/bmi2.ll
M llvm/test/CodeGen/X86/shift-bmi2.ll
Log Message:
-----------
[X86] Support lowering for APX promoted BMI instructions. (#77433)
R16-R31 was added into GPRs in
https://github.com/llvm/llvm-project/pull/70958,
This patch supports the lowering for promoted BMI instructions in EVEX
space, enc/dec has been supported in
https://github.com/llvm/llvm-project/pull/73899.
RFC:
https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
Commit: ba81477e9cdb5384a10c700ee247562f0f6c03e6
https://github.com/llvm/llvm-project/commit/ba81477e9cdb5384a10c700ee247562f0f6c03e6
Author: Chia <sun1011jacobi at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
Log Message:
-----------
Recommit "[RISCV][ISel] Combine scalable vector add/sub/mul with zero/sign extension." (#76785)
This patch was originally introduced in PR #72340, but was reverted due
to a bug on invalid extension combine.
Specifically, we resolve the case in the
https://github.com/llvm/llvm-project/pull/72340#issuecomment-1874810998
```
define <vscale x 1 x i32> @foo(<vscale x 1 x i1> %x, <vscale x 1 x i2> %y) {
%a = zext <vscale x 1 x i1> %x to <vscale x 1 x i32>
%b = zext <vscale x 1 x i1> %y to <vscale x 1 x i32>
%c = add <vscale x 1 x i32> %a, %b
ret <vscale x 1 x i32> %c
}
```
The previous patch didn't check if the semantic of `ISD::ZERO_EXTEND`
and `ISD::ZERO_EXTEND` is equivalent to the `vsext.vf2` or `vzext.vf2`
(not ensuring the SEW condition on widening Vector Arithmetic
Instructions).
Thanks for @topperc pointing out this bug.
## The original description
This PR mainly aims at resolving the below missed-optimization case,
while it could also be considered as an extension of the previous patch
https://reviews.llvm.org/D133739?id=
### Missed-Optimization Case
Compiler Explorer: https://godbolt.org/z/GzWzP7Pfh
### Source Code:
```
define <vscale x 2 x i16> @multiple_users(ptr %x, ptr %y, ptr %z) {
%a = load <vscale x 2 x i8>, ptr %x
%b = load <vscale x 2 x i8>, ptr %y
%b2 = load <vscale x 2 x i8>, ptr %z
%c = sext <vscale x 2 x i8> %a to <vscale x 2 x i16>
%d = sext <vscale x 2 x i8> %b to <vscale x 2 x i16>
%d2 = sext <vscale x 2 x i8> %b2 to <vscale x 2 x i16>
%e = mul <vscale x 2 x i16> %c, %d
%f = add <vscale x 2 x i16> %c, %d2
%g = sub <vscale x 2 x i16> %c, %d2
%h = or <vscale x 2 x i16> %e, %f
%i = or <vscale x 2 x i16> %h, %g
ret <vscale x 2 x i16> %i
}
```
### Before This Patch
```
# %bb.0:
vsetvli a3, zero, e16, mf2, ta, ma
vle8.v v8, (a0)
vle8.v v9, (a1)
vle8.v v10, (a2)
svf2 v11, v8
vsext.vf2 v8, v9
vsext.vf2 v9, v10
vmul.vv v8, v11, v8
vadd.vv v10, v11, v9
vsub.vv v9, v11, v9
vor.vv v8, v8, v10
vor.vv v8, v8, v9
ret
```
### After This Patch
```
# %bb.0:
vsetvli a3, zero, e8, mf4, ta, ma
vle8.v v8, (a0)
vle8.v v9, (a1)
vle8.v v10, (a2)
vwmul.vv v11, v8, v9
vwadd.vv v9, v8, v10
vwsub.vv v12, v8, v10
vsetvli zero, zero, e16, mf2, ta, ma
vor.vv v8, v11, v9
vor.vv v8, v8, v12
ret
```
We can see Add/Sub/Mul are combined with the Sign Extension.
### Relation to the Patch D133739
The patch D133739 introduced an optimization for folding `ADD_VL`/
`SUB_VL` / `MUL_V` with `VSEXT_VL` / `VZEXT_VL`. However, the patch did
not consider the case of non-fixed length vector case, thus this PR
could also be considered as an extension for the D133739.
Commit: 8dfc67d6724eb0af5d278f4d1d5511ca9f9e039f
https://github.com/llvm/llvm-project/commit/8dfc67d6724eb0af5d278f4d1d5511ca9f9e039f
Author: Konstantin Varlamov <varconsteq at gmail.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M libcxx/CMakeLists.txt
M libcxx/docs/BuildingLibcxx.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/UsingLibcxx.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__assert
M libcxx/test/libcxx/assertions/modes/enabling_assertions_enables_extensive_mode.pass.cpp
M libcxx/test/libcxx/assertions/modes/override_with_debug_mode.pass.cpp
M libcxx/test/libcxx/assertions/modes/override_with_extensive_mode.pass.cpp
M libcxx/test/libcxx/assertions/modes/override_with_fast_mode.pass.cpp
M libcxx/test/libcxx/assertions/modes/override_with_unchecked_mode.pass.cpp
M libcxx/test/libcxx/containers/sequences/deque/asan_caterpillar.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.move/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.replace/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.transform/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.all_of/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.any_of/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.foreach/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.none_of/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.merge/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/numeric.ops/reduce/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/numeric.ops/transform.reduce/pstl.exception_handling.pass.cpp
M libcxx/test/support/check_assertion.h
M libcxx/utils/libcxx/header_information.py
A libcxx/vendor/llvm/default_assertion_handler.in
Log Message:
-----------
[libc++][hardening] Rework how the assertion handler can be overridden. (#77883)
Previously there were two ways to override the verbose abort function
which gets called when a hardening assertion is triggered:
- compile-time: define the `_LIBCPP_VERBOSE_ABORT` macro;
- link-time: provide a definition of `__libcpp_verbose_abort` function.
This patch adds a new configure-time approach: the vendor can provide
a path to a custom header file which will get copied into the build by
CMake and included by the library. The header must provide a definition
of the
`_LIBCPP_ASSERTION_HANDLER` macro which is what will get called should
a hardening assertion fail. As of this patch, overriding
`_LIBCPP_VERBOSE_ABORT` will still work, but the previous mechanisms
will be effectively removed in a follow-up patch, making the
configure-time mechanism the sole way of overriding the default handler.
Note that `_LIBCPP_ASSERTION_HANDLER` only gets invoked when a hardening
assertion fails. It does not affect other cases where
`_LIBCPP_VERBOSE_ABORT` is currently used (e.g. when an exception is
thrown in the `-fno-exceptions` mode).
The library provides a default version of the custom header file that
will get used if it's not overridden by the vendor. That allows us to
always test the override mechanism and reduces the difference in
configuration between the pristine version of the library and
a platform-specific version.
Commit: fdcb76f2480d2a0187641cc844e92f1d6c4b2635
https://github.com/llvm/llvm-project/commit/fdcb76f2480d2a0187641cc844e92f1d6c4b2635
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToLibm/ComplexToLibm.cpp
M mlir/test/Conversion/ComplexToLibm/convert-to-libm.mlir
Log Message:
-----------
[mlir][complex] Convert complex.tan to libm ctan call (#78250)
We can convert `complex.tan` op to
[ctan/ctanf](https://sourceware.org/newlib/libm.html#ctan) function in
libm in the complex to libm conversion.
Commit: 11bf02e0192aea0ddef9a81098c2162cde82dc7e
https://github.com/llvm/llvm-project/commit/11bf02e0192aea0ddef9a81098c2162cde82dc7e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
R llvm/test/CodeGen/AMDGPU/strict_fp_casts.ll
M llvm/test/CodeGen/AMDGPU/strict_fpext.ll
M llvm/test/CodeGen/AMDGPU/strict_fptrunc.ll
A llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
Log Message:
-----------
DAG: Fix ABI lowering with FP promote in strictfp functions (#74405)
This was emitting non-strict casts in ABI contexts for illegal
types.
Commit: 7f2408fba3106319f64880794d555edad26d7add
https://github.com/llvm/llvm-project/commit/7f2408fba3106319f64880794d555edad26d7add
Author: antangelo <contact at antangelo.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaTemplate/nested-implicit-deduction-guides.cpp
Log Message:
-----------
Revert "[clang] Fix CTAD for aggregates for nested template classes" (#78541)
Reverts llvm/llvm-project#78387
The added tests are failing on several build bots.
Commit: 7e6482b3d8bbc31ddb005dd30cd50ded780a360a
https://github.com/llvm/llvm-project/commit/7e6482b3d8bbc31ddb005dd30cd50ded780a360a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Support/Caching.cpp
M llvm/lib/Support/FileCollector.cpp
M llvm/lib/Support/GraphWriter.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/Path.cpp
M llvm/lib/Support/Process.cpp
M llvm/lib/Support/Unix/Program.inc
M llvm/lib/Support/VirtualFileSystem.cpp
Log Message:
-----------
[Support] Use SmallString::operator std::string (NFC)
Commit: ac6d2f1ba06080e0eef67931703aa55f98e8c9c6
https://github.com/llvm/llvm-project/commit/ac6d2f1ba06080e0eef67931703aa55f98e8c9c6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFTypePrinter.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
Log Message:
-----------
[DebugInfo] Use StringRef::consume_front (NFC)
Commit: 9a817b82bbef95880db900e20ddc840dc9921ced
https://github.com/llvm/llvm-project/commit/9a817b82bbef95880db900e20ddc840dc9921ced
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/include/llvm/Support/GenericLoopInfo.h
Log Message:
-----------
[Support] Use llvm::inverse_children (NFC)
Commit: d06fb0b29c7030497e0e6411cf256cabd71940c2
https://github.com/llvm/llvm-project/commit/d06fb0b29c7030497e0e6411cf256cabd71940c2
Author: Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libcxx/include/string
A libcxx/test/libcxx/containers/strings/basic.string/asan_deque_integration.pass.cpp
A libcxx/test/libcxx/containers/strings/basic.string/asan_short.pass.cpp
A libcxx/test/libcxx/containers/strings/basic.string/asan_vector_integration.pass.cpp
M libcxx/test/support/asan_testing.h
Log Message:
-----------
[ASan][libc++] Turn on ASan annotations for short strings (#75882)
This commit turns on ASan annotations in `std::basic_string` for short
stings (SSO case).
Originally suggested here: https://reviews.llvm.org/D147680
String annotations added here:
https://github.com/llvm/llvm-project/pull/72677
Requires to pass CI without fails:
- https://github.com/llvm/llvm-project/pull/75845
- https://github.com/llvm/llvm-project/pull/75858
Annotating `std::basic_string` with default allocator is implemented in
https://github.com/llvm/llvm-project/pull/72677 but annotations for
short strings (SSO - Short String Optimization) are turned off there.
This commit turns them on. This also removes
`_LIBCPP_SHORT_STRING_ANNOTATIONS_ALLOWED`, because we do not plan to
support turning on and off short string annotations.
Support in ASan API exists since
https://github.com/llvm/llvm-project/commit/dd1b7b797a116eed588fd752fbe61d34deeb24e4.
You can turn off annotations for a specific allocator based on changes
from
https://github.com/llvm/llvm-project/commit/2fa1bec7a20bb23f2e6620085adb257dafaa3be0.
This PR is a part of a series of patches extending AddressSanitizer C++
container overflow detection capabilities by adding annotations, similar
to those existing in `std::vector` and `std::deque` collections. These
enhancements empower ASan to effectively detect instances where the
instrumented program attempts to access memory within a collection's
internal allocation that remains unused. This includes cases where
access occurs before or after the stored elements in `std::deque`, or
between the `std::basic_string`'s size (including the null terminator)
and capacity bounds.
The introduction of these annotations was spurred by a real-world
software bug discovered by Trail of Bits, involving an out-of-bounds
memory access during the comparison of two strings using the
`std::equals` function. This function was taking iterators
(`iter1_begin`, `iter1_end`, `iter2_begin`) to perform the comparison,
using a custom comparison function. When the `iter1` object exceeded the
length of `iter2`, an out-of-bounds read could occur on the `iter2`
object. Container sanitization, upon enabling these annotations, would
effectively identify and flag this potential vulnerability.
If you have any questions, please email:
advenam.tacet at trailofbits.com
disconnect3d at trailofbits.com
Commit: bd9e14574a80d3c022d796d373aa92bdc63f4c26
https://github.com/llvm/llvm-project/commit/bd9e14574a80d3c022d796d373aa92bdc63f4c26
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
A llvm/include/llvm/CodeGen/GlobalMerge.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/Transforms/GlobalMerge/alignment-2.ll
M llvm/test/Transforms/GlobalMerge/alignment.ll
M llvm/test/Transforms/GlobalMerge/basic.ll
M llvm/test/Transforms/GlobalMerge/debug-info.ll
M llvm/test/Transforms/GlobalMerge/eh-filter.ll
M llvm/test/Transforms/GlobalMerge/used.ll
Log Message:
-----------
[CodeGen] Port GlobalMerge to new pass manager (#77474)
Commit: a4fe6a183883812fa8268490c987798a42c0d34b
https://github.com/llvm/llvm-project/commit/a4fe6a183883812fa8268490c987798a42c0d34b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/StaticAnalyzer/Checkers/CheckSecuritySyntaxOnly.cpp
A clang/test/Driver/xros-driver.c
A clang/test/Frontend/xros-version.c
Log Message:
-----------
[clang] Upstream XROS support in Clang (#78392)
Upstream XROS support in the clang frontend and driver.
Commit: f01b6ca8bed49bdb957607456aed29ff8ee97109
https://github.com/llvm/llvm-project/commit/f01b6ca8bed49bdb957607456aed29ff8ee97109
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
Log Message:
-----------
[CI] Add lld as compiler-rt dependecy (#78536)
Fixing
https://buildkite.com/llvm-project/github-pull-requests/builds/30321#018d1a4a-bf72-449e-a70a-444ded875255
Co-authored-by: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Commit: d83d1cb89cf80cda9d85e61c7b43f69446638865
https://github.com/llvm/llvm-project/commit/d83d1cb89cf80cda9d85e61c7b43f69446638865
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
Log Message:
-----------
[compiler-rt] making getrandom call blocking. (#78340)
except when `GRND_NONBLOCK` is present in the flags.
Commit: 9917d39dfceb6a436cd0e370392f9001f30758f1
https://github.com/llvm/llvm-project/commit/9917d39dfceb6a436cd0e370392f9001f30758f1
Author: ZhangYin <zhangyin2018 at iscas.ac.cn>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libcxx/include/experimental/__simd/aligned_tag.h
Log Message:
-----------
[libc++] <experimental/simd> Fix vector_aligned_tag (#76611)
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Commit: 8c2b0d4175dcfe669a43d0173fd00ed3c16dbdaa
https://github.com/llvm/llvm-project/commit/8c2b0d4175dcfe669a43d0173fd00ed3c16dbdaa
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/lib/AST/Expr.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/source_location.cpp
Log Message:
-----------
[Clang] Fix dependency of SourceLocExpr. (#78436)
SourceLocExpr that may produce a function name are marked dependent so that the non-instantiated
name of a function does not get evaluated.
In GH78128, the name('s size) is used as
template argument to a `DeclRef` that is not otherwise dependent, and therefore cached and not transformed when the function is
instantiated, leading to 2 different values existing at the same time for the same function.
Fixes #78128
Commit: 8ff0ab0a2ae28c4f4d4b299683a2cc69860295a2
https://github.com/llvm/llvm-project/commit/8ff0ab0a2ae28c4f4d4b299683a2cc69860295a2
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn] attempt to port 8dfc67d6724e (__assertion_handler)
Commit: 9d1dada57741d204f8a95aa2b0c89a7242e101f1
https://github.com/llvm/llvm-project/commit/9d1dada57741d204f8a95aa2b0c89a7242e101f1
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/unittests/DumpASTTests.cpp
M clang/lib/Tooling/Syntax/Tokens.cpp
M clang/unittests/Tooling/Syntax/TokensTest.cpp
Log Message:
-----------
[clangd] Handle an expanded token range that ends in the `eof` token in TokenBuffer::spelledForExpanded() (#78092)
Such ranges can legitimately arise in the case of invalid code, such as
a declaration missing an ending brace.
Fixes https://github.com/clangd/clangd/issues/1559
Commit: baaf0c968edd1a11ba0d1e2ae97b8578455ceed2
https://github.com/llvm/llvm-project/commit/baaf0c968edd1a11ba0d1e2ae97b8578455ceed2
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
Log Message:
-----------
[CodeGen] Support start/stop in CodeGenPassBuilder (#70912)
Add `-start/stop-before/after` support for CodeGenPassBuilder.
Part of #69879.
Commit: 361016f680abf830004ef726f816820a0c8c1950
https://github.com/llvm/llvm-project/commit/361016f680abf830004ef726f816820a0c8c1950
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Support/Path.cpp
M llvm/unittests/Support/Path.cpp
Log Message:
-----------
[Path] Fix off-by-one in finding filename for win style paths (#78055)
This fixes a crash where `path::parent_path` causes an invalid access on
a string upon receiving a path that consists of a single colon.
On Windows machine, with runtime checks enabled build, upon `clang -I:
test.cc` produces:
```
Assertion failed: Index < Length && "Invalid index!", file llvm\include\llvm/ADT/StringRef.h, line 232
...
#6 0x00007ff7816201eb `anonymous namespace'::parent_path_end llvm\lib\Support\Path.cpp:144:0
#7 0x00007ff781620135 llvm::sys::path::parent_path(class llvm::StringRef, enum llvm::sys::path::Style) llvm\lib\Support\Path.cpp:470:0
```
Ideally, we can look for the last colon starting from the last
character, but we can instead start from second to last, and handle
empty paths by abusing `0 - 1 == npos`.
Commit: d24f23ed0c09f6899874ca692f7df0584d3c736c
https://github.com/llvm/llvm-project/commit/d24f23ed0c09f6899874ca692f7df0584d3c736c
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/Type.cpp
Log Message:
-----------
[Clang] NFC: Move Arm type attributes to separate trailing object. (#78424)
This decouples the Arm type attributes from other bits, which means
the data will only be allocated when a function uses these Arm
attributes.
The first patch adds the bit `HasArmTypeAttributes` to
`FunctionTypeBitfields`, which grows from 62 bits to 63 bits.
In the second patch, I've moved this bit (`HasArmTypeAttributes`) to
`FunctionTypeExtraBitfields`, because it looks like the bits in
`FunctionTypeBitfields` are precious and we really don't want that
struct
to grow beyond 64 bits.
I've split this out into two patches to explain the rationale, but those
can be squashed before merging.
Commit: c8007f904720c196775880bbcb66f4d4c2dafa57
https://github.com/llvm/llvm-project/commit/c8007f904720c196775880bbcb66f4d4c2dafa57
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
A llvm/test/CodeGen/AArch64/strictfp_f16_abi_promote.ll
Log Message:
-----------
DAG: Fix chain mismanagement in SoftenFloatRes_FP_EXTEND (#74558)
Commit: c3cc09bdf8e83b86bd087e14b2dae34888422096
https://github.com/llvm/llvm-project/commit/c3cc09bdf8e83b86bd087e14b2dae34888422096
Author: Mikael Holmen <mikael.holmen at ericsson.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Log Message:
-----------
[AsmPrinter] Fix gcc -Wparentheses warning [NFC]
Without this gcc warned
../lib/CodeGen/AsmPrinter/DwarfDebug.cpp:3585:70: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
3584 | ((&Current == &AccelDebugNames) &&
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3585 | (Unit.getUnitDie().getTag() != dwarf::DW_TAG_type_unit)) &&
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~
3586 | "Kind is CU but TU is being processed.");
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../lib/CodeGen/AsmPrinter/DwarfDebug.cpp:3589:70: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
3588 | ((&Current == &AccelTypeUnitsDebugNames) &&
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3589 | (Unit.getUnitDie().getTag() == dwarf::DW_TAG_type_unit)) &&
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~
3590 | "Kind is TU but CU is being processed.");
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Commit: 021def6c2278fd932d18b4d891c2e75c1d8e6f1d
https://github.com/llvm/llvm-project/commit/021def6c2278fd932d18b4d891c2e75c1d8e6f1d
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-01-17 (Wed, 17 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll
Log Message:
-----------
[AMDGPU] Use alias info to relax waitcounts for LDS DMA (#74537)
LDA DMA loads increase VMCNT and a load from the LDS stored must wait on
this counter to only read memory after it is written. Wait count
insertion pass does not track memory dependencies, it tracks register
dependencies. To model the LDS dependency a pseudo register is used in
the scoreboard, acting like if LDS DMA writes it and LDS load reads it.
This patch adds 8 more pseudo registers to use for independent LDS
locations if we can prove they are disjoint using alias analysis.
Fixes: SWDEV-433427
Commit: 264fd9e13e6006378b2d1de2851b39eec8e98225
https://github.com/llvm/llvm-project/commit/264fd9e13e6006378b2d1de2851b39eec8e98225
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
Log Message:
-----------
[AMDGPU][NFC] Rename feature FP8Insts to FP8ConversionInsts (#78439)
Commit: 1b1b5251479c42c793b14fb9588545f9619b85d6
https://github.com/llvm/llvm-project/commit/1b1b5251479c42c793b14fb9588545f9619b85d6
Author: martinboehme <mboehme at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/SimplifyConstraints.cpp
Log Message:
-----------
[clang][dataflow] Use `Formula::isLiteral()` in a couple more places. (#78404)
Commit: f1226eea52e21b6325cf24cf0d7ccd6a517baee5
https://github.com/llvm/llvm-project/commit/f1226eea52e21b6325cf24cf0d7ccd6a517baee5
Author: martinboehme <mboehme at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Consider `CXXDefaultInitExpr` to be an "original record ctor". (#78423)
The CFG doesn't contain a CFGElement for the
`CXXDefaultInitExpr::getInit()`, so
it makes sense to consider the `CXXDefaultInitExpr` to be the expression
that
originally constructs the object.
Commit: 9ca1a08144a3caea8fd2f45fd4930ca796cf4166
https://github.com/llvm/llvm-project/commit/9ca1a08144a3caea8fd2f45fd4930ca796cf4166
Author: Balรกzs Kรฉri <balazs.keri at ericsson.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/unittests/AST/StructuralEquivalenceTest.cpp
Log Message:
-----------
[clang][ASTImporter] Improve structural equivalence of overloadable operators. (#72242)
Operators that are overloadable may be parsed as `CXXOperatorCallExpr`
or as `UnaryOperator` (or `BinaryOperator`). This depends on the context
and can be different if a similar construct is imported into an existing
AST. The two "forms" of the operator call AST nodes should be detected
as equivalent to allow AST import of these cases.
This fix has probably other consequences because if a structure is
imported that has `CXXOperatorCallExpr` into an AST with an existing
similar structure that has `UnaryOperator` (or binary), the additional
data in the `CXXOperatorCallExpr` node is lost at the import (because
the existing node will be used). I am not sure if this can cause
problems.
Commit: 37c87d5689134392ba801a9eb28785f9f0b3e5f7
https://github.com/llvm/llvm-project/commit/37c87d5689134392ba801a9eb28785f9f0b3e5f7
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Analysis/CostModel/AArch64/arith-fp-frem.ll
Log Message:
-----------
[LV][AArch64] LoopVectorizer allows scalable frem instructions (#76247)
LoopVectorizer is aware when a target can replace a scalable frem
instruction with a vector library call for a given VF and it returns the
relevant cost. Otherwise, it returns an invalid cost (as previously).
Add test that check costs on AArch64, when there is no vector library
available and when there is (with and without tail-folding).
NOTE: Invoking CostModel directly (not through LV) would still return
invalid costs.
Commit: 1d286ad59b9080d9503502a35f9bdb35e40f1f33
https://github.com/llvm/llvm-project/commit/1d286ad59b9080d9503502a35f9bdb35e40f1f33
Author: Mirko Brkuลกanin <Mirko.Brkusanin at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
A llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
A llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
A llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.mir
M llvm/test/CodeGen/MIR/AMDGPU/target-memoperands.mir
Log Message:
-----------
[AMDGPU] Add mark last scratch load pass (#75512)
Commit: 4f62a183d9101a90d62e2a278d0513e9d2afba43
https://github.com/llvm/llvm-project/commit/4f62a183d9101a90d62e2a278d0513e9d2afba43
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
A flang/test/Fir/already-defined-free.fir
Log Message:
-----------
[flang] Allow user to define free via BIND(C) (#78428)
A user defining and using free/malloc via BIND(C) would previously cause
flang to crash when generating LLVM IR with error "redefinition of
symbol named 'free'". This was caused by flang codegen not expecting to
find a mlir::func::FuncOp definition of these function and emitting a
new mlir::LLVM::FuncOp that later conflicted when translating the
mlir::func::FuncOp.
Commit: 2a869ced61b9c148bb30c8c6b989b3d2da0c5d9a
https://github.com/llvm/llvm-project/commit/2a869ced61b9c148bb30c8c6b989b3d2da0c5d9a
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa-fake16.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
Log Message:
-----------
[AMDGPU][True16] Support V_FLOOR_F16. (#78446)
Commit: 9096bcc7c89491b5e26d5e275e69a8f76e2e5146
https://github.com/llvm/llvm-project/commit/9096bcc7c89491b5e26d5e275e69a8f76e2e5146
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port 1d286ad59b90
Commit: 085eae6b863881fb9fda323e5b672b04a00ed19e
https://github.com/llvm/llvm-project/commit/085eae6b863881fb9fda323e5b672b04a00ed19e
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/AST/ODRHash.cpp
A clang/test/Modules/pr76638.cppm
Log Message:
-----------
[C++20] [Modules] Allow to merge enums with the same underlying interger types
Close https://github.com/llvm/llvm-project/issues/76638. See the issue
for the context of the change.
Commit: 15b0fabb21af8395c1b810e7d992a869b9ef31d8
https://github.com/llvm/llvm-project/commit/15b0fabb21af8395c1b810e7d992a869b9ef31d8
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
A llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare-asm.ll
A llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare.ll
Log Message:
-----------
[RISCV] Vectorize phi for loop carried @llvm.vector.reduce.fadd (#78244)
LLVM vector reduction intrinsics return a scalar result, but on RISC-V
vector reduction instructions write the result in the first element of a
vector register. So when a reduction in a loop uses a scalar phi, we end
up with unnecessary scalar moves:
loop:
vfmv.s.f v10, fa0
vfredosum.vs v8, v8, v10
vfmv.f.s fa0, v8
This mainly affects ordered fadd reductions, which has a scalar accumulator
operand.
This tries to vectorize any scalar phis that feed into a fadd reduction
in RISCVCodeGenPrepare, converting:
loop:
%phi = phi <float> [ ..., %entry ], [ %acc, %loop]
%acc = call float @llvm.vector.reduce.fadd.nxv4f32(float %phi, <vscale x 2 x float> %vec)
```
to
loop:
%phi = phi <vscale x 2 x float> [ ..., %entry ], [ %acc.vec, %loop]
%phi.scalar = extractelement <vscale x 2 x float> %phi, i64 0
%acc = call float @llvm.vector.reduce.fadd.nxv4f32(float %x, <vscale x 2 x float> %vec)
%acc.vec = insertelement <vscale x 2 x float> poison, float %acc.next, i64 0
Which eliminates the scalar -> vector -> scalar crossing during
instruction selection.
Commit: 51e3d2f73d8f3f5c70f0c1b6b73f62ec9c680cb4
https://github.com/llvm/llvm-project/commit/51e3d2f73d8f3f5c70f0c1b6b73f62ec9c680cb4
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
A llvm/test/CodeGen/AArch64/sme-streaming-body-streaming-compatible-interface.ll
Log Message:
-----------
[AArch64][SME] Conditionally do smstart/smstop (#77113)
This patch adds conditional enabling/disabling of streaming mode for
functions which have both the aarch64_pstate_sm_compatible and
aarch64_pstate_sm_body attributes.
This combination allows callees to determine if switching streaming mode
is required instead of relying on the caller.
Commit: bc4f3e31a99ad11b385f68634aa9fbe2cbdd7031
https://github.com/llvm/llvm-project/commit/bc4f3e31a99ad11b385f68634aa9fbe2cbdd7031
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libc/src/string/memory_utils/op_x86.h
M libc/src/string/memory_utils/utils.h
Log Message:
-----------
[libc][NFC] Selectively disable GCC warnings (#78462)
Commit: 49e3e7514309823e39627175d5337c5d5aff92c1
https://github.com/llvm/llvm-project/commit/49e3e7514309823e39627175d5337c5d5aff92c1
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/IR/ConstantFold.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/fp-undef.ll
Log Message:
-----------
[ConstantFold] Clean up binop identity folding
Resolve the two FIXMEs: Perform the binop identitiy fold with
AllowRHSConstant, and remove redundant folds later in the code.
Commit: e75720b477216535b14ce604be0a50e0b7a0c829
https://github.com/llvm/llvm-project/commit/e75720b477216535b14ce604be0a50e0b7a0c829
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
Log Message:
-----------
[Clang][SME] Add missing IsStreamingCompatible flag to svget, svcreate & svset (#78430)
Commit: f1fdfe6888f93b9f6dfb4689e1f3206de584ff5b
https://github.com/llvm/llvm-project/commit/f1fdfe6888f93b9f6dfb4689e1f3206de584ff5b
Author: Alexey Lapshin <a.v.lapshin at mail.ru>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/test/tools/dsymutil/ARM/DWARFLinkerParallel/accel-imported-declarations.test
M llvm/test/tools/dsymutil/ARM/call-pc-reloc.test
M llvm/test/tools/dsymutil/ARM/dwarf5-addr-base.test
M llvm/test/tools/dsymutil/ARM/dwarf5-addrx-0x0-last.test
M llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test
M llvm/test/tools/dsymutil/ARM/dwarf5-macho.test
M llvm/test/tools/dsymutil/ARM/dwarf5-str-offsets-base-strx.test
M llvm/test/tools/dsymutil/ARM/empty-map.test
M llvm/test/tools/dsymutil/ARM/extern-alias.test
M llvm/test/tools/dsymutil/ARM/fat-arch-name.test
M llvm/test/tools/dsymutil/ARM/fat-arch-not-found.test
M llvm/test/tools/dsymutil/ARM/fat-dylib-update.test
M llvm/test/tools/dsymutil/ARM/inline-source.test
M llvm/test/tools/dsymutil/ARM/inlined-low_pc.c
M llvm/test/tools/dsymutil/ARM/obfuscated.test
M llvm/test/tools/dsymutil/ARM/preload.test
M llvm/test/tools/dsymutil/ARM/scattered.c
M llvm/test/tools/dsymutil/ARM/thumb.c
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/dead-stripped.cpp
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/empty-CU.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/empty_range.s
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/frame-1.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/frame-2.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/inlined-static-variable.cpp
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/keep-func.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-anon-namespace.cpp
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-fwd-declaration.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-fwd-declaration2.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-fwd-declaration3.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-member-functions.cpp
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-namespace-extension.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-nested-types1.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-nested-types2.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-parents.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-predictable-output.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-predictable-output2.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-recursive-dependence.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-string.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-template-parameters.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-two-units-in-single-file.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-types-in-subprogram1.test
M llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-uniquing.cpp
M llvm/test/tools/dsymutil/X86/alias.test
M llvm/test/tools/dsymutil/X86/basic-linking-bundle.test
M llvm/test/tools/dsymutil/X86/basic-linking-x86.test
M llvm/test/tools/dsymutil/X86/basic-lto-dw4-linking-x86.test
M llvm/test/tools/dsymutil/X86/basic-lto-linking-x86.test
M llvm/test/tools/dsymutil/X86/basic-with-libfat-test.test
M llvm/test/tools/dsymutil/X86/call-site-entry-linking.test
M llvm/test/tools/dsymutil/X86/call-site-entry-reloc.test
M llvm/test/tools/dsymutil/X86/common-sym-multi.test
M llvm/test/tools/dsymutil/X86/common-sym.test
M llvm/test/tools/dsymutil/X86/custom-line-table.test
M llvm/test/tools/dsymutil/X86/darwin-bundle.test
M llvm/test/tools/dsymutil/X86/debug-loc-base-addr.test
M llvm/test/tools/dsymutil/X86/dwarf4-linetable.test
M llvm/test/tools/dsymutil/X86/dwarf5-addrx.test
M llvm/test/tools/dsymutil/X86/dwarf5-call-site-entry-reloc.test
M llvm/test/tools/dsymutil/X86/dwarf5-dw-op-addrx.test
M llvm/test/tools/dsymutil/X86/dwarf5-linetable.test
M llvm/test/tools/dsymutil/X86/dwarf5-loclists.test
M llvm/test/tools/dsymutil/X86/dwarf5-rnglists.test
M llvm/test/tools/dsymutil/X86/eh_frame.test
M llvm/test/tools/dsymutil/X86/fat-archive-input-i386.test
M llvm/test/tools/dsymutil/X86/fat-object-input-x86_64.test
M llvm/test/tools/dsymutil/X86/fat-object-input-x86_64h.test
M llvm/test/tools/dsymutil/X86/generate-empty-CU.test
M llvm/test/tools/dsymutil/X86/global_downgraded_to_static.c
M llvm/test/tools/dsymutil/X86/inlined-static-variable.cpp
M llvm/test/tools/dsymutil/X86/label.test
M llvm/test/tools/dsymutil/X86/label2.test
M llvm/test/tools/dsymutil/X86/lc_build_version.test
M llvm/test/tools/dsymutil/X86/linker-llvm-union-fwd-decl.test
M llvm/test/tools/dsymutil/X86/location-expression.test
M llvm/test/tools/dsymutil/X86/mismatch.m
M llvm/test/tools/dsymutil/X86/modules-dwarf-version.m
M llvm/test/tools/dsymutil/X86/modules-empty.m
M llvm/test/tools/dsymutil/X86/multiple-inputs.test
M llvm/test/tools/dsymutil/X86/object-prefix-path.test
M llvm/test/tools/dsymutil/X86/odr-uniquing.cpp
M llvm/test/tools/dsymutil/X86/op-convert-offset.test
M llvm/test/tools/dsymutil/X86/op-convert.test
M llvm/test/tools/dsymutil/X86/reflection-dump.test
M llvm/test/tools/dsymutil/X86/remarks-linking-archive.text
M llvm/test/tools/dsymutil/X86/remarks-linking-bundle-empty.test
M llvm/test/tools/dsymutil/X86/remarks-linking-bundle.test
M llvm/test/tools/dsymutil/X86/remarks-linking-fat-bundle.test
M llvm/test/tools/dsymutil/X86/reproducer.test
M llvm/test/tools/dsymutil/X86/statistics.test
M llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test
M llvm/test/tools/dsymutil/X86/swift-dwarf-loc.test
M llvm/test/tools/dsymutil/X86/tail-call-linking.test
M llvm/test/tools/dsymutil/X86/thinlto.test
M llvm/test/tools/dsymutil/X86/timestamp-mismatch.test
M llvm/test/tools/dsymutil/X86/tls-variable.test
M llvm/test/tools/dsymutil/X86/verify.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/accelerator-dwarf4.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/accelerator-dwarf5.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf4-macro-short.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf4-macro.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-addresses.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-attributes.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-line-str.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-loclists.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-macro-opcodeop.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-macro-short.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-macro.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-rnglists.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/gc-default.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/gc-func-overlapping-address-ranges.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/gc-maxpc.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/gc-no-garbage.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/gc-unit-overlapping-address-ranges.test
M llvm/test/tools/llvm-dwarfutil/ELF/X86/verify.test
M llvm/tools/dsymutil/DwarfLinkerForBinary.cpp
M llvm/tools/dsymutil/LinkUtils.h
M llvm/tools/dsymutil/Options.td
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/llvm-dwarfutil/DebugInfoLinker.cpp
M llvm/tools/llvm-dwarfutil/Options.h
M llvm/tools/llvm-dwarfutil/Options.td
M llvm/tools/llvm-dwarfutil/llvm-dwarfutil.cpp
Log Message:
-----------
[dsymutil][llvm-dwarfutil] Rename command line options to avoid using vendor names. (#78135)
This patch renames values of dsymutil/llvm-dwarfutil options:
--linker apple -> --linker classic
--linker llvm -> --linker parallel
The purpose to rename options is to avoid using vendor names and to
match with library names. It should be safe to rename options at current
stage as they are not seemed widely used(we may not preserve backward
compatibility).
Commit: 172dbdf9312a15b449954e43623afc28240f50dd
https://github.com/llvm/llvm-project/commit/172dbdf9312a15b449954e43623afc28240f50dd
Author: pvanhout <pierre.vanhoutryve at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
Log Message:
-----------
[AMDGPU][ELF] Reserve 0x4f and 0x50 EFLAGS
Commit: c111dc72e907d8aeb85b42e2251ea55130199681
https://github.com/llvm/llvm-project/commit/c111dc72e907d8aeb85b42e2251ea55130199681
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
Log Message:
-----------
[AMDGPU] Allow potentially negative flat scratch offsets on GFX12 (#78193)
https://github.com/llvm/llvm-project/pull/70634 has disabled use
of potentially negative scratch offsets, but we can use it on GFX12.
---------
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 4c65787f1e45199713f71f63817651ff2decd96c
https://github.com/llvm/llvm-project/commit/4c65787f1e45199713f71f63817651ff2decd96c
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
Log Message:
-----------
[AMDGPU] Add GFX12 __builtin_amdgcn_s_sleep_var (#77926)
Commit: 9ca36932b5350a9d8d7ddf6c26ff8c1a81467430
https://github.com/llvm/llvm-project/commit/9ca36932b5350a9d8d7ddf6c26ff8c1a81467430
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
Log Message:
-----------
[AMDGPU] Work around s_getpc_b64 zero extending on GFX12 (#78186)
Commit: ba52f06f9d92c7ca04b440f618f8d352ea121fcc
https://github.com/llvm/llvm-project/commit/ba52f06f9d92c7ca04b440f618f8d352ea121fcc
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-smem.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
Log Message:
-----------
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
Update SIMemoryLegalizer and SIInsertWaitcnts to use separate wait
instructions per counter (e.g. S_WAIT_LOADCNT) and split VMCNT into
separate LOADCNT, SAMPLECNT and BVHCNT counters.
Commit: 40d952b8748bf5c4a97fc82296e1fc050388472f
https://github.com/llvm/llvm-project/commit/40d952b8748bf5c4a97fc82296e1fc050388472f
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/avoid-free-ext-promotion.ll
M llvm/test/CodeGen/AArch64/bfis-in-loop.ll
M llvm/test/CodeGen/X86/inline-spiller-impdef-on-implicit-def-regression.ll
Log Message:
-----------
[CGP] Avoid replacing a free ext with multiple other exts. (#77094)
Replacing a free extension with 2 or more extensions unnecessarily
increases the number of IR instructions without providing any benefits.
It also unnecessarily causes operations to be performed on wider types
than necessary.
In some cases, the extra extensions also pessimize codegen (see
bfis-in-loop.ll).
The changes in arm64-codegen-prepare-extload.ll also show that we avoid
promotions that should only be performed in stress mode.
PR: https://github.com/llvm/llvm-project/pull/77094
Commit: 667e58a72e0d81abe0ab3500b5d5563b6a598e7f
https://github.com/llvm/llvm-project/commit/667e58a72e0d81abe0ab3500b5d5563b6a598e7f
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/test/SemaCXX/coro-lifetimebound.cpp
M clang/test/SemaCXX/coro-return-type-and-wrapper.cpp
Log Message:
-----------
[coroutines][coro_lifetimebound] Detect lifetime issues with lambda captures (#77066)
### Problem
```cpp
co_task<int> coro() {
int a = 1;
auto lamb = [a]() -> co_task<int> {
co_return a; // 'a' in the lambda object dies after the iniital_suspend in the lambda coroutine.
}();
co_return co_await lamb;
}
```
[use-after-free](https://godbolt.org/z/GWPEovWWc)
Lambda captures (even by value) are prone to use-after-free once the
lambda object dies. In the above example, the lambda object appears only
as a temporary in the call expression. It dies after the first
suspension (`initial_suspend`) in the lambda.
On resumption in `co_await lamb`, the lambda accesses `a` which is part
of the already-dead lambda object.
---
### Solution
This problem can be formulated by saying that the `this` parameter of
the lambda call operator is a lifetimebound parameter. The lambda object
argument should therefore live atleast as long as the return object.
That said, this requirement does not hold if the lambda does not have a
capture list. In principle, the coroutine frame still has a reference to
a dead lambda object, but it is easy to see that the object would not be
used in the lambda-coroutine body due to no capture list.
It is safe to use this pattern inside a`co_await` expression due to the
lifetime extension of temporaries. Example:
```cpp
co_task<int> coro() {
int a = 1;
int res = co_await [a]() -> co_task<int> { co_return a; }();
co_return res;
}
```
---
### Background
This came up in the discussion with seastar folks on
[RFC](https://discourse.llvm.org/t/rfc-lifetime-bound-check-for-parameters-of-coroutines/74253/19?u=usx95).
This is a fairly common pattern in continuation-style-passing (CSP)
async programming involving futures and continuations. Document ["Lambda
coroutine
fiasco"](https://github.com/scylladb/seastar/blob/master/doc/lambda-coroutine-fiasco.md)
by Seastar captures the problem.
This pattern makes the migration from CSP-style async programming to
coroutines very bugprone.
Fixes https://github.com/llvm/llvm-project/issues/76995
---------
Co-authored-by: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Commit: d5b2e41e208a1176212f0a08313d2a3dad5e5bb6
https://github.com/llvm/llvm-project/commit/d5b2e41e208a1176212f0a08313d2a3dad5e5bb6
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M openmp/runtime/src/include/omp_lib.h.var
Log Message:
-----------
[OpenMP][omp_lib] Restore compatibility with more restrictive Fortran compilers (#77780)
The most recent changes to `omp_lib.h.var` have re-introduced some
compatibility issues that had to be fixed due to the similar changes in
the past. Namely:
1. D120707 has removed the "use omp_lib_kinds" statement and replaced it
with import
2. D114537 added line continuation to the long lines
This patch introduces the same kind of changes in order to restore
compatibility with some more restrictive Fortran compilers so their
users could still benefit from the LLVM's OpenMP Fortran library.
Commit: 779af9b713d78b60e724e2a14c6490045b13b640
https://github.com/llvm/llvm-project/commit/779af9b713d78b60e724e2a14c6490045b13b640
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Fix -Wunused-variable in SIInsertWaitcnts.cpp (NFC)
llvm-project/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1539:10:
error: unused variable 'SWaitInst' [-Werror,-Wunused-variable]
auto SWaitInst =
^
1 error generated.
Commit: cf799b3d3badbcb0c028266daa73043c0d0462c1
https://github.com/llvm/llvm-project/commit/cf799b3d3badbcb0c028266daa73043c0d0462c1
Author: Alexey Lapshin <a.v.lapshin at mail.ru>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/IndexedValuesMap.h
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
R llvm/lib/DWARFLinker/Parallel/IndexedValuesMap.h
Log Message:
-----------
[DWARFLinker][NFC] Move common code into the base library: IndexedValuesMap. (#77437)
This patch is extracted from #74725.
Both dwarflinkers contain similar classes for indexed values. Move the
code into the DWARFLinkerBase.
Commit: d12dffacaa838cbdd30454e49214f40d2ec1cc50
https://github.com/llvm/llvm-project/commit/d12dffacaa838cbdd30454e49214f40d2ec1cc50
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[X86] Add X86::getConstantFromPool helper function to replace duplicate implementations.
We had the same helper function in shuffle decode / vector constant code - move this to X86InstrInfo to avoid duplication.
Commit: a48c1bda74038c81c19e4508fb1d1e84f3ae690a
https://github.com/llvm/llvm-project/commit/a48c1bda74038c81c19e4508fb1d1e84f3ae690a
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
Log Message:
-----------
Revert "[CodeGen] Support start/stop in CodeGenPassBuilder" (#78567)
Reverts llvm/llvm-project#70912. This breaks some bazel tests.
Commit: 64e94438a416b2ac630f247606a992442d6b0e20
https://github.com/llvm/llvm-project/commit/64e94438a416b2ac630f247606a992442d6b0e20
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/mul.ll
Log Message:
-----------
[InstCombine] combine mul(abs(x),abs(y)) to abs(mul(x,y)) (#78395)
Fixes: https://github.com/llvm/llvm-project/issues/78076
Alive2 Proof: https://alive2.llvm.org/ce/z/XEDy0f
Commit: 9acc4042300a92856527169b28c43cebf179d6d5
https://github.com/llvm/llvm-project/commit/9acc4042300a92856527169b28c43cebf179d6d5
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/funnel.ll
Log Message:
-----------
[InstCombine] Recognize more rotation patterns (#78107)
InstCombine already handles the pattern `(shl ShVal, (X & (Width - 1)))
| (lshr ShVal, ((-X) & (Width - 1)))`. Under certain circumstances, `X &
(Width - 1)` will be simplified to `X`. Therefore, this patch adds
support for the pattern `(shl ShVal, X) | (lshr ShVal, ((-X) & (Width -
1)))`.
Alive2: https://alive2.llvm.org/ce/z/P7JQ2V
Commit: 11ec512f444986c5cf09ad8b5c01a93063b21c4a
https://github.com/llvm/llvm-project/commit/11ec512f444986c5cf09ad8b5c01a93063b21c4a
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/FPUtil/DivisionAndRemainderOperations.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/FPUtil/NearestIntegerOperations.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/fpbits_str.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/FMod.h
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/float_to_string.h
M libc/src/__support/str_to_float.h
M libc/src/math/generic/acosf.cpp
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/atanf.cpp
M libc/src/math/generic/atanhf.cpp
M libc/src/math/generic/cosf.cpp
M libc/src/math/generic/coshf.cpp
M libc/src/math/generic/erff.cpp
M libc/src/math/generic/exp10f_impl.h
M libc/src/math/generic/exp2f_impl.h
M libc/src/math/generic/expf.cpp
M libc/src/math/generic/expm1.cpp
M libc/src/math/generic/expm1f.cpp
M libc/src/math/generic/inv_trigf_utils.h
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log2f.cpp
M libc/src/math/generic/logf.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/sinf.cpp
M libc/src/math/generic/sinhf.cpp
M libc/src/math/generic/tanhf.cpp
M libc/src/stdio/printf_core/float_dec_converter.h
M libc/src/stdio/printf_core/float_hex_converter.h
M libc/src/stdio/printf_core/float_inf_nan_converter.h
M libc/test/UnitTest/FPMatcher.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/math/FDimTest.h
M libc/test/src/math/FmaTest.h
M libc/test/src/math/HypotTest.h
M libc/test/src/math/ILogbTest.h
M libc/test/src/math/LdExpTest.h
M libc/test/src/math/NextAfterTest.h
M libc/test/src/math/RIntTest.h
M libc/test/src/math/RemQuoTest.h
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/smoke/FDimTest.h
M libc/test/src/math/smoke/FmaTest.h
M libc/test/src/math/smoke/HypotTest.h
M libc/test/src/math/smoke/ILogbTest.h
M libc/test/src/math/smoke/LdExpTest.h
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/math/smoke/RemQuoTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
M libc/test/src/math/smoke/atanhf_test.cpp
M libc/test/src/stdlib/strtold_test.cpp
M libc/test/src/time/difftime_test.cpp
Log Message:
-----------
[libc][NFC] Introduce a Sign type for FPBits (#78500)
Another patch is needed to cover `DyadicFloat` and `NormalFloat`
constructors.
Commit: 18d0a7e4c0d085de4e652e359bdd6778c43ec9bf
https://github.com/llvm/llvm-project/commit/18d0a7e4c0d085de4e652e359bdd6778c43ec9bf
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/test/AST/Interp/complex.cpp
Log Message:
-----------
[clang][Interp] Implement ComplexToReal casts (#77294)
Add a new emitComplexReal() helper function and use that for the new
casts as well as the old __real implementation.
Commit: 28b7e498b6a1dbfa1ac249acec45f948665ba58e
https://github.com/llvm/llvm-project/commit/28b7e498b6a1dbfa1ac249acec45f948665ba58e
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx12.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dot4.f32.ll
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp16.s
A llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp8.s
A llvm/test/MC/AMDGPU/gfx12_asm_vop3p_dpp8_err.s
A llvm/test/MC/AMDGPU/gfx12_asm_vop3p_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p_dpp8.txt
Log Message:
-----------
AMDGPU/GFX12: Add new dot4 fp8/bf8 instructions (#77892)
Endoding is VOP3P. Tagged as deep/machine learning instructions. i32
type (v4fp8 or v4bf8 packed in i32) is used for src0 and src1. src0 and
src1 have no src_modifiers. src2 is f32 and has src_modifiers: f32
fneg(neg_lo[2]) and f32 fabs(neg_hi[2]).
---------
Co-authored-by: Petar Avramovic <Petar.Avramovic at amd.com>
Commit: 3e6589f21c8088d823377b648aaa1a20ec1bc3d5
https://github.com/llvm/llvm-project/commit/3e6589f21c8088d823377b648aaa1a20ec1bc3d5
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-features.cl
A clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_ds.s
M llvm/test/MC/AMDGPU/gfx12_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vbuffer_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt
Log Message:
-----------
[AMDGPU][GFX12] Add 16 bit atomic fadd instructions (#75917)
- image_atomic_pk_add_f16
- image_atomic_pk_add_bf16
- ds_pk_add_bf16
- ds_pk_add_f16
- ds_pk_add_rtn_bf16
- ds_pk_add_rtn_f16
- flat_atomic_pk_add_f16
- flat_atomic_pk_add_bf16
- global_atomic_pk_add_f16
- global_atomic_pk_add_bf16
- buffer_atomic_pk_add_f16
- buffer_atomic_pk_add_bf16
Commit: f4fbbebb5edcaad459ce154c011f71fc38fe4052
https://github.com/llvm/llvm-project/commit/f4fbbebb5edcaad459ce154c011f71fc38fe4052
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
A clang/test/CXX/drs/dr1807.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add test for CWG1807 (#77637)
The test checks that objects in arrays are destructed in reverse order during stack unwinding.
This patch is trying to establish a precedent how codegen tests for C++ defect report test suite should be written. Refer to PR for exact reasoning.
Commit: 0a3a0ea5914cb4633f4f4c14f1ddc46ce067061a
https://github.com/llvm/llvm-project/commit/0a3a0ea5914cb4633f4f4c14f1ddc46ce067061a
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
Log Message:
-----------
[AMDGPU] Update uses of new VOP2 pseudos for GFX12 (#78155)
New pseudos were added for instructions that were natively VOP3 on
GFX11: V_ADD_F64_pseudo, V_MUL_F64_pseudo, V_MIN_NUM_F64, V_MAX_NUM_F64,
V_LSHLREV_B64_pseudo
---------
Co-authored-by: Mirko Brkusanin <Mirko.Brkusanin at amd.com>
Commit: e5a34f9226ef56669f670dc32661934ee3e56f37
https://github.com/llvm/llvm-project/commit/e5a34f9226ef56669f670dc32661934ee3e56f37
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP] Push genEval closer to leaf lowering functions (#77760)
This moves the lowering of the nested evaluations all the way to the
bottom of the call stack. This PR does not attempt to change the leaf
lowering functions beyond placing the call to `genEval` in there.
Whether the nested evaluations should be lowered for any given op
depends on the context in which that op is created, hence a `genNested`
parameter was added.
Contexts in which nested evaluations should not be lowered are during
lowering of composite constructs, such as PARALLEL SECTIONS. This
particular case is considered a block construct tied to the SECTIONS
directive, and the lowering code will first create an empty parallel op,
and then recursively lower the SECTIONS code. Similar situations occur
when lowering most (if not all) compound/composite constructs.
Recursive lowering [4/5]
Commit: 745b1932609e3e976b0d85a7c56f375767f5f900
https://github.com/llvm/llvm-project/commit/745b1932609e3e976b0d85a7c56f375767f5f900
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dot4.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
Log Message:
-----------
[AMDGPU] Regenerate tests for #77892 after #77438
Commit: 0c76865da9635e3cc4266c7be943a8dfea8d7587
https://github.com/llvm/llvm-project/commit/0c76865da9635e3cc4266c7be943a8dfea8d7587
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP][Lower] NFC: Combine two calls to ClauseProcessor::processTODO (#78451)
Just a minimal readability improvement that we overlooked during
refactoring.
Commit: e6a6a90fe739d5f792645bf237eb0e540fad8c69
https://github.com/llvm/llvm-project/commit/e6a6a90fe739d5f792645bf237eb0e540fad8c69
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/str_to_float.h
M libc/src/math/generic/exp.cpp
M libc/src/math/generic/exp10.cpp
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/expm1.cpp
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log_range_reduction.h
M libc/test/src/__support/FPUtil/dyadic_float_test.cpp
Log Message:
-----------
[libc][NFC] Use the Sign type for DyadicFloat (#78577)
Commit: 1566f1ffc6b52bee659071d460123c1c4a358d01
https://github.com/llvm/llvm-project/commit/1566f1ffc6b52bee659071d460123c1c4a358d01
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/test/Interpreter/incremental-mode.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Add a interpreter-specific overload of operator new for C++ (#76218)
This patch brings back the basic support for C by inserting the required
for value printing runtime only when we are in C++ mode. Additionally,
it defines a new overload of operator placement new because we can't
really forward declare it in a library-agnostic way.
Fixes the issue described in llvm/llvm-project#69072.
Commit: 57f6a3f7ea9bae0c429cd3b8a69e3a8b1d0eed41
https://github.com/llvm/llvm-project/commit/57f6a3f7ea9bae0c429cd3b8a69e3a8b1d0eed41
Author: Piotr Sobczak <piotr.sobczak at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx11-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w32-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w64-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w32.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w64.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
A llvm/test/MC/AMDGPU/gfx12_asm_global_load_tr.s
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_global_load_tr.txt
Log Message:
-----------
[AMDGPU] Add global_load_tr for GFX12 (#77772)
Support new amdgcn_global_load_tr instructions for load with transpose.
* MC layer support for GLOBAL_LOAD_TR_B64/GLOBAL_LOAD_TR_B128
* Intrinsic int_amdgcn_global_load_tr
* Clang builtins amdgcn_global_load_tr*
Commit: 30d458626d4fb7adf94b195e98de240b491c86c9
https://github.com/llvm/llvm-project/commit/30d458626d4fb7adf94b195e98de240b491c86c9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
A clang/test/AST/Interp/cxx11.cpp
A clang/test/AST/Interp/cxx98.cpp
Log Message:
-----------
[clang][Interp] Fix diagnosing non-const variables pre-C++11 (#76718)
In CheckConstant(), consider that in C++98 const variables may not be read at all, and diagnose that accordingly.
Commit: 07abde27171af7fdde979afbb216e305bc487f98
https://github.com/llvm/llvm-project/commit/07abde27171af7fdde979afbb216e305bc487f98
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/test/Driver/isysroot.f90
M flang/test/lit.cfg.py
M flang/test/lit.site.cfg.py.in
Log Message:
-----------
[flang][driver] Fix Driver/isysroot.f90 test (#78478)
Check for DEFAULT_SYSROOT, because when it is set -isysroot has no
effect.
Commit: d87a53a960dfe51f900f09fc3194bd1118dd3b87
https://github.com/llvm/llvm-project/commit/d87a53a960dfe51f900f09fc3194bd1118dd3b87
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
A openmp/libomptarget/test/offloading/fortran/basic-target-parallel-do.f90
Log Message:
-----------
[NFC][OpenMP][Flang] Add test for OpenMP target parallel do (#77776)
Added test which proves that end-to-end compilation of `omp target
parallel do` costruct is successful for Flang compiler.
Commit: e90e43fb9cd1d305f7196cd526aa503374e0f616
https://github.com/llvm/llvm-project/commit/e90e43fb9cd1d305f7196cd526aa503374e0f616
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseEqualsDeleteCheck.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/ODRDiagsEmitter.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/VirtualCallChecker.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[Clang][NFC] Rename CXXMethodDecl::isPure -> is VirtualPure (#78463)
To avoid any possible confusion with the notion of pure function and the
gnu::pure attribute.
Commit: 5caab8bbc0f89f46aca07be2090c8d23c78605ba
https://github.com/llvm/llvm-project/commit/5caab8bbc0f89f46aca07be2090c8d23c78605ba
Author: Quinn Dawkins <quinn.dawkins at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgMatchOps.td
M mlir/include/mlir/Dialect/Transform/IR/MatchInterfaces.h
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgMatchOps.cpp
M mlir/lib/Dialect/Transform/IR/MatchInterfaces.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/python/mlir/dialects/transform/extras/__init__.py
M mlir/test/Dialect/Transform/test-interpreter.mlir
Log Message:
-----------
[mlir][transform] Add transform.get_operand op (#78397)
Similar to `transform.get_result`, except it returns a handle to the
operand indicated by a positional specification, same as is defined for
the linalg match ops.
Additionally updates `get_result` to take the same positional specification.
This makes the use case of wanting to get all of the results of an
operation easier by no longer requiring the user to reconstruct the list
of results one-by-one.
Commit: 8930c5a4beb98688941747f23b17f7703c291d72
https://github.com/llvm/llvm-project/commit/8930c5a4beb98688941747f23b17f7703c291d72
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M openmp/libomptarget/test/offloading/fortran/basic-target-parallel-do.f90
Log Message:
-----------
[NFC][OpenMP] Fix typo in CHECK line (#78586)
Typo in test: openmp/libomptarget/test/offloading/fortran/basic-target-parallel-do.f90
Commit: 9d6e189ee8a93b9bc65a2b317961d8d1f63e3f64
https://github.com/llvm/llvm-project/commit/9d6e189ee8a93b9bc65a2b317961d8d1f63e3f64
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
Log Message:
-----------
[RISCV] Use regexp to check negative extensions in test. NFC
Everytime an extension is added, this test will need to have the negative
extension appended to multiple CHECK lines where we're overriding the arch.
This is quite time consuming since it needs to be in the right order, so this
replaces the explicit list of negative extensions with a regexp instead.
Commit: a7f9e92d07c809f81a9a8821ca3dc0d172c4afb1
https://github.com/llvm/llvm-project/commit/a7f9e92d07c809f81a9a8821ca3dc0d172c4afb1
Author: stephenpeckham <118857872+stephenpeckham at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/tools/obj2yaml/xcoff2yaml.cpp
Log Message:
-----------
Fix typo (#78587)
Commit: bd2430b4216f4f4f4432bc86cc8d7e1b7a71f56c
https://github.com/llvm/llvm-project/commit/bd2430b4216f4f4f4432bc86cc8d7e1b7a71f56c
Author: Jannik Silvanus <37809848+jasilvanus at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/IR/Metadata.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[IR] Allow type change in ValueAsMetadata::handleRAUW (#76969)
`ValueAsMetadata::handleRAUW` is a mechanism to replace all metadata
referring to one value by a different value.
Relax an assert that used to enforce the old and new value to have the
same type.
This seems to be a sanity plausibility assert only, as the
implementation actually supports mismatching types.
This is motivated by a downstream mechanism where we use poison
ValueAsMetadata values to annotate pointee types of opaque pointer
function arguments.
When replacing one type with a different one to work around DXIL vs LLVM
incompatibilities, we need to update type annotations, and handleRAUW is
more efficient than creating new MD nodes.
Commit: 33287e35f21ea2aef697f3df797fe9dd07cd6cb1
https://github.com/llvm/llvm-project/commit/33287e35f21ea2aef697f3df797fe9dd07cd6cb1
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
M llvm/test/CodeGen/X86/vec_fpext.ll
Log Message:
-----------
[X86] Emit verbose (constant) comments before EVEX compression tag (#78585)
This helps ensure the encoding details are next to the EVEX tag
Noticed while preparing to add more constant commenting as part of #73783 and #71078
Commit: 296a6842d190b8775613a2fcfd6b19847bfec5bd
https://github.com/llvm/llvm-project/commit/296a6842d190b8775613a2fcfd6b19847bfec5bd
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/include/llvm/Support/FormatCommon.h
Log Message:
-----------
[formatv][FmtAlign] Use fill count of type size_t instead of uint32_t (#78459)
FmtAlign::fill() accepts a uint32_t variable while the usages operate on
size_t values. On some platform / compiler combinations, this ends up
being a narrowing conversion. Fix this by changing the function's signature.
This was first seen on MSVC x86.
Co-authored-by: Orest Chura <orest.chura at intel.com>
Commit: fe4d502524be85e39dd5e2726abaca2231fb222b
https://github.com/llvm/llvm-project/commit/fe4d502524be85e39dd5e2726abaca2231fb222b
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/test/HLFIR/simplify-hlfir-intrinsics.fir
Log Message:
-----------
[flang] fix unsafe memory access using mlir::ValueRange (#78435)
When running the `flang/test/HLFIR/simplify-hlfir-intrinsics.fir` test
case on AIX we encounter issues building op as they are not found in the
mlir context:
```
LLVM ERROR: Building op `arith.subi` but it isn't known in this MLIRContext: the dialect may not be loaded or this operation hasn't been added by the dialect. See also https://mlir.llvm.org/getting_started/Faq/#registered-loaded-dependent-whats-up-with-dialects-management
LLVM ERROR: Building op `hlfir.yield_element` but it isn't known in this MLIRContext: the dialect may not be loaded or this operation hasn't been added by the dialect. See also https://mlir.llvm.org/getting_started/Faq/#registered-loaded-dependent-whats-up-with-dialects-management
LLVM ERROR: Building op `hlfir.yield_element` but it isn't known in this MLIRContext: the dialect may not be loaded or this operation hasn't been added by the dialect. See also https://mlir.llvm.org/getting_started/Faq/#registered-loaded-dependent-whats-up-with-dialects-management
```
The issue is caused by the "Merge disjoint stack slots" pass and the
error is not present if the source is built with `-mllvm
--no-stack-coloring`
Thanks to investigation by @stefanp-ibm we found that "the
initializer_list {inputIndices[1], inputIndices[0]} has a lifetime that
only exists for the range of the constructor for ValueRange. Once we get
to stack coloring we merge the stack slot for that element with another
stack slot and then it gets overwritten which corrupts
transposedIndices"
The changes below prevents the corruption of transposedIndices and
passes the test case.
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: 87ac65a99482ba2563b2b4b0856bf6cb0f7f7fda
https://github.com/llvm/llvm-project/commit/87ac65a99482ba2563b2b4b0856bf6cb0f7f7fda
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang] Match the length size in comparison (NFC) (#78302)
The template function call CheckDescriptorEqInt((exitStat.get(), 127) is
deduced to have INT_T equal to std::int32_t instead of std::int64_t, but
the length descriptor points to a 64-byte storage. The comparison does
not work in a big endian.
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: 6d0b718e8c5465966169ec9071d20cdce838ca91
https://github.com/llvm/llvm-project/commit/6d0b718e8c5465966169ec9071d20cdce838ca91
Author: Alan Phipps <a-phipps at ti.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
Log Message:
-----------
[Profile][CoverageMapping] MC/DC Fix passing FileID for DecisionRegion
Fixes oversight in commit 8ecbb0404d740d1ab173554e47cef39cd5e3ef8c in which
FileID was not being set when creating a new MC/DC DecisionRegion.
Commit: 819bd9e39b8c255600b7ec13ac195f726aa9a082
https://github.com/llvm/llvm-project/commit/819bd9e39b8c255600b7ec13ac195f726aa9a082
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeStmtGen.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/test/AST/Interp/records.cpp
Log Message:
-----------
[clang][Interp] IndirectMember initializers (#69900)
We need to look at the chain of declarations to initialize the right
field.
Commit: fb2c6bbf42b09c0d3d31df7cac3f5a6cc2ee929e
https://github.com/llvm/llvm-project/commit/fb2c6bbf42b09c0d3d31df7cac3f5a6cc2ee929e
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/test/CodeGen/X86/branchfolding-landingpad-cfg.mir
Log Message:
-----------
[BranchFolding] Use isSuccessor to confirm fall through (#77923)
When merging blocks, if the previous block has no any branch instruction
and has one successor, the successor may be SEH landing pad and the
block will always raise exception and nerver fall through to next block.
We can not merge them in such case. isSuccessor should be used to
confirm it can fall through to next block.
Commit: 2747193058706ba12156c6380e8769df781d028f
https://github.com/llvm/llvm-project/commit/2747193058706ba12156c6380e8769df781d028f
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/test/Fir/external-mangling.fir
M mlir/include/mlir/Dialect/OpenMP/OpenMPInterfaces.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/attr.mlir
M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
R mlir/test/Target/LLVMIR/omptarget-region-llvm-target-device.mlir
Log Message:
-----------
[Flang][MLIR][OpenMP] Remove the early outlining interface (#78450)
After the removal of the OpenMP early outlining MLIR pass in #67319, the
`EarlyOutliningInterface` stopped doing any useful work. It used to be
necessary to tie the name of the function from which a target region was
outlined to that new function, so it would be used when translating to
LLVM IR in place of the outlined function's name.
This is not necessary anymore, so this patch removes all references to
this interface and uses of the `omp.outline_parent_name` discardable
attribute in tests.
Commit: 0fc5f4b52460c091608837f05a726c7383898229
https://github.com/llvm/llvm-project/commit/0fc5f4b52460c091608837f05a726c7383898229
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] Set nneg flag when forming zext in demanded bits (#72281)
We do the same for the analogous transform in DAGCombine, but this case
was missed in the recent patch which added support for zext nneg.
Sorry for the lack of test coverage. Not sure how to exercise this piece
of logic. It appears to have only minimal impact on LIT tests (only
test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll),
and even then, the changes without it appear uninteresting. Maybe we
should remove this transform instead?
Commit: 22867890e4e6e272ddb9cee78e3eb0a2bca1cc81
https://github.com/llvm/llvm-project/commit/22867890e4e6e272ddb9cee78e3eb0a2bca1cc81
Author: Alan Phipps <a-phipps at ti.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/test/CoverageMapping/mcdc-logical-stmt-ids-all.cpp
Log Message:
-----------
[clang][CoverageMapping] Refactor setting MC/DC True/False Condition IDs (#78202)
Clean-up of the algorithm that assigns MC/DC True/False control-flow
condition IDs when constructing an MC/DC decision region. This patch
creates a common API for setting/getting the condition IDs, making the
binary logical operator visitor functions much cleaner.
This patch also fixes issue
https://github.com/llvm/llvm-project/issues/77873 in which a record's
control flow map can be malformed due to an incorrect calculation of the
True/False condition IDs.
Commit: 05e85e4fc5ac67612245efe56c3423cc9b47bc6d
https://github.com/llvm/llvm-project/commit/05e85e4fc5ac67612245efe56c3423cc9b47bc6d
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/include/mlir/Dialect/Math/Transforms/Passes.td
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Math/Transforms/LegalizeToF32.cpp
A mlir/test/Dialect/Math/legalize-to-f32.mlir
Log Message:
-----------
[mlir][Math] Add pass to legalize math functions to f32-or-higher (#78361)
Since most of the operations in the `math` dialect don't have
low-precision implementations, add the -math-legalize-to-f32 pass that
goes through and brackets low-precision math funcitons (like `math.sin
%0 : f16`) with `arith.extf` and `arith.truncf`. This preserves the
original semantics of the math operation but allows lowering to proceed.
Versions of this lowering are already implicitly present in some passes,
like ConvertGPUToROCDL. However, because those are implicit rewrites,
they hide the floating-point extension and truncation, preventing anyone
from writing passes that operate on those implitic extf/truncf pairs.
Exposing this legalization explicitly is needed to allow lowening 8-bit
floats on AMD GPUs, as the implementation of extf and truncf on that
platform requires the complex logic found in ArithToAMDGPU, which runs
before the GPU to ROCDL lowering.
Commit: aac23b08e330d2b4b017a185d06746738ee924cf
https://github.com/llvm/llvm-project/commit/aac23b08e330d2b4b017a185d06746738ee924cf
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][ROCDL] Stop setting amdgpu-implicitarg-num-bytes (#78498)
Clang stopped doing this late 2021 back in 33315ef3216b, and no other
frontent does this, so stop doing it.
Commit: 110e1717b31e2ab7344457110c2e145ccf23f03e
https://github.com/llvm/llvm-project/commit/110e1717b31e2ab7344457110c2e145ccf23f03e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[X86] X86MCInstLower.cpp - fix spelling mistake
Commit: 12c90bd612fe7eb9e991bbfce8ca0ec43a3caccb
https://github.com/llvm/llvm-project/commit/12c90bd612fe7eb9e991bbfce8ca0ec43a3caccb
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/lib/Object/OffloadBinary.cpp
Log Message:
-----------
[LinkerWrapper] Handle AMDGPU Target-IDs correctly when linking (#78359)
Summary:
The linker wrapper's job is to sort various embedded inputs into a list
of files that participate in a single link job. So far, this has been
completely 1-to-1, that is, each input file participates in exactly one
link job. However, support for AMD's target-id requires that one input
file may participate in multiple link jobs. For example, if given a
`gfx90a` static library and a `gfx90a:xnack+` object file input, we
should link the gfx90a` target into the `gfx90a:xnack+` job. These are
considered separate CPUs that can be mutually linked more or less.
This patch adds the necessary logic to make this happen. It primarily
reworks the logic to copy relevant input files into a separate list. So,
it moves construction of the final list of link jobs into the extraction
phase. We also need to copy the files in the case that it is needed more
than once, as the entire workflow expects ownership of said file.
Commit: 9cd41289989f07d08f14d8a67ccc2d6445cc7d43
https://github.com/llvm/llvm-project/commit/9cd41289989f07d08f14d8a67ccc2d6445cc7d43
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block3d.mlir
Log Message:
-----------
[mlir][sparse] add a 3-d block and fiber test (#78529)
Commit: f20488687e54a7202b0c90a9d3bee540c5e40f9a
https://github.com/llvm/llvm-project/commit/f20488687e54a7202b0c90a9d3bee540c5e40f9a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
A llvm/test/Transforms/CorrelatedValuePropagation/nested-cycle.ll
Log Message:
-----------
[CVP] Add test with nested cycle (NFC)
This is a regression test for a miscompile that would have been
introduced by an upcoming patch.
Commit: f4ede08c61cba631de204398a91aa59bac9d5db9
https://github.com/llvm/llvm-project/commit/f4ede08c61cba631de204398a91aa59bac9d5db9
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/test/Shell/Settings/Inputs/names.cpp
A lldb/test/Shell/Settings/TestFrameFormatName.test
R lldb/test/Shell/Settings/TestFrameFormatNameWithArgs.test
Log Message:
-----------
[lldb][Format] Fix missing inlined function names in frame formatting. (#78494)
This fixes missing inlined function names when formatting frame and the
`Block` in `SymbolContext` is a lexical block (e.g.
`DW_TAG_lexical_block` in Dwarf).
Commit: de03c46b8bb0b280d2de7ec805df1343bb12eeda
https://github.com/llvm/llvm-project/commit/de03c46b8bb0b280d2de7ec805df1343bb12eeda
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libc/include/llvm-libc-types/off_t.h
M libc/src/sys/mman/linux/CMakeLists.txt
Log Message:
-----------
[libc] reverts for 32b arm (#78307)
These were fixed properly by f1f1875c18b8.
- Revert "[libc] temporarily set -Wno-shorten-64-to-32 (#77396)"
- Revert "[libc] make off_t 32b for 32b arm (#77350)"
Commit: 3044d754855c339319b041e579c569d4faf32b62
https://github.com/llvm/llvm-project/commit/3044d754855c339319b041e579c569d4faf32b62
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/docs/math/index.rst
Log Message:
-----------
[libc][arm] add more math.h entrypoints (#77839)
In particular, we have internal customers that would like to use nanf
and
scalbnf.
The differences between various entrypoint files can be checked via:
$ comm -3 <(grep libc\.src path/to/entrypoints.txt | sort) \
<(grep libc\.src path/to/other/entrypoints.txt | sort)
Commit: 8bc7c0a058ff0e6495b8e7e4dd850e646228506b
https://github.com/llvm/llvm-project/commit/8bc7c0a058ff0e6495b8e7e4dd850e646228506b
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-19 (Fri, 19 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
Log Message:
-----------
[X86] Fix failures on EXPENSIVE_CHECKS builds
Error message
```
*** Bad machine code: Illegal virtual register for instruction ***
- function: test__blsi_u32
- basic block: %bb.0 (0x7a61208)
- instruction: %5:gr32 = MOV32r0 implicit-def $eflags
- operand 0: %5:gr32
Expected a GR32_NOREX2 register, but got a GR32 register
```
Reported by RKSimon in #77433
The failure is b/c compiler emits a MOV32r0 with operand GR32 when
fast-isel is enabled.
```
// X86FastISel.cpp
Register SrcReg = fastEmitInst_(X86::MOV32r0, &X86::GR32RegClass)
```
However, before this patch, compiler only allows GR32_NOREX operand
b/c MOV32r0 is a pseudo instruction. In this patch, we relax the
register class of the operand to GR32 b/c MOV32r0 is always expanded
to XOR32rr, which can use EGPR.
The bug was not introduced by #77433 but caught by it.
Commit: d124b0224241f58847f06eb588685dc88bb627a0
https://github.com/llvm/llvm-project/commit/d124b0224241f58847f06eb588685dc88bb627a0
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2024-01-19 (Fri, 19 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/test/MC/Disassembler/X86/apx/bmi2.txt
M llvm/test/MC/X86/apx/bmi2-att.s
M llvm/test/MC/X86/apx/bmi2-intel.s
Log Message:
-----------
[X86][MC] Fix wrong encoding of promoted BMI instructions due to missing NoCD8 (#78386)
Address review comments in #76709
Add `NoCD8` to class `ITy`, and rewrite the promoted instructions with
`ITy` to avoid unexpected incorrect encoding about `NoCD8`.
Commit: 914cfa41385606fe81c3afd296a6ca3ab975a97d
https://github.com/llvm/llvm-project/commit/914cfa41385606fe81c3afd296a6ca3ab975a97d
Author: Fehr Mathieu <mathieu.fehr at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/IRDL/IR/IRDLOps.td
M mlir/include/mlir/Dialect/IRDL/IRDLVerifiers.h
M mlir/lib/Dialect/IRDL/IR/IRDL.cpp
M mlir/lib/Dialect/IRDL/IR/IRDLOps.cpp
M mlir/lib/Dialect/IRDL/IRDLVerifiers.cpp
A mlir/test/Dialect/IRDL/invalid.irdl.mlir
M mlir/test/Dialect/IRDL/testd.irdl.mlir
M mlir/test/Dialect/IRDL/testd.mlir
Log Message:
-----------
[mlir][irdl] Add `irdl.base` op (#76400)
The `irdl.base` op represent an attribute constraint that will check
that the
base of a type or attribute is the expected one (e.g. `IntegerType`) .
Example:
```mlir
irdl.dialect @cmath {
irdl.type @complex {
%0 = irdl.base "!builtin.integer"
irdl.parameters(%0)
}
irdl.type @complex_wrapper {
%0 = irdl.base @complex
irdl.parameters(%0)
}
}
```
The above program defines a `cmath.complex` type that expects a single
parameter, which is a type with base name `builtin.integer`, which is
the
name of an `IntegerType` type.
It also defines a `cmath.complex_wrapper` type that expects a single
parameter, which is a type of base type `cmath.complex`.
Commit: 2b804f875579995b1588f1a079e265929163d0e4
https://github.com/llvm/llvm-project/commit/2b804f875579995b1588f1a079e265929163d0e4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[LinkerWrapper][Obvious] Fix move on temporary object
Summary:
This causes warnings because it is already a temporary and does not need
to be moved.
Commit: b75b9d82f576fecbdec98f7cd076be7a72f70dbf
https://github.com/llvm/llvm-project/commit/b75b9d82f576fecbdec98f7cd076be7a72f70dbf
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Log Message:
-----------
[lldb] Correct function names in ProcessGDBRemote::ParseFlagsFields log messages
This has to be specified in the string because otherwise we'd get the
lambda's name, and I incorrectly used the name of the calling function here.
Commit: 774b9577866239f577180fdd8b78159f0a5794a5
https://github.com/llvm/llvm-project/commit/774b9577866239f577180fdd8b78159f0a5794a5
Author: Vyacheslav Levytskyy <89994100+VyacheslavLevytskyy at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
Log Message:
-----------
[SPIR-V] improve performance of Module Analysis stage in the part of processing "other instructions" (#76047)
The goal of this PR is to fix an issue when Module Analysis stage is not
able to complete processing of a really big LLVM source:
https://github.com/llvm/llvm-project/issues/76048.
There is an example of a bulky LLVM source:
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/blob/main/test/SpecConstants/long-spec-const-composite.ll
Processing of this file with
`llc -mtriple=spirv64-unknown-unknown -O0 long-spec-const-composite.ll
-o long-spec-const-composite.spvt`
to produce SPIR-V output using LLVM SPIR-V backend takes too long, and
I've never been able to see it actually completes. After the patch from
this PR applied elapsed time for me is ~30 sec.
The fix changes underlying data structure to be `std::set` to trace
instructions with identical operands instead of the existing approach of
the `findSameInstrInMS()` function.
Commit: cb2f340850db007aebf5012858697ba5afc1ce4e
https://github.com/llvm/llvm-project/commit/cb2f340850db007aebf5012858697ba5afc1ce4e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[CUDA] Disable registering surfaces and textures with the new driver
Summary:
These runtime calls don't seem to be supported anymore, disable them for
now.
Commit: b06bc7c6a00c4e8acac4fa76e402c6a7e2035090
https://github.com/llvm/llvm-project/commit/b06bc7c6a00c4e8acac4fa76e402c6a7e2035090
Author: Valentin Clement (ใใฌใณใฟใคใณ ใฏใฌใกใณ) <clementval at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-routine.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/ops.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
Log Message:
-----------
[mlir][flang][openacc] Device type support on acc routine op (#78375)
This patch add support for device_type on the acc.routine operation.
device_type can be specified on seq, worker, vector, gang and bind
information.
The support is following the same design than the one for compute
operations, data operation and the loop operation.
Commit: ab244b64dfa6a35458693d4dea6223ff3fe7f7a9
https://github.com/llvm/llvm-project/commit/ab244b64dfa6a35458693d4dea6223ff3fe7f7a9
Author: Lang Hames <lhames at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
Log Message:
-----------
[ORC] Specialize MachOBuilder support for the LC_ID_DYLIB command.
Provides a natural API for adding LC_ID_DYLIB commands, including the arbitrary
install name.
Commit: b08aca7a4fb9520db116e1cc9620f9eb7ce57764
https://github.com/llvm/llvm-project/commit/b08aca7a4fb9520db116e1cc9620f9eb7ce57764
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC][MachO] Support common load commands in the platform's mach-o header builder
Add a HeaderOptions struct that can be used to configure commonly-used
load commands LC_ID_DYLIB, LC_LOAD_DYLIB, and LC_RPATH when setupDylib
creates a mach-o header.
Commit: 15c1c85470a17283bd86fe68a702c74599bdcb5c
https://github.com/llvm/llvm-project/commit/15c1c85470a17283bd86fe68a702c74599bdcb5c
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2024-01-19 (Fri, 19 Jan 2024)
Changed paths:
M llvm/include/llvm/ADT/Hashing.h
Log Message:
-----------
[LLVM][ADT] Convert llvm::hash_code to unsigned explicitly in DenseMapInfo (#77743)
The getHashValue() signature returns a value of type 'unsigned' while
the hash_code could only be implicitly converted to 'size_t'. Depending
on the C++ implementation, this may or may not be a narrowing
conversion.
On some platform/compiler combination, this becomes a warning. To avoid
the warning (and better highlight the narrowing), do an explicit
conversion instead.
Co-authored-by: Orest Chura <orest.chura at intel.com>
Commit: 964565f42eb8f06dc8610b44d56b432a8c2cb50b
https://github.com/llvm/llvm-project/commit/964565f42eb8f06dc8610b44d56b432a8c2cb50b
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
A llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll
M llvm/test/Analysis/CostModel/SystemZ/int-arith.ll
M llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll
M llvm/test/Analysis/CostModel/SystemZ/load_store.ll
A llvm/test/Analysis/CostModel/SystemZ/logic-i128.ll
M llvm/test/Analysis/CostModel/SystemZ/logical.ll
Log Message:
-----------
[SystemZ] i128 cost model (#78528)
Update SystemZTTI to reflect the recent change of handling i128 as a
legal type in vector registers.
Commit: 30da0f5a359ab4a684c5fdf0f4dbed20bae10f99
https://github.com/llvm/llvm-project/commit/30da0f5a359ab4a684c5fdf0f4dbed20bae10f99
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr1807.cpp
Log Message:
-----------
[clang] Pass `-n` to llvm-cxxfilt in codegen tests
This is a follow-up to f4fbbebb5edcaad459ce154c011f71fc38fe4052, which addresses macOS test failure.
Commit: 7f0515323670459b8376b866bc73a448f0a5aa6e
https://github.com/llvm/llvm-project/commit/7f0515323670459b8376b866bc73a448f0a5aa6e
Author: Dominik Wรณjt <dominik.wojt at arm.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libcxx/test/libcxx/selftest/modules/std-and-std.compat-module.sh.cpp
M libcxx/test/libcxx/selftest/modules/std.compat-module.sh.cpp
M libcxx/test/std/modules/std.compat.pass.cpp
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libc++] Un-xfail module tests in picolibc tests (#78580)
Some of the module tests now pass after picolibc update.
https://github.com/llvm/llvm-project/pull/77908
The remaining tests fail and are now set to xfail on picolibc
specifically.
Commit: b689e1678c429b724dd898edb9e24cbb9c437667
https://github.com/llvm/llvm-project/commit/b689e1678c429b724dd898edb9e24cbb9c437667
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libcxx/include/__config
M libcxx/include/__ranges/chunk_by_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/repeat_view.h
M libcxx/include/__ranges/single_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/transform_view.h
Log Message:
-----------
[libc++] Renames ABI tag. (#78342)
The tag name was long for an ABI tag. The name was misleading too, the
tag is first introduced in LLVM 18 in 2024 and not in 2023.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: c21f48e5ad1799db41cc9f16541b8365e3b75e63
https://github.com/llvm/llvm-project/commit/c21f48e5ad1799db41cc9f16541b8365e3b75e63
Author: Natalie Chouinard <sudonatalie at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/Driver/hlsl-lang-targets-spirv.hlsl
M clang/test/Driver/hlsl-lang-targets.hlsl
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[HLSL][SPIR-V] Add Vulkan to target triple (#76749)
Add support for specifying the logical SPIR-V target environment in the
triple as Vulkan. When compiling HLSL, this replaces the DirectX Shader
Model with a Vulkan environment instead.
Currently, the only supported combinations of SPIR-V version and Vulkan
environment are:
- Vulkan 1.2 and SPIR-V 1.5
- Vulkan 1.3 and SPIR-V 1.6
Fixes #70051
Commit: d950157f7b290e35ce25647e255df9dccbcead2b
https://github.com/llvm/llvm-project/commit/d950157f7b290e35ce25647e255df9dccbcead2b
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M lldb/unittests/Core/DumpDataExtractorTest.cpp
Log Message:
-----------
[lldb] Silence warning when building with latest MSVC
Fixes:
```
C:\git\llvm-project\lldb\unittests\Core\DumpDataExtractorTest.cpp(140): warning C4305: 'argument': truncation from 'double' to 'const std::complex<float>::_Ty'
```
Commit: bafdaa171a2806ceff628ed7b64ace2b92c05578
https://github.com/llvm/llvm-project/commit/bafdaa171a2806ceff628ed7b64ace2b92c05578
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
Log Message:
-----------
[lldb] Silence warning with latest MSVC on Windows
Fixes:
```
[3465/3822] Building CXX object tools\lldb\source\Plugins\SymbolFile\CTF\CMakeFiles\lldbPluginSymbolFileCTF.dir\SymbolFileCTF.cpp.obj
C:\git\llvm-project\lldb\source\Plugins\SymbolFile\CTF\SymbolFileCTF.cpp(606) : warning C4715: 'lldb_private::SymbolFileCTF::CreateType': not all control paths return a value
```
Commit: ded8aa61849c88492811186e0f4a7ee56a5d78ea
https://github.com/llvm/llvm-project/commit/ded8aa61849c88492811186e0f4a7ee56a5d78ea
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
Log Message:
-----------
[lldb] Silence warning with latest MSVC
Fixes several of these:
```
[3370/3822] Building CXX object tools\lldb\source\Plugins\Process\U...lldbPluginProcessUtility.dir\NativeRegisterContextDBReg_x86.cpp.ob
C:\git\llvm-project\lldb\source\Plugins\Process\Utility\NativeRegisterContextDBReg_x86.h(23): warning C4589: Constructor of abstract class 'lldb_private::NativeRegisterContextDBReg_x86' ignores initializer for virtual base class 'lldb_private::NativeRegisterContextRegisterInfo'
C:\git\llvm-project\lldb\source\Plugins\Process\Utility\NativeRegisterContextDBReg_x86.h(23): note: virtual base classes are only initialized by the most-derived type
```
Commit: cb67dc19256565d15f6bed0e9808f4026ca04995
https://github.com/llvm/llvm-project/commit/cb67dc19256565d15f6bed0e9808f4026ca04995
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M lldb/unittests/DataFormatter/StringPrinterTests.cpp
Log Message:
-----------
[lldb] Silence narrowing conversion warning with MSVC
Fixes:
```
[13/270] Building CXX object tools\lldb\unittests\Core\CMakeFiles\LLDBCoreTests.dir\DumpDataExtractorTest.cpp.obj
C:\git\llvm-project\lldb\unittests\Core\DumpDataExtractorTest.cpp(140): warning C4305: 'argument': truncation from 'double' to 'const std::complex<float>::_Ty'
```
Commit: 0c195e5096c4ded2676c60c89cd93ef619c8537b
https://github.com/llvm/llvm-project/commit/0c195e5096c4ded2676c60c89cd93ef619c8537b
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
Log Message:
-----------
[NVPTX][NFC] Remove unused parameter of getArgumentAlignment (#78604)
Commit: 2663d2cb9c9361f0b234c40a0f50c7ba0748eb26
https://github.com/llvm/llvm-project/commit/2663d2cb9c9361f0b234c40a0f50c7ba0748eb26
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-select.ll
Log Message:
-----------
[RISCV] Adjust select shuffle cost to reflect mask creation cost (#77963)
This is inspired by
https://github.com/llvm/llvm-project/pull/77342#pullrequestreview-1814673242,
and is split off of same with some differences in style.
A select is a vmerge.vv with the additional cost of materializing the
bitmask vector in a vreg. All masks fit within a single vector register
(e8 + m8 is the worst case), and thus our worst case cost should be
roughly 3 (2 scalar to produce the address, one vector load op). Given
most shuffles are small, and the mask will be instead produced by
LUI/ADDI + vmv.s.x or ADDI + vmv.s.x, using 2 as the default seems quite
reasonable. At worst, we're not going to be off by much.
The prior lowering scaled the cost of the bitmask with LMUL, which I
don't understand. At m1 it did use the same base cost of 2. (@lukel97
You wrote the original code here, anything I'm missing here?)
Commit: 45d1cca3394fa4b14561dd6c36104ff8e20e51db
https://github.com/llvm/llvm-project/commit/45d1cca3394fa4b14561dd6c36104ff8e20e51db
Author: Dave Lee <davelee.com at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/utils/lldbDataFormatters.py
Log Message:
-----------
[llvm][utils] Fix SmallString summary provider (#78527)
Fixes `SmallString` summary provider, which was incorrectly producing the empty string.
Initially I thought the strings I was debugging were empty for unknown reasons, but
that was not the case.
Commit: 5de1d007ddc5b13a643ebedce42c5c164cd3bec2
https://github.com/llvm/llvm-project/commit/5de1d007ddc5b13a643ebedce42c5c164cd3bec2
Author: kyulee-com <kyulee at meta.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M lld/MachO/Arch/ARM64Common.h
A lld/test/MachO/arm64-objc-stubs-fix.s
Log Message:
-----------
[lld-macho] Fix for objc_msgSend stubs (#78557)
This commit corrects the address computation for objc_msgSend stubs.
Previously, the address computation was incidentally correct due to
objc_msgSend often being the first entry in the got section, resulting
in a 0 index. This commit ensures accurate address computation
regardless of the objc_msgSend stub's position in the got section.
Commit: 2c9f04c98a1922d711fd1a88563506ee75c771bf
https://github.com/llvm/llvm-project/commit/2c9f04c98a1922d711fd1a88563506ee75c771bf
Author: Alan Zhao <alanzhao1 at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGenCXX/new-array-init.cpp
M clang/test/SemaCXX/new-delete.cpp
Log Message:
-----------
[clang] Fix parenthesized list initialization of arrays not working with `new` (#76976)
This bug is caused by parenthesized list initialization not being
implemented in `CodeGenFunction::EmitNewArrayInitializer(...)`.
Parenthesized list initialization of `struct`s with `operator new`
already works in Clang and is not affected by this bug.
Additionally, fix the test new-delete.cpp as it incorrectly assumes that
using parentheses with operator new to initialize arrays is illegal for
C++ versions >= C++17.
Fixes #68198
Commit: 0ac992e0ada60c670498ac3276150e1632ab0039
https://github.com/llvm/llvm-project/commit/0ac992e0ada60c670498ac3276150e1632ab0039
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_atomic.h
M openmp/runtime/src/kmp_barrier.cpp
M openmp/runtime/src/kmp_dispatch.h
M openmp/runtime/src/kmp_io.cpp
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_wait_release.h
M openmp/runtime/src/z_Windows_NT_util.cpp
Log Message:
-----------
[openmp] Revert 64874e5ab5fd102344d43ac9465537a44130bf19 since it was committed by mistake and the PR (https://github.com/llvm/llvm-project/pull/77853) wasn't approved yet.
Commit: 1522333c3c7e458b2e3cb6d175a56741e23f4007
https://github.com/llvm/llvm-project/commit/1522333c3c7e458b2e3cb6d175a56741e23f4007
Author: Ricky Zhou <ricky at rzhou.org>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/test/ThinLTO/X86/debuginfo-compositetype-import.ll
Log Message:
-----------
[ThinLTO][DebugInfo] Emit full type definitions when importing anonymous types. (#78461)
This fixes some cases of missing debuginfo caused by an interaction
between:
https://github.com/llvm/llvm-project/commit/f0d66559ea345db4b2116cae044aaf3399d7e829,
which drops the identifier from a DICompositeType in the module
containing its
vtable.
and
https://github.com/llvm/llvm-project/commit/a61f5e379675732666744bcba25efbc9922e016a,
which causes ThinLTO to import composite types as declarations when they
have
an identifier.
If a virtual class's DICompositeType has no identifier due to the first
change,
and contains a nested anonymous type which does have an identifier, then
the
second change can cause ThinLTO to output the classes's DICompositeType
as a
type definition that links to a non-defining declaration for the nested
type.
Since the nested anonyous type does not have a name, debuggers are
unable to
find the definition for the declaration.
Repro case:
```
cat > a.h <<EOF
class A {
public:
A();
virtual ~A();
private:
union {
int val;
};
};
EOF
cat > a.cc <<EOF
#include "a.h"
A::A() { asm(""); }
A::~A() {}
EOF
cat > main.cc <<EOF
#include "a.h"
int main(int argc, char **argv) {
A a;
return 0;
}
EOF
clang++ -O2 -g -flto=thin -mllvm -force-import-all main.cc a.cc
gdb ./a.out -batch -ex 'pt /rmt A'
```
The gdb command outputs:
```
type = class A {
private:
union {
<incomplete type>
};
}
```
and dwarfdump -i a.out shows a DW_TAG_class_type for A with an
incomplete union
type (note that there is also a duplicate entry with the full union type
that
comes after).
```
< 1><0x0000001e> DW_TAG_class_type
DW_AT_containing_type <0x0000001e>
DW_AT_calling_convention DW_CC_pass_by_reference
DW_AT_name (indexed string: 0x00000007)A
DW_AT_byte_size 0x00000010
DW_AT_decl_file 0x00000001 /path/to/./a.h
DW_AT_decl_line 0x00000001
...
< 2><0x0000002f> DW_TAG_member
DW_AT_type <0x00000037>
DW_AT_decl_file 0x00000001 /path/to/./a.h
DW_AT_decl_line 0x00000007
DW_AT_data_member_location 8
< 2><0x00000037> DW_TAG_union_type
DW_AT_export_symbols yes(1)
DW_AT_calling_convention DW_CC_pass_by_value
DW_AT_declaration yes(1)
```
This change works around this by making ThinLTO always import full
definitions
for anonymous types.
Commit: fa6c3df6add2559ee6f31762e7667cedc6e31a0b
https://github.com/llvm/llvm-project/commit/fa6c3df6add2559ee6f31762e7667cedc6e31a0b
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/include/flang/Parser/characters.h
Log Message:
-----------
[flang] Don't use \uXXXX encodings unless \-escapes are enabled (#78326)
Don't put \uXXXX escapes into the cooked character stream while
prescanning; it should always be UTF-8.
Commit: a58ad3e2a33eafc821714f9d27b74279fb4d607c
https://github.com/llvm/llvm-project/commit/a58ad3e2a33eafc821714f9d27b74279fb4d607c
Author: Haopeng Liu <153236845+haopliu at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGenCXX/auto-var-init-max-size.cpp
M clang/test/Driver/clang_f_opts.c
Log Message:
-----------
[clang] Add size filter for stack auto init (#74777)
Add a clang flag, "-ftrivial-auto-var-init-max-size=" so that clang
skips auto-init a variable if the auto-init memset size exceeds the flag
setting (in bytes). Note that this skipping doesn't apply to
runtime-sized variables like VLA.
Considerations: "__attribute__((uninitialized))" can be used to manually
opt variables out. However, there are thousands of large variables
(e.g., >=1KB, most of them are arrays and used as buffers) in big
codebase. Manually opting them out one by one is not efficient.
Commit: cfc9f3695fafddfa6f537d6dac702afab00c3cce
https://github.com/llvm/llvm-project/commit/cfc9f3695fafddfa6f537d6dac702afab00c3cce
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M lldb/unittests/DataFormatter/StringPrinterTests.cpp
Log Message:
-----------
Revert "[lldb] Silence narrowing conversion warning with MSVC"
This reverts commit cb67dc19256565d15f6bed0e9808f4026ca04995.
Commit: 911289a62be068e56a934e069e8e03112a804542
https://github.com/llvm/llvm-project/commit/911289a62be068e56a934e069e8e03112a804542
Author: Usama Hameed <u_hameed at apple.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/odr-lto.cpp
M compiler-rt/test/asan/lit.cfg.py
Log Message:
-----------
[CompilerRT][ASan] Add new substitutions for tests while using lto to (#78523)
explicitly pass libLTO path. This fixes a failure in swift-ci where
libLTO was being picked from the system instead which was an older
version and caused issues.
rdar://117474861
Commit: a7588bb9bab43420f1c2642c80489f74af88f855
https://github.com/llvm/llvm-project/commit/a7588bb9bab43420f1c2642c80489f74af88f855
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr1807.cpp
Log Message:
-----------
[clang] Pass `-n` to llvm-cxxfilt in even more codegen tests
This is another follow-up to f4fbbebb5edcaad459ce154c011f71fc38fe4052 and 30da0f5a359ab4a684c5fdf0f4dbed20bae10f99
Commit: 99cae9a44fca4cfbd6ee82f196051cbdf6571fa1
https://github.com/llvm/llvm-project/commit/99cae9a44fca4cfbd6ee82f196051cbdf6571fa1
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M flang/lib/Frontend/FrontendActions.cpp
M flang/unittests/Frontend/CMakeLists.txt
A flang/unittests/Frontend/CodeGenActionTest.cpp
Log Message:
-----------
[flang] Fix seg fault `CodeGenAction::executeAction()` (#78269)
Commit: c82b7fddfcbd6adfae4faf324a453fb8652efa91
https://github.com/llvm/llvm-project/commit/c82b7fddfcbd6adfae4faf324a453fb8652efa91
Author: Pete Lawrence <plawrence at apple.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M lldb/source/Expression/DiagnosticManager.cpp
M lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
Log Message:
-----------
[lldb] Remove redundant severity substring within a diagnostic message. (#76111)
For example, the following message has the severity string "error: "
twice.
> "error: <EXPR>:3:1: error: cannot find 'bogus' in scope
This method already appends the severity string in the beginning, but
with this fix, it also removes a secondary instance, if applicable.
Note that this change only removes the *first* redundant substring. I
considered putting the removal logic in a loop, but I decided that if
something is generating more than one redundant severity substring, then
that's a problem the message's source should probably fix.
rdar://114203423
Commit: ecd47811b755d13357085bcd7519a66d6c4d8e5c
https://github.com/llvm/llvm-project/commit/ecd47811b755d13357085bcd7519a66d6c4d8e5c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
Log Message:
-----------
[sanitizer] Skip /include/c++/ from summary (#78534)
std:: usually is not a cause of the bug.
We now display
```
SUMMARY: AddressSanitizer: allocation-size-too-big path/to/allocator_returns_null.cpp:92:7 in main
```
instead of
```
SUMMARY: AddressSanitizer: allocation-size-too-big /usr/lib/../include/c++/13/bits/new_allocator.h:147:27 in std::__new_allocator<char>::allocate(unsigned long, void const*)
```
`/include/c++/` matches both libc++ and libstdc++ include paths.
Commit: a9ca820529c69674e01d2e90cadc69e361ecf339
https://github.com/llvm/llvm-project/commit/a9ca820529c69674e01d2e90cadc69e361ecf339
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M libc/src/__support/CPP/atomic.h
M libc/src/__support/RPC/rpc.h
Log Message:
-----------
[libc] Use clang's scoped atomics if available from the compiler (#74769)
Summary:
A recent patch in https://github.com/llvm/llvm-project/pull/72280
provided `clang` the ability to easily use scoped atomics. These are a
special modifier on atomics that some backends support. They are
intended for providing more fine-grained control over the affected
memory of an atomic action. The default is a "system" scope, e.g.
coherence with the GPU and CPU memory on a heterogeneous system. If we
use "device" scope, that implies that the memory is only ordered with
respect to the current GPU.
These builtins are direct replacements for the GCC atomic builitins in
cases where the backend doesn't do anything with the information, so
these should be a drop-in. This introduces some noise, but hopefully it
isn't too contentious.
Commit: 96542c018f75b54b35aa3e08f184a4909f8c0c04
https://github.com/llvm/llvm-project/commit/96542c018f75b54b35aa3e08f184a4909f8c0c04
Author: quic-akaryaki <123192073+quic-akaryaki at users.noreply.github.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
A llvm/test/MC/Hexagon/hvx-nv-pair-reverse.s
Log Message:
-----------
[Hexagon] Flip subreg bit for reverse pairs hvx .new (#75873)
In .new instructions, the upper vector of a reverse pair (e.g. V4 in
V4:5) should be referenced with an odd sss value.
Commit: 160a750e63256e58fc171f1b6cccf8b61bb05f42
https://github.com/llvm/llvm-project/commit/160a750e63256e58fc171f1b6cccf8b61bb05f42
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl][test] Suppress memory lease after #76218
`new` was introduced in this patch, but I don't see `delete` to release
the memory.
Commit: 741b8363300f0799f7aeabb83910ff8b98f9a919
https://github.com/llvm/llvm-project/commit/741b8363300f0799f7aeabb83910ff8b98f9a919
Author: Shoaib Meenai <smeenai at fb.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetObjectFile.cpp
M llvm/lib/Target/X86/X86TargetObjectFile.h
A llvm/test/MC/ELF/rtti-proxy-i686.ll
Log Message:
-----------
[X86] Fix RTTI proxy emission for 32-bit (#78622)
32-bit x86 doesn't have an appropriate relocation type we can use to
elide the RTTI proxies, so we need to emit them. This would previously
cause crashes when using the relative vtable ABI for 32-bit x86.
Commit: 83365152a4b07db245d0741d0f5165c7fb779266
https://github.com/llvm/llvm-project/commit/83365152a4b07db245d0741d0f5165c7fb779266
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
Log Message:
-----------
[AArch64] Add tests for operations on vectors with 3 elements.
Commit: 8f1d94aaea5c18b83cd3b0df3be3a48ef1d3833d
https://github.com/llvm/llvm-project/commit/8f1d94aaea5c18b83cd3b0df3be3a48ef1d3833d
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M bolt/docs/BAT.md
M bolt/include/bolt/Profile/BoltAddressTranslation.h
M bolt/lib/Profile/BoltAddressTranslation.cpp
Log Message:
-----------
[BOLT] Use continuous output addresses in delta encoding in BAT
Make output function addresses be delta-encoded wrt last offset in the
previous function. This reduces the deltas in function start addresses.
Test Plan:
Reduces BAT section size to:
- large binary: 12218860 bytes (0.32x original),
- medium binary: 1606580 bytes (0.27x original),
- small binary: 404 bytes (0.28x original),
Reviewers: rafaelauler
Reviewed By: rafaelauler
Pull Request: https://github.com/llvm/llvm-project/pull/76904
Commit: 6fb9fb098cdf5cd513c043737841312428cb3739
https://github.com/llvm/llvm-project/commit/6fb9fb098cdf5cd513c043737841312428cb3739
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-18 (Thu, 18 Jan 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
M .github/CODEOWNERS
A .github/dependabot.yml
M .github/workflows/docs.yml
M .github/workflows/issue-subscriber.yml
M .github/workflows/libclang-python-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/llvm-project-tests.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/release-binaries.yml
A .github/workflows/release-documentation.yml
A .github/workflows/release-doxygen.yml
A .github/workflows/release-lit.yml
M .github/workflows/release-tasks.yml
M .github/workflows/set-release-binary-outputs.sh
M README.md
M bolt/lib/Passes/CacheMetrics.cpp
M bolt/lib/Rewrite/CMakeLists.txt
M bolt/tools/bat-dump/bat-dump.cpp
M bolt/tools/driver/llvm-bolt.cpp
M bolt/tools/heatmap/heatmap.cpp
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-tidy/GlobList.cpp
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ImplicitWideningOfMultiplicationResultCheck.cpp
M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.cpp
M clang-tools-extra/clang-tidy/misc/StaticAssertCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clang-tidy/modernize/UseEqualsDeleteCheck.cpp
M clang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.cpp
M clang-tools-extra/clang-tidy/performance/NoexceptSwapCheck.cpp
A clang-tools-extra/clang-tidy/readability/AvoidNestedConditionalOperatorCheck.cpp
A clang-tools-extra/clang-tidy/readability/AvoidNestedConditionalOperatorCheck.h
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ContainerSizeEmptyCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
M clang-tools-extra/clang-tidy/readability/RedundantMemberInitCheck.cpp
M clang-tools-extra/clang-tidy/readability/SimplifyBooleanExprCheck.cpp
M clang-tools-extra/clang-tidy/readability/SimplifyBooleanExprCheck.h
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clangd/CompileCommands.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/unittests/CompileCommandsTests.cpp
M clang-tools-extra/clangd/unittests/DumpASTTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/exception-escape.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unconventional-assign-operator.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/avoid-nested-conditional-operator.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
M clang-tools-extra/modularize/ModularizeUtilities.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-array-subscript-expression.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-int.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/implicit-widening-of-multiplication-result-pointer-offset.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/static-assert.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/for-range-copy.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/noexcept-swap.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/avoid-nested-conditional-operator.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/container-size-empty.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion-allow-in-conditions.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion-cxx98.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-member-init.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/simplify-boolean-expr-macros.cpp
M clang/.clang-tidy
M clang/bindings/python/README.txt
M clang/bindings/python/clang/cindex.py
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/Fuchsia.cmake
M clang/cmake/caches/Release.cmake
A clang/docs/BoundsSafety.rst
A clang/docs/BoundsSafetyImplPlans.rst
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/CommandGuide/clang.rst
M clang/docs/LibASTMatchersReference.html
M clang/docs/LibASTMatchersTutorial.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/docs/UsersManual.rst
M clang/docs/index.rst
A clang/include/clang/AST/APNumericStorage.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/Type.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Analysis/FlowSensitive/ControlFlowContext.h
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/include/clang/Analysis/FlowSensitive/Formula.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/AttributeCommonInfo.h
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/DiagnosticSerializationKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/TokenKinds.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/riscv_vector.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Lex/Lexer.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/lib/AST/Interp/ByteCodeStmtGen.cpp
M clang/lib/AST/Interp/IntegralAP.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/ODRDiagsEmitter.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/AST/VTableBuilder.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/FlowSensitive/ControlFlowContext.cpp
M clang/lib/Analysis/FlowSensitive/DataflowAnalysisContext.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/FlowSensitive/SimplifyConstraints.cpp
M clang/lib/Analysis/FlowSensitive/Value.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Warnings.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.h
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Hurd.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/arm_acle.h
M clang/lib/Headers/ia32intrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Headers/llvm_libc_wrappers/string.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/UnicodeCharSets.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseObjc.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCVVectorLookup.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckSecuritySyntaxOnly.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VirtualCallChecker.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/Tooling/Syntax/Tokens.cpp
M clang/test/AST/Interp/arrays.cpp
M clang/test/AST/Interp/complex.cpp
A clang/test/AST/Interp/cxx11.cpp
M clang/test/AST/Interp/cxx23.cpp
A clang/test/AST/Interp/cxx98.cpp
M clang/test/AST/Interp/intap.cpp
M clang/test/AST/Interp/literals.cpp
M clang/test/AST/Interp/records.cpp
M clang/test/AST/ast-dump-invalid-initialized.cpp
M clang/test/AST/ast-dump-sme-attributes.cpp
M clang/test/Analysis/Inputs/system-header-simulator-for-simple-stream.h
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/bsd-string.c
M clang/test/Analysis/std-c-library-functions-POSIX.c
M clang/test/Analysis/stream-errno.c
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream.c
M clang/test/Analysis/string.c
M clang/test/CXX/dcl.decl/dcl.decl.general/p4-20.cpp
M clang/test/CXX/drs/dr0xx.cpp
M clang/test/CXX/drs/dr13xx.cpp
M clang/test/CXX/drs/dr15xx.cpp
M clang/test/CXX/drs/dr16xx.cpp
A clang/test/CXX/drs/dr1807.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/test/CXX/drs/dr1xx.cpp
M clang/test/CXX/drs/dr20xx.cpp
A clang/test/CXX/drs/dr2335.cpp
M clang/test/CXX/drs/dr23xx.cpp
M clang/test/CXX/drs/dr25xx.cpp
M clang/test/CXX/drs/dr26xx.cpp
M clang/test/CXX/drs/dr2xx.cpp
M clang/test/CXX/drs/dr3xx.cpp
M clang/test/CXX/drs/dr4xx.cpp
M clang/test/CXX/drs/dr6xx.cpp
M clang/test/CXX/over/over.load/p2-0x.cpp
M clang/test/CXX/over/over.match/over.match.funcs/over.match.oper/p3-2a.cpp
M clang/test/CXX/temp/temp.res/temp.local/p6.cpp
M clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync.c
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/RISCV/riscv32-abi.c
A clang/test/CodeGen/RISCV/riscv32-ilp32e-error.c
M clang/test/CodeGen/RISCV/riscv32-vararg.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGen/RISCV/riscv64-vararg.c
M clang/test/CodeGen/X86/avx512-kconstraints-att_inline_asm.c
A clang/test/CodeGen/X86/inline-asm-constraints.c
R clang/test/CodeGen/X86/x86-inline-asm-v-constraint.c
M clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_bmop.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_cvt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fp_dots.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_int_dots.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti2_lane_zt_x4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x2.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_luti4_lane_zt_x4.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mop.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_read.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_sub.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vdot.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_write.c
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_zero_zt.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c
M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel_svcount.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_undef_bool.c
M clang/test/CodeGen/aarch64-targetattr.c
M clang/test/CodeGen/debug-info-codeview-unnamed.c
M clang/test/CodeGen/debug-info-unused-types.c
M clang/test/CodeGen/debug-info-unused-types.cpp
A clang/test/CodeGen/debug-names-compound-type-units.ll
M clang/test/CodeGen/large-data-threshold.c
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGen/target-builtin-noerror.c
A clang/test/CodeGen/thinlto-debug-names-tu-reuse.ll
M clang/test/CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp
A clang/test/CodeGenCXX/auto-var-init-max-size.cpp
M clang/test/CodeGenCXX/debug-info-access.cpp
M clang/test/CodeGenCXX/debug-info-anon-union-vars.cpp
M clang/test/CodeGenCXX/debug-info-codeview-unnamed.cpp
M clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp
M clang/test/CodeGenCXX/debug-lambda-this.cpp
M clang/test/CodeGenCXX/module-initializer-guard-elision.cpp
M clang/test/CodeGenCXX/module-intializer.cpp
A clang/test/CodeGenCXX/ms-property-new.cpp
M clang/test/CodeGenCXX/new-array-init.cpp
M clang/test/CodeGenCXX/partitions.cpp
M clang/test/CodeGenCXX/personality.cpp
A clang/test/CodeGenCXX/placement-new-ms-__noop.cpp
M clang/test/CodeGenObjC/dllstorage.m
M clang/test/CodeGenObjC/encode-test-6.m
A clang/test/CodeGenObjCXX/property-placement-new.mm
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11-param-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx11-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w32-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-gfx12-w64-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w32.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-tr-w64.cl
A clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M clang/test/CoverageMapping/mcdc-logical-stmt-ids-all.cpp
A clang/test/Driver/Inputs/basic_android_tree/sysroot/usr/lib/crt_pad_segment.o
A clang/test/Driver/Inputs/basic_cross_hurd_tree/usr/lib/gcc/x86_64-gnu/10/crtbegin.o
A clang/test/Driver/Inputs/basic_cross_hurd_tree/usr/x86_64-gnu/bin/as
A clang/test/Driver/Inputs/basic_cross_hurd_tree/usr/x86_64-gnu/bin/ld
A clang/test/Driver/Inputs/basic_cross_hurd_tree/usr/x86_64-gnu/lib/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/lib/x86_64-gnu/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/lib64/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/usr/include/x86_64-gnu/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/usr/include/x86_64-gnu/c++/10/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib/gcc/x86_64-gnu/10/crtbegin.o
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib/gcc/x86_64-gnu/10/crtbeginS.o
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib/gcc/x86_64-gnu/10/crtbeginT.o
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib/x86_64-gnu/.keep
A clang/test/Driver/Inputs/basic_hurd_tree/usr/lib64/.keep
M clang/test/Driver/aarch64-bf16.c
M clang/test/Driver/aarch64-cortex-a510.c
M clang/test/Driver/aarch64-cortex-a710.c
M clang/test/Driver/aarch64-cortex-x2.c
M clang/test/Driver/aarch64-d128.c
M clang/test/Driver/aarch64-fp16.c
M clang/test/Driver/aarch64-implied-sme-features.c
M clang/test/Driver/aarch64-implied-sve-features.c
M clang/test/Driver/aarch64-ite.c
M clang/test/Driver/aarch64-lrcpc3.c
M clang/test/Driver/aarch64-ls64.c
M clang/test/Driver/aarch64-lse128.c
M clang/test/Driver/aarch64-march.c
M clang/test/Driver/aarch64-mgeneral_regs_only.c
M clang/test/Driver/aarch64-mte.c
M clang/test/Driver/aarch64-perfmon.c
M clang/test/Driver/aarch64-predres.c
M clang/test/Driver/aarch64-rand.c
M clang/test/Driver/aarch64-ras.c
M clang/test/Driver/aarch64-rdm.c
M clang/test/Driver/aarch64-ssbs.c
M clang/test/Driver/aarch64-sve2.c
M clang/test/Driver/aarch64-the.c
M clang/test/Driver/aarch64-v81a.c
M clang/test/Driver/aarch64-v82a.c
M clang/test/Driver/aarch64-v83a.c
M clang/test/Driver/aarch64-v84a.c
M clang/test/Driver/aarch64-v85a.c
M clang/test/Driver/aarch64-v86a.c
M clang/test/Driver/aarch64-v87a.c
M clang/test/Driver/aarch64-v88a.c
M clang/test/Driver/aarch64-v89a.c
M clang/test/Driver/aarch64-v91a.c
M clang/test/Driver/aarch64-v92a.c
M clang/test/Driver/aarch64-v93a.c
M clang/test/Driver/aarch64-v94a.c
M clang/test/Driver/aarch64-v95a.c
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/arm-sb.c
M clang/test/Driver/clang_f_opts.c
M clang/test/Driver/fdefine-target-os-macros.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/hlsl-lang-targets-spirv.hlsl
M clang/test/Driver/hlsl-lang-targets.hlsl
M clang/test/Driver/hurd.cpp
M clang/test/Driver/large-data-threshold.c
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/linux-ld.c
M clang/test/Driver/matrix.c
M clang/test/Driver/sanitizer-ld.c
A clang/test/Driver/xros-driver.c
M clang/test/Format/clang-format-ignore.cpp
A clang/test/Frontend/xros-version.c
M clang/test/Interpreter/incremental-mode.cpp
M clang/test/Lexer/SourceLocationsOverflow.c
M clang/test/Lexer/unicode.c
A clang/test/Modules/GH77953.cpp
M clang/test/Modules/aarch64-sme-keywords.cppm
M clang/test/Modules/cxx20-10-1-ex1.cpp
M clang/test/Modules/cxx20-importing-function-bodies.cppm
M clang/test/Modules/cxx20-module-file-info.cpp
M clang/test/Modules/cxx20-partition-redeclarations.cpp
M clang/test/Modules/eagerly-load-cxx-named-modules.cppm
M clang/test/Modules/implicit-module-with-missing-path.cpp
M clang/test/Modules/module-init-duplicated-import.cppm
M clang/test/Modules/no-duplicate-codegen-in-GMF.cppm
M clang/test/Modules/no-implicit-std-cxx-module.cppm
M clang/test/Modules/no-import-func-body.cppm
M clang/test/Modules/pr61067.cppm
M clang/test/Modules/pr62705.cppm
M clang/test/Modules/pr67893.cppm
A clang/test/Modules/pr68702.cpp
A clang/test/Modules/pr76638.cppm
A clang/test/Modules/pr77995.cppm
M clang/test/PCH/gch-probe.c
M clang/test/Parser/c2x-attribute-keywords.c
M clang/test/Parser/c2x-attribute-keywords.m
M clang/test/Parser/cxx0x-keyword-attributes.cpp
M clang/test/ParserOpenACC/parse-cache-construct.c
M clang/test/ParserOpenACC/parse-clauses.c
A clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/ParserOpenACC/parse-constructs.cpp
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Sema/aarch64-incompat-sm-builtin-calls.c
M clang/test/Sema/aarch64-sme-func-attrs-without-target-feature.cpp
M clang/test/Sema/aarch64-sme-func-attrs.c
M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp
M clang/test/Sema/aarch64-sme-intrinsics/acle_sme_target.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
M clang/test/Sema/inline-asm-validate-x86.c
M clang/test/Sema/ns_error_enum.m
A clang/test/SemaCXX/PR76631.cpp
M clang/test/SemaCXX/builtin-std-move.cpp
M clang/test/SemaCXX/constexpr-ackermann.cpp
M clang/test/SemaCXX/constexpr-default-arg.cpp
M clang/test/SemaCXX/constexpr-late-instantiation.cpp
M clang/test/SemaCXX/constexpr-nqueens.cpp
M clang/test/SemaCXX/constexpr-unsigned-high-bit.cpp
M clang/test/SemaCXX/coro-lifetimebound.cpp
M clang/test/SemaCXX/coro-return-type-and-wrapper.cpp
M clang/test/SemaCXX/cxx1z-class-template-argument-deduction.cpp
M clang/test/SemaCXX/eval-crashes.cpp
M clang/test/SemaCXX/literal-type.cpp
A clang/test/SemaCXX/ms-property-new.cpp
M clang/test/SemaCXX/new-delete.cpp
A clang/test/SemaCXX/placement-new-bound-member-function.cpp
A clang/test/SemaCXX/placement-new-builtin.cpp
A clang/test/SemaCXX/placement-new-matrix.cpp
A clang/test/SemaCXX/placement-new-ms-__noop.cpp
M clang/test/SemaCXX/source_location.cpp
A clang/test/SemaObjCXX/property-placement-new.mm
M clang/test/SemaTemplate/GH71595.cpp
A clang/test/SemaTemplate/GH75426.cpp
M clang/test/SemaTemplate/concepts-friends.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
M clang/tools/c-index-test/c-index-test.c
M clang/tools/clang-linker-wrapper/CMakeLists.txt
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
R clang/tools/clang-linker-wrapper/OffloadWrapper.cpp
R clang/tools/clang-linker-wrapper/OffloadWrapper.h
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/driver/driver.cpp
M clang/tools/libclang/CIndex.cpp
M clang/tools/libclang/linker-script-to-export-list.py
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/AST/StructuralEquivalenceTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp
M clang/unittests/Analysis/FlowSensitive/DataflowAnalysisContextTest.cpp
M clang/unittests/Analysis/FlowSensitive/DataflowEnvironmentTest.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/unittests/Analysis/FlowSensitive/ValueTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestCSharp.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/Tooling/Syntax/TokensTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M clang/www/cxx_dr_status.html
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/builtins/fp_extend_impl.inc
M compiler-rt/lib/dfsan/dfsan_custom.cpp
M compiler-rt/lib/interception/interception.h
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/orc/CMakeLists.txt
M compiler-rt/lib/orc/coff_platform.cpp
M compiler-rt/lib/orc/wrapper_function_utils.h
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingMerge.c
M compiler-rt/lib/profile/InstrProfilingValue.c
M compiler-rt/lib/sanitizer_common/sanitizer_asm.h
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
M compiler-rt/test/asan/TestCases/Darwin/odr-lto.cpp
M compiler-rt/test/asan/lit.cfg.py
M compiler-rt/test/dfsan/custom.cpp
M compiler-rt/test/dfsan/release_shadow_space.c
M compiler-rt/test/fuzzer/lit.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
M flang/CMakeLists.txt
M flang/docs/Extensions.md
M flang/docs/Intrinsics.md
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/real.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Parser/characters.h
M flang/include/flang/Parser/provenance.h
M flang/include/flang/Runtime/extensions.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Evaluate/character.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-character.cpp
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/fold-logical.cpp
M flang/lib/Evaluate/fold-real.cpp
M flang/lib/Evaluate/fold-reduction.h
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/real.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Evaluate/type.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/Transforms/AddDebugFoundation.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
M flang/lib/Parser/characters.cpp
M flang/lib/Parser/provenance.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-namelist.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/runtime/allocatable.cpp
M flang/runtime/edit-input.cpp
M flang/runtime/execute.cpp
M flang/runtime/extensions.cpp
M flang/runtime/extrema.cpp
M flang/runtime/io-stmt.cpp
M flang/runtime/namelist.cpp
M flang/runtime/numeric.cpp
M flang/runtime/reduction-templates.h
M flang/runtime/tools.cpp
M flang/runtime/tools.h
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
M flang/test/Driver/isysroot.f90
A flang/test/Driver/pthread.f90
M flang/test/Driver/target-cpu-features.f90
A flang/test/Driver/unsupported-vscale-max-min.f90
M flang/test/Evaluate/fold-findloc.f90
M flang/test/Evaluate/fold-mod.f90
M flang/test/Evaluate/folding20.f90
A flang/test/Fir/already-defined-free.fir
M flang/test/Fir/boxproc-2.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/external-mangling.fir
A flang/test/Fir/struct-passing-x86-64-several-fields-inreg.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics.fir
A flang/test/Lower/HLFIR/bindc-module-var.f90
M flang/test/Lower/OpenACC/acc-routine.f90
M flang/test/Lower/RISCV/riscv-vector-bits-vscale-range.f90
M flang/test/Lower/macro-debug-file-loc.f90
A flang/test/Lower/structure-constructors-alloc-comp.f90
M flang/test/Semantics/OpenMP/resolve05.f90
A flang/test/Semantics/assign15.f90
M flang/test/Semantics/call10.f90
M flang/test/Semantics/call14.f90
M flang/test/Semantics/call24.f90
M flang/test/Semantics/call25.f90
M flang/test/Semantics/dosemantics12.f90
M flang/test/Semantics/forall01.f90
M flang/test/Semantics/init01.f90
M flang/test/Semantics/local-vs-global.f90
A flang/test/Semantics/modfile60.f90
A flang/test/Semantics/modfile61.f90
M flang/test/Semantics/move_alloc.f90
M flang/test/Semantics/pointer01.f90
M flang/test/Semantics/reshape.f90
M flang/test/Semantics/resolve09.f90
M flang/test/Semantics/resolve35.f90
M flang/test/Semantics/resolve99.f90
M flang/test/Semantics/structconst06.f90
M flang/test/Semantics/structconst07.f90
A flang/test/Semantics/structconst08.f90
M flang/test/Semantics/symbol09.f90
M flang/test/Transforms/debug-line-table.fir
M flang/test/lit.cfg.py
M flang/test/lit.site.cfg.py.in
M flang/unittests/Frontend/CMakeLists.txt
A flang/unittests/Frontend/CodeGenActionTest.cpp
M flang/unittests/Runtime/CommandTest.cpp
M flang/unittests/Runtime/Namelist.cpp
M libc/CMakeLists.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/include/llvm-libc-types/off_t.h
M libc/spec/bsd_ext.td
M libc/spec/stdc.td
M libc/src/__support/CPP/atomic.h
M libc/src/__support/FPUtil/BasicOperations.h
M libc/src/__support/FPUtil/DivisionAndRemainderOperations.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/FPUtil/NearestIntegerOperations.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/fpbits_str.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/FMod.h
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
R libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/src/__support/RPC/rpc.h
M libc/src/__support/UInt.h
M libc/src/__support/float_to_string.h
M libc/src/__support/str_to_float.h
M libc/src/math/CMakeLists.txt
A libc/src/math/fabsf128.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acosf.cpp
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/atanf.cpp
M libc/src/math/generic/atanhf.cpp
M libc/src/math/generic/cosf.cpp
M libc/src/math/generic/coshf.cpp
M libc/src/math/generic/erff.cpp
M libc/src/math/generic/exp.cpp
M libc/src/math/generic/exp10.cpp
M libc/src/math/generic/exp10f_impl.h
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/exp2f_impl.h
M libc/src/math/generic/expf.cpp
M libc/src/math/generic/expm1.cpp
M libc/src/math/generic/expm1f.cpp
A libc/src/math/generic/fabsf128.cpp
M libc/src/math/generic/inv_trigf_utils.h
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log2f.cpp
M libc/src/math/generic/log_range_reduction.h
M libc/src/math/generic/logf.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/sinf.cpp
M libc/src/math/generic/sinhf.cpp
M libc/src/math/generic/tanhf.cpp
M libc/src/stdio/printf_core/float_dec_converter.h
M libc/src/stdio/printf_core/float_hex_converter.h
M libc/src/stdio/printf_core/float_inf_nan_converter.h
M libc/src/string/memory_utils/op_x86.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/strsep.cpp
M libc/src/string/strsep.h
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/test/UnitTest/FPMatcher.h
M libc/test/src/__support/FPUtil/dyadic_float_test.cpp
M libc/test/src/__support/FPUtil/fpbits_test.cpp
M libc/test/src/math/FDimTest.h
M libc/test/src/math/FmaTest.h
M libc/test/src/math/HypotTest.h
M libc/test/src/math/ILogbTest.h
M libc/test/src/math/LdExpTest.h
M libc/test/src/math/NextAfterTest.h
M libc/test/src/math/RIntTest.h
M libc/test/src/math/RemQuoTest.h
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/FDimTest.h
M libc/test/src/math/smoke/FmaTest.h
M libc/test/src/math/smoke/HypotTest.h
M libc/test/src/math/smoke/ILogbTest.h
M libc/test/src/math/smoke/LdExpTest.h
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/math/smoke/RemQuoTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
M libc/test/src/math/smoke/atanhf_test.cpp
A libc/test/src/math/smoke/fabsf128_test.cpp
M libc/test/src/stdlib/strtold_test.cpp
M libc/test/src/time/difftime_test.cpp
M libc/test/utils/FPUtil/x86_long_double_test.cpp
M libcxx/CMakeLists.txt
M libcxx/cmake/caches/Generic-cxx26.cmake
M libcxx/cmake/caches/Generic-hardening-mode-extensive.cmake
M libcxx/cmake/caches/Generic-no-exceptions.cmake
M libcxx/cmake/caches/Generic-no-experimental.cmake
M libcxx/cmake/caches/Generic-no-filesystem.cmake
M libcxx/cmake/caches/Generic-no-localization.cmake
M libcxx/cmake/caches/Generic-no-random_device.cmake
M libcxx/cmake/caches/Generic-no-threads.cmake
M libcxx/cmake/caches/Generic-no-tzdb.cmake
M libcxx/cmake/caches/Generic-no-unicode.cmake
M libcxx/cmake/caches/Generic-no-wide-characters.cmake
M libcxx/docs/BuildingLibcxx.rst
M libcxx/docs/Modules.rst
R libcxx/docs/ReleaseNotes/17.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/TestingLibcxx.rst
M libcxx/docs/UsingLibcxx.rst
M libcxx/docs/index.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__assert
M libcxx/include/__availability
M libcxx/include/__concepts/arithmetic.h
M libcxx/include/__config
M libcxx/include/__memory/allocator.h
M libcxx/include/__ranges/chunk_by_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/repeat_view.h
M libcxx/include/__ranges/single_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/transform_view.h
M libcxx/include/__utility/cmp.h
M libcxx/include/barrier
M libcxx/include/experimental/__simd/aligned_tag.h
M libcxx/include/future
M libcxx/include/latch
M libcxx/include/libcxx.imp
M libcxx/include/ostream
M libcxx/include/print
M libcxx/include/regex
M libcxx/include/semaphore
M libcxx/include/shared_mutex
M libcxx/include/stop_token
M libcxx/include/string
M libcxx/include/thread
M libcxx/include/vector
A libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
A libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/modules/CMakeLists.txt
R libcxx/modules/CMakeLists.txt.in
M libcxx/modules/std/memory.inc
M libcxx/src/ostream.cpp
M libcxx/test/CMakeLists.txt
M libcxx/test/configs/cmake-bridge.cfg.in
M libcxx/test/libcxx/assertions/modes/enabling_assertions_enables_extensive_mode.pass.cpp
M libcxx/test/libcxx/assertions/modes/override_with_debug_mode.pass.cpp
M libcxx/test/libcxx/assertions/modes/override_with_extensive_mode.pass.cpp
M libcxx/test/libcxx/assertions/modes/override_with_fast_mode.pass.cpp
M libcxx/test/libcxx/assertions/modes/override_with_unchecked_mode.pass.cpp
A libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_integer.compile.pass.cpp
A libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_signed_integer.compile.pass.cpp
A libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_unsigned_integer.compile.pass.cpp
M libcxx/test/libcxx/containers/sequences/deque/asan_caterpillar.pass.cpp
A libcxx/test/libcxx/containers/strings/basic.string/asan.pass.cpp
A libcxx/test/libcxx/containers/strings/basic.string/asan_deque_integration.pass.cpp
A libcxx/test/libcxx/containers/strings/basic.string/asan_short.pass.cpp
A libcxx/test/libcxx/containers/strings/basic.string/asan_turning_off.pass.cpp
A libcxx/test/libcxx/containers/strings/basic.string/asan_vector_integration.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_left/assert.stride.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_right/assert.stride.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/layout_stride/assert.stride.pass.cpp
M libcxx/test/libcxx/depr/depr.default.allocator/allocator.members/address.depr_in_cxx17.verify.cpp
M libcxx/test/libcxx/depr/depr.default.allocator/allocator.members/allocate.depr_in_cxx17.verify.cpp
A libcxx/test/libcxx/depr/depr.default.allocator/enable_removed_allocator_members.deprecated.verify.cpp
M libcxx/test/libcxx/depr/enable_removed_cpp17_features.compile.pass.cpp
A libcxx/test/libcxx/depr/enable_removed_cpp17_features.deprecated.verify.cpp
A libcxx/test/libcxx/depr/enable_removed_cpp20_features.deprecated.verify.cpp
M libcxx/test/libcxx/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
A libcxx/test/libcxx/input.output/iostream.format/output.streams/ostream.syn/includes.compile.pass.cpp
M libcxx/test/libcxx/module_std.gen.py
M libcxx/test/libcxx/module_std_compat.gen.py
A libcxx/test/libcxx/selftest/modules/no-modules.sh.cpp
A libcxx/test/libcxx/selftest/modules/std-and-std.compat-module.sh.cpp
A libcxx/test/libcxx/selftest/modules/std-module.sh.cpp
A libcxx/test/libcxx/selftest/modules/std.compat-module.sh.cpp
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
R libcxx/test/lit.local.cfg
M libcxx/test/std/algorithms/alg.modifying.operations/alg.fill/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.move/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.replace/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.rotate/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.modifying.operations/alg.transform/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.all_of/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.any_of/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.equal/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.find/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.foreach/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.none_of/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.merge/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.sort/stable.sort/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/numeric.ops/reduce/pstl.exception_handling.pass.cpp
M libcxx/test/std/algorithms/numeric.ops/transform.reduce/pstl.exception_handling.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/locale-specific_form.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/print.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/println.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_nonunicode.pass.cpp
M libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.formatted.print/vprint_unicode.pass.cpp
A libcxx/test/std/input.output/iostream.format/print.fun/includes.compile.pass.cpp
M libcxx/test/std/modules/std.compat.pass.cpp
M libcxx/test/std/modules/std.pass.cpp
M libcxx/test/std/re/re.const/re.matchflag/match_not_eol.pass.cpp
M libcxx/test/support/asan_testing.h
M libcxx/test/support/check_assertion.h
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/tools/clang_tidy_checks/CMakeLists.txt
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/build-picolibc.sh
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxx/utils/ci/run-buildbot
M libcxx/utils/generate_iwyu_mapping.py
M libcxx/utils/libcxx/header_information.py
M libcxx/utils/libcxx/test/config.py
M libcxx/utils/libcxx/test/features.py
M libcxx/utils/libcxx/test/format.py
M libcxx/utils/libcxx/test/modules.py
A libcxx/vendor/llvm/default_assertion_handler.in
M libcxxabi/CMakeLists.txt
M libunwind/src/UnwindCursor.hpp
M libunwind/src/libunwind.cpp
M lld/COFF/Driver.cpp
M lld/COFF/DriverUtils.cpp
M lld/Common/Args.cpp
M lld/Common/DriverDispatcher.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/MachO/Arch/ARM64Common.h
M lld/MachO/Driver.cpp
M lld/cmake/modules/AddLLD.cmake
M lld/test/CMakeLists.txt
M lld/test/COFF/print-search-paths.s
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos.ll
A lld/test/ELF/x86-64-pc32-overflow-large.s
A lld/test/MachO/arm64-objc-stubs-fix.s
M lld/tools/lld/CMakeLists.txt
M lld/tools/lld/lld.cpp
M lld/wasm/InputFiles.cpp
M lld/wasm/SymbolTable.cpp
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/include/lldb/Core/DebuggerEvents.h
M lldb/include/lldb/Core/Progress.h
M lldb/include/lldb/Core/ValueObject.h
M lldb/include/lldb/Host/Config.h.cmake
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/include/lldb/Symbol/LineEntry.h
M lldb/include/lldb/Utility/FileSpec.h
M lldb/include/lldb/Utility/FileSpecList.h
A lldb/include/lldb/Utility/SupportFile.h
M lldb/include/lldb/Utility/XcodeSDK.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/API/SBTypeFilter.cpp
M lldb/source/API/SBTypeFormat.cpp
M lldb/source/API/SBTypeSummary.cpp
M lldb/source/API/SBTypeSynthetic.cpp
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Breakpoint/BreakpointResolver.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Core/Progress.cpp
M lldb/source/Core/ValueObject.cpp
M lldb/source/Expression/DiagnosticManager.cpp
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
M lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/MacOSX/CMakeLists.txt
M lldb/source/Plugins/Platform/MacOSX/PlatformAppleSimulator.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.cpp
A lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleXR.cpp
A lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleXR.h
M lldb/source/Plugins/Platform/MacOSX/objcxx/PlatformiOSSimulatorCoreSimulatorSupport.h
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolLocator/Default/SymbolLocatorDefault.cpp
M lldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/CompileUnit.cpp
M lldb/source/Symbol/LineEntry.cpp
M lldb/source/Symbol/LineTable.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Target/ThreadPlanStepRange.cpp
M lldb/source/Utility/FileSpec.cpp
M lldb/source/Utility/FileSpecList.cpp
M lldb/source/Utility/XcodeSDK.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/TestDataFormatterAdv.py
M lldb/test/API/functionalities/data-formatter/data-formatter-advanced/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/TestDataFormatterLibcxxChrono.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/main.cpp
A lldb/test/API/functionalities/executable_first/Makefile
A lldb/test/API/functionalities/executable_first/TestExecutableFirst.py
A lldb/test/API/functionalities/executable_first/b.cpp
A lldb/test/API/functionalities/executable_first/main.cpp
M lldb/test/API/functionalities/progress_reporting/TestProgressReporting.py
M lldb/test/API/functionalities/progress_reporting/TestTrimmedProgressReporting.py
M lldb/test/API/lang/objc/modules-compile-error/TestModulesCompileError.py
M lldb/test/API/macosx/rosetta/Makefile
M lldb/test/API/tools/lldb-dap/completions/TestDAP_completions.py
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/main.cpp
M lldb/test/Shell/Settings/Inputs/names.cpp
A lldb/test/Shell/Settings/TestFrameFormatName.test
R lldb/test/Shell/Settings/TestFrameFormatNameWithArgs.test
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/tools/driver/Driver.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/tools/lldb-server/lldb-server.cpp
M lldb/unittests/Core/DumpDataExtractorTest.cpp
M lldb/unittests/Utility/FileSpecTest.cpp
M lldb/unittests/Utility/XcodeSDKTest.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/CrossCompile.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/cmake/modules/llvm-driver-template.cpp.in
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
A llvm/docs/requirements-hashed.txt
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl02.rst
M llvm/examples/Kaleidoscope/Chapter2/CMakeLists.txt
M llvm/include/llvm/ADT/Hashing.h
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/AliasSetTracker.h
M llvm/include/llvm/Analysis/DOTGraphTraitsPass.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/MachO.def
M llvm/include/llvm/BinaryFormat/Magic.h
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/BinaryFormat/WasmTraits.h
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
A llvm/include/llvm/CodeGen/GlobalMerge.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/IndexedValuesMap.h
M llvm/include/llvm/DebugInfo/DIContext.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch32.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
A llvm/include/llvm/Frontend/Offloading/OffloadWrapper.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/include/llvm/IR/Metadata.h
A llvm/include/llvm/IR/VFABIDemangler.h
M llvm/include/llvm/IR/Value.h
M llvm/include/llvm/MC/MCSymbol.h
M llvm/include/llvm/MC/MCSymbolWasm.h
M llvm/include/llvm/Object/COFFImportFile.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/Support/FormatCommon.h
M llvm/include/llvm/Support/GenericLoopInfo.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/RISCVAttributes.h
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/Transforms/Utils/ModuleUtils.h
M llvm/include/llvm/Transforms/Utils/NameAnonGlobals.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
R llvm/lib/Analysis/VFABIDemangling.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/Magic.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RDFGraph.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/DWARFLinker/CMakeLists.txt
M llvm/lib/DWARFLinker/Classic/CMakeLists.txt
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Parallel/CMakeLists.txt
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
R llvm/lib/DWARFLinker/Parallel/IndexedValuesMap.h
M llvm/lib/DebugInfo/DWARF/DWARFCompileUnit.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFTypePrinter.cpp
M llvm/lib/DebugInfo/Symbolize/MarkupFilter.cpp
M llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_aarch32.cpp
M llvm/lib/ExecutionEngine/JITLink/aarch32.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/Frontend/Offloading/CMakeLists.txt
A llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/ConstantFold.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Dominators.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/StructuralHash.cpp
A llvm/lib/IR/VFABIDemangler.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/InterfaceStub/IFSHandler.cpp
M llvm/lib/InterfaceStub/IFSStub.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCParser/DarwinAsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Object/Binary.cpp
M llvm/lib/Object/COFFImportFile.cpp
M llvm/lib/Object/ObjectFile.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/Object/RelocationResolver.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Support/BalancedPartitioning.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Caching.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/FileCollector.cpp
M llvm/lib/Support/FormatVariadic.cpp
M llvm/lib/Support/GraphWriter.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/Path.cpp
M llvm/lib/Support/Process.cpp
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Support/StringRef.cpp
M llvm/lib/Support/Unicode.cpp
M llvm/lib/Support/UnicodeCaseFold.cpp
M llvm/lib/Support/UnicodeNameToCodepoint.cpp
M llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
M llvm/lib/Support/Unix/Program.inc
M llvm/lib/Support/VersionTuple.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/Windows/Path.inc
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrGISel.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
A llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMCallLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
M llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVCallingConv.td
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
A llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/Sparc/SparcSubtarget.h
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrFP.td
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZPatterns.td
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ14.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ15.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ16.td
M llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
M llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86InstrShiftRotate.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetObjectFile.cpp
M llvm/lib/Target/X86/X86TargetObjectFile.h
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/TargetParser/ARMTargetParser.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/TextAPI/Platform.cpp
M llvm/lib/TextAPI/RecordsSlice.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/ObjCARC/DependencyAnalysis.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
M llvm/lib/Transforms/Utils/ModuleUtils.cpp
M llvm/lib/Transforms/Utils/MoveAutoInit.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanHCFGBuilder.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/WindowsDriver/MSVCPaths.cpp
M llvm/lib/XRay/Trace.cpp
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/AliasSet/argmemonly.ll
M llvm/test/Analysis/AliasSet/guards.ll
M llvm/test/Analysis/AliasSet/intrinsics.ll
M llvm/test/Analysis/AliasSet/memloc-vscale.ll
M llvm/test/Analysis/AliasSet/memset.ll
M llvm/test/Analysis/AliasSet/memtransfer.ll
M llvm/test/Analysis/AliasSet/saturation.ll
M llvm/test/Analysis/BasicAA/gep-alias.ll
M llvm/test/Analysis/BasicAA/inttoptr_constexpr.ll
M llvm/test/Analysis/BasicAA/separate_storage-alias-sets.ll
A llvm/test/Analysis/CostModel/AArch64/arith-fp-frem.ll
A llvm/test/Analysis/CostModel/AArch64/vec3-ops.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-load-store.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-select.ll
A llvm/test/Analysis/CostModel/SystemZ/i128-cmp-ext-conv.ll
M llvm/test/Analysis/CostModel/SystemZ/int-arith.ll
M llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll
M llvm/test/Analysis/CostModel/SystemZ/load_store.ll
A llvm/test/Analysis/CostModel/SystemZ/logic-i128.ll
M llvm/test/Analysis/CostModel/SystemZ/logical.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/atomics.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
A llvm/test/Assembler/implicit-intrinsic-declaration-invalid.ll
A llvm/test/Assembler/implicit-intrinsic-declaration.ll
R llvm/test/Bitcode/clone-local-types.ll
M llvm/test/Bitcode/upgrade-cu-locals.ll
M llvm/test/Bitcode/upgrade-cu-locals.ll.bc
M llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
A llvm/test/CodeGen/AArch64/GlobalISel/counter-fallback.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
A llvm/test/CodeGen/AArch64/GlobalISel/phi-with-empty-type.ll
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-prop-extends-phi.mir
A llvm/test/CodeGen/AArch64/GlobalISel/select-anyext-indexed-load-crash.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/avoid-free-ext-promotion.ll
M llvm/test/CodeGen/AArch64/bfis-in-loop.ll
M llvm/test/CodeGen/AArch64/icmp.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef.ll
A llvm/test/CodeGen/AArch64/sme-streaming-body-streaming-compatible-interface.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-cvt.ll
A llvm/test/CodeGen/AArch64/strictfp_f16_abi_promote.ll
A llvm/test/CodeGen/AArch64/sve2-sli-sri.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-dots.ll
A llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-prelegalizer-combiner-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fabs-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-post-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-pre-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-foldable-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsub-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-redundant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-neg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-illegal-types.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shift.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.i16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.u16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.i16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.u16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ds.swizzle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmad.ftz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mbcnt.lo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mul.u24.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mulhi.i24.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mulhi.u24.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.reloc.constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.barrier.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sffbh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-wave-address.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-region.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-region.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-region.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-br.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctlz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-cttz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fconstant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frame-index.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-i1-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.s96.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pseudo-scalar-transcendental.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-returnaddress.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sopc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-packed.xfail.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-stacksave-stackrestore.invalid.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-stacksave-stackrestore.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.s96.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.gfx10.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslate-bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp-s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-rotl-rotr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer-wrong-insert-point.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-reassoc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-abs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.v2s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp-compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ballot.i64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.class.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.cvt.pkrtz.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.scale.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.append.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.bpermute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.consume.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.init.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.gws.sema.v.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.ordered.swap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.permute.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.swizzle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fmul.legacy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.groupstaticsize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.mov.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.f16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kernarg.segment.ptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.direct.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.param.load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.live.mask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx90a.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx940.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ps.live.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readfirstlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memrealtime.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.sendmsghalt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.update.dpp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.vote.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.writelane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wwm.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-wave-address.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-align.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomic-cmpxchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-max.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-min.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xchg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitreverse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-concat-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctpop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fadd.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-flog2.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fma.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fmul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fpext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-frame-index.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-merge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-pseudo-scalar-transcendental.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrmask.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-reg-sequence.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-salu-float.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sbfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext-inreg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uaddo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ubfx.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usubo.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zextload.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/add-debug.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.r600.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-cse.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-propagation.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/agpr-to-agpr-copy.mir
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx908.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/artificial-terminators.mir
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/assert-wrong-alloca-addrspace.ll
M llvm/test/CodeGen/AMDGPU/atomic-optimizer-strict-wqm.ll
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
A llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/barrier-elimination.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bf16-ops.ll
M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfe_uint.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.r600.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/big_alu.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-condition-and.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/break-smem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-emitcopyfromreg.ll
M llvm/test/CodeGen/AMDGPU/bug-vopc-commute.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/bundle-latency.mir
A llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
M llvm/test/CodeGen/AMDGPU/call-to-kernel.ll
M llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/call_fs.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cayman-loop-bug.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cf-stack-bug.ll
M llvm/test/CodeGen/AMDGPU/cf_end.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-smem.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads.mir
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/coalescer-remat-dead-use.mir
M llvm/test/CodeGen/AMDGPU/coalescer-removepartial-extend-undef-subrange.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-prune-kill-copy.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subreg-join.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
M llvm/test/CodeGen/AMDGPU/coalescing-subreg-was-undef-but-became-def.mir
M llvm/test/CodeGen/AMDGPU/coalescing_makes_lanes_undef.mir
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf-broken.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf2.mir
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-sreg64-inits.mir
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_vloads.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute-vop3.mir
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg.ll
M llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-mullohi.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-v1i8-extractvecelt-crash.ll
M llvm/test/CodeGen/AMDGPU/dagcombiner-bug-illegal-vec4-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
M llvm/test/CodeGen/AMDGPU/dead_bundle.mir
M llvm/test/CodeGen/AMDGPU/dead_copy.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/disconnected-predset-break-bug.ll
M llvm/test/CodeGen/AMDGPU/diverge-switch-default.ll
M llvm/test/CodeGen/AMDGPU/divergence-at-use.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bitreverse.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-min-max.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-negsubinlineconst.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-not-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
A llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
M llvm/test/CodeGen/AMDGPU/early-term.mir
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/empty-function.ll
M llvm/test/CodeGen/AMDGPU/enable-no-signed-zeros-fp-math.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/endpgm-dce.mir
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/expand-si-indirect.mir
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
M llvm/test/CodeGen/AMDGPU/fadd64.ll
M llvm/test/CodeGen/AMDGPU/fail-select-buffer-atomic-fadd.ll
M llvm/test/CodeGen/AMDGPU/fail.llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
M llvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp-cnd.ll
M llvm/test/CodeGen/AMDGPU/fcmp-cnde-int-args.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp.ll
M llvm/test/CodeGen/AMDGPU/fcmp64.ll
M llvm/test/CodeGen/AMDGPU/fconst64.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.r600.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll
M llvm/test/CodeGen/AMDGPU/fetch-limits.r700+.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
M llvm/test/CodeGen/AMDGPU/fmad.ll
M llvm/test/CodeGen/AMDGPU/fmax.ll
M llvm/test/CodeGen/AMDGPU/fmax3.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.r600.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_fmax_legacy.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fminnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.r600.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul.ll
M llvm/test/CodeGen/AMDGPU/fmul64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.legal.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.si.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fold-agpr-phis.mir
M llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir
M llvm/test/CodeGen/AMDGPU/fold-cndmask.mir
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll
M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
M llvm/test/CodeGen/AMDGPU/fold-implicit-operand.mir
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fold-multiple-commute.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-remove-m0-redef.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-scalar-fmac.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/fold-short-64-bit-literals.mir
M llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/fold_acc_copy_into_valu.mir
M llvm/test/CodeGen/AMDGPU/folding-of-i32-as-i64.mir
M llvm/test/CodeGen/AMDGPU/force-store-sc0-sc1.ll
M llvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
A llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx940.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-flat-atomics-f64.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-global-atomics-f64.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/frexp-constant-fold.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.r600.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/fsub64.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-atomic.ll
M llvm/test/CodeGen/AMDGPU/gds-unsupported.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
A llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/gfx940-hazards.mir
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/greedy-broken-ssa-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/gws-hazards.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses.mir
M llvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
M llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
M llvm/test/CodeGen/AMDGPU/hazard-kill.mir
M llvm/test/CodeGen/AMDGPU/hazard-lds-addtid.mir
M llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-meta-insts.mir
M llvm/test/CodeGen/AMDGPU/hazard-shift64.mir
M llvm/test/CodeGen/AMDGPU/hazard.mir
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/i1_copy_phi_with_phi_incoming_value.mir
M llvm/test/CodeGen/AMDGPU/i8-to-double-to-float.ll
M llvm/test/CodeGen/AMDGPU/icmp-select-sete-reverse-args.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/image-attributes.ll
M llvm/test/CodeGen/AMDGPU/image-resource-id.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-pregfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/input-mods.r600.ll
M llvm/test/CodeGen/AMDGPU/insert-branch-w32.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert-singleuse-vdst.mir
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem-ds.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
A llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
A llvm/test/CodeGen/AMDGPU/insert-waitcnts-hang.mir
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invariant-image-load.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/jump-address.ll
M llvm/test/CodeGen/AMDGPU/kcache-fold.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/knownbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/large-alloca-graphics.ll
M llvm/test/CodeGen/AMDGPU/large-constant-initializer.ll
M llvm/test/CodeGen/AMDGPU/lcssa-optnone.ll
M llvm/test/CodeGen/AMDGPU/lds-atomic-fadd.ll
M llvm/test/CodeGen/AMDGPU/lds-atomic-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-branch-vmem-hazard.mir
M llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx11.mir
M llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx12.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-hazards.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll
M llvm/test/CodeGen/AMDGPU/lds-initializer.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll
M llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/legalizedag-bug-expand-setcc.ll
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/literal-constant-like-operand-instruction-size.ll
M llvm/test/CodeGen/AMDGPU/literals.ll
M llvm/test/CodeGen/AMDGPU/liveness.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.fadd.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.sc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dot4.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx10.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.prim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdiv.fast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.o.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.x.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx940.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.u32.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.msad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.i24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.u24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.inv.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.vol.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.get.waveid.in.workgroup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.getpc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memtime.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.nop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sethalt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.hi.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sffbh.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umax.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umin.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.pow-gfx9.ll
M llvm/test/CodeGen/AMDGPU/llvm.pow.ll
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.cube.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.dot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.clamped.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.ieee.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.tex.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/lo16-hi16-illegal-copy.mir
M llvm/test/CodeGen/AMDGPU/lo16-hi16-physreg-copy.mir
M llvm/test/CodeGen/AMDGPU/lo16-lo16-physreg-copy-agpr.mir
M llvm/test/CodeGen/AMDGPU/lo16-lo16-physreg-copy-sgpr.mir
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i1.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/load-input-fold.ll
M llvm/test/CodeGen/AMDGPU/load-lo16.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32-no-ds128.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32.ll
M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i32.ll
M llvm/test/CodeGen/AMDGPU/load-local-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/load-store-opt-dlc.mir
M llvm/test/CodeGen/AMDGPU/load-store-opt-scc.mir
M llvm/test/CodeGen/AMDGPU/load-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
M llvm/test/CodeGen/AMDGPU/local-atomics.ll
M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-memory.r600.ll
M llvm/test/CodeGen/AMDGPU/local-stack-slot-offset.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-address.ll
M llvm/test/CodeGen/AMDGPU/loop-idiom.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/loop_header_nopred.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-other-terminators.mir
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll
M llvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-ignorable-exec-use.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-convergent.mir
M llvm/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_int24.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/madak-inline-constant.mir
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/mai-inline.ll
M llvm/test/CodeGen/AMDGPU/make-buffer-rsrc-lds-fails.ll
M llvm/test/CodeGen/AMDGPU/max-literals.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/mcp-aligned-vgprs.mir
M llvm/test/CodeGen/AMDGPU/mcp-implicit-clobber.mir
M llvm/test/CodeGen/AMDGPU/mcp-overlap-after-propagation.mir
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/mem-builtins.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-addrspace.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-region.mir
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load-gfx10.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load-gfx11.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load-gfx12.mir
M llvm/test/CodeGen/AMDGPU/merge-image-load.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx10.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx11.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx12.mir
M llvm/test/CodeGen/AMDGPU/merge-image-sample.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-agpr.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
Log Message:
-----------
[๐๐ฝ๐ฟ] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/b0f68c6d258b...6fb9fb098cdf
More information about the All-commits
mailing list