[all-commits] [llvm/llvm-project] 96542c: [Hexagon] Flip subreg bit for reverse pairs hvx .n...

[quic-akaryaki via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 96542c018f75b54b35aa3e08f184a4909f8c0c04
      https://github.com/llvm/llvm-project/commit/96542c018f75b54b35aa3e08f184a4909f8c0c04
  Author: quic-akaryaki <123192073+quic-akaryaki at users.noreply.github.com>
  Date:   2024-01-18 (Thu, 18 Jan 2024)

  Changed paths:
    M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
    M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
    A llvm/test/MC/Hexagon/hvx-nv-pair-reverse.s

  Log Message:
  -----------
  [Hexagon] Flip subreg bit for reverse pairs hvx .new (#75873)

In .new instructions, the upper vector of a reverse pair (e.g. V4 in
V4:5) should be referenced with an odd sss value.