[all-commits] [llvm/llvm-project] 8bc7c0: [X86] Fix failures on EXPENSIVE_CHECKS builds

[Shengchen Kan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8bc7c0a058ff0e6495b8e7e4dd850e646228506b
      https://github.com/llvm/llvm-project/commit/8bc7c0a058ff0e6495b8e7e4dd850e646228506b
  Author: Shengchen Kan <shengchen.kan at intel.com>
  Date:   2024-01-19 (Fri, 19 Jan 2024)

  Changed paths:
    M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h

  Log Message:
  -----------
  [X86] Fix failures on EXPENSIVE_CHECKS builds

Error message

```
*** Bad machine code: Illegal virtual register for instruction ***
- function:    test__blsi_u32
- basic block: %bb.0  (0x7a61208)
- instruction: %5:gr32 = MOV32r0 implicit-def $eflags
- operand 0:   %5:gr32
Expected a GR32_NOREX2 register, but got a GR32 register
```

Reported by RKSimon in #77433

The failure is b/c compiler emits a MOV32r0 with operand GR32 when
fast-isel is enabled.

```
// X86FastISel.cpp
Register SrcReg = fastEmitInst_(X86::MOV32r0, &X86::GR32RegClass)
```

However, before this patch, compiler only allows GR32_NOREX operand
b/c MOV32r0 is a pseudo instruction. In this patch, we relax the
register class of the operand to GR32 b/c MOV32r0 is always expanded
to XOR32rr, which can use EGPR.

The bug was not introduced by #77433 but caught by it.