[all-commits] [llvm/llvm-project] 0fc5f4: [DAG] Set nneg flag when forming zext in demanded ...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0fc5f4b52460c091608837f05a726c7383898229
      https://github.com/llvm/llvm-project/commit/0fc5f4b52460c091608837f05a726c7383898229
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-01-18 (Thu, 18 Jan 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

  Log Message:
  -----------
  [DAG] Set nneg flag when forming zext in demanded bits (#72281)

We do the same for the analogous transform in DAGCombine, but this case
was missed in the recent patch which added support for zext nneg.

Sorry for the lack of test coverage. Not sure how to exercise this piece
of logic. It appears to have only minimal impact on LIT tests (only
test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll),
and even then, the changes without it appear uninteresting. Maybe we
should remove this transform instead?