[all-commits] [llvm/llvm-project] 430a40: [NVPTX] extend type support for nvvm.{min, max, mulh...

[Alex MacLean via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 430a40d12eaa5a61792c4670955c110146902afb
      https://github.com/llvm/llvm-project/commit/430a40d12eaa5a61792c4670955c110146902afb
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2024-01-17 (Wed, 17 Jan 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsNVVM.td
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
    A llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
    A llvm/test/CodeGen/NVPTX/sad-intrins.ll

  Log Message:
  -----------
  [NVPTX] extend type support for nvvm.{min,max,mulhi,sad} (#78385)

Ensure intrinsics and auto-upgrades support i16, i32, and i64 for for
`nvvm.{min,max,mulhi,sad}`

- `nvvm.min` and `nvvm.max`: These are auto-upgraded to `select`
instructions but it is still nice to support the 16 bit variants just in
case any generators of IR are still trying to use these intrinsics.
- `nvvm.sad` added both the 16 and 64 bit variants, also marked this
instruction as speculateble. These directly correspond to the PTX
`sad.{u16,s16,u64,s64}` instructions.
- `nvvm.mulhi` added the 16 bit variants. These directly correspond to
the PTX `mul.hi.{s,u}16` instructions.