[all-commits] [llvm/llvm-project] c0944f: [llvm][MC][ARM] Don't autoresolve fixups (#76574)

Eleanor Bonnici via All-commits all-commits at lists.llvm.org
Mon Jan 15 10:41:23 PST 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c0944f52c17a30762b81446183967ce3ef6b9aed
      https://github.com/llvm/llvm-project/commit/c0944f52c17a30762b81446183967ce3ef6b9aed
  Author: Eleanor Bonnici <eleanor.bonnici at arm.com>
  Date:   2024-01-15 (Mon, 15 Jan 2024)

  Changed paths:
    M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
    M llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h
    M llvm/test/MC/ARM/pcrel-global.s
    M llvm/test/MC/ARM/pcrel-ldr-relocs.s
    A llvm/test/MC/ARM/pcrel-ldrd-diff-section.s
    A llvm/test/MC/ARM/pcrel-ldrd-same-section.s
    A llvm/test/MC/ARM/pcrel-vldr-diff-section.s
    A llvm/test/MC/ARM/pcrel-vldr-same-section.s

  Log Message:
  -----------
  [llvm][MC][ARM] Don't autoresolve fixups (#76574)

Removes logic that caused some fixups to be marked as resolved in the
assembler without actually resolving them. Assembler must either resolve
the fixup, reject the code (error out) or defer the resolution to the
linker. In general assembler can resolve offsets in pcrel instructions
if the symbol referred to is in the same section and it cannot make
assumptions about relative position of sections. For example, when LDRD
instruction in arm mode is encountered, fixup_arm_pcrel_10_unscaled is
raised. Prior to https://github.com/llvm/llvm-project/pull/72873/ the
assembler would always mark it as resolved without generating a
relocation. The resulting code would likely be incorrect whenever the
label referred to is in a different section.

This patch finishes the series to prevent incorrect code being generated
for pcrel instructions referring to labels in different sections. This
kind of assembly code is very rare and most likely a user error, so both
options (relocation or error) are acceptable. In previous patches this
was resolved by adding relocations. Here, for VLDR instructions an error
is generated as relocation does not exist for Thumb mode and we wanted
the tool's behaviour to be consistent across modes. In the LDRD case,
Thumb mode does not have a relocation and errors out, but LDRD in Arm
mode generates R_ARM_LDRS_PC_G0 relocation because its fixup kind is
shared with other instructions.

It also fixed the case when ADR is used in the big-endian mode, which is
not covered by the ADR patch.

Patch series:
https://github.com/llvm/llvm-project/pull/72873 - LDRx
https://github.com/llvm/llvm-project/pull/73834 - ADR 
this PR - LDRD and VLDR




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