[all-commits] [llvm/llvm-project] 927b8a: [AArch64][GlobalISel] Combine vecreduce(ext) to {U...

[chuongg3 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 927b8a0f4f57a11b245da359b5076b16d969f75d
      https://github.com/llvm/llvm-project/commit/927b8a0f4f57a11b245da359b5076b16d969f75d
  Author: chuongg3 <chuong.goh at arm.com>
  Date:   2024-01-15 (Mon, 15 Jan 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64Combine.td
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrGISel.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
    M llvm/test/CodeGen/AArch64/vecreduce-add.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Combine vecreduce(ext) to {U/S}ADDLV (#75832)