[all-commits] [llvm/llvm-project] cd1d34: [RISCV] Don't check haveNoCommonBitsSet in RISCVGa...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cd1d3445d8a53ef4d667908f0539eda37345defa
      https://github.com/llvm/llvm-project/commit/cd1d3445d8a53ef4d667908f0539eda37345defa
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-01-15 (Mon, 15 Jan 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp

  Log Message:
  -----------
  [RISCV] Don't check haveNoCommonBitsSet in RISCVGatherScatterLowering

If an or instruction has no common bits set in its operands, InstCombine will
set the disjoint flag. This means we shouldn't need to compute it ourselves
anymore in RISCVGatherScatterLowering, and can just rely on said flag being
set.
Originally split out from #77800