[all-commits] [llvm/llvm-project] 9c9bff: [AArch64] Disable FP loads/stores when fp-armv8 no...

[ostannard via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9c9bffe213415eabee1f7751e8e7150d94b36308
      https://github.com/llvm/llvm-project/commit/9c9bffe213415eabee1f7751e8e7150d94b36308
  Author: ostannard <oliver.stannard at arm.com>
  Date:   2024-01-12 (Fri, 12 Jan 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    A llvm/test/MC/AArch64/no-fp-errors.s

  Log Message:
  -----------
  [AArch64] Disable FP loads/stores when fp-armv8 not enabled (#77817)

Most of the floating-point instructions are already gated on the
fp-armv8 subtarget feature (or some other feature), but most of the load
and store instructions, and one move instruction, were not.

I found this list of instructions with a script which consumes the
output of llvm-tblgen --dump-json, looking for instructions which have
an FPR operand but no predicate. That script now finds zero
instructions.

This only affects assembly, not codegen, because the floating-point
types and registers are already not marked as legal when the FPU is
disabled, so it is impossible for any of these to be selected.