[all-commits] [llvm/llvm-project] 274f83: [RISCV] Don't attempt PRE if available info is SEW...
Shengchen Kan via All-commits
all-commits at lists.llvm.org
Thu Jan 11 18:31:21 PST 2024
Branch: refs/heads/users/MaskRay/spr/main.asan-isinterestingalloca-remove-the-isallocapromotable-condition
Home: https://github.com/llvm/llvm-project
Commit: 274f8332b9d1d460d38516f2c685692a46a93c7a
https://github.com/llvm/llvm-project/commit/274f8332b9d1d460d38516f2c685692a46a93c7a
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
Log Message:
-----------
[RISCV] Don't attempt PRE if available info is SEW/LMUL ratio only (#77063)
Commit: 780a5116ba68ec8c53b65008b3407479478b2d5e
https://github.com/llvm/llvm-project/commit/780a5116ba68ec8c53b65008b3407479478b2d5e
Author: David Green <david.green at arm.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
Log Message:
-----------
[AArch64] Fix condition for combining UADDV and Add. (#76809)
This should have been checking that the transform was valid, but used
incorrect conditions letting through invalid combinations of lo/hi
extracts.
Hopefully fixes #76769
Commit: c82c54a1ef89ebd4903adfd977dabd34718a136e
https://github.com/llvm/llvm-project/commit/c82c54a1ef89ebd4903adfd977dabd34718a136e
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang][NFC] Fix trailing whitespace in ReleaseNotes.rst
Commit: 4c8dbb68138959477d9fccbae3669663260dfe31
https://github.com/llvm/llvm-project/commit/4c8dbb68138959477d9fccbae3669663260dfe31
Author: Abhinav271828 <71174780+Abhinav271828 at users.noreply.github.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
A mlir/include/mlir/Analysis/Presburger/Barvinok.h
A mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/CMakeLists.txt
A mlir/unittests/Analysis/Presburger/BarvinokTest.cpp
M mlir/unittests/Analysis/Presburger/CMakeLists.txt
Log Message:
-----------
[MLIR][Presburger] Definitions for basic functions related to cones (#76650)
We add some basic type aliases and function definitions relating to
cones for Barvinok's algorithm.
These include functions to get the dual of a cone and find its index.
Commit: 2835be82db2037367154bc3226473947abbf661f
https://github.com/llvm/llvm-project/commit/2835be82db2037367154bc3226473947abbf661f
Author: Abhinav271828 <71174780+Abhinav271828 at users.noreply.github.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/GeneratingFunction.h
M mlir/unittests/Analysis/Presburger/GeneratingFunctionTest.cpp
Log Message:
-----------
[MLIR][Presburger] Fix ParamPoint to be column-wise instead of row-wise (#77232)
The ParamPoint datatype has each column representing an affine function.
The code for generating functions is modified to reflect this.
Commit: 3eb9fd8ac8bb7524b45912115dc212b7e80be588
https://github.com/llvm/llvm-project/commit/3eb9fd8ac8bb7524b45912115dc212b7e80be588
Author: Bharathi Ramana Joshi <joshibharathiramana at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/unittests/Analysis/Presburger/IntegerRelationTest.cpp
Log Message:
-----------
[MLIR][Presburger] Implement IntegerRelation::mergeAndAlignSymbols (#76736)
Commit: 0903d992cc961281a0bffc8704796f27f8c2e696
https://github.com/llvm/llvm-project/commit/0903d992cc961281a0bffc8704796f27f8c2e696
Author: Bill Wendling <morbo at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
Log Message:
-----------
[NFC][ObjectSizeOffset] Add template stuff for Visual Studio
Visual Studio needs the class template stuff.
C:\llvm\include\llvm/Analysis/MemoryBuiltins.h(217): error C2990: 'llvm::SizeOffsetType': non-class template has already been declared as a class template
C:\llvm\include\llvm/Analysis/MemoryBuiltins.h(193): note: see declaration of 'llvm::SizeOffsetType'
Commit: fd1c156e5d6584684ce58c0536dca96cedcc41f0
https://github.com/llvm/llvm-project/commit/fd1c156e5d6584684ce58c0536dca96cedcc41f0
Author: Bill Wendling <morbo at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
Log Message:
-----------
Revert "[NFC][ObjectSizeOffset] Add template stuff for Visual Studio"
This reverts commit 0903d992cc961281a0bffc8704796f27f8c2e696.
This is causing all non-Visual Studio builds fail.
Commit: 2eb7a82af3b66f9448f9d2843b438fa8ec4ff53f
https://github.com/llvm/llvm-project/commit/2eb7a82af3b66f9448f9d2843b438fa8ec4ff53f
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp.ll
Log Message:
-----------
[InstCombine] Relax the one-use constraints for `icmp pred (binop X, Z), (binop Y, Z)` (#76384)
This patch relaxes the one-use constraints for `icmp pred (binop X, Z),
(binop Y, Z)`. It will enable more optimizations with pointer
arithmetic.
One example in `boost::match_results::set_size`:
```
declare void @use(i64)
define i1 @src(ptr %a1, ptr %a2, ptr %add.ptr.i66, i64 %sub.ptr.rhs.cast.i) {
%sub.ptr.lhs.cast.i = ptrtoint ptr %a1 to i64
%sub.ptr.rhs.cast.i = ptrtoint ptr %a2 to i64
%sub.ptr.sub.i = sub i64 %sub.ptr.lhs.cast.i, %sub.ptr.rhs.cast.i
%sub.ptr.div.i = sdiv exact i64 %sub.ptr.sub.i, 24
call void @use(i64 %sub.ptr.div.i)
%sub.ptr.lhs.cast.i.i = ptrtoint ptr %add.ptr.i66 to i64
%sub.ptr.sub.i.i = sub i64 %sub.ptr.lhs.cast.i.i, %sub.ptr.rhs.cast.i
%sub.ptr.div.i.i = sdiv exact i64 %sub.ptr.sub.i.i, 24
%cmp.i.not.i.i = icmp eq i64 %sub.ptr.div.i.i, %sub.ptr.div.i
ret i1 %cmp.i.not.i.i
}
define i1 @tgt(ptr %a1, ptr %a2, ptr %add.ptr.i66, i64 %sub.ptr.rhs.cast.i) {
%sub.ptr.lhs.cast.i = ptrtoint ptr %a1 to i64
%sub.ptr.rhs.cast.i = ptrtoint ptr %a2 to i64
%sub.ptr.sub.i = sub i64 %sub.ptr.lhs.cast.i, %sub.ptr.rhs.cast.i
%sub.ptr.div.i = sdiv exact i64 %sub.ptr.sub.i, 24
call void @use(i64 %sub.ptr.div.i)
%cmp.i.not.i.i = icmp eq i64 %sub.ptr.sub.i.i, %sub.ptr.sub.i
ret i1 %cmp.i.not.i.i
}
```
Commit: dd450f08cfeb9da372cbe459058bc9ae9425f862
https://github.com/llvm/llvm-project/commit/dd450f08cfeb9da372cbe459058bc9ae9425f862
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/BufferUtils.h
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/lib/Dialect/Bufferization/Transforms/BufferOptimizations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferUtils.cpp
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
Log Message:
-----------
[mlir][Interfaces][NFC] Move region loop detection to `RegionBranchOpInterface` (#77090)
`BufferPlacementTransformationBase::isLoop` checks if there a loop in
the region branching graph of an operation. This algorithm is similar to
`isRegionReachable` in the `RegionBranchOpInterface`. To avoid duplicate
code, `isRegionReachable` is generalized, so that it can be used to
detect region loops. A helper function
`RegionBranchOpInterface::hasLoop` is added.
This change also turns a recursive implementation into an iterative one,
which is the preferred implementation strategy in LLVM.
Also move the `isLoop` to `BufferOptimizations.cpp`, so that we can
gradually retire `BufferPlacementTransformationBase`. (This is so that
proper error handling can be added to `BufferViewFlowAnalysis`.)
Commit: 752df2bc0b606127efea80023b0dfd8a7a36bf8c
https://github.com/llvm/llvm-project/commit/752df2bc0b606127efea80023b0dfd8a7a36bf8c
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/BufferUtils.h
M mlir/include/mlir/IR/Dominance.h
Log Message:
-----------
[mlir][IR] `DominanceInfo`: Add function to query dominator of a range of block (#77098)
Also improve the implementation of `findCommonDominator` (skip duplicate
blocks) and extract it from `BufferPlacementTransformationBase` (so that
`BufferPlacementTransformationBase` can be retired eventually).
Commit: 1f9c2ddd8c1c5ff013c1f3b5570a0af0657311a8
https://github.com/llvm/llvm-project/commit/1f9c2ddd8c1c5ff013c1f3b5570a0af0657311a8
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
Log Message:
-----------
[libc++][test] Improves suspurious clang diagnostics. (#77234)
As suggested by @philnik777 this is a better fix than
02a33b72fd21cdbf476d6bda72faa462e073e510
Fixes: https://github.com/llvm/llvm-project/issues/77123
Commit: 249d2ccb1d8475d3ff4ead9566a83fc0adf476db
https://github.com/llvm/llvm-project/commit/249d2ccb1d8475d3ff4ead9566a83fc0adf476db
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
Log Message:
-----------
[LV] Add test showing overly aggressive dropping of inbounds.
As %B.gep.0 executes unconditionally in the latch, inbounds could
be preserved in the vector version.
https://alive2.llvm.org/ce/z/XWbMuD
Commit: 18ec3304a9e4aed25d998180728faaf02236205d
https://github.com/llvm/llvm-project/commit/18ec3304a9e4aed25d998180728faaf02236205d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
Log Message:
-----------
[VPlan] Manage InBounds via VPRecipeWithIRFlags for VectorPtrRecipe.
As suggested as follow-up in
https://github.com/llvm/llvm-project/pull/72164, manage inbounds via
VPRecipeWithIRFlags.
Note that in some cases we can now preserve inbounds in a few more
cases.
Commit: e497f689236dc2f14f08f09e1af8c2b10820952a
https://github.com/llvm/llvm-project/commit/e497f689236dc2f14f08f09e1af8c2b10820952a
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libcxx/include/tuple
Log Message:
-----------
[NFC][libc++] Formats tuple.
The fix used macros that confuses clang-format. This is formatted with
clang-format and then excluded from formatting.
Commit: 3e498b3db5bdd6b0e8cbebb1d8ac88a59b4eef7a
https://github.com/llvm/llvm-project/commit/3e498b3db5bdd6b0e8cbebb1d8ac88a59b4eef7a
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
Log Message:
-----------
[libc++][doc] Minor release notes style fixes.
Commit: 8f76f1816ea63b7cc28e150ba319ffbfe6351f9e
https://github.com/llvm/llvm-project/commit/8f76f1816ea63b7cc28e150ba319ffbfe6351f9e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
Log Message:
-----------
[OpenMP][Obvious] Fix test failing on BE architectures
Summary:
This accidentally included a byte past the magic, which was out of order
on big endian architectures.
Commit: b306a9c9986f254d0aff5eb892da9359e2588f54
https://github.com/llvm/llvm-project/commit/b306a9c9986f254d0aff5eb892da9359e2588f54
Author: natanelh-mobileye <155897558+natanelh-mobileye at users.noreply.github.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
Log Message:
-----------
[PatternMatch] Fix typo in comment (NFC) (#77240)
Tiny spelling mistake fixup. please review the two lines of code below
to see the correctness of this PR.
Commit: 535d8e8b92e3f8cf4107d9431012310c9a72c8d3
https://github.com/llvm/llvm-project/commit/535d8e8b92e3f8cf4107d9431012310c9a72c8d3
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SwitchLoweringUtils.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SwitchLoweringUtils.cpp
Log Message:
-----------
NFC: Extract switch lowering binary tree splitting code from DAG into SwitchLoweringUtils.
This will help re-use this code with the upcoming GlobalISel implementation of
this optimization.
Commit: 92e243173c09fc78c25814a7d7e392971034f5be
https://github.com/llvm/llvm-project/commit/92e243173c09fc78c25814a7d7e392971034f5be
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/fstream
M libcxx/include/version
M libcxx/src/CMakeLists.txt
A libcxx/src/fstream.cpp
A libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/filebuf/types.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/fstream.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/fstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream/types.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream/types.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/native_handle_assert_test_helpers.h
A libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
A libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream/types.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/types.h
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
Reapply "[libc++][streams] P1759R6: Native handles and file streams" (#77190)
Fixes build on Windows in C++26 mode.
Reverted in:
https://github.com/llvm/llvm-project/commit/40c07b559aa6ab4bac074c943967d3207bc07ae0
Original PR: https://github.com/llvm/llvm-project/pull/76632
---------
Co-authored-by: Zingam <zingam at outlook.com>
Commit: 38228d5efe18cbe45ea02ebb08b2d2a7e4b68560
https://github.com/llvm/llvm-project/commit/38228d5efe18cbe45ea02ebb08b2d2a7e4b68560
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/include/CMakeLists.txt
M libc/src/__support/StringUtil/CMakeLists.txt
Log Message:
-----------
[libc] Fix GPU tests not running after recent patches (#77248)
Summary:
A previous patch added a dependency on the stack protectors, this was
not built on the GPU targets so every test was disabled. It turns out
that disabled tests still get targets so we need to specifically check
if the it is in the target's set of entrypoints before we can use it.
Another patch, because the build-bot was down, snuck in that prevented
the new math tests from being run. The problem is that the `signal.h`
header requires target specific definitions but was being used
unconditionally. I have made changes that disable building this header
if the file is not defined in the config. This required disbaling the
signal_to_string utility, so that will simply be missing from targets
that don't define it.
Commit: fece9818abce9339e3a46ce174c662602e32d593
https://github.com/llvm/llvm-project/commit/fece9818abce9339e3a46ce174c662602e32d593
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libc/include/CMakeLists.txt
Log Message:
-----------
[libc] Attempt to fix incorrect pathin on Linux builds
Commit: c5e35986d8064775182b03a7e1a7e02f1cf7e4a9
https://github.com/llvm/llvm-project/commit/c5e35986d8064775182b03a7e1a7e02f1cf7e4a9
Author: Nicholas Mosier <nh.mosier at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M lld/ELF/Arch/X86_64.cpp
M lld/test/ELF/x86-64-tls-pie.s
Log Message:
-----------
[lld][ELF][X86] Add missing X86_64_TPOFF64 case in switches (#77208)
Close #77201. When linking code with a R_X86_64_TPOFF64 relocation, LLD
exits with an 'unknown reloaction' error message due to two missing
cases in relocation switch statements. This patch adds in those cases so
that LLD successfully links code R_X86_64_TPOFF64 relocations.
Commit: eabaee0c59110d0e11b33a69db54ccda526b35fd
https://github.com/llvm/llvm-project/commit/eabaee0c59110d0e11b33a69db54ccda526b35fd
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/addrspacecast.ll
M llvm/test/CodeGen/RISCV/aext-to-sext.ll
M llvm/test/CodeGen/RISCV/alloca.ll
M llvm/test/CodeGen/RISCV/analyze-branch.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/atomic-load-store.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-sub.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/bf16-promote.ll
M llvm/test/CodeGen/RISCV/bfloat-br-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-frem.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
M llvm/test/CodeGen/RISCV/bfloat.ll
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/byval.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-sext-zext.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll
M llvm/test/CodeGen/RISCV/calls.ll
M llvm/test/CodeGen/RISCV/cm_mvas_mvsa.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/double-arith-strict.ll
M llvm/test/CodeGen/RISCV/double-arith.ll
M llvm/test/CodeGen/RISCV/double-br-fcmp.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert-strict.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/double-fcmp.ll
M llvm/test/CodeGen/RISCV/double-frem.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-previous-failure.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
M llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll
M llvm/test/CodeGen/RISCV/emutls.ll
M llvm/test/CodeGen/RISCV/exception-pointer-register.ll
M llvm/test/CodeGen/RISCV/fastcc-float.ll
M llvm/test/CodeGen/RISCV/fastcc-int.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/fli-licm.ll
M llvm/test/CodeGen/RISCV/float-arith-strict.ll
M llvm/test/CodeGen/RISCV/float-arith.ll
M llvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll
M llvm/test/CodeGen/RISCV/float-br-fcmp.ll
M llvm/test/CodeGen/RISCV/float-convert-strict.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/float-fcmp.ll
M llvm/test/CodeGen/RISCV/float-frem.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-mem.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/float-round-conv.ll
M llvm/test/CodeGen/RISCV/float-zfa.ll
M llvm/test/CodeGen/RISCV/fmax-fmin.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fp16-promote.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/frame-info.ll
M llvm/test/CodeGen/RISCV/frame.ll
M llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll
M llvm/test/CodeGen/RISCV/ghccc-rv32.ll
M llvm/test/CodeGen/RISCV/ghccc-rv64.ll
M llvm/test/CodeGen/RISCV/ghccc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-br-fcmp.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-frem.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-mem.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
M llvm/test/CodeGen/RISCV/interrupt-attr.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/libcall-tail-calls.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/machine-outliner-and-machine-copy-propagation.ll
M llvm/test/CodeGen/RISCV/machine-outliner-throw.ll
M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
M llvm/test/CodeGen/RISCV/mem.ll
M llvm/test/CodeGen/RISCV/mem64.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/nest-register.ll
M llvm/test/CodeGen/RISCV/nomerge.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr51206.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/reduce-unnecessary-extension.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/remat.ll
M llvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
M llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64-large-stack.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/div.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/mem64.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rem.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rv64i-complex-float.ll
M llvm/test/CodeGen/RISCV/rv64i-double-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr63596.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
M llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
M llvm/test/CodeGen/RISCV/select-and.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-or.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
M llvm/test/CodeGen/RISCV/shrinkwrap-jump-table.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/split-sp-adjust.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/stack-protector-target.ll
M llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/RISCV/stack-realignment.ll
M llvm/test/CodeGen/RISCV/stack-slot-size.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/tls-models.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/vlenb.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/CodeGen/RISCV/zcmp-with-float.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
M llvm/test/MC/RISCV/function-call.s
M llvm/test/MC/RISCV/tail-call.s
Log Message:
-----------
[RISCV] Omit "@plt" in assembly output "call foo at plt" (#72467)
R_RISCV_CALL/R_RISCV_CALL_PLT distinction is not necessary and
R_RISCV_CALL has been deprecated. Since https://reviews.llvm.org/D132530
`call foo` assembles to R_RISCV_CALL_PLT. The `@plt` suffix is not
useful and can be removed now (matching AArch64 and PowerPC).
GNU assembler assembles `call foo` to RISCV_CALL_PLT since 2022-09
(70f35d72ef04cd23771875c1661c9975044a749c).
Without this patch, unconditionally changing MO_CALL to MO_PLT could
create `jump .L1 at plt, a0`, which is invalid in LLVM integrated assembler
and GNU assembler.
Commit: 360996ac5ad26714a6ddbee45730fbcfb7dc3eea
https://github.com/llvm/llvm-project/commit/360996ac5ad26714a6ddbee45730fbcfb7dc3eea
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/variadic-call.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ceil-floor.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv64.mir
M llvm/test/CodeGen/RISCV/float-select-verify.ll
M llvm/test/CodeGen/RISCV/live-sp.mir
M llvm/test/CodeGen/RISCV/make-compressible.mir
M llvm/test/CodeGen/RISCV/mir-target-flags.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
M llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
M llvm/test/CodeGen/RISCV/vector-abi.ll
Log Message:
-----------
[RISCV] Merge machine operand flag MO_PLT into MO_CALL (#77253)
Since #72467, `@plt` in assembly output "call foo at plt" is omitted. We
can trivially merge MO_PLT and MO_CALL without any functional change to
assembly/relocatable file output.
Earlier architectures use different call relocation types whether a PLT
is potentially needed: R_386_PLT32/R_386_PC32, R_68K_PLT32/R_68K_PC32,
R_SPARC_WDISP30/R_SPARC_WPLT320. However, as the PLT property is
per-symbol instead of per-call-site and linkers can optimize out a PLT,
the distinction has been confusing.
Arm made good names R_ARM_CALL/R_AARCH64_CALL. Let's use MO_CALL instead
of MO_PLT.
As follow-ups, we can merge fixup_riscv_call/fixup_riscv_call_plt and
VK_RISCV_CALL/VK_RISCV_CALL_PLT.
Commit: 4ca1b5e094280ef1af40412e3cfcb62dc3cf15bc
https://github.com/llvm/llvm-project/commit/4ca1b5e094280ef1af40412e3cfcb62dc3cf15bc
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw-sysroot.cpp
Log Message:
-----------
[clang] [MinGW] Don't look for a GCC in path if the install base has a proper mingw sysroot (#76949)
This fixes uses of the MSYS2 clang64 environment compilers, if another
set of GCC based compilers are available further back in PATH (which may
be explicitly added, or inherited unintentionally from other software
installed).
(The issue in the clang64 environment can be worked around somewhat by
installing *-gcc-compat packages which present aliases named
<triple>-gcc within the clang64 environment as well.)
This fixes https://github.com/msys2/MINGW-packages/issues/11495 and
https://github.com/msys2/MINGW-packages/issues/19279.
Commit: f8c5541f5a6b6e4806f9fb5ab191d4a7e60609c4
https://github.com/llvm/llvm-project/commit/f8c5541f5a6b6e4806f9fb5ab191d4a7e60609c4
Author: Bill Wendling <morbo at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
Log Message:
-----------
[NFC][ObjectSize] Make method public
Windows barfs on the 'friend class SizeOffsetType;' statement. Attempt
to fix by making the method called by the "friend" class public.
Commit: 0359acf0f5f04da184386c886d56ee45db7b7be0
https://github.com/llvm/llvm-project/commit/0359acf0f5f04da184386c886d56ee45db7b7be0
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
A lld/test/ELF/eh-frame-nonzero-offset-riscv.s
Log Message:
-----------
[ELF,test] Add eh-frame-nonzero-offset-riscv.s for #65966
I plan to define RISCV::relocateAllocate in a subsequent change.
Add a test to verify
`else if (auto *ehIn = dyn_cast<EhInputSection>(&sec)) secAddr += ehIn->getParent()->outSecOff;`
Commit: 60c4f82d3c4e9cfc337c360f489d830d0379b04d
https://github.com/llvm/llvm-project/commit/60c4f82d3c4e9cfc337c360f489d830d0379b04d
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/test/Instrumentation/InstrProfiling/platform.ll
M llvm/test/Instrumentation/InstrProfiling/profiling.ll
Log Message:
-----------
[InstrProfiling] No runtime registration for ELF, COFF, Mach-O and XCOFF (#77225)
Whether runtime registration is needed is not dependent on the OS but
the file format. For ELF, COFF, Mach-O or XCOFF, we can always use the
linker support. This is important for baremetal platforms such as RTOS
and UEFI platforms where there is no OS but we still don't want to use
runtime registration and rely on linker support instead.
Commit: c7cae61b289fd12171a2da80a6e90b867ee1c4fc
https://github.com/llvm/llvm-project/commit/c7cae61b289fd12171a2da80a6e90b867ee1c4fc
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
Log Message:
-----------
[NFC] Remove trailing whitespace in `llvm/lib/Target/AMDGPU/VOP2Instructions.td`
Commit: d6aef863d83e5a352e78a0211a935a59efda0a0c
https://github.com/llvm/llvm-project/commit/d6aef863d83e5a352e78a0211a935a59efda0a0c
Author: Chen Zheng <czhengsz at cn.ibm.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
Log Message:
-----------
[PowerPC] make LR/LR8 CTR/CTR8 aliased (#76926)
fixes https://github.com/llvm/llvm-project/issues/47156
fixes https://github.com/llvm/llvm-project/issues/47155
Commit: 5034994134bbec92c1f1116c56008ac504f7d763
https://github.com/llvm/llvm-project/commit/5034994134bbec92c1f1116c56008ac504f7d763
Author: Haocong Lu <74847248+Luhaocong at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/AST/FormatString.cpp
M clang/test/Sema/attr-format.c
M clang/test/SemaCXX/attr-format.cpp
M clang/test/SemaCXX/format-strings-scanf.cpp
Log Message:
-----------
[Sema] Warning for _Float16 passed to format specifier '%f' (#74439)
According to https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2844.pdf,
default argument promotions for _FloatN types has been removed.
A warning is needed to notice user to promote _Float16 to double
explicitly, and then pass it to format specifier '%f', which is
consistent with GCC.
Fixes: https://github.com/llvm/llvm-project/issues/68538
Commit: 78550bef98347bccbf0e8e5fb66dc59718fc35ec
https://github.com/llvm/llvm-project/commit/78550bef98347bccbf0e8e5fb66dc59718fc35ec
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[CMake] Include riscv32-unknown-elf runtimes in Fuchsia toolchain (#76849)
This contains compiler-rt builtins and llvm-libc for baremetal use.
Differential Revision: https://reviews.llvm.org/D155337
Commit: 225e2704af3c53bc0c4ee6bf92f32ace54d10fbc
https://github.com/llvm/llvm-project/commit/225e2704af3c53bc0c4ee6bf92f32ace54d10fbc
Author: Kai Luo <gluokai at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
A llvm/test/CodeGen/PowerPC/intrinsic-trap.ll
Log Message:
-----------
[PowerPC] Precommit test for lowering llvm.trap on ppc64le. NFC.
Commit: b58a97d6aea12a30e2d1b01c6289abb2fd061f0b
https://github.com/llvm/llvm-project/commit/b58a97d6aea12a30e2d1b01c6289abb2fd061f0b
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
Log Message:
-----------
[RISCV][NFC] Move Zawrs/Zacas implementation to RISCVInstrInfoZa.td (#76940)
To keep the structure of TableGen files clear.
The definitions are simplified by the way.
Commit: a90ed3e8a4ea8c5238fd660bbac0371366afe3b5
https://github.com/llvm/llvm-project/commit/a90ed3e8a4ea8c5238fd660bbac0371366afe3b5
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
Revert "[CMake] Include riscv32-unknown-elf runtimes in Fuchsia toolchain (#76849)"
This reverts commit 78550bef98347bccbf0e8e5fb66dc59718fc35ec since
it broke the two stage build.
Commit: f22cde10e7cc711bba9f43d7529ea6c1394c5b48
https://github.com/llvm/llvm-project/commit/f22cde10e7cc711bba9f43d7529ea6c1394c5b48
Author: Ningning Shi(史宁宁) <shiningning at iscas.ac.cn>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/ARM/ARMLegalizerInfo.h
M llvm/lib/Target/M68k/GISel/M68kLegalizerInfo.h
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
Log Message:
-----------
[GlobalISel][NFC]Delete the comments of XXLegalizerInfo (#76918)
Delete the LegalizerInfo comments of AArch64/AMD64/ARM/M68k/RISCV/x86,
they are copied from register bank.
Commit: ce944597e43ae4f77260d4683f8d6535947fb0a2
https://github.com/llvm/llvm-project/commit/ce944597e43ae4f77260d4683f8d6535947fb0a2
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn] port 92e243173c09
Commit: 1dfb9498333a6c7c6ac012eb70dc593f5165a025
https://github.com/llvm/llvm-project/commit/1dfb9498333a6c7c6ac012eb70dc593f5165a025
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
R lld/test/ELF/linkerscript/overlay-reject.test
R lld/test/ELF/linkerscript/overlay-reject2.test
M lld/test/ELF/linkerscript/overlay.test
Log Message:
-----------
[ELF] Improve OVERLAY tests
Also test two issues:
* When the start address is `.`, subsequent sections don't share the
address of the first overlay section.
* When the first overlay section is empty and discardable, `p_paddr` is
incorrectly zero. This is because a discarded section has a zero
address, causing `prev->getLMA() + prev->size` where `prev` refers to
the first section to evaluate to zero.
Commit: 93c8468c6cd154efb8fae16a4025e116be8181c7
https://github.com/llvm/llvm-project/commit/93c8468c6cd154efb8fae16a4025e116be8181c7
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
Log Message:
-----------
[X86][NFC] Remove duplicate comments in X86CompressEVEX.cpp
Commit: 624b48789f6941d5f10c9ddf144e2bf72365fdd1
https://github.com/llvm/llvm-project/commit/624b48789f6941d5f10c9ddf144e2bf72365fdd1
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
Log Message:
-----------
[AArch64][NFC] Pre-commit IR translator switch lowering test.
Commit: b3037ae1fc6d26459e37f813757ad30872eb2eee
https://github.com/llvm/llvm-project/commit/b3037ae1fc6d26459e37f813757ad30872eb2eee
Author: Christian Ulmann <christianulmann at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugFoundation.cpp
M flang/test/Transforms/debug-line-table-existing.fir
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table.fir
M mlir/examples/toy/Ch6/toyc.cpp
M mlir/examples/toy/Ch7/toyc.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/Transforms/Passes.td
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
M mlir/test/Dialect/LLVMIR/call-location.mlir
M mlir/test/Dialect/LLVMIR/debuginfo.mlir
M mlir/test/Dialect/LLVMIR/global.mlir
M mlir/test/Dialect/LLVMIR/invalid-call-location.mlir
M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/loop-metadata.mlir
Log Message:
-----------
[MLIR][LLVM] Add distinct identifier to DICompileUnit attribute (#77070)
This commit adds a distinct attribute parameter to the DICompileUnit to
enable the modeling of distinctness. LLVM requires DICompileUnits to be
distinct and there are cases where one gets two equivalent compilation
units but LLVM still requires differentiates them. We observed such
cases for combinations of LTO and inline functions.
This patch also changes the DIScopeForLLVMFuncOp pass to a module pass,
to ensure that only one distinct DICompileUnit is created, instead of
one for each function.
Commit: 9b808a4beb8e6c8255b412fdd6f5a3e20cbcf270
https://github.com/llvm/llvm-project/commit/9b808a4beb8e6c8255b412fdd6f5a3e20cbcf270
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
A clang/test/Modules/explicit-specializations.cppm
Log Message:
-----------
[NFC] [Modules] Add a test case for selecting specializations with aliased template args
This a test for https://github.com/llvm/llvm-project/pull/76774. In the
review comments, we're concerning about the case that ODRHash may
produce the different hash values for semantical same template
arguments. For example, if the template argument in a specialization is
not qualified and the semantical same template argument in the instantiation
point is qualified, we should be able to select that template
specialization. And this patch tests this behavior: we should be able to select
the correct specialization with semantical same template arguments.
Commit: fe1364f1e7ac0c4d0f9a4b15189485782241190d
https://github.com/llvm/llvm-project/commit/fe1364f1e7ac0c4d0f9a4b15189485782241190d
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
Log Message:
-----------
Update pre-committed test. Accidentally committed the wrong version, this one
properly demonstrates the upcoming change.
Commit: 9de81ce87d9f99850d427c9e0440440b5ef9ebbf
https://github.com/llvm/llvm-project/commit/9de81ce87d9f99850d427c9e0440440b5ef9ebbf
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
Log Message:
-----------
NFC: Another pre-commit test change.
Commit: bae1fdea712fcd0b0ea525b115e661f92263f2e7
https://github.com/llvm/llvm-project/commit/bae1fdea712fcd0b0ea525b115e661f92263f2e7
Author: Christian Ulmann <christianulmann at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugFoundation.cpp
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table.fir
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/Import/global-variables.ll
Log Message:
-----------
[MLIR][LLVM] Add distinct identifier to the DISubprogram attribute (#77093)
This commit adds an optional distinct attribute parameter to the
DISubprogramAttr. This enables modeling of distinct subprograms, as
required for LLVM IR. This change is required to avoid accidential
uniquing of subprograms on functions that would lead to invalid LLVM IR
post export.
Commit: 7e54ae24d84bce4452ac4a28acb6568db52980fb
https://github.com/llvm/llvm-project/commit/7e54ae24d84bce4452ac4a28acb6568db52980fb
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMInlining.cpp
M mlir/test/Dialect/LLVMIR/inlining.mlir
Log Message:
-----------
[mlir][llvm] Do not inline variadic functions (#77241)
This revision updates the llvm dialect inliner to explicitly disallow
the inlining of variadic functions. Already previously the inlining
failed if the number of function arguments did not match the number of
call arguments. After the change, inlining checks the function is not
variadic and it does not contain a va_start intrinsic.
Commit: c15e5836d49763e43736d13eb4b873e01dcc9ef0
https://github.com/llvm/llvm-project/commit/c15e5836d49763e43736d13eb4b873e01dcc9ef0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/test/AST/Interp/arrays.cpp
Log Message:
-----------
[clang][Interp] Fix nullptr array dereferencing (#75798)
The attached test case would cause an assertion failure in Pointer.h
when operating on a null pointer.
Commit: 6343b4e48205fe5772f707b9023e8a57c95154a9
https://github.com/llvm/llvm-project/commit/6343b4e48205fe5772f707b9023e8a57c95154a9
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/include/mlir/ExecutionEngine/RunnerUtils.h
Log Message:
-----------
[mlir] Apply ClangTidy performance finding
- Use '\n' instead of std::endl;
https://clang.llvm.org/extra/clang-tidy/checks/performance/avoid-endl.html
Commit: ca20c99bb185838e5f275cf27fdcaccb17d7978d
https://github.com/llvm/llvm-project/commit/ca20c99bb185838e5f275cf27fdcaccb17d7978d
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
Log Message:
-----------
[GlobalISel][IRTranslator] Port switch binary tree search optimization. (#77279)
This re-uses some code extracted earlier from SelectionDAG into
SwitchLoweringUtils
Much of the code is a straight port from SDAG's splitWorkItem(), with
minor changes needed for GISel.
Commit: 2642240de9b9004a431f4e601c055c8c135c9d39
https://github.com/llvm/llvm-project/commit/2642240de9b9004a431f4e601c055c8c135c9d39
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/include/mlir/ExecutionEngine/RunnerUtils.h
Log Message:
-----------
[mlir] Add explicit call to flush
ClangTidy performance suggested to use '\n' instead of std::endl, but it
seems the flushing behavior was intended here (tests started failing).
Commit: 3574b61013b341c96d5c9b7d2ca5480a398586b3
https://github.com/llvm/llvm-project/commit/3574b61013b341c96d5c9b7d2ca5480a398586b3
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Analysis/VFABIDemangling.cpp
M llvm/unittests/Analysis/VectorFunctionABITest.cpp
Log Message:
-----------
[VFABI] Reject demangled variants with unexpected number of params. (#76855)
When demangling a vector variant we are not checking that the number of
parameters is the same as that of the scalar function. This check is
hoisted out of getScalableECFromSignature() making the equvalent check
in the unittests obsolete.
Commit: 1c674666fa3bc0cf6d62d920bdddc846b8105d12
https://github.com/llvm/llvm-project/commit/1c674666fa3bc0cf6d62d920bdddc846b8105d12
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86.ll
M llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll
M llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll
M llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll
M llvm/test/CodeGen/X86/invpcid-intrinsic.ll
M llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll
M llvm/test/CodeGen/X86/movdir-intrinsic-x86_64.ll
M llvm/test/CodeGen/X86/sha.ll
M llvm/test/CodeGen/X86/x64-cet-intrinsics.ll
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
Log Message:
-----------
[X86] Support EVEX compression for EGPR (#77202)
Compress promoted instruction (EVEX) to pre-promotion instruction
(legacy/VEX) when R16-R31 is not used.
Alternative of #77065
Commit: 68a1583a8900fe13e33fe9ff6005f7a3e5b82c53
https://github.com/llvm/llvm-project/commit/68a1583a8900fe13e33fe9ff6005f7a3e5b82c53
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-armpl.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef-scalable.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-sleef.ll
Log Message:
-----------
[TLI] replace-with-veclib works with FRem Instruction. (#76166)
Updated SLEEF and ArmPL tests with Fixed-Width and Scalable cases for
frem. Those are mapped to fmod/fmodf.
Commit: acbb491ab23fd04e201b58195f78e04c5a647d47
https://github.com/llvm/llvm-project/commit/acbb491ab23fd04e201b58195f78e04c5a647d47
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxx/cmake/caches/Armv7M-picolibc.cmake
M libcxx/utils/qemu_baremetal.py
Log Message:
-----------
[libcxx] Require qemu-system-arm for armv7m builder (#77067)
And add a check in the python script that the binary given to `--qemu`
actually exists. Otherwise you get a generic Python error:
```
# .---command stderr------------
# | Traceback (most recent call last):
# | File "/home/david.spickett/modules-llvm-project/libcxx/utils/qemu_baremetal.py", line 70, in <module>
# | exit(main())
# | File "/home/david.spickett/modules-llvm-project/libcxx/utils/qemu_baremetal.py", line 66, in main
# | os.execvp(qemu_commandline[0], qemu_commandline)
# | File "/usr/lib/python3.8/os.py", line 568, in execvp
# | _execvpe(file, args)
# | File "/usr/lib/python3.8/os.py", line 610, in _execvpe
# | raise last_exc
# | File "/usr/lib/python3.8/os.py", line 601, in _execvpe
# | exec_func(fullname, *argrest)
# | FileNotFoundError: [Errno 2] No such file or directory
# `-----------------------------
# error: command failed with exit status: 1
```
When it tries to run the entire command later.
For the builder, it's only ever going to use qemu-system-arm so error at
config time if it's not there.
Commit: ed1632b72ec029256f3af60822dad54970a79577
https://github.com/llvm/llvm-project/commit/ed1632b72ec029256f3af60822dad54970a79577
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
Log Message:
-----------
[ConstraintElim] Support signed induction variables (#77103)
When adding information for induction variables, add both unsigned and
signed constraints, with corresponding signed and unsigned
preconditions.
I believe the logic here is equally valid for signed/unsigned, we just
need to add preconditions of the same type.
Commit: 2c213c45046b78eac48809b013e7a80099607ebb
https://github.com/llvm/llvm-project/commit/2c213c45046b78eac48809b013e7a80099607ebb
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/test/Driver/riscv-rvv-vector-bits.c
Log Message:
-----------
[Clang] Fix reference to sve in rvv driver test comment. NFC
Commit: d02c7931d1be794a230943e300fec4172032e6a8
https://github.com/llvm/llvm-project/commit/d02c7931d1be794a230943e300fec4172032e6a8
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Analysis/MemorySSAUpdater.cpp
A llvm/test/Transforms/SimpleLoopUnswitch/memssa-readnone-access.ll
Log Message:
-----------
[MSSA] Don't require clone creation to succeed (#76819)
Sometimes, we create a MemoryAccess for an instruction, which is later
simplified (e.g. via devirtualization) such that the new instruction has
no memory effects anymore.
If we later clone the instruction (e.g. during unswitching), then MSSA
will not create a MemoryAccess for the new instruction, triggering an
assert.
Disable the assertion (by passing CreationMustSucceed=false) and adjust
getDefiningAccessForClone() to work correctly in that case.
This PR implements the alternative suggestion by alinas from
https://github.com/llvm/llvm-project/pull/76142.
Commit: 442f67c8702a792a135d61765909b732827d6bf2
https://github.com/llvm/llvm-project/commit/442f67c8702a792a135d61765909b732827d6bf2
Author: Lu Haocong <haoconglu at qq.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
A clang/test/Sema/attr-format-Float16.c
M clang/test/Sema/attr-format.c
A clang/test/SemaCXX/attr-format-Float16.cpp
M clang/test/SemaCXX/attr-format.cpp
M clang/test/SemaCXX/format-strings-scanf.cpp
Log Message:
-----------
[Sema][test] Split format attribute test cases for _Float16
Fixes https://github.com/llvm/llvm-project/pull/74439#issuecomment-1880528376
Commit: 0ba868db709d2822b00f4ee9552d7fe41e5f2722
https://github.com/llvm/llvm-project/commit/0ba868db709d2822b00f4ee9552d7fe41e5f2722
Author: Javed Absar <106147771+javedabsar1 at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/BufferViewFlowAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
Log Message:
-----------
[MLIR][Bufferizer][NFC] Simplify some codes. (#77254)
NFC. clean up.
Commit: 27f547968cce89d4706ae2b27a0c15254d1670ee
https://github.com/llvm/llvm-project/commit/27f547968cce89d4706ae2b27a0c15254d1670ee
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Break after string literals with trailing line breaks (#76795)
This restores a subset of functionality that was forego in
d68826dfbd987377ef6771d40c1d984f09ee3b9e.
Streaming multiple string literals is rare enough in practice, hence
that change makes sense in general. But it seems people were
incidentally relying on this for having line breaks after string
literals that ended with `\n`.
This patch tries to restore that behavior to prevent regressions in the
upcoming LLVM release, until we can implement some configuration based
approach as proposed in https://github.com/llvm/llvm-project/pull/69859.
Commit: a831a21e4d8d41b044edaf61a90debb2ad756bda
https://github.com/llvm/llvm-project/commit/a831a21e4d8d41b044edaf61a90debb2ad756bda
Author: Mitch Phillips <31459023+hctim at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
M lld/test/ELF/aarch64-memtag-android-abi.s
Log Message:
-----------
[lld] [MTE] Allow android note for static executables. (#77078)
Florian pointed out that we're accidentally eliding the Android note for
static executables, as it's guarded behind the "can have memtag globals"
conditional. Of course, memtag globals are unsupported for static
executables, but we should still allow static binaries to produce the
Android note (as that's the only way they get MTE).
Commit: a9ffc92fc4428723e85485102dfe10fbea966e64
https://github.com/llvm/llvm-project/commit/a9ffc92fc4428723e85485102dfe10fbea966e64
Author: Nathan Gauër <brioche at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll
Log Message:
-----------
[SPIR-V] Add pre-headers to loops. (#75844)
This is the first of the 7 steps outlined in #75801. This PR explicitely
calls the SimplifyLoops pass. Directly following this pass should follow
the 6 others required to structurize the IR.
Running this pass could generate empty basic-blocks, which are implicit
fallthrough to the successor BB.
There was a specific condition in the SPIR-V ISel which handled implicit
fallthrough, but it couldn't work on empty basic-blocks. This commits
removes the old logic, and adds this new logic, which checks all
basic-blocks for implicit fallthroughs, including empty ones.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 10b5b5d6e2df25dab86fe89a78c5df6f507f6e50
https://github.com/llvm/llvm-project/commit/10b5b5d6e2df25dab86fe89a78c5df6f507f6e50
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang] Fix a crash when referencing the result if the overload fails (#77288)
after 20a05677f9394d4bc9467fe7bc93a4ebd3aeda61
If the overload fails, the `Best` might point to the `end()`,
referencing it leads to asan crashes.
Commit: e35c912039a644a2cc44cf88f451f7a2cdc455d9
https://github.com/llvm/llvm-project/commit/e35c912039a644a2cc44cf88f451f7a2cdc455d9
Author: Liao Chunyu <chunyu at iscas.ac.cn>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV][NFC] Fix gcc -Wparentheses warning in RISCVISelDAGToDAG.cpp
warning:
RISCVISelDAGToDAG.cpp:767: warning: suggest parentheses around ‘&&’ within ‘||’ [-Wparentheses]
767 | AM == ISD::POST_INC && "Unexpected addressing mode");
Commit: c8c525678e6dab2796c1996e0cdea31d4a865a9d
https://github.com/llvm/llvm-project/commit/c8c525678e6dab2796c1996e0cdea31d4a865a9d
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/lib/Frontend/FrontendActions.cpp
Log Message:
-----------
[Flang] Remove unused triple variable. NFC (#77275)
I'm not sure why we don't get an unused variable warning, but triple
doesn't
seem to be used after 898db1136e679.
Commit: fb72a445c1abb21034dc4a63b8489f39150a5566
https://github.com/llvm/llvm-project/commit/fb72a445c1abb21034dc4a63b8489f39150a5566
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
Log Message:
-----------
[X86] Emit NDD2NonNDD entris in the EVEX comprerssion table, NFCI
This patch is a straightfoward change based on the design in #77202.
It does not have any effect since we haven't supported compressing ND
to non-ND in X86CompressEVEX.cpp.
Commit: 4fdd24b8d355e49d657c7c8a380b6f9b1b47ce1e
https://github.com/llvm/llvm-project/commit/4fdd24b8d355e49d657c7c8a380b6f9b1b47ce1e
Author: OCHyams <orlando.hyams at sony.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
Log Message:
-----------
[RemoveDIs][NFC] Update SelectionDAG test to check RemoveDIs mode too
In line with other RemoveDIs test updates. This test fails without #76941.
Commit: bdbaf6e61b63e24b94c85d7f71c11c212cd4cc9b
https://github.com/llvm/llvm-project/commit/bdbaf6e61b63e24b94c85d7f71c11c212cd4cc9b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16.ll
Log Message:
-----------
AMDGPU: Make v8bf16/v16bf16 legal types (#76678)
Depends #76217
Commit: 67782d2de5ea9c8653b8f0110237a3c355291c0e
https://github.com/llvm/llvm-project/commit/67782d2de5ea9c8653b8f0110237a3c355291c0e
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/unittests/Runtime/ExternalIOTest.cpp
Log Message:
-----------
[flang] Remove duplicate tests. (#77059)
Commit: d218092543b3f9ba2204d7c8fe5ac70befa3d772
https://github.com/llvm/llvm-project/commit/d218092543b3f9ba2204d7c8fe5ac70befa3d772
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/test/Transforms/SCCP/switch.ll
Log Message:
-----------
[SCCP] Check whether the default case is reachable (#76295)
This patch eliminates unreachable default cases using range information.
Fixes #76085.
Commit: 8b49ed8ba1ba5ecd35bd1efa4be5a0f56b0135b8
https://github.com/llvm/llvm-project/commit/8b49ed8ba1ba5ecd35bd1efa4be5a0f56b0135b8
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/inline-sourcefile/TestInlineSourceFiles.py
Log Message:
-----------
[lldb][test] Skip DWARF inline source file test on Windows
This was added by 917b404e2ccdcc31d2d64971ad094b80967a240b
and fails for unknown reasons.
Commit: ba4cf31facdaf9bb9943c057d325ff0968331e9a
https://github.com/llvm/llvm-project/commit/ba4cf31facdaf9bb9943c057d325ff0968331e9a
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/test/API/commands/expression/nested/TestNestedExpressions.py
Log Message:
-----------
[lldb][test] Skip part of nested expressions test on Windows
This was added by e42edb5547618c172abe25914000bb61f5278c4c and
has been failing: https://lab.llvm.org/buildbot/#/builders/219/builds/8012
Commit: eb523a4d272e81c8f7bf48da3923ed502f41c187
https://github.com/llvm/llvm-project/commit/eb523a4d272e81c8f7bf48da3923ed502f41c187
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/vec_extract-avx.ll
M llvm/test/CodeGen/X86/vec_extract-mmx.ll
M llvm/test/CodeGen/X86/vec_extract-sse4.ll
M llvm/test/CodeGen/X86/vec_extract.ll
Log Message:
-----------
[X86] vec_extract - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: e3f8e44b00ecb95818bc68c693b6637460112b2a
https://github.com/llvm/llvm-project/commit/e3f8e44b00ecb95818bc68c693b6637460112b2a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-lzcnt-256.ll
M llvm/test/CodeGen/X86/vector-tzcnt-256.ll
Log Message:
-----------
[X86] vector-lzcnt-256.ll / vector-tzcnt-256.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: f1e3a8f1eb7877b07d386af1a02cd7578a76c7d1
https://github.com/llvm/llvm-project/commit/f1e3a8f1eb7877b07d386af1a02cd7578a76c7d1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/avx2-gather.ll
Log Message:
-----------
[X86] avx2-gather.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 0e4a38018a7228d93d72a31d9fae6855f866dded
https://github.com/llvm/llvm-project/commit/0e4a38018a7228d93d72a31d9fae6855f866dded
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/avx2-nontemporal.ll
Log Message:
-----------
[X86] avx2-nontemporal.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 2edce427a8b17d1d2192c1ee4a2227b6eb2971a0
https://github.com/llvm/llvm-project/commit/2edce427a8b17d1d2192c1ee4a2227b6eb2971a0
Author: Xing Xue <57193974+xingxue-ibm at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
M openmp/runtime/CMakeLists.txt
M openmp/runtime/cmake/LibompGetArchitecture.cmake
M openmp/runtime/cmake/config-ix.cmake
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_config.h.cmake
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_global.cpp
M openmp/runtime/src/kmp_gsupport.cpp
M openmp/runtime/src/kmp_os.h
M openmp/runtime/src/kmp_platform.h
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_wrapper_getpid.h
M openmp/runtime/src/z_Linux_util.cpp
M openmp/runtime/test/lit.cfg
Log Message:
-----------
[openmp][AIX]Initial changes for porting to AIX (#76841)
This PR contains initial changes for building and testing libomp on AIX.
More changes will follow.
- `KMP_OS_AIX` is defined for the AIX platform
- `KMP_ARCH_PPC` is defined for 32-bit PPC
- `KMP_ARCH_PPC_XCOFF` and `KMP_ARCH_PPC64_XCOFF` are for 32- and 64-bit
XCOFF object formats respectively
- Assembly file `z_AIX_asm.S` is used for AIX specific assembly code and
will be added in a separate PR
- The target library is disabled because AIX does not have the device
support
- OMPT is temporarily disabled
Commit: 763109e346b90193027b24743e266495d992b1c6
https://github.com/llvm/llvm-project/commit/763109e346b90193027b24743e266495d992b1c6
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir][gpu] Use `known_block_size` to set `maxntid` for NVVM target (#77301)
Setting thread block size with `maxntid` on the kernel has great
performance benefits. In this way, downstream PTX compiler can do better
register allocation.
MLIR's `gpu.launch` and `gpu.launch_func` already has an attribute
(`known_block_size`) that keeps the thread block size when it is known.
This PR simply uses this attribute to set `maxntid`.
Commit: 4a456489e051ff037655597a0b54654aa1f5a2a5
https://github.com/llvm/llvm-project/commit/4a456489e051ff037655597a0b54654aa1f5a2a5
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/test/Lower/OpenMP/FIR/declare-target-implicit-func-and-subr-cap-enter.f90
M flang/test/Lower/OpenMP/FIR/declare-target-implicit-func-and-subr-cap.f90
M flang/test/Lower/OpenMP/declare-target-implicit-func-and-subr-cap-enter.f90
M flang/test/Lower/OpenMP/declare-target-implicit-func-and-subr-cap.f90
Log Message:
-----------
[Flang][OpenMP] Disable declarate target tests on Windows (#77306)
These tests seem to be failing in Windows bots.
See https://github.com/llvm/llvm-project/issues/77086
Commit: f0f16be77e1977d04535556ef69eaccd5bfef36f
https://github.com/llvm/llvm-project/commit/f0f16be77e1977d04535556ef69eaccd5bfef36f
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang][Sema][NFC] Clean up BuildOverloadedCallExpr
Commit: 7ca4473dd97328ebaa95dd3411e3c817935389de
https://github.com/llvm/llvm-project/commit/7ca4473dd97328ebaa95dd3411e3c817935389de
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] Add new cache flushing instructions for GFX12 (#76944)
Co-authored-by: Diana Picus <Diana-Magda.Picus at amd.com>
Commit: 2bf01d73f6ebca11f36c17a65b7a86109d44681e
https://github.com/llvm/llvm-project/commit/2bf01d73f6ebca11f36c17a65b7a86109d44681e
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
A lldb/test/Shell/SymbolFile/DWARF/Inputs/dwo-static-data-member.cpp
A lldb/test/Shell/SymbolFile/DWARF/dwo-static-data-member-access.test
Log Message:
-----------
[lldb][DWARFASTParserClang] GetClangDeclForDIE: don't create VarDecl for static data members (#77155)
With DWARFv5, C++ static data members are represented as
`DW_TAG_variable`s (see `faa3a5ea9ae481da757dab1c95c589e2d5645982`).
In GetClangDeclForDIE, when trying to parse the `DW_AT_specification`
that a static data member's CU-level `DW_TAG_variable` points to, we
would try to `CreateVariableDeclaration`. Whereas previously it was a
no-op (for `DW_TAG_member`s). However, adding `VarDecls` to RecordDecls
for static data members should always be done in
`CreateStaticMemberVariable`. The test-case is an exapmle where we would
crash if we tried to create a `VarDecl` from within `GetClangDeclForDIE`
for a static data member.
This patch simply checks whether the `DW_TAG_variable` being parsed is a
static data member, and if so, trivially returns from
`GetClangDeclForDIE` (as we previously did for `DW_TAG_member`s).
Commit: b4ee7d6119f97931d9f38ac8c6bc7409eed87aab
https://github.com/llvm/llvm-project/commit/b4ee7d6119f97931d9f38ac8c6bc7409eed87aab
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Log Message:
-----------
[lldb][DWARFIndex][nfc] Factor out fully qualified name query (#76977)
This moves the functionally of finding a DIE based on a fully qualified
name from SymbolFileDWARF into DWARFIndex itself, so that
specializations of DWARFIndex can implement faster versions of this
query.
Commit: ade7ae4760a0b0e74cddd8f852830ca946295930
https://github.com/llvm/llvm-project/commit/ade7ae4760a0b0e74cddd8f852830ca946295930
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/Transforms/InstSimplify/select.ll
Log Message:
-----------
[InstSimplify] Add test for #77320 (NFC)
Commit: 97e3220d6312ae00bcbe08673f218bd0f705776b
https://github.com/llvm/llvm-project/commit/97e3220d6312ae00bcbe08673f218bd0f705776b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/select.ll
Log Message:
-----------
[InstSimplify] Consider bitcast as potential cross-lane operation
The bitcast might change the number of vector lanes, in which case
it will be a cross-lane operation.
Fixes https://github.com/llvm/llvm-project/issues/77320.
Commit: 16cd344380aa89a4bc47939ae65fd59fe8c77181
https://github.com/llvm/llvm-project/commit/16cd344380aa89a4bc47939ae65fd59fe8c77181
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
Log Message:
-----------
[RISCV] Fix collectNonISAExtFeature returning negative extension features (#76962)
collectNonISAExtFeature was returning any negative extension features,
e.g.
given an input of
+zifencei,+m,+a,+save-restore,-zbb,-relax,-zfa
It would return
+save-restore,-zbb,-relax,-zfa
Because negative extensions aren't emitted when calling
toFeatureVector(), and
so were considered missing. Hence why we still see "-zfa" and "-zfb" in
the tests for
the full arch string attributes, even though with a full arch string we
should be overriding the extensions.
This fixes it by using RISCVISAInfo::isSupportedExtensionFeature instead
to
check if a feature is an ISA extension.
Commit: e6b7c8c4951a470cc63a1721bc5f5ac7f3748a2f
https://github.com/llvm/llvm-project/commit/e6b7c8c4951a470cc63a1721bc5f5ac7f3748a2f
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'if' clause
The 'if' clause takes a required 'condition' expression. This patch
implements that as an expression we will later ensure is convertible to
a binary expression.
Commit: 0deb27c95722311c1ebedbbb8c8c4ac7735701fc
https://github.com/llvm/llvm-project/commit/0deb27c95722311c1ebedbbb8c8c4ac7735701fc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/test/Lower/OpenMP/FIR/declare-target-implicit-func-and-subr-cap-enter.f90
M flang/test/Lower/OpenMP/FIR/declare-target-implicit-func-and-subr-cap.f90
M flang/test/Lower/OpenMP/declare-target-implicit-func-and-subr-cap-enter.f90
M flang/test/Lower/OpenMP/declare-target-implicit-func-and-subr-cap.f90
Log Message:
-----------
Revert "[Flang][OpenMP] Disable declarate target tests on Windows" (#77324)
Reverts llvm/llvm-project#77306
These tests aren't broken on Windows, marking them XFAIL will just ~
consistently fail the build.
Commit: 036e48e2f5f890e1f9574cdb610e2336f12038a2
https://github.com/llvm/llvm-project/commit/036e48e2f5f890e1f9574cdb610e2336f12038a2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/splat-buildvector.ll
Log Message:
-----------
[SLP]Fix PR76850: do the analysis of the submask.
Need to limit the transformation of the VecMask by the corresponding part of the mask of SliceSize size to avoid compiler crash during further cost analysis.
Commit: 34dbaddc6fa1ce0892ecf3ca06866e7038b2a9b3
https://github.com/llvm/llvm-project/commit/34dbaddc6fa1ce0892ecf3ca06866e7038b2a9b3
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
Log Message:
-----------
[clang][ASTImporter] Only reorder fields of RecordDecls (#77079)
Prior to `e9536698720ec524cc8b72599363622bc1a31558`
(https://reviews.llvm.org/D154764) we only re-ordered the fields of
`RecordDecl`s. The change refactored this logic to make sure
`FieldDecl`s are imported before other member decls. However, this
change also widened the types of `DeclContext`s we consider for
re-ordering from `RecordDecl` to anything that's a `DeclContext`. This
seems to have been just a drive-by cleanup.
Internally we've seen numerous crashes in LLDB where we try to perform
this re-ordering on fields of `ObjCInterfaceDecl`s.
This patch restores old behaviour where we limit the re-ordering to just
`RecordDecl`s.
rdar://119343184
rdar://119636274
rdar://119832131
Commit: 69066ab31959968ebcbca71f3872bdedef8fb8cd
https://github.com/llvm/llvm-project/commit/69066ab31959968ebcbca71f3872bdedef8fb8cd
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CXX/over/over.load/p2-0x.cpp
Log Message:
-----------
[Clang] Fix IsOverload for function templates (#77323)
Functions which correspond but have different template parameter lists
are not redeclarations.
Fixes a regression introduced by af4751
(The patch just moves the template parameters check above if the
signature check)
Fixes #76358
Commit: bda562519b89ea3832be00d8ac75cfcdb924dce2
https://github.com/llvm/llvm-project/commit/bda562519b89ea3832be00d8ac75cfcdb924dce2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Libomptarget][NFC] Fix unhandled allocator enum value
Commit: 01410103a6eb50436c39f71299773749b7de9dec
https://github.com/llvm/llvm-project/commit/01410103a6eb50436c39f71299773749b7de9dec
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
Log Message:
-----------
[libc++][doc] Marks LWG3257 as complete (#77237)
The macros were already updated
- __cpp_lib_string_view in 466df1718e41fe2fca6ce6bd98c01b18f42c05e4
- __cpp_lib_array_constexpr in 77b9abfc8e89ca627e4f9a1cc206bea131db6db1
Based on the dates of the commit and that
P0858 "Constexpr iterator requirements"
was completed in LLVM 12, set this issue as completed in the same
version.
Completes
- LWG3257 Missing feature testing macro update from P0858
Commit: 053aed2024a1014736ffe35b001710b263c7a4b5
https://github.com/llvm/llvm-project/commit/053aed2024a1014736ffe35b001710b263c7a4b5
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Check if machine loop is passed while getting loop alignment (#77283)
After d6bb96e677759375b2bea00115918b2cb6552f5b, calling
getPrefLoopAlignment without passing in a pointer to a MachineLoop
causes a segmentation fault. This conflicts with the API in
TargetLoweringBase where the default MachineLoop pointer passed is
nullptr. This patch fixes this by checking if the pointer points to
something before enabling the optional functionality.
Commit: ff47989ec238dafe4a68c6a716e8dbccc9f559f5
https://github.com/llvm/llvm-project/commit/ff47989ec238dafe4a68c6a716e8dbccc9f559f5
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-ext-debugloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-extending-loads.mir
Log Message:
-----------
[AArch64][GlobalISel] Allow anyexting loads from 32b -> 64b to be legal.
We can already support selection of these through imported patterns, we were
just missing the legalizer rule to allow these to be formed.
Nano size benefit overall.
Commit: 12101ca8e322c4cbf40e44b5b1fbf7ea76aff581
https://github.com/llvm/llvm-project/commit/12101ca8e322c4cbf40e44b5b1fbf7ea76aff581
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/__support/threads/linux/CMakeLists.txt
Log Message:
-----------
[libc] set -Wno-frame-address for thread.cpp (#77140)
The aarch64 code is using __builtin_return_address with a non-zero
parameter,
which generates the following warning:
llvm-project/libc/src/__support/threads/linux/thread.cpp:171:38: error:
calling '__builtin_frame_address' with a nonzero argument is unsafe
[-Werror,-Wframe-address]
171 | return reinterpret_cast<uintptr_t>(__builtin_frame_address(1));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
Disable this diagnostic just for this file so that we can enable
-Werror.
Fixes: #77007
Commit: 0e7199cf3d08c83d18549c9cd083e9fec6e9db54
https://github.com/llvm/llvm-project/commit/0e7199cf3d08c83d18549c9cd083e9fec6e9db54
Author: arpilipe <apilipenko at azul.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/test/Other/print-at-pass-number.ll
Log Message:
-----------
Replace print-at-pass-number cl::opt with print-before-pass-number (#76211)
The existing option prints the IR after the pass, but it's not clear
from its name. In this patch I change the option to print the IR before
the pass and change the name to make the behavior clear.
Printing the IR before the pass is slightly simpler than after as I
don't need to worry about printAfterPassInvalidated case. Either before
or after the pass would be ok for the original use case this option was
introduced for.
Commit: c68a9d25e99a096f6862fc4b57dd380a21245d31
https://github.com/llvm/llvm-project/commit/c68a9d25e99a096f6862fc4b57dd380a21245d31
Author: Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[ASan][libc++] String annotations optimizations fix with lambda (#76200)
This commit addresses optimization and instrumentation challenges
encountered within comma constructors.
1) _LIBCPP_STRING_INTERNAL_MEMORY_ACCESS does not work in comma
constructors.
2) Code inside comma constructors is not always correctly optimized.
Problematic code examples:
- `: __r_(((__str.__is_long() ? 0 : (__str.__annotate_delete(), 0)),
std::move(__str.__r_))) {`
- `: __r_(__r_([&](){ if(!__s.__is_long()) __s.__annotate_delete();
return std::move(__s.__r_);}())) {`
However, lambda with argument seems to be correctly optimized. The patch employs this.
Use of lambda based on an idea from @ldionne.
Commit: c52b467875e26d5d3554514489d965eda3ab0cd2
https://github.com/llvm/llvm-project/commit/c52b467875e26d5d3554514489d965eda3ab0cd2
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/docs/dev/code_style.rst
Log Message:
-----------
Reapply "[libc] build with -Werror (#73966)" (#74506)
This reverts commit 6886a52d6dbefff77f33de12ff85d654e2557f81.
Most of the errors observed in postsubmit have been addressed. We can
fix-forward the remaining ones.
Link: https://lab.llvm.org/buildbot/#/changes/117129
Commit: f3f66773117259185b76574de9385e25e3902658
https://github.com/llvm/llvm-project/commit/f3f66773117259185b76574de9385e25e3902658
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/combine-bextr.ll
Log Message:
-----------
[X86] combine-bextr.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
Commit: 61dcfaa745e22b0e5330fc82ee4b7de4b6c99ab7
https://github.com/llvm/llvm-project/commit/61dcfaa745e22b0e5330fc82ee4b7de4b6c99ab7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/i64-mem-copy.ll
Log Message:
-----------
[X86] i64-mem-copy.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
Commit: 8bd16789ff0af00270936c4536dd18b48e4d3897
https://github.com/llvm/llvm-project/commit/8bd16789ff0af00270936c4536dd18b48e4d3897
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/lea-2.ll
Log Message:
-----------
[X86] lea-2.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only (although in this case the gnux32 tests share the X64 checks)
Commit: 635f6d384596950e73b2485842c587a2954c655f
https://github.com/llvm/llvm-project/commit/635f6d384596950e73b2485842c587a2954c655f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/inline-sse.ll
Log Message:
-----------
[X86] inline-sse.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 9632f987161b4efeb8c087f19a3eb4f7c69cc920
https://github.com/llvm/llvm-project/commit/9632f987161b4efeb8c087f19a3eb4f7c69cc920
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/legalize-shl-vec.ll
Log Message:
-----------
[X86] legalize-shl-vec.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
Commit: fbfc9cb7ea756ea645cc55eea478b819573fc7a5
https://github.com/llvm/llvm-project/commit/fbfc9cb7ea756ea645cc55eea478b819573fc7a5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-mmx.ll
Log Message:
-----------
[X86] vector-shuffle-mmx.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
Commit: 52ebf61bac9d17a960908fe0c5e75dea76de165a
https://github.com/llvm/llvm-project/commit/52ebf61bac9d17a960908fe0c5e75dea76de165a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/ftrunc.ll
Log Message:
-----------
[X86] ftrunc.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add common AVX check prefix for 32/64 bit test coverage
Commit: a14650572c2752c0e08a66ce94c43578abf378f8
https://github.com/llvm/llvm-project/commit/a14650572c2752c0e08a66ce94c43578abf378f8
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaInit.cpp
Log Message:
-----------
[Sema] Clean up -Wc++11-narrowing-const-reference code after #76094. NFC (#77278)
Commit: 61968286f9a39815040b0d94299c3732834661bf
https://github.com/llvm/llvm-project/commit/61968286f9a39815040b0d94299c3732834661bf
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M polly/lib/Transform/ScheduleOptimizer.cpp
A polly/test/ScheduleOptimizer/schedule_computeout.ll
Log Message:
-----------
[polly][ScheduleOptimizer] Reland Fix long compile time(hang) reported in polly (#77280)
There is no upper cap set on current Schedule Optimizer to compute
schedule. In some cases a very long compile time taken to compute the
schedule resulting in hang kind of behavior. This patch introduces a
flag 'polly-schedule-computeout' to pass the capwhich is initialized to
300000. This patch handles the compute out cases by bailing out and
exiting gracefully.
Fixed the test that failed in previous commit.
Fixes #69090
Commit: de15c5501903a5a52dcae976e40b8b1f6a838911
https://github.com/llvm/llvm-project/commit/de15c5501903a5a52dcae976e40b8b1f6a838911
Author: Craig Hesling <craig at hesling.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M .github/workflows/llvm-project-tests.yml
Log Message:
-----------
Revert "[GitHub] Fix slow sccache install on macOS by upgrading macOS version (#77165)" (#77270)
This reverts commit 602c8fa2d8da6562e4f36df3bd63c26a4c7461e7, due to an
sccache issue seen on larger builds using macOS-12 runners.
The issue is documented in in the following issue:
https://github.com/hendrikmuhs/ccache-action/issues/174
The original PR is the following:
https://github.com/llvm/llvm-project/pull/77165
Commit: 5351ded68d579921a61b26a34e36046c22f668bd
https://github.com/llvm/llvm-project/commit/5351ded68d579921a61b26a34e36046c22f668bd
Author: Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxx/include/sstream
Log Message:
-----------
[libc++] Remove usage of internal string function in sstream (#75858)
This function replaces a call to `__move_assign` (internal function)
with two calls to public member functions (`resize` and `erase`). The
order of calls is chosen for the best performance.
This change is required to [turn on ASan string annotations for short
strings](https://github.com/llvm/llvm-project/pull/75882) (Short String
Optimization - SSO).
The `std::basic_string` class's `void __move_assign(basic_string&&
__str, size_type __pos, size_type __len)` function operates on
uninitialized strings, where it is reasonable to assume that the memory
is not poisoned. However, in `sstream` this function is applied to
existing strings that already have poisoned memory.
String ASan annotations turned on here:
https://github.com/llvm/llvm-project/pull/72677
Commit: d460c1de3b989cea919b9d60c21644f28f987950
https://github.com/llvm/llvm-project/commit/d460c1de3b989cea919b9d60c21644f28f987950
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/vselect-ext.ll
M llvm/test/CodeGen/SystemZ/vec-perm-14.ll
M llvm/test/CodeGen/X86/test-shrink-bug.ll
M llvm/test/CodeGen/X86/vec_setcc.ll
Log Message:
-----------
[DAG] SimplifyDemandedBits - don't fold sext(x) -> aext(x) if we lose an 0/-1 allsignbits mask (#77296)
For targets that use 0/-1 boolean results, we want to keep this pattern through extensions/truncations as much as possible - so avoid simplifying to any_extend even if we don't demand the upper bits.
Noticed in triage for https://reviews.llvm.org/D152928
Commit: 4c66180e46eaed0cd6aa37102a1e3b37cc9d85fa
https://github.com/llvm/llvm-project/commit/4c66180e46eaed0cd6aa37102a1e3b37cc9d85fa
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
Log Message:
-----------
[RISCV] Use COPY to create artificial 64-bit uses in RISCVOptWInstrs's tests
In reflection of 4dd5d967975fa8d52b8c60596d892d9dd5615809, we can now
use COPY to physical registers to create artificial 64-bit uses to
prevent RISCVOptWInstrs from optimizing away sext in absent of the
IsSignExtendingOpW flag.
NFCI.
Commit: c1023c585de2629911a529cdf32490b99df83345
https://github.com/llvm/llvm-project/commit/c1023c585de2629911a529cdf32490b99df83345
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/__support/HashTable/generic/bitmask_impl.inc
M libc/src/__support/HashTable/table.h
Log Message:
-----------
[libc] fix -Wmissing-braces (#77345)
Fixes the following errors observed on the aarch64 fullbuild:
/home/libc-buildbot/libc-aarch64-ubuntu/libc-aarch64-ubuntu-fullbuild-dbg/llvm-project/libc/src/__support/HashTable/generic/bitmask_impl.inc:116:13:
error: suggest braces around initialization of subobject
[-Werror,-Wmissing-braces]
return {static_cast<bitmask_t>(mask_available().word ^
repeat_byte(0x80))};
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{ }
In file included from
/home/libc-buildbot/libc-aarch64-ubuntu/libc-aarch64-ubuntu-fullbuild-dbg/llvm-project/libc/src/search/hdestroy.cpp:10:
/home/libc-buildbot/libc-aarch64-ubuntu/libc-aarch64-ubuntu-fullbuild-dbg/llvm-project/libc/src/__support/HashTable/table.h:336:41:
error: suggest braces around initialization of subobject
[-Werror,-Wmissing-braces]
iterator end() const { return {0, 0, {0}, *this}; }
^
{}
Link:
https://lab.llvm.org/buildbot/#/builders/223/builds/33868/steps/6/logs/stdio
Link: https://github.com/llvm/llvm-project/pull/74506
Commit: eb42868f25665ba6301a94a30e9df33e0d6ae61f
https://github.com/llvm/llvm-project/commit/eb42868f25665ba6301a94a30e9df33e0d6ae61f
Author: Billy Zhu <billyzhu at modular.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/test/Transforms/canonicalize.mlir
Log Message:
-----------
[MLIR] Handle materializeConstant failure in GreedyPatternRewriteDriver (#77258)
Make GreedyPatternRewriteDriver handle failures of `materializeConstant`
gracefully. Previously it was not checking whether the returned op was
null and crashing. This PR handles it similarly to how OperationFolder
does it.
Commit: 07d6fbf8d80083470b4371f2ddabd656a9c317e6
https://github.com/llvm/llvm-project/commit/07d6fbf8d80083470b4371f2ddabd656a9c317e6
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
Log Message:
-----------
[lldb][NFCI] Remove BreakpointIDList::InsertStringArray (#77161)
This abstraction is leaky and BreakpointIDList does not need to know
about CommandReturnObject.
Additionally, setting the CommandReturnObject inout param to a success
state does very little. The function returns immediately if the input
ArrayRef is empty, and reading
CommandObjectMultiwordBreakpoint::VerifyIDs more closely, the input is
always empty if the previous call to
BreakpointIDList::FindAndReplaceIDRanges failed. If the call was
successful, then the CommandReturnObject is already in a success state.
I have opted to remove the function altogether and inline the
functionality where it was used.
Commit: 5cbf74b012c10e9cc841a27cd5d7335e556f47dd
https://github.com/llvm/llvm-project/commit/5cbf74b012c10e9cc841a27cd5d7335e556f47dd
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/source/Breakpoint/BreakpointIDList.cpp
Log Message:
-----------
[lldb][NFCI] Change return type of BreakpointIDList::GetBreakpointIDAtIndex (#77166)
There are 2 motivations here:
1.) There is no need to hand out constant references to BreakpointIDs,
they are only 8 bytes big. In addition, every use of this method already
makes a copy anyway.
2.) Each BreakpointIDList held onto an invalid BreakpointID specifically
to
prevent lifetime issues. Returning a value means you can return an
invalid BreakpointID instead of needing to allocate storage for an
invalid BreakpointID.
Commit: 478ec63312582c24c8d6ecab280da2380137c0b7
https://github.com/llvm/llvm-project/commit/478ec63312582c24c8d6ecab280da2380137c0b7
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
Log Message:
-----------
[RISCV] Mark VFIRST and VCPOP as SignExtendingOpW (#77022)
Since their values are small enough ([-1, 65535] & [0, 65535],
respectively) to fit into signed 32 bits, any sext (or downcasting +
sext) will be redundnat. Hence marking them as SignExtendingOpW.
Commit: f4bc70e886f2eb1b646d84871b93897db749c826
https://github.com/llvm/llvm-project/commit/f4bc70e886f2eb1b646d84871b93897db749c826
Author: Juergen Ributzka <juergen at ributzka.de>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Lex/ModuleMap.cpp
R clang/test/Modules/Inputs/AutolinkTBD.framework/AutolinkTBD.tbd
R clang/test/Modules/Inputs/AutolinkTBD.framework/Headers/AutolinkTBD.h
R clang/test/Modules/autolinkTBD.m
A clang/test/Modules/autolink_private_module.m
Log Message:
-----------
[clang][modules] Remove `_Private` suffix from framework auto-link hints. (#77120)
- [clang][modules] Remove no longer needed autolink test for TBD files.
- [clang][modules] Remove `_Private` suffix from framework auto-link
hints.
Commit: 23e03a85dc665c784c8b77d429f0f0e2e6d0c2fe
https://github.com/llvm/llvm-project/commit/23e03a85dc665c784c8b77d429f0f0e2e6d0c2fe
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M bolt/test/RISCV/relax.s
Log Message:
-----------
[BOLT] Update test case after #77253
PR #77253 removed the '@plt' suffix from callee symbols. Update
RISCV/relax.s accordingly.
Commit: daa4728deed3d222ff163cfb963321938549ddf1
https://github.com/llvm/llvm-project/commit/daa4728deed3d222ff163cfb963321938549ddf1
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
Log Message:
-----------
[AMDGPU] Add CodeGen support for GFX12 s_mul_u64 (#75825)
Commit: e7655ad605d77e206ec94b2cef59c41a508edba7
https://github.com/llvm/llvm-project/commit/e7655ad605d77e206ec94b2cef59c41a508edba7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/amdgpu/CMakeLists.txt
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Libomptarget] Remove unnecessary CMake definition of endiannness (#77205)
Summary:
This is needed for some definition in `hsa.h` that requires this to be
set for some architectures when it fails at autodetection. We only
really build `libomptarget` with `gcc` and `clang` which already provide
their own way of detecting this. Remove the unnecessary define and move
it into the source.
Commit: 7173ae99c0e1b13536a8492335c595f8aaee4267
https://github.com/llvm/llvm-project/commit/7173ae99c0e1b13536a8492335c595f8aaee4267
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/SnippetRepetitor.cpp
Log Message:
-----------
[llvm-exegesis] Align loop MBB in loop repetitor (#77264)
This patch sets the alignment of the loob MBB in the loop repetitor to
16 to avoid instruction fetch/predecoding bottlenecks that can come up
with unaligned code. The value of 16 was chosen based on numbers for
recent Intel microarchitectures and reccomendations from Agner Fog.
Fixes #77259.
Commit: eea627e3e3c423149cd2cd46cb6309b8d303e8bd
https://github.com/llvm/llvm-project/commit/eea627e3e3c423149cd2cd46cb6309b8d303e8bd
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M compiler-rt/lib/msan/msan.h
M compiler-rt/lib/msan/msan_allocator.cpp
Log Message:
-----------
[NFC][msan] Switch allocator interface to use BufferedStackTrace (#77363)
We will need it to unwind for fatal errors.
Commit: e72c71671e044aa30ca35bed9e20da771ae216b5
https://github.com/llvm/llvm-project/commit/e72c71671e044aa30ca35bed9e20da771ae216b5
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/AccelTable.h
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
Log Message:
-----------
[AccelTable][nfc] Add helper function to cast AccelTableData (#77100)
Specializations of AccelTableBase are always interested in accessing the
derived versions of their data classes (e.g. DWARF5AccelTableData). They
do so by sprinkling `static_casts` all over the code.
This commit adds a helper function to simplify this process, reducinng
the number of casts that have to be made in the middle of code, making
it easier to read.
Commit: 87f67c2599410786ea3600d388fd1d2df13e60af
https://github.com/llvm/llvm-project/commit/87f67c2599410786ea3600d388fd1d2df13e60af
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'self' clause parsing
The 'self' clause takes an optional 'condition' expression, same as the
non-optional expression taken by the 'if' clause. This patch extracts
the 'condition' expression to a separate function, and implements the
'optional parens' infrastructure for clauses, then implements 'self'
parsing.
Commit: 22a73e7c4616e0405db85598c049a7ca70cca7cc
https://github.com/llvm/llvm-project/commit/22a73e7c4616e0405db85598c049a7ca70cca7cc
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/include/Shared/PluginAPI.h
M openmp/libomptarget/include/Shared/PluginAPI.inc
M openmp/libomptarget/include/Shared/Requirements.h
M openmp/libomptarget/include/device.h
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/amdgpu/utils/UtilitiesRTL.h
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/src/OpenMP/Mapping.cpp
M openmp/libomptarget/src/PluginManager.cpp
M openmp/libomptarget/src/device.cpp
A openmp/libomptarget/test/mapping/auto_zero_copy.cpp
Log Message:
-----------
[OpenMP][libomptarget] Enable automatic unified shared memory executi… (#75999)
…on (zero-copy) on MI300A.
This patch enables applications that did not request OpenMP
unified_shared_memory to run with the same zero-copy behavior, where
mapped memory does not result in extra memory allocations and memory
copies, but CPU-allocated memory is accessed from the device. The name
for this behavior is "automatic zero-copy" and it relies on detecting:
that the runtime is running on a MI300A, that the user did not select
unified_shared_memory in their program, and that XNACK (unified memory
support) is enabled in the current GPU configuration. If all these
conditions are met, then automatic zero-copy is triggered.
This patch is still missing support for global variables, which will be
provided in a subsequent patch.
Co-authored-by: Thorsten Blass <thorsten.blass at amd.com>
Commit: 6684a09ca84b44f320052a77cb01cb4216e6511b
https://github.com/llvm/llvm-project/commit/6684a09ca84b44f320052a77cb01cb4216e6511b
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtbegin.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtend.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crti.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtn.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtbegin.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtend.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crti.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtn.o
A clang/test/Driver/gcc-triple.cpp
Log Message:
-----------
[Driver] Add the --gcc-triple option (#73214)
When --gcc-triple is used, the driver will search for the 'best' gcc
installation that has the given triple. This is useful for distributions
that want clang to use a specific gcc triple, but do not want to pin to
a specific version as would be required by using --gcc-install-dir.
Having clang linked to a specific gcc version can cause clang to stop
working when the version of gcc installed on the system gets updated.
Commit: ce4144406c94c3b9cf44bcf2997bae80debc6681
https://github.com/llvm/llvm-project/commit/ce4144406c94c3b9cf44bcf2997bae80debc6681
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/include/Shared/PluginAPI.h
M openmp/libomptarget/include/Shared/PluginAPI.inc
M openmp/libomptarget/include/Shared/Requirements.h
M openmp/libomptarget/include/device.h
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/amdgpu/utils/UtilitiesRTL.h
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/src/OpenMP/Mapping.cpp
M openmp/libomptarget/src/PluginManager.cpp
M openmp/libomptarget/src/device.cpp
R openmp/libomptarget/test/mapping/auto_zero_copy.cpp
Log Message:
-----------
Revert "[OpenMP][libomptarget] Enable automatic unified shared memory executi…" (#77371)
Reverts llvm/llvm-project#75999
lit test is failing.
Commit: ce1305a3cea42dad8dd6ee5606dd4259e8632953
https://github.com/llvm/llvm-project/commit/ce1305a3cea42dad8dd6ee5606dd4259e8632953
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/include/llvm-libc-types/off_t.h
Log Message:
-----------
[libc] make off_t 32b for 32b arm (#77350)
Fixes the following diagnostic:
llvm-project/libc/src/sys/mman/linux/mmap.cpp:44:59: error: implicit
conversion loses integer precision: 'off_t' (aka 'long long') to 'long'
[-Werror,-Wshorten-64-to-32]
size, prot, flags, fd, offset);
^~~~~~
It looks like off_t is a curious types on different platforms. FWICT,
it's 32b
on arm (at least for arm-linux-gnueabi) but 64b elsewhere (including 32b
riscv32-linux-gnu).
Commit: 4435ced94998c00a6589c3500822015b6341c9e3
https://github.com/llvm/llvm-project/commit/4435ced94998c00a6589c3500822015b6341c9e3
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterface.cpp
Log Message:
-----------
[mlir][TilingInterface] Allow controlling what fusion is done within tile and fuse (#76871)
Currently the `tileConsumerAndFuseProducerGreedilyUsingSCFFor` method
greedily fuses through all slices that are generated during the tile and
fuse flow. That is not the normal use case. Ideally the caller would
like to control which slices get fused and which dont. This patch
introduces a new field to the `SCFTileAndFuseOptions` to specify this
control.
The contol function also allows the caller to specify if the replacement
for the fused producer needs to be yielded from within the tiled
computation. This allows replacing the fused producers in case they have
other uses. Without this the original producers still survive negating
the utility of the fusion.
The change here also means that the name of the function
`tileConsumerAndFuseProducerGreedily...` can be updated. Defering that
to a later stage to reduce the churn of API changes.
Commit: 7ab64b3266c580f946b3b65992030c3f68cbe392
https://github.com/llvm/llvm-project/commit/7ab64b3266c580f946b3b65992030c3f68cbe392
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Remove tab character from RISCVRegisterInfo.td. NFC
Commit: 09e32ab75076a1f2270d37343922c86c12bdd047
https://github.com/llvm/llvm-project/commit/09e32ab75076a1f2270d37343922c86c12bdd047
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/include/lldb/API/SBBreakpoint.h
Log Message:
-----------
[lldb] Deprecate SBBreakpoint::AddName in favor of AddNameWithErrorHandling (#71228)
AddName gives no feedback other than if it succeeded whereas
AddNameWithErrorHandling gives you back an SBError object. I would like
to mark AddName as deprecated and direct folks to use
AddNameWithErorrHandling instead.
---------
Co-authored-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 16b8a0dc6885dea0882887a6e642a504fd1e193c
https://github.com/llvm/llvm-project/commit/16b8a0dc6885dea0882887a6e642a504fd1e193c
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/include/lldb/Utility/StructuredData.h
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] Change interface of StructuredData::Array::GetItemAtIndexAsInteger (#71993)
This is a follow-up to (#71613) and (#71961).
Commit: f700d748f0447b6a761eb9d42575b28e0af98708
https://github.com/llvm/llvm-project/commit/f700d748f0447b6a761eb9d42575b28e0af98708
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/__support/HashTable/sse2/bitmask_impl.inc
Log Message:
-----------
[libc] fix more -Wmissing-brace (#77382)
Similar to #77345, the buildbots are observing similar warnings for the
sse2
implementation.
llvm-project/libc/src/__support/HashTable/sse2/bitmask_impl.inc:36:13:
error: suggest braces around initialization of subobject
[-Werror,-Wmissing-braces]
return {bitmask};
^~~~~~~
{ }
llvm-project/libc/src/__support/HashTable/sse2/bitmask_impl.inc:45:13:
error: suggest braces around initialization of subobject
[-Werror,-Wmissing-braces]
return {static_cast<uint16_t>(~mask_available().word)};
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{ }
Link:
https://lab.llvm.org/buildbot/#/builders/163/builds/49350/steps/8/logs/stdio
Link: https://github.com/llvm/llvm-project/pull/74506
Commit: f84bfa2f92d2aa3329bc06902a12c0f4c54d7297
https://github.com/llvm/llvm-project/commit/f84bfa2f92d2aa3329bc06902a12c0f4c54d7297
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lld/MinGW/Options.td
Log Message:
-----------
[LLD] [MinGW] Sync --thinlto-cache-dir option details with ELF (#77010)
Disallow using the form with a separate argument,
"--thinlto-cache-dir dir", allow only the one with equals,
"--thintlo-cache-dir=dir". This is the only form that actually was
tested when this was added in
f794808bb9ec06966a67fe33d41a13b9601768f8, and matches the ELF side,
where only the form with an equals is supported (and this was also the
case at the time when this option was added to the MinGW linker).
Commit: b2ea9ec7fcf37ca01979c11c5b2b1cab0e1ae212
https://github.com/llvm/llvm-project/commit/b2ea9ec7fcf37ca01979c11c5b2b1cab0e1ae212
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/CommandLine.rst
M llvm/lib/Support/CommandLine.cpp
M llvm/test/tools/llvm-debuginfo-analyzer/cmdline.test
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
[CommandLine] Do not print empty categories with '--help-hidden' (#77043)
If a category has no options associated with it, the `--help-hidden`
command still shows that category with the annotation "This option
category has no options", and this is how it was implemented from the
beginning when the categories were introduced, see commit 0537a98878. A
feature to hide unrelated options was added later, in
https://reviews.llvm.org/D7100. Now, if a tool needs to hide unrelated
options that are associated with categories, leaving some of them empty,
those categories will still be visible on the `--help-hidden` output,
even if they have no use for the tool; see the changes in
`llvm/test/tools/llvm-debuginfo-analyzer/cmdline.test` for an example.
The patch ensures that only categories with options are shown on both
main and hidden help output.
Commit: d5f84e6121f0d0cc8984dccc1774ce9ddb7168c4
https://github.com/llvm/llvm-project/commit/d5f84e6121f0d0cc8984dccc1774ce9ddb7168c4
Author: Iain Sandoe <iain at sandoe.co.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxxabi/src/private_typeinfo.cpp
M libcxxabi/src/private_typeinfo.h
A libcxxabi/test/catch_null_pointer_to_object_pr64953.pass.cpp
Log Message:
-----------
[libc++abi] Handle catch null pointer-to-object (#68076)
This addresses cases (currently failing) where we throw a null
pointer-to-object and fixes #64953.
We are trying to satisfy the following bullet from the C++ ABI 15.3:
* the handler is of type cv1 T* cv2 and E is a pointer type that can be
converted to the type of the handler by either or both of:
- a standard pointer conversion (4.10 [conv.ptr]) not involving
conversions to private or protected or ambiguous classes.
- a qualification conversion.
The existing implementation assesses the ambiguity of bases by computing
the offsets to them; ambiguous cases are then when the same base appears
at different offsets. The computation of offset includes indirecting
through the vtables to find the offsets to virtual bases.
When the thrown pointer points to a real object, this is quite efficient
since, if the base is found, and it is not ambiguous and on a public
path, the offset is needed to return the adjusted pointer (and the
indirections are not particularly expensive to compute).
However, when we throw a null pointer-to-object, this scheme is no
longer applicable (and the code currently bypasses the relevant
computations, leading to the incorrect catches reported in the issue).
-----
The solution proposed here takes a composite approach:
1. When the pointer-to-object points to a real instance (well, at least,
it is determined to be non-null), we use the existing scheme.
2. When the pointer-to-object is null:
* We note that there is no real object.
* When we are processing non-virtual bases, we continue to compute the
offsets, but for a notional dummy object based at 0. This is OK, since
we never need to access the object content for non-virtual bases.
* When we are processing a path with one or more virtual bases, we
remember a cookie corresponding to the inner-most virtual base found so
far (and set the notional offset to 0). Offsets to inner non-virtual
bases are then computed as normal.
A base is then ambiguous iff:
* There is a recorded virtual base cookie and that is different from the
current one or,
* The non-virtual base offsets differ.
When a handler for a pointer succeeds in catching a base pointer for a
thrown null pointer-to-object, we still return a nullptr (so the
adjustment to the pointer is not required and need not be computed).
Since we noted that there was no object when starting the search for
ambiguous bases, we know that we can skip the pointer adjustment.
This was originally uploaded as https://reviews.llvm.org/D158769.
Fixes #64953
Commit: 0fe86f9c518fb1296bba8d66ce495f9dfff2c435
https://github.com/llvm/llvm-project/commit/0fe86f9c518fb1296bba8d66ce495f9dfff2c435
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/include/DeviceImage.h
M openmp/libomptarget/include/OffloadEntry.h
M openmp/libomptarget/include/device.h
M openmp/libomptarget/src/DeviceImage.cpp
M openmp/libomptarget/src/PluginManager.cpp
M openmp/libomptarget/src/device.cpp
Log Message:
-----------
[Libomptarget] Remove extra cache for offloading entries (#77012)
Summary:
The offloading entries right now are assumed to be baked into the binary
itself, and thus always valid whenever the library is executing. This
means that we don't need to copy them to additional storage and can
instead simply pass around references to it.
This is not likely to change in the expected operation of the OpenMP
library. Additionally, the indirection for the offload entry struct is
simply two pointers, so moving it by value is trivial.
Commit: 6e90f13cc9bc9dbc5c2c248d95c6e18a5fb021b4
https://github.com/llvm/llvm-project/commit/6e90f13cc9bc9dbc5c2c248d95c6e18a5fb021b4
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/GPUToSPIRV/GPUToSPIRV.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCooperativeMatrixOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRVPass.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/lib/Dialect/SPIRV/IR/CastOps.cpp
M mlir/lib/Dialect/SPIRV/IR/CooperativeMatrixOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Conversion/GPUToSPIRV/wmma-ops-to-spirv-khr-coop-matrix.mlir
R mlir/test/Conversion/GPUToSPIRV/wmma-ops-to-spirv-nv-coop-matrix.mlir
M mlir/test/Dialect/SPIRV/IR/cast-ops.mlir
M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
M mlir/test/Dialect/SPIRV/IR/khr-cooperative-matrix-ops.mlir
M mlir/test/Dialect/SPIRV/IR/matrix-ops.mlir
R mlir/test/Dialect/SPIRV/IR/nv-cooperative-matrix-ops.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Target/SPIRV/matrix.mlir
R mlir/test/Target/SPIRV/nv-cooperative-matrix-ops.mlir
Log Message:
-----------
[mlir][spirv] Drop support for SPV_NV_cooperative_matrix (#76782)
This extension has been superseded by SPV_KHR_cooperative_matrix which
is supported across major vendors GPU like Nvidia, AMD, and Intel.
Given that the KHR version has been supported for nearly half a year,
drop the NV-specific extension to reduce the maintenance burden and code
duplication.
Commit: 6eab9dd7f01e6cad9f1a93bd52e4c6e7b4c3c1fa
https://github.com/llvm/llvm-project/commit/6eab9dd7f01e6cad9f1a93bd52e4c6e7b4c3c1fa
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
Log Message:
-----------
[NVPTX] remove incorrect NVPTX intrinsic transformations (#76870)
`nvvm_fabs_f`
`nvvm_fabs_ftz_f`
Unfortunately, llvm fabs is not equivalent to these intrinsics since
llvm fabs is defined to only set the sign bit to zero while these can
also flush subnormal inputs and modify NaNs.
`nvvm_round_d`
`nvvm_round_f`
`nvvm_round_ftz_f`
llvm.nvvm.round uses RNI, while llvm.round codegens to RZI. LLVM defines
llvm.round to use the same rounding as libm
`round[f]()`, which is not necessary the same as how we define
llvm.nvvm.round.
`nvvm_sqrt_rn_f`
`nvvm_sqrt_rn_ftz_f`
sqrt may be lowered to a less precise version of sqrt, such as
sqrt.approx in NVPTX depending on factors such as the value of
-nvptx-prec-sqrtf32. These intrinsics should always become the
corresponding NVPTX instructions.
`nvvm_add_rn_d`
`nvvm_add_rn_f`
`nvvm_add_rn_ftz_f`
`nvvm_mul_rn_d`
`nvvm_mul_rn_f`
`nvvm_mul_rn_ftz_f`
These nvvm intrinsics have an explicitly specified rounding mode (.rn).
They should always be lowered to a PTX instruction with the same
explicit rounding mode. Converting to fmul and fadd instructions result
in the PTX instructions without rounding modes specified. This can cause
issue because:
> An add [or mul] instruction with no rounding modifier defaults to
round-to-nearest-even and may be optimized aggressively by the code
optimizer. In particular, mul/add sequences with no rounding modifiers
may be optimized to use fused-multiply-add instructions on the target
device.
`nvvm_div_rn_f`
`nvvm_div_rn_ftz_f`
`nvvm_rcp_rn_f`
`nvvm_rcp_rn_ftz_f`
fdiv may be lowered to a less precise version of div, such as div.full
in NVPTX depending on factors such as the value of -nvptx-prec-divf32.
These intrinsics should always become the corresponding NVPTX
instructions.
Commit: f5145f4dc819d73ff8bebcfba3779533b150884e
https://github.com/llvm/llvm-project/commit/f5145f4dc819d73ff8bebcfba3779533b150884e
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/CFG.h
Log Message:
-----------
[Clang][NFC] Fix out-of-bounds access (#77193)
The changes to tablegen made by
https://github.com/llvm/llvm-project/pull/76825 result in
`StmtClass::lastStmtConstant` changing from `StmtClass::WhileStmtClass`
to `StmtClass::GCCAsmStmtClass`. Since `CFG::BuildOptions::alwaysAdd` is
never called with a `WhileStmt`, this has flown under the radar until
now.
Once such test in which an out-of-bounds access occurs is
`test/Sema/inline-asm-validate.c`, among many others.
Commit: faa326de97bf6119dcc42806b07f3523c521ae96
https://github.com/llvm/llvm-project/commit/faa326de97bf6119dcc42806b07f3523c521ae96
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
A llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
Log Message:
-----------
[RISCV] Add branch+c.mv macrofusion for sifive-p450. (#76169)
sifive-p450 supports a very restricted version of the short forward
branch optimization from the sifive-7-series.
For sifive-p450, a branch over a single c.mv can be macrofused as a
conditional move operation. Due to encoding restrictions on c.mv, we
can't conditionally move from X0. That would require c.li instead.
Commit: 1ea7a56057492d9da1124787a9855cc2edca7df9
https://github.com/llvm/llvm-project/commit/1ea7a56057492d9da1124787a9855cc2edca7df9
Author: Advenam Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
Revert "[ASan][libc++] String annotations optimizations fix with lambda (#76200)"
This reverts commit c68a9d25e99a096f6862fc4b57dd380a21245d31.
Commit: ac8b4f874945f83eec8c8f56d9fc80093e02a7b2
https://github.com/llvm/llvm-project/commit/ac8b4f874945f83eec8c8f56d9fc80093e02a7b2
Author: Usman Nadeem <mnadeem at quicinc.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve2-bcax.ll
Log Message:
-----------
[AArch64][SVE2] Add pattern for BCAX (#77159)
Bitwise clear and exclusive or
Add pattern for:
xor x, (and y, not(z)) -> bcax x, y, z
Commit: a0ae5258065a856d5f8d9f8dcb12e9d8394f789f
https://github.com/llvm/llvm-project/commit/a0ae5258065a856d5f8d9f8dcb12e9d8394f789f
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy]unused using decls only check cpp files (#77335)
Commit: 6958986f77bdbedd6ba571af7b546018f9108067
https://github.com/llvm/llvm-project/commit/6958986f77bdbedd6ba571af7b546018f9108067
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/string/memory_utils/op_x86.h
Log Message:
-----------
[libc] fix -Wconversion (#77384)
Fixes the following from GCC:
llvm-project/libc/src/string/memory_utils/op_x86.h:236:24: error:
conversion from ‘long unsigned int’ to ‘uint32_t’ {aka ‘unsigned int’}
may
change value [-Werror=conversion]
236 | return (xored >> 32) | (xored & 0xFFFFFFFF);
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~
Link:
https://lab.llvm.org/buildbot/#/builders/250/builds/16236/steps/8/logs/stdio
Link: https://github.com/llvm/llvm-project/pull/74506
Commit: 7c89b20e02ff079ec84fc54880dbc6c063d8c915
https://github.com/llvm/llvm-project/commit/7c89b20e02ff079ec84fc54880dbc6c063d8c915
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lld/ELF/ScriptParser.cpp
M lld/test/ELF/linkerscript/overlay.test
Log Message:
-----------
[ELF] OVERLAY: support optional start address and LMA
https://reviews.llvm.org/D44780 implemented rudimentary support for
OVERLAY. The start address and `AT(ldaddr)` in `OVERLAY [start] :
[NOCROSSREFS] [AT ( ldaddr )]` are not optional.
In addition, there are two issues:
* When the start address is `.`, subsequent sections don't share the
address of the first overlay section.
* When the first overlay section is empty and discardable, `p_paddr` is
incorrectly zero. This is because a discarded section has a zero
address, causing `prev->getLMA() + prev->size` where `prev` refers to
the first section to evaluate to zero.
This patch supports optional start address and LMA and fix the issues.
Close #77265
Pull Request: https://github.com/llvm/llvm-project/pull/77272
Commit: 1689bbea17683129f41246110af1ebd32b98362f
https://github.com/llvm/llvm-project/commit/1689bbea17683129f41246110af1ebd32b98362f
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/string/memory_utils/op_x86.h
Log Message:
-----------
[libc] fix up #77384
Commit: 70cea91e0fc93db618069588e6a06314b2b0e2d3
https://github.com/llvm/llvm-project/commit/70cea91e0fc93db618069588e6a06314b2b0e2d3
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/sys/mman/linux/CMakeLists.txt
Log Message:
-----------
[libc] temporarily set -Wno-shorten-64-to-32 (#77396)
This is still broken after #77350. Disable the warning for now, and fix
properly once the buildbot it back to green.
Link: https://github.com/llvm/llvm-project/issues/77395
Commit: eee71ed3f7d0abe40f7c54166421421362a8ac46
https://github.com/llvm/llvm-project/commit/eee71ed3f7d0abe40f7c54166421421362a8ac46
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][complex] Support Fastmath flag for complex.mulf (#74554)
Support fast math flag in the conversion of `complex.mulf` op to
standard dialect.
See:
https://discourse.llvm.org/t/rfc-fastmath-flags-support-in-complex-dialect/71981
Commit: 4147b72301bf77ad63793e1dcefefe8d37e69a37
https://github.com/llvm/llvm-project/commit/4147b72301bf77ad63793e1dcefefe8d37e69a37
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/cast.ll
Log Message:
-----------
[CostModel][X86] Fix fpext conversion cost for 16 elements (#76278)
The fpext conversion cost for 16 elements should be 4 from Znver4.
Commit: 8d982e509bf61fab1df58eaf3582138fc3c331b2
https://github.com/llvm/llvm-project/commit/8d982e509bf61fab1df58eaf3582138fc3c331b2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M compiler-rt/test/hwasan/TestCases/Linux/aligned_alloc-alignment.cpp
M compiler-rt/test/hwasan/TestCases/Linux/pvalloc-overflow.cpp
M compiler-rt/test/hwasan/TestCases/Posix/posix_memalign-alignment.cpp
M compiler-rt/test/hwasan/TestCases/allocator_returns_null.cpp
Log Message:
-----------
[test][hwasan] Test function name in summaries #77391 (#77397)
Push #77391 into the main.
Commit: c54a8ac35ab0fe3b7d204dc9867bf05fcb1775cd
https://github.com/llvm/llvm-project/commit/c54a8ac35ab0fe3b7d204dc9867bf05fcb1775cd
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[Sema] Use StringRef::ltrim (NFC)
Commit: 898093638043e465a9099829e32614f38cf3e1a8
https://github.com/llvm/llvm-project/commit/898093638043e465a9099829e32614f38cf3e1a8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M compiler-rt/lib/msan/msan.h
M compiler-rt/lib/msan/msan_allocator.cpp
M compiler-rt/lib/msan/msan_new_delete.cpp
M compiler-rt/test/sanitizer_common/TestCases/max_allocation_size.cpp
Log Message:
-----------
[msan] Unwind stack before fatal reports (#77168)
Msan does not unwind stack in malloc without origins, but we still need
trace
for fatal errors.
Commit: 2b3baffb4720d4ddc7ddd7080f5ea624230b9324
https://github.com/llvm/llvm-project/commit/2b3baffb4720d4ddc7ddd7080f5ea624230b9324
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Analysis/PathDiagnostic.cpp
Log Message:
-----------
[Analysis] Use StringRef::rtrim (NFC)
Commit: 7dd20637c801b429f2dd1040941d00141459d64e
https://github.com/llvm/llvm-project/commit/7dd20637c801b429f2dd1040941d00141459d64e
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/Analysis/errno-stdlibraryfunctions.c
Log Message:
-----------
Improve modeling of 'getcwd' in the StdLibraryFunctionsChecker (#77040)
1. Improve the 'errno' modeling.
2. Improve constraints of the arguments.
Commit: af1fdcc343d1c850d73f7dd47493ffb9a18d596b
https://github.com/llvm/llvm-project/commit/af1fdcc343d1c850d73f7dd47493ffb9a18d596b
Author: wangpc <wangpengcheng.pp at bytedance.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/StackMaps.rst
Log Message:
-----------
[doc][StackMaps] Fix typo
Commit: 96c4f1034cc3a93dafa9f8541548249deb813b78
https://github.com/llvm/llvm-project/commit/96c4f1034cc3a93dafa9f8541548249deb813b78
Author: Jim Lin <jim at andestech.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
Log Message:
-----------
[RISCV] Add support predicating for ANDN/ORN/XNOR with short-forward-branch-opt. (#77077)
ANDN/ORN/XNOR are like other ALU instructions. It should be able to be
predicated by the cpu that supports short-forward-branch.
Commit: b856e77b2df212d740bfedc984572d812d07ecc8
https://github.com/llvm/llvm-project/commit/b856e77b2df212d740bfedc984572d812d07ecc8
Author: James Y Knight <jyknight at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/ARC/atomic-oversize.ll
A llvm/test/CodeGen/BPF/atomic-oversize.ll
A llvm/test/CodeGen/Lanai/atomic-oversize.ll
A llvm/test/CodeGen/MSP430/atomic-oversize.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
Log Message:
-----------
Set MaxAtomicSizeInBitsSupported for remaining targets. (#75703)
Targets affected:
- NVPTX and BPF: set to 64 bits.
- ARC, Lanai, and MSP430: set to 0 (they don't implement atomics).
Those which didn't yet add AtomicExpandPass to their pass pipeline now
do so.
This will result in larger atomic operations getting expanded to
`__atomic_*` libcalls via AtomicExpandPass. On all these targets, this
now matches what Clang already does in the frontend.
The only targets which do not configure AtomicExpandPass now are:
- DirectX and SPIRV: they aren't normal backends.
- AVR: a single-cpu architecture with no privileged/user divide, which
could implement all atomics by disabling/enabling interrupts, regardless
of size/alignment. Will be addressed by future work.
Commit: a8e9dceb49a9824b9326a16acedd19dbb29add2f
https://github.com/llvm/llvm-project/commit/a8e9dceb49a9824b9326a16acedd19dbb29add2f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
Log Message:
-----------
[RISCV] Use getELen() instead of hardcoded 64 in lowerBUILD_VECTOR. (#77355)
This is needed to properly support Zve32x.
Commit: 700a1928bbc2bac557384e20efa56bc61ee64b86
https://github.com/llvm/llvm-project/commit/700a1928bbc2bac557384e20efa56bc61ee64b86
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
Log Message:
-----------
[test][sanitizer] Check summary function and a single stack frame
Commit: b43c50490c5964b3b1aa1b95a9025a5b5942a46e
https://github.com/llvm/llvm-project/commit/b43c50490c5964b3b1aa1b95a9025a5b5942a46e
Author: Justin Fargnoli <34139864+justinfargnoli at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithDialect.cpp
M mlir/lib/Dialect/Complex/IR/ComplexDialect.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/lib/Dialect/Index/IR/IndexDialect.cpp
M mlir/lib/Dialect/Math/IR/MathDialect.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefDialect.cpp
M mlir/lib/Dialect/UB/IR/UBOps.cpp
Log Message:
-----------
[mlir] Declare promised interfaces for the ConvertToLLVM extension (#76341)
This PR adds promised interface declarations for
`ConvertToLLVMPatternInterface` in all the dialects that support the
`ConvertToLLVM` dialect extension.
Promised interfaces allow a dialect to declare that it will have an
implementation of a particular interface, crashing the program if one
isn't provided when the interface is used.
Commit: 3fa17954dedd59bfad9cef1778719fb6312a5949
https://github.com/llvm/llvm-project/commit/3fa17954dedd59bfad9cef1778719fb6312a5949
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Target.h
M lld/test/ELF/riscv-reloc-leb128.s
Log Message:
-----------
[ELF] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 in SHF_ALLOC sections (#77261)
Complement #72610 (non-SHF_ALLOC sections). GCC-generated
.gcc_exception_table has the SHF_ALLOC flag and may contain
R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 relocations.
Commit: 49c35f69ac6884a07f07e7c09ca7b79282707f49
https://github.com/llvm/llvm-project/commit/49c35f69ac6884a07f07e7c09ca7b79282707f49
Author: Brad Smith <brad at comstyle.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
M clang/tools/libclang/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
M llvm/tools/llvm-shlib/CMakeLists.txt
Log Message:
-----------
[CMake] Add support for building on illumos (#74930)
illumos has an older version of the Solaris linker that does not
support the GNU version script compat nor version scripts and does
not support -Bsymbolic-functions. Treat illumos linker separately.
The libclang/CMakeLists part lifted from NetBSD's pkgsrc.
Build tested on Solaris 11.4 and OpenIndiana 2023.10.
/usr/bin/ld --version
ld: Software Generation Utilities - Solaris Link Editors: 5.11-1.3260
ld: Software Generation Utilities - Solaris Link Editors: 5.11-1.1790 (illumos)
Commit: f6dbd4cc5f52b6d40f98cf09af22b276b8e1f289
https://github.com/llvm/llvm-project/commit/f6dbd4cc5f52b6d40f98cf09af22b276b8e1f289
Author: ZijunZhaoCCK <88353225+ZijunZhaoCCK at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/Driver.cpp
M clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
M clang/test/Driver/aarch64-fix-cortex-a53-835769.c
A clang/test/Driver/android-version.cpp
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
Make clang report invalid target versions. (#75373)
Clang always silently ignores garbage target versions and this makes
debug harder. So clang will report when target versions are invalid.
Commit: b2b4ffbc9bdda617977cbece015b8ea5ac44c531
https://github.com/llvm/llvm-project/commit/b2b4ffbc9bdda617977cbece015b8ea5ac44c531
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/test/Transforms/PGOProfile/Inputs/multiple_hash_profile.proftext
M llvm/test/Transforms/PGOProfile/multiple_hash_profile.ll
Log Message:
-----------
[Instrumentation] Remove -pgo-instr-old-cfg-hashing (#77357)
It's been more than 3 years since -pgo-instr-old-cfg-hashing was
introduced by:
commit 120e66b3418b37b95fc1dbbb23e296a602a24fa8
Author: Hiroshi Yamauchi <yamauchi at google.com>
Date: Tue Jul 28 10:09:49 2020 -0700
I don't think anyone really cares about the ability to use the old CFG
hashing at this point.
Commit: 0930f62cf600d9e2e9a45fef1b3a422d50be89d5
https://github.com/llvm/llvm-project/commit/0930f62cf600d9e2e9a45fef1b3a422d50be89d5
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lld/ELF/LinkerScript.cpp
A lld/test/ELF/linkorder-group.test
Log Message:
-----------
[ELF] -r: fix crash when SHF_LINK_ORDER linked-to section has a larger index
Fixes: b8dface221f4490933b0d39deb769e97ca134e5f
ThinLTO asan build may place `asan_globals` before the associated `.bss.xxx` section.
`rel->getOutputSection()` is nullptr because `rel->parent` hasn't been
set, leading to a crash. Simplify return `s->name` in this case.
Commit: 782c5250077cf472941f0ab7555f87ff22d6e724
https://github.com/llvm/llvm-project/commit/782c5250077cf472941f0ab7555f87ff22d6e724
Author: SunilKuravinakop <98882378+SunilKuravinakop at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/loop_bind_messages.cpp
M clang/test/PCH/pragma-loop.cpp
Log Message:
-----------
[OpenMP] Patch for Support to loop bind clause : Checking Parent Region (#76938)
Changes uploaded to the phabricator on Dec 16th are lost because the
phabricator is down. Hence re-uploading it to the github.com.
Changes to be committed:
modified: clang/include/clang/Sema/Sema.h
modified: clang/lib/Sema/SemaOpenMP.cpp
modified: clang/test/OpenMP/generic_loop_ast_print.cpp
modified: clang/test/OpenMP/loop_bind_messages.cpp
modified: clang/test/PCH/pragma-loop.cpp
---------
Co-authored-by: Sunil Kuravinakop
Commit: abaa79b25dde740d5b54adab463432bee2840c85
https://github.com/llvm/llvm-project/commit/abaa79b25dde740d5b54adab463432bee2840c85
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Query/Matcher/Parser.cpp
M mlir/lib/Query/QueryParser.cpp
M mlir/lib/TableGen/Class.cpp
M mlir/lib/Tools/lsp-server-support/SourceMgrUtils.cpp
Log Message:
-----------
[mlir] Use StringRef::ltrim (NFC)
Commit: ee78e038667d89f5dcd5ed25a36659b3653095d0
https://github.com/llvm/llvm-project/commit/ee78e038667d89f5dcd5ed25a36659b3653095d0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Avoid instantiating PatFrag with null_frag (#77271)
This makes it possible to pass null_frag to the MAIInst multiclass.
null_frag does not work as you may hope if used as the input to a
PatFrag, which is what happens when it's passed through to *MAIFrag.
Avoid this by checking for null_frag. It might be possible to hack up
tablegen to allow consuming PatFrag inputs.
Commit: 0c24c175f262b1043752c67798cd83f79188e9d2
https://github.com/llvm/llvm-project/commit/0c24c175f262b1043752c67798cd83f79188e9d2
Author: Chia <sun1011jacobi at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
A llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
Log Message:
-----------
[RISCV][ISel] Use vaaddu with rounding mode rdn for ISD::AVGFLOORU. (#76550)
This patch aims to use `vaaddu` with rounding mode rdn (i.e `vxrm[1:0] =
0b10`) for `ISD::AVGFLOORU`.
### Source code
```
define <8 x i8> @vaaddu_auto(ptr %x, ptr %y, ptr %z) {
%xv = load <8 x i8>, ptr %x, align 2
%yv = load <8 x i8>, ptr %y, align 2
%xzv = zext <8 x i8> %xv to <8 x i16>
%yzv = zext <8 x i8> %yv to <8 x i16>
%add = add nuw nsw <8 x i16> %xzv, %yzv
%div = lshr <8 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
%ret = trunc <8 x i16> %div to <8 x i8>
ret <8 x i8> %ret
}
```
### Before this patch
```
vaaddu_auto:
vsetivli zero, 8, e8, mf2, ta, ma
vle8.v v8, (a0)
vle8.v v9, (a1)
vwaddu.vv v10, v8, v9
vnsrl.wi v8, v10, 1
ret
```
### After this patch
```
vaaddu_auto:
vsetivli zero, 8, e8, mf2, ta, ma
vle8.v v8, (a0)
vle8.v v9, (a1)
csrwi vxrm, 2
vaaddu.vv v8, v8, v9
ret
```
### Note on signed averaging addition
Based on the rvv spec, there is also a variant for signed averaging
addition called `vaadd`.
But AFAIU, no matter in which rounding mode, we cannot achieve the
semantic of signed averaging addition through `vaadd`.
Thus this patch only introduces `vaaddu`.
Commit: 38ce770ef13131dce92a76ff80e6d5caba2d8422
https://github.com/llvm/llvm-project/commit/38ce770ef13131dce92a76ff80e6d5caba2d8422
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/apx/gr8_norex2.ll
Log Message:
-----------
[X86][test] Add test to check ah is not allocatable for register class gr8_norex2
This test should be added after #73529
Commit: f1ec0d12bb0843f0deab83ef2b5cf1339cbc4f0b
https://github.com/llvm/llvm-project/commit/f1ec0d12bb0843f0deab83ef2b5cf1339cbc4f0b
Author: Nick Anderson <nickleus27 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
A llvm/include/llvm/CodeGen/CodeGenPrepare.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/lib/CodeGen/BasicBlockPathCloning.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
M llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll
M llvm/test/CodeGen/AArch64/convertphitype.ll
M llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll
M llvm/test/CodeGen/AArch64/sve-vscale.ll
M llvm/test/CodeGen/AArch64/sve2-vscale-sinking.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll
M llvm/test/CodeGen/Generic/addr-use-count.ll
M llvm/test/CodeGen/X86/callbr-codegenprepare.ll
M llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/CodeGen/X86/convertphitype.ll
M llvm/test/CodeGen/X86/indirect-br-gep-unmerge.ll
M llvm/test/CodeGen/X86/pr58538.ll
M llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
M llvm/test/CodeGen/X86/tailcall-extract.ll
M llvm/test/DebugInfo/ARM/salvage-debug-info.ll
M llvm/test/DebugInfo/X86/zextload.ll
M llvm/test/Other/codegenprepare-and-debug.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/sink-gather-scatter-addressing.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll
M llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll
M llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
M llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll
M llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
M llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll
M llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr72046.ll
M llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll
M llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll
M llvm/test/Transforms/CodeGenPrepare/X86/select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll
M llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll
M llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll
M llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
M llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll
M llvm/test/Transforms/HotColdSplit/coldentrycount.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll
M llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll
M llvm/tools/opt/opt.cpp
Log Message:
-----------
Port CodeGenPrepare to new pass manager (and BasicBlockSectionsProfil… (#77182)
Port CodeGenPrepare to new pass manager and dependency
BasicBlockSectionsProfileReader
Fixes: #75380
Co-authored-by: Krishna-13-cyber <84722531+Krishna-13-cyber at users.noreply.github.com>
Commit: cf6e9c4b2711fa4450c537aa381a1d693e130740
https://github.com/llvm/llvm-project/commit/cf6e9c4b2711fa4450c537aa381a1d693e130740
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[RISCV] Add documentation in the LangRef on GHC CC (#72762)
The GHC CC got added to RISCV in
a8dc2110cd4dd69212a204bc1074729f95d5402a but it never got documented in
the LangRef. This adds documentation in the LangRef noting that RISCV is
supports the GHC calling convention and notes the specific limitations
of the GHC CC on RISCV.
Commit: 4a5ebc7f6538dbebe9d671346de6138de657cb7d
https://github.com/llvm/llvm-project/commit/4a5ebc7f6538dbebe9d671346de6138de657cb7d
Author: Lu Weining <luweining at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/LoongArch.def
M llvm/test/tools/llvm-readobj/ELF/reloc-types-loongarch64.test
Log Message:
-----------
[BinaryFormat][LoongArch] Define psABI v2.30 relocs (#77039)
Commit: dad614cc606333fa614e696dbdd22263096dadb7
https://github.com/llvm/llvm-project/commit/dad614cc606333fa614e696dbdd22263096dadb7
Author: Hana Dusíková <hanicka at hanicka.net>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/SphinxQuickstartTemplate.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl08.rst
Log Message:
-----------
[Documentation] fix invalid links in documentation (#76502)
Commit: b57159cb19cdc06ec5733f93f0975aa6f40595cb
https://github.com/llvm/llvm-project/commit/b57159cb19cdc06ec5733f93f0975aa6f40595cb
Author: Jinyang He <hejinyang at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
A llvm/test/MC/LoongArch/Relocations/leb128.s
M llvm/test/MC/LoongArch/Relocations/relax-addsub.s
Log Message:
-----------
[LoongArch] Support R_LARCH_{ADD,SUB}_ULEB128 for .uleb128 and force relocs when sym is not in section (#76433)
1, Follow RISCV 1df5ea29 to support generates relocs for .uleb128 which
can not be folded. Unlike RISCV, the located content of LoongArch should
be zero. LoongArch fixup uleb128 value by in-place addition and
subtraction reloc types named R_LARCH_{ADD,SUB}_ULEB128. The located
content can affect the result and R_LARCH_ADD_ULEB128 has enough info to
represent the first symbol value, so it needs to be set to zero.
2, Force relocs if sym is not in section so that it can emit relocs for
external symbol.
Fixes:
https://github.com/llvm/llvm-project/pull/72960#issuecomment-1866844679
Commit: 7b45c549670a8e8b6fe90f4382b0699dd20707d3
https://github.com/llvm/llvm-project/commit/7b45c549670a8e8b6fe90f4382b0699dd20707d3
Author: Jinyang He <hejinyang at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
A llvm/test/MC/RISCV/align-non-executable.s
Log Message:
-----------
[MC][RISCV] Check hasEmitNops before call shouldInsertExtraNopBytesForCodeAlign (#77236)
The shouldInsertExtraNopBytesForCodeAlign() need STI to check whether
relax is enabled or not. It is initialized when call setEmitNops. The
setEmitNops may not be called in a section which has instructions but is
not executable. In this case uninitialized STI will cause problems.
Thus, check hasEmitNops before call it.
Fixes:
https://github.com/llvm/llvm-project/pull/76552#issuecomment-1878952480
Commit: 3d688d4e3db58c68f090c3e118e7e052c9c25593
https://github.com/llvm/llvm-project/commit/3d688d4e3db58c68f090c3e118e7e052c9c25593
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][Bazel] Adjust BUILD.bazel file for b43c50490c5964b3b1aa1b95a9025a5b5942a46e
Commit: 81df51fb318f2a83de3414c6f9f6770fa6ccda38
https://github.com/llvm/llvm-project/commit/81df51fb318f2a83de3414c6f9f6770fa6ccda38
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
Log Message:
-----------
[mlir][vector] Don't treat memrefs with empty stride as non-contiguous (#76848)
As per the docs [1]:
```
In absence of an explicit layout, a memref is considered to have a
multi-dimensional identity affine map layout.
```
This patch makes sure that MemRefs with no strides (i.e. no explicit
layout) are treated as contiguous when checking whether a particular
vector is a contiguous slice of the given MemRef.
[1] https://mlir.llvm.org/docs/Dialects/Builtin/#layout
Follow-up for #76428.
Commit: daecc303bb719ed63566fcb343afec169826f82c
https://github.com/llvm/llvm-project/commit/daecc303bb719ed63566fcb343afec169826f82c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sqrt.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
Log Message:
-----------
AMDGPU: Replace sqrt OpenCL libcalls with llvm.sqrt (#74197)
The library implementation is just a wrapper around a call to the
intrinsic, but loses metadata. Swap out the call site to the intrinsic
so that the lowering can see the !fpmath metadata and fast math flags.
Since d56e0d07cc5ee8e334fd1ad403eef0b1a771384f, clang started placing
!fpmath on OpenCL library sqrt calls. Also don't bother emitting
native_sqrt anymore, it's just another wrapper around llvm.sqrt.
Commit: c6bb89f308c6715edf3f35fb7c6257713ecfc614
https://github.com/llvm/llvm-project/commit/c6bb89f308c6715edf3f35fb7c6257713ecfc614
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Decl.cpp
M clang/test/CodeGen/flexible-array-init.c
Log Message:
-----------
[clang] Fix assertion failure when initializing union with FAM (#77298)
When initializing a union that constrain a struct with a flexible array
member, and the initializer list is empty, we currently trigger an
assertion failure. This happens because getFlexibleArrayInitChars()
assumes that the initializer list is non-empty.
Fixes https://github.com/llvm/llvm-project/issues/77085.
Commit: 4cb1d914ff7b36be06137a8357da0afbf8d628c9
https://github.com/llvm/llvm-project/commit/4cb1d914ff7b36be06137a8357da0afbf8d628c9
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics-library.cpp
Log Message:
-----------
[flang] add folding support for quad bessels (#77314)
This is done using libquadmath and the mappings are only available if
libquadmath was found by cmake.
Support for non quad bessels is already available on POSIX platform
using libm extensions.
Commit: 2357e899cb11e05312c54b689ebd0355487be6bc
https://github.com/llvm/llvm-project/commit/2357e899cb11e05312c54b689ebd0355487be6bc
Author: avl-llvm <55248412+avl-llvm at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M bolt/lib/Rewrite/CMakeLists.txt
M bolt/lib/Rewrite/DWARFRewriter.cpp
A llvm/include/llvm/DWARFLinker/AddressesMap.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerCompileUnit.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerDeclContext.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
A llvm/include/llvm/DWARFLinker/DWARFFile.h
R llvm/include/llvm/DWARFLinker/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/DWARFLinkerBase.h
R llvm/include/llvm/DWARFLinker/DWARFLinkerCompileUnit.h
R llvm/include/llvm/DWARFLinker/DWARFLinkerDeclContext.h
R llvm/include/llvm/DWARFLinker/DWARFStreamer.h
A llvm/include/llvm/DWARFLinker/Parallel/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/StringPool.h
R llvm/include/llvm/DWARFLinkerParallel/AddressesMap.h
R llvm/include/llvm/DWARFLinkerParallel/DWARFFile.h
R llvm/include/llvm/DWARFLinkerParallel/DWARFLinker.h
R llvm/include/llvm/DWARFLinkerParallel/StringPool.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
M llvm/lib/CMakeLists.txt
M llvm/lib/DWARFLinker/CMakeLists.txt
A llvm/lib/DWARFLinker/Classic/CMakeLists.txt
A llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
A llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
A llvm/lib/DWARFLinker/Classic/DWARFLinkerDeclContext.cpp
A llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
R llvm/lib/DWARFLinker/DWARFLinker.cpp
R llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp
R llvm/lib/DWARFLinker/DWARFLinkerDeclContext.cpp
R llvm/lib/DWARFLinker/DWARFStreamer.cpp
A llvm/lib/DWARFLinker/Parallel/AcceleratorRecordsSaver.cpp
A llvm/lib/DWARFLinker/Parallel/AcceleratorRecordsSaver.h
A llvm/lib/DWARFLinker/Parallel/ArrayList.h
A llvm/lib/DWARFLinker/Parallel/CMakeLists.txt
A llvm/lib/DWARFLinker/Parallel/DIEAttributeCloner.cpp
A llvm/lib/DWARFLinker/Parallel/DIEAttributeCloner.h
A llvm/lib/DWARFLinker/Parallel/DIEGenerator.h
A llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinker.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerGlobalData.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
A llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
A llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
A llvm/lib/DWARFLinker/Parallel/DependencyTracker.h
A llvm/lib/DWARFLinker/Parallel/IndexedValuesMap.h
A llvm/lib/DWARFLinker/Parallel/OutputSections.cpp
A llvm/lib/DWARFLinker/Parallel/OutputSections.h
A llvm/lib/DWARFLinker/Parallel/StringEntryToDwarfStringPoolEntryMap.h
A llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
A llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.h
A llvm/lib/DWARFLinker/Parallel/TypePool.h
A llvm/lib/DWARFLinker/Parallel/Utils.h
A llvm/lib/DWARFLinker/Utils.cpp
R llvm/lib/DWARFLinkerParallel/AcceleratorRecordsSaver.cpp
R llvm/lib/DWARFLinkerParallel/AcceleratorRecordsSaver.h
R llvm/lib/DWARFLinkerParallel/ArrayList.h
R llvm/lib/DWARFLinkerParallel/CMakeLists.txt
R llvm/lib/DWARFLinkerParallel/DIEAttributeCloner.cpp
R llvm/lib/DWARFLinkerParallel/DIEAttributeCloner.h
R llvm/lib/DWARFLinkerParallel/DIEGenerator.h
R llvm/lib/DWARFLinkerParallel/DWARFEmitterImpl.cpp
R llvm/lib/DWARFLinkerParallel/DWARFEmitterImpl.h
R llvm/lib/DWARFLinkerParallel/DWARFFile.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinker.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerCompileUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerCompileUnit.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerGlobalData.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerImpl.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerImpl.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerTypeUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerTypeUnit.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerUnit.h
R llvm/lib/DWARFLinkerParallel/DebugLineSectionEmitter.h
R llvm/lib/DWARFLinkerParallel/DependencyTracker.cpp
R llvm/lib/DWARFLinkerParallel/DependencyTracker.h
R llvm/lib/DWARFLinkerParallel/IndexedValuesMap.h
R llvm/lib/DWARFLinkerParallel/OutputSections.cpp
R llvm/lib/DWARFLinkerParallel/OutputSections.h
R llvm/lib/DWARFLinkerParallel/StringEntryToDwarfStringPoolEntryMap.h
R llvm/lib/DWARFLinkerParallel/StringPool.cpp
R llvm/lib/DWARFLinkerParallel/SyntheticTypeNameBuilder.cpp
R llvm/lib/DWARFLinkerParallel/SyntheticTypeNameBuilder.h
R llvm/lib/DWARFLinkerParallel/TypePool.h
R llvm/lib/DWARFLinkerParallel/Utils.h
M llvm/tools/dsymutil/CMakeLists.txt
M llvm/tools/dsymutil/DwarfLinkerForBinary.cpp
M llvm/tools/dsymutil/DwarfLinkerForBinary.h
M llvm/tools/dsymutil/LinkUtils.h
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/llvm-dwarfutil/CMakeLists.txt
M llvm/tools/llvm-dwarfutil/DebugInfoLinker.cpp
M llvm/unittests/DWARFLinkerParallel/StringPoolTest.cpp
Log Message:
-----------
[DWARFLinker][DWARFLinkerParallel][NFC] Refactor DWARFLinker&DWARFLinkerParallel to have a common library. Part 1. (#75925)
This patch creates DWARFLinkerBase library, places DWARFLinker code into
DWARFLinker\Classic, places DWARFLinkerParallel into DWARFLinker\Parallel.
updates BOLT to use new library. This patch is NFC.
Commit: db78c30ba772af1466bb0d0c1d376c8e642ee4a9
https://github.com/llvm/llvm-project/commit/db78c30ba772af1466bb0d0c1d376c8e642ee4a9
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M llvm/include/llvm/Support/RISCVISAInfo.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Deduplicate RISCVISAInfo::toFeatures/toFeatureVector. NFC (#76942)
toFeatures and toFeatureVector both output a list of target feature
flags, just with a slightly different interface. toFeatures keeps any
unsupported extensions, and also provides a way to append negative
extensions (AddAllExtensions=true).
This patch combines them into one function, so that a later patch will
be be able to get a std::vector of features that includes all the
negative extensions, which was previously only possible through the
StrAlloc interface.
Commit: ae5575db1561c0606582346d5f0cbc799c1c02f3
https://github.com/llvm/llvm-project/commit/ae5575db1561c0606582346d5f0cbc799c1c02f3
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/test/Target/LLVMIR/arm-sme-invalid.mlir
M mlir/test/Target/LLVMIR/arm-sme.mlir
Log Message:
-----------
[mlir][ArmSME] Add `arm_sme.intr.cnts(b|h|w|d)` intrinsics (#77319)
This adds MLIR versions of the Arm streaming vector length intrinsics.
These allow reading the streaming vector length regardless of the
streaming mode.
Commit: b59b8d418279f20275ece99bb6c31b1417a7bd80
https://github.com/llvm/llvm-project/commit/b59b8d418279f20275ece99bb6c31b1417a7bd80
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
M llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
Log Message:
-----------
[AMDGPU] Add GFX12 S_WAIT_* instructions (#77336)
GFX12 has separate wait instructions per counter e.g. S_WAIT_LOADCNT.
S_WAITCNT still exists but is deprecated and codegen should stop using
it. S_WAITCNT_* (e.g. S_WAITCNT_VSCNT) are removed.
This patch adds/removes MC layer support for these instructions.
Commit: b399c8407351a8fce7313d6ecd6510cb04e94d8f
https://github.com/llvm/llvm-project/commit/b399c8407351a8fce7313d6ecd6510cb04e94d8f
Author: Mitch Phillips <31459023+hctim at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[NFC] [lld] [MTE] Rename MemtagDescriptors to MemtagGlobalDescriptors (#77300)
Requested in https://github.com/llvm/llvm-project/pull/77078, I agree
that we may as well be unambiguous.
Commit: b81ba52e15d95c3353489d4ce2f61c3771714c28
https://github.com/llvm/llvm-project/commit/b81ba52e15d95c3353489d4ce2f61c3771714c28
Author: Frederik Carlier <frederik.carlier at quamotion.mobi>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/test/CodeGenObjC/dllstorage.m
Log Message:
-----------
Set dllstorage on ObjectiveC ivar offsets (#77385)
Mark instance variable offset symbols with `dllexport`/`dllimport` if
they are not hidden and the interface declaration is marked with
`dllexport`/`dllimport`, when using the GNUstep 2.x ABI.
/cc @davidchisnall
Commit: 243a5822f68d784f5d8b12db5d50353a37a2f0f4
https://github.com/llvm/llvm-project/commit/243a5822f68d784f5d8b12db5d50353a37a2f0f4
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] update build for 2357e899cb11e05312c54b689ebd0355487be6bc
Commit: 414ea3a77181ef01d2cc2ad34950fc1c03ce0d41
https://github.com/llvm/llvm-project/commit/414ea3a77181ef01d2cc2ad34950fc1c03ce0d41
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/AST/TextNodeDumper.h
M clang/lib/AST/TextNodeDumper.cpp
A clang/test/AST/ast-dump-coroutine.cpp
Log Message:
-----------
[AST] Teach TextNodeDumper to print the "implicit" bit for coroutine AST nodes (#77311)
Commit: 25e0dc92a1df906d6e42c66a32f1fa764f1acabd
https://github.com/llvm/llvm-project/commit/25e0dc92a1df906d6e42c66a32f1fa764f1acabd
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/GCMetadata.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/lib/CodeGen/GCRootLowering.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[CodeGen] Port `GCLowering` to new pass manager (#75305)
Commit: f9fec402896a90f3b09cea359c330f65a0908649
https://github.com/llvm/llvm-project/commit/f9fec402896a90f3b09cea359c330f65a0908649
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
Log Message:
-----------
AMDGPU: Make v32bf16 a legal type (#76679)
Depends #76678
Commit: 7a2596344045565f24dd08486a36a30d8966d27e
https://github.com/llvm/llvm-project/commit/7a2596344045565f24dd08486a36a30d8966d27e
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSDIRInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/EXPInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
Log Message:
-----------
[AMDGPU] Flip the default value of maybeAtomic. NFCI. (#75220)
In practice maybeAtomic = 0 is used to prevent SIMemoryLegalizer from
interfering with instructions that are mayLoad or mayStore but lack
MachineMemOperands. These instructions should be the exception not the
rule, so this patch sets maybeAtomic = 1 by default and only overrides
it to 0 where necessary.
Commit: 124efcaa973306ce42633cea07ed3cf55d63afde
https://github.com/llvm/llvm-project/commit/124efcaa973306ce42633cea07ed3cf55d63afde
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[mlir][bufferization][NFC] Clean up Bazel build files (#77429)
`*OpsIncGen` should depend only on the respective `*OpsTdFiles`.
Commit: f92b928b1e1e662e091c8064a161bf4b5dfccdb9
https://github.com/llvm/llvm-project/commit/f92b928b1e1e662e091c8064a161bf4b5dfccdb9
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/TableGen/GlobalISelCombinerEmitter/type-inference.td
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
[GISel] Infer the type of an immediate when there is one element in TEC (#77399)
When there is just one element in the type equivalence class (TEC),
`inferNamedOperandType` fails because it does not consider the passed
operand as a suitable one. This is incorrect when inferring the type of
an (unnamed) immediate operand.
Commit: 51afb101743855e2ae2624ebbe087da77128d92c
https://github.com/llvm/llvm-project/commit/51afb101743855e2ae2624ebbe087da77128d92c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[LV] Create block in mask up-front if needed. (#76635)
At the moment, block and edge masks are created on demand, which means
that they are inserted at the point where they are demanded and then
cached. It is possible that the mask for a block is looked up later at a
point that's not dominated by the point where the mask has been
inserted.
To avoid this, create masks up front on entry to the corresponding basic
block and leave it to VPlan simplification to remove unneeded masks.
Note that we need to create masks for all blocks, if any of the blocks
in the loop needs predication, as computing the mask of a block depends
on the masks of its predecessor.
Needed for #76090.
https://github.com/llvm/llvm-project/pull/76635
Commit: c7d404ea728f1f74d6bacd3dec3ebfa28ac6a0a5
https://github.com/llvm/llvm-project/commit/c7d404ea728f1f74d6bacd3dec3ebfa28ac6a0a5
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr24xx.cpp
M clang/test/CXX/drs/dr25xx.cpp
M clang/test/CXX/drs/dr26xx.cpp
M clang/test/CXX/drs/dr27xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Update cxx_dr_status.html (#77372)
This patch updates `cxx_dr_status.html` to bring it in sync with Core Issues List Revision 113.
Commit: 9be29ad48cdd948ad54f305f6ede391b83198eb9
https://github.com/llvm/llvm-project/commit/9be29ad48cdd948ad54f305f6ede391b83198eb9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bf16.ll
Log Message:
-----------
AMDGPU: Regenerate test checks
Fix test failures after auto-merge of f9fec402896a90f3b09cea359c330f65a0908649
Commit: 4f68ee36fc80212fe5d31085ac2d8503630d99cc
https://github.com/llvm/llvm-project/commit/4f68ee36fc80212fe5d31085ac2d8503630d99cc
Author: hstk30-hw <hanwei62 at huawei.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Headers/arm_acle.h
A clang/test/CodeGen/arm-acle-coproc.c
M clang/test/Preprocessor/aarch64-target-features.c
Log Message:
-----------
[ARM] arm_acle.h add Coprocessor Instrinsics (#75440)
https://github.com/llvm/llvm-project/issues/75424
Add Coprocessor Instrinsics
Commit: f9a1d157e5168acefaa2281ef14c3809bc6ee539
https://github.com/llvm/llvm-project/commit/f9a1d157e5168acefaa2281ef14c3809bc6ee539
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/include/llvm/CodeGen/StackProtector.h
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[CodeGen] Port `StackProtector` to new pass manager (#75334)
The original `StackProtector` is both transform and analysis pass, break
it into two passes now. `getAnalysis<StackProtector>()` could be now
replaced by `FAM.getResult<SSPLayoutAnalysis>(F)` in new pass system.
Commit: a529b6eaf05d24518bbe0f0a5539c378252d2671
https://github.com/llvm/llvm-project/commit/a529b6eaf05d24518bbe0f0a5539c378252d2671
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/StackProtector.h
Log Message:
-----------
[CodeGen] Fix -Wmismatched-tags in StackProtector.h (NFC)
llvm-project/llvm/include/llvm/CodeGen/StackProtector.h:69:10:
error: class 'AnalysisInfoMixin' was previously declared as a struct; this is valid, but may result in linker errors under the Microsoft C++ ABI [-Werror,-Wmismatched-tags]
69 | friend class AnalysisInfoMixin<SSPLayoutAnalysis>;
| ^
llvm-project/llvm/include/llvm/IR/PassManager.h:414:8: note: previous use is here
414 | struct AnalysisInfoMixin : PassInfoMixin<DerivedT> {
| ^
llvm-project/llvm/include/llvm/CodeGen/StackProtector.h:69:10: note: did you mean struct here?
69 | friend class AnalysisInfoMixin<SSPLayoutAnalysis>;
| ^~~~~
| struct
1 error generated.
Commit: 839435cc6ccbd84fff20790285af84bdba83778a
https://github.com/llvm/llvm-project/commit/839435cc6ccbd84fff20790285af84bdba83778a
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Lower/HLFIR/calls-poly-to-assumed-type.f90
M flang/test/Lower/polymorphic.f90
Log Message:
-----------
[flang] Fix fir::isPolymorphic for TYPE(*) assumed-size arrays (#77339)
fir::isPolymorphic was returning false for TYPE(*) assumed-size arrays
causing bad fir.rebox to be created when passing a polymorphic actual
argument to such TYPE(*) dummy.
Fix fir::isAssumedSize to return true for fir.ref<fir.array<none>> and
fir.ref<none>.
@cabreraam, I found this bug when testing your patch, although it is not
caused by it, so you may hit it when passing TYPE(*) deferred shape of
to assumed size TYPE(*) with a different rank.
Commit: c7148467fc08eefaaae876c7d11d629c849f42cf
https://github.com/llvm/llvm-project/commit/c7148467fc08eefaaae876c7d11d629c849f42cf
Author: David Sherwood <57997763+david-arm at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64.h
A llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.cpp
A llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/CMakeLists.txt
A llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[AArch64] Add an AArch64 pass for loop idiom transformations (#72273)
We have added a new pass that looks for loops such as the following:
```
while (i != max_len)
if (a[i] != b[i])
break;
... use index i ...
```
Although similar to a memcmp, this is slightly different because instead
of returning the difference between the values of the first non-matching
pair of bytes, it returns the index of the first mismatch. As such, we
are not able to lower this to a memcmp call.
The new pass can now spot such idioms and transform them into a
specialised predicated loop that gives a significant performance
improvement for AArch64. It is intended as a stop-gap solution until
this can be handled by the vectoriser, which doesn't currently deal with
early exits.
This specialised loop makes use of a generic intrinsic that counts the
trailing zero elements in a predicate vector. This was added in
https://reviews.llvm.org/D159283 and for SVE we end up with brkb & incp
instructions.
Although we have added this pass only for AArch64, it was written in a
generic way so that in theory it could be used by other targets.
Currently the pass requires scalable vector support and needs to know
the minimum page size for the target, however it's possible to make it
work for fixed-width vectors too. Also, the llvm.experimental.cttz.elts
intrinsic used by the pass has generic lowering, but can be made
efficient for targets with instructions similar to SVE's brkb, cntp and
incp.
Original version of patch was posted on Phabricator:
https://reviews.llvm.org/D158291
Patch co-authored by Kerry McLaughlin (@kmclaughlin-arm) and David
Sherwood (@david-arm)
See the original discussion on Discourse:
https://discourse.llvm.org/t/aarch64-target-specific-loop-idiom-recognition/72383
Commit: 19870ed9c3238f348bf82dcc2b2e0a2894536874
https://github.com/llvm/llvm-project/commit/19870ed9c3238f348bf82dcc2b2e0a2894536874
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/X86/avx512er-builtins.c
M clang/test/CodeGen/X86/avx512pf-builtins.c
M clang/test/Driver/cl-x86-flags.c
M clang/test/Frontend/x86-target-cpu.c
Log Message:
-----------
[X86] Emit Warnings for frontend options to enable knl/knm specific ISAs. (#75580)
Since Knight Landing and Knight Mill microarchitectures are EOL, we
would like to remove intrinsic supports for its specific ISA in LLVM 19.
In LLVM 18, we will first emit a warning for the usage.
Commit: d5985d4c70bad7b25740027cb873c91a31ff0659
https://github.com/llvm/llvm-project/commit/d5985d4c70bad7b25740027cb873c91a31ff0659
Author: Kohei Yamaguchi <fix7211 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/docs/Passes.md
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Passes.td
Log Message:
-----------
[mlir][docs] Fix a broken passes documentation (#77402)
- Add EmitC passes into Pass.md
- Modify header level of the pass description to under the
`LegalizeVectorStorage` pass
Commit: 62b30e7948d1278900585518523794f9286fa5c9
https://github.com/llvm/llvm-project/commit/62b30e7948d1278900585518523794f9286fa5c9
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/StackProtector.h
Log Message:
-----------
[CodeGen] Fix friend declaration in SSPLayoutAnalysis (#77447)
Commit: e7636b1094ba53fe4edc16dd52ef981c01e35ceb
https://github.com/llvm/llvm-project/commit/e7636b1094ba53fe4edc16dd52ef981c01e35ceb
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
Log Message:
-----------
[NewPM] Update `CodeGenPreparePass` reference in `CodeGenPassBuilder.h` (#77446)
Reland #77054.
Commit: 0b9b00c8c86d42f72f8abf379052a451778dcc63
https://github.com/llvm/llvm-project/commit/0b9b00c8c86d42f72f8abf379052a451778dcc63
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
Log Message:
-----------
[AMDGPU] Make isScalarLoadLegal a member of AMDGPURegisterBankInfo. NFC.
Commit: 4f7c402d9ff1b2c908b97b78baf84157f08745e8
https://github.com/llvm/llvm-project/commit/4f7c402d9ff1b2c908b97b78baf84157f08745e8
Author: Saiyedul Islam <Saiyedul.Islam at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
M llvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Log Message:
-----------
[AMDGPU][NFC] Update left over tests for COV5 (#76984)
Update AMDGPU CodeGen lit tests to check for COV5 ABI.
Commit: 633d9184f5f8ab227ab22fd7a7db366b843a02d2
https://github.com/llvm/llvm-project/commit/633d9184f5f8ab227ab22fd7a7db366b843a02d2
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/Dialect/Transform/test-interpreter.mlir
Log Message:
-----------
[mlir] introduce transform.collect_matching (#76724)
Introduce a new match combinator into the transform dialect. This
operation collects all operations that are yielded by a satisfactory
match into its results. This is a simpler version of `foreach_match`
that can be inserted directly into existing transform scripts.
Commit: 4cb2ef4fe372d32d1773f4dd358d6dff91518b5f
https://github.com/llvm/llvm-project/commit/4cb2ef4fe372d32d1773f4dd358d6dff91518b5f
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A mlir/docs/Tutorials/transform/Ch4.md
M mlir/docs/Tutorials/transform/_index.md
M mlir/examples/transform/CMakeLists.txt
M mlir/examples/transform/Ch3/transform-opt/transform-opt.cpp
A mlir/examples/transform/Ch4/CMakeLists.txt
A mlir/examples/transform/Ch4/include/CMakeLists.txt
A mlir/examples/transform/Ch4/include/MyExtension.h
A mlir/examples/transform/Ch4/include/MyExtension.td
A mlir/examples/transform/Ch4/lib/CMakeLists.txt
A mlir/examples/transform/Ch4/lib/MyExtension.cpp
A mlir/examples/transform/Ch4/transform-opt/transform-opt.cpp
M mlir/test/CMakeLists.txt
A mlir/test/Examples/transform/Ch4/features.mlir
A mlir/test/Examples/transform/Ch4/multiple.mlir
A mlir/test/Examples/transform/Ch4/sequence.mlir
M mlir/test/lit.cfg.py
Log Message:
-----------
[mlir] add a chapter on matchers to the transform dialect tutorial (#76725)
These operations has been available for a while, but were not described
in the tutorial. Add a new chapter on using and defining match
operations.
Commit: 197214e39b7100dd0e88aa38cffdce9ee1f4464b
https://github.com/llvm/llvm-project/commit/197214e39b7100dd0e88aa38cffdce9ee1f4464b
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
Log Message:
-----------
[RFC][SelectionDAG] Add and use SDNode::getAsZExtVal() helper (#76710)
This follows on from #76708, allowing
`cast<ConstantSDNode>(N)->getZExtValue()` to be replaced with just
`N->getAsZextVal();`
Introduced via `git grep -l "cast<ConstantSDNode>\(.*\).*getZExtValue" |
xargs sed -E -i
's/cast<ConstantSDNode>\((.*)\)->getZExtValue/\1->getAsZExtVal/'` and
then using `git clang-format` on the result.
Commit: f499472de3e1184b83fc6cd78bc244a55f2cac7d
https://github.com/llvm/llvm-project/commit/f499472de3e1184b83fc6cd78bc244a55f2cac7d
Author: wanglei <wanglei at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
Log Message:
-----------
[LoongArch] Pre-commit test for #76913. NFC
This test will crash with expensive check.
Crash message:
```
*** Bad machine code: Using an undefined physical register ***
- function: main
- basic block: %bb.0 entry (0x20fee70)
- instruction: $r3 = frame-destroy ADDI_D $r22, -288
- operand 1: $r22
```
Commit: 98c6aa72299caeff6b188e1ff2fc1b39c5b893b6
https://github.com/llvm/llvm-project/commit/98c6aa72299caeff6b188e1ff2fc1b39c5b893b6
Author: wanglei <wanglei at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.h
M llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
Log Message:
-----------
[LoongArch] Implement LoongArchRegisterInfo::canRealignStack() (#76913)
This patch fixes the crash issue in the test:
CodeGen/LoongArch/can-not-realign-stack.ll
Register allocator may spill virtual registers to the stack, which
introduces stack alignment requirements (when the size of spilled
registers exceeds the default alignment size of the stack). If a
function does not have stack alignment requirements before register
allocation, registers used for stack alignment will not be preserved.
Therefore, we should implement `canRealignStack()` to inform the
register allocator whether it is allowed to perform stack realignment
operations.
Commit: d9710d7624171ff3d476925da0f4670c2c9a34cd
https://github.com/llvm/llvm-project/commit/d9710d7624171ff3d476925da0f4670c2c9a34cd
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
M flang/test/Driver/omp-driver-offload.f90
Log Message:
-----------
[Flang][Driver] Enable gpulibc/nogpulibc options for Flang, which allows linking of GPU LIBC for the fortran and OpenMP runtime (#77135)
This patch seeks to add the -gpulibc and -nogpulibc for Flang, which
allows the linking of the GPU libc library, this allows the use of
memcpy and other useful library functions for GPU.
In particular, this allows the Fortran runtime (written in C++) to be
compiled for offload and then linked against the GPU LIBC library via
this option to resolve memcpy and other C library functions that the
fortran runtime depends on for AMD GPU devices (and likely other GPU
devices).
This is the current method I've tested and found to be able to utilise
the Fortran runtime when compiled for AMD GPU, albeit it requires
compiling libc for GPU and then the Fortran runtime for GPU, so not
particularly straight forward or user friendly yet.
Activating this option will allow the subset of C functions to also be
utilised for GPU in other C/C++ based Fortran libraries if any are made
when linking against GPU libc.
Commit: c1ed45a271145acbfad81d87706aeebf361809c3
https://github.com/llvm/llvm-project/commit/c1ed45a271145acbfad81d87706aeebf361809c3
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/DLTI/DLTI.h
M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.h
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/layout.mlir
M mlir/test/lib/Dialect/DLTI/TestDataLayoutQuery.cpp
M mlir/unittests/Interfaces/DataLayoutInterfacesTest.cpp
Log Message:
-----------
[mlir] Add global and program memory space handling to the data layout subsystem (#77367)
This patch is based on a previous PR https://reviews.llvm.org/D144657
that added alloca address space handling to MLIR's DataLayout and DLTI
interface. This patch aims to add identical features to import and
access the global and program memory space through MLIR's
DataLayout/DLTI system.
Commit: 2c651e6c381905aff6c7ac4b1585bad168f5b553
https://github.com/llvm/llvm-project/commit/2c651e6c381905aff6c7ac4b1585bad168f5b553
Author: David Sherwood <57997763+david-arm at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/Transforms/LoopIdiom/AArch64/lit.local.cfg
Log Message:
-----------
[AArch64] Fix regression introduced by c7148467fc08eefaaae876c7d11d62… (#77467)
…9c849f42cf
Commit: 20c144ea10be1e4b2620a4a1c949cbad315cff72
https://github.com/llvm/llvm-project/commit/20c144ea10be1e4b2620a4a1c949cbad315cff72
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExpr.cpp
Log Message:
-----------
[clang][Sema][NFC] Make a few parameters const
Commit: 963a2ebef8e9b3409ffc728e377dc53b0baff722
https://github.com/llvm/llvm-project/commit/963a2ebef8e9b3409ffc728e377dc53b0baff722
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/Transforms/JumpThreading/ddt-crash.ll
M llvm/test/Transforms/JumpThreading/loop-phi.ll
M llvm/test/Transforms/JumpThreading/unreachable-loops.ll
Log Message:
-----------
[JumpThreading] Regenerate test checks (NFC)
Commit: 7c00a5be5cdeb34711a546054ba0aa89c26d14eb
https://github.com/llvm/llvm-project/commit/7c00a5be5cdeb34711a546054ba0aa89c26d14eb
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll
Log Message:
-----------
[PhaseOrdering] Regenerate test checks (NFC)
Commit: 2d54ec36f762a081c9f17cacd3407cc6f35622b1
https://github.com/llvm/llvm-project/commit/2d54ec36f762a081c9f17cacd3407cc6f35622b1
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/utils/TableGen/CodeGenDAGPatterns.cpp
Log Message:
-----------
[SelectionDAG] Add and use SDNode::getAsAPIntVal() helper (#77455)
This is the logical equivalent for #76710 for APInt and uses the same
naming scheme.
Converted existing users through:
`git grep -l "cast<ConstantSDNode>\(.*\).*getAPIntValueValue" | xargs
sed -E -i
's/cast<ConstantSDNode>\((.*)\)->getAPIntValue/\1->getAsAPIntVal/'`
Commit: a2dba0c97756c65c7dd9d91bec2ceda80a933bb1
https://github.com/llvm/llvm-project/commit/a2dba0c97756c65c7dd9d91bec2ceda80a933bb1
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
Log Message:
-----------
[SEH][CodeGen] Add test to track CFG optimization bug for SEH (#77441)
LiveDebugValues requires CFG only has one entry. BranchFolding and
MachineBlockPlacement may remove all predecessors of landing pad which
leaves it to be another entry.
Commit: 06286a553280fc843d6f5df477a2c776aa2ece35
https://github.com/llvm/llvm-project/commit/06286a553280fc843d6f5df477a2c776aa2ece35
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
A llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
[GISel] Add RegState::Define to temporary defs in apply patterns (#77425)
Previously, registers created for temporary defs in apply patterns were
rendered as uses, resulting in machine verifier errors.
Commit: e9ac2dc68d0b0578a5c1a98b4e083d133c1d7b2b
https://github.com/llvm/llvm-project/commit/e9ac2dc68d0b0578a5c1a98b4e083d133c1d7b2b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] XformToShuffleWithZero - use dyn_cast instead of isa/cast pair. NFCI.
Commit: db1d9ad109d8e0f17acb2de60c8b57085fe2de77
https://github.com/llvm/llvm-project/commit/db1d9ad109d8e0f17acb2de60c8b57085fe2de77
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/unittests/MI/LiveIntervalTest.cpp
Log Message:
-----------
[llvm/unittests] Reset the IsSSA property when using finalizeBundle() (#77469)
Commit: 0242d27dc89ff19e331ae4945933cdb360c7d4cf
https://github.com/llvm/llvm-project/commit/0242d27dc89ff19e331ae4945933cdb360c7d4cf
Author: Pradeep Kumar <pradeepisro49 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
Log Message:
-----------
[MLIR][NVVM] Add missing `;` when lowering stmatrix Op (#77471)
Commit: ab4af25d5dfaecf01e6c6e94dc79e7304321c376
https://github.com/llvm/llvm-project/commit/ab4af25d5dfaecf01e6c6e94dc79e7304321c376
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A mlir/docs/Dialects/OpenACC.md
M mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
Log Message:
-----------
[acc] OpenACC dialect design philosophy and details (#75548)
This document captures the design philosophy of the acc dialect. It also
shares the rationale behind the design and implementation of various
operations - and ties that back to the dialect design goals.
Co-authored-by: Valentin Clement <clementval at gmail.com>
Co-authored-by: Slava Zakharin <szakharin at nvidia.com>
Commit: a85cbe8f9036c8771fbf61335eb288eaefcda365
https://github.com/llvm/llvm-project/commit/a85cbe8f9036c8771fbf61335eb288eaefcda365
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/test/Modules/autolink_private_module.m
Log Message:
-----------
Disable autolink_private_module.m for z/OS & AIX
This change disables it on z/OS and AIX since it fails on both platforms with:
fatal error: error in backend: Objective-C support is unimplemented for object file format
Commit: 07c9189fcc063bdf6219d2733843c89cde3991e1
https://github.com/llvm/llvm-project/commit/07c9189fcc063bdf6219d2733843c89cde3991e1
Author: Qiongsi Wu <274595+qiongsiwu at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Profile/c-general.c
M compiler-rt/include/CMakeLists.txt
A compiler-rt/include/profile/instr_prof_interface.h
M compiler-rt/lib/profile/InstrProfiling.h
A compiler-rt/test/profile/Linux/instrprof-weak-symbol.c
A compiler-rt/test/profile/instrprof-api.c
Log Message:
-----------
[PGO] Exposing PGO's Counter Reset and File Dumping APIs (#76471)
This PR exposes four PGO functions
- `__llvm_profile_set_filename`
- `__llvm_profile_reset_counters`,
- `__llvm_profile_dump`
- `__llvm_orderfile_dump`
to user programs through the new header `instr_prof_interface.h` under
`compiler-rt/include/profile`. This way, the user can include the header
`profile/instr_prof_interface.h` to introduce these four names to their
programs.
Additionally, this PR defines macro `__LLVM_INSTR_PROFILE_GENERATE` when
the program is compiled with profile generation, and defines macro
`__LLVM_INSTR_PROFILE_USE` when the program is compiled with profile
use. `__LLVM_INSTR_PROFILE_GENERATE` together with
`instr_prof_interface.h` define the PGO functions only when the program
is compiled with profile generation. When profile generation is off,
these PGO functions are defined away and leave no trace in the user's
program.
Background:
https://discourse.llvm.org/t/pgo-are-the-llvm-profile-functions-stable-c-apis-across-llvm-releases/75832
Commit: ca06c330fd07f05e65a638892c32ca1474d47b5e
https://github.com/llvm/llvm-project/commit/ca06c330fd07f05e65a638892c32ca1474d47b5e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
A libcxx/cmake/caches/Generic-optimized-speed.cmake
M libcxx/test/libcxx/depr/depr.default.allocator/allocator.members/allocate.cxx2a.pass.cpp
M libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_ctor_conversion.pass.cpp
M libcxx/test/std/input.output/filesystems/class.path/path.member/path.assign/move.pass.cpp
M libcxx/test/std/input.output/filesystems/class.path/path.member/path.construct/move.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size.replace.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.replace.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_nothrow.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_nothrow.replace.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size.replace.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_nothrow.replace.indirect.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.alg/swap.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/F.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/copy_assign.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/copy_move.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/nullptr_t_assign.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.mod/swap.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.pass.cpp
M libcxx/test/support/count_new.h
M libcxx/test/support/test_macros.h
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/params.py
M libunwind/test/libunwind_02.pass.cpp
M libunwind/test/unw_resume.pass.cpp
M libunwind/test/unwind_leaffunction.pass.cpp
Log Message:
-----------
[libc++] Allow running the test suite with optimizations (#68753)
This patch adds a configuration of the libc++ test suite that enables
optimizations when building the tests. It also adds a new CI
configuration to exercise this on a regular basis. This is added in the
context of [1], which requires building with optimizations in order to
hit the bug.
[1]: https://github.com/llvm/llvm-project/issues/68552
Commit: 2aec7083ada09c8b8a0aad79492cbedcf8f9fbb7
https://github.com/llvm/llvm-project/commit/2aec7083ada09c8b8a0aad79492cbedcf8f9fbb7
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[mlir][gpu] Use DenseI32Array for NVVM's maxntid and reqntid (NFC) (#77466)
Commit: 4b7e861d136d941d86b234fbcef520fd798b26fa
https://github.com/llvm/llvm-project/commit/4b7e861d136d941d86b234fbcef520fd798b26fa
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/cxx1z-noexcept-function-type.cpp
Log Message:
-----------
[clang]use correct this scope to evaluate noexcept expr (#77416)
Fixes: #77411
When substituting deduced type, noexcept expr in method should be
instantiated and evaluated.
ThisScrope should be switched to method context instead of origin sema
context
Commit: 7f9e3bf062a4aa36ed5350282cc1c307641145f0
https://github.com/llvm/llvm-project/commit/7f9e3bf062a4aa36ed5350282cc1c307641145f0
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Rewrite/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DWARFLinker/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/DWARFLinker/Classic/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/DWARFLinker/Parallel/BUILD.gn
R llvm/utils/gn/secondary/llvm/lib/DWARFLinkerParallel/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwarfutil/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn
Log Message:
-----------
[gn] port 07c9189fcc06 (DWARFLinker/Classic)
Commit: ec56c922ab257845538215f21cac00cf278fbd04
https://github.com/llvm/llvm-project/commit/ec56c922ab257845538215f21cac00cf278fbd04
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/include/BUILD.gn
Log Message:
-----------
[gn] port 07c9189fcc06
Commit: f7cb1afa06335edfc043cb5f11f97907e9df844c
https://github.com/llvm/llvm-project/commit/f7cb1afa06335edfc043cb5f11f97907e9df844c
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/utils/gn/build/sync_source_lists_from_cmake.py
Log Message:
-----------
[gn] Make sync script print github URLs
Phab no longer knows about new revisions.
Commit: 4ea5c603b4c4db36b8ee7e04adf96416f4d996dc
https://github.com/llvm/llvm-project/commit/4ea5c603b4c4db36b8ee7e04adf96416f4d996dc
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/include/lldb/Symbol/Type.h
M lldb/source/Symbol/Type.cpp
Log Message:
-----------
[lldb][Type] Add TypeQuery::SetLanguages API (#75926)
This is required for users of `TypeQuery` that limit the set of
languages of the query using APIs such as
`GetSupportedLanguagesForTypes` or
`GetSupportedLanguagesForExpressions`.
Example usage: https://github.com/apple/llvm-project/pull/7885
Commit: b5f2db940643af3837c77adde1dadb7208922211
https://github.com/llvm/llvm-project/commit/b5f2db940643af3837c77adde1dadb7208922211
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/TestDataFormatterLibcxxChrono.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/main.cpp
Log Message:
-----------
[lldb][libc++] Adds some C++20 calendar data formatters. (#76983)
This adds a subset of the C++20 calendar data formatters:
- day,
- month,
- year,
- month_day,
- month_day_last, and
- year_month_day.
A followup patch will add the missing calendar data formatters:
- weekday,
- weekday_indexed,
- weekday_last,
- month_weekday,
- month_weekday_last,
- year_month,
- year_month_day_last
- year_month_weekday, and
- year_month_weekday_last.
Commit: 51bf0dff53fdaca25f30d30a1c99462c7afdce74
https://github.com/llvm/llvm-project/commit/51bf0dff53fdaca25f30d30a1c99462c7afdce74
Author: Shan Huang <52285902006 at stu.ecnu.edu.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVNSink.cpp
A llvm/test/Transforms/GVNSink/sink-ignore-dbg-intrinsics.ll
Log Message:
-----------
[GVNSink] Skip debug intrinsics when identifying sinking candidates (#77419)
Fixes #77147.
Commit: 9160f49e08af4267efdc870a1c9a434bfd155ae3
https://github.com/llvm/llvm-project/commit/9160f49e08af4267efdc870a1c9a434bfd155ae3
Author: Romaric Jodin <89833130+rjodinchr at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libclc/generic/lib/math/erf.cl
M libclc/generic/lib/math/erfc.cl
Log Message:
-----------
libclc: generic: add half implementation for erf/erfc (#66901)
libclc does not have a half implementation for erf/erfc
Add one based on the float implementation by extending the input and
truncating the output.
Commit: c19995e9654f3ad01defea06f2cfe25cf57475c5
https://github.com/llvm/llvm-project/commit/c19995e9654f3ad01defea06f2cfe25cf57475c5
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
Log Message:
-----------
[bazel] Fix compiler-rt build after 07c9189fcc063bdf6219d2733843c89cde3991e1
Commit: affd9e8e00fc94ccfe87cc41b337852fb681adde
https://github.com/llvm/llvm-project/commit/affd9e8e00fc94ccfe87cc41b337852fb681adde
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
Log Message:
-----------
AMDGPU: Break vop3p handling out of vop3 base patterns (#77472)
Add the vop3p op_sel fields in getInsVOP3P instead of getInsVOP3Base.
Also start using defvar for some of the intermediate fields. let
overrides of all the visible fields are really difficult to follow.
Commit: dc03382d3e38c8028926b2b66eebf3ca98efc7d3
https://github.com/llvm/llvm-project/commit/dc03382d3e38c8028926b2b66eebf3ca98efc7d3
Author: Brad Smith <brad at comstyle.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M openmp/runtime/src/z_Linux_util.cpp
Log Message:
-----------
[openmp][AIX] Add AIX to __kmp_set_stack_info() (#77421)
Commit: 5cfe24eee49dfb9f6f72e73142e075dbbadd3089
https://github.com/llvm/llvm-project/commit/5cfe24eee49dfb9f6f72e73142e075dbbadd3089
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][Vector] Add nontemporal attribute, mirroring memref (#76752)
Since vector loads and stores from scalar memrefs translate to
llvm.load/store, add the ability to tag said loads and stores as
nontemporal. This mirrors functionality available in memref.load/store.
Commit: 888a20c466e1a7b0da4bd662da8668f13a14e75f
https://github.com/llvm/llvm-project/commit/888a20c466e1a7b0da4bd662da8668f13a14e75f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
A llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
Log Message:
-----------
AMDGPU: Drop amdgpu-no-lds-kernel-id attribute in LDS lowering (#71481)
This is in preparation for moving the run of AMDGPUAttributor earlier.
Currently it infers the lack of the corresponding intrinsic calls,
so if we introduce new ones we need to remove the attribute from any
possible transitive callers. This is more conservative than necessary,
we could try to identify specific subgraphs where LDS globals are not
used.
Other options include teaching the attributor to avoid adding it in
cases
where the lowering may choose the table, but this seems more complex.
Alternatively could add a second run which doesn't seem worth it.
Depends #71349
Commit: 79e17cd01491c0fde241097ad4c5c24afbb1883e
https://github.com/llvm/llvm-project/commit/79e17cd01491c0fde241097ad4c5c24afbb1883e
Author: Andrey Ali Khan Bolshakov <32954549+bolshakov-a at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CXX/drs/dr12xx.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
Log Message:
-----------
[clang] Improve bit-field in ref NTTP diagnostic (#71077)
Prior to this, attempts to bind a bit-field to an NTTP of reference type
produced an error because references to subobjects in NTTPs are
disallowed. But C++20 allows references to subobjects in NTTPs generally
(see
[P1907R1](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1907r1.html)).
Without this change, implementing P1907R1 would cause a bug allowing
bit-fields to be bound to reference template arguments.
Extracted from https://reviews.llvm.org/D140996
Commit: c9da4dc77f780df003718bc0d36c0c9e371bfb9c
https://github.com/llvm/llvm-project/commit/c9da4dc77f780df003718bc0d36c0c9e371bfb9c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Refactor GPRF64 register class to make it usable for Zacas. (#77408)
-Rename to GPRPair.
-Rename registers to be named like X10_X11 instead of X10_PD. Except X0
which is now X0_Pair since it is not paired with X1.
-Use unknown size and offset for the subreg indices. This might
be a functional change, but does not affect any lit tests.
Commit: 6eb372e4e46a6dc4511f454b6501e93eb4cad22d
https://github.com/llvm/llvm-project/commit/6eb372e4e46a6dc4511f454b6501e93eb4cad22d
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
Log Message:
-----------
[clang-tidy] Improve performance of misc-const-correctness (#72705)
Replaced certain AST matchers in ExprMutationAnalyzer with a more direct
utilization of AST classes. The primary bottleneck was identified in the
canResolveToExpr AST matcher. Since this matcher was employed multiple
times and used recursively, each invocation led to the constant creation
and destruction of other matchers within it. Additionally, the continual
comparison of DynTypedNode resulted in significant performance
degradation.
The optimization was tested on the TargetLowering.cpp file. Originally,
the check took 156 seconds on that file, but after implementing this
enhancement, it now takes approximately 40 seconds, making it nearly
four times faster.
Despite this improvement, there are still numerous issues in this file.
To further reduce the computational cost of this class, it is advisable
to consider removing the remaining matchers and exploring alternatives
such as leveraging RecursiveASTVisitor and increasing the direct use of
AST classes.
Closes #71786
Commit: 810c291574831eb06bfcb8fa0e27f9bbd5af6c59
https://github.com/llvm/llvm-project/commit/810c291574831eb06bfcb8fa0e27f9bbd5af6c59
Author: David Green <david.green at arm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
A flang/test/HLFIR/count-elemental.fir
Log Message:
-----------
[Flang] Generate inline reduction loops for elemental count intrinsics (#75774)
This adds a ReductionElementalConversion transform to
OptimizedBufferizationPass, taking hlfir::count(hlfir::elemental) and
generating the inline loop to perform the count of true elements. This
lets us generate a single loop instead of ending up as two plus a
temporary.
Any and All should be able to share the same code with a different
function/initial value.
Commit: 8ca0364d33c7e6c4083e3b1c0b77b00b2c93ff46
https://github.com/llvm/llvm-project/commit/8ca0364d33c7e6c4083e3b1c0b77b00b2c93ff46
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/TextAPI/InterfaceFile.cpp
Log Message:
-----------
[TextAPI] Skip adding empty attributes (#77400)
An empty string attribute value (e.g. a parent-umbrella: "") is
equivalent to omitting it. Theres no reason to write it out.
Commit: 90525125421300d9d1b6bf55288bd1871855d35d
https://github.com/llvm/llvm-project/commit/90525125421300d9d1b6bf55288bd1871855d35d
Author: David Green <david.green at arm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
Log Message:
-----------
[Flang] Remove unnecessary static_assert
Certain compilers do not seem to like the static assert with a string, causing
a implicit conversion. It can be removed as it should not be reachable and the
mlir::failure should handle it correctly in case it is.
Commit: 02fa434b92a5529f043b3fa353bc4fc5bd680424
https://github.com/llvm/llvm-project/commit/02fa434b92a5529f043b3fa353bc4fc5bd680424
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/unittests/Dialect/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
Log Message:
-----------
[mlir][openacc] Restore unit tests for device_type functions (#77122)
These tests were initially pushed together with
https://github.com/llvm/llvm-project/pull/75864 but they were triggering
some buildbot failure (sanitizers). They now make use of the
`OwningOpRef` so all the resources are correctly destroyed at the end of
each tests.
They will be extended to includes all the extra getter functions added
with device_type support.
Commit: ed640420b50e960b7700e2fa973b9fdcdcb32838
https://github.com/llvm/llvm-project/commit/ed640420b50e960b7700e2fa973b9fdcdcb32838
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/test/Semantics/OpenACC/acc-loop.f90
M llvm/include/llvm/Frontend/OpenACC/ACC.td
Log Message:
-----------
[flang][openacc] Fix clauses check with device_type (#77389)
A couple of clauses are allowed multiple times when they are separated
by a device_type clause. This patch updates the ACC.td file to move
these clauses to the `allowedClause` list and the
`CheckAllowedOncePerGroup` function is used to make sure they appear
only once on the directive or for each device_type.
Commit: 064e73cd54061d39d42ae682d2f0780296a6ca5d
https://github.com/llvm/llvm-project/commit/064e73cd54061d39d42ae682d2f0780296a6ca5d
Author: Nikita Popov <nikita.ppv at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVNSink.cpp
R llvm/test/Transforms/GVNSink/sink-ignore-dbg-intrinsics.ll
Log Message:
-----------
Revert "[GVNSink] Skip debug intrinsics when identifying sinking candidates (#77419)"
This reverts commit 51bf0dff53fdaca25f30d30a1c99462c7afdce74.
There are test failures on Windows.
Commit: d29297239f4ebfd2948915fe084e1d2e36f558f9
https://github.com/llvm/llvm-project/commit/d29297239f4ebfd2948915fe084e1d2e36f558f9
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/include/tuple
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/apply.pass.cpp
Log Message:
-----------
[libc++] Implements P2517R1. (#77239)
As pointed out by @Zingam the paper was implemented in libc++ as an
extension. This patch does the bookkeeping. The inital release version
is based on historical release dates.
Completes:
- Add a conditional noexcept specification to std::apply
Commit: f0fd8fd752d69671d0cf391d90d9aba10da98978
https://github.com/llvm/llvm-project/commit/f0fd8fd752d69671d0cf391d90d9aba10da98978
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M README.md
M libcxx/docs/index.rst
Log Message:
-----------
[libc++][CI] Moves CI badge to main README. (#77247)
The current CI badge is currently in libc++ documentation. This does not
seem the right place:
- The typical location on GitHub is on the main README.
- The documentation is shipped as part of the release:
- This link does not work in off-line mode. Currently our documentation
works in off-line mode.
- The status in the release documentation does not reflect the status of
the shipped library. So users looking at it may see a red status and get
confused.
This moves the badge to the README.
Commit: 03a0bfa96a6eb09c4bbae344ac3aa062339aa730
https://github.com/llvm/llvm-project/commit/03a0bfa96a6eb09c4bbae344ac3aa062339aa730
Author: martinboehme <mboehme at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/Formula.h
M clang/lib/Analysis/FlowSensitive/DataflowAnalysisContext.cpp
Log Message:
-----------
[clang][dataflow] Add an early-out to `flowConditionImplies()` / `flowConditionAllows()`. (#77453)
This saves having to assemble the set of constraints and run the SAT
solver in
the trivial case where `F` is true.
This is a performance win on the benchmarks for the Crubit nullability
checker:
```
name old cpu/op new cpu/op delta
BM_PointerAnalysisCopyPointer 64.1µs ± 5% 63.1µs ± 0% -1.56% (p=0.000 n=20+17)
BM_PointerAnalysisIntLoop 172µs ± 2% 171µs ± 0% ~ (p=0.752 n=20+17)
BM_PointerAnalysisPointerLoop 408µs ± 3% 355µs ± 0% -12.99% (p=0.000 n=20+17)
BM_PointerAnalysisBranch 201µs ± 2% 184µs ± 0% -8.28% (p=0.000 n=20+19)
BM_PointerAnalysisLoopAndBranch 684µs ± 2% 613µs ± 2% -10.38% (p=0.000 n=20+19)
BM_PointerAnalysisTwoLoops 309µs ± 2% 308µs ± 2% ~ (p=0.728 n=20+19)
BM_PointerAnalysisJoinFilePath 37.9ms ± 2% 37.9ms ± 2% +0.06% (p=0.041 n=20+19)
BM_PointerAnalysisCallInLoop 26.5ms ± 2% 26.4ms ± 4% -0.59% (p=0.024 n=20+20)
```
When running clang-tidy on real-world code, the results are less clear.
In
three runs, averaged, on an arbitrarily chosen input file, I get 11.91 s
of user
time without this patch and 11.81 s with it, though with considerable
measurement noise (I'm seeing up to 0.2 s of variation between runs).
Still, this is a very simple change, and it is a clear win in
benchmarks, so I
think it is worth making.
Commit: 1b8e39a1a2e8237852914501e3361d98af6db054
https://github.com/llvm/llvm-project/commit/1b8e39a1a2e8237852914501e3361d98af6db054
Author: Jake Egan <5326451+jakeegan at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/test/Modules/autolink_private_module.m
Log Message:
-----------
[clang][modules] Objective-C test lacks support on AIX/zOS (#77485)
To fix error: `fatal error: error in backend: Objective-C support is
unimplemented for object file format`
Same rationale as 22f01cd.
Commit: 7620f03ef7a662384d67b6bd1fad8582dfe9dd82
https://github.com/llvm/llvm-project/commit/7620f03ef7a662384d67b6bd1fad8582dfe9dd82
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCSectionELF.cpp
M llvm/test/CodeGen/AArch64/patchable-function-entry.ll
M llvm/test/CodeGen/LoongArch/patchable-function-entry.ll
M llvm/test/CodeGen/Mips/xray-section-group.ll
M llvm/test/CodeGen/RISCV/patchable-function-entry.ll
M llvm/test/CodeGen/X86/basic-block-sections-labels-functions-sections.ll
M llvm/test/CodeGen/X86/gcc_except_table-multi.ll
M llvm/test/CodeGen/X86/patchable-function-entry.ll
M llvm/test/CodeGen/X86/stack-size-section-function-sections.ll
M llvm/test/CodeGen/X86/stack-size-section.ll
M llvm/test/CodeGen/X86/xray-section-group.ll
M llvm/test/MC/ELF/section-combine.s
M llvm/test/MC/ELF/section.s
Log Message:
-----------
[MC] Parse SHF_LINK_ORDER argument before section group name (#77407)
When both SHF_LINK_ORDER | SHF_GROUP flags are set, GNU assembler from
2.35 onwards (https://sourceware.org/PR25381
https://sourceware.org/binutils/docs/as/Section.html) parses the
SHF_LINK_ORDER argument before section group name, different from us.
This is unfortunate, but does not matter because the `.section` flag `o`
is a niche feature only used by compiler instrumentations, not adopted
by hand-written assembly, and using both flags is extremely rare. Let's
just match GNU assembler. There is another benefit: we now support
zero-flag section group with the SHF_LINK_ORDER flag, while previously
there isn't a syntax.
While here, print 'G' after 'o' to be clear that the 'G' argument is
parsed after the 'o' argument. To make the diff smaller, we don't print
'G' after 'w' in the absence of 'o' for now.
Commit: fa9284589f111cfd3614a75bfbe0709db39a8f15
https://github.com/llvm/llvm-project/commit/fa9284589f111cfd3614a75bfbe0709db39a8f15
Author: Adrian Prantl <adrian-prantl at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/include/lldb/Core/Module.h
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/find-basic-function.cpp
M lldb/tools/lldb-test/lldb-test.cpp
Log Message:
-----------
[lldb] DWARFDIE: Follow DW_AT_specification when computing CompilerCo… (#77157)
…ntext
Following the specification chain seems to be clearly the expected
behavior of GetDeclContext(). Otherwise C++ methods have an empty
CompilerContext instead of being nested in their struct/class.
Theprimary motivation for this functionality is the Swift plugin. In
order to test the change I added a proof-of-concept implementation of a
Module::FindFunction() variant that takes a CompilerContext, expesed via
lldb-test.
rdar://120553412
Commit: f972e4d3434364718899f974e4d1c8e60aea91fa
https://github.com/llvm/llvm-project/commit/f972e4d3434364718899f974e4d1c8e60aea91fa
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/MC/MCSectionELF.cpp
M llvm/test/CodeGen/Mips/ehframe-indirect.ll
M llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll
M llvm/test/CodeGen/SPARC/constructor.ll
M llvm/test/CodeGen/X86/constructor.ll
M llvm/test/CodeGen/X86/elf-comdat.ll
M llvm/test/CodeGen/X86/elf-comdat2.ll
M llvm/test/CodeGen/X86/elf-group.ll
M llvm/test/CodeGen/X86/explicit-section-mergeable.ll
M llvm/test/CodeGen/X86/global-sections-comdat.ll
M llvm/test/DebugInfo/SystemZ/eh_frame_personality.ll
M llvm/test/DebugInfo/SystemZ/eh_frame_personality.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_basic.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_large_static_personality_encodings.s
M llvm/test/MC/ELF/alias-to-local.s
M llvm/test/MC/ELF/relocation.s
M llvm/test/tools/llvm-symbolizer/frame.s
Log Message:
-----------
[MC,ELF] .section: unconditionally print section flag 'G' after 'o'
* Placing 'G' before 'M' (SHF_MERGE) can be misleading as the sh_entsize
argument goes before the section group name, if a reader doesn't know
that the order of extra arguments is not affected by the order of flags.
* 'a', 'w', and 'x' indicate basic permission-related flags. Separating
them with 'G' is kinda ugly.
Simplify code and move 'G' after 'o'. The new output is more similar to
GCC.
Commit: c1173e4e05375514b1416e00b092e1ea1468a46e
https://github.com/llvm/llvm-project/commit/c1173e4e05375514b1416e00b092e1ea1468a46e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] Use FoldConstantArithmetic for unary bitops constant folding.
BSWAP/BITREVERSE/CTPOP/CTLZ/CTLZ_ZERO_UNDEF/CTTZ/CTTZ_ZERO_UNDEF are all handled by FoldConstantArithmetic - so use directly instead of testing for isConstantIntBuildVectorOrConstantInt and relying on DAG.getNode() to perform the constant fold.
Commit: 417df8ee4a149cc49b3fa7e68c64cb926fee8a6f
https://github.com/llvm/llvm-project/commit/417df8ee4a149cc49b3fa7e68c64cb926fee8a6f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/pr77459.ll
Log Message:
-----------
[X86] Add test coverage for #77459
Commit: a50ea2f76f993f65c8756067f7ad5a21e560b0c9
https://github.com/llvm/llvm-project/commit/a50ea2f76f993f65c8756067f7ad5a21e560b0c9
Author: Nicholas Mosier <nmosier at stanford.edu>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/source/Plugins/Trace/intel-pt/CommandObjectTraceStartIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.cpp
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.h
M lldb/source/Plugins/Trace/intel-pt/LibiptDecoder.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceCursorIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPTBundleLoader.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceLoad.py
Log Message:
-----------
[lldb] Fix Intel PT plugin compile errors (#77252)
Fix #77251.
Commit: 0ab5d8ba023f920e03dcd328f62c4df1855af374
https://github.com/llvm/llvm-project/commit/0ab5d8ba023f920e03dcd328f62c4df1855af374
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lld/test/ELF/linkorder-group.test
Log Message:
-----------
[ELF,test] Set alignment of SHT_GROUP to 4
Fixes: 0930f62cf600d9e2e9a45fef1b3a422d50be89d5
This makes the test more conforming and fixes a -fsanitize=alignment
failure in finalizeShtGroup.
Commit: 144ae5b271f7026dec51617c667047a9641fd9e0
https://github.com/llvm/llvm-project/commit/144ae5b271f7026dec51617c667047a9641fd9e0
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/test/HLFIR/simplify-hlfir-intrinsics.fir
Log Message:
-----------
[Flang] Xfail hlfir test case on AIX (#76802)
This test case seems to fail at the `Merge disjoint stack slots` pass on
AIX, it passes if compilled with `-mllvm --no-stack-coloring`. This PR
xfails the teest case on AIX temporarily until the issue is addressed.
---------
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: 3210ce276350a247220b193db12a9b45d1034724
https://github.com/llvm/llvm-project/commit/3210ce276350a247220b193db12a9b45d1034724
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr77459.ll
Log Message:
-----------
[X86] Fold (iX bitreverse(bitcast(vXi1 X))) -> (iX bitcast(shuffle(X)))
X86 doesn't have a BITREVERSE instruction, so if we're working with a casted boolean vector, we're better off shuffling the vector instead if we have PSHUFB (SSSE3 or later)
Fixes #77459
Commit: b565ee1ad3b40a6eadfce24f65069091b76ea47f
https://github.com/llvm/llvm-project/commit/b565ee1ad3b40a6eadfce24f65069091b76ea47f
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
R mlir/docs/Dialects/OpenACC.md
A mlir/docs/Dialects/OpenACCDialect.md
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
Log Message:
-----------
[acc] Fix OpenACC documentation (#77502)
After PR#75548, the OpenACC documentation on the MLIR website has a few
issues. This change corrects them:
- Renames OpenACC.md to OpenACCDialect.md so that links remain
unchanged. In its current state, the links to
https://mlir.llvm.org/docs/Dialects/OpenACCDialect/ no longer work.
- Since the old OpenACCDialect.md (the one with operation definitions)
is being included in the new file, rename the old file to prevent name
ambiguity.
- A header is needed in the .md file, otherwise the index on website is
not properly created.
- Add a new section before including the operations .md file because
otherwise the separation is not clear.
Commit: b629b8662c16ebe76c0779d85bef41a2eea49671
https://github.com/llvm/llvm-project/commit/b629b8662c16ebe76c0779d85bef41a2eea49671
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/hsa-globals.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
Log Message:
-----------
[AMDGPU][MC] Use normal ELF syntax for section switching (#77267)
For some reasons `SunStyleELFSectionSwitchSyntax` is set to `true` for
AMDGPU, but according to
https://github.com/llvm/llvm-project/issues/64862#issuecomment-1880419239
that syntax is only limited to Sun system.
Fix #64862.
Commit: a43e0f90b650fdcdf80bcb221d50a62905bf8977
https://github.com/llvm/llvm-project/commit/a43e0f90b650fdcdf80bcb221d50a62905bf8977
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/test/support/filesystem_test_helper.h
Log Message:
-----------
[libc++][test] try to directly create socket file in /tmp when filepath is too long (#77058)
If TMP is set to a folder which path is too long, the current libcxx
test helper function `create_socket()` will fail because of the test
temp folder `test_root`'s path is too long to be used in socket
creation.
In such case, this patch will try to create the socket file directly in
`/tmp` folder.
This patch also add an assertion for `bind()`.
Commit: 6c207ee5d20d2b054509123e6d0507df1332b376
https://github.com/llvm/llvm-project/commit/6c207ee5d20d2b054509123e6d0507df1332b376
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
A llvm/test/CodeGen/RISCV/option-relax-relocation.ll
Log Message:
-----------
[RISCV] Force relocations if initial MCSubtargetInfo contains FeatureRelax (#77436)
Regarding
```
.option norelax
j label
.option relax
// relaxable instructions
// For assembly input, RISCVAsmParser::ParseInstruction will set ForceRelocs (https://reviews.llvm.org/D46423).
// For direct object emission, ForceRelocs is not set after https://github.com/llvm/llvm-project/pull/73721
label:
```
The J instruction needs a relocation to ensure the target is correct
after linker relaxation. This is related a limitation in the assembler:
RISCVAsmBackend::shouldForceRelocation decides upfront whether a
relocation is needed, instead of checking more information (whether
there are relaxable fragments in between).
Despite the limitation, `j label` produces a relocation in direct object
emission mode, but was broken by #73721 due to the shouldForceRelocation
limitation.
Add a workaround to RISCVTargetELFStreamer to emulate the previous
behavior.
Link: https://github.com/ClangBuiltLinux/linux/issues/1965
Commit: 0804ef2d1539fde7f45e18e4f87d99f7019f9aae
https://github.com/llvm/llvm-project/commit/0804ef2d1539fde7f45e18e4f87d99f7019f9aae
Author: Sanjay Marreddi <sanjay.mareddi at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/include/regex
M libcxx/test/std/re/re.const/re.matchflag/match_not_eol.pass.cpp
Log Message:
-----------
[libc++] Fix `regex_search` to match `$` alone with `match_default` flag (#77256)
Using `regex_search` with the regex_constant `match_default` and a
simple regex pattern `$` is expected to match general strings such as
_"a", "ab", "abc"..._ at `[last, last)` positions. But, the current
implementation fails to do so.
Fixes #75042
Commit: 65a1efc60ca390cb68409fd27d5648b4caa6cb54
https://github.com/llvm/llvm-project/commit/65a1efc60ca390cb68409fd27d5648b4caa6cb54
Author: James Touton <bekenn at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/include/__memory/shared_ptr.h
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.cmp/cmp_nullptr.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.special/cmp_nullptr.pass.cpp
Log Message:
-----------
Fixed shared_ptr comparisons with nullptr_t when spaceship is unavailable. (#76781)
This was causing compilation errors when attempting to compare a
`shared_ptr<T[]>` with `nullptr`, as `get()` returns `T*` rather than `T
(*)[]`. `unique_ptr` did not have this issue, but I've added tests to
make sure.
Commit: 7e956ca88a90feadd2982ba52e0b008a9fa2249e
https://github.com/llvm/llvm-project/commit/7e956ca88a90feadd2982ba52e0b008a9fa2249e
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
Log Message:
-----------
[NFC][AMDGPU] Require `x86-registered-target` for `llvm/test/Transforms/MemCpyOpt/no-libcalls.ll`
The test sets `-mtriple=x86_64` but doesn't require it. This can cause issue on
non-x86 system.
Commit: b6d1577071017f1ba3f12bfe30c1746ffaf5d98d
https://github.com/llvm/llvm-project/commit/b6d1577071017f1ba3f12bfe30c1746ffaf5d98d
Author: Qiongsi Wu <274595+qiongsiwu at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M compiler-rt/test/profile/instrprof-api.c
Log Message:
-----------
[PGO] Fix `instrprof-api.c` on Windows (#77508)
https://github.com/llvm/llvm-project/pull/76471 introduced a new test
but the check lines have over-restrictive patterns for a string variable
name that cause test failures on Windows (e.g.
https://lab.llvm.org/buildbot/#/builders/127/builds/60637/steps/4/logs/stdio).
This PR fixes the test.
Commit: c7c68f1764ddd38d940946007c634b4bacb902b2
https://github.com/llvm/llvm-project/commit/c7c68f1764ddd38d940946007c634b4bacb902b2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M openmp/libomptarget/cmake/Modules/LibomptargetGetDependencies.cmake
M openmp/libomptarget/plugins-nextgen/CMakeLists.txt
A openmp/libomptarget/plugins-nextgen/generic-elf-64bit/dynamic_ffi/ffi.cpp
A openmp/libomptarget/plugins-nextgen/generic-elf-64bit/dynamic_ffi/ffi.h
M openmp/libomptarget/plugins-nextgen/generic-elf-64bit/src/rtl.cpp
Log Message:
-----------
[Libomptarget] Allow the CPU targets to be built without libffi (#77495)
Summary:
The CPU targets currently rely on `libffi` to invoke the "kernel"
functions. Previously we would not build these if this dependency was
not found. This patch copies th eapproach used for things like CUDA and
HSA to dynamically load this if it is not found.
The one sketchy thing this does is hard-code the default ABI for the
target. These are normally defined on a per-file basis in the FFI
source, so I had to fish out the expected values. We only use two types,
so ideally we will always be able to use the default ABI.
It's possible we could remove this dependency entirely in the future as
well.
Commit: 340cc1702e21128b62799c5dfbf2875c3c2c96a1
https://github.com/llvm/llvm-project/commit/340cc1702e21128b62799c5dfbf2875c3c2c96a1
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/setmaxnreg.ll
A llvm/test/Verifier/NVPTX/lit.local.cfg
A llvm/test/Verifier/NVPTX/setmaxnreg.ll
Log Message:
-----------
[LLVM][NVPTX]: Add intrinsic for setmaxnreg (#77289)
This patch adds an intrinsic for setmaxnreg PTX instruction.
* PTX Doc link for this instruction:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#miscellaneous-instructions-setmaxnreg
* The i32 argument, an immediate value, specifies the actual
absolute register count for the instruction.
* The `setmaxnreg` instruction is available in SM90a.
So, this patch adds 'hasSM90a' predicate to use in
the NVPTX backend.
* lit tests are added to verify the lowering of the intrinsic.
* Verifier logic (and tests) are added to test the register
count range and divisibility-by-8 requirements.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 47605ffec8864e989905027b2f56277e2dc8b8fa
https://github.com/llvm/llvm-project/commit/47605ffec8864e989905027b2f56277e2dc8b8fa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/source/Target/ProcessTrace.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Target/ProcessTrace.cpp:23:33: error: extra ';' outside
of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
Commit: fb1466216889e9f4d884a387f430d2e85b4542f6
https://github.com/llvm/llvm-project/commit/fb1466216889e9f4d884a387f430d2e85b4542f6
Author: Ralf Jung <post at ralfj.de>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
LangRef: rint, nearbyint: mention that default rounding mode is assumed (#77191)
LLVM assumes round-to-nearest mode and sometimes performs constant-folding based on that assumption. This updates the language ref documentation for the rint and nearbyint intrinsics to mention that fact.
Commit: baa8c2abcd8da31549996458c9df4871454b0673
https://github.com/llvm/llvm-project/commit/baa8c2abcd8da31549996458c9df4871454b0673
Author: sethp <seth.pellegrino at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/test/Frontend/verify.c
Log Message:
-----------
[Clang] Wide delimiters ('{{{') for expect strings (#77326)
Prior to this commit, it was impossible to use the simple string
matching directives to look for any content that contains unbalanced
`{{` `}}` pairs, such as:
```
// expected-note {{my_struct{{1}, 2}}}
```
Which would parse like so:
```
"nested" brace v
// expected-note {{my_struct{{1}, 2}}}
closes the nested brace ^ |
trailing }
```
And the frontend would complain 'cannot find end ('}}') of expected'.
At this snapshot, VerifyDiagnosticConsumer's parser now counts the
opening braces and looks for a matching length of closing sigils,
allowing the above to be written as:
```
// expected-note {{{my_struct{{1}, 2}}}}
opening brace |-| |-|
closing brace is '}}}', found here ^
```
This came about as a result of this discussion:
https://github.com/llvm/llvm-project/pull/74852#discussion_r1443117644
cc @erichkeane
Commit: 3a8a9267c5ee75e0d1e2f00662d2b913e1dba8d1
https://github.com/llvm/llvm-project/commit/3a8a9267c5ee75e0d1e2f00662d2b913e1dba8d1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
Log Message:
-----------
[Instrumentation] Remove redundant LLVM_DEBUG (NFC)
Commit: cd101ab76bdee8d2583ae7b0dfbae9a745373731
https://github.com/llvm/llvm-project/commit/cd101ab76bdee8d2583ae7b0dfbae9a745373731
Author: Nic <NCGThompson at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Tweak description of `@llvm.is.constant.*` (#77519)
Fixes #77517
Commit: ab590377a371d8099829f77ab4e67c24f8740bd9
https://github.com/llvm/llvm-project/commit/ab590377a371d8099829f77ab4e67c24f8740bd9
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/Transforms/Simplifications.h
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
A mlir/test/Dialect/Mesh/folding.mlir
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/TestSimplifications.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
Log Message:
-----------
[mlir][mesh] Add folding of ClusterShapeOp (#77033)
If the mesh has static size on some of the requested axes, the result is
substituted with a constant.
Commit: 4e8986fc58dd88cbef9089a9b2841e0a87cbb481
https://github.com/llvm/llvm-project/commit/4e8986fc58dd88cbef9089a9b2841e0a87cbb481
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
A llvm/test/CodeGen/X86/cov-sections.ll
Log Message:
-----------
[Coverage] Mark coverage sections as metadata sections on COFF. (#76834)
Mark `.lcovmap$M`, `.lcovfun$M`, `.lcovd` and `.lcovn` as metadata
sections on COFF so they are not loaded into memory.
Commit: 71e5652f47b0d02a54aa9582319648bc4c23842c
https://github.com/llvm/llvm-project/commit/71e5652f47b0d02a54aa9582319648bc4c23842c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/test/hwasan/TestCases/Linux/aligned_alloc-alignment.cpp
M compiler-rt/test/hwasan/TestCases/Linux/pvalloc-overflow.cpp
M compiler-rt/test/hwasan/TestCases/Posix/posix_memalign-alignment.cpp
M compiler-rt/test/hwasan/TestCases/allocator_returns_null.cpp
M compiler-rt/test/hwasan/TestCases/halt-on-error.cpp
M compiler-rt/test/hwasan/TestCases/report-unmapped.cpp
M compiler-rt/test/hwasan/TestCases/use-after-free.c
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
M compiler-rt/test/sanitizer_common/TestCases/max_allocation_size.cpp
Log Message:
-----------
[sanitizer] Select non-internal frames in ReportErrorSummary (#77406)
Summary contains one line and should point to user code instead of
internal compiler-rt location. TSAN already does that.
Commit: e07a2f49e3d3c13b6e9b89e0f6118652f2b2d3ac
https://github.com/llvm/llvm-project/commit/e07a2f49e3d3c13b6e9b89e0f6118652f2b2d3ac
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/test/libcxx/ranges/range.utility.helpers/simple_view.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.drop/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.drop/types.h
M libcxx/test/std/ranges/range.adaptors/range.elements/types.h
M libcxx/test/std/ranges/range.adaptors/range.join/range.join.sentinel/ctor.other.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.join/types.h
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/end.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.take.while/types.h
M libcxx/test/std/ranges/range.adaptors/range.take/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/ctor.other.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/eq.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/minus.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/types.h
M libcxx/test/support/test_range.h
Log Message:
-----------
[libc++][NFC] Create and use test-defined simple_view concept (#77334)
Instead of using a concept defined in the internal implementation, use a
definition of the simple_view ranges concept separately defined and
included in test code.
Commit: b5d4332286154838557a8ab5c76b794e85d946b3
https://github.com/llvm/llvm-project/commit/b5d4332286154838557a8ab5c76b794e85d946b3
Author: Walter Erquinigo <a20012251 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A lldb/tools/lldb-dap/.editorconfig
A lldb/tools/lldb-dap/.gitignore
A lldb/tools/lldb-dap/.prettierrc.json
A lldb/tools/lldb-dap/.vscode/launch.json
A lldb/tools/lldb-dap/.vscode/tasks.json
A lldb/tools/lldb-dap/LICENSE.TXT
M lldb/tools/lldb-dap/README.md
A lldb/tools/lldb-dap/package-lock.json
M lldb/tools/lldb-dap/package.json
A lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
A lldb/tools/lldb-dap/src-ts/disposable-context.ts
A lldb/tools/lldb-dap/src-ts/extension.ts
A lldb/tools/lldb-dap/src-ts/types.ts
A lldb/tools/lldb-dap/tsconfig.json
Log Message:
-----------
[lldb-dap] Create a typescript extension for lldb-dap (#75515)
The main motivations behind this are two:
- Allow different companies developing their own vscode extensions for
LLDB to have a single contribution point, thus sharing resources and
working as a virtual large team.
- Allow for visual ways to configure the debugger, which currently has
to be done through launch.json files.
In terms of implementation, this is very straightforward and these are
the most important details:
- All the cpp code has been moved to a subfolder for cleanness. There's
a specific commit in the list of commits of this PR that just does that,
in case that helps reviewing this.
- A new folder `src-ts` has been created for the typescript code
- The ts extension can be used in two ways: as a regular vscode
extension and as a library. There file `extension.ts` explains which
entry point to use.
- The README has been updated the mention how to install the extension,
which is simpler than before. There are two additional sections for
rebuilding and formatting.
- The ts code I added merely sets up the debug adapter using two
possible options: reading the lldb-dap path from vscode settings or from
a config object passed by users of the extension is used as a library. I
did this to show how we can support easily both worlds.
Commit: a7262d2d9bee9bdfdbcd03ca27a0128c2e2b1c1a
https://github.com/llvm/llvm-project/commit/a7262d2d9bee9bdfdbcd03ca27a0128c2e2b1c1a
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/lib/Conversion/ArithCommon/AttrToLLVMConverter.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/python/ir/diagnostic_handler.py
Log Message:
-----------
[mlir][arith] Add overflow flags support to arith ops (#77211)
Add overflow flags support to the following ops:
* `arith.addi`
* `arith.subi`
* `arith.muli`
Example of new syntax:
```
%res = arith.addi %arg1, %arg2 overflow<nsw> : i64
```
Similar to existing LLVM dialect syntax
```
%res = llvm.add %arg1, %arg2 overflow<nsw> : i64
```
Tablegen canonicalization patterns updated to always drop flags, proper
support with tests will be added later.
Updated LLVMIR translation as part of this commit as it currenly written
in a way that it will crash when new attributes added to arith ops
otherwise.
Discussion
https://discourse.llvm.org/t/rfc-integer-overflow-flags-support-in-arith-dialect/76025
---------
Co-authored-by: Yi Wu <yi.wu2 at arm.com>
Commit: b932f03bda5a88f699d33d118ca2735da3c66677
https://github.com/llvm/llvm-project/commit/b932f03bda5a88f699d33d118ca2735da3c66677
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/src/math/smoke/CMakeLists.txt
Log Message:
-----------
[libc] Disable Death Tests While Hermetic (#77388)
The death test infrastructure seems to depend on operator new, which
isn't currently supported in our hermetic tests. This patch just
disables the death tests in hermetic mode since they only overlap in the
nan tests.
Commit: 5f71aa9270c3d680babfbc6e766773d113c2a79a
https://github.com/llvm/llvm-project/commit/5f71aa9270c3d680babfbc6e766773d113c2a79a
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/firmware-corefile/create-empty-corefile.cpp
Log Message:
-----------
[lldb] [Mach-O] don't strip the end of the "kern ver str" LC_NOTE (#77538)
The "kern ver str" LC_NOTE gives lldb a kernel version string -- with a
UUID and/or a load address (stext) to load it at. The LC_NOTE specifies
a size of the identifier string in bytes. In
ObjectFileMachO::GetIdentifierString, I copy that number of bytes into a
std::string, and in case there were additional nul characters at the end
of the sting for padding reasons, I tried to shrink the std::string to
not include these extra nul's.
However, I did this resizing without handling the case of an empty
identifier string. I don't know why any corefile creator would do that,
but of course at least one does. This patch removes the resizing
altogether; I was solving something that hasn't ever shown to be a
problem. I also added a test case for this, to check that lldb doesn't
crash when given one of these corefiles.
rdar://120390199
Commit: feb49bb42433c55a206489d4c8dafd940c019e30
https://github.com/llvm/llvm-project/commit/feb49bb42433c55a206489d4c8dafd940c019e30
Author: Nour1248 <121687016+Nour1248 at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/AST.cpp
Log Message:
-----------
[clangd] Fix typo in function name in AST.cpp (#77504)
Commit: 046dffce237f193a50a46c3f5bd8a8ca2efc3c77
https://github.com/llvm/llvm-project/commit/046dffce237f193a50a46c3f5bd8a8ca2efc3c77
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/test/lib/Dialect/Mesh/TestSimplifications.cpp
Log Message:
-----------
Fix -Wunused-variable in TestSimplifications.cpp (NFC)
llvm-project/mlir/test/lib/Dialect/Mesh/TestSimplifications.cpp:36:17:
error: unused variable 'status' [-Werror,-Wunused-variable]
LogicalResult status =
^
1 error generated.
Commit: ab82b0624015d910455b5844cb0ad3d2a4d38732
https://github.com/llvm/llvm-project/commit/ab82b0624015d910455b5844cb0ad3d2a4d38732
Author: Chris Apple <14171107+cjappl at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
Log Message:
-----------
Make SANITIZER_MIN_OSX_VERSION a cache variable (#74394)
It is desirable to be able to configure the `-mmacosx-version-min` flag
for the sanitizers, but this flag was never made a CACHE variable in
cmake.
By doing this, it will allow developers to select different minimum
versions, which results in different interceptors being enabled or
disabled on their platforms. This version can now persist between cmake
runs, so it can be remembered by cmake, and edited in the cache file.
Commit: 412d784188257f6b8a3748ac9a800002db861181
https://github.com/llvm/llvm-project/commit/412d784188257f6b8a3748ac9a800002db861181
Author: Yinying Li <107574043+yinying-lisa-li at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/ExecutionEngine/CRunnerUtils.h
M mlir/lib/ExecutionEngine/CRunnerUtils.cpp
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_generate.mlir
Log Message:
-----------
[mlir][sparse][CRunnerUtils] Add shuffle in CRunnerUtils (#77124)
Shuffle can generate an array of unique and random numbers from 0 to
size-1. It can be used to generate tensors with specified sparsity
level.
Commit: 46944210ebd93765b068eeba22bd3e337099af3e
https://github.com/llvm/llvm-project/commit/46944210ebd93765b068eeba22bd3e337099af3e
Author: Ding Fei <fding at feysh.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDecl.cpp
A clang/test/Parser/gh30908-scope-balance-on-invalid-var-direct-init-1.cpp
A clang/test/Parser/gh30908-scope-balance-on-invalid-var-direct-init-2.cpp
Log Message:
-----------
[clang][Parser] Pop scope prior VarDecl invalidating by invalid init (#77434)
Invalid (direct) initializer would invalid `VarDecl` so
`InitializerScopeRAII` cannot restore scope stack balance.
As with other kind of initializer, `InitializerScopeRAII::pop()` is
moved up before `Sema::ActOnInitializerError()` which invalidates the
`VarDecl`, so scope can be balanced and current `DeclContext` can be
restored.
Fixes #30908
Commit: ea3c7b3397f8de8e885ea7cd1ed5138ec4a72d50
https://github.com/llvm/llvm-project/commit/ea3c7b3397f8de8e885ea7cd1ed5138ec4a72d50
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
Log Message:
-----------
Revert "[X86][NFC] Remove dead code for "_REV" instructions"
This reverts commit 85f3d81fabb9381ce5bc0112d029a7c684b01006.
Affects BOLT macro-fusion and not NFC.
Commit: 6615581526f62a00833b2d60cc31f7f12497b5ff
https://github.com/llvm/llvm-project/commit/6615581526f62a00833b2d60cc31f7f12497b5ff
Author: Kai Luo <lkail at cn.ibm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/CodeGen/PowerPC/intrinsic-trap.ll
Log Message:
-----------
[PowerPC] Make verifier happy when lowering `llvm.trap` (#77266)
`llvm.trap` is lowered to `PPC::TRAP` and `PPC::TRAP` is set as
terminator. Verifier complains about terminator should not lie in the
middle of an MBB. See #77095.
Fix it by removing `isTerminator` and `isBarrier` and then set `isTrap`
which was introduced by https://reviews.llvm.org/D48836# and is being
used by X86 and AArch64.
`PPC::TRAP` is not a hardware memory barrier and `llvm.trap` doesn't
indicate a memory barrier either.
Commit: c9124adfd8291a5f5b1d23295308d8940648c596
https://github.com/llvm/llvm-project/commit/c9124adfd8291a5f5b1d23295308d8940648c596
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
R llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
Log Message:
-----------
Revert "[SEH][CodeGen] Add test to track CFG optimization bug for SEH" (#77542)
Reverts llvm/llvm-project#77441
I'll land it with fix.
Commit: e364ddf0c9044f3af147a907aa770599a206c30f
https://github.com/llvm/llvm-project/commit/e364ddf0c9044f3af147a907aa770599a206c30f
Author: Nicholas Mosier <nmosier at stanford.edu>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/docs/MyFirstTypoFix.rst
Log Message:
-----------
[docs] Fix formatting issues in MyFirstTypoFix (#77527)
Fix various formatting issues in MyFirstTypoFix.
Commit: aa4c1e90b6f25a5c6312927e0574f9d07fa25582
https://github.com/llvm/llvm-project/commit/aa4c1e90b6f25a5c6312927e0574f9d07fa25582
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M compiler-rt/test/profile/instrprof-api.c
Log Message:
-----------
Revert "[PGO] Fix `instrprof-api.c` on Windows (#77508)"
Issue #77546
This reverts commit b6d1577071017f1ba3f12bfe30c1746ffaf5d98d.
Commit: a828cda9c80282a77b579f8fc9dc17a310173af4
https://github.com/llvm/llvm-project/commit/a828cda9c80282a77b579f8fc9dc17a310173af4
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Profile/c-general.c
M compiler-rt/include/CMakeLists.txt
R compiler-rt/include/profile/instr_prof_interface.h
M compiler-rt/lib/profile/InstrProfiling.h
R compiler-rt/test/profile/Linux/instrprof-weak-symbol.c
R compiler-rt/test/profile/instrprof-api.c
Log Message:
-----------
Revert "[PGO] Exposing PGO's Counter Reset and File Dumping APIs (#76471)"
Issue #77546
This reverts commit 07c9189fcc063bdf6219d2733843c89cde3991e1.
Commit: 3593ade43dd8af557432dce72f93aa0186c281ef
https://github.com/llvm/llvm-project/commit/3593ade43dd8af557432dce72f93aa0186c281ef
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/include/BUILD.gn
Log Message:
-----------
[gn build] Port a828cda9c802
Commit: a79d13f12ab81bc6edd54e27f7cfffb96487af8d
https://github.com/llvm/llvm-project/commit/a79d13f12ab81bc6edd54e27f7cfffb96487af8d
Author: Chia <sun1011jacobi at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
Log Message:
-----------
[RISCV][ISel] Use vaaddu with rounding mode rnu for ISD::AVGCEILU. (#77473)
Similar to #76550, but for `ISD::AVGCEILU`.
Specifically, this patch aims to use `vaaddu` with rounding mode rnu
(i.e `vxrm[1:0] = 0b00`) for `ISD::AVGCEILU`.
### Source code
```
define <vscale x 8 x i8> @vaaddu_vv_nxv8i8_ceil(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y) {
%xzv = zext <vscale x 8 x i8> %x to <vscale x 8 x i16>
%yzv = zext <vscale x 8 x i8> %y to <vscale x 8 x i16>
%add = add nuw nsw <vscale x 8 x i16> %xzv, %yzv
%one = insertelement <vscale x 8 x i16> poison, i16 1, i32 0
%splat = shufflevector <vscale x 8 x i16> %one, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
%add1 = add nuw nsw <vscale x 8 x i16> %add, %splat
%div = lshr <vscale x 8 x i16> %add1, %splat
%ret = trunc <vscale x 8 x i16> %div to <vscale x 8 x i8>
ret <vscale x 8 x i8> %ret
}
```
### Before this patch
```
vaaddu_vv_nxv8i8_ceil:
vsetvli a0, zero, e8, m1, ta, ma
vwaddu.vv v10, v8, v9
vsetvli zero, zero, e16, m2, ta, ma
vadd.vi v10, v10, 1
vsetvli zero, zero, e8, m1, ta, ma
vnsrl.wi v8, v10, 1
ret
```
### After this patch
```
vaaddu_vv_nxv8i8_ceil:
vsetvli a0, zero, e8, m1, ta, ma
csrwi vxrm, 0
vaaddu.vv v8, v8, v9
ret
```
Commit: a9f39ff2b628e38826d5b95c1e8ae3cb7c692de9
https://github.com/llvm/llvm-project/commit/a9f39ff2b628e38826d5b95c1e8ae3cb7c692de9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
Log Message:
-----------
[RISCV] Reorder RISCVInstrInfoA.td. NFC (#77539)
Move classes out of `let Predicates` scopes. The instantiation of the
class should be responsible for providing the Predicates.
Put the RV64 pseudoinstructions and patterns next to the RV32 version of
the same category. The categories are AMOs, pseudo AMOs, and compare
exchange. The main reason for this commit is that the compare exchange
patterns need to be disabled when Zacas is enabled so we can directly
select Zacas instructions with isel patterns. This necessitates compare
exchange having a different `let Predicates=` from the others anyway.
Commit: e42a70afab47a7a9e76a40bb553eee458a5f18ae
https://github.com/llvm/llvm-project/commit/e42a70afab47a7a9e76a40bb553eee458a5f18ae
Author: jiahanxie353 <jx353 at cornell.edu>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-alu.ll
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-add-zve32x.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-add.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-and.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-or.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-sub.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-xor.mir
Log Message:
-----------
[RISCV][GISel] IRTranslate and Legalize some instructions with scalable vector type
* Add IRTranslate tests for ADD, SUB, AND, OR, and XOR with scalable
vector types to show that they work as expected.
* Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR of scalable vector
type for the RISC-V vector extension.
Commit: b53628a52d1947c51e250d6fa4ff5dd12b737aa0
https://github.com/llvm/llvm-project/commit/b53628a52d1947c51e250d6fa4ff5dd12b737aa0
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ClangFormat.rst
M clang/test/Format/clang-format-ignore.cpp
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
Reland "[clang-format] Optimize processing .clang-format-ignore files"
(42ec976184ac was reverted by 26993f61673e due to a use-after-scope bug.)
Reuse the patterns governing the previous input file being formatted if
the current input file is from the same directory.
Commit: c2b57a052daee22cb6401bc7bc514d858ea11eb6
https://github.com/llvm/llvm-project/commit/c2b57a052daee22cb6401bc7bc514d858ea11eb6
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Descriptor.h
M clang/lib/AST/Interp/Program.cpp
Log Message:
-----------
[clang][Interp][NFC] Make a few pointers const
Commit: 7388b7422f9307dd5ae3fe3876a676d83d702daf
https://github.com/llvm/llvm-project/commit/7388b7422f9307dd5ae3fe3876a676d83d702daf
Author: Juneyoung Lee <aqjune at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
A llvm/test/CodeGen/WebAssembly/signext-zeroext-callsite.ll
Log Message:
-----------
[WebAssembly] Correctly consider signext/zext arg flags at function declaration (#77281)
This patch fixes WebAssembly's FastISel pass to correctly consider
signext/zeroext parameter flags at function declaration.
Previously, the flags at call sites were only considered during code
generation, which caused an interesting bug report #63388 .
This is problematic especially because in WebAssembly's ABI, either
signext or zeroext can be tagged to a function argument, and it must be
correctly reflected in the generated code. Unit test
https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
shows that `i8 zeroext %t` and `i8 signext %t`'s code gen are different.
Commit: 7fc7ef14340a3a58cebd0801497b68eb698c2784
https://github.com/llvm/llvm-project/commit/7fc7ef14340a3a58cebd0801497b68eb698c2784
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fpenv.ll
A llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/GlobalISelEmitter.td
Log Message:
-----------
[GlobalISel] Lowering of {get,set,reset}_fpenv (#75086)
The intrinsics get_fpenv, set_fpenv and reset_fpenv in this change are
implemented as calls to math library functions. Target specific lowering
will be implemented later on.
Commit: efcf192a0a5993165f837ce71250fb6df689634b
https://github.com/llvm/llvm-project/commit/efcf192a0a5993165f837ce71250fb6df689634b
Author: Bhuminjay Soni <76656712+11happy at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Type.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/SemaCXX/warn-range-loop-analysis-trivially-copyable.cpp
Log Message:
-----------
Changed Checks from TriviallyCopyable to TriviallyCopyConstructible (#77194)
**Overview:**
Fix a bug where Clang's range-loop-analysis incorrectly checks for trivial copyability instead
of trivial copy constructibility, leading to erroneous warnings.
Fixes #47355
Commit: b788692fa5b6ed79ea2c85ee464353cca30d867a
https://github.com/llvm/llvm-project/commit/b788692fa5b6ed79ea2c85ee464353cca30d867a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-alu.ll
Log Message:
-----------
[RISCV][NFC] Remove unused CHECK prefixes to fix buildbots. NFC
Commit: 8f78dd4b92b44c490d263a4d161850853874859d
https://github.com/llvm/llvm-project/commit/8f78dd4b92b44c490d263a4d161850853874859d
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream-noopen.c
M clang/test/Analysis/stream.c
Log Message:
-----------
[clang][analyzer] Add function 'ungetc' to StreamChecker. (#77331)
`StdLibraryFunctionsChecker` is updated too with `ungetc`.
Commit: f443fbc49b8914a8453de61aea741221df9648cf
https://github.com/llvm/llvm-project/commit/f443fbc49b8914a8453de61aea741221df9648cf
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/LangOptions.def
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
A flang/test/Lower/OpenMP/nogpulib.f90
M flang/tools/bbc/bbc.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/attr.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[Flang][OpenMP][MLIR] Add support for -nogpulib option (#71045)
If -nogpulib option is passed by the user, then the OpenMP device
runtime is not used and we should not emit globals to configure
debugging at compile-time for the device runtime.
Link to -nogpulib flag implementation for Clang:
https://reviews.llvm.org/D125314
Commit: 084f1c2ee074a5ac8186ea4b5b181b48bf4621b6
https://github.com/llvm/llvm-project/commit/084f1c2ee074a5ac8186ea4b5b181b48bf4621b6
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/MC/AMDGPU/gfx11_asm_err.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
A llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa-fake16.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
Log Message:
-----------
[AMDGPU][True16] Support V_CEIL_F16. (#73108)
As not all fake instructions have their real counterparts implemented
yet, we specify no AssemblerPredicate for UseFakeTrue16Insts to allow
both fake and real True16 instructions in assembler and disassembler
tests in the -mattr=+real-true16 mode during the transition period.
Source DPP and desitnation VOPDstOperand_t16 operands are still not
supported and will be addressed separately.
Commit: d0918a20d2a85bad3cd0ec48be4b91e873bfe737
https://github.com/llvm/llvm-project/commit/d0918a20d2a85bad3cd0ec48be4b91e873bfe737
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr18xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add tests for CWG1800-1804 (#77509)
Covers C++ core issues 1800, 1801, 1802, 1803, 1804.
Commit: c69ec700adec315b3daa55742f2ef655242fa297
https://github.com/llvm/llvm-project/commit/c69ec700adec315b3daa55742f2ef655242fa297
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Format/.clang-format
M clang/lib/Format/.clang-format
M clang/tools/clang-format/.clang-format
M clang/unittests/Format/.clang-format
Log Message:
-----------
[clang-format][NFC] Don't use clang-format style in config files
The current CI doesn't use the latest clang-format and fails most
clang-format patches on the code formatting check. This patch
temporarily removes the clang-format style from the .clang-format
files.
Commit: 14435a28cd144f157ec4e6022d8c0ff0926e549f
https://github.com/llvm/llvm-project/commit/14435a28cd144f157ec4e6022d8c0ff0926e549f
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/CMakeLists.txt
Log Message:
-----------
[OpenMP] Allow setting OPENMP_INSTALL_LIBDIR (#77533)
The comment indicate that it should be possible, but as long as it
wasn't a cache variable, the cmake script overwrote whatever variable
the user had set.
Commit: be320fdf7ba9a94f6970f433ec1402cdc5cfe6b1
https://github.com/llvm/llvm-project/commit/be320fdf7ba9a94f6970f433ec1402cdc5cfe6b1
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libunwind/CMakeLists.txt
Log Message:
-----------
[libunwind] Convert a few options from CACHE PATH to CACHE STRING (#77534)
This applies the same change as in
760261a3daf98882ccbd177e3133fb4a058f47ad (where they were applied to
libcxxabi and libcxx) to libunwind as well.
These options can reasonably be set either as an absolute or relative
path, but if set as type PATH, they are rewritten from relative into
absolute relative to the build directory, while the relative form is
intended to be relative to the install prefix.
Commit: 65a56a29b6ad3d9df43df1c5a1238b1f870f24f9
https://github.com/llvm/llvm-project/commit/65a56a29b6ad3d9df43df1c5a1238b1f870f24f9
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/test/Driver/linux-ld.c
Log Message:
-----------
[clang] [Driver] Treat MuslEABIHF as a hardfloat environment wrt multiarch directories (#77536)
If using multiarch directories with musl, the multiarch directory still
uses *-linux-gnu triples - which may or may not be intentional, while it
is somewhat consistent at least.
However, for musl armhf targets, make sure that this also picks
arm-linux-gnueabihf, rather than arm-linux-gnueabi.
Commit: ef87e6643ea24103e884a71ec2f5cd2e13e0b454
https://github.com/llvm/llvm-project/commit/ef87e6643ea24103e884a71ec2f5cd2e13e0b454
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
Log Message:
-----------
[LVI] Assert that only one value is pushed (NFC)
Commit: a6b5d6dab0544892fb6afc46f71677969285c5a8
https://github.com/llvm/llvm-project/commit/a6b5d6dab0544892fb6afc46f71677969285c5a8
Author: avl-llvm <55248412+avl-llvm at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/test/tools/dsymutil/ARM/inline-source.test
Log Message:
-----------
[DWARFLinker] backport line table patch into the DWARFLinkerParallel. (#77497)
This patch backports https://github.com/llvm/llvm-project/pull/77016
into the DWARFLinkerParallel.
Commit: 7c71a09d5e712bedbed867226b3fa0bbfe789384
https://github.com/llvm/llvm-project/commit/7c71a09d5e712bedbed867226b3fa0bbfe789384
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/AssignmentTrackingAnalysis.h
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[CodeGen][NewPM] Port AssignmentTrackingAnalysis to new pass manager (#77550)
Commit: 7ce010f2fb01341ab253547324e126d81d47f794
https://github.com/llvm/llvm-project/commit/7ce010f2fb01341ab253547324e126d81d47f794
Author: martinboehme <mboehme at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/Formula.h
M clang/lib/Analysis/FlowSensitive/DataflowAnalysisContext.cpp
Log Message:
-----------
Revert "[clang][dataflow] Add an early-out to `flowConditionImplies()` / `flowConditionAllows()`." (#77570)
Reverts llvm/llvm-project#77453
Commit: e22cb93890c33e21534338e4f2ea5ce640c78b77
https://github.com/llvm/llvm-project/commit/e22cb93890c33e21534338e4f2ea5ce640c78b77
Author: David Green <david.green at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
A flang/test/HLFIR/all-elemental.fir
A flang/test/HLFIR/any-elemental.fir
Log Message:
-----------
[Flang] Any and All elemental lowering (#75776)
This is an extension of https://github.com/llvm/llvm-project/pull/75774,
with Any and All lowering added alongside Count.
Commit: a26cc759ae5a8018e2c328cf53173992340b995a
https://github.com/llvm/llvm-project/commit/a26cc759ae5a8018e2c328cf53173992340b995a
Author: Hana Dusíková <hanicka at hanicka.net>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Stmt.h
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CoverageMapping/if.cpp
Log Message:
-----------
[clang][coverage] Fix "if constexpr" and "if consteval" coverage report (#77214)
Replace the discarded statement by an empty compound statement so we can keep track of the
whole source range we need to skip in coverage
Fixes #54419
Commit: e2b896aa640fec25f68d283948c1b44711087f0f
https://github.com/llvm/llvm-project/commit/e2b896aa640fec25f68d283948c1b44711087f0f
Author: Yi Wu <43659785+yi-wu-arm at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
A flang/include/flang/Optimizer/Builder/Runtime/Execute.h
A flang/include/flang/Runtime/execute.h
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/lib/Optimizer/Builder/Runtime/Execute.cpp
M flang/runtime/CMakeLists.txt
M flang/runtime/command.cpp
A flang/runtime/execute.cpp
M flang/runtime/tools.cpp
M flang/runtime/tools.h
A flang/test/Lower/Intrinsics/execute_command_line-optional.f90
A flang/test/Lower/Intrinsics/execute_command_line.f90
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang] Add EXECUTE_COMMAND_LINE runtime and lowering intrinsics implementation (#74077)
This patch add support of intrinsics Fortran 2008 EXECUTE_COMMAND_LINE.
The patch contains both the lowering and the runtime code and works on
both Windows and Linux. The patch contains a list of commits, to convey
the authorship and the history of changes. Some implementation specifics
or status has been added to `flang/docs/Intrinsics.md`.
I have provided a summary of the usage and the options required for the
`EXECUTE_COMMAND_LINE intrinsic`. The intrinsic supports both a
synchronous
(by default) and an asynchronous option.
| System | Mode | Implemention |
|---------|-------|---------------------------|
| Linux | Sync | std::system() |
| Windows | Sync | std::system() |
| Linux | Async | fork() |
| Windows | Async | CreateProcess |
Support for the SYSTEM GNU extension will be added in a separate PR.
Co-authored with @jeffhammond
---------
Signed-off-by: Jeff Hammond <jeff.science at gmail.com>
Co-authored-by: Jeff Hammond <jeff.science at gmail.com>
Co-authored-by: Yi Wu <yiwu02 at wdev-yiwu02.arm.com>
Commit: ccaf9e0bc0a4739170584d995f9de98bf3beb1f9
https://github.com/llvm/llvm-project/commit/ccaf9e0bc0a4739170584d995f9de98bf3beb1f9
Author: David Sherwood <57997763+david-arm at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.cpp
M llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
Log Message:
-----------
[AArch64] Enable AArch64 loop idiom transform pass (#77480)
Following on from
https://github.com/llvm/llvm-project/pull/72273
which added the new AArch64 loop idiom transformation pass, this patch
enables the pass by default for AArch64.
Commit: 38394a3d0b8b9a1fdc444bdebeba17a19250997d
https://github.com/llvm/llvm-project/commit/38394a3d0b8b9a1fdc444bdebeba17a19250997d
Author: Lu Weining <luweining at loongson.cn>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Target.h
M lld/test/ELF/loongarch-pc-aligned.s
Log Message:
-----------
[lld][LoongArch] Handle extreme code model relocs according to psABI v2.30 (#73387)
psABI v2.30 requires the extreme code model instructions sequence
(pcalau12i+addi.d+lu32i.d+lu52i.d) to be adjacent.
See https://github.com/llvm/llvm-project/pull/71907 and
https://github.com/loongson-community/discussions/issues/17 for details.
Commit: 53d48902bc6b05cc284f767089fe070ada651910
https://github.com/llvm/llvm-project/commit/53d48902bc6b05cc284f767089fe070ada651910
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
Log Message:
-----------
[mlir][ArmSME] Add arm_sme.streaming_vl operation (#77321)
This operation provides a convenient way to query the streaming vector
length regardless of the streaming mode. This most useful for functions
that call/pass data to streaming functions, but are not streaming
themselves.
Example:
```mlir
%svl_w = arm_sme.streaming_vl <word>
```
Created based on discussion here:
https://github.com/llvm/llvm-project/pull/76086#discussion_r1434226352
Commit: 76482b74400cccae10d30195f6613f2bf538a43f
https://github.com/llvm/llvm-project/commit/76482b74400cccae10d30195f6613f2bf538a43f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
Log Message:
-----------
[SLSR] Regenerate test checks (NFC)
Commit: 9bc4355f091b530625ec6839a8c4858b6de4f1b4
https://github.com/llvm/llvm-project/commit/9bc4355f091b530625ec6839a8c4858b6de4f1b4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
Log Message:
-----------
[SLSR] Always generate i8 GEPs
Always generate canonical i8 GEPs. Especially as this is a backend
pass, trying to generate a "nice" GEP representation is not useful.
Commit: c2654befcaecba121ca40415d157925e0da05b5e
https://github.com/llvm/llvm-project/commit/c2654befcaecba121ca40415d157925e0da05b5e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
Log Message:
-----------
[SeparateConstOFfsetFromGEP] Regenerate test checks (NFC)
Commit: 5cc03442d392693d0d2457f571cc8fa1736bfe5e
https://github.com/llvm/llvm-project/commit/5cc03442d392693d0d2457f571cc8fa1736bfe5e
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
Log Message:
-----------
[clang-repl] Enable native CPU detection by default (#77491)
We can pass `-mcpu=native` to the clang driver to let it consider the
host CPU when choosing the compile target for `clang-repl`. We can
already achieve this behavior with `clang-repl -Xcc -mcpu=native`, but
it seems like a reasonable default actually.
The trade-off between optimizing for a specific CPU and maximum
compatibility often leans towards the latter for static binaries,
because distributing many versions is cumbersome. However, when
compiling at runtime, we know the exact target CPU and we can use that
to optimize the generated code.
This patch makes a difference especially for "scattered" architectures
like ARM. When cross-compiling for a Raspberry Pi for example, we may
use a stock toolchain like arm-linux-gnueabihf-gcc. The resulting binary
will be compatible with all hardware versions. This is handy, but they
will all have `arm-linux-gnueabihf` as their host triple. Previously,
this caused the clang driver to select triple `armv6kz-linux-gnueabihf`
and CPU `arm1176jzf-s` as the REPL target. After this patch the default
triple and CPU on Raspberry Pi 4b will be `armv8a-linux-gnueabihf` and
`cortex-a72` respectively.
With this patch clang-repl matches the host detection in Orc.
Commit: 08da7ac80c165dbae0cb71257b3cdcd8a1006a76
https://github.com/llvm/llvm-project/commit/08da7ac80c165dbae0cb71257b3cdcd8a1006a76
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
Log Message:
-----------
[AMDGPU] Fix broken sign-extended subword buffer load combine (#77470)
Commit: 9e5a77f252badfc932d1e28ee998746072ddc33f
https://github.com/llvm/llvm-project/commit/9e5a77f252badfc932d1e28ee998746072ddc33f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AArch64/scalable-vector-geps.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
Log Message:
-----------
[SeparateConstOffsetFromGEP] Always emit i8 gep
Always emit canonical i8 GEPs, don't try to preserve the original
element type. As this is a backend pass, trying to preserve the
type is not useful.
Commit: 29f98d6c25e237d311038ce225f0b3109925d400
https://github.com/llvm/llvm-project/commit/29f98d6c25e237d311038ce225f0b3109925d400
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/bitreverse-known-bits.ll
A llvm/test/Transforms/InstCombine/bitwiselogic-bitmanip.ll
M llvm/test/Transforms/InstCombine/bswap-fold.ll
Log Message:
-----------
[InstCombine] Fold bitwise logic with intrinsics (#77460)
This patch does the following folds:
```
bitwise(fshl (A, B, ShAmt), fshl(C, D, ShAmt)) -> fshl(bitwise(A, C), bitwise(B, D), ShAmt)
bitwise(fshr (A, B, ShAmt), fshr(C, D, ShAmt)) -> fshr(bitwise(A, C), bitwise(B, D), ShAmt)
bitwise(bswap(A), bswap(B)) -> bswap(bitwise(A, B))
bitwise(bswap(A), C) -> bswap(bitwise(A, bswap(C)))
bitwise(bitreverse(A), bitreverse(B)) -> bitreverse(bitwise(A, B))
bitwise(bitreverse(A), C) -> bitreverse(bitwise(A, bitreverse(C)))
```
Alive2: https://alive2.llvm.org/ce/z/iZN_TL
Commit: adfd13157dac4f512f579c14de8da6c7c0c9b698
https://github.com/llvm/llvm-project/commit/adfd13157dac4f512f579c14de8da6c7c0c9b698
Author: Mark Harley <mark.harley at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-m-forms-no-active-lanes.ll
Log Message:
-----------
[AArch64][SVE] Add optimisation for SVE intrinsics with no active lanes (#73964)
This patch introduces optimisations for SVE intrinsic function calls
which have all false predicates.
Commit: 78cf2c041b778c82cc01b8606ec3e68840b769af
https://github.com/llvm/llvm-project/commit/78cf2c041b778c82cc01b8606ec3e68840b769af
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/pr77459.ll
Log Message:
-----------
[X86] pr77459.ll - add missing AVX512 check prefixes
Missed these in 3210ce276350a247220b193db12a9b45d1034724 for the #77459 fix
Commit: 5b4abae7630572c96a736faa1f09b1a3c37201a2
https://github.com/llvm/llvm-project/commit/5b4abae7630572c96a736faa1f09b1a3c37201a2
Author: darkfeline <darkfeline at felesatra.moe>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/tool/clang-include-fixer.el
M clang/tools/clang-format/clang-format.el
M clang/tools/clang-rename/clang-rename.el
M llvm/utils/emacs/tablegen-mode.el
M mlir/utils/emacs/mlir-lsp-client.el
M mlir/utils/emacs/mlir-mode.el
Log Message:
-----------
[emacs] Fix Emacs library formatting (#76110)
This makes it easier to ship/install these using the builtin Emacs
package format (in particular, a Version is required).
Commit: 205aa3fb89769c703c14ff448cb7bff73438488f
https://github.com/llvm/llvm-project/commit/205aa3fb89769c703c14ff448cb7bff73438488f
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/docs/GettingStarted.md
Log Message:
-----------
[flang] Document DEFAULT_SYSROOT usage on Darwin (#77353)
Commit: 1220c9bafc11a3edf96921a8ab892d777b7ed06b
https://github.com/llvm/llvm-project/commit/1220c9bafc11a3edf96921a8ab892d777b7ed06b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
A llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
Log Message:
-----------
[InstCombine] Fold the `log2_ceil` idiom (#76661)
This patch folds the `log2_ceil` idiom:
```
(BW - ctlz(A)) + (is_power2(A) ? 0 : 1) ->
zext(ctpop(A) >u/!= 1) + (ctlz(A, true) ^ (BW - 1)) (canonical form) ->
BW - ctlz(A - 1, false)
```
Alive2: https://alive2.llvm.org/ce/z/6mSbdi
Commit: c933bd818594c872435d6f1d2cc5ad18715a8986
https://github.com/llvm/llvm-project/commit/c933bd818594c872435d6f1d2cc5ad18715a8986
Author: Thomas Raoux <thomas.raoux at openai.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/test/Dialect/SCF/loop-pipelining.mlir
Log Message:
-----------
[MLIR][SCF] Add checks to verify that the pipeliner schedule is correct. (#77083)
Add a check to validate that the schedule passed to the pipeliner
transformation is valid and won't cause the pipeliner to break SSA.
This checks that the for each operation in the loop operations are
scheduled after their operands.
Commit: 19044b099db0882af788d44bf2369a5becf47b00
https://github.com/llvm/llvm-project/commit/19044b099db0882af788d44bf2369a5becf47b00
Author: Maciej Gabka <maciej.gabka at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
Log Message:
-----------
[NFC][TLI] order SLEEF and ArmPL mappings by alphabetical order (#77500)
To make checking test easier, it is better to keep an order of the TLI
mappings. This patch sorts all variants of the SLEEF and ArmPL mappings
in the order of their base names.
This patch also removes some extra inconsistent whitespace added to some
of the entries.
Commit: 77753750033632e353e17948457433efd67f92de
https://github.com/llvm/llvm-project/commit/77753750033632e353e17948457433efd67f92de
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/docs/GettingStarted.md
Log Message:
-----------
[flang][doc] Correct spelling of CMake
Commit: cc21aa1922b3d0c4fde52046d8d16d1048f8064e
https://github.com/llvm/llvm-project/commit/cc21aa1922b3d0c4fde52046d8d16d1048f8064e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr77459.ll
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
Log Message:
-----------
[X86] lower1BitShuffle - fold permute(setcc(x,y)) -> setcc(permute(x),permute(y)) for 32/64-bit element vectors
Noticed in #77459 - for wider element types, its usually better to pre-shuffle the comparison arguments if we can, like we already for broadcasts
Commit: b8dca4fa729fcbd5d42ce3ca056dc4d278da2548
https://github.com/llvm/llvm-project/commit/b8dca4fa729fcbd5d42ce3ca056dc4d278da2548
Author: Vivek Khandelwal <vivekkhandelwal1424 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/test/Conversion/MathToLibm/convert-to-libm.mlir
Log Message:
-----------
[mlir][math] Add math.acosh|asin|asinh|atanh op (#77463)
Signed-Off By: Vivek Khandelwal <vivekkhandelwal1424 at gmail.com>
Commit: 60bb5c54f6e1eeed0aae7917d10f746ee8135d9d
https://github.com/llvm/llvm-project/commit/60bb5c54f6e1eeed0aae7917d10f746ee8135d9d
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
Log Message:
-----------
[AMDGPU] Fix predicates for various True16 instructions. (#77581)
Resolves AsmParser ambiguities, e.g., between
V_SUBREV_F16_t16_dpp8_gfx11 and V_SUBREV_F16_t16_dpp8_gfx12.
Part of <https://github.com/llvm/llvm-project/issues/69256>.
Commit: 5c0b3a0cb7f70db3ebcd195596e5fadc12d0bc9c
https://github.com/llvm/llvm-project/commit/5c0b3a0cb7f70db3ebcd195596e5fadc12d0bc9c
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
Log Message:
-----------
[lldb][ClangASTImporter][NFC] Remove redundant do-while loop (#77596)
This seems to have always been a redundant do-while since its
introduction in `2e93a2ad2148d19337bf5f9885e46e3c00e8ab82`.
Commit: d65a7d1f1a2139f927949ab6b1a9d90113de9a90
https://github.com/llvm/llvm-project/commit/d65a7d1f1a2139f927949ab6b1a9d90113de9a90
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/CMakeLists.txt
Log Message:
-----------
[Libomptarget] Do not run CPU tests if FFI was not found
Summary:
The previous behaviour before I made it dynamically open libFFI was that
these tests would be ignored if FFI was not found. This now allows tests
to be run without the dependency and thus the tests fails on some
buildbots. This simply makesit not build the tests if it's not present.
Commit: 9aa8c82748bfb313598e71476123b785f6da41b9
https://github.com/llvm/llvm-project/commit/9aa8c82748bfb313598e71476123b785f6da41b9
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
A llvm/test/CodeGen/SystemZ/shift-16.ll
Log Message:
-----------
[SystemZ] Fix 256-bit shifts when i128 is legal
When i128 is a legal type, SelectionDAG now attempts to use
SRL_PARTS etc. with type i128, which is not implemented. Fix
by marking those as Expand, just like we do for i64.
Fixes https://github.com/llvm/llvm-project/issues/77132
Commit: ae978baaf6cc5566036b89ceaadcabb47361ba2f
https://github.com/llvm/llvm-project/commit/ae978baaf6cc5566036b89ceaadcabb47361ba2f
Author: John Brawn <john.brawn at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/Scalar/LoopFlatten.cpp
A llvm/test/Transforms/LoopFlatten/loop-flatten-gep.ll
Log Message:
-----------
[LoopFlatten] Recognise gep+gep (#72515)
Now that InstCombine canonicalises add+gep to gep+gep, LoopFlatten needs
to recognise (gep (gep ptr (i*M)), j) as being something it can
optimise.
Commit: 9bde5becb44ea071f5e1fa1f5d4071dc8788b18c
https://github.com/llvm/llvm-project/commit/9bde5becb44ea071f5e1fa1f5d4071dc8788b18c
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/branchfolding-landingpad-cfg.mir
Log Message:
-----------
[BranchFolding][SEH] Add test to track SEH CFG optimization (#77598)
This test tracks BranchFolding pass which removes fall through jump and
leaves landing-pad to be machine basic block of no predecessors. It
would raise bug as introduced in #77441.
Commit: 113bce0c79fe5cc2b949949c5d96b7f679524b6e
https://github.com/llvm/llvm-project/commit/113bce0c79fe5cc2b949949c5d96b7f679524b6e
Author: Prathamesh Tagore <63031630+meshtag at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
Log Message:
-----------
[mlir][tensor] Fold producer linalg transpose with consumer tensor pack (#75658)
Successor to https://github.com/llvm/llvm-project/pull/74206
Partial fix to https://github.com/openxla/iree/issues/15367
Commit: 45be680b1ae51866568b1794fa6f59190042ee92
https://github.com/llvm/llvm-project/commit/45be680b1ae51866568b1794fa6f59190042ee92
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/rangereduce.ll
Log Message:
-----------
[SimplifyCFG] Emit `rotl` directly in `ReduceSwitchRange` (#77603)
This patch emits `ROTL(Cond, BitWidth - Shift)` directly in
`ReduceSwitchRange`. This should give better codegen because
`SimplifyDemandedBits` will break the rotation patterns in the original
form.
See also https://github.com/llvm/llvm-project/pull/73441 and the IR diff
https://github.com/dtcxzyw/llvm-opt-benchmark/pull/115/files.
This patch should cover most of cases handled by #73441.
Commit: fef2fc3400eb5a22a5ccc96bd3862bec0058d305
https://github.com/llvm/llvm-project/commit/fef2fc3400eb5a22a5ccc96bd3862bec0058d305
Author: Visoiu Mistrih Francis <890283+francisvm at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/TableGen/Record.cpp
M llvm/test/TableGen/getsetop.td
Log Message:
-----------
[TableGen] Support non-def operators in !getdagop (#77531)
`!getdagop` expects the dag operator to be a def, and errors out if it's
not.
While that's true in most cases, when multiclasses are involved, the
late resolution of the dag operator can result in it not being a def
yet, but still have a proper type, wich is required to check against the
optional parameter Ty in `!getdagop<Ty>`.
e.g, in the following dag:
```
(!cast<TestInstruction>(TestInstructionAndPattern::NAME) foo)
```
the operator is a UnOpInit, but all we need here is to check its type.
This fixes a bug where !getdagop is used to query the dag operator that
is dependent on the multiclass, which is not yet resolved to a def. Once
the folding is performed, the field becomes a record that can be
queried.
Commit: 79aa77626770c91badd7c9ba9d26e55a28d34416
https://github.com/llvm/llvm-project/commit/79aa77626770c91badd7c9ba9d26e55a28d34416
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
A mlir/include/mlir/Dialect/Mesh/Transforms/Transforms.h
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
A mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
A mlir/test/Dialect/Mesh/process-multi-index-op-lowering.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
A mlir/test/lib/Dialect/Mesh/TestProcessMultiIndexOpLowering.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][mesh] Add lowering of process multi-index op (#77490)
* Rename mesh.process_index -> mesh.process_multi_index.
* Add mesh.process_linear_index op.
* Add lowering of mesh.process_multi_index into an expression using
mesh.process_linear_index, mesh.cluster_shape and
affine.delinearize_index.
This is useful to lower mesh ops and prepare them for further lowering
where the runtime may have only the linear index of a device/process.
For example in MPI we have a rank (linear index) in a communicator.
Commit: 8b7bbedec7bcfbeaee4ab9b74471cbbbc8633e1a
https://github.com/llvm/llvm-project/commit/8b7bbedec7bcfbeaee4ab9b74471cbbbc8633e1a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Re-add early exit in VPRecipeBuilder::createBlockInMask.
Re-add early exit that was accidentally dropped in 51afb10.
Commit: 14e291000f96c20e35ef494bd407f459b4617fca
https://github.com/llvm/llvm-project/commit/14e291000f96c20e35ef494bd407f459b4617fca
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/Support/RISCVISAInfo.h
Log Message:
-----------
[RISCV] Remove extraneous semicolons. NFC
Commit: 6876fe53afabfc6f0c3b5e7c838f32a282da6f77
https://github.com/llvm/llvm-project/commit/6876fe53afabfc6f0c3b5e7c838f32a282da6f77
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
A mlir/test/Dialect/Linalg/transform-op-peel-and-vectorize.mlir
Log Message:
-----------
[mlir][linalg] Add a test to demonstrate peeling + vectorisation (#77590)
Following on from #75842, we can demonstrate that loop peeling combined
with masked vectorisation and existing canonicalization for vector.mask
operations leads to the following loop structure:
```
// M dimension
scf.for 1:M
// N dimension (contains vector ops _without_ masking)
scf.for 1:UB
// K dimension
scf.for 1:K
vector.add
// N dimension (contains vector ops _with_ masking)
scf.for UB:N
// K dimension
scf.for 1:K
vector.mask { vector.add }
```
This is particularly beneficial for scalable vectors which normally
require masking. This example demonstrates how to avoid them.
Commit: 73ce13d79bb6f200d6dde61a88369daf74c7a39e
https://github.com/llvm/llvm-project/commit/73ce13d79bb6f200d6dde61a88369daf74c7a39e
Author: Alexey Bataev <5361294+alexey-bataev at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
Log Message:
-----------
[SLP][TTI]Improve detection of the insert-subvector pattern for SLP. (#74749)
SLP vectorizer passes the type of the subvector and the mask, which size
determines the size of the resulting vector. TTI should support this
pattern to improve cost estimation of the insert_subvector shuffle
pattern.
Commit: 6c92770a80257018df69369fd617628c80b9fa18
https://github.com/llvm/llvm-project/commit/6c92770a80257018df69369fd617628c80b9fa18
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
Log Message:
-----------
[RewriteStatepointsForGC] Remove unnecessary bitcasts (NFCI)
Commit: d301539b777c5047d1420003b4ab1e05a1f87166
https://github.com/llvm/llvm-project/commit/d301539b777c5047d1420003b4ab1e05a1f87166
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/docs/TestingLibcxx.rst
M libcxx/utils/libcxx/test/format.py
Log Message:
-----------
[libc++][docs] Document the libc++ Lit testing format naming scheme (#73136)
As a new contributor, I found it hard to find the documentation for the
meaning of the names of different tests and how those names translate to
Lit. This patch moves the documentation to the RST documentation we
publish on the website instead of leaving it in the source code only.
Commit: 5934a6ee5967f795634d5161d46da8412be96404
https://github.com/llvm/llvm-project/commit/5934a6ee5967f795634d5161d46da8412be96404
Author: Paul T Robinson <paul.robinson at sony.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/Headers/ia32intrin.h
Log Message:
-----------
[Headers][X86] Reformat ia32intrin.h doc to match the other headers (#77525)
Doxygen comment style for every other intrinsic-function header uses ///
comments, so change ia32intrin.h from the /** style to /// style. While
I was in there, change `<c> INSTR </c>` to `\c INSTR` and toss in a few
missing full-stops.
Commit: 0d6412eae32777cd892a1a9ed016a07e68eaa191
https://github.com/llvm/llvm-project/commit/0d6412eae32777cd892a1a9ed016a07e68eaa191
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/libomptarget/src/omptarget.cpp
Log Message:
-----------
[Libomptarget] Add error message back in after changes (#77528)
Summary:
My previous reworking of the image hangling removed the image info which
was originally used for this extra error message requested by Ye Luo. I
have since added in the necessary ELF facilities to extract it from the
object file and can add it back in. It's a little verbose mostly from
needing to shuffle around types and potential errors.
Commit: d03b8c3a048262eae1b13be829e20971e1714ade
https://github.com/llvm/llvm-project/commit/d03b8c3a048262eae1b13be829e20971e1714ade
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/libomptarget/DeviceRTL/include/State.h
M openmp/libomptarget/DeviceRTL/src/Kernel.cpp
M openmp/libomptarget/DeviceRTL/src/Parallelism.cpp
M openmp/libomptarget/DeviceRTL/src/Reduction.cpp
M openmp/libomptarget/include/Shared/Profile.h
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/common/include/GlobalHandler.h
M openmp/libomptarget/plugins-nextgen/common/src/JIT.cpp
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/plugins-nextgen/cuda/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/generic-elf-64bit/src/rtl.cpp
M openmp/libomptarget/src/OpenMP/Mapping.cpp
M openmp/libomptarget/src/OpenMP/OMPT/Callback.cpp
M openmp/libomptarget/src/device.cpp
M openmp/libomptarget/src/interface.cpp
M openmp/libomptarget/src/omptarget.cpp
M openmp/libomptarget/tools/kernelreplay/llvm-omp-kernel-replay.cpp
Log Message:
-----------
[Libomptarget][NFC] Format in-line comments consistently (#77530)
Summary:
The LLVM style uses /*Foo=*/ when indicating the name of a constant. See
https://llvm.org/docs/CodingStandards.html#comment-formatting. This is
useful for consistency, as well as because `clang-format` understands
this syntax and formats it more cleanly. Do a bulk update of this
syntax.
Commit: d4b4ded1867768ecb2c857ae9c2593764d7f3e41
https://github.com/llvm/llvm-project/commit/d4b4ded1867768ecb2c857ae9c2593764d7f3e41
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/include/flang/Parser/format-specification.h
Log Message:
-----------
[Flang][Parser] Add missing #include "flang/Common/idioms.h" (#77484)
The file format-specification.h uses definitions from Fortran::common,
but doesn't include any headers that provide them.
Commit: 2472c45ba38828ee084360d52705955ff763e5b0
https://github.com/llvm/llvm-project/commit/2472c45ba38828ee084360d52705955ff763e5b0
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Utils/IndexingUtils.h
M mlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/Dialect/Utils/IndexingUtils.cpp
M mlir/test/Dialect/Tensor/simplify-pack-unpack.mlir
Log Message:
-----------
[mlir][tensor] Enhance pack/unpack simplification for identity outer_dims_perm cases. (#77409)
They can be simplified to reshape ops if outer_dims_perm is an identity
permutation. The revision adds a `isIdentityPermutation` method to
IndexingUtils.
Commit: fb1523e7120aeb9584eef5b3241f03f1cadff62b
https://github.com/llvm/llvm-project/commit/fb1523e7120aeb9584eef5b3241f03f1cadff62b
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Port 79aa77626770c91badd7c9ba9d26e55a28d34416
Commit: 1d5106d69cf475215887c42834158d710e586f1b
https://github.com/llvm/llvm-project/commit/1d5106d69cf475215887c42834158d710e586f1b
Author: Frederik Carlier <frederik.carlier at keysight.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
A clang/test/CodeGenObjC/exceptions-personality.m
M clang/test/CodeGenObjC/personality.m
M clang/test/CodeGenObjCXX/personality.mm
Log Message:
-----------
Objective C: use C++ exceptions on MinGW+GNUstep (#77255)
The GNUstep Objective C runtime (libobjc2) is adding support for the GNU
ABI on Windows (more specifically, MinGW). The libobjc2 runtime uses C++
exceptions in that configuration; this PR updates clang to act
accordingly.
The corresponding change to libobjc2 is here:
https://github.com/gnustep/libobjc2/pull/267
Commit: af78e5daf0791135485dbd7972ffedb927727a6b
https://github.com/llvm/llvm-project/commit/af78e5daf0791135485dbd7972ffedb927727a6b
Author: Tai Ly <tai.ly at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa]Fix Rescale shift attr data type (#71084)
Change Rescale shift attribute to be DenseI8ArrayAttr to match spec
(instead of DenseI32ArrayAttr)
This replaces https://reviews.llvm.org/D157439
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: d7ac4123333a5bc042b2eb9e17df8f723f6b56d9
https://github.com/llvm/llvm-project/commit/d7ac4123333a5bc042b2eb9e17df8f723f6b56d9
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve2-min-max-clamp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-sclamp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uclamp.ll
Log Message:
-----------
[AArch64][SME] Fix definition of uclamp/sclamp instructions. (#77619)
For some reason the arguments were in the wrong order.
Commit: 14e7dac92a32f900a66cb868be89c964b687a825
https://github.com/llvm/llvm-project/commit/14e7dac92a32f900a66cb868be89c964b687a825
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1_single.c
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-extq.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-st1-single.ll
Log Message:
-----------
[Clang][LLVM][AArch64]SVE2.1 update the intrinsics according to acle[1] (#76844)
This patch changes the following intrinsic
```svst1uwq[_{d}] replaced by svst1wq[_{d}]
svst1uwq_vnum[_{d}] replaced by svst1wq_vnum[_{d}]
svst1udq[_{d}] replaced by svst1dq[_{d}]
svst1udq_vnum[_{d}] replaced by svst1dq_vnum[_{d}]
```
Drops 'u' from the quadword stores because it is simply truncating the
quadwords to 32 bits
```
svextq_lane[_{d}] replaced by svextq[_{d}]
```
EXTQ follows the previous defined EXT intrinsics
```
svdot[_{d}_{2}_{3}] replaced by svdot[_{d}_{2}]
```
Introduced with the latest SME2 ACLE change
[1]https://github.com/ARM-software/acle/pull/257
Commit: c053e9f0f4b56a56582ad149a8c89434126eff7f
https://github.com/llvm/llvm-project/commit/c053e9f0f4b56a56582ad149a8c89434126eff7f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/test/MC/RISCV/rv32zacas-invalid.s
M llvm/test/MC/RISCV/rv64zacas-invalid.s
Log Message:
-----------
[RISCV] Re-implement Zacas MC layer support to make it usable for CodeGen. (#77418)
This changes the register class to GPRPair and adds the destination
register as a source with a tied operand constraint.
Parsing for the paired register is done with a custom parser that
checks for even register and converts it to its pair version. A
bit of care needs to be taken so that we only parse as a pair register
based on which instruction we're parsing and the mode in the subtarget.
This allows amocas.w to be parsed correcty in both modes.
I've added a FIXME to note that we should be creating pair registers
for Zdinx on RV32 to match the instructions CodeGen generates.
Commit: 6bc7e3764c244b3d6ba2ab861889d80082766017
https://github.com/llvm/llvm-project/commit/6bc7e3764c244b3d6ba2ab861889d80082766017
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
Log Message:
-----------
[MLIR][Tensor] Fix checks for `fold-into-pack-and-unpack.mlir` (#77622)
Fix after 113bce0
Commit: 7cc9ae95512edd0b969823fdfa062b92cb3c4d4e
https://github.com/llvm/llvm-project/commit/7cc9ae95512edd0b969823fdfa062b92cb3c4d4e
Author: Okwan Kwon <okkwon at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Complex/IR/ComplexDialect.cpp
M mlir/test/Transforms/inlining.mlir
Log Message:
-----------
[mlir] allow inlining complex ops (#77514)
Complex ops are pure ops just like the arithmetic ops so they can be
inlined.
Commit: 2c60d59864ed8b2b26c4f0683ee7a1816c6d951e
https://github.com/llvm/llvm-project/commit/2c60d59864ed8b2b26c4f0683ee7a1816c6d951e
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
A flang/test/Driver/riscv-rvv-vector-bits.f90
Log Message:
-----------
[Flang] Support -mrvv-vector-bits flag (#77588)
This patch adds support for the -mrvv-vector-bits flag in the Flang
driver, and
translates them to -mvscale-min/-mvscale-max.
The code was copied from the Clang toolchain (similarly to what was done
for
AArch64's -msve-vector-bits flag) so it also supports the same
-mrvv-vector-bits=zvl mode.
Note that Flang doesn't yet define the __riscv_v_fixed_vlen macro, so
the help
text has been updated to highlight that it's only defined for Clang.
Commit: e203968e411bba6395133d93881eb32e7895e50b
https://github.com/llvm/llvm-project/commit/e203968e411bba6395133d93881eb32e7895e50b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Libomptarget] Do not abort on failed plugin init (#77623)
Summary:
The current code logic is supposed to skip plugins that aren't found or
could not be loaded. However, the plugic ontained a call to `abort` if
it failed, which prevented us from continuing if initilalization the
plugin failed (such as if `dlopen` failed for the dyanmic plugins).
Commit: 6a075a9d5dda8f6ce37b176c6d4a7f87a770ec31
https://github.com/llvm/llvm-project/commit/6a075a9d5dda8f6ce37b176c6d4a7f87a770ec31
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM]: Update setmaxregister NVVM Op (#77594)
This patch updates the setmaxregister NVVM Op to use the
intrinsics instead of inline-ptx.
* The interface remains same (as expected).
* Tests are added to verify the lowered intrinsics in
Target/LLVMIR/nvvmir.mlir.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: f502b981b471c04bef1b2a6c581c02b59f931163
https://github.com/llvm/llvm-project/commit/f502b981b471c04bef1b2a6c581c02b59f931163
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/test/libcxx/ranges/range.utility.helpers/simple_view.compile.pass.cpp
Log Message:
-----------
[libc++][NFC] Add comment in test to explain the presence of some assertions
Commit: cd7eaaa6db0dc9a00a097ba8e6ebad6fb2dec56a
https://github.com/llvm/llvm-project/commit/cd7eaaa6db0dc9a00a097ba8e6ebad6fb2dec56a
Author: Pete Lawrence <plawrence at apple.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lldb/include/lldb/Utility/StreamString.h
M lldb/source/Utility/StreamString.cpp
Log Message:
-----------
[lldb] Add color support to StreamString (#77380)
This change just adds a `bool colors` parameter to the `StreamString`
class's constructor, which it passes up to its superclass’s constructor.
I'm working on another patch that prints out error messages using a
`StreamString` but I wasn't getting colorized text because of this
missing implementation detail.
rdar://120671168
Commit: 1c209322e462c1d1675cc4b9947712dcceac93b5
https://github.com/llvm/llvm-project/commit/1c209322e462c1d1675cc4b9947712dcceac93b5
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/ADT/StringRef.h
M llvm/unittests/ADT/StringRefTest.cpp
Log Message:
-----------
[ADT] Make StringRef std::string_view conversion operator constexpr. NFC (#77506)
This would allow us to compare StringRefs via std::string_view, avoiding
having
to make the existing StringRef compare machinery constexpr for now.
Commit: cac6b1a5420d76f4635696372849dbbf07a77376
https://github.com/llvm/llvm-project/commit/cac6b1a5420d76f4635696372849dbbf07a77376
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-cache-construct.c
M clang/test/ParserOpenACC/parse-cache-construct.cpp
Log Message:
-----------
[OpenACC] Implement 'var' parsing correctly, support array sections (#77617)
While investigating implementing 'var-list' generically for the variety
of clauses that support this syntax (an extensive list!) I discovered
that it includes 'compound types' and members of compound types, as well
as array sections.
This patch genericizes that function, and implements it in terms of an
assignment expression, and enables a simplified version of OMP Array
Sections for it. OpenACC only supports a startidx + length, so this
patch implements that parsing.
However, it is currently still being represented as an OpenMP Array
Section, which is semantically very similar. It is my intent to come
back and genericize the OMP Array Sections types (or create a similar
expression node) in the future when dealing with Sema.
At the moment, the only obvious problem with it is that the diagnostic
for using it in the 'wrong' place says OpenMP instead of OpenACC, which
I intend to fix when I deal with the AST node changes.
Commit: 761b9d9e4631aa85f932e5ee33aae1f7b8a0538e
https://github.com/llvm/llvm-project/commit/761b9d9e4631aa85f932e5ee33aae1f7b8a0538e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/include/__config
M libcxx/include/cstdio
Log Message:
-----------
[libc++] Remove _LIBCPP_C_HAS_NO_GETS (#77346)
Since we use _LIBCPP_USING_IF_EXISTS to handle missing C library functions
now, _LIBCPP_C_HAS_NO_GETS shouldn't be necessary anymore.
See the discussion thread in #77242 for more details.
Commit: 04f77a1320e14560543e3b876f11804fa50a45ff
https://github.com/llvm/llvm-project/commit/04f77a1320e14560543e3b876f11804fa50a45ff
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
Log Message:
-----------
[SLP][NFC]Replace constant by some meaningfull values to make test more
relevant, NFC.
Commit: 004ec8ea1e9bd775246dba4eb93c1025bedaa5bd
https://github.com/llvm/llvm-project/commit/004ec8ea1e9bd775246dba4eb93c1025bedaa5bd
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
Log Message:
-----------
[ci] Set timeout for individual tests and report slowest tests (#76300)
There are builds like
https://buildkite.com/llvm-project/github-pull-requests/builds/24894
It looks like a deadlock in a test, but we can't see which one.
`--timeout=` will make lit kill and report such tests.
`--time-tests` produces nice report about slowest test, so we can tune
them over time.
The same build as above with new flags
https://buildkite.com/llvm-project/github-pull-requests/builds/24961
Commit: f1e4142f930a4c9d301061a1c31c9a8853f28d83
https://github.com/llvm/llvm-project/commit/f1e4142f930a4c9d301061a1c31c9a8853f28d83
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
Log Message:
-----------
[compiler-rt][profile] remove unneeded freebsd hack. (#77209)
Commit: c1d02bd1479e669f6622f3f9b5b52423ae9631a1
https://github.com/llvm/llvm-project/commit/c1d02bd1479e669f6622f3f9b5b52423ae9631a1
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Parser.h
M mlir/lib/AsmParser/ParserState.h
Log Message:
-----------
[mlir] Change end of OperationDefinition. (#77273)
Store the last token parsed in the parser state so that the range parsed
can utilize its end rather than the start of the token after parsed.
This results in a tighter range (especially true in the case of
comments, see
```mlir
|%c4 = arith.constant 4 : index
// Foo
|
```
vs
```mlir
|%c4 = arith.constant 4 : index|
```
).
Discovered while working on a little textual post processing tool.
Commit: 5c9b713394486be91dc181062e5c01d696c30787
https://github.com/llvm/llvm-project/commit/5c9b713394486be91dc181062e5c01d696c30787
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
Log Message:
-----------
[libc++][NFC] Fix typo in comments
Commit: 3358c77b01fff71c586cc998dd80e06662d9e854
https://github.com/llvm/llvm-project/commit/3358c77b01fff71c586cc998dd80e06662d9e854
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/CMakeLists.txt
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[CMake] Deprecate GCC_INSTALL_PREFIX (#77537)
Part of https://reviews.llvm.org/D158218
GCC_INSTALL_PREFIX is a rarely-used legacy option inherited from
pre-CMake build system and has configuration file replacement nowadays.
Many `clang/test/Driver` tests specify `--gcc-toolchain=` to prevent
failures when `GCC_INSTALL_PREFIX` is specified: some contributors add
them to fix tests and some just do cargo culting. This is not healthy
for contributors adding cross compilation support for this rarely used
option.
`DEFAULT_SYSROOT` should in spirit be deprecated as well, but a relative
path doesn't have good replacement, so don't deprecate it for now.
Link:
https://discourse.llvm.org/t/add-gcc-install-dir-deprecate-gcc-toolchain-and-remove-gcc-install-prefix/65091
Link:
https://discourse.llvm.org/t/correct-cmake-parameters-for-building-clang-and-lld-for-riscv/72833
---
With `GCC_INSTALL_PREFIX=/usr`, `clang a.c` behaves like
`clang --gcc-toolchain=/usr a.c`.
Here is a simplified version of GCC installation detection code.
```
if (OPT_gcc_install_dir_EQ)
return OPT_gcc_install_dir_EQ;
if (OPT_gcc_triple)
candidate_gcc_triples = {OPT_gcc_triple};
else
candidate_gcc_triples = collectCandidateTriples();
if (OPT_gcc_toolchain)
prefixes = {OPT_gcc_toolchain};
else
prefixes = {OPT_sysroot/usr, OPT_sysroot};
for (prefix : prefixes)
if "$prefix/lib/gcc" exists // also tries $prefix/lib/gcc-cross
for (triple : candidate_gcc_triples)
if "$prefix/lib/gcc/$triple" exists
return "$prefix/lib/gcc/$triple/$version"; // pick the largest version
```
`--gcc-toolchain=` specifies a directory where
`lib/gcc{,-cross}/$triple/$version` can be found. If you actually want
to use a specific version of GCC, specify something like
`--gcc-install-dir=/usr/lib/gcc/x86_64-linux-gnu/11` in a configuration
file. You can also specify `--gcc-triple=`.
On Debian and its derivatives where the target triple omits the vendor
part, the following ways are roughly equivalent, except that
`--gcc-install-dir=` specifies a version as well:
```
clang --gcc-toolchain=/usr a.c
clang --gcc-install-dir=/usr/lib/gcc/x86_64-linux-gnu/11 a.c
clang --gcc-triple=x86_64-linux-gnu a.c
```
Commit: e6c2952eb51a422e17f002d97b0ea467be4d325b
https://github.com/llvm/llvm-project/commit/e6c2952eb51a422e17f002d97b0ea467be4d325b
Author: ChiaHungDuan <chiahungduan at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/condition_variable.h
Log Message:
-----------
[scudo] Condition variable can be disabled by setting the flag to off (#77532)
To enable the condition variable, you have to define both
UseConditionVariable and the ConditionVariableT. Otherwise, it'll be
disabled. However, you may want to disable the condition variable by
setting UseConditionVariable=false, for example, while measuring the
performance and you want to turn it off temporarily. Instead of
requiring the removal of the variable, examining its value makes more
sense.
Commit: 408dce82016463dcb5026b2ddfc62174970a88e9
https://github.com/llvm/llvm-project/commit/408dce82016463dcb5026b2ddfc62174970a88e9
Author: Alexey Bataev <5361294+alexey-bataev at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll
Log Message:
-----------
[SLP]Do not require external uses for roots and single use for other instructions in computeMinimumValueSizes. (#72679)
After changes, that does not require support from InstCombine, we can
drop some extra requirements for values-to-be-demoted. No need to check
for external uses for roots/other instructions, just check that the
no non-vectorized insertelement instruction, which may require
widening.
Commit: 51fbab134560ece663517bf1e8c2a30300d08f1a
https://github.com/llvm/llvm-project/commit/51fbab134560ece663517bf1e8c2a30300d08f1a
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/alloca_vla_interact.cpp
M compiler-rt/test/asan/TestCases/scariness_score_test.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll
M llvm/test/Instrumentation/AddressSanitizer/debug_info.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime-uar-uas.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime.ll
M llvm/test/Instrumentation/AddressSanitizer/local_stack_base.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_dynamic_alloca.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_layout.ll
Log Message:
-----------
[asan] Enable StackSafetyAnalysis by default
StackSafetyAnalysis determines whether stack-allocated variables are
guaranteed to be safe from memory access bugs and enables the removal of
certain unneeded instrumentations.
(hwasan enables StackSafetyAnalysis in https://reviews.llvm.org/D108381)
Test updates:
* asan-stack-safety.ll: test the -asan-use-stack-safety=1 default
* lifetime-uar-uas.ll: switch to an indexed store to prevent
StackSafetyAnalysis from optimizing out instrumentation for %c
* alloca_vla_interact.cpp: add a load to prevent StackSafetyAnalysis
from optimizing out `__asan_alloca_poison` for the VLA `array`
* scariness_score_test.cpp: add -asan-use-stack-safety=0 to make a load
of a `__asan_poison_memory_region`-poisoned local variable fail as
intended.
* other .ll tests: add -asan-use-stack-safety=0
Reviewers: kstoimenov, eugenis, vitalybuka
Reviewed By: kstoimenov
Pull Request: https://github.com/llvm/llvm-project/pull/77210
Commit: e80b9436476bba714e843461e03227b222185f7b
https://github.com/llvm/llvm-project/commit/e80b9436476bba714e843461e03227b222185f7b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp] Fix discarded integral and floating casts (#77295)
We need to handle this at the CastExpr level.
Commit: a1dc813f759955ddbcf9b12ed052dfc8a07fdf4a
https://github.com/llvm/llvm-project/commit/a1dc813f759955ddbcf9b12ed052dfc8a07fdf4a
Author: Emilio Cota <ecg at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/test/lib/Dialect/Mesh/TestProcessMultiIndexOpLowering.cpp
Log Message:
-----------
[mlir][mesh] fix unused variable error
Commit: 2dde029df8f9e3b2ece6899dc73bea226f227d11
https://github.com/llvm/llvm-project/commit/2dde029df8f9e3b2ece6899dc73bea226f227d11
Author: Abhinav271828 <71174780+Abhinav271828 at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/Barvinok.h
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/include/mlir/Analysis/Presburger/Matrix.h
M mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/unittests/Analysis/Presburger/BarvinokTest.cpp
Log Message:
-----------
[MLIR][Presburger] Implement computation of generating function for unimodular cones (#77235)
We implement a function that computes the generating function
corresponding to a unimodular cone.
The generating function for a polytope is obtained by summing these
generating functions over all tangent cones.
Commit: 0a1b066bbaf7e3800f47697231d7e1e91744ecbf
https://github.com/llvm/llvm-project/commit/0a1b066bbaf7e3800f47697231d7e1e91744ecbf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
Log Message:
-----------
[RISCV] Support isel for Zacas for XLen and i32. (#77666)
This adds new isel patterns for Zacas that take priority over the
pseudoinstructions we use for the A extension.
Support for 2x XLen types will come in a separate patch since they need
to be done differently.
Commit: 183eae0643719aac75ef689ee295b697d5367245
https://github.com/llvm/llvm-project/commit/183eae0643719aac75ef689ee295b697d5367245
Author: Chris B <chris.bieneman at me.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
A clang/docs/HLSL/FunctionCalls.rst
M clang/docs/HLSL/HLSLDocs.rst
Log Message:
-----------
[HLSL][Docs] Add documentation for HLSL functions (#75397)
This adds a new document that covers the HLSL approach to function calls
and parameter semantics. At time of writing this document is a proposal
for the implementation.
Commit: 1c342571b80d0f76202ec590a19706fe9e05c86d
https://github.com/llvm/llvm-project/commit/1c342571b80d0f76202ec590a19706fe9e05c86d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Use value_or to simplify code. NFC (#77030)
Commit: 3378514a4da2a09abf644273c7170ffebbd25b43
https://github.com/llvm/llvm-project/commit/3378514a4da2a09abf644273c7170ffebbd25b43
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
Log Message:
-----------
[RISCV] Use any_extend for type legalizing atomic_compare_swap with Zacas. (#77669)
With Zacas we will use amocas.w which doesn't require the input to be
sign extended.
Commit: fb7fe49960ae053c92985f3376d85a15bbd10d1a
https://github.com/llvm/llvm-project/commit/fb7fe49960ae053c92985f3376d85a15bbd10d1a
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Support/CommandLine.cpp
Log Message:
-----------
[CommandLine][NFCI] Do not add 'All' to 'RegisteredSubCommands' (#77041)
After #75679, it is no longer necessary to add the `All` pseudo
subcommand to the list of registered subcommands. The change causes the
list to contain only real subcommands, i.e. an unnamed top-level
subcommand and named ones. This simplifies the code a bit by removing
some checks for this special case.
Commit: a08506e374f5938e30a9c13b61a697e8c0e12aa3
https://github.com/llvm/llvm-project/commit/a08506e374f5938e30a9c13b61a697e8c0e12aa3
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/test/MinGW/driver.test
Log Message:
-----------
[LLD] [MinGW] Add support for more ThinLTO specific options (#77387)
This was missed when mass-adding support for other LTO options in
0b51e648307cf6c21c463d3e73e51c03aaa8c9e2.
Group the existing thinlto_cache_dir with these other options in a new
group, next to the other LTO options.
This skips adding the options --thinlto-emit-index-files and
--thinlto-single-module=, which don't seem to have corresponding options
on the lld-link level currently.
This should fix https://github.com/mstorsjo/llvm-mingw/issues/386.
Commit: aec73eade7af0e22c944714bec31570181bc1ad4
https://github.com/llvm/llvm-project/commit/aec73eade7af0e22c944714bec31570181bc1ad4
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
Log Message:
-----------
[mlir][sparse] allow unknown ops in one-shot bufferization in mini-pipeline (#77688)
Rationale:
Since this mini-pipeline may be used in alternative pipelines (viz.
different from the default "sparsifier" pipeline) where unknown ops are
handled by alternative bufferization methods that are downstream of this
mini-pipeline, we allow unknown ops by default (failure to bufferize is
eventually apparent by failing to convert to LLVM IR).
This is part of enabling e2e testing for TORCH-MLIR tests using a
sparsifier backend
Commit: e51fe958a226888f57ad3646034e6060b830f01a
https://github.com/llvm/llvm-project/commit/e51fe958a226888f57ad3646034e6060b830f01a
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr17xx.cpp
M clang/test/CXX/drs/dr1xx.cpp
M clang/test/CXX/drs/dr23xx.cpp
M clang/test/CXX/drs/dr4xx.cpp
Log Message:
-----------
[clang][NFC] Improve comments in C++ DR test suite (#77670)
Previously, we've been mentioning tests that were placed in their own files in corresponding `drNNxx.cpp` file. This patch makes sure we do this consistently, and improves upon existing practice by specifying the name of the file test is placed in.
Commit: 8ca07e57c3be0dc41dbb95f6b21e541fecd74e8a
https://github.com/llvm/llvm-project/commit/8ca07e57c3be0dc41dbb95f6b21e541fecd74e8a
Author: Andrew Gozillon <Andrew.Gozillon at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
R openmp/libomptarget/test/offloading/fortran/failing/target_map_common_block1.f90
M openmp/libomptarget/test/offloading/fortran/target_map_common_block.f90
A openmp/libomptarget/test/offloading/fortran/target_map_common_block1.f90
Log Message:
-----------
[Flang][OpenMP][Offloading][Test] Adjust slightly incorrect tests now cmake configuration works
These tests were slightly broken, in one case a failing test that now works. In the other case
some accidentally left over code during a name change that broke compilation due to missing
symbols.
Commit: 98e3d98bf34ff9202e8b82d4967c02e4fd7d6532
https://github.com/llvm/llvm-project/commit/98e3d98bf34ff9202e8b82d4967c02e4fd7d6532
Author: Christopher Di Bella <cjdb at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/test/std/ranges/range.adaptors/range.join/range.join.sentinel/ctor.other.pass.cpp
Log Message:
-----------
[libc++] Rename local variable to avoid shadowing error (#77672)
Due to the inclusion of a header, a global type is was being shadowed,
which upset GCC.
Commit: 21a784f24e3f6c09558de6a3dfb32e2069955405
https://github.com/llvm/llvm-project/commit/21a784f24e3f6c09558de6a3dfb32e2069955405
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/Target/TargetPfmCounters.td
M llvm/lib/Target/X86/X86PfmCounters.td
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/utils/TableGen/ExegesisEmitter.cpp
Log Message:
-----------
[llvm-exegesis] Add tablegen support for validation counters (#76652)
This patch adds support in the llvm-exegesis tablegen emitter for
validation counters. Full support for validation counters in
llvm-exegesis will be added in a future patch.
Commit: 04a906ec980e7bf49ffda0808766f51d08e8ae76
https://github.com/llvm/llvm-project/commit/04a906ec980e7bf49ffda0808766f51d08e8ae76
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
A lld/test/ELF/aarch64-reloc-gotpcrel32.s
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
A llvm/test/MC/AArch64/elf-reloc-gotpcrel32.s
Log Message:
-----------
[llvm][lld] Support R_AARCH64_GOTPCREL32 (#72584)
This is the follopw implementation to
https://github.com/ARM-software/abi-aa/pull/223 that supports this
relocation in llvm and lld.
Commit: f7678c81fe96dc8a350d947b77ce5311a9f99612
https://github.com/llvm/llvm-project/commit/f7678c81fe96dc8a350d947b77ce5311a9f99612
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
A lld/test/ELF/riscv64-reloc-got32-pcrel.s
M llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV.def
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
A llvm/test/MC/RISCV/elf-reloc-got32-pcrel.s
Log Message:
-----------
[llvm][lld] Support R_RISCV_GOT32_PCREL (#72587)
This is the followup implementation to
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/402 that
supports this relocation in llvm and lld.
Commit: f65265ab779f5c6c571ff702aae5670722765ae0
https://github.com/llvm/llvm-project/commit/f65265ab779f5c6c571ff702aae5670722765ae0
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/Target/TargetPfmCounters.td
M llvm/lib/Target/X86/X86PfmCounters.td
Log Message:
-----------
[llvm-exegesis] Fix validation counters
While landing #76652, I realized I messed up a rebase/merge at some
point and some of the changes I intended to land with #76652 ended up in
a different PR (#76653) instead. This patch fixes the validation
counters to how they were intended to land in #76652.
Commit: fefdef808c230c79dca2eb504490ad0f17a765a5
https://github.com/llvm/llvm-project/commit/fefdef808c230c79dca2eb504490ad0f17a765a5
Author: Bill Wendling <5993918+bwendling at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/TypoCorrection.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
A clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/bounds-checking.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Sema/attr-counted-by.c
Log Message:
-----------
[Clang] Implement the 'counted_by' attribute (#76348)
The 'counted_by' attribute is used on flexible array members. The
argument for the attribute is the name of the field member holding the
count of elements in the flexible array. This information is used to
improve the results of the array bound sanitizer and the
'__builtin_dynamic_object_size' builtin. The 'count' field member must
be within the same non-anonymous, enclosing struct as the flexible array
member. For example:
```
struct bar;
struct foo {
int count;
struct inner {
struct {
int count; /* The 'count' referenced by 'counted_by' */
};
struct {
/* ... */
struct bar *array[] __attribute__((counted_by(count)));
};
} baz;
};
```
This example specifies that the flexible array member 'array' has the
number of elements allocated for it in 'count':
```
struct bar;
struct foo {
size_t count;
/* ... */
struct bar *array[] __attribute__((counted_by(count)));
};
```
This establishes a relationship between 'array' and 'count';
specifically that 'p->array' must have *at least* 'p->count' number of
elements available. It's the user's responsibility to ensure that this
relationship is maintained throughout changes to the structure.
In the following, the allocated array erroneously has fewer elements
than what's specified by 'p->count'. This would result in an
out-of-bounds access not not being detected:
```
struct foo *p;
void foo_alloc(size_t count) {
p = malloc(MAX(sizeof(struct foo),
offsetof(struct foo, array[0]) + count *
sizeof(struct bar *)));
p->count = count + 42;
}
```
The next example updates 'p->count', breaking the relationship
requirement that 'p->array' must have at least 'p->count' number of
elements available:
```
void use_foo(int index, int val) {
p->count += 42;
p->array[index] = val; /* The sanitizer can't properly check this access */
}
```
In this example, an update to 'p->count' maintains the relationship
requirement:
```
void use_foo(int index, int val) {
if (p->count == 0)
return;
--p->count;
p->array[index] = val;
}
```
Commit: 8ae8ae967406bc8cb1c21396b879681b06bdbfe6
https://github.com/llvm/llvm-project/commit/8ae8ae967406bc8cb1c21396b879681b06bdbfe6
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Target.h
Log Message:
-----------
[llvm-exegesis] Update validation counters enum
To be consistent with f65265ab779f5c6c571ff702aae5670722765ae0.
Commit: 4a3fb9ce27dda17e97341f28005a28836c909cfc
https://github.com/llvm/llvm-project/commit/4a3fb9ce27dda17e97341f28005a28836c909cfc
Author: Bill Wendling <morbo at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[Clang] Update 'counted_by' documentation
Describe a limitation of the 'counted_by' attribute when used in unions.
Also fix a errant typo.
Commit: 422b84a77167c43259e18cc3eff88b4b2530defc
https://github.com/llvm/llvm-project/commit/422b84a77167c43259e18cc3eff88b4b2530defc
Author: Billy Zhu <billyzhu at modular.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
A mlir/include/mlir/Dialect/LLVMIR/Transforms/DIExpressionLegalization.h
A mlir/include/mlir/Dialect/LLVMIR/Transforms/DIExpressionRewriter.h
M mlir/lib/Dialect/LLVMIR/Transforms/CMakeLists.txt
A mlir/lib/Dialect/LLVMIR/Transforms/DIExpressionLegalization.cpp
A mlir/lib/Dialect/LLVMIR/Transforms/DIExpressionRewriter.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/LegalizeForExport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Dialect/LLVMIR/di-expression-legalization.mlir
Log Message:
-----------
[MLIR][LLVM] DI Expression Rewrite & Legalization (#77541)
Add a rewriter for DIExpressions & use it to run legalization patterns
before exporting to llvm (because LLVM dialect allows DI Expressions
that may not be valid in LLVM IR).
The rewriter driver works similarly to the existing mlir rewriter
drivers, except it operates on lists of DIExpressionElemAttr (i.e.
DIExpressionAttr). Each rewrite pattern transforms a range of
DIExpressionElemAttr into a new list of DIExpressionElemAttr.
In addition, this PR sets up a place to add legalization patterns that
are broadly applicable internally to the LLVM dialect, and they will
always be applied prior to export. This PR adds one pattern for merging
fragment operators.
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 66981f9c616812fdc452c3c03a901b85e2e2fd90
https://github.com/llvm/llvm-project/commit/66981f9c616812fdc452c3c03a901b85e2e2fd90
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M compiler-rt/include/profile/InstrProfData.inc
A llvm/docs/InstrProfileFormat.rst
M llvm/docs/UserGuides.rst
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/include/llvm/ProfileData/InstrProfData.inc
Log Message:
-----------
[docs][IRPGO]Document two binary formats for instrumentation-based profiles, with a focus on IRPGO. (#76105)
Commit: 03be448cce8b6a5f1aa36fc1b316508b08b3aa9f
https://github.com/llvm/llvm-project/commit/03be448cce8b6a5f1aa36fc1b316508b08b3aa9f
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/test/CodeGen/Generic/live-debug-label.ll
Log Message:
-----------
[RISCV][AMDGPU] Mark test/CodeGen/Generic/live-debug-label.ll XFAIL for RISCV and AMDGPU (#77631)
Both RISC-V and AMDGPU(GCN) deploy two VirtRegRewriter in their codegen
pipeline. This test prematurely stops at the first one, which doesn't
cleanup the virtual register map and cause an assertion failure. Ideally
we can solve this by teaching `-stop-after` how to stop at the last
instance of a Pass, but we're just marking XFAIL for these two targets
for now.
Commit: 753dc0a01ccc3cbe87d5ee0fe0ec7f8db340966f
https://github.com/llvm/llvm-project/commit/753dc0a01ccc3cbe87d5ee0fe0ec7f8db340966f
Author: Yinying Li <107574043+yinying-lisa-li at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/ExecutionEngine/Float16bits.h
M mlir/include/mlir/ExecutionEngine/RunnerUtils.h
M mlir/lib/ExecutionEngine/Float16bits.cpp
M mlir/lib/ExecutionEngine/RunnerUtils.cpp
A mlir/test/Integration/Dialect/Memref/verify-memref.mlir
Log Message:
-----------
[mlir][verifyMemref] Fix bug and support more types for verifyMemref (#77682)
1. Fix a bug in verifyMemref to pass in `data` instead of `baseptr`,
which didn't verify data correctly.
2. Add `==` for f16 and bf16.
3. Add a comprehensive test of verifyMemref for all supported types.
Commit: 66d022f326779c8abe80b272751fab1a10992222
https://github.com/llvm/llvm-project/commit/66d022f326779c8abe80b272751fab1a10992222
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
Log Message:
-----------
[clang][analyzer] Fix incorrect range of 'ftell' in the StdLibraryFunctionsChecker (#77576)
According to https://pubs.opengroup.org/onlinepubs/9699919799/, the
return value of `ftell` is not restricted to `> 0`, and may return `0`
in real world.
Commit: 31fd6d116daba3b7f8e17a2c9d671e265f49be3c
https://github.com/llvm/llvm-project/commit/31fd6d116daba3b7f8e17a2c9d671e265f49be3c
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
Log Message:
-----------
[mlir][mesh] fix ProcessMultiIndexOp building (#77676)
Insert default empty mesh axes array instead of null attribute without MLIR context, since the attribute is default-valued not just optional.
Commit: d85a13b867b17fa93965bc7e439a58c954045217
https://github.com/llvm/llvm-project/commit/d85a13b867b17fa93965bc7e439a58c954045217
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Support/CommandLine.cpp
Log Message:
-----------
Revert "[CommandLine][NFCI] Do not add 'All' to 'RegisteredSubCommands' (#77041)"
This reverts commit fb7fe49960ae053c92985f3376d85a15bbd10d1a.
The commit introduced a bug where an option with the `All' subcommand
would not be added to a category initialized after that option.
Commit: 2dce77201c0c6b541a53aa7a09ec06e7561e8f74
https://github.com/llvm/llvm-project/commit/2dce77201c0c6b541a53aa7a09ec06e7561e8f74
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/TypoCorrection.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
R clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/bounds-checking.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
R clang/test/Sema/attr-counted-by.c
Log Message:
-----------
Revert "[Clang] Implement the 'counted_by' attribute (#76348)"
This reverts commit fefdef808c230c79dca2eb504490ad0f17a765a5.
Breaks check-clang, see
https://github.com/llvm/llvm-project/pull/76348#issuecomment-1886029515
Also revert follow-on "[Clang] Update 'counted_by' documentation"
This reverts commit 4a3fb9ce27dda17e97341f28005a28836c909cfc.
Commit: 6d19e89d240dfd91af748ef5126d33077f3411c1
https://github.com/llvm/llvm-project/commit/6d19e89d240dfd91af748ef5126d33077f3411c1
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[Pass] Remove trailing whitespace in `PassRegistry.def` NFC (#77710)
Commit: e0c734561d5b268f8d24e68c535df8aa41369690
https://github.com/llvm/llvm-project/commit/e0c734561d5b268f8d24e68c535df8aa41369690
Author: S. B. Tam <cpplearner at outlook.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M libcxx/test/libcxx/memory/trivial_abi/unique_ptr_destruction_order.pass.cpp
M libcxx/test/std/language.support/support.exception/propagation/make_exception_ptr.pass.cpp
M libcxx/test/std/language.support/support.exception/propagation/rethrow_exception.pass.cpp
M libcxx/test/support/msvc_stdlib_force_include.h
M libcxx/test/support/test_macros.h
Log Message:
-----------
[libc++][test] Replace uses of `_LIBCPP_ABI_MICROSOFT` in tests (#77233)
Commit: 5a66c8ddc393dabbeba6c488bb802ebd9d43dd7f
https://github.com/llvm/llvm-project/commit/5a66c8ddc393dabbeba6c488bb802ebd9d43dd7f
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
Log Message:
-----------
[Clang][doc] Add blank line before lists (#77573)
The doc is not correctly rendered with missing blank lines.
Commit: 4eb68f53db608465cf557dbdfe85d9b4eb608fff
https://github.com/llvm/llvm-project/commit/4eb68f53db608465cf557dbdfe85d9b4eb608fff
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
Log Message:
-----------
[Instrumentation] Use a range-based for loop (NFC)
Commit: 1bc4cb51afb9abf6049ccfa44069cb1f0612e678
https://github.com/llvm/llvm-project/commit/1bc4cb51afb9abf6049ccfa44069cb1f0612e678
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/test/MC/X86/index-operations.s
Log Message:
-----------
[X86][MC] Fix wrong action when encoding enqcmd/enqcmds (#77571)
Mentioned in https://github.com/llvm/llvm-project/pull/77293,
enqcmd/enqcmds are special for its mem operand, like movdir64b(see
https://github.com/llvm/llvm-project/commit/4dd5e9c60efa9), 0x67 prefix
can not only modify its address size, so it's mem base and index reg
should be the same type as source reg.
Commit: cc77e33271371e6ea29569ba06db9cfd1aac022a
https://github.com/llvm/llvm-project/commit/cc77e33271371e6ea29569ba06db9cfd1aac022a
Author: James Grant <42079499+jamesg-nz at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/Format/FormatToken.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Don't apply severe penalty if no possible column formats (#76675)
If there are possible column formats, but they weren't selected because
they don't fit within remaining characters for the current path then
applying severe penalty to induce column layout by selection of a
different path seems fair.
But if due to style configuration or what the input code is, there are
no possible column formats, different paths aren't going to have column
layouts. Seems wrong to apply the severe penalty to induce column
layouts if there are none available.
It just causes selection of sub-optimal paths, e.g. get bad formatting
when brace initializers are used inside lambda bodies.
Fixes #56350
Commit: b2c0c6f3f2741415d5257e16ca8d4083abe1b487
https://github.com/llvm/llvm-project/commit/b2c0c6f3f2741415d5257e16ca8d4083abe1b487
Author: Gedare Bloom <gedare at rtems.org>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format]: Split alignment of declarations around assignment (#69340)
Function pointers are detected as a type of declaration using
FunctionTypeLParen. They are aligned based on rules for
AlignConsecutiveDeclarations. When a function pointer is on the
right-hand side of an assignment, the alignment of the function pointer
can result in excessive whitespace padding due to the ordering of
alignment, as the alignment processes a line from left-to-right and
first aligns the declarations before and after the assignment operator,
and then aligns the assignment operator. Injection of whitespace by
alignment of declarations after the equal sign followed by alignment of
the equal sign results in the excessive whitespace.
Fixes #68079.
Commit: 093e6bdd4bec8ce9b3baf1e8e0a07aa6549dd5d4
https://github.com/llvm/llvm-project/commit/093e6bdd4bec8ce9b3baf1e8e0a07aa6549dd5d4
Author: XDeme <66138117+XDeme at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/WhitespaceManager.h
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix crash involving array designators (#77045)
Fixes llvm/llvm-project#76716
Fixes parsing of `[0]{}`. Before this patch it was begin parsed as a
lambda, now it is correctly parsed as a designator initializer.
Commit: 9ed30012fb4f43de42ef2f265fe384d9d0b0edf2
https://github.com/llvm/llvm-project/commit/9ed30012fb4f43de42ef2f265fe384d9d0b0edf2
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/lib/Conversion/ArithCommon/AttrToLLVMConverter.cpp
Log Message:
-----------
[mlir][arith][nfc] Fix typos (#77700)
Cleanup after https://github.com/llvm/llvm-project/pull/77211
Commit: 1fe7bdb87b0d6331b243b3834565ad9423d8f4b0
https://github.com/llvm/llvm-project/commit/1fe7bdb87b0d6331b243b3834565ad9423d8f4b0
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrCompiler.td
A llvm/test/CodeGen/X86/apx/adc.ll
A llvm/test/CodeGen/X86/apx/add.ll
A llvm/test/CodeGen/X86/apx/dec.ll
A llvm/test/CodeGen/X86/apx/imul.ll
A llvm/test/CodeGen/X86/apx/inc.ll
A llvm/test/CodeGen/X86/apx/neg.ll
A llvm/test/CodeGen/X86/apx/not.ll
A llvm/test/CodeGen/X86/apx/or.ll
A llvm/test/CodeGen/X86/apx/sbb.ll
A llvm/test/CodeGen/X86/apx/sub.ll
A llvm/test/CodeGen/X86/apx/xor.ll
Log Message:
-----------
[X86][CodeGen] Support lowering for NDD ADD/SUB/ADC/SBB/OR/XOR/NEG/NOT/INC/DEC/IMUL (#77564)
We supported encoding/decoding for these instructions in
https://github.com/llvm/llvm-project/pull/76319
https://github.com/llvm/llvm-project/pull/76721
https://github.com/llvm/llvm-project/pull/76919
Commit: 1e05236dbdf6f1b27b5e68c3948fec7deea4e3dc
https://github.com/llvm/llvm-project/commit/1e05236dbdf6f1b27b5e68c3948fec7deea4e3dc
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
Log Message:
-----------
[Target] Use isNullConstant (NFC)
Commit: 12bba0d4f8c2df655958decb8eb788327543b3fe
https://github.com/llvm/llvm-project/commit/12bba0d4f8c2df655958decb8eb788327543b3fe
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang-tools-extra/clang-query/QueryParser.cpp
Log Message:
-----------
[clang-query] Use StringRef::ltrim (NFC)
Commit: be76f1646f966cbebb4c52ca0faa41921a284262
https://github.com/llvm/llvm-project/commit/be76f1646f966cbebb4c52ca0faa41921a284262
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[Target] Use getConstantOperandAPInt (NFC)
Commit: e8790027b169fa10dcdb04f076cf4efafeda704c
https://github.com/llvm/llvm-project/commit/e8790027b169fa10dcdb04f076cf4efafeda704c
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
Log Message:
-----------
[RISCV] Allow vsetvlis with same register AVL in doLocalPostpass (#76801)
Commit: 164f85db876e61cf4a3c34493ed11e8f5820f968
https://github.com/llvm/llvm-project/commit/164f85db876e61cf4a3c34493ed11e8f5820f968
Author: Bill Wendling <5993918+bwendling at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/TypoCorrection.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
A clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/bounds-checking.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
A clang/test/Sema/attr-counted-by.c
Log Message:
-----------
[Clang] Implement the 'counted_by' attribute (#76348)
The 'counted_by' attribute is used on flexible array members. The
argument for the attribute is the name of the field member holding the
count of elements in the flexible array. This information is used to
improve the results of the array bound sanitizer and the
'__builtin_dynamic_object_size' builtin. The 'count' field member must
be within the same non-anonymous, enclosing struct as the flexible array
member. For example:
```
struct bar;
struct foo {
int count;
struct inner {
struct {
int count; /* The 'count' referenced by 'counted_by' */
};
struct {
/* ... */
struct bar *array[] __attribute__((counted_by(count)));
};
} baz;
};
```
This example specifies that the flexible array member 'array' has the
number of elements allocated for it in 'count':
```
struct bar;
struct foo {
size_t count;
/* ... */
struct bar *array[] __attribute__((counted_by(count)));
};
```
This establishes a relationship between 'array' and 'count';
specifically that 'p->array' must have *at least* 'p->count' number of
elements available. It's the user's responsibility to ensure that this
relationship is maintained throughout changes to the structure.
In the following, the allocated array erroneously has fewer elements
than what's specified by 'p->count'. This would result in an
out-of-bounds access not not being detected:
```
struct foo *p;
void foo_alloc(size_t count) {
p = malloc(MAX(sizeof(struct foo),
offsetof(struct foo, array[0]) + count *
sizeof(struct bar *)));
p->count = count + 42;
}
```
The next example updates 'p->count', breaking the relationship
requirement that 'p->array' must have at least 'p->count' number of
elements available:
```
void use_foo(int index, int val) {
p->count += 42;
p->array[index] = val; /* The sanitizer can't properly check this access */
}
```
In this example, an update to 'p->count' maintains the relationship
requirement:
```
void use_foo(int index, int val) {
if (p->count == 0)
return;
--p->count;
p->array[index] = val;
}
```
Commit: 3d795bdd4d9067e96b2ff9e6278a5b8847eebe2b
https://github.com/llvm/llvm-project/commit/3d795bdd4d9067e96b2ff9e6278a5b8847eebe2b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/InstCombine/bitreverse.ll
Log Message:
-----------
[InstCombine] Handle a bitreverse idiom which ends with a bswap (#77677)
This patch handles the following `bitreverse` idiom, which is found in
https://github.com/abseil/abseil-cpp/blob/8bd6445acc4bd0d123da2a44448b7218dfc70939/absl/crc/internal/crc.cc#L75-L80:
```
uint32_t ReverseBits(uint32_t bits) {
bits = (bits & 0xaaaaaaaau) >> 1 | (bits & 0x55555555u) << 1;
bits = (bits & 0xccccccccu) >> 2 | (bits & 0x33333333u) << 2;
bits = (bits & 0xf0f0f0f0u) >> 4 | (bits & 0x0f0f0f0fu) << 4;
return absl::gbswap_32(bits);
}
```
Alive2: https://alive2.llvm.org/ce/z/ZYXNmj
Commit: 211abe38d83aced510726601c7cf6b464f6ee5b1
https://github.com/llvm/llvm-project/commit/211abe38d83aced510726601c7cf6b464f6ee5b1
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/TableGen/dag-isel-complexpattern.td
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
[SelectionDAG] Add space-optimized forms of OPC_CheckComplexPat (#73310)
We record the usage of each `ComplexPat` and sort the `ComplexPat`s
by usage.
For the top 8 `ComplexPat`s, we will emit a `OPC_CheckComplexPatN`
to save one byte.
Overall this reduces the llc binary size with all in-tree targets by
about 89K.
Commit: 5c8d1238382ce3ef6004d9cbe3fe67b8342d868c
https://github.com/llvm/llvm-project/commit/5c8d1238382ce3ef6004d9cbe3fe67b8342d868c
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
[SelectionDAG] Add space-optimized forms of OPC_CheckPatternPredicate (#73319)
We record the usage of each `PatternPredicate` and sort them by
usage.
For the top 8 `PatternPredicate`s, we will emit a
`OPC_CheckPatternPredicateN` to save one byte.
The old `OPC_CheckPatternPredicate2` is renamed to
`OPC_CheckPatternPredicateTwoByte`.
Overall this reduces the llc binary size with all in-tree targets by
about 93K.
Commit: 1a5792735aa0bb10e5624a438bcf7fd5091ee265
https://github.com/llvm/llvm-project/commit/1a5792735aa0bb10e5624a438bcf7fd5091ee265
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/TableGen/address-space-patfrags.td
M llvm/test/TableGen/predicate-patfags.td
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
[SelectionDAG] Add space-optimized forms of OPC_CheckPredicate (#73488)
We record the usage of each `Predicate` and sort them by usage.
For the top 8 `Predicate`s, we will emit a `PC_CheckPredicateN` to
save one byte.
Overall this reduces the llc binary size with all in-tree targets by
about 61K.
Commit: 3643d11988d6b14171b4320cbdfb15aba9764d0b
https://github.com/llvm/llvm-project/commit/3643d11988d6b14171b4320cbdfb15aba9764d0b
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/test/HLFIR/order_assignments/user-defined-assignment.fir
Log Message:
-----------
[flang][hlfir] Support box in user defined assignments (#77578)
When dealing with overlaps in user defined assignments, some entities
with descriptors (fir.box) may be saved without descriptors. The current
code was replacing the original box entity with the "raw" copy with a
simple cast instead of creating a box for the copy. This patch ensures a
fir.embox is emitted instead.
Commit: e3993e044ec5925e59c131f798f823a9f16f0433
https://github.com/llvm/llvm-project/commit/e3993e044ec5925e59c131f798f823a9f16f0433
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/functions.cpp
Log Message:
-----------
[clang][Interp] Implement __builtin_addressof (#77303)
We don't need to do anything here, since the input is already a Pointer.
The only complexity is that we pre-classify the parameters as PT_Ptr,
but they might end up being of a different pointer type, e.g. PT_FnPtr.
Commit: 79889fedc57707e99740abc1f48e6c5601d5a3f3
https://github.com/llvm/llvm-project/commit/79889fedc57707e99740abc1f48e6c5601d5a3f3
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M lld/ELF/Arch/RISCV.cpp
M llvm/include/llvm/Support/RISCVISAInfo.h
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Deduplicate version struct in RISCVISAInfo. NFC (#77645)
We have two structs for representing the version of an extension in
RISCVISAInfo, RISCVExtensionInfo and RISCVExtensionVersion, both
with the exact same fields. This patch deduplicates them.
Commit: 16945bc16dbb4c4acac854001b73e1454f3b601c
https://github.com/llvm/llvm-project/commit/16945bc16dbb4c4acac854001b73e1454f3b601c
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs.mir
Log Message:
-----------
[AMDGPU] Don't send DEALLOC_VGPRs after calls (#77439)
Calls do not have to wait for VsCnt, so after they return there might
still be scratch stores in progress. It's important that we don't send
the DEALLOC_VGPR message in that case, since that might release the
VGPRs and scratch allocation before those stores are complete.
Commit: c9c8f0c2fcf3b25ec310a75216f1d5b582ec343f
https://github.com/llvm/llvm-project/commit/c9c8f0c2fcf3b25ec310a75216f1d5b582ec343f
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx12_err.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
Log Message:
-----------
[AMDGPU] Update tests for GFX12 errors and unsupported instructions (#77624)
Commit: 66eedd1dd370d22ddf994540c20848618d64d1a6
https://github.com/llvm/llvm-project/commit/66eedd1dd370d22ddf994540c20848618d64d1a6
Author: hanbeom <kese111 at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select.ll
Log Message:
-----------
[InstCombine] Fix worklist management in select fold (#77738)
`InstCombine` uses `Worklist` to manage change history. `setOperand`,
which was previously used to change the `Select` Instruction, does not,
so it is `run` twice, which causes an `LLVM ERROR`.
This problem is resolved by changing `setOperand` to `replaceOperand` as
the change history will be registered in the Worklist.
Fixes #77553.
Commit: 158d72d728261c1e54dc77931372b2322c52849f
https://github.com/llvm/llvm-project/commit/158d72d728261c1e54dc77931372b2322c52849f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/test/CodeGen/2006-05-19-SingleEltReturn.c
M clang/test/CodeGen/64bit-swiftcall.c
M clang/test/CodeGen/CSKY/csky-abi.c
M clang/test/CodeGen/CSKY/csky-hard-abi.c
M clang/test/CodeGen/CSKY/csky-soft-abi.c
M clang/test/CodeGen/PowerPC/aix-alignment.c
M clang/test/CodeGen/PowerPC/powerpc-c99complex.c
M clang/test/CodeGen/PowerPC/ppc-aggregate-abi.cpp
M clang/test/CodeGen/PowerPC/ppc32-and-aix-struct-return.c
M clang/test/CodeGen/PowerPC/ppc64-align-struct.c
M clang/test/CodeGen/PowerPC/ppc64-elf-abi.c
M clang/test/CodeGen/PowerPC/ppc64-soft-float.c
M clang/test/CodeGen/PowerPC/ppc64-vector.c
M clang/test/CodeGen/PowerPC/ppc64le-aggregates.c
M clang/test/CodeGen/PowerPC/ppc64le-f128Aggregates.c
M clang/test/CodeGen/RISCV/bfloat-abi.c
M clang/test/CodeGen/RISCV/riscv-abi.cpp
M clang/test/CodeGen/RISCV/riscv32-abi.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGen/SystemZ/gnu-atomic-builtins-i128-8Al.c
M clang/test/CodeGen/SystemZ/systemz-abi-vector.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/systemz-abi.cpp
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/WebAssembly/wasm-arguments.c
M clang/test/CodeGen/WebAssembly/wasm-varargs.c
M clang/test/CodeGen/X86/x86_32-arguments-darwin.c
M clang/test/CodeGen/X86/x86_32-arguments-iamcu.c
M clang/test/CodeGen/X86/x86_64-arguments-nacl.c
M clang/test/CodeGen/X86/x86_64-arguments-win32.c
M clang/test/CodeGen/X86/x86_64-arguments.c
M clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/aarch64-varargs.c
M clang/test/CodeGen/aggregate-assign-call.c
M clang/test/CodeGen/aligned-sret.c
M clang/test/CodeGen/arc/arguments.c
M clang/test/CodeGen/arm-aapcs-vfp.c
M clang/test/CodeGen/arm-arguments.c
M clang/test/CodeGen/arm-homogenous.c
M clang/test/CodeGen/arm-neon-vld.c
M clang/test/CodeGen/arm-swiftcall.c
M clang/test/CodeGen/arm-varargs.c
M clang/test/CodeGen/arm-vector-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
M clang/test/CodeGen/arm64-arguments.c
M clang/test/CodeGen/arm64-microsoft-arguments.cpp
M clang/test/CodeGen/arm64_32.c
M clang/test/CodeGen/armv7k-abi.c
M clang/test/CodeGen/attr-noundef.cpp
M clang/test/CodeGen/blocks.c
M clang/test/CodeGen/c11atomics-ios.c
M clang/test/CodeGen/c11atomics.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/lanai-arguments.c
M clang/test/CodeGen/mcu-struct-return.c
M clang/test/CodeGen/mingw-long-double.c
M clang/test/CodeGen/mips-vector-return.c
M clang/test/CodeGen/mips-zero-sized-struct.c
M clang/test/CodeGen/mips64-nontrivial-return.cpp
M clang/test/CodeGen/mips64-padding-arg.c
M clang/test/CodeGen/ms_abi.c
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGen/regcall2.c
M clang/test/CodeGen/regparm-struct.c
M clang/test/CodeGen/renderscript.c
M clang/test/CodeGen/sparcv9-abi.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/vectorcall.c
M clang/test/CodeGen/windows-struct-abi.c
M clang/test/CodeGen/windows-swiftcall.c
M clang/test/CodeGenCXX/aix-alignment.cpp
M clang/test/CodeGenCXX/arm-cc.cpp
M clang/test/CodeGenCXX/arm-swiftcall.cpp
M clang/test/CodeGenCXX/attr-musttail.cpp
M clang/test/CodeGenCXX/call-with-static-chain.cpp
M clang/test/CodeGenCXX/conditional-gnu-ext.cpp
M clang/test/CodeGenCXX/cxx1z-copy-omission.cpp
M clang/test/CodeGenCXX/cxx1z-lambda-star-this.cpp
M clang/test/CodeGenCXX/exceptions.cpp
M clang/test/CodeGenCXX/homogeneous-aggregates.cpp
M clang/test/CodeGenCXX/lambda-expressions.cpp
M clang/test/CodeGenCXX/matrix-casts.cpp
M clang/test/CodeGenCXX/matrix-type-builtins.cpp
M clang/test/CodeGenCXX/matrix-type.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp
M clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp
M clang/test/CodeGenCXX/microsoft-abi-unknown-arch.cpp
M clang/test/CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp
M clang/test/CodeGenCXX/ms-thread_local.cpp
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/CodeGenCXX/pass-by-value-noalias.cpp
M clang/test/CodeGenCXX/regcall.cpp
M clang/test/CodeGenCXX/regcall4.cpp
M clang/test/CodeGenCXX/stack-reuse-miscompile.cpp
M clang/test/CodeGenCXX/stack-reuse.cpp
M clang/test/CodeGenCXX/temporaries.cpp
M clang/test/CodeGenCXX/thiscall-struct-return.cpp
M clang/test/CodeGenCXX/thunk-returning-memptr.cpp
M clang/test/CodeGenCXX/trivial_abi.cpp
M clang/test/CodeGenCXX/unknown-anytype.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
M clang/test/CodeGenCXX/x86_32-arguments.cpp
M clang/test/CodeGenCXX/x86_64-arguments.cpp
M clang/test/CodeGenCoroutines/coro-await.cpp
M clang/test/CodeGenCoroutines/coro-gro2.cpp
M clang/test/CodeGenHLSL/sret_output.hlsl
M clang/test/CodeGenObjC/arc.m
M clang/test/CodeGenObjC/direct-method.m
M clang/test/CodeGenObjC/nontrivial-c-struct-exception.m
M clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m
M clang/test/CodeGenObjC/stret-1.m
M clang/test/CodeGenObjC/stret_lookup.m
M clang/test/CodeGenObjC/weak-in-c-struct.m
M clang/test/CodeGenObjC/x86_64-struct-return-gc.m
M clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCLCXX/addrspace-of-this.clcpp
M clang/test/Modules/templates.mm
M clang/test/OpenMP/irbuilder_for_iterator.cpp
M clang/test/OpenMP/irbuilder_for_rangefor.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
Log Message:
-----------
[Clang] Set writable and dead_on_unwind attributes on sret arguments (#77116)
Set the writable and dead_on_unwind attributes for sret arguments. These
indicate that the argument points to writable memory (and it's legal to
introduce spurious writes to it on entry to the function) and that the
argument memory will not be used if the call unwinds.
This enables additional MemCpyOpt/DSE/LICM optimizations.
Commit: d7642b2200bdd7dc12f5fe1a840e1fd43b1bbd73
https://github.com/llvm/llvm-project/commit/d7642b2200bdd7dc12f5fe1a840e1fd43b1bbd73
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
Log Message:
-----------
[GlobalIsel] Combine select to integer minmax (second attempt). (#77520)
Instcombine canonicalizes selects to floating point and integer minmax.
This and the dag combiner canonicalize to floating point minmax. None of
them canonicalizes to integer minmax. On Neoverse V2 basic integer
arithmetic and integer minmax have the same costs.
Commit: 9ef2ac3ad1bd5aa9e589f63047e8abeac11ad1b2
https://github.com/llvm/llvm-project/commit/9ef2ac3ad1bd5aa9e589f63047e8abeac11ad1b2
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/Selection.cpp
M clang-tools-extra/clangd/unittests/SelectionTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/AddUsingTests.cpp
Log Message:
-----------
[clangd] Handle lambda scopes inside Node::getDeclContext() (#76329)
We used to consider the `DeclContext` for selection nodes inside a
lambda as the enclosing scope of the lambda expression, rather than the
lambda itself.
For example,
```cpp
void foo();
auto lambda = [] {
return ^foo();
};
```
where `N` is the selection node for the expression `foo()`,
`N.getDeclContext()` returns the `TranslationUnitDecl` previously, which
IMO is wrong, since the method `operator()` of the lambda is closer.
Incidentally, this fixes a glitch in add-using-declaration tweaks.
(Thanks @HighCommander4 for the test case.)
Commit: ee431288a6639b3bdc07b819f5d584bfb39793ed
https://github.com/llvm/llvm-project/commit/ee431288a6639b3bdc07b819f5d584bfb39793ed
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
A openmp/libomptarget/test/offloading/fortran/basic-target-parallel-region.f90
Log Message:
-----------
[NFC][OpenMP][Flang] Add smoke test for omp target parallel (#77579)
Added test which proves that end-to-end compilation of omp target
parallel costruct is successful for Flang compiler.
Commit: 33e5db6e045d3a82e29a7c6ebffe259dfafefb3d
https://github.com/llvm/llvm-project/commit/33e5db6e045d3a82e29a7c6ebffe259dfafefb3d
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/.clang-tidy
M clang/www/c_dr_status.html
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M clang/www/make_cxx_dr_status
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[clang] Improve colors in status tracking web pages.
Use a consistent, more pastel color for unknown status
in papers and issues tracking pages
Commit: 9d97247e26eaca29bf27c842e08bd983a34fab93
https://github.com/llvm/llvm-project/commit/9d97247e26eaca29bf27c842e08bd983a34fab93
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[clang] Fix color consistency in C paper tracking web page
Commit: e034f209f5f041888e649327f4b5aae5027dc14e
https://github.com/llvm/llvm-project/commit/e034f209f5f041888e649327f4b5aae5027dc14e
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
Log Message:
-----------
[AArch64LoadStoreOptimizer] Debug messages to track decision making. NFC (#77593)
With these debug message it's possible to see why some pairs get
rejected for combining.
Commit: 7bf13fe81218b17d079cc5d61ced6b09077a913c
https://github.com/llvm/llvm-project/commit/7bf13fe81218b17d079cc5d61ced6b09077a913c
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/pr14088.ll
Log Message:
-----------
[DAG] Fold (sext (sext_inreg x)) -> (sext (trunc x)) if the trunc is free (#77616)
Commit: 75d820dcdd868b8ab6c12ff62f90216ad377ce20
https://github.com/llvm/llvm-project/commit/75d820dcdd868b8ab6c12ff62f90216ad377ce20
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
M llvm/test/CodeGen/AArch64/machine-combiner-copy.ll
Log Message:
-----------
[AArch64] MI Scheduler: create more LDP/STP pairs (#77565)
Target hook `canPairLdStOpc` is missing quite a few opcodes for which
LDPs/STPs can created. I was hoping that it would not be necessary to
add these missing opcodes here and that the attached motivating test
case would be handled by the LoadStoreOptimiser (especially after
#71908), but it's not. The problem is that after register allocation
some things are a lot harder to do. Consider this for the motivating
example
```
[1] renamable $q1 = LDURQi renamable $x9, -16 :: (load (s128) from %ir.r51, align 8, !tbaa !0)
[2] renamable $q2 = LDURQi renamable $x0, -16 :: (load (s128) from %ir.r53, align 8, !tbaa !4)
[3] renamable $q1 = nnan ninf nsz arcp contract afn reassoc nofpexcept FMLSv2f64 killed renamable $q1(tied-def 0), killed renamable $q2, renamable $q0, implicit $fpcr
[4] STURQi killed renamable $q1, renamable $x9, -16 :: (store (s128) into %ir.r51, align 1, !tbaa !0)
[5] renamable $q1 = LDRQui renamable $x9, 0 :: (load (s128) from %ir.r.G0001_609.0, align 8, !tbaa !0)
```
We can't combine the the load in line [5] into the load on [1]:
regisister q1 is used in between. And we can can't combine [1] into
[5]: it is aliasing with the STR on line [4].
So, adding some missing opcodes here seems the best/easiest approach.
I will follow up to add some more missing cases here.
Commit: 77f2ccbaac5e05e14827247ea8f6cc0f9d214390
https://github.com/llvm/llvm-project/commit/77f2ccbaac5e05e14827247ea8f6cc0f9d214390
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/ADT/STLExtras.h
Log Message:
-----------
[STLExtras] Add out-of-line definition of friend operator== for C++20 (#72348)
The last attempt at https://github.com/llvm/llvm-project/pull/72220 was
reverted by
https://github.com/llvm/llvm-project/commit/94d6699bf5eeb5aa4c50d1d90f8bf69b79201ceb
because it breaks C++20 build in clang-17 and before.
This is a workaround of
https://github.com/llvm/llvm-project/issues/70210 and unblocks
https://github.com/llvm/llvm-project/pull/72213 which rectifies
rewriting template operator and thus introduces new breakages.
Moving the function definition out of the class makes clang find a
matching `operator!=` for the `operator==`. This makes clang not rewrite
the `operator==` with reversed args. Hence, the ambiguity is resolved.
The final plan, when https://github.com/llvm/llvm-project/issues/70210
is fixed, is to move these back to inline definition or even convert to
a member template operator. This should not be urgent and could even
wait for a major clang release including
https://github.com/llvm/llvm-project/pull/72213
Commit: 1ee93ac0991d5150ed5b21624e691da43b349612
https://github.com/llvm/llvm-project/commit/1ee93ac0991d5150ed5b21624e691da43b349612
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M libc/fuzzing/string/CMakeLists.txt
A libc/fuzzing/string/bcmp_fuzz.cpp
A libc/fuzzing/string/memcmp_fuzz.cpp
A utils/bazel/crash-f7dbdb2b330aad91f520099159e736e91bb9ddbf
Log Message:
-----------
[libc] Add memcmp / bcmp fuzzers (#77741)
Commit: 1de3f46938d70997cda5bcba17cbdbe166d4f269
https://github.com/llvm/llvm-project/commit/1de3f46938d70997cda5bcba17cbdbe166d4f269
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll
Log Message:
-----------
Revert "[SLP]Do not require external uses for roots and single use for other instructions in computeMinimumValueSizes. (#72679)"
This reverts commit 408dce82016463dcb5026b2ddfc62174970a88e9.
This triggered failed asserts with code like this:
char a[];
short *b;
int c, d, e, f;
void g() {
char *h;
for (;;) {
for (; f; ++f) {
h[f] = b[0] * a[e] + b[c] * a[1] >> 7;
++b;
}
h += d;
}
}
Compiled like this:
$ clang -target x86_64-linux-gnu -c repro.c -O2
clang: ../lib/IR/Instructions.cpp:3335: static llvm::CastInst* llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, const llvm::Twine&, llvm::Instruction*): Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed.
Commit: 4b0314d14f888cc1916556574ecaa35cc118ee00
https://github.com/llvm/llvm-project/commit/4b0314d14f888cc1916556574ecaa35cc118ee00
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang][ASTImporter] Improve import of friend class templates. (#74627)
A friend template that is in a dependent context is not linked into
declaration chains (for example with the definition of the befriended
template). This condition was not correctly handled by `ASTImporter`.
Commit: a02c0d9450052b7f1bbff02eefb5344247759da9
https://github.com/llvm/llvm-project/commit/a02c0d9450052b7f1bbff02eefb5344247759da9
Author: avl-llvm <55248412+avl-llvm at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
A llvm/include/llvm/DWARFLinker/Utils.h
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DWARFLinker/Parallel/AcceleratorRecordsSaver.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
R llvm/lib/DWARFLinker/Parallel/Utils.h
M llvm/lib/DWARFLinker/Utils.cpp
Log Message:
-----------
[DWARFLinker][NFC] Move common code into the base library: Utils.h (#77604)
This patch is extracted from #74725.
Put some usefull routines into the common Utils.h.
Commit: 21aacb0b4c8cf4deb6e3df3533bf365aa4fda125
https://github.com/llvm/llvm-project/commit/21aacb0b4c8cf4deb6e3df3533bf365aa4fda125
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/docs/PassManagement.md
M mlir/include/mlir/Transforms/GreedyPatternRewriteDriver.h
Log Message:
-----------
[mlir] Improve `GreedyPatternRewriteDriver` and pass documentation (#77614)
Clarify what kind of IR modifications are allowed. Also improve the
documentation of the greedy rewrite driver entry points.
Addressing comments in #76219.
Commit: dc974573a8a2364f24ce69c75ad80ab30753fe9a
https://github.com/llvm/llvm-project/commit/dc974573a8a2364f24ce69c75ad80ab30753fe9a
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
Log Message:
-----------
[mlir][ArmSME][test] Make use of arm_sme.streaming_vl (NFC) (#77322)
Commit: bd2a6efb305bfc2a4d9b368388da3d76d1b98b34
https://github.com/llvm/llvm-project/commit/bd2a6efb305bfc2a4d9b368388da3d76d1b98b34
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExprMember.cpp
M clang/test/SemaCXX/conversion-function.cpp
Log Message:
-----------
[clang]not lookup name containing a dependent type (#77587)
Fixes: #77583
bcd51aaaf8bde4b0ae7a4155d9ce3dec78fe2598 fixed part of template
instantiation dependent name issues but still missing some cases This
patch want to enhance the dependent name check
Commit: 9ca6e5bb86963eed00108d7da57033691bc21dbc
https://github.com/llvm/llvm-project/commit/9ca6e5bb86963eed00108d7da57033691bc21dbc
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M libc/src/string/memory_utils/op_x86.h
M libc/test/src/string/memcmp_test.cpp
Log Message:
-----------
[libc] Fix buggy AVX2 / AVX512 `memcmp` (#77081)
Fixes #77080.
Commit: 19081f4a504053f551eb88bfa8a09a075c826e64
https://github.com/llvm/llvm-project/commit/19081f4a504053f551eb88bfa8a09a075c826e64
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/stream-error.c
Log Message:
-----------
[clang][analyzer] Support 'tello' and 'fseeko' in the StreamChecker (#77580)
Commit: e4e0b6583861c111e485cf503940e7d5d8bc6d20
https://github.com/llvm/llvm-project/commit/e4e0b6583861c111e485cf503940e7d5d8bc6d20
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/apx/compress-evex.mir
Log Message:
-----------
[X86][test] Pre-commit test for #77731
Commit: bbbe8ecc17797893fae6fc3a16425b6f26670423
https://github.com/llvm/llvm-project/commit/bbbe8ecc17797893fae6fc3a16425b6f26670423
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
M llvm/lib/CodeGen/GlobalISel/Localizer.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/invoke-region.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
M llvm/test/CodeGen/AArch64/GlobalISel/localizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
Log Message:
-----------
[GlobalISel][Localizer] Allow localization of a small number of repeated phi uses. (#77566)
We previously had a heuristic that if a value V was used multiple times
in a single PHI, then to avoid potentially rematerializing into many predecessors
we bail out. The phi uses only counted as a single use in the shouldLocalize() hook
because it counted the PHI as a single instruction use, not factoring in it may
have many incoming edges.
It turns out this heuristic is slightly too pessimistic, and allowing a small number
of these uses to be localized can improve code size due to shortening live ranges,
especially if those ranges span a call.
This change results in some improvements in size on CTMark -Os:
```
Program size.__text
before after diff
kimwitu++/kc 451676.00 451860.00 0.0%
mafft/pairlocalalign 241460.00 241540.00 0.0%
tramp3d-v4/tramp3d-v4 389216.00 389208.00 -0.0%
7zip/7zip-benchmark 587528.00 587464.00 -0.0%
Bullet/bullet 457424.00 457348.00 -0.0%
consumer-typeset/consumer-typeset 405472.00 405376.00 -0.0%
SPASS/SPASS 410288.00 410120.00 -0.0%
lencod/lencod 426396.00 426108.00 -0.1%
ClamAV/clamscan 380108.00 379756.00 -0.1%
sqlite3/sqlite3 283664.00 283372.00 -0.1%
Geomean difference -0.0%
```
I experimented with different variations and thresholds. Using 3 instead
of 2 resulted in a further 0.1% improvement on ClamAV but also regressed
sqlite3 by the same %.
Commit: bc98c3103a79f13df7df84d90b5212288f8f542a
https://github.com/llvm/llvm-project/commit/bc98c3103a79f13df7df84d90b5212288f8f542a
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/TableGen/address-space-patfrags.td
M llvm/test/TableGen/predicate-patfags.td
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
Revert "[SelectionDAG] Add space-optimized forms of OPC_CheckPredicate (#73488)"
This reverts commit 1a5792735aa0bb10e5624a438bcf7fd5091ee265.
Test address-space-patfrags.td.test is failing
https://lab.llvm.org/buildbot/#/builders/104/builds/15012
Commit: cc53ec82ea6df6e7602510fa1bf5b8a991b3bc39
https://github.com/llvm/llvm-project/commit/cc53ec82ea6df6e7602510fa1bf5b8a991b3bc39
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/lib/Parser/CMakeLists.txt
Log Message:
-----------
[Flang][Parser] Add missing dependencies to CMakeLists.txt (#77483)
Add FrontendOpenMP as an additional component library dependency.
Commit: 959a430a8d5b7e77b3d88327f835d9f9b8a6842e
https://github.com/llvm/llvm-project/commit/959a430a8d5b7e77b3d88327f835d9f9b8a6842e
Author: Yi Wu <43659785+yi-wu-arm at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/include/flang/Runtime/extensions.h
M flang/runtime/extensions.cpp
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang] FDATE extension implementation: get date and time in ctime format (#71222)
reference to gfortran fdate
https://gcc.gnu.org/onlinedocs/gfortran/FDATE.html
usage:
```fortran
CHARACTER(32) :: time
CALL fdate(time)
WRITE(*,*) time
```
fdate is used in the ECP proxy application
https://proxyapps.exascaleproject.org/app/minismac2d/
https://github.com/Mantevo/miniSMAC/blob/f90446714226eeef650b78bce06ca4967792e74d/ref/smac2d.f#L1570
`fdate` now produce the same result on flang, compare to gfortran, where
If the length is too short to fit completely, blank return.
```fortran
character(20) :: string
call fdate(string)
write(*, *) string, "X"
```
```bash
$ ../build-release/bin/flang-new test.f90
$ ./a.out
X
```
If length if larger than it requires(24), fill the rest of buffer space.
```fortran
character(30) :: string
call fdate(string)
write(*, *) string, "X"
```
```bash
$ ../build-release/bin/flang-new test.f90
$ ./a.out
Wed Nov 15 16:59:13 2023 X
```
The length value is hardcoded, because:
```c++
// Day Mon dd hh:mm:ss yyyy\n\0 is 26 characters, e.g.
// Tue May 26 21:51:03 2015\n\0
```
---------
Co-authored-by: Yi Wu <yiwu02 at wdev-yiwu02.arm.com>
Commit: 566124222e308bd0321c537c136705e1ebae7ba4
https://github.com/llvm/llvm-project/commit/566124222e308bd0321c537c136705e1ebae7ba4
Author: Dmitriy Smirnov <dmitriy.smirnov at arm.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[TOSA] FFT2D operator (#77005)
This PR adds lowering for TOSA Fft2d operator down to Linalg.
Commit: 5e406615fea185656786e8a5e72b6f12fd7706d5
https://github.com/llvm/llvm-project/commit/5e406615fea185656786e8a5e72b6f12fd7706d5
Author: goussepi <pierre.gousseau at sony.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_flags.inc
M compiler-rt/lib/sanitizer_common/sanitizer_thread_arg_retval.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_arg_retval.h
M compiler-rt/test/sanitizer_common/TestCases/Linux/pthread_join.cpp
A compiler-rt/test/sanitizer_common/TestCases/Linux/pthread_join_invalid.cpp
Log Message:
-----------
[sanitizer] Fix asserts in asan and tsan in pthread interceptors. (#75394)
Calling one of pthread join/detach interceptor on an already
joined/detached thread causes asserts such as:
AddressSanitizer: CHECK failed: sanitizer_thread_arg_retval.cpp:56
"((t)) != (0)" (0x0, 0x0) (tid=1236094)
#0 0x555555634f8b in __asan::CheckUnwind()
compiler-rt/lib/asan/asan_rtl.cpp:69:3
#1 0x55555564e06e in __sanitizer::CheckFailed(char const*, int, char
const*, unsigned long long, unsigned long long)
compiler-rt/lib/sanitizer_common/sanitizer_termination.cpp:86:24
#2 0x5555556491df in __sanitizer::ThreadArgRetval::BeforeJoin(unsigned
long) const
compiler-rt/lib/sanitizer_common/sanitizer_thread_arg_retval.cpp:56:3
#3 0x5555556198ed in Join<___interceptor_pthread_tryjoin_np(void*,
void**)::<lambda()> >
compiler-rt/lib/asan/../sanitizer_common/sanitizer_thread_arg_retval.h:74:26
#4 0x5555556198ed in pthread_tryjoin_np
compiler-rt/lib/asan/asan_interceptors.cpp:311:29
The assert are replaced by error codes.
Commit: b7770befee37feca3d732d6daf9513c62f75c5f0
https://github.com/llvm/llvm-project/commit/b7770befee37feca3d732d6daf9513c62f75c5f0
Author: r4nt <klimek at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestMacroExpansion.cpp
Log Message:
-----------
[ClangFormat] Fix formatting bugs. (#76245)
1. There are multiple calls to addFakeParenthesis; move the guard to not
assign fake parenthesis into the function to make sure we cover all
calls.
2. MustBreakBefore can be set on a token in two cases: either during
unwrapped line parsing, or later, during token annotation. We must
keep the latter, but reset the former.
3. Added a test to document that the intended behavior of preferring not
to break between a return type and a function identifier.
For example, with MOCK_METHOD(r, n, a)=r n a, the code
MOCK_METHOD(void, f, (int a, int b)) should prefer the same breaks as
the expanded void f(int a, int b).
Commit: 40d5c2bcd41a534e6bab98fedf1a930d9bd165e7
https://github.com/llvm/llvm-project/commit/40d5c2bcd41a534e6bab98fedf1a930d9bd165e7
Author: John Brawn <john.brawn at arm.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/aarch64-branch-protection-attr.c
M clang/test/CodeGen/aarch64-targetattr.c
M clang/test/Driver/aarch64-security-options.c
M clang/test/Preprocessor/aarch64-target-features.c
M llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
A llvm/test/CodeGen/AArch64/note-gnu-property-gcs.ll
Log Message:
-----------
[clang][AArch64] Add a -mbranch-protection option to enable GCS (#75486)
-mbranch-protection=gcs (enabled by -mbranch-protection=standard) causes
generated objects to be marked with the gcs feature. This is done via
the guarded-control-stack module flag, in a similar way to
branch-target-enforcement and sign-return-address.
Enabling GCS causes the GNU_PROPERTY_AARCH64_FEATURE_1_GCS bit to be set
on generated objects. No code generation changes are required, as GCS
just requires that functions are called using BL and returned from using
RET (or other similar variant instructions), which is already the case.
Commit: b120dae9bb99b67d12c7b307debb222953473b7c
https://github.com/llvm/llvm-project/commit/b120dae9bb99b67d12c7b307debb222953473b7c
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
A llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx11.mir
A llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx12.mir
R llvm/test/CodeGen/AMDGPU/lds-direct-hazards.mir
Log Message:
-----------
[AMDGPU] Support GFX12 VDSDIR instructions WAITVMSRC operand in GCNHazardRecognizer (#77628)
Modify GCNHazardRecognizer::fixLdsDirectVMEMHazard() so the waitvsrc
operand
in gfx12 DS_PARAM_LOAD or DS_DIRECT_LOAD instructions is set
appropriately
depending on whether a hazard is found or not, rather than inserting an
S_WAITCNT_DEPCTR instruction if a hazard needs to be mitigated.
Co-authored-by: Stephen Thomas <Stephen.Thomas at amd.com>
Commit: d553934770554e856ccad0f1a890d1c07d90644a
https://github.com/llvm/llvm-project/commit/d553934770554e856ccad0f1a890d1c07d90644a
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
Log Message:
-----------
[AArch64] Add missing field 'GuardedControlStack' initializer (NFC)
llvm-project/llvm/lib/TargetParser/ARMTargetParserCommon.cpp:143:39:
error: missing field 'GuardedControlStack' initializer [-Werror,-Wmissing-field-initializers]
PBP = {"none", "a_key", false, false};
^
1 error generated.
Commit: 9edcf7a28eee1e3b2d22bd3aed9e405e17beacce
https://github.com/llvm/llvm-project/commit/9edcf7a28eee1e3b2d22bd3aed9e405e17beacce
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/include/clang/Driver/Options.td
M flang/docs/FlangDriver.md
M flang/test/Driver/compiler-options.f90
M flang/test/Driver/ctofortran.f90
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
A flang/test/Driver/exec.f90
M flang/test/Driver/falias-analysis.f90
M flang/test/Driver/input-from-stdin/input-from-stdin.f90
A flang/test/Driver/isysroot.f90
M flang/test/Preprocessing/preprocessed-dirs.F90
M flang/test/Semantics/OpenMP/use_device_addr.f90
M flang/test/Semantics/OpenMP/use_device_ptr.f90
M flang/test/lit.cfg.py
Log Message:
-----------
[flang][driver] Add support for -isysroot in the frontend (#77365)
If DEFAULT_SYSROOT is not specfied when building flang, then the
-isysroot flag is needed to link binaries against system libraries
on Darwin. It's also needed when linking against a non-default
sysroot.
Commit: f1c88d7c6f7698e4c51cb34754bb3177db9dc704
https://github.com/llvm/llvm-project/commit/f1c88d7c6f7698e4c51cb34754bb3177db9dc704
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/test/Driver/fveclib.f90
Log Message:
-----------
[flang] Fix fveclib on Darwin (#77605)
Fixes fveclib.f90 and fveclib-codegen.f90 tests, that were failing
on Darwin.
Commit: b6f96776c5c30d0b39dcf5db9aa2f497bf99685e
https://github.com/llvm/llvm-project/commit/b6f96776c5c30d0b39dcf5db9aa2f497bf99685e
Author: John Brawn <john.brawn at arm.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
Log Message:
-----------
[clang][AArch64] Fix incorrect rebase (#77769)
When rebasing #75486 I missed adding an extra initializer value to
ParsedBranchProtection, so fix that.
Commit: f892cc36fda6d25d4f7cbf68e95b17ba0af040b8
https://github.com/llvm/llvm-project/commit/f892cc36fda6d25d4f7cbf68e95b17ba0af040b8
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/test/CodeGen/X86/branchfolding-landingpad-cfg.mir
A llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
Log Message:
-----------
[BranchFolding] Fix missing predecessors of landing-pad (#77608)
When removing an empty machine basic block, all of its successors should
be inherited by its fall through MBB. This keeps CFG as only have one
entry which is required by LiveDebugValues.
Reland #77441 as LiveDebugValues test.
Commit: 52613396a6837e5c8b8334821022cad70fe8e917
https://github.com/llvm/llvm-project/commit/52613396a6837e5c8b8334821022cad70fe8e917
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
Log Message:
-----------
[InstrRef] Add debug hint for not reachable blocks from entry (#77725)
Those not reachable blocks was not analyzed by LiveDebugValues and may
raise out of bound access to VarLocs as case in #77441.
Commit: 18798cf972cd0669d3b4b84da18d467542588802
https://github.com/llvm/llvm-project/commit/18798cf972cd0669d3b4b84da18d467542588802
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M openmp/libomptarget/DeviceRTL/include/Configuration.h
M openmp/libomptarget/DeviceRTL/src/Configuration.cpp
M openmp/libomptarget/DeviceRTL/src/Workshare.cpp
Log Message:
-----------
[OpenMP] Add missing weak definitions of missing variables (#77767)
Variables `__omp_rtl_assume_teams_oversubscription` and
`__omp_rtl_assume_threads_oversubscription `are used by functions:
`__kmpc_distribute_static_loop`, `__kmpc_distribute_for_static_loop `and
`__kmpc_for_static_loop`.
Commit: d1ecd12f00fbd7743ebb4fe36fc415eb80bbb1f4
https://github.com/llvm/llvm-project/commit/d1ecd12f00fbd7743ebb4fe36fc415eb80bbb1f4
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
A llvm/test/Transforms/IndVarSimplify/preserve-nsw-during-expansion.ll
Log Message:
-----------
[IndVars] Add additional test for preserving NSW.
Based on https://github.com/llvm/llvm-project/issues/71517.
Commit: 21133f1da4cde22b63c5f62df25d97e51a3cf4ea
https://github.com/llvm/llvm-project/commit/21133f1da4cde22b63c5f62df25d97e51a3cf4ea
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
Log Message:
-----------
[TOSA] Fix -Wdangling-gsl and -Wunused-variable in TosaToLinalg.cpp (NFC)
llvm-project/mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp:2376:9:
error: object backing the pointer will be destroyed at the end of the full-expression [-Werror,-Wdangling-gsl]
tensor::getMixedSizes(rewriter, loc, input_real);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
llvm-project/mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp:2366:10:
error: unused variable 'imag_el_ty' [-Werror,-Wunused-variable]
auto imag_el_ty = cast<FloatType>(
^
2 errors generated.
Commit: 13b5882ee64b7aa6ee08900b7b2f0cc2cbc37f53
https://github.com/llvm/llvm-project/commit/13b5882ee64b7aa6ee08900b7b2f0cc2cbc37f53
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
A llvm/test/CodeGen/PowerPC/pr77748.ll
Log Message:
-----------
[PowerPC] Add test for #77748 (NFC)
Commit: ef4a95c86210e11cf4bfbf545c2f859b5c772888
https://github.com/llvm/llvm-project/commit/ef4a95c86210e11cf4bfbf545c2f859b5c772888
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/MC/AArch64/SVE/predicate-as-counter-aliases.s
Log Message:
-----------
[AArch64] Enable certain instruction aliases for SVE/SME (#77745)
Several SVE instruction aliases accept predicate-as-counter register
names as a convenience. These ought to be enabled with SVE/SME because
the underlying encoding is valid and it's required by Arm ARM.
Commit: dc717b19925c9e0a4fcca0ad277476400f62cc25
https://github.com/llvm/llvm-project/commit/dc717b19925c9e0a4fcca0ad277476400f62cc25
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll
Log Message:
-----------
[SLP][NFC]Add a test for final vector with minbitwidth, NFC.
Commit: 26a8664ed4573ef1559c4edc7b254a10d186d428
https://github.com/llvm/llvm-project/commit/26a8664ed4573ef1559c4edc7b254a10d186d428
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof-tailcall-nonunique.ll
A llvm/test/ThinLTO/X86/memprof-tailcall.ll
A llvm/test/Transforms/MemProfContextDisambiguation/tailcall-nonunique.ll
A llvm/test/Transforms/MemProfContextDisambiguation/tailcall.ll
Log Message:
-----------
[MemProf] Handle missing tail call frames (#75823)
If tail call optimization was not disabled for the profiled binary, the
call contexts will be missing frames for tail calls. Handle this by
performing a limited search through tail call edges for the profiled
callee when a discontinuity is detected. The search depth is adjustable
but defaults to 5.
If we are able to identify a short sequence of tail calls, update the
graph for those calls. In the case of ThinLTO, synthesize the necessary
CallsiteInfos for carrying the cloning information to the backends.
Commit: 18473eb108e29c7c9d9fcb5d0d8c271948aca330
https://github.com/llvm/llvm-project/commit/18473eb108e29c7c9d9fcb5d0d8c271948aca330
Author: Alexey Bataev <5361294+alexey-bataev at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll
Log Message:
-----------
[SLP]Do not require external uses for roots and single use for other instructions in computeMinimumValueSizes. (#72679)
After changes, that does not require support from InstCombine, we can
drop some extra requirements for values-to-be-demoted. No need to check
for external uses for roots/other instructions, just check that the
no non-vectorized insertelement instruction, which may require
widening.
Review: https://github.com/llvm/llvm-project/pull/72679
Commit: 731b29560d02f21210d2224226dd5378afa5090f
https://github.com/llvm/llvm-project/commit/731b29560d02f21210d2224226dd5378afa5090f
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/runtime/extensions.cpp
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang] Handle missing LOGIN_NAME_MAX definition in runtime (#77775)
18af032c0e16252effeb6dfd02113812388f1d31 broke the Solaris build:
```
/vol/llvm/src/llvm-project/dist/flang/runtime/extensions.cpp:60:24: error: use of undeclared identifier 'LOGIN_NAME_MAX'
60 | const int nameMaxLen{LOGIN_NAME_MAX + 1};
| ^
/vol/llvm/src/llvm-project/dist/flang/runtime/extensions.cpp:61:12: warning: variable length arrays in C++ are a Clang extension [-Wvla-cxx-extension]
61 | char str[nameMaxLen];
| ^~~~~~~~~~
/vol/llvm/src/llvm-project/dist/flang/runtime/extensions.cpp:61:12: note: initializer of 'nameMaxLen' is unknown
/vol/llvm/src/llvm-project/dist/flang/runtime/extensions.cpp:60:13: note: declared here
60 | const int nameMaxLen{LOGIN_NAME_MAX + 1};
| ^
```
`flang/unittests/Runtime/CommandTest.cpp` has the same issue.
As documented in Solaris 11.4 `limits.h(3HEAD)`, `LOGIN_NAME_MAX` can be
undefined. To determine the value, `sysconf(3C)` needs to be used
instead.
Beside that portable method, Solaris also provides a non-standard
`LOGNAME_MAX` which could be used, but I've preferred the standard route
instead which would support other targets with the same issue.
Tested on `amd64-pc-solaris2.11` and `x86_64-pc-linux-gnu`.
Commit: 3b3ee1f534242f06cdda276aacfa3328b7737326
https://github.com/llvm/llvm-project/commit/3b3ee1f534242f06cdda276aacfa3328b7737326
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
Log Message:
-----------
[RISCV] Add test for strided gather with disjoint or. NFC
Commit: 8f90e6937a1fac80873bb2dab5f382c82ba1ba4e
https://github.com/llvm/llvm-project/commit/8f90e6937a1fac80873bb2dab5f382c82ba1ba4e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/CMakeLists.txt
M libcxx/cmake/caches/AArch64.cmake
M libcxx/cmake/caches/AIX.cmake
M libcxx/cmake/caches/AndroidNDK.cmake
M libcxx/cmake/caches/Apple.cmake
M libcxx/cmake/caches/Armv7Arm.cmake
M libcxx/cmake/caches/Armv7M-picolibc.cmake
M libcxx/cmake/caches/Armv7Thumb-no-exceptions.cmake
M libcxx/cmake/caches/Armv8Arm.cmake
M libcxx/cmake/caches/Armv8Thumb-no-exceptions.cmake
M libcxx/cmake/caches/Generic-merged.cmake
M libcxx/cmake/caches/Generic-msan.cmake
M libcxx/cmake/caches/Generic-tsan.cmake
M libcxx/cmake/caches/MinGW.cmake
M libcxx/docs/BuildingLibcxx.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/utils/ci/run-buildbot
M libcxxabi/CMakeLists.txt
Log Message:
-----------
[runtimes] Use LLVM libunwind from libc++abi by default (#77687)
I recently came across LIBCXXABI_USE_LLVM_UNWINDER and was surprised to
notice it was disabled by default. Since we build libunwind by default
and ship it in the LLVM toolchain, it would seem to make sense that
libc++ and libc++abi rely on libunwind for unwinding instead of using
the system-provided unwinding library (if any).
Most importantly, using the system unwinder implies that libc++abi is
ABI compatible with that system unwinder, which is not necessarily the
case. Hence, it makes a lot more sense to instead default to using the
known-to-be-compatible LLVM unwinder, and let vendors manually select a
different unwinder if desired.
As a follow-up change, we should probably apply the same default to
compiler-rt.
Differential Revision: https://reviews.llvm.org/D150897
Fixes #77662
rdar://120801778
Commit: 5794854213375017f52914afbae09a12b9a33e06
https://github.com/llvm/llvm-project/commit/5794854213375017f52914afbae09a12b9a33e06
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M libc/src/string/memory_utils/op_x86.h
Log Message:
-----------
[libc][NFC] Use 16-byte indices for _mmXXX_shuffle_epi8 (#77781)
This is less confusing since the implementation only cares about the 4
lower bits.
Commit: b6fc463d4c0b00e0741776f9d41b47f532a80b9e
https://github.com/llvm/llvm-project/commit/b6fc463d4c0b00e0741776f9d41b47f532a80b9e
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
Log Message:
-----------
[SEH] Redirect test output to /dev/null (#77784)
Commit: c37699b9e358552550b18d1e627af62a7159f5f3
https://github.com/llvm/llvm-project/commit/c37699b9e358552550b18d1e627af62a7159f5f3
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf] Add missing <unordered_map> include to fix buildbot (#77788)
Should fix buildbot failure
https://lab.llvm.org/buildbot/#/builders/54/builds/8451
from #75823.
Commit: 31ce0f1dda3caed829db09b9212eac54a8a28572
https://github.com/llvm/llvm-project/commit/31ce0f1dda3caed829db09b9212eac54a8a28572
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/test/Driver/exec.f90
Log Message:
-----------
[flang][driver] Fix exec.f90 test with shared libs
Commit: fc6faa1113e9069f41b5500db051210af0eea843
https://github.com/llvm/llvm-project/commit/fc6faa1113e9069f41b5500db051210af0eea843
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/test/CodeGen/debug-info-codeview-unnamed.c
M clang/test/CodeGen/debug-info-unused-types.c
M clang/test/CodeGen/debug-info-unused-types.cpp
M clang/test/CodeGenCXX/debug-info-access.cpp
M clang/test/CodeGenCXX/debug-info-anon-union-vars.cpp
M clang/test/CodeGenCXX/debug-info-codeview-unnamed.cpp
M clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp
M clang/test/CodeGenCXX/debug-lambda-this.cpp
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
A llvm/test/Bitcode/clone-local-types.ll
M llvm/test/Bitcode/upgrade-cu-locals.ll
M llvm/test/Bitcode/upgrade-cu-locals.ll.bc
A llvm/test/DebugInfo/Generic/inlined-local-type.ll
A llvm/test/DebugInfo/Generic/lexical-block-retained-types.ll
A llvm/test/DebugInfo/Generic/lexical-block-types.ll
R llvm/test/DebugInfo/Generic/split-dwarf-local-import.ll
R llvm/test/DebugInfo/Generic/split-dwarf-local-import2.ll
R llvm/test/DebugInfo/Generic/split-dwarf-local-import3.ll
M llvm/test/DebugInfo/Generic/verifier-invalid-disubprogram.ll
A llvm/test/DebugInfo/X86/local-type-as-template-parameter.ll
M llvm/test/DebugInfo/X86/set.ll
A llvm/test/DebugInfo/X86/split-dwarf-local-import.ll
A llvm/test/DebugInfo/X86/split-dwarf-local-import2.ll
A llvm/test/DebugInfo/X86/split-dwarf-local-import3.ll
M llvm/unittests/Transforms/Utils/CloningTest.cpp
Log Message:
-----------
[CloneFunction][DebugInfo] Avoid cloning DILocalVariables of inlined functions (#75385)
- [DebugMetadata][DwarfDebug] Support function-local types in lexical
block scopes (4/7)
- [CloneFunction][DebugInfo] Avoid cloning DILocalVariables of inlined
functions
This is a follow-up for https://reviews.llvm.org/D144006, fixing a crash
reported
in Chromium (https://reviews.llvm.org/D144006#4651955).
The first commit is added for convenience, as it has already been
accepted.
If DISubpogram was not cloned (e.g. we are cloning a function that has
other
functions inlined into it, and subprograms of the inlined functions are
not supposed to be cloned), it doesn't make sense to clone its
DILocalVariables as well.
Otherwise get duplicated DILocalVariables not tracked in their
subprogram's retainedNodes, that crash LTO with Chromium.
This is meant to be committed along with
https://reviews.llvm.org/D144006.
Commit: 3867e6689eb742b1f64be7af9e31cc3183aa46fd
https://github.com/llvm/llvm-project/commit/3867e6689eb742b1f64be7af9e31cc3183aa46fd
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
M llvm/test/MC/AMDGPU/gfx12_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage_alias.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt
Log Message:
-----------
[AMDGPU] Add new GFX12 image atomic float instructions (#76946)
Commit: 90eb4e24551c44bee3b9c0ca33fcb6dbb7c381fe
https://github.com/llvm/llvm-project/commit/90eb4e24551c44bee3b9c0ca33fcb6dbb7c381fe
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/MC/AArch64/SVE/pfalse-diagnostics.s
Log Message:
-----------
[AArch64] Fix missing `pfalse` diagnostic (#77746)
The missing diagnostic causes an ICE when a suffix other than `.B`
is used in a `pfalse` instruction with a predicate-as-counter operand.
Commit: 3b3da7c7fbc008fb23dd3365033e62d6d5deeb35
https://github.com/llvm/llvm-project/commit/3b3da7c7fbc008fb23dd3365033e62d6d5deeb35
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/vec15-base.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
Log Message:
-----------
[SLP] Add a set of tests with non-power-of-2 operations.
Commit: d21fb06a6e36048e6729c51c351ff8c4055e8381
https://github.com/llvm/llvm-project/commit/d21fb06a6e36048e6729c51c351ff8c4055e8381
Author: Eleanor Bonnici <eleanor.bonnici at arm.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/test/ELF/arm-adr.s
Log Message:
-----------
[lld][ELF] Allow Arm PC-relative relocations in PIC links (#77304)
The relocations that map to R_ARM_PCA are equivalent to R_PC. They are
PC-relative and safe to use in shared libraries, but have a different
relocation code as they are evaluated differently. Now that LLVM may
generate these relocations in object files, they may occur in
shared libraries or position-independent executables.
Commit: 923f0392bf050e2e17caa93778e90cf429905694
https://github.com/llvm/llvm-project/commit/923f0392bf050e2e17caa93778e90cf429905694
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'copy' Clause
The copy clause takes a var-list, similar to cache. This patch
implements the parsing in terms of how we did cache, and does some
infrastructure for future clause parsing.
As a part of this, many functions needed to become members of Parser,
which I anticipated needing to happen in the future anyway.
Commit: 114e6d7ba02f090117f2cb1ffeb9027cf80f335b
https://github.com/llvm/llvm-project/commit/114e6d7ba02f090117f2cb1ffeb9027cf80f335b
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
Log Message:
-----------
[RISCV] Add test for strided gather with recursive disjoint or. NFC
This already gets converted to a strided intrinsic because we currently call
haveNoCommonBitsSet when checking or instructions, but an upcoming patch will
change this logic and we want to preserve this case.
Note that this IR is in the form that comes from instcombine. The splats need
to be inline constexprs, otherwise isSplatValue() will fail. (It can't
currently handle splats where the shufflevector is an instruction, and the
insertelement is a constexpr.
Commit: 3ede817f5bd947cb0da63187f333a6274bf1f418
https://github.com/llvm/llvm-project/commit/3ede817f5bd947cb0da63187f333a6274bf1f418
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[Libomptarget] Fix JIT on the NVPTX target by calling ptx manually (#77801)
Summary:
Recently a patch added an assertion in the GlobalHandler to indicate
when an ELF was not used. This began to fire whenever NVPTX JIT was
used, because the JIT pass output a PTX file instead of an ELF. The
CUModuleLoad method consumes `.s` internally and compiles it to a cubin,
however, this is too late as we perform several checks on the ELF
directly for the presence of certain symbols and to read some necessary
constants. This results in inconsistent behaviour.
To address this, this patch simply calls `ptxas` manually, similar to
how `lld` is called for the AMDGPU JIT pass. This is inevitably going to
be slower than simply passing it to the CUDA routine due to the overhead
involved in file IO and a fork call, but it's necessary for correctness.
CUDA provides an API for compiling PTX manually. However, this only
started showing up in CUDA 11.1 and is only provided "officially" in a
static library. The `libnvidia-ptxjitcompiler.so` next to the CUDA
driver has the same symbols and can likely be used as a replacement.
This would be the faster solution. However, given that it's not
documented it may have some issues.
Commit: dd5ce4572fb90323799f1bdf585c01d08613e277
https://github.com/llvm/llvm-project/commit/dd5ce4572fb90323799f1bdf585c01d08613e277
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'use_device' clause parsing
'use_device' is effectively identical to the 'copy' parsing in that it
has required parens and no 'special' name, so this is a pretty trivial
impementation. There are a number of other similar situation clauses
I'll do in a followup patch.
Commit: 4278d9b593d31a644e4be3bb9386e2c0ed6ac6f1
https://github.com/llvm/llvm-project/commit/4278d9b593d31a644e4be3bb9386e2c0ed6ac6f1
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
Log Message:
-----------
[mlir][spirv] Lower `arith` overflow flags to corresponding SPIR-V op decorations (#77714)
Commit: ee457102585e99ac7c832926aa5be8d12025d466
https://github.com/llvm/llvm-project/commit/ee457102585e99ac7c832926aa5be8d12025d466
Author: dancing-leaves <dancing-leaves at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M lldb/source/Target/TargetProperties.td
Log Message:
-----------
[lldb] Fix MaxSummaryLength target property type (#72233)
There seems to be a regression since
https://github.com/llvm/llvm-project/commit/6f8b33f6dfd0a0f8d2522b6c832bd6298ae2f3f3.
`Max String Summary Length` target property is not read properly and the
default value (1024) is being used instead.
16.0.6:
```
(lldb) settings set target.max-string-summary-length 16
(lldb) var
(std::string) longStdString = "0123456789101112131415161718192021222324252627282930313233343536"
(const char *) longCharPointer = 0x000055555556f310 "0123456789101112131415161718192021222324252627282930313233343536"
```
17.0.4:
```
(lldb) settings set target.max-string-summary-length 16
(lldb) var
(std::string) longStdString = "0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377"...
(const char *) longCharPointer = 0x000055555556f310 "*same as line above*"...
```
Comparison fails here:
https://github.com/llvm/llvm-project/blob/9cb1673fa5d267148ac81ee31b37f1d2f7c0f2b8/lldb/source/Interpreter/OptionValue.cpp#L256
Due to the type difference:
https://github.com/llvm/llvm-project/blob/9cb1673fa5d267148ac81ee31b37f1d2f7c0f2b8/lldb/source/Target/Target.cpp#L4611
https://github.com/llvm/llvm-project/blob/9cb1673fa5d267148ac81ee31b37f1d2f7c0f2b8/lldb/source/Target/TargetProperties.td#L98
Commit: f5dd70c58277d925710e5a7c25c86d7565cc3c6c
https://github.com/llvm/llvm-project/commit/f5dd70c58277d925710e5a7c25c86d7565cc3c6c
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
Log Message:
-----------
[LSR] Require non-zero step when considering wrap around for term folding (#77809)
The term folding logic needs to prove that the induction variable does
not cycle through the same set of values so that testing for the value
of the IV on the exiting iteration is guaranteed to trigger only on that
iteration. The prior code checked the no-self-wrap property on the IV,
but this is insufficient as a zero step is trivially no-self-wrap per
SCEV's definition but does repeat the same series of values.
In the current form, this has the effect of basically disabling lsr's
term-folding for all non-constant strides. This is still a net
improvement as we've disabled term-folding entirely, so being able to
enable it for constant strides is still a net improvement.
As future work, there's two SCEV weakness worth investigating.
First sext (or i32 %a, 1) to i64 does not return true for
isKnownNonZero. This is because we check only the unsigned range in that
query. We could either do query pushdown, or check the signed range as
well. I tried the second locally and it has very broad impact - i.e. we
have a bunch of missing optimizations here.
Second, zext (or i32 %a, 1) to i64 as the increment to the IV in
expensive_expand_short_tc causes the addrec to no longer be provably
no-self-wrap. I didn't investigate this so it might be necessary, but
the loop structure is such that I find this result surprising.
Commit: c2fd5b738e9700a515f1730c714897eeec064157
https://github.com/llvm/llvm-project/commit/c2fd5b738e9700a515f1730c714897eeec064157
Author: Chris Bieneman <chris.bieneman at me.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/docs/HLSL/FunctionCalls.rst
Log Message:
-----------
[NFC] Remove trailing whitespace
This seems to be causing problems that I couldn't reproduce locally.
Commit: 21e1bf2d00018cf35842e63e9c434a9507f73e6f
https://github.com/llvm/llvm-project/commit/21e1bf2d00018cf35842e63e9c434a9507f73e6f
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
Add more ZA modes (#77361)
Add more ZA modes
Adds the arm_shared_za and arm_preserves_za attributes to the existing
arm_new_za attribute. The functionality already exists in LLVM, so just
"linking the pieces together".
For more details see:
https://arm-software.github.io/acle/main/acle.html#sme-attributes-relating-to-za
Commit: 061b777c82c9ff4d0fe92d578d4e0cdf6057c958
https://github.com/llvm/llvm-project/commit/061b777c82c9ff4d0fe92d578d4e0cdf6057c958
Author: Felix Schneider <fx.schn at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/test/Dialect/Affine/constant-fold.mlir
Log Message:
-----------
[mlir][affine] Add dependency on `UBDialect` for `PoisonAttr` (#77691)
The folder for `AffineApplyOp` will try creating a `PoisonAttr`
under certain circumstances. However, this will result in a crash if the
`UBDialect` isn't loaded.
This patch adds a dependency of `AffineDialect` on `UBDialect`.
Commit: 4619e21c72879591fbb5c8a1b1b5effe70b0a57e
https://github.com/llvm/llvm-project/commit/4619e21c72879591fbb5c8a1b1b5effe70b0a57e
Author: Felix Schneider <fx.schn at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/MemRef/ops.mlir
Log Message:
-----------
[mlir][memref] Transpose: allow affine map layouts in result, extend folder (#76294)
Currently, the `memref.transpose` verifier forces the result type of the
Op to have an explicit `StridedLayoutAttr` via the method
`inferTransposeResultType`. This means that the example Op
given in the documentation is actually invalid because it uses an `AffineMap`
to specify the layout.
It also means that we can't "un-transpose" a transposed memref back to
the implicit layout form, because the verifier will always enforce the
explicit strided layout.
This patch makes the following changes:
1. The verifier checks whether the canonicalized strided layout of the
result Type is identitcal to the canonicalized infered result type
layout. This way, it's only important that the two Types have the same
strided layout, not necessarily the same representation of it.
2. The folder is extended to support folding away the trivial case of
identity permutation and to fold one transposition into another by
composing the permutation maps.
Commit: c3e3aa9c33f0cda5759340bfc61452548e459806
https://github.com/llvm/llvm-project/commit/c3e3aa9c33f0cda5759340bfc61452548e459806
Author: Usman Nadeem <mnadeem at quicinc.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
A llvm/test/CodeGen/AArch64/sve2-xar.ll
Log Message:
-----------
[AArch64][SVE2] Generate XAR (#77160)
Bitwise exclusive OR and rotate right by immediate
Select xar (x, y, imm) for the following pattern:
or (shl (xor x, y), nBits-imm), (shr (xor x, y), imm)
This is essentially:
rotr (xor(x, y), imm)
Commit: 2bb511e277e501d3faa0f2da0d1c98ea0b515507
https://github.com/llvm/llvm-project/commit/2bb511e277e501d3faa0f2da0d1c98ea0b515507
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/X86/bolt-address-translation.test
Log Message:
-----------
[BOLT][NFC] Print BAT section size (#76897)
Test Plan: Updated bolt/test/X86/bolt-address-translation.test
Commit: 0cc31579e0b690e974163da4077a40b49bfc1ebc
https://github.com/llvm/llvm-project/commit/0cc31579e0b690e974163da4077a40b49bfc1ebc
Author: Hirofumi Nakamura <k.nakamura.hirofumi at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/include/clang/Format/Format.h
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] TableGen keywords support. (#77477)
Add TableGen keywords to the additional keyword list of the formatter.
This pull request is the splited part from
https://github.com/llvm/llvm-project/pull/76059 .
Commit: 18734f606635f4f4270f911b68060890ce3dd94a
https://github.com/llvm/llvm-project/commit/18734f606635f4f4270f911b68060890ce3dd94a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/runtime/extensions.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/runtime/extensions.cpp:111:12: error: variable length arrays
are a C99 feature [-Werror,-Wvla-extension]
Commit: cf3421de587d7c947e8f6b5c754393f85a395747
https://github.com/llvm/llvm-project/commit/cf3421de587d7c947e8f6b5c754393f85a395747
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[Format] Fix a warning
This patch fixes:
clang/unittests/Format/TokenAnnotatorTest.cpp:2181:29: error: lambda
capture 'Style' is not used [-Werror,-Wunused-lambda-capture]
Commit: fb09447132cb192a0ef5082d4a4bae30f893e501
https://github.com/llvm/llvm-project/commit/fb09447132cb192a0ef5082d4a4bae30f893e501
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/unittests/Runtime/CommandTest.cpp:702:14: error: variable
length arrays are a C99 feature [-Werror,-Wvla-extension]
Commit: a7cf0a1f7fc8646bbb74314cd28cbd1a518546a4
https://github.com/llvm/llvm-project/commit/a7cf0a1f7fc8646bbb74314cd28cbd1a518546a4
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
A bolt/docs/BAT.md
Log Message:
-----------
[BOLT] Add BOLT Address Translation documentation (#76899)
Test Plan: Open the page in browser
Commit: 565f40d66b8dff1dfd1e30171ca8f51dc37eb27f
https://github.com/llvm/llvm-project/commit/565f40d66b8dff1dfd1e30171ca8f51dc37eb27f
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M bolt/docs/BAT.md
M bolt/include/bolt/Profile/BoltAddressTranslation.h
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/test/X86/bolt-address-translation.test
Log Message:
-----------
[BOLT] Encode BAT using ULEB128 (#76899)
Reduces BAT section size, bytes:
- large binary: 38676872 -> 23262524 (0.60x),
- medium binary (trunk clang): 5938004 -> 3213504 (0.54x),
- small binary (X86/bolt-address-translation.test): 1436 -> 680 (0.47x).
Test Plan: Updated bolt/test/X86/bolt-address-translation.test
Commit: 3e82663b05cb4d90ded9b8c0b47b2217789b15ee
https://github.com/llvm/llvm-project/commit/3e82663b05cb4d90ded9b8c0b47b2217789b15ee
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
Log Message:
-----------
[Dialect] Fix a warning
This patch fixes:
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp:3154:8: error: unused
variable 'rank' [-Werror,-Wunused-variable]
Commit: e7f794875169811f3801fad6d40bb9fe833e1a69
https://github.com/llvm/llvm-project/commit/e7f794875169811f3801fad6d40bb9fe833e1a69
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/alloca_vla_interact.cpp
M compiler-rt/test/asan/TestCases/scariness_score_test.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll
M llvm/test/Instrumentation/AddressSanitizer/debug_info.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime-uar-uas.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime.ll
M llvm/test/Instrumentation/AddressSanitizer/local_stack_base.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_dynamic_alloca.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_layout.ll
Log Message:
-----------
Revert "[asan] Enable StackSafetyAnalysis by default"
This reverts commit 51fbab134560ece663517bf1e8c2a30300d08f1a.
This causes the compiler to crash. Will file a issue to track the status.
Commit: 75efddba0f507282df479a6e296d67fd88aed489
https://github.com/llvm/llvm-project/commit/75efddba0f507282df479a6e296d67fd88aed489
Author: Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[ASan][libc++] Initialize `__r_` variable with lambda (#77394)
This commit is a refactor (increases readability) and optimization fix.
This is a fixed commit of
https://github.com/llvm/llvm-project/pull/76200 First reverthed here:
https://github.com/llvm/llvm-project/commit/1ea7a56057492d9da1124787a9855cc2edca7df9
Please, check original PR for details.
The difference is a return type of the lambda.
Original description:
This commit addresses optimization and instrumentation challenges
encountered within comma constructors.
1) _LIBCPP_STRING_INTERNAL_MEMORY_ACCESS does not work in comma
constructors.
2) Code inside comma constructors is not always correctly optimized.
Problematic code examples:
- `: __r_(((__str.__is_long() ? 0 : (__str.__annotate_delete(), 0)),
std::move(__str.__r_))) {`
- `: __r_(__r_([&](){ if(!__s.__is_long()) __s.__annotate_delete();
return std::move(__s.__r_);}())) {`
However, lambda with argument seems to be correctly optimized. This
patch uses that fact.
Use of lambda based on idea from @ldionne.
Commit: 37c1a5e3f56a287703426da6c2c8cb998e28ca7c
https://github.com/llvm/llvm-project/commit/37c1a5e3f56a287703426da6c2c8cb998e28ca7c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[Libomptarget] Fix GPU Dtors referencing possibly deallocated image (#77828)
Summary:
The constructors and destructors look up a symbol in the ELF quickly to
determine if they need to be run on the GPU. This allows us to avoid the
very slow actions required to do the slower lookup using the vendor API.
One problem occurs with how we handle the lifetime of these images.
Right now there is no invariant to specify the lifetime of the
underlying binary image that is loaded. In the typical case, this comes
from the binary itself in the `.llvm.offloading` section, meaning that
the lifetime of the binary should match the executable itself. This
would work fine, if it weren't for the fact that the plugin is loaded
via `dlopen` and can have a teardown order out of sync with the main
executable.
This was likely what was occuring when this failed on some systems but
not others. A potential solution would be to simply copy images into
memory so the runtime does not rely on external references. Another
would be to manually zero these out after initialization as to prevent
this mistake from happening accidentally. The former has the benefit of
making some checks easier, and allowing for constant initialization be
done on the ELF itself (normally we can't do this because writing to a
constant section, e.g. .llvm.offloading is a segfault.). The downside
would be the extra time required to copy the image in bulk (Although we
are likely doing this in the vendor runtimes as well).
This patch went with a quick solution to simply set a boolean value at
initialization time if we need to call destructors.
Fixes: https://github.com/llvm/llvm-project/issues/77798
Commit: 40f5f90507725c1f93779c0e6e8d5a13854b4a3f
https://github.com/llvm/llvm-project/commit/40f5f90507725c1f93779c0e6e8d5a13854b4a3f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[mlir][openacc][flang] Simplify gang, vector and worker representation (#77667)
The IR representation for gang, vector and worker has grown with the
support for device_type. This patch simplify the IR representation for
gang, vector and worker information on the acc.loop operation.
When the only the keyword is present without any values, the information
is printed at the same place than when there is values. The device_type
is omitted if there is no values and it is equal to None. Otherwise the
full information is displayed. First the keyword only device_type
information and then the values with their device_type.
Commit: d447304768221b2ebd2dcf60b37c93fbf29d9129
https://github.com/llvm/llvm-project/commit/d447304768221b2ebd2dcf60b37c93fbf29d9129
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/lib/Parser/CMakeLists.txt
Log Message:
-----------
Revert "[Flang][Parser] Add missing dependencies to CMakeLists.txt (#77483)"
This reverts commit cc53ec82ea6df6e7602510fa1bf5b8a991b3bc39.
This commit hasn't accomplished anything. The original issue was that
`DumpTree`, when called from lowering, caused linker errors due to some
directive-naming functions being absent. Adding FrontendOpenMP to the
parser library didn't fix that problem, and according to the notes in
PR #77483, calling `DumpTree` from lowering isn't really supported.
Commit: bdfe5d69dee7baa0a54cddca8a99e0fdaeded4a2
https://github.com/llvm/llvm-project/commit/bdfe5d69dee7baa0a54cddca8a99e0fdaeded4a2
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/test/Semantics/OpenACC/acc-routine.f90
Log Message:
-----------
[flang][openacc] Apply mutually exclusive clauses restriction to routine (#77802)
this patch enforce or fix the enforcement of two restrictions from
section 2.15.1:
> Only the gang, worker, vector, seq and bind clauses may follow a
device_type clause.
`seq` was not allowed after `device_type` with the current
implementation.
> Exactly one of the gang, worker, vector, or seq clauses must appear.
This was not properly checked. This patch check correctly for mutually
exclusion as described in section 2.4. Mutually exclusive clauses may
appear on the same directive if they apply for different device_type.
Commit: 5ce067d592b78fd3142364e06bae4da2a3a1e944
https://github.com/llvm/llvm-project/commit/5ce067d592b78fd3142364e06bae4da2a3a1e944
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/CodeGen/RISCV/branch-on-zero.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands-i1.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll
Log Message:
-----------
Revert "[LSR][TTI][RISCV] Disable terminator folding for RISC-V."
This reverts commit fdb87640ee2be63af9b0e0cd943cb13d79686a03, and thus
re-enables terminator folding for RISCV. The reported miscompile has
been fixed in f5dd70c58277d925710e5a7c25c86d7565cc3c6c.
Commit: 69bc30b91e41d3ba12e0244251abeff03555e87b
https://github.com/llvm/llvm-project/commit/69bc30b91e41d3ba12e0244251abeff03555e87b
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/cmake/caches/Fuchsia.cmake
Log Message:
-----------
[Fuchsia] Add stage2 cmake options
Commit: 8b61fc7181c06dbe907c67b49c75d59ae1595eb5
https://github.com/llvm/llvm-project/commit/8b61fc7181c06dbe907c67b49c75d59ae1595eb5
Author: Andy Kaylor <andrew.kaylor at intel.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
Add sync-up for floating-point working group (#71885)
Adding a new working group to discuss floating-point issues
Commit: 238b5790ba2027a88706a320fe61bd21601b788b
https://github.com/llvm/llvm-project/commit/238b5790ba2027a88706a320fe61bd21601b788b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/test/Semantics/OpenACC/acc-routine.f90
Log Message:
-----------
[flang][openacc] Do not accept static and num for gang clause on routine dir (#77673)
Only the dim argument is allowed on the gang clause for the routine
directive. Reject static and num arguments in the semantic check.
Commit: a6d401703b7542e00c85767513be0851df6c67cf
https://github.com/llvm/llvm-project/commit/a6d401703b7542e00c85767513be0851df6c67cf
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/test/Analysis/StackSafetyAnalysis/memintrin.ll
Log Message:
-----------
[StackSafetyAnalysis] Bail out if MemIntrinsic length is -1 (#77837)
Clang generates llvm.memset.p0.i64 with a length of -1 for the following
code in
`-stdlib=libc++ -std=c++20` mode
(https://github.com/llvm/llvm-project/pull/77210#issuecomment-1887650010)
```cpp
bool strtof_clamp(const std::string &str);
void floatsuffix_check(char *yytext_r) {
std::string text = yytext_r;
text.resize(text.size() - 1);
strtof_clamp(text);
}
```
`Sizes = [0xffffffffffffffff, 0)`. `SizeRange = [0, 0-1)`, leading to
`assert(!isUnsafe(SizeRange));` failure. Bail out if the length is -1.
Other negative values are handled by the existing condition.
Commit: c8ad8024435df43a0811edb51be6ee517c44d332
https://github.com/llvm/llvm-project/commit/c8ad8024435df43a0811edb51be6ee517c44d332
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M flang/include/flang/Common/Fortran.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenACC/acc-module.f90
Log Message:
-----------
[flang][openacc] Carry device dependent info for routine in the module file
Commit: 7740565f56ce888f5c60d986476185477c911b25
https://github.com/llvm/llvm-project/commit/7740565f56ce888f5c60d986476185477c911b25
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/alloca_vla_interact.cpp
M compiler-rt/test/asan/TestCases/scariness_score_test.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll
M llvm/test/Instrumentation/AddressSanitizer/debug_info.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime-uar-uas.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime.ll
M llvm/test/Instrumentation/AddressSanitizer/local_stack_base.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_dynamic_alloca.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_layout.ll
Log Message:
-----------
[asan] Enable StackSafetyAnalysis by default
StackSafetyAnalysis determines whether stack-allocated variables are
guaranteed to be safe from memory access bugs and enables the removal of
certain unneeded instrumentations.
(hwasan enables StackSafetyAnalysis in https://reviews.llvm.org/D108381)
In a release build of clang, text sections are 9% smaller.
Test updates:
* asan-stack-safety.ll: test the -asan-use-stack-safety=1 default
* lifetime-uar-uas.ll: switch to an indexed store to prevent
StackSafetyAnalysis from optimizing out instrumentation for %c
* alloca_vla_interact.cpp: add a load to prevent StackSafetyAnalysis
from optimizing out `__asan_alloca_poison` for the VLA `array`
* scariness_score_test.cpp: add -asan-use-stack-safety=0 to make a load
of a `__asan_poison_memory_region`-poisoned local variable fail as
intended.
* other .ll tests: add -asan-use-stack-safety=0
Reviewed By: kstoimenov
Pull Request: https://github.com/llvm/llvm-project/pull/77210
Commit: b3981edb51bf36480b8b2c9d6969725ddbcadcfb
https://github.com/llvm/llvm-project/commit/b3981edb51bf36480b8b2c9d6969725ddbcadcfb
Author: a-n-n-a-l-e-e <150648636+a-n-n-a-l-e-e at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M libcxx/src/CMakeLists.txt
Log Message:
-----------
[libc++] Re-export libc++abi symbols on Apple platforms when using system-libcxxabi (#77218)
When using LIBCXX_CXX_ABI=system-libcxxabi on Apple platforms, we would not
re-export the libc++abi symbols unlike when LIBCXX_CXX_ABI=libcxxabi. This
was caused by overly strict string matching in CMake.
https://github.com/NixOS/nixpkgs/issues/269548
Commit: bbe07989d7225aaff9613b71dbd7f00e8d738b22
https://github.com/llvm/llvm-project/commit/bbe07989d7225aaff9613b71dbd7f00e8d738b22
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M bolt/docs/BAT.md
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/test/X86/bolt-address-translation.test
Log Message:
-----------
[BOLT] Delta-encode offsets in BAT (#76900)
This change further reduces the size of BAT:
- large binary: to 13073904 bytes (0.34x original),
- medium binary: to 1703116 bytes (0.29x original),
- small binary: to 436 bytes (0.30x original).
Test Plan: Updated bolt/test/X86/bolt-address-translation.test
Commit: 8fb8ad66c95a51b82e5c2876ed925b5512ce6b83
https://github.com/llvm/llvm-project/commit/8fb8ad66c95a51b82e5c2876ed925b5512ce6b83
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M bolt/docs/BAT.md
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/test/X86/bolt-address-translation.test
Log Message:
-----------
[BOLT] Delta-encode function start addresses in BAT (#76902)
Further reduce the size of BAT section:
- large binary: to 12716312 bytes (0.33x original),
- medium binary: to 1649472 bytes (0.28x original),
- small binary: to 428 bytes (0.30x original).
Test Plan: Updated bolt/test/X86/bolt-address-translation.test
Commit: 3513267770802b79fe5c020cf651942678b1e951
https://github.com/llvm/llvm-project/commit/3513267770802b79fe5c020cf651942678b1e951
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/lib/IR/AsmPrinter.cpp
A mlir/test/IR/print-skip-regions.mlir
Log Message:
-----------
[mlir] Add op printing flag to skip regions (#77726)
The new flag, `--mlir-print-skip-regions`, sets the op printing option
that disables region printing. This results in the usual
`--mlir-print-ir-*` debug options printing only the names of the
executed passes and the signatures of the ops.
Example:
```mlir
// -----// IR Dump Before CSE (cse) //----- //
func.func @bar(%arg0: f32, %arg1: f32) -> f32 {...}
// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @bar(%arg0: f32, %arg1: f32) -> f32 {...}
```
The main use-case is to be triage compilation issues (crashes, slowness)
on very deep pass pipelines and with very large IR files, where printing
IR is prohibitively slow otherwise.
Commit: b58f91a31b288a7078e3b0330bd92bb14f3649de
https://github.com/llvm/llvm-project/commit/b58f91a31b288a7078e3b0330bd92bb14f3649de
Author: James Y Knight <jyknight at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
Log Message:
-----------
Set the default value for MaxAtomicSizeInBitsSupported to 0.
This was planned since its introduction, but wasn't rolled out for a
little bit longer than intended (ahem...8 years).
All in-tree targets have now been adjusted to call
setMaxAtomicSizeInBitsSupported explicitly where required, so this
should be a no-op. The docs in docs/Atomics.rst already claimed the
default was 0, so that doesn't need updating.
Commit: 649b391799ac48766186a58f385595876f3c779a
https://github.com/llvm/llvm-project/commit/649b391799ac48766186a58f385595876f3c779a
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
Log Message:
-----------
Revert "[mlir][spirv] Lower `arith` overflow flags to corresponding SPIR-V op decorations (#77714)"
Temporaryly reverting as it broke python bindings
This reverts commit 4278d9b593d31a644e4be3bb9386e2c0ed6ac6f1.
Commit: 5afc4f3a5f6cc1bae4348bdd5f479451773d09a8
https://github.com/llvm/llvm-project/commit/5afc4f3a5f6cc1bae4348bdd5f479451773d09a8
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/lib/Conversion/ArithCommon/AttrToLLVMConverter.cpp
Log Message:
-----------
Revert "[mlir][arith][nfc] Fix typos (#77700)"
Temporarily reverting as it broke python bindings
This reverts commit 9ed30012fb4f43de42ef2f265fe384d9d0b0edf2.
Commit: 5f59b720a8fc41d65964b88c64f803af86ed3cc8
https://github.com/llvm/llvm-project/commit/5f59b720a8fc41d65964b88c64f803af86ed3cc8
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/lib/Conversion/ArithCommon/AttrToLLVMConverter.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/python/ir/diagnostic_handler.py
Log Message:
-----------
Revert "[mlir][arith] Add overflow flags support to arith ops (#77211)"
Temporarily reverting as it broke python bindings
This reverts commit a7262d2d9bee9bdfdbcd03ca27a0128c2e2b1c1a.
Commit: 721dd3bc2f159f58542653b56ae272f1504875f8
https://github.com/llvm/llvm-project/commit/721dd3bc2f159f58542653b56ae272f1504875f8
Author: Artem Dergachev <adergachev at apple.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
Log Message:
-----------
[analyzer] NFC: Don't regenerate duplicate HTML reports.
This is a performance optimization for HTML diagnostics output mode.
Currently they're incredibly inefficient:
* The HTMLRewriter is re-run from scratch on every file on every report.
Each such re-run involves re-lexing the entire file and producing
a syntax-highlighted webpage of the entire file, with text behind macros
duplicated as pop-up macro expansion tooltips. Then, warning and note
bubbles are injected into the page. Only the bubble part is different
across reports; everything else can theoretically be cached.
* Additionally, if duplicate reports are emitted (with the same issue hash),
HTMLRewriter will be re-run even though the output file is going to be
discarded due to filename collision. This is mostly an issue for
path-insensitive bug reports because path-sensitive bug reports
are already deduplicated by the BugReporter as part of searching
for the shortest bug path. But on some translation units almost 80% of
bug reports are dry-run here.
We only get away with all this because there are usually very few reports
emitted per file. But if loud checkers are enabled, such as `webkit.*`,
this may explode in complexity and even cause the compiler to run over
the 32-bit SourceLocation addressing limit. (We're re-lexing everything
each time, remember?)
This patch hotfixes the *second* problem. Adds a FIXME for the first problem,
which will require more yak shaving to solve.
rdar://120801986
Commit: 93b47053c6bce5862ba4a5f7d9f6d5cbaa8cbf41
https://github.com/llvm/llvm-project/commit/93b47053c6bce5862ba4a5f7d9f6d5cbaa8cbf41
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
Log Message:
-----------
[compiler-rt][fuchsia] Preallocate a vmar for sanitizer internals (#75256)
In an effort to reduce more mmap fragmentation, allocate a large enough
vmar where we can map sanitizer internals via DoAnonymousMmap. Objects
being mapped here include asan's FakeStack, LowLevelAllocator mappings,
the primary allocator's TwoLevelMap, InternalMmapVector, StackStore, and
asan's thread internals. The vmar is large enough to hold the total size
of these objects seen in a "typical" process lifetime. If the vmar is
full, it will fallback to mapping in the root vmar.
Commit: 4cee0e3c88d4e5c96cda0a4c3e2e91d4d4b1df69
https://github.com/llvm/llvm-project/commit/4cee0e3c88d4e5c96cda0a4c3e2e91d4d4b1df69
Author: Alexandre Ganea <37383324+aganea at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M lld/cmake/modules/AddLLD.cmake
M lld/test/CMakeLists.txt
M lld/tools/lld/CMakeLists.txt
Log Message:
-----------
[LLD] Fix llvm-driver cmake integration for LLD (#76305)
Previously, even though LLD was linked as part of llvm-driver when using
`cmake ... -DLLVM_TOOL_LLVM_DRIVER_BUILD=ON`, there were build issues
when compiling incrementally. Sometimes link errors when linking LLD,
other times, the `llvm.exe` would be impropely be replaced by `lld.exe`.
Commit: 3c6f47d6b879ddd2842925d2e5da54657d9e5631
https://github.com/llvm/llvm-project/commit/3c6f47d6b879ddd2842925d2e5da54657d9e5631
Author: Alexandre Ganea <37383324+aganea at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/driver/driver.cpp
M lld/Common/DriverDispatcher.cpp
M lld/tools/lld/lld.cpp
M llvm/cmake/modules/llvm-driver-template.cpp.in
M llvm/lib/Support/InitLLVM.cpp
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/llvm-ar/llvm-ar.cpp
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
M llvm/tools/llvm-driver/llvm-driver.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp
M llvm/tools/llvm-lipo/llvm-lipo.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/tools/llvm-mt/llvm-mt.cpp
M llvm/tools/llvm-nm/llvm-nm.cpp
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-rc/llvm-rc.cpp
M llvm/tools/llvm-readobj/llvm-readobj.cpp
M llvm/tools/llvm-size/llvm-size.cpp
M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
M llvm/tools/sancov/sancov.cpp
Log Message:
-----------
[llvm-driver] Fix usage of `InitLLVM` on Windows (#76306)
Previously, some tools such as `clang` or `lld` which require strict
order for certain command-line options, such as `clang -cc1` or `lld
-flavor`, would not longer work on Windows, when these tools were linked
as part of `llvm-driver`. This was caused by `InitLLVM` which was part
of the `*_main()` function of these tools, which in turn calls
`windows::GetCommandLineArguments`. That function completly replaces
argc/argv by new UTF-8 contents, so any ajustements to argc/argv made by
`llvm-driver` prior to calling these tools was reset.
`InitLLVM` is now called by the `llvm-driver`. Any tool that
participates in (or is part of) the `llvm-driver` doesn't call
`InitLLVM` anymore.
Commit: dc61ebb44c11d2f5d03b7dd9cb80a0644a30775e
https://github.com/llvm/llvm-project/commit/dc61ebb44c11d2f5d03b7dd9cb80a0644a30775e
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/test/Format/clang-format-ignore.cpp
Log Message:
-----------
[clang] Mark clang-format-ignore.cpp as unsupported on Windows
To heal bots that have been broken for days while discussions on
https://github.com/llvm/llvm-project/pull/76733 are ongoing.
Commit: ae1c1ed6af8dd7efeb284c23ee8694fad30fff1f
https://github.com/llvm/llvm-project/commit/ae1c1ed6af8dd7efeb284c23ee8694fad30fff1f
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
A llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
Log Message:
-----------
[CodeGen] Allow `CodeGenPassBuilder` to add module pass after function pass (#77084)
In fact, there are several backends, e.g. AArch64, AMDGPU etc. add
module pass after function pass, this patch removes this constraint.
This patch also adds a simple unit test for `CodeGenPassBuilder`.
Commit: 22bc74e4432c704e42c367af558b34b2b285ab3c
https://github.com/llvm/llvm-project/commit/22bc74e4432c704e42c367af558b34b2b285ab3c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port ae1c1ed6af8d
Commit: f626b1f4ca2a6fd2b6c5eea3b53c15c4502d29fa
https://github.com/llvm/llvm-project/commit/f626b1f4ca2a6fd2b6c5eea3b53c15c4502d29fa
Author: Matthew Voss <matthew.voss at sony.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/matrix.c
Log Message:
-----------
[clang][FatLTO][UnifiedLTO] Pass -enable-matrix to the LTO driver
Unified LTO and Fat LTO do not use the regular LTO prelink pipeline when
-flto/-flto=full is specified on the command line, thus they require
LowerMatrixIntrinsicsPass to be run during the link stage. To enable
this, we pass -enable-matrix to the LTO driver, replicating ThinLTO
behavior. This fix was applied to ThinLTO in https://reviews.llvm.org/D153583.
This fixes #77621.
Commit: 8e9c531922c4f9a1ee583ef3553b8529bb8e9a9a
https://github.com/llvm/llvm-project/commit/8e9c531922c4f9a1ee583ef3553b8529bb8e9a9a
Author: Haowei <haowei at google.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/InterfaceStub/IFSHandler.cpp
M llvm/lib/InterfaceStub/IFSStub.cpp
A llvm/test/tools/llvm-ifs/ifs-read-invalid-symbol-type.test
M llvm/unittests/InterfaceStub/ELFYAMLTest.cpp
Log Message:
-----------
[llvm-ifs] Treat unknown symbol types as error. (#75872)
Before this patch, when an unknown symbol type is used in IFS stub, it
will be treated as a NO_TYPE and parsed without error. This patch makes
llvm-ifs throw an error when this scenario happens.
Commit: 3ef20e3fc1910977630b0392558731b199cf38e5
https://github.com/llvm/llvm-project/commit/3ef20e3fc1910977630b0392558731b199cf38e5
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/cmake/caches/Release.cmake
Log Message:
-----------
[CMake][Release] Add option for enabling LTO to cache file (#77035)
This option is LLVM_RELEASE_ENABLE_LTO and it's turned on by default.
Commit: f33e9276e2e2e34f7dd372f80612709e11d4b74f
https://github.com/llvm/llvm-project/commit/f33e9276e2e2e34f7dd372f80612709e11d4b74f
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
github-automation: Use the llvm/llvm-project repo for backport pull requests (#71727)
Now that the project uses PRs for code review, we don't need to use the
llvm/llvm-project-release-prs repo for reviewing backports.
Commit: ab02372c23d736390587aab141fe69c142373002
https://github.com/llvm/llvm-project/commit/ab02372c23d736390587aab141fe69c142373002
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M openmp/libomptarget/test/libc/assert.c
M openmp/libomptarget/test/mapping/target_derefence_array_pointrs.cpp
M openmp/libomptarget/test/mapping/target_uses_allocator.c
M openmp/libomptarget/test/mapping/target_wrong_use_device_addr.c
M openmp/libomptarget/test/offloading/bug64959.c
M openmp/libomptarget/test/offloading/info.c
M openmp/libomptarget/test/offloading/std_complex_arithmetic.cpp
M openmp/libomptarget/test/unified_shared_memory/close_enter_exit.c
M openmp/libomptarget/test/unified_shared_memory/close_modifier.c
M openmp/libomptarget/test/unified_shared_memory/shared_update.c
Log Message:
-----------
[OpenMP] Fix or disable NVPTX tests failing currently (#77844)
Summary:
This patch is an attempt to get a clean run of `check-openmp` running on
an NVPTX machine. I simply took the lists of tests that failed on my
`sm_89` machine and disabled them or fixed them. A lot of these tests
are disabled on AMDGPU already, so it makes sense that NVPTX fails. The
others are simply problems with NVPTX optimized debugging which will
need to be fixed. I opened an issue on one of them.
Commit: 17c062c0c5624b19cd99237bb5fffe37de8aa623
https://github.com/llvm/llvm-project/commit/17c062c0c5624b19cd99237bb5fffe37de8aa623
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
Log Message:
-----------
[CodeGen] Make CodeGenPassBuilder Pipeline test x86-64 only (#77860)
Should fix arm build bots
Commit: 791637e78236541a871f9474e0c8918354ca310f
https://github.com/llvm/llvm-project/commit/791637e78236541a871f9474e0c8918354ca310f
Author: Emilia Kond <emilia at rymiel.space>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Don't allow casts in front of ampamp (#77704)
clang-format performs a heuristic to see if a right parenthesis is the
parenthesis of a cast expression. This check never looked ahead to see
if the next token is an ampamp && token. This resulted in the paren
being set as an CastRParen, and the following ampamp got annotated as an
UnaryOperator!
Since && can never be a unary operator is standard C++, this patch
forbids the right paren from ever becoming a cast.
Fixes https://github.com/llvm/llvm-project/issues/77680
Commit: 9095eec0524d39d447d6f94cd3f9896cc5fc656f
https://github.com/llvm/llvm-project/commit/9095eec0524d39d447d6f94cd3f9896cc5fc656f
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-12 (Fri, 12 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/add.ll
M llvm/test/CodeGen/X86/apx/compress-evex.mir
M llvm/test/CodeGen/X86/apx/dec.ll
M llvm/test/CodeGen/X86/apx/inc.ll
M llvm/test/CodeGen/X86/apx/or.ll
M llvm/test/CodeGen/X86/apx/sbb.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/apx/xor.ll
Log Message:
-----------
[X86][CodeGen] Support EVEX compression: NDD to nonNDD (#77731)
Commit: d6f3382dba04e374284f530ca0f998fadc013f32
https://github.com/llvm/llvm-project/commit/d6f3382dba04e374284f530ca0f998fadc013f32
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/llvm-project-tests.yml
M README.md
A bolt/docs/BAT.md
M bolt/include/bolt/Profile/BoltAddressTranslation.h
M bolt/lib/Profile/BoltAddressTranslation.cpp
M bolt/lib/Rewrite/CMakeLists.txt
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/RISCV/relax.s
M bolt/test/X86/bolt-address-translation.test
M clang-tools-extra/clang-include-fixer/tool/clang-include-fixer.el
M clang-tools-extra/clang-query/QueryParser.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/Selection.cpp
M clang-tools-extra/clangd/unittests/SelectionTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/AddUsingTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/.clang-tidy
M clang/CMakeLists.txt
M clang/cmake/caches/Fuchsia.cmake
M clang/cmake/caches/Release.cmake
M clang/docs/ClangFormat.rst
M clang/docs/ClangFormatStyleOptions.rst
A clang/docs/HLSL/FunctionCalls.rst
M clang/docs/HLSL/HLSLDocs.rst
M clang/docs/InternalsManual.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Analysis/CFG.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/.clang-format
M clang/include/clang/Format/Format.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/TypoCorrection.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Descriptor.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/lib/AST/Interp/Program.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/PathDiagnostic.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Format/.clang-format
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/WhitespaceManager.cpp
M clang/lib/Format/WhitespaceManager.h
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/lib/Headers/arm_acle.h
M clang/lib/Headers/ia32intrin.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/test/AST/Interp/arrays.cpp
M clang/test/AST/Interp/functions.cpp
M clang/test/AST/Interp/literals.cpp
A clang/test/AST/ast-dump-coroutine.cpp
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/errno-stdlibraryfunctions.c
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream-noopen.c
M clang/test/Analysis/stream.c
M clang/test/CXX/drs/dr12xx.cpp
M clang/test/CXX/drs/dr17xx.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/test/CXX/drs/dr1xx.cpp
M clang/test/CXX/drs/dr23xx.cpp
M clang/test/CXX/drs/dr24xx.cpp
M clang/test/CXX/drs/dr25xx.cpp
M clang/test/CXX/drs/dr26xx.cpp
M clang/test/CXX/drs/dr27xx.cpp
M clang/test/CXX/drs/dr4xx.cpp
M clang/test/CXX/over/over.load/p2-0x.cpp
M clang/test/CodeGen/2006-05-19-SingleEltReturn.c
M clang/test/CodeGen/64bit-swiftcall.c
M clang/test/CodeGen/CSKY/csky-abi.c
M clang/test/CodeGen/CSKY/csky-hard-abi.c
M clang/test/CodeGen/CSKY/csky-soft-abi.c
M clang/test/CodeGen/PowerPC/aix-alignment.c
M clang/test/CodeGen/PowerPC/powerpc-c99complex.c
M clang/test/CodeGen/PowerPC/ppc-aggregate-abi.cpp
M clang/test/CodeGen/PowerPC/ppc32-and-aix-struct-return.c
M clang/test/CodeGen/PowerPC/ppc64-align-struct.c
M clang/test/CodeGen/PowerPC/ppc64-elf-abi.c
M clang/test/CodeGen/PowerPC/ppc64-soft-float.c
M clang/test/CodeGen/PowerPC/ppc64-vector.c
M clang/test/CodeGen/PowerPC/ppc64le-aggregates.c
M clang/test/CodeGen/PowerPC/ppc64le-f128Aggregates.c
M clang/test/CodeGen/RISCV/bfloat-abi.c
M clang/test/CodeGen/RISCV/riscv-abi.cpp
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/RISCV/riscv32-abi.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGen/SystemZ/gnu-atomic-builtins-i128-8Al.c
M clang/test/CodeGen/SystemZ/systemz-abi-vector.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/systemz-abi.cpp
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/WebAssembly/wasm-arguments.c
M clang/test/CodeGen/WebAssembly/wasm-varargs.c
M clang/test/CodeGen/X86/avx512er-builtins.c
M clang/test/CodeGen/X86/avx512pf-builtins.c
M clang/test/CodeGen/X86/x86_32-arguments-darwin.c
M clang/test/CodeGen/X86/x86_32-arguments-iamcu.c
M clang/test/CodeGen/X86/x86_64-arguments-nacl.c
M clang/test/CodeGen/X86/x86_64-arguments-win32.c
M clang/test/CodeGen/X86/x86_64-arguments.c
M clang/test/CodeGen/aarch64-branch-protection-attr.c
M clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
M clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1_single.c
M clang/test/CodeGen/aarch64-targetattr.c
M clang/test/CodeGen/aarch64-varargs.c
M clang/test/CodeGen/aggregate-assign-call.c
M clang/test/CodeGen/aligned-sret.c
M clang/test/CodeGen/arc/arguments.c
M clang/test/CodeGen/arm-aapcs-vfp.c
A clang/test/CodeGen/arm-acle-coproc.c
M clang/test/CodeGen/arm-arguments.c
M clang/test/CodeGen/arm-homogenous.c
M clang/test/CodeGen/arm-neon-vld.c
M clang/test/CodeGen/arm-swiftcall.c
M clang/test/CodeGen/arm-varargs.c
M clang/test/CodeGen/arm-vector-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments.c
M clang/test/CodeGen/arm-vfp16-arguments2.cpp
M clang/test/CodeGen/arm64-arguments.c
M clang/test/CodeGen/arm64-microsoft-arguments.cpp
M clang/test/CodeGen/arm64_32.c
M clang/test/CodeGen/armv7k-abi.c
A clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/attr-noundef.cpp
M clang/test/CodeGen/blocks.c
M clang/test/CodeGen/bounds-checking.c
M clang/test/CodeGen/c11atomics-ios.c
M clang/test/CodeGen/c11atomics.c
M clang/test/CodeGen/debug-info-codeview-unnamed.c
M clang/test/CodeGen/debug-info-unused-types.c
M clang/test/CodeGen/debug-info-unused-types.cpp
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/flexible-array-init.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/lanai-arguments.c
M clang/test/CodeGen/mcu-struct-return.c
M clang/test/CodeGen/mingw-long-double.c
M clang/test/CodeGen/mips-vector-return.c
M clang/test/CodeGen/mips-zero-sized-struct.c
M clang/test/CodeGen/mips64-nontrivial-return.cpp
M clang/test/CodeGen/mips64-padding-arg.c
M clang/test/CodeGen/ms_abi.c
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGen/regcall2.c
M clang/test/CodeGen/regparm-struct.c
M clang/test/CodeGen/renderscript.c
M clang/test/CodeGen/sparcv9-abi.c
M clang/test/CodeGen/sret.c
M clang/test/CodeGen/vectorcall.c
M clang/test/CodeGen/windows-struct-abi.c
M clang/test/CodeGen/windows-swiftcall.c
M clang/test/CodeGenCXX/aix-alignment.cpp
M clang/test/CodeGenCXX/arm-cc.cpp
M clang/test/CodeGenCXX/arm-swiftcall.cpp
M clang/test/CodeGenCXX/attr-musttail.cpp
M clang/test/CodeGenCXX/call-with-static-chain.cpp
M clang/test/CodeGenCXX/conditional-gnu-ext.cpp
M clang/test/CodeGenCXX/cxx1z-copy-omission.cpp
M clang/test/CodeGenCXX/cxx1z-lambda-star-this.cpp
M clang/test/CodeGenCXX/debug-info-access.cpp
M clang/test/CodeGenCXX/debug-info-anon-union-vars.cpp
M clang/test/CodeGenCXX/debug-info-codeview-unnamed.cpp
M clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp
M clang/test/CodeGenCXX/debug-lambda-this.cpp
M clang/test/CodeGenCXX/exceptions.cpp
M clang/test/CodeGenCXX/homogeneous-aggregates.cpp
M clang/test/CodeGenCXX/lambda-expressions.cpp
M clang/test/CodeGenCXX/matrix-casts.cpp
M clang/test/CodeGenCXX/matrix-type-builtins.cpp
M clang/test/CodeGenCXX/matrix-type.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-sret.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-cdecl-method-sret.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp
M clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp
M clang/test/CodeGenCXX/microsoft-abi-unknown-arch.cpp
M clang/test/CodeGenCXX/microsoft-abi-vmemptr-conflicts.cpp
M clang/test/CodeGenCXX/ms-thread_local.cpp
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/CodeGenCXX/pass-by-value-noalias.cpp
M clang/test/CodeGenCXX/regcall.cpp
M clang/test/CodeGenCXX/regcall4.cpp
M clang/test/CodeGenCXX/stack-reuse-miscompile.cpp
M clang/test/CodeGenCXX/stack-reuse.cpp
M clang/test/CodeGenCXX/temporaries.cpp
M clang/test/CodeGenCXX/thiscall-struct-return.cpp
M clang/test/CodeGenCXX/thunk-returning-memptr.cpp
M clang/test/CodeGenCXX/trivial_abi.cpp
M clang/test/CodeGenCXX/unknown-anytype.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
M clang/test/CodeGenCXX/x86_32-arguments.cpp
M clang/test/CodeGenCXX/x86_64-arguments.cpp
M clang/test/CodeGenCoroutines/coro-await.cpp
M clang/test/CodeGenCoroutines/coro-gro2.cpp
M clang/test/CodeGenHLSL/sret_output.hlsl
M clang/test/CodeGenObjC/arc.m
M clang/test/CodeGenObjC/direct-method.m
M clang/test/CodeGenObjC/dllstorage.m
A clang/test/CodeGenObjC/exceptions-personality.m
M clang/test/CodeGenObjC/nontrivial-c-struct-exception.m
M clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m
M clang/test/CodeGenObjC/personality.m
M clang/test/CodeGenObjC/stret-1.m
M clang/test/CodeGenObjC/stret_lookup.m
M clang/test/CodeGenObjC/weak-in-c-struct.m
M clang/test/CodeGenObjC/x86_64-struct-return-gc.m
M clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm
M clang/test/CodeGenObjCXX/personality.mm
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
M clang/test/CodeGenOpenCLCXX/addrspace-of-this.clcpp
M clang/test/CoverageMapping/if.cpp
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtbegin.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtend.o
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A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtn.o
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A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crti.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtn.o
M clang/test/Driver/aarch64-fix-cortex-a53-835769.c
M clang/test/Driver/aarch64-security-options.c
A clang/test/Driver/android-version.cpp
M clang/test/Driver/cl-x86-flags.c
A clang/test/Driver/gcc-triple.cpp
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/linux-ld.c
M clang/test/Driver/matrix.c
M clang/test/Driver/mingw-sysroot.cpp
M clang/test/Driver/riscv-rvv-vector-bits.c
M clang/test/Format/clang-format-ignore.cpp
M clang/test/Frontend/verify.c
M clang/test/Frontend/x86-target-cpu.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
R clang/test/Modules/Inputs/AutolinkTBD.framework/AutolinkTBD.tbd
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R clang/test/Modules/autolinkTBD.m
A clang/test/Modules/autolink_private_module.m
A clang/test/Modules/explicit-specializations.cppm
M clang/test/Modules/templates.mm
M clang/test/OpenMP/irbuilder_for_iterator.cpp
M clang/test/OpenMP/irbuilder_for_rangefor.cpp
M clang/test/OpenMP/loop_bind_messages.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/PCH/pragma-loop.cpp
A clang/test/Parser/gh30908-scope-balance-on-invalid-var-direct-init-1.cpp
A clang/test/Parser/gh30908-scope-balance-on-invalid-var-direct-init-2.cpp
M clang/test/ParserOpenACC/parse-cache-construct.c
M clang/test/ParserOpenACC/parse-cache-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
A clang/test/Sema/attr-counted-by.c
A clang/test/Sema/attr-format-Float16.c
A clang/test/SemaCXX/attr-format-Float16.cpp
M clang/test/SemaCXX/conversion-function.cpp
M clang/test/SemaCXX/cxx1z-noexcept-function-type.cpp
M clang/test/SemaCXX/warn-range-loop-analysis-trivially-copyable.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
M clang/tools/clang-format/.clang-format
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-format/clang-format.el
M clang/tools/clang-rename/clang-rename.el
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-shlib/CMakeLists.txt
M clang/tools/driver/driver.cpp
M clang/tools/libclang/CMakeLists.txt
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/Format/.clang-format
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestMacroExpansion.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/www/c_dr_status.html
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M clang/www/make_cxx_dr_status
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/include/profile/InstrProfData.inc
M compiler-rt/lib/msan/msan.h
M compiler-rt/lib/msan/msan_allocator.cpp
M compiler-rt/lib/msan/msan_new_delete.cpp
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
M compiler-rt/lib/sanitizer_common/sanitizer_flags.inc
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_arg_retval.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_arg_retval.h
M compiler-rt/lib/scudo/standalone/condition_variable.h
M compiler-rt/test/hwasan/TestCases/Linux/aligned_alloc-alignment.cpp
M compiler-rt/test/hwasan/TestCases/Linux/pvalloc-overflow.cpp
M compiler-rt/test/hwasan/TestCases/Posix/posix_memalign-alignment.cpp
M compiler-rt/test/hwasan/TestCases/allocator_returns_null.cpp
M compiler-rt/test/hwasan/TestCases/halt-on-error.cpp
M compiler-rt/test/hwasan/TestCases/report-unmapped.cpp
M compiler-rt/test/hwasan/TestCases/use-after-free.c
M compiler-rt/test/sanitizer_common/TestCases/Linux/pthread_join.cpp
A compiler-rt/test/sanitizer_common/TestCases/Linux/pthread_join_invalid.cpp
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
M compiler-rt/test/sanitizer_common/TestCases/max_allocation_size.cpp
M flang/docs/FlangDriver.md
M flang/docs/GettingStarted.md
M flang/docs/Intrinsics.md
M flang/include/flang/Common/Fortran.h
M flang/include/flang/Frontend/LangOptions.def
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
A flang/include/flang/Optimizer/Builder/Runtime/Execute.h
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/format-specification.h
M flang/include/flang/Parser/parse-tree.h
A flang/include/flang/Runtime/execute.h
M flang/include/flang/Runtime/extensions.h
M flang/include/flang/Semantics/symbol.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/intrinsics-library.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/lib/Optimizer/Builder/Runtime/Execute.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/Transforms/AddDebugFoundation.cpp
M flang/lib/Parser/openacc-parsers.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/runtime/CMakeLists.txt
M flang/runtime/command.cpp
A flang/runtime/execute.cpp
M flang/runtime/extensions.cpp
M flang/runtime/tools.cpp
M flang/runtime/tools.h
M flang/test/Driver/compiler-options.f90
M flang/test/Driver/ctofortran.f90
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A flang/test/Driver/exec.f90
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A flang/test/HLFIR/all-elemental.fir
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A flang/test/HLFIR/count-elemental.fir
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M libcxx/test/std/ranges/range.adaptors/range.join/range.join.sentinel/ctor.other.pass.cpp
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M libcxx/test/std/ranges/range.adaptors/range.lazy.split/end.pass.cpp
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M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/minus.pass.cpp
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M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/apply.pass.cpp
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M libcxx/test/support/filesystem_test_helper.h
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A libcxxabi/test/catch_null_pointer_to_object_pr64953.pass.cpp
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M libunwind/test/unw_resume.pass.cpp
M libunwind/test/unwind_leaffunction.pass.cpp
M lld/Common/DriverDispatcher.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
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A lld/test/ELF/riscv64-reloc-got32-pcrel.s
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M lld/test/MinGW/driver.test
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M lld/tools/lld/lld.cpp
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M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/Utility/StreamString.h
M lldb/include/lldb/Utility/StructuredData.h
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/Trace/intel-pt/CommandObjectTraceStartIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.cpp
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.h
M lldb/source/Plugins/Trace/intel-pt/LibiptDecoder.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceCursorIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPTBundleLoader.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Utility/StreamString.cpp
M lldb/test/API/commands/expression/nested/TestNestedExpressions.py
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceLoad.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/TestDataFormatterLibcxxChrono.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/main.cpp
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M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/firmware-corefile/create-empty-corefile.cpp
A lldb/test/Shell/SymbolFile/DWARF/Inputs/dwo-static-data-member.cpp
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A lldb/tools/lldb-dap/.editorconfig
A lldb/tools/lldb-dap/.gitignore
A lldb/tools/lldb-dap/.prettierrc.json
A lldb/tools/lldb-dap/.vscode/launch.json
A lldb/tools/lldb-dap/.vscode/tasks.json
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M lldb/tools/lldb-dap/README.md
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A lldb/tools/lldb-dap/src-ts/types.ts
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M lldb/tools/lldb-test/lldb-test.cpp
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/cmake/modules/llvm-driver-template.cpp.in
M llvm/docs/CommandLine.rst
M llvm/docs/GettingInvolved.rst
A llvm/docs/InstrProfileFormat.rst
M llvm/docs/LangRef.rst
M llvm/docs/MyFirstTypoFix.rst
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M llvm/docs/SphinxQuickstartTemplate.rst
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M llvm/include/llvm/ADT/StringRef.h
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
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M llvm/include/llvm/BinaryFormat/ELFRelocs/RISCV.def
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M llvm/include/llvm/CodeGen/AssignmentTrackingAnalysis.h
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
A llvm/include/llvm/CodeGen/CodeGenPrepare.h
M llvm/include/llvm/CodeGen/GCMetadata.h
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M llvm/include/llvm/CodeGen/SelectionDAGISel.h
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M llvm/include/llvm/CodeGen/StackProtector.h
M llvm/include/llvm/CodeGen/SwitchLoweringUtils.h
A llvm/include/llvm/DWARFLinker/AddressesMap.h
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A llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
A llvm/include/llvm/DWARFLinker/DWARFFile.h
R llvm/include/llvm/DWARFLinker/DWARFLinker.h
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R llvm/include/llvm/DWARFLinker/DWARFLinkerCompileUnit.h
R llvm/include/llvm/DWARFLinker/DWARFLinkerDeclContext.h
R llvm/include/llvm/DWARFLinker/DWARFStreamer.h
A llvm/include/llvm/DWARFLinker/Parallel/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/StringPool.h
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R llvm/include/llvm/DWARFLinkerParallel/StringPool.h
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M llvm/include/llvm/IR/PatternMatch.h
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M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VFABIDemangling.cpp
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M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
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M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
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M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/BasicBlockPathCloning.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GCRootLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
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M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
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M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/SwitchLoweringUtils.cpp
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M llvm/lib/DWARFLinker/CMakeLists.txt
A llvm/lib/DWARFLinker/Classic/CMakeLists.txt
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A llvm/lib/DWARFLinker/Classic/DWARFLinkerDeclContext.cpp
A llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
R llvm/lib/DWARFLinker/DWARFLinker.cpp
R llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp
R llvm/lib/DWARFLinker/DWARFLinkerDeclContext.cpp
R llvm/lib/DWARFLinker/DWARFStreamer.cpp
A llvm/lib/DWARFLinker/Parallel/AcceleratorRecordsSaver.cpp
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A llvm/lib/DWARFLinker/Parallel/CMakeLists.txt
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A llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinker.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerGlobalData.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
A llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
A llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
A llvm/lib/DWARFLinker/Parallel/DependencyTracker.h
A llvm/lib/DWARFLinker/Parallel/IndexedValuesMap.h
A llvm/lib/DWARFLinker/Parallel/OutputSections.cpp
A llvm/lib/DWARFLinker/Parallel/OutputSections.h
A llvm/lib/DWARFLinker/Parallel/StringEntryToDwarfStringPoolEntryMap.h
A llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
A llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.h
A llvm/lib/DWARFLinker/Parallel/TypePool.h
A llvm/lib/DWARFLinker/Utils.cpp
R llvm/lib/DWARFLinkerParallel/AcceleratorRecordsSaver.cpp
R llvm/lib/DWARFLinkerParallel/AcceleratorRecordsSaver.h
R llvm/lib/DWARFLinkerParallel/ArrayList.h
R llvm/lib/DWARFLinkerParallel/CMakeLists.txt
R llvm/lib/DWARFLinkerParallel/DIEAttributeCloner.cpp
R llvm/lib/DWARFLinkerParallel/DIEAttributeCloner.h
R llvm/lib/DWARFLinkerParallel/DIEGenerator.h
R llvm/lib/DWARFLinkerParallel/DWARFEmitterImpl.cpp
R llvm/lib/DWARFLinkerParallel/DWARFEmitterImpl.h
R llvm/lib/DWARFLinkerParallel/DWARFFile.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinker.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerCompileUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerCompileUnit.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerGlobalData.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerImpl.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerImpl.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerTypeUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerTypeUnit.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerUnit.h
R llvm/lib/DWARFLinkerParallel/DebugLineSectionEmitter.h
R llvm/lib/DWARFLinkerParallel/DependencyTracker.cpp
R llvm/lib/DWARFLinkerParallel/DependencyTracker.h
R llvm/lib/DWARFLinkerParallel/IndexedValuesMap.h
R llvm/lib/DWARFLinkerParallel/OutputSections.cpp
R llvm/lib/DWARFLinkerParallel/OutputSections.h
R llvm/lib/DWARFLinkerParallel/StringEntryToDwarfStringPoolEntryMap.h
R llvm/lib/DWARFLinkerParallel/StringPool.cpp
R llvm/lib/DWARFLinkerParallel/SyntheticTypeNameBuilder.cpp
R llvm/lib/DWARFLinkerParallel/SyntheticTypeNameBuilder.h
R llvm/lib/DWARFLinkerParallel/TypePool.h
R llvm/lib/DWARFLinkerParallel/Utils.h
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/InterfaceStub/IFSHandler.cpp
M llvm/lib/InterfaceStub/IFSStub.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCSectionELF.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
A llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.cpp
A llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSDIRInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/EXPInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMLegalizerInfo.h
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/M68k/GISel/M68kLegalizerInfo.h
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86PfmCounters.td
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/TextAPI/InterfaceFile.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/LoopFlatten.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/CostModel/X86/cast.ll
M llvm/test/Analysis/StackSafetyAnalysis/memintrin.ll
A llvm/test/Bitcode/clone-local-types.ll
M llvm/test/Bitcode/upgrade-cu-locals.ll
M llvm/test/Bitcode/upgrade-cu-locals.ll.bc
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-ext-debugloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
A llvm/test/CodeGen/AArch64/GlobalISel/fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/invoke-region.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
A llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/localizer.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-extending-loads.mir
M llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
M llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll
M llvm/test/CodeGen/AArch64/convertphitype.ll
M llvm/test/CodeGen/AArch64/machine-combiner-copy.ll
A llvm/test/CodeGen/AArch64/note-gnu-property-gcs.ll
M llvm/test/CodeGen/AArch64/patchable-function-entry.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-armpl.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef-scalable.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-sleef.ll
M llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll
M llvm/test/CodeGen/AArch64/sve-vscale.ll
A llvm/test/CodeGen/AArch64/sve2-bcax.ll
M llvm/test/CodeGen/AArch64/sve2-min-max-clamp.ll
M llvm/test/CodeGen/AArch64/sve2-vscale-sinking.ll
A llvm/test/CodeGen/AArch64/sve2-xar.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-extq.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-sclamp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-st1-single.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uclamp.ll
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
M llvm/test/CodeGen/AArch64/vselect-ext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sqrt.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/hsa-globals.ll
A llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx11.mir
A llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx12.mir
R llvm/test/CodeGen/AMDGPU/lds-direct-hazards.mir
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs.mir
A llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
A llvm/test/CodeGen/ARC/atomic-oversize.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
A llvm/test/CodeGen/BPF/atomic-oversize.ll
M llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll
M llvm/test/CodeGen/Generic/addr-use-count.ll
M llvm/test/CodeGen/Generic/live-debug-label.ll
A llvm/test/CodeGen/Lanai/atomic-oversize.ll
A llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
M llvm/test/CodeGen/LoongArch/patchable-function-entry.ll
A llvm/test/CodeGen/MSP430/atomic-oversize.ll
M llvm/test/CodeGen/Mips/ehframe-indirect.ll
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A llvm/test/CodeGen/NVPTX/setmaxnreg.ll
A llvm/test/CodeGen/PowerPC/intrinsic-trap.ll
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A llvm/test/CodeGen/PowerPC/pr77748.ll
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M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
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M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
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M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
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A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-alu.ll
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A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-add.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-and.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-or.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-sub.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-xor.mir
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M llvm/test/CodeGen/RISCV/aext-to-sext.ll
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M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/atomic-load-store.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-sub.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/bf16-promote.ll
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M llvm/test/CodeGen/RISCV/bfloat-frem.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
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M llvm/test/CodeGen/RISCV/branch-on-zero.ll
M llvm/test/CodeGen/RISCV/byval.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
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M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll
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M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-sext-zext.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll
M llvm/test/CodeGen/RISCV/calls.ll
M llvm/test/CodeGen/RISCV/cm_mvas_mvsa.ll
A llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
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M llvm/test/CodeGen/RISCV/double-arith-strict.ll
M llvm/test/CodeGen/RISCV/double-arith.ll
M llvm/test/CodeGen/RISCV/double-br-fcmp.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert-strict.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/double-fcmp.ll
M llvm/test/CodeGen/RISCV/double-frem.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-previous-failure.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
M llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll
M llvm/test/CodeGen/RISCV/emutls.ll
M llvm/test/CodeGen/RISCV/exception-pointer-register.ll
M llvm/test/CodeGen/RISCV/fastcc-float.ll
M llvm/test/CodeGen/RISCV/fastcc-int.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/fli-licm.ll
M llvm/test/CodeGen/RISCV/float-arith-strict.ll
M llvm/test/CodeGen/RISCV/float-arith.ll
M llvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll
M llvm/test/CodeGen/RISCV/float-br-fcmp.ll
M llvm/test/CodeGen/RISCV/float-convert-strict.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/float-fcmp.ll
M llvm/test/CodeGen/RISCV/float-frem.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-mem.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/float-round-conv.ll
M llvm/test/CodeGen/RISCV/float-select-verify.ll
M llvm/test/CodeGen/RISCV/float-zfa.ll
M llvm/test/CodeGen/RISCV/fmax-fmin.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fp16-promote.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/frame-info.ll
M llvm/test/CodeGen/RISCV/frame.ll
M llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll
M llvm/test/CodeGen/RISCV/ghccc-rv32.ll
M llvm/test/CodeGen/RISCV/ghccc-rv64.ll
M llvm/test/CodeGen/RISCV/ghccc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-br-fcmp.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-frem.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-mem.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
M llvm/test/CodeGen/RISCV/interrupt-attr.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/libcall-tail-calls.ll
M llvm/test/CodeGen/RISCV/live-sp.mir
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/machine-outliner-and-machine-copy-propagation.ll
M llvm/test/CodeGen/RISCV/machine-outliner-throw.ll
M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
M llvm/test/CodeGen/RISCV/make-compressible.mir
M llvm/test/CodeGen/RISCV/mem.ll
M llvm/test/CodeGen/RISCV/mem64.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/mir-target-flags.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/nest-register.ll
M llvm/test/CodeGen/RISCV/nomerge.ll
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
A llvm/test/CodeGen/RISCV/option-relax-relocation.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/patchable-function-entry.ll
M llvm/test/CodeGen/RISCV/pr51206.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/reduce-unnecessary-extension.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/remat.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
M llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64-large-stack.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/div.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/mem64.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rem.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rv64i-complex-float.ll
M llvm/test/CodeGen/RISCV/rv64i-double-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr63596.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
M llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands-i1.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/strided-load-store.ll
A llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
M llvm/test/CodeGen/RISCV/select-and.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-or.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
M llvm/test/CodeGen/RISCV/shrinkwrap-jump-table.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/split-sp-adjust.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/stack-protector-target.ll
M llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/RISCV/stack-realignment.ll
M llvm/test/CodeGen/RISCV/stack-slot-size.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/tls-models.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
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M llvm/test/CodeGen/RISCV/vlenb.ll
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M llvm/test/CodeGen/RISCV/zcmp-with-float.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
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A llvm/test/CodeGen/SystemZ/shift-16.ll
M llvm/test/CodeGen/SystemZ/vec-perm-14.ll
A llvm/test/CodeGen/WebAssembly/signext-zeroext-callsite.ll
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A llvm/test/CodeGen/X86/apx/add.ll
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A llvm/test/CodeGen/X86/apx/dec.ll
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A llvm/test/CodeGen/X86/apx/imul.ll
A llvm/test/CodeGen/X86/apx/inc.ll
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A llvm/test/CodeGen/X86/apx/or.ll
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A llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
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A llvm/test/DebugInfo/Generic/lexical-block-retained-types.ll
A llvm/test/DebugInfo/Generic/lexical-block-types.ll
R llvm/test/DebugInfo/Generic/split-dwarf-local-import.ll
R llvm/test/DebugInfo/Generic/split-dwarf-local-import2.ll
R llvm/test/DebugInfo/Generic/split-dwarf-local-import3.ll
M llvm/test/DebugInfo/Generic/verifier-invalid-disubprogram.ll
M llvm/test/DebugInfo/SystemZ/eh_frame_personality.ll
M llvm/test/DebugInfo/SystemZ/eh_frame_personality.s
A llvm/test/DebugInfo/X86/local-type-as-template-parameter.ll
M llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
M llvm/test/DebugInfo/X86/set.ll
A llvm/test/DebugInfo/X86/split-dwarf-local-import.ll
A llvm/test/DebugInfo/X86/split-dwarf-local-import2.ll
A llvm/test/DebugInfo/X86/split-dwarf-local-import3.ll
M llvm/test/DebugInfo/X86/zextload.ll
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_basic.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_large_static_personality_encodings.s
M llvm/test/Instrumentation/InstrProfiling/platform.ll
M llvm/test/Instrumentation/InstrProfiling/profiling.ll
M llvm/test/MC/AArch64/SVE/pfalse-diagnostics.s
M llvm/test/MC/AArch64/SVE/predicate-as-counter-aliases.s
A llvm/test/MC/AArch64/elf-reloc-gotpcrel32.s
M llvm/test/MC/AMDGPU/gfx11_asm_err.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
A llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa-fake16.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage_alias.s
M llvm/test/MC/AMDGPU/gfx12_err.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
M llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt
M llvm/test/MC/ELF/alias-to-local.s
M llvm/test/MC/ELF/relocation.s
M llvm/test/MC/ELF/section-combine.s
M llvm/test/MC/ELF/section.s
A llvm/test/MC/LoongArch/Relocations/leb128.s
M llvm/test/MC/LoongArch/Relocations/relax-addsub.s
A llvm/test/MC/RISCV/align-non-executable.s
A llvm/test/MC/RISCV/elf-reloc-got32-pcrel.s
M llvm/test/MC/RISCV/function-call.s
M llvm/test/MC/RISCV/rv32zacas-invalid.s
M llvm/test/MC/RISCV/rv64zacas-invalid.s
M llvm/test/MC/RISCV/tail-call.s
M llvm/test/MC/X86/index-operations.s
M llvm/test/Other/codegenprepare-and-debug.ll
M llvm/test/Other/print-at-pass-number.ll
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
A llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/type-inference.td
M llvm/test/TableGen/GlobalISelEmitter.td
M llvm/test/TableGen/dag-isel-complexpattern.td
M llvm/test/TableGen/getsetop.td
A llvm/test/ThinLTO/X86/memprof-tailcall-nonunique.ll
A llvm/test/ThinLTO/X86/memprof-tailcall.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/sink-gather-scatter-addressing.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll
M llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll
M llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
M llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll
M llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
M llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll
M llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr72046.ll
M llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll
M llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll
M llvm/test/Transforms/CodeGenPrepare/X86/select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll
M llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll
M llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll
M llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
M llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
M llvm/test/Transforms/HotColdSplit/coldentrycount.ll
A llvm/test/Transforms/IndVarSimplify/preserve-nsw-during-expansion.ll
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-m-forms-no-active-lanes.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/bitreverse-known-bits.ll
M llvm/test/Transforms/InstCombine/bitreverse.ll
A llvm/test/Transforms/InstCombine/bitwiselogic-bitmanip.ll
M llvm/test/Transforms/InstCombine/bswap-fold.ll
A llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/select.ll
M llvm/test/Transforms/InstSimplify/select.ll
M llvm/test/Transforms/JumpThreading/ddt-crash.ll
M llvm/test/Transforms/JumpThreading/loop-phi.ll
M llvm/test/Transforms/JumpThreading/unreachable-loops.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll
A llvm/test/Transforms/LoopFlatten/loop-flatten-gep.ll
A llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
A llvm/test/Transforms/LoopIdiom/AArch64/lit.local.cfg
M llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
A llvm/test/Transforms/MemProfContextDisambiguation/tailcall-nonunique.ll
A llvm/test/Transforms/MemProfContextDisambiguation/tailcall.ll
M llvm/test/Transforms/PGOProfile/Inputs/multiple_hash_profile.proftext
M llvm/test/Transforms/PGOProfile/multiple_hash_profile.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll
M llvm/test/Transforms/SCCP/switch.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/vec15-base.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
A llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll
A llvm/test/Transforms/SLPVectorizer/X86/splat-buildvector.ll
M llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AArch64/scalable-vector-geps.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
A llvm/test/Transforms/SimpleLoopUnswitch/memssa-readnone-access.ll
M llvm/test/Transforms/SimplifyCFG/rangereduce.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
A llvm/test/Verifier/NVPTX/lit.local.cfg
A llvm/test/Verifier/NVPTX/setmaxnreg.ll
M llvm/test/tools/dsymutil/ARM/inline-source.test
M llvm/test/tools/llvm-debuginfo-analyzer/cmdline.test
A llvm/test/tools/llvm-ifs/ifs-read-invalid-symbol-type.test
M llvm/test/tools/llvm-readobj/ELF/reloc-types-loongarch64.test
M llvm/test/tools/llvm-symbolizer/frame.s
M llvm/tools/dsymutil/CMakeLists.txt
M llvm/tools/dsymutil/DwarfLinkerForBinary.cpp
M llvm/tools/dsymutil/DwarfLinkerForBinary.h
M llvm/tools/dsymutil/LinkUtils.h
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/llvm-ar/llvm-ar.cpp
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
M llvm/tools/llvm-driver/llvm-driver.cpp
M llvm/tools/llvm-dwarfutil/CMakeLists.txt
M llvm/tools/llvm-dwarfutil/DebugInfoLinker.cpp
M llvm/tools/llvm-dwp/llvm-dwp.cpp
M llvm/tools/llvm-exegesis/lib/SnippetRepetitor.cpp
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-libtool-darwin/llvm-libtool-darwin.cpp
M llvm/tools/llvm-lipo/llvm-lipo.cpp
M llvm/tools/llvm-ml/llvm-ml.cpp
M llvm/tools/llvm-mt/llvm-mt.cpp
M llvm/tools/llvm-nm/llvm-nm.cpp
M llvm/tools/llvm-objcopy/llvm-objcopy.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-rc/llvm-rc.cpp
M llvm/tools/llvm-readobj/llvm-readobj.cpp
M llvm/tools/llvm-shlib/CMakeLists.txt
M llvm/tools/llvm-size/llvm-size.cpp
M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
M llvm/tools/opt/opt.cpp
M llvm/tools/sancov/sancov.cpp
M llvm/unittests/ADT/StringRefTest.cpp
M llvm/unittests/Analysis/VectorFunctionABITest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
A llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
M llvm/unittests/DWARFLinkerParallel/StringPoolTest.cpp
M llvm/unittests/InterfaceStub/ELFYAMLTest.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/Support/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Utils/CloningTest.cpp
M llvm/utils/TableGen/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/ExegesisEmitter.cpp
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
M llvm/utils/emacs/tablegen-mode.el
M llvm/utils/git/github-automation.py
M llvm/utils/gn/build/sync_source_lists_from_cmake.py
M llvm/utils/gn/secondary/bolt/lib/Rewrite/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DWARFLinker/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/DWARFLinker/Classic/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/DWARFLinker/Parallel/BUILD.gn
R llvm/utils/gn/secondary/llvm/lib/DWARFLinkerParallel/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwarfutil/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn
A mlir/docs/Dialects/OpenACCDialect.md
M mlir/docs/PassManagement.md
M mlir/docs/Passes.md
A mlir/docs/Tutorials/transform/Ch4.md
M mlir/docs/Tutorials/transform/_index.md
M mlir/examples/toy/Ch6/toyc.cpp
M mlir/examples/toy/Ch7/toyc.cpp
M mlir/examples/transform/CMakeLists.txt
M mlir/examples/transform/Ch3/transform-opt/transform-opt.cpp
A mlir/examples/transform/Ch4/CMakeLists.txt
A mlir/examples/transform/Ch4/include/CMakeLists.txt
A mlir/examples/transform/Ch4/include/MyExtension.h
A mlir/examples/transform/Ch4/include/MyExtension.td
A mlir/examples/transform/Ch4/lib/CMakeLists.txt
A mlir/examples/transform/Ch4/lib/MyExtension.cpp
A mlir/examples/transform/Ch4/transform-opt/transform-opt.cpp
A mlir/include/mlir/Analysis/Presburger/Barvinok.h
M mlir/include/mlir/Analysis/Presburger/GeneratingFunction.h
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/include/mlir/Analysis/Presburger/Matrix.h
M mlir/include/mlir/Conversion/GPUToSPIRV/GPUToSPIRV.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Passes.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/BufferUtils.h
M mlir/include/mlir/Dialect/DLTI/DLTI.h
M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
A mlir/include/mlir/Dialect/LLVMIR/Transforms/DIExpressionLegalization.h
A mlir/include/mlir/Dialect/LLVMIR/Transforms/DIExpressionRewriter.h
M mlir/include/mlir/Dialect/LLVMIR/Transforms/Passes.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/Dialect/Mesh/Transforms/Simplifications.h
A mlir/include/mlir/Dialect/Mesh/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCooperativeMatrixOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/include/mlir/Dialect/Utils/IndexingUtils.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/ExecutionEngine/CRunnerUtils.h
M mlir/include/mlir/ExecutionEngine/Float16bits.h
M mlir/include/mlir/ExecutionEngine/RunnerUtils.h
M mlir/include/mlir/IR/Dominance.h
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/include/mlir/Transforms/GreedyPatternRewriteDriver.h
A mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/CMakeLists.txt
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Parser.h
M mlir/lib/AsmParser/ParserState.h
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRVPass.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithDialect.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferOptimizations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferUtils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferViewFlowAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/Dialect/Complex/IR/ComplexDialect.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/lib/Dialect/Index/IR/IndexDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMInlining.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/CMakeLists.txt
A mlir/lib/Dialect/LLVMIR/Transforms/DIExpressionLegalization.cpp
A mlir/lib/Dialect/LLVMIR/Transforms/DIExpressionRewriter.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/LegalizeForExport.cpp
M mlir/lib/Dialect/Math/IR/MathDialect.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefDialect.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
A mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SPIRV/IR/CastOps.cpp
M mlir/lib/Dialect/SPIRV/IR/CooperativeMatrixOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
M mlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/UB/IR/UBOps.cpp
M mlir/lib/Dialect/Utils/IndexingUtils.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/ExecutionEngine/CRunnerUtils.cpp
M mlir/lib/ExecutionEngine/Float16bits.cpp
M mlir/lib/ExecutionEngine/RunnerUtils.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Query/Matcher/Parser.cpp
M mlir/lib/Query/QueryParser.cpp
M mlir/lib/TableGen/Class.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.h
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Tools/lsp-server-support/SourceMgrUtils.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/GPUToSPIRV/wmma-ops-to-spirv-khr-coop-matrix.mlir
R mlir/test/Conversion/GPUToSPIRV/wmma-ops-to-spirv-nv-coop-matrix.mlir
M mlir/test/Conversion/MathToLibm/convert-to-libm.mlir
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Affine/constant-fold.mlir
M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
M mlir/test/Dialect/LLVMIR/call-location.mlir
M mlir/test/Dialect/LLVMIR/debuginfo.mlir
A mlir/test/Dialect/LLVMIR/di-expression-legalization.mlir
M mlir/test/Dialect/LLVMIR/global.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/invalid-call-location.mlir
M mlir/test/Dialect/LLVMIR/layout.mlir
M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
A mlir/test/Dialect/Linalg/transform-op-peel-and-vectorize.mlir
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/MemRef/ops.mlir
A mlir/test/Dialect/Mesh/folding.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
A mlir/test/Dialect/Mesh/process-multi-index-op-lowering.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
M mlir/test/Dialect/OpenMP/attr.mlir
M mlir/test/Dialect/SCF/loop-pipelining.mlir
M mlir/test/Dialect/SPIRV/IR/cast-ops.mlir
M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
M mlir/test/Dialect/SPIRV/IR/khr-cooperative-matrix-ops.mlir
M mlir/test/Dialect/SPIRV/IR/matrix-ops.mlir
R mlir/test/Dialect/SPIRV/IR/nv-cooperative-matrix-ops.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
M mlir/test/Dialect/Tensor/simplify-pack-unpack.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/Dialect/Transform/test-interpreter.mlir
M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
A mlir/test/Examples/transform/Ch4/features.mlir
A mlir/test/Examples/transform/Ch4/multiple.mlir
A mlir/test/Examples/transform/Ch4/sequence.mlir
A mlir/test/IR/print-skip-regions.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir
A mlir/test/Integration/Dialect/Memref/verify-memref.mlir
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_generate.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/arm-sme-invalid.mlir
M mlir/test/Target/LLVMIR/arm-sme.mlir
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/loop-metadata.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/Target/SPIRV/matrix.mlir
R mlir/test/Target/SPIRV/nv-cooperative-matrix-ops.mlir
M mlir/test/Transforms/canonicalize.mlir
M mlir/test/Transforms/inlining.mlir
M mlir/test/lib/Dialect/DLTI/TestDataLayoutQuery.cpp
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
A mlir/test/lib/Dialect/Mesh/TestProcessMultiIndexOpLowering.cpp
M mlir/test/lib/Dialect/Mesh/TestSimplifications.cpp
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterface.cpp
M mlir/test/lit.cfg.py
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
A mlir/unittests/Analysis/Presburger/BarvinokTest.cpp
M mlir/unittests/Analysis/Presburger/CMakeLists.txt
M mlir/unittests/Analysis/Presburger/GeneratingFunctionTest.cpp
M mlir/unittests/Analysis/Presburger/IntegerRelationTest.cpp
M mlir/unittests/Dialect/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
M mlir/unittests/Interfaces/DataLayoutInterfacesTest.cpp
M mlir/utils/emacs/mlir-lsp-client.el
M mlir/utils/emacs/mlir-mode.el
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
M openmp/libomptarget/DeviceRTL/include/Configuration.h
M openmp/libomptarget/DeviceRTL/include/State.h
M openmp/libomptarget/DeviceRTL/src/Configuration.cpp
M openmp/libomptarget/DeviceRTL/src/Kernel.cpp
M openmp/libomptarget/DeviceRTL/src/Parallelism.cpp
M openmp/libomptarget/DeviceRTL/src/Reduction.cpp
M openmp/libomptarget/DeviceRTL/src/Workshare.cpp
M openmp/libomptarget/cmake/Modules/LibomptargetGetDependencies.cmake
M openmp/libomptarget/include/DeviceImage.h
M openmp/libomptarget/include/OffloadEntry.h
M openmp/libomptarget/include/Shared/Profile.h
M openmp/libomptarget/include/device.h
M openmp/libomptarget/plugins-nextgen/CMakeLists.txt
M openmp/libomptarget/plugins-nextgen/amdgpu/CMakeLists.txt
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/common/include/GlobalHandler.h
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/JIT.cpp
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/plugins-nextgen/cuda/src/rtl.cpp
A openmp/libomptarget/plugins-nextgen/generic-elf-64bit/dynamic_ffi/ffi.cpp
A openmp/libomptarget/plugins-nextgen/generic-elf-64bit/dynamic_ffi/ffi.h
M openmp/libomptarget/plugins-nextgen/generic-elf-64bit/src/rtl.cpp
M openmp/libomptarget/src/DeviceImage.cpp
M openmp/libomptarget/src/OpenMP/Mapping.cpp
M openmp/libomptarget/src/OpenMP/OMPT/Callback.cpp
M openmp/libomptarget/src/PluginManager.cpp
M openmp/libomptarget/src/device.cpp
M openmp/libomptarget/src/interface.cpp
M openmp/libomptarget/src/omptarget.cpp
M openmp/libomptarget/test/libc/assert.c
M openmp/libomptarget/test/mapping/target_derefence_array_pointrs.cpp
M openmp/libomptarget/test/mapping/target_uses_allocator.c
M openmp/libomptarget/test/mapping/target_wrong_use_device_addr.c
M openmp/libomptarget/test/offloading/bug64959.c
A openmp/libomptarget/test/offloading/fortran/basic-target-parallel-region.f90
R openmp/libomptarget/test/offloading/fortran/failing/target_map_common_block1.f90
M openmp/libomptarget/test/offloading/fortran/target_map_common_block.f90
A openmp/libomptarget/test/offloading/fortran/target_map_common_block1.f90
M openmp/libomptarget/test/offloading/info.c
M openmp/libomptarget/test/offloading/std_complex_arithmetic.cpp
M openmp/libomptarget/test/unified_shared_memory/close_enter_exit.c
M openmp/libomptarget/test/unified_shared_memory/close_modifier.c
M openmp/libomptarget/test/unified_shared_memory/shared_update.c
M openmp/libomptarget/tools/kernelreplay/llvm-omp-kernel-replay.cpp
M openmp/runtime/CMakeLists.txt
M openmp/runtime/cmake/LibompGetArchitecture.cmake
M openmp/runtime/cmake/config-ix.cmake
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_config.h.cmake
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_global.cpp
M openmp/runtime/src/kmp_gsupport.cpp
M openmp/runtime/src/kmp_os.h
M openmp/runtime/src/kmp_platform.h
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_wrapper_getpid.h
M openmp/runtime/src/z_Linux_util.cpp
M openmp/runtime/test/lit.cfg
M polly/lib/Transform/ScheduleOptimizer.cpp
A polly/test/ScheduleOptimizer/schedule_computeout.ll
A utils/bazel/crash-f7dbdb2b330aad91f520099159e736e91bb9ddbf
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/1c33ee574ce2...d6f3382dba04
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