[all-commits] [llvm/llvm-project] c3e3aa: [AArch64][SVE2] Generate XAR (#77160)

[Usman Nadeem via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c3e3aa9c33f0cda5759340bfc61452548e459806
      https://github.com/llvm/llvm-project/commit/c3e3aa9c33f0cda5759340bfc61452548e459806
  Author: Usman Nadeem <mnadeem at quicinc.com>
  Date:   2024-01-11 (Thu, 11 Jan 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64Subtarget.h
    A llvm/test/CodeGen/AArch64/sve2-xar.ll

  Log Message:
  -----------
  [AArch64][SVE2] Generate XAR (#77160)

Bitwise exclusive OR and rotate right by immediate

Select xar (x, y, imm) for the following pattern:
    or (shl (xor x, y), nBits-imm), (shr (xor x, y), imm)

This is essentially:
    rotr (xor(x, y), imm)