[all-commits] [llvm/llvm-project] c664a5: [M68k][NFC] Clarify the displacement size in the c...
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Wed Jan 10 14:34:54 PST 2024
Branch: refs/heads/users/boomanaiden154/exegesis-validation-counters-tblgen
Home: https://github.com/llvm/llvm-project
Commit: c664a51d3439174e2973194fcabd973af658bf63
https://github.com/llvm/llvm-project/commit/c664a51d3439174e2973194fcabd973af658bf63
Author: Min-Yih Hsu <min at myhsu.dev>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M llvm/lib/Target/M68k/M68kInstrFormats.td
Log Message:
-----------
[M68k][NFC] Clarify the displacement size in the code comment
Specifically, 'f', 'g', 'q', 'k', and 'l' addressing modes.
NFC.
Commit: a384cd5012b857f2464fff21c39d032632af1515
https://github.com/llvm/llvm-project/commit/a384cd5012b857f2464fff21c39d032632af1515
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/test/CodeGen/X86/bfloat.ll
Log Message:
-----------
[X86][BF16] Add subvec_zero_lowering patterns (#76507)
Commit: b8e4053c062f168db9e3cf8ad34291027a41783d
https://github.com/llvm/llvm-project/commit/b8e4053c062f168db9e3cf8ad34291027a41783d
Author: Bharathi Ramana Joshi <joshibharathiramana at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M mlir/lib/Analysis/Presburger/PresburgerSpace.cpp
M mlir/unittests/Analysis/Presburger/PresburgerSpaceTest.cpp
Log Message:
-----------
[MLIR][Presburger] Fix bug in Identifier::isEqual assert (#76380)
Make identifiers::isEqual return false instead of failing assertion when
identifiers are not equal.
Commit: c7aa98558cf354ee76c664267727e41585a50a2f
https://github.com/llvm/llvm-project/commit/c7aa98558cf354ee76c664267727e41585a50a2f
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[GitHub] Add default reviewers for Presburger library (#76627)
Added @Groverkss and @Superty as default reviewers for Presburger lib
paths.
Commit: 568db84247b3b3bcbf4090b8229a098c7575414b
https://github.com/llvm/llvm-project/commit/568db84247b3b3bcbf4090b8229a098c7575414b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Log Message:
-----------
[InstCombine] Refactor `canonicalizeSPF` to support decomposed select. NFC.
See also https://github.com/llvm/llvm-project/pull/76621
Commit: 61999b18c407b9f5c07577e63057d41c65240e61
https://github.com/llvm/llvm-project/commit/61999b18c407b9f5c07577e63057d41c65240e61
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/test/Driver/driverkit-path.c
R clang/test/Preprocessor/cuda-macos-includes.cu
Log Message:
-----------
[clang][Darwin] Remove legacy framework search path logic in the frontend (#75841)
This removes a long standing piece of technical debt. Most other
platforms have moved all their header search path logic to the driver,
but Darwin still had some logic for setting framework search paths
present in the frontend. This patch moves that logic to the driver
alongside existing logic that already handles part of these search
paths.
This is intended to be a pure refactor without any functional change
visible to users, since the search paths before and after should be the
same, and in the same order. The change in the tests is necessary
because we would previously add the DriverKit framework search path in
the frontend regardless of whether we actually need to, which we now
handle correctly because the driver checks for ld64-605.1+.
Fixes #75638
Commit: b23f59a646d93c43602b010b997c0b7fc20eef5e
https://github.com/llvm/llvm-project/commit/b23f59a646d93c43602b010b997c0b7fc20eef5e
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-and-or.ll
M llvm/test/Transforms/InstCombine/select-factorize.ll
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
M llvm/test/Transforms/Reassociate/basictest.ll
Log Message:
-----------
[InstCombine] Fold `select (A &/| B), T, F` if `select B, T, F` is foldable (#76621)
This patch does the following folds:
```
(select A && B, T, F) -> (select A, (select B, T, F), F)
(select A || B, T, F) -> (select A, T, (select B, T, F))
```
if `(select B, T, F)` can be folded into a value or a canonicalized SPF.
Alive2: https://alive2.llvm.org/ce/z/4Bdrbu
The original motivation of this patch is to simplify the following
pattern:
```
%.sroa.speculated.i = tail call i64 @llvm.umax.i64(i64 %sub.ptr.div.i.i, i64 1)
%add.i = add i64 %.sroa.speculated.i, %sub.ptr.div.i.i
%cmp7.i = icmp ult i64 %add.i, %sub.ptr.div.i.i
%cmp9.i = icmp ugt i64 %add.i, 1152921504606846975
%or.cond.i = or i1 %cmp7.i, %cmp9.i
%cond.i = select i1 %or.cond.i, i64 1152921504606846975, i64 %add.i
->
%.sroa.speculated.i = tail call i64 @llvm.umax.i64(i64 %sub.ptr.div.i.i, i64 1)
%add.i = add i64 %.sroa.speculated.i, %sub.ptr.div.i.i
%cmp7.i = icmp ult i64 %add.i, %sub.ptr.div.i.i
%max = call i64 @llvm.umax.i64(i64 %add.i, 1152921504606846975)
%cond.i = select i1 %cmp7.i, i64 1152921504606846975, i64 %max
```
The later form has a better codegen for some backends. It is also more
analysis-friendly than the original one.
Godbolt: https://godbolt.org/z/eK6eb5jf1
Alive2: https://alive2.llvm.org/ce/z/VHlxL2
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=7c71d3996a72b9b024622f23bf556539b961c88c&to=638ce8666fadaca1ab2639a3c2bc52a4a8508f40&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|+0.02%|-0.00%|+0.02%|-0.03%|-0.00%|-0.05%|-0.00%|
It is an alternative to #76203 and #76363 because we can simplify
`select (icmp eq/ne a, b), a, b` into `b` or `a`.
Fixes #75784.
Fixes #76043.
Thank @XChy for providing additional tests.
Co-authored-by: XChy <xxs_chy at outlook.com>
Commit: bf312263bfee5d70a37a2269d62f08cf264ca415
https://github.com/llvm/llvm-project/commit/bf312263bfee5d70a37a2269d62f08cf264ca415
Author: Jie Fu <jiefu at tencent.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Log Message:
-----------
[InstCombine] Remove unused variables in InstCombineSelect.cpp (NFC)
llvm-project/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp:3810:14: error: unused variable 'LHS' [-Werror,-Wunused-variable]
3810 | Value *LHS, *RHS;
| ^~~
llvm-project/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp:3810:20: error: unused variable 'RHS' [-Werror,-Wunused-variable]
3810 | Value *LHS, *RHS;
|
Commit: c7c912cff945033918367c4a37121dfc09b9759e
https://github.com/llvm/llvm-project/commit/c7c912cff945033918367c4a37121dfc09b9759e
Author: Andrzej Warzynski <andrzej.warzynski at arm.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M flang/test/Driver/func-attr.f90
Log Message:
-----------
[flang][nfc] Add missing REQUIRES directive in a test
Failing bot:
* https://lab.llvm.org/buildbot/#/builders/21/builds/88731
Failing test was introduced in:
* https://github.com/llvm/llvm-project/pull/74598
Sending without a review as the fix is straightforward and I want to
prioritize fixing the broken bot and unblocking everyone who's been
affected.
Commit: 1228becf7df28c68579f2b9b390b74aa41149a0a
https://github.com/llvm/llvm-project/commit/1228becf7df28c68579f2b9b390b74aa41149a0a
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/arm-bf16-params-returns.c
M clang/test/CodeGen/arm-vector_type-params-returns.c
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenOpenCL/as_type.cl
M lld/test/COFF/savetemps.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos_mixed_lto.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos_no_rtti.ll
M lld/test/ELF/lto/devirt_vcall_vis_export_dynamic.ll
M lld/test/ELF/lto/devirt_vcall_vis_public.ll
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/CodeGen/BPF/loop-exit-cond.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-opaque.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect.ll
M llvm/test/DebugInfo/X86/array2.ll
M llvm/test/ThinLTO/X86/devirt.ll
M llvm/test/ThinLTO/X86/devirt2.ll
M llvm/test/ThinLTO/X86/devirt_check.ll
M llvm/test/ThinLTO/X86/devirt_promote.ll
M llvm/test/ThinLTO/X86/devirt_promote_legacy.ll
M llvm/test/ThinLTO/X86/devirt_pure_virtual_base.ll
M llvm/test/ThinLTO/X86/devirt_single_hybrid.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_hidden.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_public.ll
M llvm/test/ThinLTO/X86/funcimport.ll
M llvm/test/ThinLTO/X86/globals-import-const-fold.ll
M llvm/test/ThinLTO/X86/import-constant.ll
M llvm/test/ThinLTO/X86/index-const-prop-alias.ll
M llvm/test/ThinLTO/X86/index-const-prop.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
A llvm/test/Transforms/FunctionAttrs/noundef.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
M llvm/test/Transforms/Inline/devirtualize-3.ll
M llvm/test/Transforms/Inline/devirtualize-5.ll
M llvm/test/Transforms/Inline/launder.invariant.group.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/X86/merge-functions.ll
M llvm/test/Transforms/PhaseOrdering/bitcast-store-branch.ll
M llvm/test/Transforms/PhaseOrdering/dce-after-argument-promotion-loads.ll
M llvm/test/Transforms/PhaseOrdering/early-arg-attrs-inference.ll
M llvm/test/Transforms/PhaseOrdering/gep-null-compare-in-loop.ll
M llvm/test/Transforms/SampleProfile/ctxsplit.ll
Log Message:
-----------
[FuncAttrs] Deduce `noundef` attributes for return values (#76553)
This patch deduces `noundef` attributes for return values.
IIUC, a function returns `noundef` values iff all of its return values
are guaranteed not to be `undef` or `poison`.
Definition of `noundef` from LangRef:
```
noundef
This attribute applies to parameters and return values. If the value representation contains any
undefined or poison bits, the behavior is undefined. Note that this does not refer to padding
introduced by the type’s storage representation.
```
Alive2: https://alive2.llvm.org/ce/z/g8Eis6
Compile-time impact: http://llvm-compile-time-tracker.com/compare.php?from=30dcc33c4ea3ab50397a7adbe85fe977d4a400bd&to=c5e8738d4bfbf1e97e3f455fded90b791f223d74&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|+0.01%|+0.01%|-0.01%|+0.01%|+0.03%|-0.04%|+0.01%|
The motivation of this patch is to reduce the number of `freeze` insts
and enable more optimizations.
Commit: b46638dc76d35681fbbddc2fd17ef4cde6b057e3
https://github.com/llvm/llvm-project/commit/b46638dc76d35681fbbddc2fd17ef4cde6b057e3
Author: Florian Hahn <flo at fhahn.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/SCCP/pr50901.ll
Log Message:
-----------
[Local] Handle undef FP constant in getExpressionForConstant.
Check for FP constant instead of checking for floating point types, as
Undef/Poison values can have floating point types while not being
FPConstants.
This fixes a crash introduced by #66745 (f3b20cb).
Commit: f248d5eed1ef49947c882c3c30d49ef061c12936
https://github.com/llvm/llvm-project/commit/f248d5eed1ef49947c882c3c30d49ef061c12936
Author: Florian Hahn <flo at fhahn.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[Local] Bring back check for FP types in getExpressionForConstant.
The check makes sure that the result for getZExtValue is guaranteed to
fit into 64 bit.
Commit: c313d0d03bb420efbfc18e194664584875640d2c
https://github.com/llvm/llvm-project/commit/c313d0d03bb420efbfc18e194664584875640d2c
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
Log Message:
-----------
[NFC][libc++] Fixes a compiler warning.
Commit: 949ec83eaf6fa6dbffb94c2ea9c0a4d5efdbd239
https://github.com/llvm/llvm-project/commit/949ec83eaf6fa6dbffb94c2ea9c0a4d5efdbd239
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/getelementptr.ll
Log Message:
-----------
[InstCombine] Relax the same-underlying-object constraint for the GEP canonicalization (#76583)
https://github.com/llvm/llvm-project/commit/7d7001b2cbd05bb1955c18e7f8668644bd1258dc
canonicalizes `(gep i8, X, (ptrtoint Y) - (ptrtoint X))` into `bitcast
Y` iff `X` and `Y` have the same underlying object.
I find that the result of this pattern is usually used as an operand of
an icmp in some real-world applications. I think we can do the
canonicalization if the result is only used by icmps/ptrtoints.
Alive2: https://alive2.llvm.org/ce/z/j4-HJZ
Commit: 90c397fc56b7a04dd53cdad8103de1ead9686104
https://github.com/llvm/llvm-project/commit/90c397fc56b7a04dd53cdad8103de1ead9686104
Author: David Green <david.green at arm.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/test/CodeGen/AArch64/fcmp.ll
A llvm/test/CodeGen/AArch64/icmp.ll
Log Message:
-----------
[AArch64] Add icmp and fcmp tests for GlobalISel. NFC
Commit: 0871c4beb826feba2d2aaf2c3efbe1fdeba7624a
https://github.com/llvm/llvm-project/commit/0871c4beb826feba2d2aaf2c3efbe1fdeba7624a
Author: Brad Smith <brad at comstyle.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Solaris.cpp
Log Message:
-----------
[Driver][Solaris] Remove reachable llvm_unreachable (#76645)
Remove the llvm_unreachable from getSolarisLibSuffix(). The code path is
reachable. In the case of an unsupported architecture we're not worrying
about trying to actually find the library paths, and I don't think it
makes sense for the Driver to crash.
Fixes #58334
Commit: 703e83611cd8bb7174ae76ba2e301f5a5e88b905
https://github.com/llvm/llvm-project/commit/703e83611cd8bb7174ae76ba2e301f5a5e88b905
Author: yonillasky <yonillasky at users.noreply.github.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVM] Add llvm.intr.coro.promise (#76640)
Added to allow generating these intrinsics in out-of-tree MLIR passes.
Co-authored-by: Yoni Lavi <yoni.lavi at nextsilicon.com>
Commit: 463dad107f4cb60ae1d49138143d6797599fb1fb
https://github.com/llvm/llvm-project/commit/463dad107f4cb60ae1d49138143d6797599fb1fb
Author: DianQK <dianqk at dianqk.net>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
Log Message:
-----------
[SimplifyCFG] Regenerate test checks (NFC)
Use `UTC_ARGS: --version 4`.
Commit: e99752d8065477b7a471cace580f8e818eda7fb1
https://github.com/llvm/llvm-project/commit/e99752d8065477b7a471cace580f8e818eda7fb1
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/test/MC/RISCV/fixups-expr.s
Log Message:
-----------
[MC,test] Improve RISCV/fixups-expr.s
Commit: 459270934bc84e083b34830473d10cd5bb2534b8
https://github.com/llvm/llvm-project/commit/459270934bc84e083b34830473d10cd5bb2534b8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bf16.ll
Log Message:
-----------
AMDGPU: Add more select bf16 vector tests
Commit: 25cd249355b0f3192ca5b0c69514ad68a1cb8897
https://github.com/llvm/llvm-project/commit/25cd249355b0f3192ca5b0c69514ad68a1cb8897
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
Log Message:
-----------
AMDGPU: Don't assert on select of v32i16/v32f16
Commit: 4b2f1184fcb1df8f86a5d6d364656168bb77ec0a
https://github.com/llvm/llvm-project/commit/4b2f1184fcb1df8f86a5d6d364656168bb77ec0a
Author: hstk30-hw <hanwei62 at huawei.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/call-cast-attrs.ll
M llvm/test/Transforms/LowerTypeTests/cfi-unwind-direct-call.ll
Log Message:
-----------
Skip tranformConstExprCastCall for naked function (#76496)
Fix this issue https://github.com/llvm/llvm-project/issues/72843 .
For naked function, assembly might be using an argument, or otherwise
rely on the frame layout, so don't transformConstExprCastCall
Commit: d4a6995e9438c72b4bb2054ca8ae7e0016f97682
https://github.com/llvm/llvm-project/commit/d4a6995e9438c72b4bb2054ca8ae7e0016f97682
Author: David Green <david.green at arm.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/icmp.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/sext.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalize large G_SEXT_INREG
These come from the legalization of other operations, but it makes sense to
split the operations into legal sizes before lowering them.
Commit: f33245a5c4411ce586efe2e12fc29aabb241f5e1
https://github.com/llvm/llvm-project/commit/f33245a5c4411ce586efe2e12fc29aabb241f5e1
Author: David Green <david.green at arm.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
Log Message:
-----------
[AArch64] Fix a always true condition warning. NFC
As ImmVal is unsigned, it will always be >= 0
Commit: 6b65d79fbb4682468333cea42b62f15c2dffd8f3
https://github.com/llvm/llvm-project/commit/6b65d79fbb4682468333cea42b62f15c2dffd8f3
Author: Spenser Bauman <sbauman at mathworks.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/EliminateEmptyTensors.cpp
M mlir/test/Dialect/Linalg/one-shot-bufferize-empty-tensor-elimination.mlir
Log Message:
-----------
[mlir][linalg] Fix for invalid IR in eliminate_empty_tensors (#73513)
The transform.structured.eliminate_empty_tensors can produce mis-typed
IR when traversing use-def chains past tensor reshaping operations for
sharing candidates. This results in Linalg operations whose output types
do not match their 'outs' arguments.
This patch filters out candidate tensor.empty operations when their
types do not match the candidate input operand.
Commit: c92d3ce6fd0f6a48ebcaa206c371a26240d0a6a3
https://github.com/llvm/llvm-project/commit/c92d3ce6fd0f6a48ebcaa206c371a26240d0a6a3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M libcxx/include/__memory/unique_ptr.h
Log Message:
-----------
[libc++][NFC] Remove unused __nat from unique_ptr
Commit: 18f219c5ac8369ec3e46c4accbb19ca51dc8bc67
https://github.com/llvm/llvm-project/commit/18f219c5ac8369ec3e46c4accbb19ca51dc8bc67
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/BugReporter/CommonBugCategories.h
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BoolAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CXXDeleteChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CastSizeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckObjCDealloc.cpp
M clang/lib/StaticAnalyzer/Checkers/ChrootChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CloneChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ConversionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugContainerModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugIteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/DivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/EnumCastOutOfRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/FixedAddressChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/InvalidatedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/IteratorRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIBugReporter.cpp
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIBugReporter.h
M clang/lib/StaticAnalyzer/Checkers/MacOSKeychainAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MismatchedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MmapWriteExecChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NSAutoreleasePoolChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NonNullParamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCAtSyncChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCContainersChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSelfInitChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSuperDeallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerArithChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnPointerRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnUndefChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/SimpleStreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TaintTesterChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TestAfterDivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefBranchChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefCapturedBlockVarChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefResultChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedArraySubscriptChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VforkChecker.cpp
M clang/lib/StaticAnalyzer/Core/CommonBugCategories.cpp
M clang/unittests/StaticAnalyzer/CallEventTest.cpp
M clang/unittests/StaticAnalyzer/NoStateChangeFuncVisitorTest.cpp
M clang/unittests/StaticAnalyzer/RegisterCustomCheckersTest.cpp
Log Message:
-----------
[analyzer][NFC] Cleanup BugType lazy-init patterns (#76655)
Cleanup most of the lazy-init `BugType` legacy.
Some will be preserved, as those are slightly more complicated to
refactor.
Notice, that the default category for `BugType` is `LogicError`. I
omitted setting this explicitly where I could.
Please, actually have a look at the diff. I did this manually, and we
rarely check the bug type descriptions and stuff in tests, so the
testing might be shallow on this one.
Commit: 945c2e6d92337fe4682227fb7c6ee165fd0d9384
https://github.com/llvm/llvm-project/commit/945c2e6d92337fe4682227fb7c6ee165fd0d9384
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[Orc] Fix process-symbols setup in LLJITBuilder for out-of-process case (#76244)
For out-of-process support the DynamicLibrarySearchGenerator must go
through EPC, otherwise we lookup symbols from the host and not the
target process.
Commit: ff804146208bacb7dbb73e2b1da7943cb60125d2
https://github.com/llvm/llvm-project/commit/ff804146208bacb7dbb73e2b1da7943cb60125d2
Author: Bharathi Ramana Joshi <joshibharathiramana at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/PresburgerSpace.h
M mlir/lib/Analysis/Presburger/PresburgerSpace.cpp
M mlir/unittests/Analysis/Presburger/PresburgerSpaceTest.cpp
Log Message:
-----------
[MLIR][Presburger] Implement PresburgerSpace::mergeAndAlignSymbols (#76397)
Commit: f18536d6421eb43779e43260a35ac39109a8a021
https://github.com/llvm/llvm-project/commit/f18536d6421eb43779e43260a35ac39109a8a021
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reduction-known-first-value.ll
Log Message:
-----------
[VPlan] Model address separately. (#72164)
Move vector pointer generation to a separate VPVectorPointerRecipe.
This untangles address computation from the memory recipes future
and is also needed to enable explicit unrolling in VPlan.
https://github.com/llvm/llvm-project/pull/72164
Commit: 992661922a39e16d068f7aac940da4919bde9b92
https://github.com/llvm/llvm-project/commit/992661922a39e16d068f7aac940da4919bde9b92
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M mlir/include/mlir/IR/Value.h
Log Message:
-----------
[mlir] Make TypedValue::getType() const (#76568)
The TypedValue::getType() essentially forwards the return value of
Value::getType() which is a const method. Somehow, at TypedValue level
the method's constness is lost, so restore it.
Originally done by: Nikita Kudriavtsev <nikita.kudriavtsev at intel.com>
Commit: 7619050cd7c3715f34c1d13ea048c092299037bb
https://github.com/llvm/llvm-project/commit/7619050cd7c3715f34c1d13ea048c092299037bb
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/IteratorRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MismatchedIteratorChecker.cpp
Log Message:
-----------
[analyzer][NFC] Take StringRef by value
Commit: 8ee3dfd74653e30f48dd9f49ba24f43547e6a549
https://github.com/llvm/llvm-project/commit/8ee3dfd74653e30f48dd9f49ba24f43547e6a549
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/Checker.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/StaticAnalyzer/Checkers/CallAndMessageChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/InvalidatedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.h
M clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/IteratorRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MismatchedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TaggedUnionModeling.h
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObject.h
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
Log Message:
-----------
[analyzer][NFC] Take SVal and NonLoc by value
Commit: 3c99d25d059fc952a548a342b305a659f1f431d4
https://github.com/llvm/llvm-project/commit/3c99d25d059fc952a548a342b305a659f1f431d4
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Fix clang-format build
Post #76327 the build rule required the header in lib as source too.
Tried to just do minimal change specific to build.
Commit: 7e405eb722e40c79b7726201d0f76b5dab34ba0f
https://github.com/llvm/llvm-project/commit/7e405eb722e40c79b7726201d0f76b5dab34ba0f
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/noundef.ll
Log Message:
-----------
[FuncAttrs] Don't infer `noundef` for functions with `sanitize_memory` attribute (#76691)
MemorySanitizer assumes that the definition and declaration of a
function will be consistent. If we add `noundef` for some definitions,
it will break msan.
Fix buildbot failure caused by #76553.
Commit: 7a3b0cbb143d02b70b2bfae5cd40e9867c124748
https://github.com/llvm/llvm-project/commit/7a3b0cbb143d02b70b2bfae5cd40e9867c124748
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
Update CODEOWNERS
Commit: d8db2733c87ef2ee54c322cbee76711147a94948
https://github.com/llvm/llvm-project/commit/d8db2733c87ef2ee54c322cbee76711147a94948
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrSSE.td
A llvm/test/MC/Disassembler/X86/apx/crc32.txt
A llvm/test/MC/X86/apx/crc32-att.s
A llvm/test/MC/X86/apx/crc32-intel.s
M llvm/test/MC/X86/x86_64-asm-match.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][MC] Support Enc/Dec for EGPR for promoted CRC32 (#76434)
R16-R31 was added into GPRs in
https://github.com/llvm/llvm-project/pull/70958,
This patch supports the encoding/decoding for promoted CRC32 instruction
in EVEX space.
RFC:
https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
Commit: 0e01c72c5645259d9a08a1a7ed39cb5cc41ce311
https://github.com/llvm/llvm-project/commit/0e01c72c5645259d9a08a1a7ed39cb5cc41ce311
Author: yjijd <licongtian at loongson.cn>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/lib/CodeGen/Targets/LoongArch.cpp
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin.c
M clang/test/CodeGen/LoongArch/lsx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lsx/builtin.c
Log Message:
-----------
[Clang][LoongArch] Do not pass vector arguments via vector registers (#74990)
psABI v2.30 clarifies that vector arguments are passed according to the
base ABI by default.
Commit: 9e1ad3cff6a855fdfdc1d91323e2021726da04ea
https://github.com/llvm/llvm-project/commit/9e1ad3cff6a855fdfdc1d91323e2021726da04ea
Author: Jim Lin <jim at andestech.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/compress-inline-asm.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/div_minsize.ll
M llvm/test/CodeGen/RISCV/double-select-icmp.ll
M llvm/test/CodeGen/RISCV/float-imm.ll
M llvm/test/CodeGen/RISCV/float-select-verify.ll
M llvm/test/CodeGen/RISCV/fmax-fmin.ll
M llvm/test/CodeGen/RISCV/half-select-icmp.ll
M llvm/test/CodeGen/RISCV/init-array.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/reduction-formation.ll
M llvm/test/CodeGen/RISCV/rv32xtheadba.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbs.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
M llvm/test/CodeGen/RISCV/rv64i-double-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbs.ll
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vector-insert-elt.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xvv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xvw.ll
M llvm/test/CodeGen/RISCV/rvv/fptoui-sat.ll
M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vaesdf.ll
M llvm/test/CodeGen/RISCV/rvv/vaesdm.ll
M llvm/test/CodeGen/RISCV/rvv/vaesef.ll
M llvm/test/CodeGen/RISCV/rvv/vaesem.ll
M llvm/test/CodeGen/RISCV/rvv/vaesz.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsm4r.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
M llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-x.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xv.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvv.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvw.ll
M llvm/test/CodeGen/RISCV/saverestore-scs.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/switch-width.ll
M llvm/test/CodeGen/RISCV/unroll-loop-cse.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
Log Message:
-----------
[RISCV] Remove blank lines at the end of testcases. NFC.
Commit: 120b0bfbf0bade430fa9b19d78025ccd1d6148d0
https://github.com/llvm/llvm-project/commit/120b0bfbf0bade430fa9b19d78025ccd1d6148d0
Author: Hui <hui.xie0621 at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/include/__config
M libcxx/include/__ranges/chunk_by_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/movable_box.h
M libcxx/include/__ranges/repeat_view.h
M libcxx/include/__ranges/single_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/transform_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.chunk.by/no_unique_address.compile.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.move.wrap/empty_object.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.move.wrap/no_unique_address.pass.cpp
A libcxx/test/libcxx/ranges/range.factories/range.repeat.view/no_unique_address.compile.pass.cpp
A libcxx/test/libcxx/ranges/range.factories/range.single.view/no_unique_address.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/ctor.range.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.transform/general.pass.cpp
A libcxx/test/std/ranges/ranges_robust_against_no_unique_address.pass.cpp
Log Message:
-----------
[libc++][ranges][abi-break] Fix `movable_box` overwriting memory of data that lives in the tail padding (#71314)
fixes #70506
The detailed problem description is in #70506
The original proposed fix was to remove `[[no_unique_address]]` except
when `_Tp` is empty.
Edit:
After the discussion in the comments below, the new fix here is to
remove the `[[no_unique_address]]` from `movable_box` in the cases where
we need to add our own assignment operator, which has contains the
problematic `construct_at`
Commit: b51f8f13edf3f7ab6407d2b7b46285ea675730b6
https://github.com/llvm/llvm-project/commit/b51f8f13edf3f7ab6407d2b7b46285ea675730b6
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libcxx/test/std/numerics/rand/rand.dist/rand.dist.uni/rand.dist.uni.int/eval.pass.cpp
Log Message:
-----------
[libc++][test] Removes Clang < 14 support. (#76658)
Commit: 4c2ad82b9dff537f7c8f0a2abb0d5dc7e6435741
https://github.com/llvm/llvm-project/commit/4c2ad82b9dff537f7c8f0a2abb0d5dc7e6435741
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
Log Message:
-----------
[AMDGPU] Do not preserve UniformityInfo (#76696)
UniformityInfo has a transitive dependence on CycleInfo. A transform may
change the CFG in trivial ways that do not affect uniformity, but that
can leave cycles in a slightly inconsistent state. In the absence of
updates to CycleInfo, it's cleaner to just invalidate both analyses.
Commit: 5c458ed490a01dcc82f9d063732cac4207786fd5
https://github.com/llvm/llvm-project/commit/5c458ed490a01dcc82f9d063732cac4207786fd5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/tools/gold/X86/devirt_vcall_vis_export_dynamic.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll
M llvm/test/tools/gold/X86/opt-level.ll
M llvm/test/tools/gold/X86/v1.16/devirt_vcall_vis_export_dynamic.ll
Log Message:
-----------
[gold] Fix tests after #76553 (NFC)
Commit: 75be7bb3fc6d28a7a97a0ca5c3231066b11bceba
https://github.com/llvm/llvm-project/commit/75be7bb3fc6d28a7a97a0ca5c3231066b11bceba
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
A openmp/libomptarget/test/offloading/fortran/target_update.f90
Log Message:
-----------
[flang][OpenMP][Offloading][AMDGPU] Add test for `target update` (#76355)
Adds a new test for offloading `target update` directive to AMD GPUs.
Commit: b238a0d989bd8047d9b9ce48ad401c13d981e187
https://github.com/llvm/llvm-project/commit/b238a0d989bd8047d9b9ce48ad401c13d981e187
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/lib/Analysis/Presburger/QuasiPolynomial.cpp
Log Message:
-----------
[mlir] Apply ClangTidy findings.
- Remove redundant return
- Use .empty() instead of size() == 0.
Commit: baf8a39aaf8b61a38b5b2b5591deb765e42eb00b
https://github.com/llvm/llvm-project/commit/baf8a39aaf8b61a38b5b2b5591deb765e42eb00b
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[mlir] Apply ClangTidy fix.
Prefer to use .empty() instead of checking size().
Commit: d714be978cf48bc85cb7eacf57c3548c0606a5e4
https://github.com/llvm/llvm-project/commit/d714be978cf48bc85cb7eacf57c3548c0606a5e4
Author: David Green <david.green at arm.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
Log Message:
-----------
[AArch64] Check for exact size when finding 1's for CMLE. (#76452)
This is a fix for the second half of #75822, where smaller constants can
also be bitcast to larger types. We should be checking the size is what
we expect it to be when matching ones.
Commit: 5055eeea5205d938320590236eeb782c92e40911
https://github.com/llvm/llvm-project/commit/5055eeea5205d938320590236eeb782c92e40911
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[Clang][AArch64] Add missing SME functions to header file. (#75791)
This includes:
* __arm_in_streaming_mode()
* __arm_has_sme()
* __arm_za_disable()
* __svundef_za()
Commit: 734ee0e01feeadd75bdbed35acc08f242623a212
https://github.com/llvm/llvm-project/commit/734ee0e01feeadd75bdbed35acc08f242623a212
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/cond-using-block-value.ll
Log Message:
-----------
[LVI] Support using block values when handling conditions (#75311)
Currently, LVI will only use conditions like "X < C" to constrain the
value of X on the relevant edge. This patch extends it to handle
conditions like "X < Y" by querying the known range of Y.
This means that getValueFromCondition() and various related APIs can now
return nullopt to indicate that they have pushed to the worklist, and
need to be called again later. This behavior is currently controlled by
a UseBlockValue option, and only enabled for actual edge value handling.
All other places deriving constraints from conditions keep using the
previous logic for now.
This change was originally motivated as a fix for the regression
reported in
https://github.com/llvm/llvm-project/pull/73662#issuecomment-1849281758.
Unfortunately, it doesn't actually fix it, because we run into another
issue there (LVI currently is really bad at handling values used in
loops).
This change has some compile-time impact, but it's fairly small,
in the 0.05% range.
Commit: ac8b53fc9232733af4656028fa82fd44397559d0
https://github.com/llvm/llvm-project/commit/ac8b53fc9232733af4656028fa82fd44397559d0
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/ExecutionEngine/AsyncRuntime.cpp
M mlir/lib/ExecutionEngine/SparseTensorRuntime.cpp
Log Message:
-----------
[mlir] Apply ClangTidy performance fix
- Use '\n' instead of std::endl;
https://clang.llvm.org/extra/clang-tidy/checks/performance/avoid-endl.html
Commit: aa6bb1697f2ef0881ae11cd5351d980fc98a4a14
https://github.com/llvm/llvm-project/commit/aa6bb1697f2ef0881ae11cd5351d980fc98a4a14
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
Log Message:
-----------
[CVP] Add test for #76705 (NFC)
Commit: d5db2cdb22ab302acbb6e1a066e791f25dc612de
https://github.com/llvm/llvm-project/commit/d5db2cdb22ab302acbb6e1a066e791f25dc612de
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
Log Message:
-----------
[LVI] Don't push both binop operands at once
If one of the binop operands depends on the other, this may end
up evaluating them in the wrong order, producing sub-optimal
results.
Make sure that only one unevaluated operand gets pushed per
iteration.
Fixes https://github.com/llvm/llvm-project/issues/76705.
Commit: a3e8e86fb6ad27fe070bb2c0f54a1c697c665f13
https://github.com/llvm/llvm-project/commit/a3e8e86fb6ad27fe070bb2c0f54a1c697c665f13
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
Log Message:
-----------
[LVI] Don't push both sides of and/or at once
Same as the change in d5db2cdb22ab302acbb6e1a066e791f25dc612de,
but for condition handling. The same issue could occur here as well.
Commit: 21a0335110a330846f738be37aeccb8685082faf
https://github.com/llvm/llvm-project/commit/21a0335110a330846f738be37aeccb8685082faf
Author: OCHyams <orlando.hyams at sony.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/DebugInfo/X86/sret.ll
Log Message:
-----------
[NFC][RemoveDIs] Fix typo in disabled test run line
The disabled line should be checking FastISel but was incorrectly checking
SelectionDAG due to a copy-paste error in #73496.
Commit: 9b7cf5bfb08b6e506216ef354dfd61adb15acbff
https://github.com/llvm/llvm-project/commit/9b7cf5bfb08b6e506216ef354dfd61adb15acbff
Author: David Green <david.green at arm.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/test/Transforms/simplifyintrinsics.fir
Log Message:
-----------
[Flang] Allow Intrinsic simpification with min/maxloc dim and scalar result (#76194)
This makes an adjustment to the existing fir minloc/maxloc generation
code to handle functions with a dim=1 that produce a scalar result. This
should allow us to get the same benefits as the existing generated
minmax reductions.
This is a recommit of #75820 with the typename added to the generated
function.
Commit: 2eb0ac0b3e3c74875e9b376239a27b8eb389189c
https://github.com/llvm/llvm-project/commit/2eb0ac0b3e3c74875e9b376239a27b8eb389189c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/Analysis/CostModel/X86/bswap-codesize.ll
M llvm/test/Analysis/CostModel/X86/bswap-latency.ll
M llvm/test/Analysis/CostModel/X86/bswap-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/bswap.ll
Log Message:
-----------
[CostModel][X86] Add explicit Silvermont test coverage for bswap costs
Test coverage for #62659 - we need to split SLM costs from other SSSE3 targets
Commit: c1764a7842aca1642dfc9942612059bdab440e51
https://github.com/llvm/llvm-project/commit/c1764a7842aca1642dfc9942612059bdab440e51
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Add bf16 vectors to register class definitions (#76214)
Assorted intrinsics are currently using i16 in place of a proper
bfloat type, but they should really switch to bfloat.
Note this only changes the type lists in tablegen, these are still
not registered to be truly treated as a legal type yet.
Depends #76213
Commit: 5842dfe34d89d9cc664d14f511ecb415d6609237
https://github.com/llvm/llvm-project/commit/5842dfe34d89d9cc664d14f511ecb415d6609237
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/bswap-latency.ll
M llvm/test/Analysis/CostModel/X86/bswap.ll
Log Message:
-----------
[CostModel][X86] Update SSSE3/AVX1 BSWAP costs
Drop atom/slm costs from the default bswap costs, and update the avx1 latency costs based off latest codegen.
Based off analysis report from https://github.com/RKSimon/llvm-scripts/check_cost_tables.py
Fixes #62659
Commit: cf025c767ebc4c505e21d268d65f3a1b1cbc25ce
https://github.com/llvm/llvm-project/commit/cf025c767ebc4c505e21d268d65f3a1b1cbc25ce
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] GFX12 global_atomic_ordered_add_b64 instruction and intrinsic (#76149)
Commit: 80aeb622117f6411e65bff42be5231720e8b8cef
https://github.com/llvm/llvm-project/commit/80aeb622117f6411e65bff42be5231720e8b8cef
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
Log Message:
-----------
[llvm][NFC] Use SDValue::getConstantOperandVal(i) where possible (#76708)
This helper function shortens examples like
`cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();` to
`Node->getConstantOperandVal(1);`.
Implemented with:
`git grep -l
"cast<ConstantSDNode>\(.*->getOperand\(.*\)\)->getZExtValue\(\)" | xargs
sed -E -i
's/cast<ConstantSDNode>\((.*)->getOperand\((.*)\)\)->getZExtValue\(\)/\1->getConstantOperandVal(\2)/`
and `git grep -l
"cast<ConstantSDNode>\(.*\.getOperand\(.*\)\)->getZExtValue\(\)" | xargs
sed -E -i
's/cast<ConstantSDNode>\((.*)\.getOperand\((.*)\)\)->getZExtValue\(\)/\1.getConstantOperandVal(\2)/'`.
With a couple of simple manual fixes needed. Result then processed by
`git clang-format`.
Commit: 687c51a3972af17b3f225e692e79fd898a1b6f95
https://github.com/llvm/llvm-project/commit/687c51a3972af17b3f225e692e79fd898a1b6f95
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
Log Message:
-----------
[clang][Interp][NFC] Remove unused using alias
Commit: c01e844a7ea7cce4d9477b04d2c9ccaff3606f04
https://github.com/llvm/llvm-project/commit/c01e844a7ea7cce4d9477b04d2c9ccaff3606f04
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
A llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx12.s
Log Message:
-----------
[AMDGPU] Update compute program resource registers for GFX12 (#75911)
Co-authored-by: Konstantin Zhuravlyov <kzhuravl at amd.com>
Commit: 534034737a652a7f59ede2ac3553bff4ad97594f
https://github.com/llvm/llvm-project/commit/534034737a652a7f59ede2ac3553bff4ad97594f
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/func.mlir
A mlir/test/Target/LLVMIR/Import/calling-convention.ll
Log Message:
-----------
[mlir][llvm] Import call site calling conventions (#76391)
This revision adds support for importing call site calling conventions.
Additionally, the revision also adds a roundtrip test for an indirect
call with a non-standard calling convention.
Commit: 9943d33997e6bb85ad054c18ce44d037040d8565
https://github.com/llvm/llvm-project/commit/9943d33997e6bb85ad054c18ce44d037040d8565
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Fix assertion in vectorizeGEPIndices() (#76660)
The index constraints for the collected getelementptr instructions
should be single **and** non-constant.
Commit: 0b3d1a0b1bea12846c34adfdd19c8d7f930620ea
https://github.com/llvm/llvm-project/commit/0b3d1a0b1bea12846c34adfdd19c8d7f930620ea
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[RISCV][test] Add tests for RISCVInstrInfo::describeLoadedValue (#76041)
Tests are in preparation for adding handling of the load of a constant
value as Mips does (noted in
<https://github.com/llvm/llvm-project/pull/72356#discussion_r1395203532>).
I've opted to implement these tests as a C++ unit test as on balance I
_think_ it's easier to follow and maintain than .mir tests trying to
indirectly test this function. That said, you see the limitations with
the test of describeLoadedValue on a memory operation where we'd rather
pass `MachinePointerInfo::getFixedStack` but can't because we'd need to
then ensure the necessary stack metadata for the function is present.
Commit: 91e8700bd6adf4587dcc1b3e2c43940f81220da1
https://github.com/llvm/llvm-project/commit/91e8700bd6adf4587dcc1b3e2c43940f81220da1
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Add overlapping constraints flag to RVV pseudo (#76489)
This patch update some missing overlapping constraints flag in following
pseudo:
- VPseudoUnaryMaskRoundingMode
- VPseudoTiedBinaryCarryIn
- VPseudoTiedBinaryV_VM
- VPseudoTiedBinaryV_XM
- PseudoVEXT_VF2|4|8
- VPseudoConversionRoundingMode
- VPseudoUnaryNoMask_FRM
- VPseudoUnaryMask_FRM
- VPseudoConversionRM
- VPseudoVNCVTI_RM_W
Commit: 33565750e49f683308fad3ba22a06fa7e75f592b
https://github.com/llvm/llvm-project/commit/33565750e49f683308fad3ba22a06fa7e75f592b
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
A llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
Log Message:
-----------
[AMDGPU] Fix moveToValu for copy to phys SGPRs (#76715)
Fixes #76031
Commit: a181b425659a22c5535d2513f7dd7c7cf14e2d69
https://github.com/llvm/llvm-project/commit/a181b425659a22c5535d2513f7dd7c7cf14e2d69
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Log Message:
-----------
[llvm][NFC] Use SDValue::getConstantOperandAPInt(i) where possible
The helper function allows examples like
`cast<ConstantSDNode>(Op.getOperand(0))->getAPIntValue();` to be changed
to `Op.getConstantOperandAPInt(0);`.
See #76708 for further context. Although there are far fewer
opportunities for replacement, I used a similar git grep and sed combo
as before, given I already had it to hand:
`git grep -l "cast<ConstantSDNode>\(.*->getOperand\(.*\)\)->getAPIntValue\(\)" | xargs sed -E -i 's/cast<ConstantSDNode>\((.*)->getOperand\((.*)\)\)->getAPIntValue\(\)/\1->getConstantOperandAPInt(\2)/'`
and
`git grep -l
"cast<ConstantSDNode>\(.*\.getOperand\(.*\)\)->getAPIntValue\(\)" |
xargs sed -E -i
's/cast<ConstantSDNode>\((.*)\.getOperand\((.*)\)\)->getAPIntValue\(\)/\1.getConstantOperandAPInt(\2)/'`
Commit: 02347fc7191ff4d073f439dde6523add3f5496de
https://github.com/llvm/llvm-project/commit/02347fc7191ff4d073f439dde6523add3f5496de
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaInit.cpp
A clang/test/SemaCXX/crash-GH76228.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
Log Message:
-----------
Reapply "[Sema] Fix crash on invalid code with parenthesized aggregate initialization" (#76272)
With updates the libc++ tests.
This reverts commit 2205d2334f3c859ad9f6c65ed950bfb3bb6f7cbe and relands
86dc6e15f22610bbb53eb4efda0a178ecefc933a and
7ab16fb5207fe187ab999f882069bd632d2e68e5.
Original commit was reverted because of failing libc++ tests, see #76232 for
the discussion.
The errors in the tests are spurious in the first place (coming from initialization
of invalid classes), so update the tests to match new behavior that does
not show those errors.
Commit: 9d5b0965c43b4e8b3f21c106fe829391b1382277
https://github.com/llvm/llvm-project/commit/9d5b0965c43b4e8b3f21c106fe829391b1382277
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
Log Message:
-----------
[InstCombine] Add helper for commutative icmp folds (NFCI)
Add a common place for icmp folds that should be tried with both
operand orders, so we don't have to repeat this pattern for
individual folds.
Commit: 795c989c387970578c89ef038d5432583510d32f
https://github.com/llvm/llvm-project/commit/795c989c387970578c89ef038d5432583510d32f
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Target/Cpp/const.mlir
Log Message:
-----------
[mlir][EmitC] Disallow string attributes as initial values (#75310)
Commit: fc9dbc999bc711a99b94b42453240b38a6509b0d
https://github.com/llvm/llvm-project/commit/fc9dbc999bc711a99b94b42453240b38a6509b0d
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Add extra test for icmp of gep fold (NFC)
Commit: 1bb85fa9c038044e949dac6e3b07e9835d1110a6
https://github.com/llvm/llvm-project/commit/1bb85fa9c038044e949dac6e3b07e9835d1110a6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libc/src/stdio/generic/puts.cpp
Log Message:
-----------
[libc] Lock the output stream for the 'puts' call (#76513)
Summary:
The `puts` function consists of an initial write and then another write
to append the newline. When executing code in parallel, it is possible
for these writes to becomes disjointed. This code adds an explicit lock
call to ensure that the string is always appended by the newline as the
users expects.
Wasn't sure if this required a test as it would be difficult since
reproducing it would be flaky.
Commit: 2292fd0129362865d07777329fa38850d7a642a3
https://github.com/llvm/llvm-project/commit/2292fd0129362865d07777329fa38850d7a642a3
Author: Jungwook Park <jungwook.park at innosilicon.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
A mlir/include/mlir-c/Dialect/SPIRV.h
M mlir/lib/CAPI/Dialect/CMakeLists.txt
A mlir/lib/CAPI/Dialect/SPIRV.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/SPIRVOps.td
A mlir/python/mlir/dialects/spirv.py
A mlir/test/python/dialects/spirv_dialect.py
Log Message:
-----------
[mlir][spirv] Add support for C-API/python binding to SPIR-V dialect (#76055)
Enable bindings.
---------
Co-authored-by: jungpark-mlir <jungwook at jungwook-22.04>
Commit: 4b9194952d73c34d4d58a5dc3aeddead130b5f0e
https://github.com/llvm/llvm-project/commit/4b9194952d73c34d4d58a5dc3aeddead130b5f0e
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
M llvm/test/CodeGen/AArch64/andcompare.ll
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AArch64/call-rv-marker.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fold-binop-into-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
Log Message:
-----------
[GlobalIsel] Combine selects with constants (#76089)
A first small step at combining selects.
Commit: 02c2bf8c054c8a425f7347a4a276e2dbf4b10e5a
https://github.com/llvm/llvm-project/commit/02c2bf8c054c8a425f7347a4a276e2dbf4b10e5a
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Change heuristic used for load clustering (#75341)
Split out from #73789, so as to leave that PR just for flipping load
clustering to on by default. Clusters if the operations are within a
cache line of each other (as AMDGPU does in shouldScheduleLoadsNear).
X86 does something similar, but does `((Offset2 - Offset1) / 8 > 64)`.
I'm not sure if that's intentionally set to 512 bytes or if the division
is in error.
Adopts the suggestion from @wangpc-pp to query the cache line size and
use it if available.
We also cap the maximum cluster size to cap the potential register
pressure impact (which may lead to additional spills).
Commit: 571ad7324f3a25f507a1014a0467890f17772c13
https://github.com/llvm/llvm-project/commit/571ad7324f3a25f507a1014a0467890f17772c13
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/bad-forward-type.f90
M flang/test/Semantics/init01.f90
M flang/test/Semantics/pointer01.f90
M flang/test/Semantics/symbol15.f90
Log Message:
-----------
[flang] Defer processing of non-pointer variable initializers (#76475)
Initializers in entity-decls don't need to have their expressions
analyzed immediately in name resolution unless of course they are
defining the values of named constants. By deferring the expression
analysis, the compiler can better handle references to module and
internal procedures that might appear in structure constructors; at
present, these are typically rejected as being forward references (which
they can be) to subprogram names that can't yet be checked for
compatibility with the characteristics of the corresponding procedure
component.
Commit: 120ad2508af8b5093f5d9d9f5e7566936320e769
https://github.com/llvm/llvm-project/commit/120ad2508af8b5093f5d9d9f5e7566936320e769
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/runtime/edit-input.cpp
M flang/runtime/io-stmt.cpp
M flang/runtime/namelist.cpp
Log Message:
-----------
[flang][runtime] Extension: NAMELIST input may omit terminal '/' (#76476)
... when it is followed eventually by the '&' that begins the next
NAMELIST input group. This is a gfortran extension.
Commit: 3bbdbb22a50705a78ea2668d4ab227889cabdc84
https://github.com/llvm/llvm-project/commit/3bbdbb22a50705a78ea2668d4ab227889cabdc84
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Parser/Fortran-parsers.cpp
Log Message:
-----------
[flang] Fix parsing time explosion (#76533)
When parsing a deeply-nested expression like
A1(A2(A3(A4(A5(A6(...A99(i)...))))))
the parser can get into an exponential state due to the need to consider
the possibility that each "An(...)" might be the beginning of a
reference to a procedure component ("An(...)%PROC(...)") so that
alternative has to be attempted first before proceeding to try parsing
"An(...)" as a function reference or as an array element designator. The
parser for a structure component, which is used by the procedure
designator parser, was not protected with the usual failure memoization
technique, leading to exponentially bad behavior parsing a deeply-nested
expression. Fix by exploiting the instrumented() parser combinator so
that failed structure component parsers aren't repeated.
Fixes https://github.com/llvm/llvm-project/issues/76477.
Commit: b29d632eea48a14f46af2a9f04bd28798cb55612
https://github.com/llvm/llvm-project/commit/b29d632eea48a14f46af2a9f04bd28798cb55612
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve61.f90
Log Message:
-----------
[flang] Accept BIND(C) derived type for Cray pointees (#76538)
The compiler requires that a Cray pointee have a SEQUENCE type, but a
recent bug report points out that a BIND(C) type should also be
accepted.
Fixes https://github.com/llvm/llvm-project/issues/76529.
Commit: 7c55dd8de64823deb71bbeff8543e31ab6264cd9
https://github.com/llvm/llvm-project/commit/7c55dd8de64823deb71bbeff8543e31ab6264cd9
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
M flang/test/Parser/compiler-directives.f90
Log Message:
-----------
[flang] Accept multiple spaces after compiler directive sentinel (#76541)
The prescanner allows multiple spaces within a compiler directive, but
not between the directive's sentinel (e.g., !DIR$) and the directive's
first token.
Fixes https://github.com/llvm/llvm-project/issues/76537.
Commit: 49ee8b53ef39c158d40d76128828379dd34ea61f
https://github.com/llvm/llvm-project/commit/49ee8b53ef39c158d40d76128828379dd34ea61f
Author: SunilKuravinakop <98882378+SunilKuravinakop at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/atomic_compare_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMP] atomic compare fail : Codegen support (#75709)
This is a continuation of https://reviews.llvm.org/D123235 ([OpenMP]
atomic compare fail : Parser & AST support). In this branch Support for
codegen support for atomic compare fail is being added.
---------
Co-authored-by: Sunil Kuravinakop
Commit: dea30aca3a56bb72d4e1eddb04f98c53bcb5992a
https://github.com/llvm/llvm-project/commit/dea30aca3a56bb72d4e1eddb04f98c53bcb5992a
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/runtime/namelist.cpp
Log Message:
-----------
[flang][runtime] NAMELIST input into storage sequence (#76584)
Nearly every Fortran compiler supports the extension of NAMELIST input
into a storage sequence identified by its initial scalar array element.
For example,
&GROUP A(1) = 1. 2. 3. /
should be processed as if the input had been
&GROUP A(1:) = 1. 2. 3. /
Fixes llvm-test-suite/Fortran/gfortran/regression/namelist_24.f90.
Commit: 289eb995807116fedcec5c5614246330411f7b3b
https://github.com/llvm/llvm-project/commit/289eb995807116fedcec5c5614246330411f7b3b
Author: Oleg Shyshkov <shyshkov at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Add SPIRV python binding
Commit: cab156c4129e5948a6322054480e66d3ca17b919
https://github.com/llvm/llvm-project/commit/cab156c4129e5948a6322054480e66d3ca17b919
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/runtime/edit-input.cpp
Log Message:
-----------
[flang][runtime] Don't round hexadecimal floating-point input (#76586)
Fortran 2023 subclause 13.7.2.3.8 discusses input rounding only in the
context of decimal-to-binary conversion. There is no mention of rounding
for hexadecimal floating-point input conversion. At least one Fortran
compiler seems to have interpreted this silence as implying no rounding.
(Note that this is not the same thing as rounding to zero (RZ), which
would return +/-HUGE() for overflow.)
Commit: 78348b691504bf9ec212add73cc37d2fd8371f83
https://github.com/llvm/llvm-project/commit/78348b691504bf9ec212add73cc37d2fd8371f83
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Tensor/simplify-pack-unpack.mlir
Log Message:
-----------
[mlir][tensor] Improve tensor.pack simplication pattern. (#76606)
A tensor.pack op can be rewritten to a tensor.expand_shape op if the
packing only happens on inner most dimension.
This also formats the lit checks better.
Commit: 4c1f488b78237e3388ac44d587b7b2e0c1d772b9
https://github.com/llvm/llvm-project/commit/4c1f488b78237e3388ac44d587b7b2e0c1d772b9
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Evaluate/real.cpp
M flang/test/Evaluate/fold-nearest.f90
Log Message:
-----------
[flang] Fix folding of NEAREST(TINY(1.),-1.) (#76590)
The code to fold NEAREST would return a value that's too large when
transitioning from a normal number to a subnormal.
Fixes llvm-test-suite/Fortran/gfortran/regression/nearest_1.f90.
Commit: 8f3357b75b6f0093e3e5df8adb140c9dad24f881
https://github.com/llvm/llvm-project/commit/8f3357b75b6f0093e3e5df8adb140c9dad24f881
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/include/flang/Runtime/io-api.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/lib/Lower/IO.cpp
M flang/module/iso_fortran_env.f90
M flang/runtime/io-api.cpp
M flang/runtime/unit.cpp
M flang/test/Lower/HLFIR/calls-f77.f90
M flang/test/Lower/HLFIR/convert-mbox-to-value.f90
M flang/test/Lower/OpenMP/FIR/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/array-character.f90
M flang/test/Lower/array-expression-slice-1.f90
M flang/test/Lower/array-expression.f90
M flang/test/Lower/array-temp.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/io-statement-2.f90
M flang/test/Lower/vector-subscript-io.f90
Log Message:
-----------
[flang][runtime] Don't use -1 in I/O API for "default unit" (#76642)
The I/O runtime's API allows -1 to be passed for a unit number in a
READ, WRITE, or PRINT statement, where it gets replaced by 5 or 6 as
appropriate. This turns out to have been a bad idea, as it prevents the
I/O runtime from detecting and reporting a program's invalid attempt to
use -1 as an I/O unit number. So just pass 5 or 6 as appropriate.
Commit: 8fa3184539df441ca325d8b70ae5b573c46d8450
https://github.com/llvm/llvm-project/commit/8fa3184539df441ca325d8b70ae5b573c46d8450
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/TextAPI/TextStubV5.cpp
Log Message:
-----------
[TextAPI] Use function_ref where possible, NFCI (#76732)
Commit: 9fd03cb6522ac1469512502713bedf8b352e2589
https://github.com/llvm/llvm-project/commit/9fd03cb6522ac1469512502713bedf8b352e2589
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/runtime/edit-input.cpp
Log Message:
-----------
[flang][runtime] Don't prematurely end formatted integer input (#76643)
When an input data-list has more items than can be read by a format from
the input record (e.g., "(4I5)" reading "1 2"), don't return false from
EditIntegerInput() just because nothing was read -- that will prevent
later items from being set to zero, as they should be. Return true
unless nothing was read and there is some kind of error pending.
Fixes llvm-error-tests/Fortran/gfortran/regression/pr478478.f90.
Commit: bf684a97f37b12ccf2c98b007b8222c54c7480f5
https://github.com/llvm/llvm-project/commit/bf684a97f37b12ccf2c98b007b8222c54c7480f5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/trunc-sat-clip.ll
Log Message:
-----------
[RISCV] Don't emit vxrm writes for vnclip(u).wi with shift of 0. (#76578)
If there's no shift being performed, the rounding mode doesn't matter.
We could do the same for vssra and vssrl, but they are no-ops with a
shift of 0 so would be better off being removed earlier.
Commit: 9c978c94187511326627c34fb04c57f853c488fc
https://github.com/llvm/llvm-project/commit/9c978c94187511326627c34fb04c57f853c488fc
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
A llvm/test/Transforms/Coroutines/coro-debug-frame-variable-O1.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
Log Message:
-----------
[coroutines] Use DILocation from new storage for hoisted dbg.declare (#75402)
Make the hoisted dbg.declare inherent the DILocation scope from the new
storage.
After hoisting, the dbg.declare is moved into the block that defines the
new storage. This could create an inconsistency in the debug location
scope hierarchy where the scope of hoisted dbg.declare (i.e.
DILexicalBlock) is enclosed with the scope of the block (i.e.
DISubprogram). This confuses LiveDebugValues pass to think that the
hoisted dbg.declare is killed in that block and does not generate
DBG_VALUE in other blocks. Debugger won't be able to track its value
anymore.
We do this for unoptimized binary only.
Commit: 27091dacdd5f4a8601563f57e21f653d59169d46
https://github.com/llvm/llvm-project/commit/27091dacdd5f4a8601563f57e21f653d59169d46
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/ExecutionEngine/OrcLazy/debug-descriptor-elf-minimal.ll
M llvm/test/ExecutionEngine/OrcLazy/debug-objects-elf-minimal.ll
Log Message:
-----------
[Orc] Temporarily disable OrcLazy debug tests on macOS
Test failures were reported after https://github.com/llvm/llvm-project/pull/76244 landed. Let's revisit these tests now that we have native Mach-O debug support as well.
Commit: 71f8ea3062a6b0a190835853ee77e58469763b9e
https://github.com/llvm/llvm-project/commit/71f8ea3062a6b0a190835853ee77e58469763b9e
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
M llvm/docs/CommandGuide/llvm-cxxfilt.rst
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/lib/Demangle/Demangle.cpp
M llvm/lib/Demangle/ItaniumDemangle.cpp
A llvm/test/tools/llvm-cxxfilt/no-params.test
M llvm/tools/llvm-cxxfilt/Opts.td
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
Log Message:
-----------
[llvm-cxxfilt] Added the option --no-params (#75348)
Added -p / --no-params flag to skip demangling function parameters
similar to how it is supported by GNU c++filt tool.
There are cases when users want to demangle a large number of symbols in
bulk, for example, at startup, and do not care about function parameters
and overloads at that time. Skipping the demangling of parameter types
led to a measurable improvement in performance. Our users reported about
15% speed up with GNU c++filt and we expect similar results with
llvm-cxxfilt with this patch.
Commit: ffd173ba0b4a6d84f45308e78cea4af611bec10e
https://github.com/llvm/llvm-project/commit/ffd173ba0b4a6d84f45308e78cea4af611bec10e
Author: Walter Erquinigo <a20012251 at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/optimized/TestDAP_optimized.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/BreakpointBase.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Emit more structured info along with variables (#75244)
In order to allow smarter vscode extensions, it's useful to send
additional structured information of SBValues to the client.
Specifically, I'm now sending error, summary, autoSummary and
inMemoryValue in addition to the existing properties being sent. This is
cheap because these properties have to be calculated anyway to generate
the display value of the variable, but they are now available for
extensions to better analyze variables. For example, if the error field
is not present, the extension might be able to provide cool features,
and the current way to do that is to look for the `"<error: "` prefix,
which is error-prone.
This also incorporates a tiny feedback from
https://github.com/llvm/llvm-project/pull/74865#issuecomment-1850695477
Commit: d34901f30b8b7ac8fe1437eeb588da6805b27cfb
https://github.com/llvm/llvm-project/commit/d34901f30b8b7ac8fe1437eeb588da6805b27cfb
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/test/Driver/driverkit-path.c
A clang/test/Preprocessor/cuda-macos-includes.cu
Log Message:
-----------
Revert "[clang][Darwin] Remove legacy framework search path logic in the frontend (#75841)"
This reverts commit 61999b18c407b9f5c07577e63057d41c65240e61.
See comments on https://github.com/llvm/llvm-project/pull/75841. This
was intended to be NFC but actually isn't.
Commit: e512df3ecca4b2328ac1efd7de6c6efefde249d7
https://github.com/llvm/llvm-project/commit/e512df3ecca4b2328ac1efd7de6c6efefde249d7
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/vector-call-linear-args.ll
Log Message:
-----------
[LV] Fix crash when vectorizing function calls with linear args. (#76274)
llvm/lib/IR/Type.cpp:694:
Assertion `isValidElementType(ElementType) && "Element type of a
VectorType must be an integer, floating point, or pointer type."'
failed.
Stack dump:
llvm::FixedVectorType::get(llvm::Type*, unsigned int)
llvm::VPWidenCallRecipe::execute(llvm::VPTransformState&)
llvm::VPBasicBlock::execute(llvm::VPTransformState*)
llvm::VPRegionBlock::execute(llvm::VPTransformState*)
llvm::VPlan::execute(llvm::VPTransformState*)
...
Happens with function calls of void return type.
Commit: eba2b789d3b91ae1cefebe112fec6c667b86a904
https://github.com/llvm/llvm-project/commit/eba2b789d3b91ae1cefebe112fec6c667b86a904
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
Log Message:
-----------
[RawProfReader]When constructing symbol table, read the MD5 of function name in the proper byte order (#76312)
Before this patch, when the field `NameRef` is generated in little-endian systems and read back in big-endian systems, the information gets dropped.
- The bug gets caught by a buildbot
https://lab.llvm.org/buildbot/#/builders/94/builds/17931. In the error message (pasted below),
two indirect call targets are not imported.
```
; IMPORTS-DAG: Import _Z7callee1v
^
<stdin>:1:1: note: scanning from here
main.ll: Import _Z11global_funcv from lib.cc
^
<stdin>:1:10: note: possible intended match here
main.ll: Import _Z11global_funcv from lib.cc
^
Input file: <stdin>
Check file:
/home/uweigand/sandbox/buildbot/clang-s390x-linux/llvm/llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
-dump-input=help explains the following input dump.
Input was:
<<<<<<
1: main.ll: Import _Z11global_funcv from lib.cc
dag:34'0 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match
found
dag:34'1 ? possible intended match
```
[This commit](https://github.com/llvm/llvm-project/commit/b3999246b1a93bd8e6dc7acac36a7d57fac96542#diff-b196b796c5a396c7cdf93b347fe47e2b29b72d0b7dd0e2b88abb964d376ee50e) gates the fix by flag and provide test data by creating big-endian profiles (rather than reading the little-endian data on a big-endian system that might require a VM).
- [This](https://github.com/llvm/llvm-project/commit/b3999246b1a93bd8e6dc7acac36a7d57fac96542#diff-643176077ddbe537bd0a05d2a8a53bdff6339420a30e8511710bf232afdda8b9) is a hexdump of little-endian profile data, and [this](https://github.com/llvm/llvm-project/commit/b3999246b1a93bd8e6dc7acac36a7d57fac96542#diff-1736a3ee25dde02bba55d670df78988fdb227e5a85b94b8707cf182cf70b28f0) is the big-endian version of it.
- The [README.md](https://github.com/llvm/llvm-project/commit/b3999246b1a93bd8e6dc7acac36a7d57fac96542#diff-6717b6a385de3ae60ab3aec9638af2a43b55adaf6784b6f0393ebe1a6639438b) shows the result of `llvm-profdata show -ic-targets` before and after the fix when the profile is in big-endian.
Commit: 0b3a89f121eaf23b93b9b9b2a9410ae1f6e2fc44
https://github.com/llvm/llvm-project/commit/0b3a89f121eaf23b93b9b9b2a9410ae1f6e2fc44
Author: Dimitry Andric <dimitry at andric.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M compiler-rt/lib/builtins/int_types.h
Log Message:
-----------
[builtins] Avoid using long double in FreeBSD standalone environment (#76175)
After 05a4212cc76d a number of long double related declarations are
enabled in `int_types.h`, whenever the CPU architecture and platform
support it. However, this does not work with FreeBSD's standalone
environment, which disallows any use of floating point.
In add98b246290 this was made conditional with `CRT_HAS_FLOATING_POINT`,
so extend the block guarded by that define to include all floating point
related declarations.
Commit: 4b7707bfd9b24e972212c6e40d91c1b21f6f65b6
https://github.com/llvm/llvm-project/commit/4b7707bfd9b24e972212c6e40d91c1b21f6f65b6
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/optin.core.EnumCastOutOfRange.rst
A clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/security.cert.env.InvalidPtr.rst
A clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/unix.Errno.rst
A clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/unix.StdCLibraryFunctions.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
Log Message:
-----------
[clang-tidy][DOC] Generate documentation for new Clang-Analyzer checks
Some checks were recently moved from alpha stage.
Manualy running gen-static-analyzer-docs.py to
generate missing documentation for Clang-tidy.
Commit: 0d19a8983c05de321d8ab592995e7a36bca448ee
https://github.com/llvm/llvm-project/commit/0d19a8983c05de321d8ab592995e7a36bca448ee
Author: walter erquinigo <walter at modular.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/optimized/TestDAP_optimized.py
Log Message:
-----------
Fix builtbot
https://lab.llvm.org/buildbot/#/builders/96/builds/50702/steps/6/logs/stdio requires checking for multiple error messages
Commit: a2d7af757bc33dc91f2e038742915a146cfb0c13
https://github.com/llvm/llvm-project/commit/a2d7af757bc33dc91f2e038742915a146cfb0c13
Author: Katherine Rasmussen <krasmussen at lbl.gov>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Lower/Runtime.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/check-coarray.h
M flang/module/__fortran_builtins.f90
M flang/module/iso_fortran_env.f90
A flang/test/Semantics/notifywait01.f90
A flang/test/Semantics/notifywait02.f90
A flang/test/Semantics/notifywait03.f90
Log Message:
-----------
[flang] Add notify-type and notify-wait-stmt (#76594)
Add `notify-type` to `iso_fortran_env` module. Add `notify-wait-stmt` to
the parser and add checks for constraints on the statement, `C1177` and
`C1178`, from the Fortran 2023 standard. Add three semantics tests for
`notify-wait-stmt`.
Commit: 3caef46631190fe24b16704fd22185a3083949a5
https://github.com/llvm/llvm-project/commit/3caef46631190fe24b16704fd22185a3083949a5
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libc/src/math/generic/exp.cpp
M libc/src/math/generic/exp10.cpp
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/expm1.cpp
Log Message:
-----------
[libc][NFC] Enforce internal linkage for exp* support functions. (#76250)
Commit: d6c4d4c9b910e8ad5ed7cd4825a143742041c1f4
https://github.com/llvm/llvm-project/commit/d6c4d4c9b910e8ad5ed7cd4825a143742041c1f4
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M polly/lib/Transform/ScheduleOptimizer.cpp
A polly/test/ScheduleOptimizer/schedule_computeout.ll
Log Message:
-----------
[polly][ScheduleOptimizer] Fix long compile time(hang) reported in polly (#75141)
There is no upper cap set on current Schedule Optimizer to compute
schedule. In some cases a very long compile time taken to compute the
schedule resulting in hang kind of behavior. This patch introduces a
flag 'polly-schedule-computeout' to pass the capwhich is initialized to
300000. This patch handles the compute out cases by bailing out and
exiting gracefully.
Fixes #69090
Commit: 3af59cfe0b5a319c165e3c74300aacdd42827c2d
https://github.com/llvm/llvm-project/commit/3af59cfe0b5a319c165e3c74300aacdd42827c2d
Author: Alexander Shaposhnikov <6532716+alexander-shaposhnikov at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/abs.ll
Log Message:
-----------
[ConstraintElim] Add facts implied by llvm.abs (#73189)
Add "abs(x) >=s x" fact.
https://alive2.llvm.org/ce/z/gOrrU3
Test plan: ninja check-all
Commit: 11ac97c67a9315dce48fd938d68ae991e3559f10
https://github.com/llvm/llvm-project/commit/11ac97c67a9315dce48fd938d68ae991e3559f10
Author: Felix Schneider <fx.schn at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][tosa] Move lowering of `tosa.transpose` to `tosa-to-linalg-named` (#75738)
Currently, there exists a pattern lowering `tosa.transpose` to
`linalg.generic` in `tosa-to-linalg`.
This patch removes that and instead adds a pattern lowering
`tosa.transpose` to `linalg.transpose` in `tosa-to-linalg-named`.
Lowering to the named linalg Op has the advantage that following
optimization passes can easily identify transposition without having to
perform pattern matching on linalg.generic Ops. The `linalg.transpose`
can simply be generalized to a `linalg.generic` in a second step.
Commit: e775ba384efe31928bac796b2a4d388a1c298c5e
https://github.com/llvm/llvm-project/commit/e775ba384efe31928bac796b2a4d388a1c298c5e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/reorder-fmuladd-crash.ll
Log Message:
-----------
[SLP][NFC]Add some extra values to avoid constant expressions in the test.
Commit: 273aefec66cea947787f053adee25175f4168713
https://github.com/llvm/llvm-project/commit/273aefec66cea947787f053adee25175f4168713
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_transpose_coo.mlir
Log Message:
-----------
[mlir][sparse] enable rt path for transpose COO (#76747)
COO has been supported for a while now on both
lib and codegen path. So enabling this test for
all paths and removing obsolete FIXME
Commit: 619a0069240b0b55ab3e7dc280a8ca31e805747a
https://github.com/llvm/llvm-project/commit/619a0069240b0b55ab3e7dc280a8ca31e805747a
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
R compiler-rt/test/msan/Linux/eventfd.cpp
A compiler-rt/test/msan/eventfd.cpp
Log Message:
-----------
[compiler-rt] eventfd api interception on freebsd. (#76564)
Commit: 9191ac0bdb07643eefcc161c88b66d4e7058db9c
https://github.com/llvm/llvm-project/commit/9191ac0bdb07643eefcc161c88b66d4e7058db9c
Author: Michael Holman <michhol at microsoft.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/cmake/modules/TableGen.cmake
M mlir/CMakeLists.txt
M mlir/cmake/modules/AddMLIR.cmake
M mlir/cmake/modules/CMakeLists.txt
M mlir/cmake/modules/MLIRConfig.cmake.in
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
M mlir/lib/Dialect/Linalg/IR/CMakeLists.txt
M mlir/tools/mlir-linalg-ods-gen/CMakeLists.txt
Log Message:
-----------
[mlir] Consider mlir-linalg-ods-gen as a tablegen tool in build (#75093)
There is a bit of an issue with how `mlir-linalg-ods-yaml-gen` is
classified in the MLIR build. Due to it being a tool, it is excluded
from the install when using `-DLLVM_BUILD_TOOLS=OFF`. However, it is a
necessary component of the build, so it can cause build issues with
users of the installed LLVM, and so I think it should not be excluded.
It is a tablegen-like tool, so my solution is to reclassify it that way
in the build.
Commit: 1fa18fee72639944291b1300a6995abde9b9f51a
https://github.com/llvm/llvm-project/commit/1fa18fee72639944291b1300a6995abde9b9f51a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/sub-nuw.ll
Log Message:
-----------
[ConstraintElim] Add test case for #76713
See https://github.com/llvm/llvm-project/issues/76713.
Commit: c91fab50410eb740ad1318164c820f9750f9a1bf
https://github.com/llvm/llvm-project/commit/c91fab50410eb740ad1318164c820f9750f9a1bf
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
M llvm/docs/CommandGuide/llvm-cxxfilt.rst
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/lib/Demangle/Demangle.cpp
M llvm/lib/Demangle/ItaniumDemangle.cpp
R llvm/test/tools/llvm-cxxfilt/no-params.test
M llvm/tools/llvm-cxxfilt/Opts.td
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
Log Message:
-----------
Revert "[llvm-cxxfilt] Added the option --no-params (#75348)"
This reverts commit 71f8ea3062a6b0a190835853ee77e58469763b9e.
Test doesn't pass on mac. See comments on
https://github.com/llvm/llvm-project/pull/75348.
Commit: 8c7dfafa0a5cd2fb001b2f59243b63e1ce2bfafa
https://github.com/llvm/llvm-project/commit/8c7dfafa0a5cd2fb001b2f59243b63e1ce2bfafa
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/sub-nuw.ll
Log Message:
-----------
[ConstraintElim] Add extra tests with chained subs.
Commit: c0345b4648608b44071bbb6b012b24bd07c3d29e
https://github.com/llvm/llvm-project/commit/c0345b4648608b44071bbb6b012b24bd07c3d29e
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Utils.h
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/lib/Dialect/GPU/Transforms/AllReduceLowering.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp
A mlir/lib/Dialect/GPU/Transforms/Utils.cpp
M mlir/test/Dialect/GPU/subgroup-redule-lowering.mlir
M mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
Log Message:
-----------
[mlir][gpu] Add subgroup_reduce to shuffle lowering (#76530)
This supports both the scalar and the vector multi-reduction cases.
Commit: 78f0991abdae723f535fda58a4bb16b53bea7010
https://github.com/llvm/llvm-project/commit/78f0991abdae723f535fda58a4bb16b53bea7010
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M compiler-rt/test/hwasan/TestCases/stack-overflow.c
M compiler-rt/test/hwasan/TestCases/stack-uar.c
M compiler-rt/test/hwasan/TestCases/stack-uas.c
M llvm/lib/IR/DebugInfo.cpp
A llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/hwasan.ll
Log Message:
-----------
[hwasan] Workaround unsupported AssignmentTrackingPass (#76547)
Temporarily fix for issue #76545
Hwasan does not attach tags to @llvm.dbg.assign. It's not clear if we
can attach tags to @llvm.dbg.assign.
For now we just disable the path replacing llvm.dbg.declare with
llvm.dbg.assign.
It may reduce the quality of interactive debugging with HWASAN, but
usually it's
a smaller priority for sanitizers than the quality if reports.
Commit: 71bcef0b0bf55a96f85b2f323b0beb13ad8e2caa
https://github.com/llvm/llvm-project/commit/71bcef0b0bf55a96f85b2f323b0beb13ad8e2caa
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add VectorDialect build dep
Added in c0345b4648608b44071bbb6b012b24bd07c3d29e
Commit: 3c127e83c07c3791e86413c22a414a030d4302e3
https://github.com/llvm/llvm-project/commit/3c127e83c07c3791e86413c22a414a030d4302e3
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/sub-nuw.ll
Log Message:
-----------
[ConstraintElim] Replace NUWSub decomp with recursive decomp of ops.
The current patterns for NUWSub decompositions do not handle negative
constants correctly at the moment (causing #76713).
Replace the incorrect pattern by more general code that recursively
decomposes the operands and then combines the results. This is already
done in most other places that handle operators like add/mul.
This means we fall back to the general constant handling code (fixes the
mis-compile) while also being able to support reasoning about
decomposable expressions in the SUB operands.
Fixes https://github.com/llvm/llvm-project/issues/76713.
Commit: 9943cd7c7de7ff36d23775e4fb2a449208d41569
https://github.com/llvm/llvm-project/commit/9943cd7c7de7ff36d23775e4fb2a449208d41569
Author: David Carlier <devnexen at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Log Message:
-----------
[compiler-rt] unbreak android build
Commit: 67c2e354c3f0326947914c097bf68997ac5065b2
https://github.com/llvm/llvm-project/commit/67c2e354c3f0326947914c097bf68997ac5065b2
Author: Max191 <44243577+Max191 at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
Log Message:
-----------
[mlir] Add inferContractionDims util for indexing map inputs (#76081)
This PR adds a util function to infer contraction dimensions given only
the indexing maps of a linalg operation.
Commit: 41a07e668c29e219ed2f26d61da8b6b3295ff967
https://github.com/llvm/llvm-project/commit/41a07e668c29e219ed2f26d61da8b6b3295ff967
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
M mlir/lib/ExecutionEngine/CudaRuntimeWrappers.cpp
A mlir/test/Dialect/SparseTensor/GPU/gpu_matmul24_lib.mlir
R mlir/test/Dialect/SparseTensor/GPU/gpu_matmul_lib_2to4.mlir
A mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir
R mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-lib-from-linalg.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-lib.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-prune.mlir
Log Message:
-----------
[mlir][sparse] recognize NVidia 2:4 type for matmul (#76758)
This removes the temporary DENSE24 attribute and replaces it with proper
recognition of dense to 24 conversion. The compressionh will be
performed on the device prior to performing the matrix mult. Note that
we no longer need to start with the linalg version, we can lift this to
the proper named linalg op. Also renames some files into more consistent
names.
Commit: fb32977ac768f27890af28308a6968c30af2aa3e
https://github.com/llvm/llvm-project/commit/fb32977ac768f27890af28308a6968c30af2aa3e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M openmp/libomptarget/include/omptarget.h
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/common/src/RPC.cpp
M openmp/libomptarget/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M openmp/libomptarget/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M openmp/libomptarget/plugins-nextgen/cuda/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/generic-elf-64bit/src/rtl.cpp
M openmp/libomptarget/test/libc/malloc.c
Log Message:
-----------
[Libomptarget] Fix RPC-based malloc on NVPTX (#72440)
Summary:
The device allocator on NVPTX architectures is enqueued to a stream that
the kernel is potentially executing on. This can lead to deadlocks as
the kernel will not proceed until the allocation is complete and the
allocation will not proceed until the kernel is complete. CUDA 11.2
introduced async allocations that we can manually place on separate
streams to combat this. This patch makes a new allocation type that's
guaranteed to be non-blocking so it will actually make progress, only
Nvidia needs to care about this as the others are not blocking in this
way by default.
I had originally tried to make the `alloc` and `free` methods take a
`__tgt_async_info`. However, I observed that with the large volume of
streams being created by a parallel test it quickly locked up the system
as presumably too many streams were being created. This implementation
not just creates a new stream and immediately destroys it. This
obviously isn't very fast, but it at least gets the cases to stop
deadlocking for now.
Commit: fc5f51cf5af4364b38bf22e491d46e1e892ade0c
https://github.com/llvm/llvm-project/commit/fc5f51cf5af4364b38bf22e491d46e1e892ade0c
Author: Derek Schuff <dschuff at chromium.org>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Object/WasmObjectFile.cpp
A llvm/test/tools/llvm-nm/wasm/linked.yaml
A llvm/test/tools/llvm-objdump/wasm/linked-symbol-table.yaml
Log Message:
-----------
[WebAssembly][Object]Use file offset as function symbol address for linked files (#76198)
WebAssembly doesn't have a single virtual memory space the way other
object formats or architectures do, so "addresses" mean different things
depending on the context.
Function symbol addresses in object files are offsets from the start of
the code section. This is good for linking and relocation. However when
dealing with linked binaries, offsets from the start of the file/module
are more often used (e.g. for stack traces in browsers), and are more
useful for use cases like binary size attribution. This PR changes
Object to use the file offset instead of the section offset for function
symbols, but only for linked (non-DSO) files.
This implements item number 4 from #76107
Commit: b64992a367efbbea0b7ae3dd7711b2be26128f99
https://github.com/llvm/llvm-project/commit/b64992a367efbbea0b7ae3dd7711b2be26128f99
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
Log Message:
-----------
[readtapi] Cleanup usages of ExitOnError, NFCI (#76745)
Commit: e32b1d15f7a23ccd271764bb31c84d91c9dcddbb
https://github.com/llvm/llvm-project/commit/e32b1d15f7a23ccd271764bb31c84d91c9dcddbb
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[compiler-rt] enable pwritev interception on freebsd/netbsd. (#76759)
Commit: 7122f55c639a00e719b6088249f4fca1810cf04c
https://github.com/llvm/llvm-project/commit/7122f55c639a00e719b6088249f4fca1810cf04c
Author: Malavika Samak <malavika.samak at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Warning for unsafe invocation of span::data (#75650)
…-Wunsafe-buffer-usage,
there maybe accidental re-introduction of new OutOfBound accesses into
the code bases. One such case is invoking span::data() method on a span
variable to retrieve a pointer, which is then cast to a larger type and
dereferenced. Such dereferences can introduce OutOfBound accesses.
To address this, a new WarningGadget is being introduced to warn against
such invocations.
---------
Co-authored-by: MalavikaSamak <malavika2 at apple.com>
Commit: 1a8fb887197caf709710bedf88ce95ffb0605c56
https://github.com/llvm/llvm-project/commit/1a8fb887197caf709710bedf88ce95ffb0605c56
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
A mlir/include/mlir/Dialect/Mesh/Transforms/ReshardingSpmdizationDoc.md
A mlir/include/mlir/Dialect/Mesh/Transforms/Spmdization.h
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
A mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
A mlir/test/lib/Dialect/Mesh/TestReshardingSpmdization.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][mesh] Add resharding spmdization on a 1D device mesh (#76179)
The current implementation supports only sharding of tensor axes that
have size divisible by the mesh axis size.
Commit: d933b88b71b00461815667d7cd0bb2fecd8606db
https://github.com/llvm/llvm-project/commit/d933b88b71b00461815667d7cd0bb2fecd8606db
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
Log Message:
-----------
[mlir][sparse] use a common util function to query the tensor level s… (#76764)
…et in a lattice point.
Commit: ffb1f20e0d8db5cd2c2a0fa2db9951e97f215b92
https://github.com/llvm/llvm-project/commit/ffb1f20e0d8db5cd2c2a0fa2db9951e97f215b92
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.h
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.h
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
Log Message:
-----------
[CodeGen] Add flag to populate target pass names (#76328)
`print-pipeline-passes` can show target pass names.
Commit: 7d81e072712f4e6a150561b5538ccebda289aa13
https://github.com/llvm/llvm-project/commit/7d81e072712f4e6a150561b5538ccebda289aa13
Author: Quentin Dian <dianqk at dianqk.net>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/switch-dead-default-lookup-table.ll
M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
Log Message:
-----------
[SimplifyCFG] When only one case value is missing, replace default with that case (#76669)
When the default branch is the last case, we can transform that branch
into a concrete branch with an unreachable default branch.
```llvm
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define i64 @src(i64 %0) {
%2 = urem i64 %0, 4
switch i64 %2, label %5 [
i64 1, label %3
i64 2, label %3
i64 3, label %4
]
3: ; preds = %1, %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %1, %4, %3
%.0 = phi i64 [ 2, %4 ], [ 1, %3 ], [ 0, %1 ]
ret i64 %.0
}
define i64 @tgt(i64 %0) {
%2 = urem i64 %0, 4
switch i64 %2, label %unreachable [
i64 0, label %5
i64 1, label %3
i64 2, label %3
i64 3, label %4
]
unreachable: ; preds = %1
unreachable
3: ; preds = %1, %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %1, %4, %3
%.0 = phi i64 [ 2, %4 ], [ 1, %3 ], [ 0, %1 ]
ret i64 %.0
}
```
Alive2: https://alive2.llvm.org/ce/z/Y-PGXv
After transform to a lookup table, I believe `tgt` is better code.
The final instructions are as follows:
```asm
src: # @src
and edi, 3
lea rax, [rdi - 1]
cmp rax, 2
ja .LBB0_1
mov rax, qword ptr [8*rdi + .Lswitch.table.src-8]
ret
.LBB0_1:
xor eax, eax
ret
tgt: # @tgt
and edi, 3
mov rax, qword ptr [8*rdi + .Lswitch.table.tgt]
ret
.Lswitch.table.src:
.quad 1 # 0x1
.quad 1 # 0x1
.quad 2 # 0x2
.Lswitch.table.tgt:
.quad 0 # 0x0
.quad 1 # 0x1
.quad 1 # 0x1
.quad 2 # 0x2
```
Godbolt: https://llvm.godbolt.org/z/borME8znd
Closes #73446.
Commit: 0731567a31e4ade97c27801045156a88c4589704
https://github.com/llvm/llvm-project/commit/0731567a31e4ade97c27801045156a88c4589704
Author: Jinyang He <hejinyang at loongson.cn>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
A llvm/test/MC/LoongArch/Misc/cfi-advance.s
M llvm/test/MC/LoongArch/Relocations/relax-addsub.s
M llvm/test/MC/RISCV/cfi-advance.s
M llvm/test/MC/RISCV/fixups-expr.s
Log Message:
-----------
[MC][RISCV][LoongArch] Add AlignFragment size if layout is available and not need insert nops (#76552)
Due to delayed decision for ADD/SUB relocations, RISCV and LoongArch may
go slow fragment walk path with available layout. When RISCV (or
LoongArch in the future) don't need insert nops, that means relax is
disabled. With available layout and not needing insert nops, the size of
AlignFragment should be a constant. So we can add it to Displacement for
folding A-B.
Commit: ab43cf26cac559187a0891c6978f07cf72ea7682
https://github.com/llvm/llvm-project/commit/ab43cf26cac559187a0891c6978f07cf72ea7682
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
Log Message:
-----------
[mlir][mesh] Fix -Wunused-variable in Spmdization.cpp (NFC)
llvm-project/mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp:573:14:
error: unused variable 'targetShardType' [-Werror,-Wunused-variable]
ShapedType targetShardType =
^
1 error generated.
Commit: a258544754bb119f856bc1163a2af37e6c9a8446
https://github.com/llvm/llvm-project/commit/a258544754bb119f856bc1163a2af37e6c9a8446
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel][mesh] Add deps for 1D device mesh resharding spmdization
Added in 1a8fb887197caf709710bedf88ce95ffb0605c56
Commit: 82fabd537f4b6cd24e639ca29df95643f215f0ef
https://github.com/llvm/llvm-project/commit/82fabd537f4b6cd24e639ca29df95643f215f0ef
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrArithmetic.td
Log Message:
-----------
[X86][NFC] Remove redundant "NAME#" in X86InstrArithmetic.td
Commit: 2cc111e422a1e9a77455da3febf36449a6127bae
https://github.com/llvm/llvm-project/commit/2cc111e422a1e9a77455da3febf36449a6127bae
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M polly/lib/Transform/ScheduleOptimizer.cpp
R polly/test/ScheduleOptimizer/schedule_computeout.ll
Log Message:
-----------
Revert "[polly][ScheduleOptimizer] Fix long compile time(hang) reported in polly (#75141)"
This reverts commit d6c4d4c9b910e8ad5ed7cd4825a143742041c1f4.
Broke buildldbots with asserts disabled; -debug-only is only available in
asserts builds.
Commit: 8ae73fea3a2cbb072bf3e577dc49deb25b56e760
https://github.com/llvm/llvm-project/commit/8ae73fea3a2cbb072bf3e577dc49deb25b56e760
Author: Kai Luo <lkail at cn.ibm.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
A llvm/test/CodeGen/PowerPC/expand-isel-to-branch.ll
Log Message:
-----------
[PowerPC] Precommit test for #72845. NFC.
Commit: 4e347b4e38b95bc455d0e620e11ac58fc0172a94
https://github.com/llvm/llvm-project/commit/4e347b4e38b95bc455d0e620e11ac58fc0172a94
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
Log Message:
-----------
Revert "[RISCV][ISel] Combine scalable vector add/sub/mul with zero/sign extension (#72340)"
This reverts most of commit 5b155aea0e529b7b5c807e189fef6ea5cd5faec9.
I have left the new test file, but regenerated the checks.
This causes failures in our downstream testing. The input types
to the extends need to be checked so we don't create RISCVISD::VZEXT_VL
with illegal or unsupported input type.
Commit: 16124a3946c7f26fa4b25a5497ab68cc417950b3
https://github.com/llvm/llvm-project/commit/16124a3946c7f26fa4b25a5497ab68cc417950b3
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
A libc/src/__support/OSUtil/baremetal/CMakeLists.txt
A libc/src/__support/OSUtil/baremetal/io.h
A libc/src/__support/OSUtil/baremetal/quick_exit.h
M libc/src/__support/OSUtil/io.h
M libc/src/__support/OSUtil/quick_exit.h
Log Message:
-----------
[libc] `__stack_chk_fail` baremetal dependencies (#76412)
`__stack_chk_fail` uses `write_to_stderr` and `abort` but these
currently aren't included in baremetal targets resulting in a CMake
build error:
```
CMake Error at /llvm-project/libc/cmake/modules/LLVMLibCObjectRules.cmake:693 (target_link_libraries):
Target "libc.src.stdlib.abort" of type UTILITY may not be linked into
another target. One may link only to INTERFACE, OBJECT, STATIC or SHARED
libraries, or to executables with the ENABLE_EXPORTS property set.
Call Stack (most recent call first):
/llvm-project/libc/cmake/modules/LLVMLibCObjectRules.cmake:811 (create_entrypoint_object)
/llvm-project/libc/cmake/modules/LLVMLibCObjectRules.cmake:891 (expand_flags_for_entrypoint_object)
/llvm-project/libc/src/compiler/generic/CMakeLists.txt:1 (add_entrypoint_object)
CMake Error at /llvm-project/libc/cmake/modules/LLVMLibCLibraryRules.cmake:5 (get_target_property):
get_target_property() called with non-existent target
"libc.src.__support.OSUtil.osutil".
Call Stack (most recent call first):
/llvm-project/libc/cmake/modules/LLVMLibCLibraryRules.cmake:36 (collect_object_file_deps)
/llvm-project/libc/cmake/modules/LLVMLibCLibraryRules.cmake:36 (collect_object_file_deps)
/llvm-project/libc/cmake/modules/LLVMLibCLibraryRules.cmake:85 (collect_object_file_deps)
/llvm-project/libc/lib/CMakeLists.txt:26 (add_entrypoint_library)
```
To address these errors, we need to include `abort` in the list of
baremetal entrypoints. We also need to provide `write_to_stderr`
baremetal implementation, but this is challenging since there is no
uniform way to print a message on these platforms (sometimes there may
not be any way to print a message). We instead defer to
`__libc_log_write` which can be provided by the underlying platform. We
use a similar approach for `quick_exit`, defering to
`__libc_quick_exit`.
Commit: 214b434dc8e7b414f280e583943d267c857ce19a
https://github.com/llvm/llvm-project/commit/214b434dc8e7b414f280e583943d267c857ce19a
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M libc/src/__support/OSUtil/baremetal/io.h
M libc/src/__support/OSUtil/baremetal/quick_exit.h
Log Message:
-----------
[NFC][libc] Fix formatting for baremetal OSUtils
This reformats the headers to address formatting issues.
Commit: ed3e007a8759508973f9c67209958e219e515bf8
https://github.com/llvm/llvm-project/commit/ed3e007a8759508973f9c67209958e219e515bf8
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[CMake] Create generic runtimes targets as needed (#76096)
We currently create a generic runtime target for all subbuilds. For
example if we're building libcxx for aarch64-linux-gnu and
x86_64-linux-gnu, we would create the cxx target that would depend on
cxx-aarch64-linux-gnu and cxx-x86_64-linux-gnu. The current
implementation creates the generic runtimes targets ahead of time which
introduces an issue where different subbuilds enable different runtimes.
We should instead create the generic targets as needed.
Commit: 923f6ac018e3dd1c86bd4cee05e95680962e1446
https://github.com/llvm/llvm-project/commit/923f6ac018e3dd1c86bd4cee05e95680962e1446
Author: brendaso1 <119626341+brendaso1 at users.noreply.github.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll
Log Message:
-----------
[FastISel][AArch64] Compare Instruction Miscompilation Fix (#75993)
When shl is folded in compare instruction, a miscompilation occurs when
the CMP instruction is also sign-extended. For the following IR:
%op3 = shl i8 %op2, 3
%tmp3 = icmp eq i8 %tmp2, %op3
It used to generate
cmp w8, w9, sxtb #3
which means sign extend w9, shift left by 3, and then compare with the
value in w8. However, the original intention of the IR would require
`%op2` to first shift left before extending the operands in the
comparison operation . Moreover, if sign extension is used instead of
zero extension, the sample test would miscompile. This PR creates a fix
for the issue, more specifically to not fold the left shift into the CMP
instruction, and to create a zero-extended value rather than a
sign-extended value.
Commit: bbd57e18326b4c58072a113190afaadd147c679e
https://github.com/llvm/llvm-project/commit/bbd57e18326b4c58072a113190afaadd147c679e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SelectionDAG] Add initial plumbing for the disjoint flag. (#76751)
This copies the flag from IR to the SDNode in SelectionDAGBuilder, clears
the flag in SimplifyDemandedBits, and adds it to canCreateUndefOrPoison.
Uses of the flag will come in later patches.
Commit: 7e186d366d6c7def0543acc255931f617e76dff0
https://github.com/llvm/llvm-project/commit/7e186d366d6c7def0543acc255931f617e76dff0
Author: Weining Lu <luweining at loongson.cn>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[LoongArch] Fix the procossor series mask
Refer PRID_SERIES_MASK definition in linux kernel:
arch/loongarch/include/asm/cpu.h.
Commit: 5b5614c92fb2003a6b40edde4f036e2e65473561
https://github.com/llvm/llvm-project/commit/5b5614c92fb2003a6b40edde4f036e2e65473561
Author: David Green <david.green at arm.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fmul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
Log Message:
-----------
[AArch64][GlobalISel] Add legalization for vecreduce.fmul (#73309)
There are no native operations that we can use for floating point mul,
so lower by splitting the vector into chunks multiple times. There is
still a missing fold for fmul_indexed, that could help the gisel test
cases a bit.
Commit: d659bd1635326cfc52460e9a43e08953906903bb
https://github.com/llvm/llvm-project/commit/d659bd1635326cfc52460e9a43e08953906903bb
Author: David Green <david.green at arm.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/lib/Target/ARM/ARMLegalizerInfo.h
M llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
M llvm/lib/Target/Mips/MipsLegalizerInfo.h
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
M llvm/test/CodeGen/AArch64/fexplog.ll
M llvm/test/CodeGen/AArch64/fpmode.ll
M llvm/test/CodeGen/AArch64/fpow.ll
M llvm/test/CodeGen/AArch64/frem.ll
M llvm/test/CodeGen/AArch64/fsincos.ll
M llvm/test/CodeGen/AArch64/llvm.exp10.ll
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Log Message:
-----------
[GlobalISel][AArch64] Tail call libcalls. (#74929)
This tries to allow libcalls to be tail called, using a similar method
to DAG where the type is checked to make sure they match, and if so the
backend, through lowerCall checks that the tailcall is valid for all
arguments.
Commit: b7d5b0d0eeda9bc0c7e8c4a6ee2d4ab6b48eb736
https://github.com/llvm/llvm-project/commit/b7d5b0d0eeda9bc0c7e8c4a6ee2d4ab6b48eb736
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/CMakeLists.txt
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/LLJITWithRemoteDebugging.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.h
A llvm/test/Examples/OrcV2Examples/Inputs/argc_sub1.ll
R llvm/test/Examples/OrcV2Examples/Inputs/argc_sub1_elf.ll
M llvm/test/Examples/OrcV2Examples/lljit-with-remote-debugging.test
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
Log Message:
-----------
[Orc][examples] Revisit advanced LLJIT examples and tests (#76236)
Some maintenance on implementation and tests:
* Drop manual TargetMachineBuilder setup
* Drop addDebugSupport() in favor of Orc's enableDebuggerSupport()
* Check that debug support plugins append jit_code_entry
* Update and reduce sample input
Commit: c09e6905567a6b546bb2fd9e863511a8fb939b19
https://github.com/llvm/llvm-project/commit/c09e6905567a6b546bb2fd9e863511a8fb939b19
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M libc/fuzzing/stdlib/strtofloat_fuzz.cpp
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/src/__support/float_to_string.h
M libc/src/__support/str_to_float.h
M libc/src/math/generic/exp.cpp
M libc/src/math/generic/exp10.cpp
M libc/src/math/generic/exp2.cpp
M libc/src/math/generic/exp2f_impl.h
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/expm1.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/range_reduction.h
M libc/src/math/generic/tanhf.cpp
M libc/src/stdio/printf_core/float_dec_converter.h
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/math/FrexpTest.h
M libc/test/src/math/LogbTest.h
M libc/test/src/math/SqrtTest.h
M libc/test/src/math/smoke/FrexpTest.h
M libc/test/src/math/smoke/LogbTest.h
M libc/test/src/math/smoke/SqrtTest.h
M libc/utils/MPFRWrapper/MPFRUtils.cpp
Log Message:
-----------
[libc][NFC] Remove `FloatProperties` (#76508)
Access is now done through `FPBits` exclusively.
This patch also renames a few internal structs and uses `T` instead of
`FP` as a template parameter.
Commit: 3bcee8568a203c9c9a4c487ebdd0e95fea96f619
https://github.com/llvm/llvm-project/commit/3bcee8568a203c9c9a4c487ebdd0e95fea96f619
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
Log Message:
-----------
[AMDGPU] Global ISel for llvm.prefetch (#76183)
Commit: 89ddd94516c880715ec78833f02a7af5e2766cb6
https://github.com/llvm/llvm-project/commit/89ddd94516c880715ec78833f02a7af5e2766cb6
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrMisc.td
Log Message:
-----------
[X86][NFC] Simplify definitions of BLSR/BLSMSK/BEXTR/BZHI
This patch is to extract the NFC in #76709 into a separate commit.
Commit: c054d8f47d2642de722d64811d9908b6514ea012
https://github.com/llvm/llvm-project/commit/c054d8f47d2642de722d64811d9908b6514ea012
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
A llvm/test/MC/AArch64/SME2/bfadd-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfadd.s
A llvm/test/MC/AArch64/SME2/bfclamp-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfclamp.s
A llvm/test/MC/AArch64/SME2/bfmax-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmax.s
A llvm/test/MC/AArch64/SME2/bfmaxnm-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmaxnm.s
A llvm/test/MC/AArch64/SME2/bfmin-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmin.s
A llvm/test/MC/AArch64/SME2/bfminnm-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfminnm.s
A llvm/test/MC/AArch64/SME2/bfmla-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmla.s
A llvm/test/MC/AArch64/SME2/bfmls-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmls.s
A llvm/test/MC/AArch64/SME2/bfmopa-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmopa.s
A llvm/test/MC/AArch64/SME2/bfmops-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmops.s
A llvm/test/MC/AArch64/SME2/bfsub-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfsub.s
R llvm/test/MC/AArch64/SME2p1/bfadd-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfadd.s
R llvm/test/MC/AArch64/SME2p1/bfclamp-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfclamp.s
R llvm/test/MC/AArch64/SME2p1/bfmax-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmax.s
R llvm/test/MC/AArch64/SME2p1/bfmaxnm-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmaxnm.s
R llvm/test/MC/AArch64/SME2p1/bfmin-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmin.s
R llvm/test/MC/AArch64/SME2p1/bfminnm-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfminnm.s
R llvm/test/MC/AArch64/SME2p1/bfmla-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmla.s
R llvm/test/MC/AArch64/SME2p1/bfmls-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmls.s
R llvm/test/MC/AArch64/SME2p1/bfmopa-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmopa.s
R llvm/test/MC/AArch64/SME2p1/bfmops-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmops.s
R llvm/test/MC/AArch64/SME2p1/bfsub-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfsub.s
Log Message:
-----------
[AArch64][LLVM]SME2.1 non-widening BFloat instructions now depend on … (#76222)
…SME2 and FEAT_SVE_B16B16
This patch applies the latest changes in:
https://developer.arm.com/documentation/ddi0602/2023-09/SME-Instructions?lang=en
Commit: 5fc712c4bbe84e6cbaa1f7d2a0300f613f11b0c3
https://github.com/llvm/llvm-project/commit/5fc712c4bbe84e6cbaa1f7d2a0300f613f11b0c3
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/MC/AArch64/SVE2p1/pmov.s
Log Message:
-----------
[AArch64] Add PMOV aliases with implicit portion index (#76056)
In the latest ISA update the syntax of the PMOV instructions was updated
to allow the portion index to be optional, default to zero.
https://developer.arm.com/documentation/ddi0602/2023-09/SVE-Instructions/PMOV--to-predicate---Move-predicate-from-vector-?lang=en
https://developer.arm.com/documentation/ddi0602/2023-09/SVE-Instructions/PMOV--to-vector---Move-predicate-to-vector-?lang=en
Commit: 54378a7c2fd7f0ed0a3ea7ef08bc24896700e2c5
https://github.com/llvm/llvm-project/commit/54378a7c2fd7f0ed0a3ea7ef08bc24896700e2c5
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
Log Message:
-----------
[lldb][Windows] Fix -Wmissing-field-initializers warnings after 54981bb75d374 (#76255)
Commit: 40236257ea9d1e451daee5c0938bd23abd5d1450
https://github.com/llvm/llvm-project/commit/40236257ea9d1e451daee5c0938bd23abd5d1450
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/tools/lli/ExecutionUtils.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
Log Message:
-----------
[Orc] Deduplicate GDB JIT Interface declarations (NFC) (#76373)
https://github.com/llvm/llvm-project/pull/76236 introduced the forth
copy and it was time to deduplicate. This patch brings it back to 2,
one in OrcTargetProcess and one in legacy ExecutionEngine.
Commit: 665d1a0eb4e50cdc1b6f0f678a4c2b1e1875dc66
https://github.com/llvm/llvm-project/commit/665d1a0eb4e50cdc1b6f0f678a4c2b1e1875dc66
Author: Mitch Phillips <mitchp at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Object/WasmObjectFile.cpp
R llvm/test/tools/llvm-nm/wasm/linked.yaml
R llvm/test/tools/llvm-objdump/wasm/linked-symbol-table.yaml
Log Message:
-----------
Revert "[WebAssembly][Object]Use file offset as function symbol address for linked files (#76198)"
This reverts commit fc5f51cf5af4364b38bf22e491d46e1e892ade0c.
Reason: Broke the sanitizer buildbot -
https://lab.llvm.org/buildbot/#/builders/5/builds/39751/steps/12/logs/stdio
Commit: 3db749afcb5079dac332942a3e0b258cdb629a02
https://github.com/llvm/llvm-project/commit/3db749afcb5079dac332942a3e0b258cdb629a02
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/Analysis/errno-stdlibraryfunctions.c
Log Message:
-----------
[clang][analyzer] Improve 'errno' modeling of 'mkdtemp' (#76671)
Commit: 771fd1ad2a988e8bb586c2165d6877f06e5ed19b
https://github.com/llvm/llvm-project/commit/771fd1ad2a988e8bb586c2165d6877f06e5ed19b
Author: David Green <david.green at arm.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-vhadd.ll
Log Message:
-----------
[DAG] Extend input types if needed in combineShiftToAVG. (#76791)
This atempts to fix #76734 which is a crash in invalid TRUNC nodes types
from unoptimized input code in combineShiftToAVG. The NVT can be VT if
the larger type was legal and the adds will not overflow, in which case
the inputs should be extended.
>From what I can tell this appears to be valid (if not optimal for this
case): https://alive2.llvm.org/ce/z/fRieHR
The result has also been changed to getExtOrTrunc in case that VT==NVT,
which is not handled by SEXT/ZEXT.
Commit: 4444a7e89a1e1c750f25e1673d54627a56fe0f9f
https://github.com/llvm/llvm-project/commit/4444a7e89a1e1c750f25e1673d54627a56fe0f9f
Author: ChipsSpectre <maxi.hornung at t-online.de>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstCombine/and-xor-merge.ll
M llvm/test/Transforms/InstCombine/or-xor.ll
Log Message:
-----------
[InstSimplify] Simplify the expression `(a^c)&(a^~c)` to zero and (a^c) | (a^~c) to minus one (#76637)
Changes the InstSimplify pass of the LLVM optimizer, such that the
aforementioned expression is reduced to zero if c2==~c1.
Alive2: https://alive2.llvm.org/ce/z/xkQiid
Fixes https://github.com/llvm/llvm-project/issues/75692.
Commit: 58a335a3f12d55f48b86c03a33f414f593eb38d0
https://github.com/llvm/llvm-project/commit/58a335a3f12d55f48b86c03a33f414f593eb38d0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
Log Message:
-----------
[X86] Fold concat_vectors(permq(x),permq(x)) -> permq(concat_vectors(x,x))
Handle a common subvector shuffle pattern in combineConcatVectorOps
Commit: 39be138cb771f36a13ccbf96b55ae025ba821841
https://github.com/llvm/llvm-project/commit/39be138cb771f36a13ccbf96b55ae025ba821841
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
Log Message:
-----------
[X86] combineTargetShuffle - fold SHUF128(CONCAT(),CONCAT()) to peek through upper subvectors
If SHUF128 is accessing only the upper half of a vector source that is a concatenation/insert_subvector then try to access the subvector directly and adjust the element mask accordingly.
Commit: 43a5c4a10d19e7ecca4232966495aabc4e901559
https://github.com/llvm/llvm-project/commit/43a5c4a10d19e7ecca4232966495aabc4e901559
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M lldb/test/API/python_api/global_module_cache/TestGlobalModuleCache.py
Log Message:
-----------
[lldb][test] Skip other Global Module Cache tests on Arm/AArch64 Linux
These are expected to fail but sometimes crash during the test leaving them
as unresolved.
Same failure message and likely same cause as the other test in this file.
Commit: aba40fb34a27f1d36b4b541bf04d414dca7d1c4c
https://github.com/llvm/llvm-project/commit/aba40fb34a27f1d36b4b541bf04d414dca7d1c4c
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang/lib/Sema/SemaDecl.cpp
Log Message:
-----------
[coroutines] Do not check coroutine wrappers for skipped function bodies (#76729)
Without function bodies, we cannot tell whether a function is a
coroutine or not.
The analysis of coroutine wrappers is not useful when this information
is not available.
We therefore now skip this analysis for skipped function bodies.
Commit: df1b5ae31de5166cd525d4365bcbab9c58dea0f6
https://github.com/llvm/llvm-project/commit/df1b5ae31de5166cd525d4365bcbab9c58dea0f6
Author: Saiyedul Islam <Saiyedul.Islam at amd.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Update tests to check for COV5 (#76257)
Update GlobalISel tests to assume ABI to be code object version 5.
Commit: f90b6090048b277cad44dd49067c26deec3e110c
https://github.com/llvm/llvm-project/commit/f90b6090048b277cad44dd49067c26deec3e110c
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/test/Dialect/Linalg/transform-op-bufferize-to-allocation.mlir
M mlir/test/Dialect/Linalg/transform-op-match.mlir
M mlir/test/Dialect/Linalg/transform-op-pad.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/Dialect/Transform/test-interpreter.mlir
M mlir/test/Dialect/Transform/test-loop-transforms.mlir
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
M mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.td
Log Message:
-----------
[mlir] introduce transform.num_associations (#76723)
Add a new transform operation that creates a new parameter containing the number of payload objects (operations, values or attributes) associated with the argument. This is useful in matching and for debugging purposes. This replaces three ad-hoc operations previously provided by the test extension.
Commit: 0408a8578383539e9197cb27f59c876e474875f5
https://github.com/llvm/llvm-project/commit/0408a8578383539e9197cb27f59c876e474875f5
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[clang][analyzer][NFC] Improve release note (#76805)
Commit: 1d27669e8ad07f8f2372d5012384764f20a6f0cb
https://github.com/llvm/llvm-project/commit/1d27669e8ad07f8f2372d5012384764f20a6f0cb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
Log Message:
-----------
[X86] combineConcatVectorOps - fold 512-bit concat(blendi(x,y,c0),blendi(z,w,c1)) to AVX512BW mask select
Yet another yak shaving regression fix for #73509
Commit: d09315d986fea239e462da454334482abc4ad461
https://github.com/llvm/llvm-project/commit/d09315d986fea239e462da454334482abc4ad461
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/AliasSetTracker.h
M llvm/include/llvm/Analysis/AssumptionCache.h
M llvm/include/llvm/Analysis/BlockFrequencyInfo.h
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Analysis/CFGSCCPrinter.h
M llvm/include/llvm/Analysis/CallGraph.h
M llvm/include/llvm/Analysis/CallPrinter.h
M llvm/include/llvm/Analysis/CostModel.h
M llvm/include/llvm/Analysis/CycleAnalysis.h
M llvm/include/llvm/Analysis/DDG.h
M llvm/include/llvm/Analysis/DDGPrinter.h
M llvm/include/llvm/Analysis/Delinearization.h
M llvm/include/llvm/Analysis/DemandedBits.h
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/Analysis/IRSimilarityIdentifier.h
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/include/llvm/Analysis/InlineSizeEstimatorAnalysis.h
M llvm/include/llvm/Analysis/LazyCallGraph.h
M llvm/include/llvm/Analysis/LazyValueInfo.h
M llvm/include/llvm/Analysis/LoopCacheAnalysis.h
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/include/llvm/Analysis/LoopNestAnalysis.h
M llvm/include/llvm/Analysis/MemDerefPrinter.h
M llvm/include/llvm/Analysis/MemorySSA.h
M llvm/include/llvm/Analysis/ModuleDebugInfoPrinter.h
M llvm/include/llvm/Analysis/MustExecute.h
M llvm/include/llvm/Analysis/PhiValues.h
M llvm/include/llvm/Analysis/PostDominators.h
M llvm/include/llvm/Analysis/ProfileSummaryInfo.h
M llvm/include/llvm/Analysis/RegionInfo.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/StackLifetime.h
M llvm/include/llvm/Analysis/StackSafetyAnalysis.h
M llvm/include/llvm/Analysis/StructuralHash.h
M llvm/include/llvm/Analysis/UniformityAnalysis.h
M llvm/include/llvm/IR/Dominators.h
M llvm/include/llvm/Transforms/Scalar/IVUsersPrinter.h
M llvm/include/llvm/Transforms/Scalar/LoopAccessAnalysisPrinter.h
M llvm/include/llvm/Transforms/Utils/PredicateInfo.h
M llvm/lib/Target/DirectX/DXILResourceAnalysis.h
Log Message:
-----------
[opt][NewPM] Add isRequired to passes named as *PrinterPass (#76516)
Passes that print the result of analysis passes should be of interest, and
are expected to run even if a function for example is marked as optnone.
So when adding such passes explicitly to a pipeline it makes sense to
run the pass regardless of standard instrumentation gates such as
OptNoneInstrumentation.
In this patch all passes named as *PrinterPass are marked as required.
That should make sure that those passes are executed
without being skipped due to standard instrumentations.
The polly passes are not touched in this patch.
Partial fix for: https://github.com/llvm/llvm-project/issues/76762
Commit: 6b21948f26d69bad8c282db375906a8e0712d5f8
https://github.com/llvm/llvm-project/commit/6b21948f26d69bad8c282db375906a8e0712d5f8
Author: Rik Huijzer <github at huijzer.xyz>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
Log Message:
-----------
[mlir][vector] Fix invalid `LoadOp` indices being created (#76292)
Fixes https://github.com/llvm/llvm-project/issues/71326.
This is the second PR. The first PR at
https://github.com/llvm/llvm-project/pull/75519 was reverted because an
integration test failed. The failed integration test was simplified and
added to the core MLIR tests. Compared to the first PR, the current PR
uses a more reliable approach. In summary, the current PR determines the
mask indices by looking up the _mask_ buffer load indices from the
previous iteration, whereas `main` looks up the indices for the _data_
buffer. The mask and data indices can differ when using a
`permutation_map`.
The cause of the issue was that a new `LoadOp` was created which looked
something like:
```mlir
func.func main(%arg1 : index, %arg2 : index) {
%alloca_0 = memref.alloca() : memref<vector<1x32xi1>>
%1 = vector.type_cast %alloca_0 : memref<vector<1x32xi1>> to memref<1xvector<32xi1>>
%2 = memref.load %1[%arg1, %arg2] : memref<1xvector<32xi1>>
return
}
```
which crashed inside the `LoadOp::verify`. Note here that `%alloca_0` is
the mask as can be seen from the `i1` element type and note it is 0
dimensional. Next, `%1` has one dimension, but `memref.load` tries to
index it with two indices.
This issue occured in the following code (a simplified version of the
bug report):
```mlir
#map1 = affine_map<(d0, d1, d2, d3) -> (d0, 0, 0, d3)>
func.func @main(%subview: memref<1x1x1x1xi32>, %mask: vector<1x1xi1>) -> vector<1x1x1x1xi32> {
%c0 = arith.constant 0 : index
%c0_i32 = arith.constant 0 : i32
%3 = vector.transfer_read %subview[%c0, %c0, %c0, %c0], %c0_i32, %mask {permutation_map = #map1}
: memref<1x1x1x1xi32>, vector<1x1x1x1xi32>
return %3 : vector<1x1x1x1xi32>
}
```
After this patch, it is lowered to the following by
`-convert-vector-to-scf`:
```mlir
func.func @main(%arg0: memref<1x1x1x1xi32>, %arg1: vector<1x1xi1>) -> vector<1x1x1x1xi32> {
%c0_i32 = arith.constant 0 : i32
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
%alloca = memref.alloca() : memref<vector<1x1x1x1xi32>>
%alloca_0 = memref.alloca() : memref<vector<1x1xi1>>
memref.store %arg1, %alloca_0[] : memref<vector<1x1xi1>>
%0 = vector.type_cast %alloca : memref<vector<1x1x1x1xi32>> to memref<1xvector<1x1x1xi32>>
%1 = vector.type_cast %alloca_0 : memref<vector<1x1xi1>> to memref<1xvector<1xi1>>
scf.for %arg2 = %c0 to %c1 step %c1 {
%3 = vector.type_cast %0 : memref<1xvector<1x1x1xi32>> to memref<1x1xvector<1x1xi32>>
scf.for %arg3 = %c0 to %c1 step %c1 {
%4 = vector.type_cast %3 : memref<1x1xvector<1x1xi32>> to memref<1x1x1xvector<1xi32>>
scf.for %arg4 = %c0 to %c1 step %c1 {
%5 = memref.load %1[%arg2] : memref<1xvector<1xi1>>
%6 = vector.transfer_read %arg0[%arg2, %c0, %c0, %c0], %c0_i32, %5 {in_bounds = [true]} : memref<1x1x1x1xi32>, vector<1xi32>
memref.store %6, %4[%arg2, %arg3, %arg4] : memref<1x1x1xvector<1xi32>>
}
}
}
%2 = memref.load %alloca[] : memref<vector<1x1x1x1xi32>>
return %2 : vector<1x1x1x1xi32>
}
```
What was causing the problems is that one dimension of the data buffer
`%alloca` (eltype `i32`) is unpacked (`vector.type_cast`) inside the
outmost loop (loop with index variable `%arg2`) and the nested loop
(loop with index variable `%arg3`), whereas the mask buffer `%alloca_0`
(eltype `i1`) is not unpacked in these loops.
Before this patch, the load indices would be determined by looking up
the load indices for the *data* buffer load op. However, as shown in the
specific example, when a permutation map is specified then the load
indices from the data buffer load op start to differ from the indices
for the mask op. To fix this, this patch ensures that the load indices
for the *mask* buffer are used instead.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 11a702d215bf3fe5d185b9005e76c76c3001dd0c
https://github.com/llvm/llvm-project/commit/11a702d215bf3fe5d185b9005e76c76c3001dd0c
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/include/llvm/Analysis/MemorySSA.h
M llvm/include/llvm/Analysis/RegionInfo.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/IR/Dominators.h
M llvm/include/llvm/IR/SafepointIRVerifier.h
M llvm/include/llvm/Transforms/Utils/PredicateInfo.h
Log Message:
-----------
[opt][NewPM] Add isRequired to passes named as *VerifierPass (#76517)
In this patch all passes named as *VerifierPass are being marked as
required. That should make sure that the passes are executed without
being skipped due to standard instrumentations.
For example
opt -passes='verify<loops>,verify<scalar-evolution>' ...
will no longer skip running the verifications for functions marked as
optnone.
Partial fix for: https://github.com/llvm/llvm-project/issues/76762
Commit: 7dc0ba949c1527808b7ceea58bdd72c9f3e2e300
https://github.com/llvm/llvm-project/commit/7dc0ba949c1527808b7ceea58bdd72c9f3e2e300
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/test/Analysis/LoopInfo/annotated-parallel-simple.ll
Log Message:
-----------
[LoopInfo][NewPM] Print function name in LoopPrinterPass (#76527)
The legacy pass manager printed the function name when printing
loop info (via -analyze option). Like this:
Printing analysis 'Natural Loop Information' for function 'func':
Loop at depth 1 containing: ...
Loop at depth 2 containing: ...
Make sure we print such a first line including the function name
also when using the new pass manager version of LoopPrinterPass.
The format of the string is changed slightly, so now we say:
Loop info for function 'func':
Loop at depth 1 containing: ...
Loop at depth 2 containing: ...
This was originally requested in
https://discourse.llvm.org/t/need-usage-help-w-new-pass-manager-for-opt-analysis-natural-loop-information/75874/7
and also mentioned in
https://github.com/llvm/llvm-project/issues/76762
Commit: 98624914367bf9091919de330cf322fb6d5e468f
https://github.com/llvm/llvm-project/commit/98624914367bf9091919de330cf322fb6d5e468f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
A llvm/test/Analysis/BasicAA/inttoptr_constexpr.ll
Log Message:
-----------
[BasicAA] Add tests for #76789 (NFC)
Commit: 3fbef5b8e98f7365e9424339f53950eb6c1b3c3c
https://github.com/llvm/llvm-project/commit/3fbef5b8e98f7365e9424339f53950eb6c1b3c3c
Author: Ying Yi <ying.yi at sony.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/include/llvm/Bitstream/BitstreamWriter.h
Log Message:
-----------
Fixed a signed integer overflow in BitstreamWriter.h which is found by UBSAN.
https://github.com/llvm/llvm-project/pull/75213
Commit: 923ff5574826767af8145aae361ca5d710c16e65
https://github.com/llvm/llvm-project/commit/923ff5574826767af8145aae361ca5d710c16e65
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/lib/Tooling/Tooling.cpp
Log Message:
-----------
[Tooling] Print the progress when there are multiple files to process (#75904)
Running clang tools on a single file can be slow. It is even worse when
running multiple files, to improve the user experience, we print the
processing status.
Commit: 6023e2476b5cb2fd84dcb74d805ae2e322160111
https://github.com/llvm/llvm-project/commit/6023e2476b5cb2fd84dcb74d805ae2e322160111
Author: NimishMishra <42909663+NimishMishra at users.noreply.github.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M flang/lib/Semantics/check-select-type.cpp
M flang/test/Semantics/selecttype01.f90
Log Message:
-----------
[flang] Error out when assumed rank variable in used as selector in SELECT TYPE statement (#74286)
This patch adds a check to error out when an assumed rank variable is
used as dummy argument.
Fixes https://github.com/llvm/llvm-project/issues/74285
Commit: 3ae3e40706aad2ce92002a0da24e39d271feb42b
https://github.com/llvm/llvm-project/commit/3ae3e40706aad2ce92002a0da24e39d271feb42b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Analysis/ConstraintSystem.cpp
Log Message:
-----------
[ConstraintSystem] Drop left-over parentheses. (NFC)
Remove left over redundant parentheses after 9b6127d7 as pointed out by
@nikic.
Commit: a93c17c9ab7aa7b394313898e0db7aae6adeeaa4
https://github.com/llvm/llvm-project/commit/a93c17c9ab7aa7b394313898e0db7aae6adeeaa4
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
Log Message:
-----------
[llvm-jitlink-executor] Drop else block after noreturn-if (NFC) (#76689)
NFC follow-up from https://github.com/llvm/llvm-project/pull/76236
Commit: ec7a231b30e5dcbaa2fe20ba9a793bffed4ea2cf
https://github.com/llvm/llvm-project/commit/ec7a231b30e5dcbaa2fe20ba9a793bffed4ea2cf
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/test/Transforms/Util/add-TLI-mappings.ll
Log Message:
-----------
[TLI] Use the VFABI demangling when declaring vector variants. (#76753)
When creating a declaration for a vector variant, in order to determine
the argument types we need to consult the VFABI demangler. This will
allow us to add TLI mappings with linear arguments (see #76060).
Commit: b3d26426b06ee74bf79f766375a37c384aa0132b
https://github.com/llvm/llvm-project/commit/b3d26426b06ee74bf79f766375a37c384aa0132b
Author: James Y Knight <jyknight at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
NFC: Reflow comment for readability.
Commit: 7837110ed8efdd510516c849178a7af28b93aea4
https://github.com/llvm/llvm-project/commit/7837110ed8efdd510516c849178a7af28b93aea4
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/Hover.cpp
M clang-tools-extra/clangd/IncludeCleaner.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/ParsedAST.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/FileIndex.cpp
M clang-tools-extra/clangd/unittests/FileIndexTests.cpp
M clang-tools-extra/clangd/unittests/IncludeCleanerTests.cpp
M clang-tools-extra/clangd/unittests/TestTU.cpp
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/Record.h
M clang-tools-extra/include-cleaner/lib/Record.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
Log Message:
-----------
[clangd] Track IWYU pragmas for non-preamble includes (#75612)
This makes PragmaIncldues copyable, and copies it from preamble when
building a
new AST.
Fixes https://github.com/clangd/clangd/issues/1843
Fixes https://github.com/clangd/clangd/issues/1571
Commit: 329ba523ccbbe68a12434926c92fd9a86494d958
https://github.com/llvm/llvm-project/commit/329ba523ccbbe68a12434926c92fd9a86494d958
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/include/llvm/LTO/LTO.h
M llvm/lib/LTO/LTO.cpp
Log Message:
-----------
[LTO][NFC] Free the GlobalResolutions map after final use (#76780)
The GlobalResolutions map was found to contribute ~9% of the peak
memory of a large thin link. However, we are essentially done with it
when we are about to compute cross module imports, which itself adds to
the peak memory due to the import and export lists (there is one use
just after importing but it can easily be moved before importing).
Move the last use up above importing, and free the GlobalResolutions
map after that (and before importing). To help guard against future
inadvertent use after it has been released, change it to a
std::optional.
Commit: 82e33d6203f62c0be16f8da8d4178e7fa9e790ea
https://github.com/llvm/llvm-project/commit/82e33d6203f62c0be16f8da8d4178e7fa9e790ea
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/lib/Target/AMDGPU/DSDIRInstructions.td
R llvm/lib/Target/AMDGPU/LDSDIRInstructions.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll
A llvm/test/MC/AMDGPU/gfx12_asm_vdsdir.s
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vdsdir.txt
Log Message:
-----------
[AMDGPU] Add VDSDIR instructions for GFX12 (#75197)
Commit: c1eab57673ef3eb2842c0fbe454d7878854cf54c
https://github.com/llvm/llvm-project/commit/c1eab57673ef3eb2842c0fbe454d7878854cf54c
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/include/mlir/IR/Operation.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/unittests/IR/OpPropertiesTest.cpp
Log Message:
-----------
[mlir] fix Operation::getDiscardableAttrs in absence of properties (#76816)
When properties are not enabled in an operation, inherent attributes are
stored in the common dictionary with discardable attributes. However,
`getDiscardableAttrs` and `getDiscardableAttrDictionary` were returning
the entire dictionary, making the caller mistakenly believe that all
inherent attributes are discardable. Fix this by filtering out
attributes whose names are registered with the operation, i.e., inherent
attributes. This requires an API change so `getDiscardableAttrs` returns
a filter range.
Commit: 21fe8b635cfb04de486a3c4ca22eb9f5a5ed78ad
https://github.com/llvm/llvm-project/commit/21fe8b635cfb04de486a3c4ca22eb9f5a5ed78ad
Author: Balaji V. Iyer <43187390+bviyer at users.noreply.github.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
Log Message:
-----------
[mlir] Check if the stride tensor is empty. (#76428)
Added a check to see if the stride tensor is empty. If so then return
false for isContiguousSlice function.
Possible fix for #74463
Commit: 55d5ba905da0db55282dd3985761ddf3dd452fd1
https://github.com/llvm/llvm-project/commit/55d5ba905da0db55282dd3985761ddf3dd452fd1
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[NFC] Fix compilation in C++20 mode with GCC 12
I ran into the following compiler error when trying to build with GCC 12
and `-DCMAKE_CXX_STANDARD=20`:
```
llvm-project/clang/lib/Sema/SemaChecking.cpp:16690:16: required from here
/usr/include/c++/12/type_traits:971:30: error: default member initializer for '{anonymous}::SequenceChecker::Usage::UsageExpr' required before the end of its enclosing class
```
The error seems correct, GCC just instantiates the `SmallDenseMap`
early and detects it. Clang does not, but that's an acceptable
implementation difference as far as the standard is concerned.
Move constructor outside the class to avoid this problem.
Commit: c17af94b9619997ce7c060ff112988e0ec218c10
https://github.com/llvm/llvm-project/commit/c17af94b9619997ce7c060ff112988e0ec218c10
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElim] Use SmallDenseMap (NFC)
The number of variables in the constraint is usually very small.
Use SmallDenseMap to avoid allocations.
Commit: b07bf16a6f57b5bfa487d2291dc246ada37b0dfc
https://github.com/llvm/llvm-project/commit/b07bf16a6f57b5bfa487d2291dc246ada37b0dfc
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Analysis/AssumptionCache.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
Log Message:
-----------
[AssumptionCache] Add affected values for separate_storage (#76806)
Add the underlying object of both separate_storage arguments as affected
values. This allows us to use assumptionsFor() in BasicAA, which will be
more efficient if there are many assumes in the function.
Commit: f557f05b8dea6d915dba23f310c25655a403735e
https://github.com/llvm/llvm-project/commit/f557f05b8dea6d915dba23f310c25655a403735e
Author: Alex Zinenko <zinenko at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/lib/Interfaces/InferTypeOpInterface.cpp
Log Message:
-----------
[mlir] update InferTypeOpInterface after c1eab57673ef3e
The change in c1eab57673ef3eb2842c0fbe454d7878854cf54c fixed the
behavior of `getDiscardableAttrDictionary` for ops that are not using
properties to only return discardable attributes. `InferTypeOpInterface`
was relying on the wrong behavior when constructing an adaptor and would
assume that all attributes were discardable, which is not the case.
Commit: a3977c92376ecec1838262eca68d0def14a4e14d
https://github.com/llvm/llvm-project/commit/a3977c92376ecec1838262eca68d0def14a4e14d
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/index/SymbolCollector.cpp
A clang-tools-extra/clangd/test/GH75115.test
Log Message:
-----------
[clangd] check for synthesized symbols when tracking include locations (#75128)
This fixes https://github.com/llvm/llvm-project/issues/75115
In C mode with MSVC compatibility, when the `assert` macro is defined,
as a workaround, `static_assert` is implicitly defined as well, if not
already so, in order to work around a broken `assert.h` implementation.
This workaround was implemented in
https://github.com/llvm/llvm-project/commit/8da090381d567d0ec555840f6b2a651d2997e4b3
A synthesized symbol does not occur in source code, and therefore should
not have valid source location, but this was not checked when inserting
this into a `symbol -> include file` map.
The invalid FileID value is used for empty key representation in the
include file hash table, so it's not valid to insert it.
Commit: 0faf46befa7c07e58034ef8c6a7cd4bd5715de0a
https://github.com/llvm/llvm-project/commit/0faf46befa7c07e58034ef8c6a7cd4bd5715de0a
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
Log Message:
-----------
[coroutines][DPValue] Update DILocation in DPValue for hoisted dbg.declare (#76765)
Follow up #75402 to cover DPValue
Commit: cba217a9138aa8ea8d18111b648acde8f52ada8d
https://github.com/llvm/llvm-project/commit/cba217a9138aa8ea8d18111b648acde8f52ada8d
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaInit.cpp
R clang/test/SemaCXX/crash-GH76228.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
Log Message:
-----------
Revert "Reapply "[Sema] Fix crash on invalid code with parenthesized aggregate initialization" (#76272)"
This reverts commit 02347fc7191ff4d073f439dde6523add3f5496de.
These changes break the libc++ CI again.
I'll look at a better solution later.
Commit: a8f43974260ec244d78336d2530f8fc097753580
https://github.com/llvm/llvm-project/commit/a8f43974260ec244d78336d2530f8fc097753580
Author: Yuxuan Chen <yuxuanchen1997 at outlook.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/TreeTransform.h
A clang/test/SemaCXX/template-instantiation.cpp
Log Message:
-----------
[Clang] Fix ICE where C++ Template Instantiation failed to handle attributed lambdas (#76523)
This PR is proposing a fix for
https://github.com/llvm/llvm-project/issues/76521.
Clang used to assume that during template instantiation, Lambda
expressions can only have `FunctionProtoTypeLoc`s. However, this is not
true for certain attributes like `__attribute__((pcs("aapcs-vfp")))`,
whose interpretation happens after template instantiation. This PR
changes the transformation logic for lambdas.
Commit: ece1359857c547a156ed743643bccbfd0f09bf2a
https://github.com/llvm/llvm-project/commit/ece1359857c547a156ed743643bccbfd0f09bf2a
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
R llvm/test/CodeGen/PowerPC/coalescer-remat-with-undef-implicit-def-operand.mir
Log Message:
-----------
Revert "[PowerPC] Add test after #75271 on PPC. NFC. (#75616)"
This reverts commit 5cfc7b3342ce4de0bbe182b38baa8a71fc83f8f8.
This depends on 0e46b49de43349f8cbb2a7d4c6badef6d16e31ae which is being reverted.
Commit: c4146121e940b6b853148c780568dee38b97382f
https://github.com/llvm/llvm-project/commit/c4146121e940b6b853148c780568dee38b97382f
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
R llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness.ll
M llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
R llvm/test/CodeGen/X86/coalescing-subreg-to-reg-requires-subrange-update.mir
R llvm/test/CodeGen/X86/subreg-to-reg-coalescing.mir
Log Message:
-----------
Revert "Reapply "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG""
This reverts commit 0e46b49de43349f8cbb2a7d4c6badef6d16e31ae.
Causes crashes, see repro on https://github.com/llvm/llvm-project/commit/0e46b49de43349f8cbb2a7d4c6badef6d16e31ae.
Commit: 3f9f8efc548d4a1dbd289bcf5fafe644d5f5c8f8
https://github.com/llvm/llvm-project/commit/3f9f8efc548d4a1dbd289bcf5fafe644d5f5c8f8
Author: Hugo Melder <service at hugomelder.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/include/clang/Basic/ObjCRuntime.h
M clang/test/CodeGenObjC/messages.m
A clang/test/Driver/gnustep-dispatch-method.m
Log Message:
-----------
ObjcRuntime.h: Add mips64, aarch64, and riscv64 to non-legacy dispatch (#76694)
This PR updates the list of architectures for which libobjc2 has
fast-path objc_msgSend implementations.
Related to: https://github.com/gnustep/libobjc2/pull/261
Commit: 76cb0bb7a4540ca7f09b779cc9c3f8694a1ebbd4
https://github.com/llvm/llvm-project/commit/76cb0bb7a4540ca7f09b779cc9c3f8694a1ebbd4
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/Transforms/Transforms.h
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Tensor/simplify-pack-unpack.mlir
Log Message:
-----------
[mlir][tensor] Add a pattern to simplify tensor.unpack to collpase shape (#76607)
Commit: 03e29a49d9827532499234e3e460e2b5b29a11a7
https://github.com/llvm/llvm-project/commit/03e29a49d9827532499234e3e460e2b5b29a11a7
Author: Puyan Lotfi <34139736+plotfi at users.noreply.github.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/include/mlir/Pass/PassManager.h
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/Pass/Pass.cpp
M mlir/lib/Pass/PassCrashRecovery.cpp
M mlir/lib/Pass/PassDetail.h
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
A mlir/test/Pass/crashless-reproducer.mlir
Log Message:
-----------
[mlir][Pass] Enable the option for reproducer generation without crashing (#75421)
This PR adds API `makeReproducer` and cl::opt flag
`--mlir-generate-reproducer=<filename>` in order to allow for mlir
reproducer dumps even when the pipeline doesn't crash.
This PR also decouples the code that handles generation of an MLIR
reproducer from the crash recovery portion. The purpose is to allow for
generating reproducers outside of the context of a compiler crash.
This will be useful for frameworks and runtimes that use MLIR where it
is needed to reproduce the pipeline behavior for reasons outside of
diagnosing crashes. An example is for diagnosing performance issues
using offline tools, where being able to dump the reproducer from a
runtime compiler would be helpful.
Commit: fc0fdd1ae20062e4d77c1b7ffc5b06773c752815
https://github.com/llvm/llvm-project/commit/fc0fdd1ae20062e4d77c1b7ffc5b06773c752815
Author: Alex Zinenko <zinenko at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/lib/IR/AsmPrinter.cpp
M mlir/unittests/IR/OpPropertiesTest.cpp
Log Message:
-----------
[mlir] fix AsmPrinter after c1eab57673ef3e
The change in c1eab57673ef3eb2842c0fbe454d7878854cf54c fixed the
behavior of `getDiscardableAttrDictionary` for ops that are not using
properties to only return discardable attributes. AsmPrinter was relying
on the wrong behavior when printing such ops in the generic form,
assuming all attributes are discardable.
Commit: 5930725c891b60f5fb94058c6c08a55a2e03d83e
https://github.com/llvm/llvm-project/commit/5930725c891b60f5fb94058c6c08a55a2e03d83e
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/CMakeLists.txt
M mlir/examples/minimal-opt/README.md
M mlir/include/mlir/Config/mlir-config.h.cmake
M mlir/include/mlir/Conversion/LLVMCommon/TypeConverter.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
A mlir/include/mlir/IR/PDLPatternMatch.h.inc
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Dialect/Bufferization/TransformOps/CMakeLists.txt
M mlir/lib/IR/CMakeLists.txt
A mlir/lib/IR/PDL/CMakeLists.txt
A mlir/lib/IR/PDL/PDLPatternMatch.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/lib/Rewrite/ByteCode.h
M mlir/lib/Rewrite/CMakeLists.txt
M mlir/lib/Rewrite/FrozenRewritePatternSet.cpp
M mlir/lib/Rewrite/PatternApplicator.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/tools/mlir-lsp-server/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir] Add config for PDL (#69927)
Make it so that PDL in pattern rewrites can be optionally disabled.
PDL is still enabled by default and not optional bazel. So this should
be a NOP for most folks, while enabling other to disable.
This is piped through mlir-tblgen invocation and that could be
changed/avoided by splitting up the passes file instead.
This only works with tests disabled. With tests enabled this still
compiles but tests fail as there is no lit config to disable tests that
depend on PDL rewrites yet.
Commit: b49e0ebedfefa2f3323081425016ca2ada902263
https://github.com/llvm/llvm-project/commit/b49e0ebedfefa2f3323081425016ca2ada902263
Author: max <maksim.levental at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/CMakeLists.txt
M mlir/examples/minimal-opt/README.md
M mlir/include/mlir/Config/mlir-config.h.cmake
M mlir/include/mlir/Conversion/LLVMCommon/TypeConverter.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
R mlir/include/mlir/IR/PDLPatternMatch.h.inc
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Dialect/Bufferization/TransformOps/CMakeLists.txt
M mlir/lib/IR/CMakeLists.txt
R mlir/lib/IR/PDL/CMakeLists.txt
R mlir/lib/IR/PDL/PDLPatternMatch.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/lib/Rewrite/ByteCode.h
M mlir/lib/Rewrite/CMakeLists.txt
M mlir/lib/Rewrite/FrozenRewritePatternSet.cpp
M mlir/lib/Rewrite/PatternApplicator.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/tools/mlir-lsp-server/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Revert "[mlir] Add config for PDL (#69927)"
This reverts commit 5930725c891b60f5fb94058c6c08a55a2e03d83e.
Commit: e8df7e2c1adad376647ba6776e39b019003370a6
https://github.com/llvm/llvm-project/commit/e8df7e2c1adad376647ba6776e39b019003370a6
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/test/MC/AArch64/FP8/dot.s
Log Message:
-----------
[LLVM][AArch64][tblgen]: Make operand suffix case-insinsitive (#76808)
Ex: `fdot v26.8H, v22.16B, v9.2B[0]` should be equivalent to `fdot
v26.8h, v22.16b, v9.2b[0]`
Commit: ee94e548a1e82c4d519fe2a4d96dfa08b697195c
https://github.com/llvm/llvm-project/commit/ee94e548a1e82c4d519fe2a4d96dfa08b697195c
Author: Craig Hesling <craig at hesling.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M .github/workflows/README.md
M .github/workflows/docs.yml
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[GitHub] Fix minor typos in .github/workflows (#76592)
Fix one spelling typo and remove second newline from end of files.
Commit: 7c963fde16d8ba340d6a6ed044b9c775f9bfab48
https://github.com/llvm/llvm-project/commit/7c963fde16d8ba340d6a6ed044b9c775f9bfab48
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/gather_extract_from_vectorbuild.ll
Log Message:
-----------
[SLP]Use revectorized value for extracts from buildvector, beeing
vectorized.
If the insertelement instruction is vectorized, and the extractelement
instruction from such insertelement also vectorized as part of the same
tree, need to extract from the corresponding for insertelement vectorized value rather than original insertelement instruction.
Commit: 7fbc1de9896029636dd572a692ee90ba88285943
https://github.com/llvm/llvm-project/commit/7fbc1de9896029636dd572a692ee90ba88285943
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/p5.cpp
Log Message:
-----------
[Clang][Sema] Diagnose unexpanded packs in the template argument lists of function template specializations (#76677)
This diagnoses unexpanded packs in the _unqualified-id_ of a function
template specialization's _declarator-id_. For example:
```cpp
template<typename... Ts>
struct A
{
template<typename U>
void f();
template<>
void f<Ts>(); // error: explicit specialization contains unexpanded parameter pack 'Ts'
};
```
I moved the handling of template-id's so it happens right after we
determine whether we are declaring a function template/function template
specialization so diagnostics are issued in lexical order.
Commit: 47a1704ac94c8aeb1aa7e0fc438ff99d36b632c6
https://github.com/llvm/llvm-project/commit/47a1704ac94c8aeb1aa7e0fc438ff99d36b632c6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/addsub-constant-folding.ll
M llvm/test/CodeGen/X86/or-lea.ll
Log Message:
-----------
[SelectionDAG][X86] Use disjoint flag in SelectionDAG::isADDLike. (#76847)
Keep the haveNoCommonBitsSet check because we haven't started inferring
the flag yet.
I've added tests for two transforms, but these are not the only
transforms that use isADDLike.
Commit: f64d1c810a2b8d89c3760cefb957da499c087404
https://github.com/llvm/llvm-project/commit/f64d1c810a2b8d89c3760cefb957da499c087404
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/mem.ll
Log Message:
-----------
[RISCV] Add test cases for folding disjoint Or into a scalar load address. NFC
After 47a1704ac94c8aeb1aa7e0fc438ff99d36b632c6 we are able to
reassociate a disjoint Or used as a GEP index to get the constant
closer to a load to fold it. This is show by the first test.
We are not able to do this if the GEP created a shift left to scale
the index as the second test shows.
To make this work, we need to preserve the disjoint flag when pulling
the Or through the shift.
Commit: ddd6acd7a8e9296544bce49af7178f3eeb318e61
https://github.com/llvm/llvm-project/commit/ddd6acd7a8e9296544bce49af7178f3eeb318e61
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/test/Conversion/GPUCommon/memref-arg-attrs.mlir
Log Message:
-----------
[mlir][GPU] Expand LLVM function attribute copies (#76755)
Expand the copying of attributes on GPU kernel arguments during LLVM
lowering.
Support copying attributes from values that are already LLVM pointers.
Support copying attributes, like `noundef`, that aren't specific to (the
pointer parts of) arguments.
Commit: 92e211ab33417dc061bfbce910fd2c2419e11efa
https://github.com/llvm/llvm-project/commit/92e211ab33417dc061bfbce910fd2c2419e11efa
Author: David Goldblatt <davidgoldblatt at fb.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
Log Message:
-----------
[BasicAA] Enable separate storage hints by default (#76864)
As requested in
https://github.com/llvm/llvm-project/pull/76770#pullrequestreview-1801649466
A few months of experimentation in a large codebase did not reveal any
significant build speed regressions, and b07bf16 speeds up hint lookup
even further.
Co-authored-by: David Goldblatt <davidgoldblatt at meta.com>
Commit: 6dda74cc51dd33e266101bccd3647658e5ab3c35
https://github.com/llvm/llvm-project/commit/6dda74cc51dd33e266101bccd3647658e5ab3c35
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Use createSelect in adjustRecipesForReductions (NFCI).
Simplify the code and rename Result->NewExitingVPV as suggested by
@ayalz in https://github.com/llvm/llvm-project/pull/70253.
Commit: a24c58140fbd73d5b98f8fa88cf9a9dbf0613a41
https://github.com/llvm/llvm-project/commit/a24c58140fbd73d5b98f8fa88cf9a9dbf0613a41
Author: Muhammad Omair Javaid <omair.javaid at linaro.org>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/cmake/modules/TableGen.cmake
M mlir/CMakeLists.txt
M mlir/cmake/modules/AddMLIR.cmake
M mlir/cmake/modules/CMakeLists.txt
M mlir/cmake/modules/MLIRConfig.cmake.in
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
M mlir/lib/Dialect/Linalg/IR/CMakeLists.txt
M mlir/tools/mlir-linalg-ods-gen/CMakeLists.txt
Log Message:
-----------
Revert "[mlir] Consider mlir-linalg-ods-gen as a tablegen tool in build (#75093)"
This reverts commit 9191ac0bdb07643eefcc161c88b66d4e7058db9c.
Breaks build on following buildbot:
https://lab.llvm.org/buildbot/#/builders/177/builds/27432
Commit: bdcd7c0ba032873be92bce96e02ebb82a0675616
https://github.com/llvm/llvm-project/commit/bdcd7c0ba032873be92bce96e02ebb82a0675616
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/mem.ll
Log Message:
-----------
[DAGCombiner][RISCV] Preserve disjoint flag in folding (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2) (#76860)
Since we are shifting both inputs to the original Or by the same amount
and inserting zeros in the LSBs, the result should still be disjoint.
Commit: 39298b09ec99ccc300530529f254256c7178f479
https://github.com/llvm/llvm-project/commit/39298b09ec99ccc300530529f254256c7178f479
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/docs/Dialects/Transform.md
M mlir/docs/Tutorials/transform/Ch1.md
M mlir/docs/Tutorials/transform/Ch2.md
M mlir/docs/Tutorials/transform/Ch3.md
M mlir/docs/Tutorials/transform/ChH.md
M mlir/docs/Tutorials/transform/_index.md
Log Message:
-----------
[mlir][docs] Capitalize "Transform" in "transform dialect" (#76840)
A mix of "Transform dialect" and "transform dialect" is used ATM. This
patch capitalizes the outstanding instances of "transform".
Commit: 155d5849da2b2bfa2da918923d8f148a96c03e72
https://github.com/llvm/llvm-project/commit/155d5849da2b2bfa2da918923d8f148a96c03e72
Author: Ahmed Bougacha <ahmed at bougacha.org>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/store-swift-async-context-clobber-live-reg.ll
Log Message:
-----------
[AArch64] Avoid jump tables in swiftasync clobber-live-reg test. NFC.
The upstream test relies on jump-tables, which are lowered in
dramatically different ways with later arm64e/ptrauth patches.
Concretely, it's failing for at least two reasons:
- ptrauth removes x16/x17 from tcGPR64 to prevent indirect tail-calls
from using either register as the callee, conflicting with their usage
as scratch for the tail-call LR auth checking sequence. In the
1/2_available_regs_left tests, this causes the MI scheduler to move
the load up across some of the inlineasm register clobbers.
- ptrauth adds an x16/x17-using pseudo for jump-table dispatch, which
looks somewhat different from the regular jump-table dispatch codegen
by itself, but also prevents compression currently.
They seem like sensible changes. But they mean the tests aren't really
testing what they're intented to, because there's always an implicit
x16/x17 clobber when using jump-tables.
This updates the test in a way that should work identically regardless
of ptrauth support, with one exception, #1 above, which merely reorders
the load/inlineasm w.r.t. eachother.
I verified the tests still fail the live-reg assertions when
applicable.
Commit: 09de5e5c6d8c25fe76840c69056afca72275dd6b
https://github.com/llvm/llvm-project/commit/09de5e5c6d8c25fe76840c69056afca72275dd6b
Author: Yuxuan Chen <yuxuanchen1997 at outlook.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/test/SemaCXX/template-instantiation.cpp
Log Message:
-----------
[Clang] Fix failing CI with different test case attribute & host triple (#76863)
As in title,
https://github.com/llvm/llvm-project/commit/a8f43974260ec244d78336d2530f8fc097753580
broke CI due to the calling convention not available on certain targets.
This patch uses a simpler calling convention and enables the test only
when the attribute exists. It's verified that this test crashes the
compiler before a8f43974260ec244d78336d2530f8fc097753580 so it's the
same effect as the previous test. Disabling the test on platforms that
don't have the calling convention is fine because it's guarding against
a frontend bug.
Commit: 49029f926d359075d59ad4aec2d01a21d9514b02
https://github.com/llvm/llvm-project/commit/49029f926d359075d59ad4aec2d01a21d9514b02
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M lldb/source/Breakpoint/BreakpointResolverAddress.cpp
M lldb/test/API/functionalities/breakpoint/serialize/TestBreakpointSerialization.py
Log Message:
-----------
[lldb] Fix breakpoint resolver serialization bug (#76766)
BreakpointResolverAddress optionally can include the module name related
to the address that gets resolved. Currently this will never work
because it sets the name to itself (which is empty).
Commit: 49b492048af2b2093aaed899c0bbd6d740aad83c
https://github.com/llvm/llvm-project/commit/49b492048af2b2093aaed899c0bbd6d740aad83c
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/pk_max_f16_literal.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p.s
M llvm/test/MC/AMDGPU/literalv216.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p.txt
Log Message:
-----------
AMDGPU: Fix packed 16-bit inline constants (#76522)
Consistently treat packed 16-bit operands as 32-bit values, because
that's really what they are. The attempt to treat them differently was
ultimately incorrect and lead to miscompiles, e.g. when using non-splat
constants such as (1, 0) as operands.
Recognize 32-bit float constants for i/u16 instructions. This is a bit
odd conceptually, but it matches HW behavior and SP3.
Remove isFoldableLiteralV216; there was too much magic in the dependency
between it and its use in SIFoldOperands. Instead, we now simply rely on
checking whether a constant is an inline constant, and trying a bunch of
permutations of the low and high halves. This is more obviously correct
and leads to some new cases where inline constants are used as shown by
tests.
Move the logic for switching packed add vs. sub into SIFoldOperands.
This has two benefits: all logic that optimizes for inline constants in
packed math is now in one place; and it applies to both SelectionDAG and
GISel paths.
Disable the use of opsel with v_dot* instructions on gfx11. They are
documented to ignore opsel on src0 and src1. It may be interesting to
re-enable to use of opsel on src2 as a future optimization.
A similar "proper" fix of what inline constants mean could potentially
be applied to unpacked 16-bit ops. However, it's less clear what the
benefit would be, and there are surely places where we'd have to
carefully audit whether values are properly sign- or zero-extended. It
is best to keep such a change separate.
Fixes: Corruption in FSR 2.0 (latent bug exposed by an LLPC change)
Commit: 3f2e670671e718579cf98f1bf0087b6d0ee4919c
https://github.com/llvm/llvm-project/commit/3f2e670671e718579cf98f1bf0087b6d0ee4919c
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/p5.cpp
Log Message:
-----------
Revert "[Clang][Sema] Diagnose unexpanded packs in the template argument lists of function template specializations" (#76876)
Reverts llvm/llvm-project#76677
See discussion here: https://github.com/llvm/llvm-project/pull/76677
Commit: a25b66217f41564f933dd1d6d2993d990615c47b
https://github.com/llvm/llvm-project/commit/a25b66217f41564f933dd1d6d2993d990615c47b
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.h
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/unittests/tools/llvm-exegesis/Common/AssemblerUtils.h
Log Message:
-----------
[NFC][llvm-exegesis] Remove redundant register initial values argument
This patch removes the redundant RegisterInitialValues parameter from
assembleToStream and friends as it is included within the BenchmarkKey
struct that is also passed to all the functions that need this
information.
Commit: 428cf71ffa01c579e0ebf66b7d74eb9cb8d8f3f8
https://github.com/llvm/llvm-project/commit/428cf71ffa01c579e0ebf66b7d74eb9cb8d8f3f8
Author: Derek Schuff <dschuff at chromium.org>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Object/WasmObjectFile.cpp
A llvm/test/tools/llvm-nm/wasm/linked.yaml
A llvm/test/tools/llvm-objdump/wasm/linked-symbol-table.yaml
Log Message:
-----------
Reland "[WebAssembly][Object]Use file offset as function symbol address for linked files (#76198)"
WebAssembly doesn't have a single virtual memory space the way other object
formats or architectures do, so "addresses" mean different things depending
on the context.
Function symbol addresses in object files are offsets from the start of the code
section. This is good for linking and relocation. However when dealing with
linked binaries, offsets from the start of the file/module are more often
used (e.g. for stack traces in browsers), and are more useful for use
cases like binary size attribution. This PR changes Object to use
the file offset instead of the section offset for function symbols, but
only for linked (non-DSO) files.
This is a reland of fc5f51cf with a fix for the MSan failure (it was not caused
by this change, but it was revealed by the new tests).
Commit: 7a4c49756db161ebcce08c7bc860a569aad7f276
https://github.com/llvm/llvm-project/commit/7a4c49756db161ebcce08c7bc860a569aad7f276
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
Log Message:
-----------
[mlir][mesh] Use one type for mesh axis (#76830)
Make all ops and attributes use the types MeshAxis and MeshAxesAttr
instead of int16_t, int32_t, DenseI16ArrayAttr and DenseI32ArrayAttr.
Commit: e68a0320a1592bf408ac6458efa2d1c548cfed7a
https://github.com/llvm/llvm-project/commit/e68a0320a1592bf408ac6458efa2d1c548cfed7a
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M libc/src/signal/linux/signal_utils.h
Log Message:
-----------
[libc] fix -Wcast-function-type via union rather than reinterpret_cast (#76875)
The GCC build is producing the following diagnostic:
llvm-project/libc/src/signal/linux/signal_utils.h: In member function
‘__llvm_libc_18_0_0_git::KernelSigaction&
__llvm_libc_18_0_0_git::KernelSigaction::operator=(const sigaction&)’:
llvm-project/libc/src/signal/linux/signal_utils.h:38:20: warning:
cast between incompatible function types from ‘void (*)(int, siginfo_t*,
void*)’ to ‘void (*)(int)’ [-Wcast-function-type]
38 | sa_handler = reinterpret_cast<HandlerType *>(sa.sa_sigaction);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
llvm-project/libc/src/signal/linux/signal_utils.h: In member function
‘__llvm_libc_18_0_0_git::KernelSigaction::operator sigaction() const’:
llvm-project/libc/src/signal/linux/signal_utils.h:51:25: warning:
cast between incompatible function types from ‘void (*)(int)’ to ‘void
(*)(int, siginfo_t*, void*)’ [-Wcast-function-type]
51 | sa.sa_sigaction = reinterpret_cast<SiginfoHandlerType
*>(sa_handler);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Two issues here:
1. Clang supports -Wcast-function-type, but not as part of the -Wextra
group.
2. The existing implementation tried to work around the oddity that is
the
kernel's struct sigaction != POSIX via reinterpret_cast in a way that's
not
compatible with -Wcast-function-type. Just use a union which is well
defined
(and two function pointers are the same size.)
Link: https://github.com/llvm/llvm-project/issues/76872
Fixes: https://github.com/llvm/llvm-project/issues/74617
Commit: bdaedffc43a608ef5fdc8a0e0c524be0a3a8f72e
https://github.com/llvm/llvm-project/commit/bdaedffc43a608ef5fdc8a0e0c524be0a3a8f72e
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/breakpoint/serialize/TestBreakpointSerialization.py
Log Message:
-----------
[lldb] Speculatively fix TestBreakpointSerialization on Windows
See: https://lab.llvm.org/buildbot/#/builders/219/builds/7961/steps/6/logs/stdio
Commit: ddfbca8b08941125b48039236a03635252298611
https://github.com/llvm/llvm-project/commit/ddfbca8b08941125b48039236a03635252298611
Author: YunQiang Su <wzssyqa at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/test/Driver/mips-features.c
Log Message:
-----------
Clang/MIPS: Use -mnan value for -mabs if not specified (#71157)
On most hardware, FCSR.ABS2008 is set the value same with FCSR.NAN2008.
Let's use this behaivor by default.
With this commit, `clang -target mips -mnan=2008 -c fabs.c` will imply
`-mabs=2008`.
And of course, `clang -mnan=2008 -mabs=legacy` can continue workable
like previous.
Co-authored-by: YunQiang Su <yunqiang.su at cipunited.com>
Commit: 7df28fd61aa4603846b3ce16f9f988ccc780a584
https://github.com/llvm/llvm-project/commit/7df28fd61aa4603846b3ce16f9f988ccc780a584
Author: Micah Weston <micahsweston at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/docs/Extensions.rst
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/test/CodeGen/X86/basic-block-sections-labels-empty-function.ll
A llvm/test/CodeGen/X86/basic-block-sections-labels-pgo-features.ll
Log Message:
-----------
[SHT_LLVM_BB_ADDR_MAP][AsmPrinter] Implements PGOAnalysisMap emitting in AsmPrinter with tests. (#75202)
Uses machine analyses to emit PGOAnalysisMap into the bb-addr-map ELF
section. Implements filecheck tests to verify emitting new fields.
This patch emits optional PGO related analyses into the bb-addr-map ELF
section during AsmPrinter. This currently supports Function Entry Count,
Machine Block Frequencies. and Machine Branch Probabilities. Each is
independently enabled via the `feature` byte of `bb-addr-map` for the given
function.
A part of [RFC - PGO Accuracy Metrics: Emitting and Evaluating Branch and Block Analysis](https://discourse.llvm.org/t/rfc-pgo-accuracy-metrics-emitting-and-evaluating-branch-and-block-analysis/73902).
Commit: dd9681f839c23e9caa6c495fb5a0df3625715348
https://github.com/llvm/llvm-project/commit/dd9681f839c23e9caa6c495fb5a0df3625715348
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrUtils.td
A llvm/test/MC/Disassembler/X86/apx/adx.txt
A llvm/test/MC/Disassembler/X86/apx/dec.txt
A llvm/test/MC/Disassembler/X86/apx/inc.txt
A llvm/test/MC/X86/apx/adx-att.s
A llvm/test/MC/X86/apx/adx-intel.s
A llvm/test/MC/X86/apx/dec-att.s
A llvm/test/MC/X86/apx/dec-intel.s
A llvm/test/MC/X86/apx/inc-att.s
A llvm/test/MC/X86/apx/inc-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][MC] Support encoding/decoding for APX variant INC/DEC/ADCX/ADOX instructions (#76721)
Four variants: promoted legacy, ND (new data destination), NF (no flags
update) and NF_ND (NF + ND).
The syntax of NF instructions is aligned with GNU binutils.
https://sourceware.org/pipermail/binutils/2023-September/129545.html
Commit: ddf0096a92e4c2852fd57321f02cbd78e596943c
https://github.com/llvm/llvm-project/commit/ddf0096a92e4c2852fd57321f02cbd78e596943c
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrShiftRotate.td
M llvm/test/MC/Disassembler/X86/apx/amx-tile.txt
A llvm/test/MC/Disassembler/X86/apx/bmi2.txt
A llvm/test/MC/Disassembler/X86/apx/cet.txt
M llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt
R llvm/test/MC/Disassembler/X86/apx/invept.txt
M llvm/test/MC/Disassembler/X86/apx/invpcid.txt
R llvm/test/MC/Disassembler/X86/apx/invvpid.txt
M llvm/test/MC/Disassembler/X86/apx/movdir64b.txt
M llvm/test/MC/Disassembler/X86/apx/movdiri.txt
R llvm/test/MC/Disassembler/X86/apx/mulx.txt
R llvm/test/MC/Disassembler/X86/apx/rorx.txt
R llvm/test/MC/Disassembler/X86/apx/sarx.txt
A llvm/test/MC/Disassembler/X86/apx/sha.txt
R llvm/test/MC/Disassembler/X86/apx/sha1msg1.txt
R llvm/test/MC/Disassembler/X86/apx/sha1msg2.txt
R llvm/test/MC/Disassembler/X86/apx/sha1nexte.txt
R llvm/test/MC/Disassembler/X86/apx/sha1rnds4.txt
R llvm/test/MC/Disassembler/X86/apx/sha256msg1.txt
R llvm/test/MC/Disassembler/X86/apx/sha256msg2.txt
R llvm/test/MC/Disassembler/X86/apx/sha256rnds2.txt
R llvm/test/MC/Disassembler/X86/apx/shlx.txt
R llvm/test/MC/Disassembler/X86/apx/shrx.txt
A llvm/test/MC/Disassembler/X86/apx/vmx.txt
R llvm/test/MC/Disassembler/X86/apx/wrssd.txt
R llvm/test/MC/Disassembler/X86/apx/wrssq.txt
R llvm/test/MC/Disassembler/X86/apx/wrussd.txt
R llvm/test/MC/Disassembler/X86/apx/wrussq.txt
M llvm/test/MC/X86/apx/amx-tile-att.s
M llvm/test/MC/X86/apx/amx-tile-intel.s
A llvm/test/MC/X86/apx/bmi2-att.s
A llvm/test/MC/X86/apx/bmi2-intel.s
A llvm/test/MC/X86/apx/cet-att.s
A llvm/test/MC/X86/apx/cet-intel.s
M llvm/test/MC/X86/apx/cmpccxadd-att.s
M llvm/test/MC/X86/apx/cmpccxadd-intel.s
R llvm/test/MC/X86/apx/invept-att.s
R llvm/test/MC/X86/apx/invept-intel.s
M llvm/test/MC/X86/apx/invpcid-att.s
M llvm/test/MC/X86/apx/invpcid-intel.s
R llvm/test/MC/X86/apx/invvpid-att.s
R llvm/test/MC/X86/apx/invvpid-intel.s
M llvm/test/MC/X86/apx/movdir64b-att.s
M llvm/test/MC/X86/apx/movdir64b-intel.s
M llvm/test/MC/X86/apx/movdiri-att.s
M llvm/test/MC/X86/apx/movdiri-intel.s
R llvm/test/MC/X86/apx/mulx-att.s
R llvm/test/MC/X86/apx/mulx-intel.s
R llvm/test/MC/X86/apx/pdep-att.s
R llvm/test/MC/X86/apx/pdep-intel.s
R llvm/test/MC/X86/apx/pext-att.s
R llvm/test/MC/X86/apx/pext-intel.s
R llvm/test/MC/X86/apx/rorx-att.s
R llvm/test/MC/X86/apx/rorx-intel.s
R llvm/test/MC/X86/apx/sarx-att.s
R llvm/test/MC/X86/apx/sarx-intel.s
A llvm/test/MC/X86/apx/sha-att.s
A llvm/test/MC/X86/apx/sha-intel.s
R llvm/test/MC/X86/apx/sha1msg1-att.s
R llvm/test/MC/X86/apx/sha1msg1-intel.s
R llvm/test/MC/X86/apx/sha1msg2-att.s
R llvm/test/MC/X86/apx/sha1msg2-intel.s
R llvm/test/MC/X86/apx/sha1nexte-att.s
R llvm/test/MC/X86/apx/sha1nexte-intel.s
R llvm/test/MC/X86/apx/sha1rnds4-att.s
R llvm/test/MC/X86/apx/sha1rnds4-intel.s
R llvm/test/MC/X86/apx/sha256msg1-att.s
R llvm/test/MC/X86/apx/sha256msg1-intel.s
R llvm/test/MC/X86/apx/sha256msg2-att.s
R llvm/test/MC/X86/apx/sha256msg2-intel.s
R llvm/test/MC/X86/apx/sha256rnds2-att.s
R llvm/test/MC/X86/apx/sha256rnds2-intel.s
R llvm/test/MC/X86/apx/shlx-att.s
R llvm/test/MC/X86/apx/shlx-intel.s
R llvm/test/MC/X86/apx/shrx-att.s
R llvm/test/MC/X86/apx/shrx-intel.s
A llvm/test/MC/X86/apx/vmx-att.s
A llvm/test/MC/X86/apx/vmx-intel.s
R llvm/test/MC/X86/apx/wrssd-att.s
R llvm/test/MC/X86/apx/wrssd-intel.s
R llvm/test/MC/X86/apx/wrssq-att.s
R llvm/test/MC/X86/apx/wrssq-intel.s
R llvm/test/MC/X86/apx/wrussd-att.s
R llvm/test/MC/X86/apx/wrussd-intel.s
R llvm/test/MC/X86/apx/wrussq-att.s
R llvm/test/MC/X86/apx/wrussq-intel.s
Log Message:
-----------
[NFC][X86] Reorg MC tests for APX promoted instrs (#76697)
As suggested in https://github.com/llvm/llvm-project/pull/76210, this
patch re-organize the mc tests for apx promoted instrs, instr tests
within same cpuid would be listed in one test.
Also add explicit prefix {evex} tests and 8 displacement memory test,
promoted instrs need set No_CD8 to avoid AVX512 compress encoding.
Commit: 53edf12e526704cc251b6a6917319c7cb7a653a0
https://github.com/llvm/llvm-project/commit/53edf12e526704cc251b6a6917319c7cb7a653a0
Author: Jerry Wu <cheyuw at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/unittests/Dialect/CMakeLists.txt
A mlir/unittests/Dialect/Linalg/CMakeLists.txt
A mlir/unittests/Dialect/Linalg/LinalgInterfacesTest.cpp
Log Message:
-----------
[mlir] Add `res()` method to `linalg::ContractionOpInterface` (#76539)
In addition to `lhs()` and `rhs()` to return left and right operands,
add `res()` to return the result value.
Commit: cda388c4407e0fe42faa82c015ee77da160ebd25
https://github.com/llvm/llvm-project/commit/cda388c4407e0fe42faa82c015ee77da160ebd25
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/test/CodeGen/MLRegAlloc/dev-mode-extra-features-logging.ll
Log Message:
-----------
[mlgo] Fix test post PR #76697
Opcode values changed, trivial fix.
Commit: 6ae7f66ff5169ddc5a7b9ab545707042c77e036c
https://github.com/llvm/llvm-project/commit/6ae7f66ff5169ddc5a7b9ab545707042c77e036c
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M mlir/CMakeLists.txt
M mlir/examples/minimal-opt/README.md
M mlir/include/mlir/Config/mlir-config.h.cmake
M mlir/include/mlir/Conversion/LLVMCommon/TypeConverter.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
A mlir/include/mlir/IR/PDLPatternMatch.h.inc
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/ComplexToLibm/CMakeLists.txt
M mlir/lib/Conversion/MathToLibm/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/TransformOps/CMakeLists.txt
M mlir/lib/IR/CMakeLists.txt
A mlir/lib/IR/PDL/PDLPatternMatch.cpp
M mlir/lib/IR/PatternMatch.cpp
M mlir/lib/Rewrite/ByteCode.h
M mlir/lib/Rewrite/CMakeLists.txt
M mlir/lib/Rewrite/FrozenRewritePatternSet.cpp
M mlir/lib/Rewrite/PatternApplicator.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/CMakeLists.txt
M mlir/test/lib/Rewrite/CMakeLists.txt
M mlir/test/lib/Tools/PDLL/CMakeLists.txt
M mlir/test/lib/Transforms/CMakeLists.txt
M mlir/tools/mlir-lsp-server/CMakeLists.txt
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir] Add config for PDL (#69927)
Make it so that PDL in pattern rewrites can be optionally disabled.
PDL is still enabled by default and not optional bazel. So this should
be a NOP for most folks, while enabling other to disable.
This only works with tests disabled. With tests enabled this still
compiles but tests fail as there is no lit config to disable tests that
depend on PDL rewrites yet.
Commit: 42ec976184acd40436acd7104ad715c60ca3e7ed
https://github.com/llvm/llvm-project/commit/42ec976184acd40436acd7104ad715c60ca3e7ed
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M clang/docs/ClangFormat.rst
M clang/test/Format/clang-format-ignore.cpp
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
[clang-format] Optimize processing .clang-format-ignore files (#76733)
Reuse the patterns governing the previous input file being formatted if
the current input file is from the same directory.
Commit: 80889ae0297453476f600d6a8cf776f272dac461
https://github.com/llvm/llvm-project/commit/80889ae0297453476f600d6a8cf776f272dac461
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-03 (Wed, 03 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Log Message:
-----------
[RISCV] Remove RISCVISD::VSELECT_VL. (#76866)
We can use RISCVISD::VMERGE_VL with an undef passthru operand.
I had to rewrite the FMA patterns to handle both undef and non-undef
cases so we can get the tail policy.
Commit: 0ce193708cb682f3ad742ad909d8a5346a505ac7
https://github.com/llvm/llvm-project/commit/0ce193708cb682f3ad742ad909d8a5346a505ac7
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/minmax-of-minmax.ll
Log Message:
-----------
[InstCombine] Refactor folding of commutative binops over select/phi/minmax (#76692)
This patch cleans up the duplicate code for folding commutative binops
over `select/phi/minmax`.
Related commits:
+ select support:
https://github.com/llvm/llvm-project/commit/88cc35b27e6c7966ab2463fa06d3dd970e88df64
+ phi support:
https://github.com/llvm/llvm-project/commit/8674a023bcacb677ce48b8831e2ae35b5aa2d8ef
+ minmax support:
https://github.com/llvm/llvm-project/commit/624973806c5644ccfa84805319b5852edb68d48d
Commit: cd28da390f8b8dedd00f9a2a383ec81e90436841
https://github.com/llvm/llvm-project/commit/cd28da390f8b8dedd00f9a2a383ec81e90436841
Author: Nilanjana Basu <n_basu at apple.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_estimated_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_known_tc.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
Log Message:
-----------
[LV] Change loops' interleave count computation (#73766)
[LV] Change loops' interleave count computation
A set of microbenchmarks in llvm-test-suite (https://github.com/llvm/llvm-test-suite/pull/56), when tested on a AArch64 platform, demonstrates that loop interleaving is beneficial when the vector loop runs at least twice or when the epilogue loop trip count (TC) is minimal. Therefore, we choose interleaving count (IC) between TC/VF & TC/2*VF (VF = vectorization factor), such that remainder TC for the epilogue loop is minimum while the IC is maximum in case the remainder TC is same for both.
The initial tests for this change were submitted in PRs:
https://github.com/llvm/llvm-project/pull/70272 and https://github.com/llvm/llvm-project/pull/74689.
Commit: 55395f5c8375d3fce1ccbf0ab75f3539c56d61c7
https://github.com/llvm/llvm-project/commit/55395f5c8375d3fce1ccbf0ab75f3539c56d61c7
Author: sstipanovic <146831748+sstipanovic at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
A llvm/test/CodeGen/AMDGPU/image-atomic-attributes.ll
Log Message:
-----------
[AMDGPU] Remove `nosync` from image atomic intrinsics. (#76814)
Remove `nosync` as discussed in
https://github.com/llvm/llvm-project/pull/73613
Commit: 5550e9c841465c54c6f28e246d835daf3520a2ca
https://github.com/llvm/llvm-project/commit/5550e9c841465c54c6f28e246d835daf3520a2ca
Author: David Green <david.green at arm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/fpowi.ll
Log Message:
-----------
[GlobalISel][AArch64] Add libcall lowering for fpowi. (#67114)
This adds legalization, notably libcall lowering for fpowi. It is a
little different to other methods as the function takes both a float and
integer register. Otherwise all vectors get scalarized and fp16 is
promoted to fp32.
Commit: 176c341198cbfa05debc3554e958ea90e0ef3cc9
https://github.com/llvm/llvm-project/commit/176c341198cbfa05debc3554e958ea90e0ef3cc9
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/bfloat.ll
Log Message:
-----------
[X86][BF16] Add 32-bit tests to show ABI problem, NFC
Commit: 0cdaadf15aaa6609f93e3508417b47baa3891996
https://github.com/llvm/llvm-project/commit/0cdaadf15aaa6609f93e3508417b47baa3891996
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M openmp/libomptarget/test/lit.cfg
Log Message:
-----------
[libomptarget][flang] Explicitly pass the OpenMP device libraries to tests (#76796)
This pull request is a follow-up of patch:
https://github.com/llvm/llvm-project/pull/68225 and it explicitly
specifies OpenMP device libraries for Fortran OpenMP tests.
Commit: 75365b2e189a54b96a907ebe327c5898dd7aad14
https://github.com/llvm/llvm-project/commit/75365b2e189a54b96a907ebe327c5898dd7aad14
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/AVR.h
M clang/test/CodeGen/avr/avr-inline-asm-constraints.c
M clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c
Log Message:
-----------
[clang][AVR] Restrict range of assembly constraint 'G' (#76561)
According to
https://www.nongnu.org/avr-libc/user-manual/inline_asm.html, 'G' only
represents floating point constant '0.0'. And avr-gcc also rejects other
non-zero FP values.
Commit: 18c0f59b3eeed880384aa37c7feca2064b994f37
https://github.com/llvm/llvm-project/commit/18c0f59b3eeed880384aa37c7feca2064b994f37
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream-non-posix-function.c
M clang/test/Analysis/stream-note.c
M clang/test/Analysis/stream-stdlibraryfunctionargs.c
M clang/test/Analysis/stream.c
Log Message:
-----------
[clang][analyzer] Support 'fdopen' in the StreamChecker (#76776)
Commit: 8c72ff716b3e4b298695fa3faf6add860c6dbcb2
https://github.com/llvm/llvm-project/commit/8c72ff716b3e4b298695fa3faf6add860c6dbcb2
Author: bgra8 <32298056+bgra8 at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M libcxx/include/__format/format_arg_store.h
M libcxx/test/libcxx/system_reserved_names.gen.py
Log Message:
-----------
[NFC] Renames a template parameter to avoid clashes with userspace names. (#76829)
Co-authored-by: Bogdan Graur <bgraur at google.com>
Commit: f3f4387e02b0ed637b5d843e8937116334329a65
https://github.com/llvm/llvm-project/commit/f3f4387e02b0ed637b5d843e8937116334329a65
Author: gmh <13917777+gmh5225 at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
M lldb/unittests/Thread/ThreadTest.cpp
Log Message:
-----------
[lldb][NFC] Fix compilation issue on windows (#76453)
Commit: 232be5129b205b0eefee52b7ff930d597298bbfc
https://github.com/llvm/llvm-project/commit/232be5129b205b0eefee52b7ff930d597298bbfc
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
[NFC][llvm-exegesis] Fix comment text
I'm reasonably confident iff wasn't an abbreviation for if and only if
here and it was starting to bug me quite a bit.
Commit: f8c034140b577c81ddaff3eec9e4af0db1c6c355
https://github.com/llvm/llvm-project/commit/f8c034140b577c81ddaff3eec9e4af0db1c6c355
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/docs/Tutorials/transform/Ch0.md
Log Message:
-----------
[mlir][docs] Update TD tutorial - Ch0 (#76858)
Updates `generic` as `linalg.generic` (for consistency and to avoid
ambiguity) and a few other fixes.
Commit: 3737712daeef9581e6388fad24f4fb56d89ce032
https://github.com/llvm/llvm-project/commit/3737712daeef9581e6388fad24f4fb56d89ce032
Author: Sergei Lebedev <185856+superbobry at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
Log Message:
-----------
Slightly improved ir.pyi type annotations (#76728)
* Replaced `Any` with static types where appropriate
* Removed undocumented `__str__` and `__repr__` -- these are always
defined via `object`
Commit: dd4dc2111e2a788046b0db81eb274f53591313ff
https://github.com/llvm/llvm-project/commit/dd4dc2111e2a788046b0db81eb274f53591313ff
Author: Chen Zheng <czhengsz at cn.ibm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
A llvm/test/CodeGen/PowerPC/pr47155-47156.ll
Log Message:
-----------
nfc add cases for pr47156 and pr47155
Commit: 87f1cf04cde146634f060167fb57fedf63b99ce5
https://github.com/llvm/llvm-project/commit/87f1cf04cde146634f060167fb57fedf63b99ce5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
A llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-multiples.ll
Log Message:
-----------
[ConstraintElim] Add tests for int phi with non-one step (NFC)
Commit: 7954c57124b495fbdc73674d71f2e366e4afe522
https://github.com/llvm/llvm-project/commit/7954c57124b495fbdc73674d71f2e366e4afe522
Author: Jannik Silvanus <37809848+jasilvanus at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/IR/GetElementPtrTypeIterator.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/Local.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/ExecutionEngine/Interpreter/Execution.cpp
M llvm/lib/IR/DataLayout.cpp
M llvm/lib/IR/Operator.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/test/Transforms/InstCombine/getelementptr.ll
Log Message:
-----------
[IR] Fix GEP offset computations for vector GEPs (#75448)
Vectors are always bit-packed and don't respect the elements' alignment
requirements. This is different from arrays. This means offsets of
vector GEPs need to be computed differently than offsets of array GEPs.
This PR fixes many places that rely on an incorrect pattern
that always relies on `DL.getTypeAllocSize(GTI.getIndexedType())`.
We replace these by usages of `GTI.getSequentialElementStride(DL)`,
which is a new helper function added in this PR.
This changes behavior for GEPs into vectors with element types for which
the (bit) size and alloc size is different. This includes two cases:
* Types with a bit size that is not a multiple of a byte, e.g. i1.
GEPs into such vectors are questionable to begin with, as some elements
are not even addressable.
* Overaligned types, e.g. i16 with 32-bit alignment.
Existing tests are unaffected, but a miscompilation of a new test is fixed.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 2bd6642533ce858c07f1c412e1b8a669c17afb54
https://github.com/llvm/llvm-project/commit/2bd6642533ce858c07f1c412e1b8a669c17afb54
Author: drblallo <blalloscompany at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
M mlir/test/Analysis/DataFlow/test-next-access.mlir
Log Message:
-----------
[mlir][dataflow]Fix dense backward dataflow intraprocedural hook (#76865)
The dataflow analysis framework within MLIR allows to customize the
transfer function when a `call-like` operation is encuntered.
The check to see if the analysis was executed in intraprocedural mode
was executed after the check to see if the callee had the
CallableOpInterface, and thus intraprocedural analyses would behave as
interpocedural ones when performing indirect calls.
This commit fixes the issue by performing the check for
intraprocedurality first.
Dense forward analyses were already behaving correctly.
https://github.com/llvm/llvm-project/blob/main/mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp#L63
Co-authored-by: massimo <mo.fioravanti at gmail.com>
Commit: 0c23163184e098e1aac128cbbd7b4c2b4bd6bb26
https://github.com/llvm/llvm-project/commit/0c23163184e098e1aac128cbbd7b4c2b4bd6bb26
Author: Mitch Phillips <mitchp at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/unittests/Dialect/CMakeLists.txt
R mlir/unittests/Dialect/Linalg/CMakeLists.txt
R mlir/unittests/Dialect/Linalg/LinalgInterfacesTest.cpp
Log Message:
-----------
Revert "[mlir] Add `res()` method to `linalg::ContractionOpInterface` (#76539)"
This reverts commit 53edf12e526704cc251b6a6917319c7cb7a653a0.
Reason: Broke the sanitizer buildbots with a memory leak. More
information available on
https://github.com/llvm/llvm-project/commit/53edf12e526704cc251b6a6917319c7cb7a653a0
Commit: b4ac4d2264123ab2672a9efed99068df8fb750aa
https://github.com/llvm/llvm-project/commit/b4ac4d2264123ab2672a9efed99068df8fb750aa
Author: sstipanovic <146831748+sstipanovic at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
A llvm/test/Assembler/amdgpu-image-atomic-attributes.ll
R llvm/test/CodeGen/AMDGPU/image-atomic-attributes.ll
Log Message:
-----------
[NFC][AMDGPU] Move image-atomic-attributes test to test/Assembler. (#76917)
Commit: 26993f61673e3d9b29785f9baa5bac50c09f8bcf
https://github.com/llvm/llvm-project/commit/26993f61673e3d9b29785f9baa5bac50c09f8bcf
Author: Mitch Phillips <mitchp at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/docs/ClangFormat.rst
M clang/test/Format/clang-format-ignore.cpp
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
Revert "[clang-format] Optimize processing .clang-format-ignore files (#76733)"
This reverts commit 42ec976184acd40436acd7104ad715c60ca3e7ed.
Reason: Broke the sanitizer buildbots. See more information on the
github comment thread at
https://github.com/llvm/llvm-project/commit/42ec976184acd40436acd7104ad715c60ca3e7ed
Commit: 985bb3a20a788b3cda3256084fbdef20296ba8cb
https://github.com/llvm/llvm-project/commit/985bb3a20a788b3cda3256084fbdef20296ba8cb
Author: Alex Zinenko <zinenko at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/lib/Bytecode/Writer/BytecodeWriter.cpp
M mlir/lib/Bytecode/Writer/IRNumbering.cpp
M mlir/unittests/Bytecode/BytecodeTest.cpp
Log Message:
-----------
[mlir] fix bytecode writer after c1eab57673ef3eb28
The change in c1eab57 fixed the
behavior of `getDiscardableAttrDictionary` for ops that are not using
properties to only return discardable attributes. Bytecode writer was
relying on the wrong behavior and would assume all attributes are
discardable, without appropriate testing. Fix that and add a test.
Commit: 5ed11e767c0c39a3bc8e035588e7a383849d46a8
https://github.com/llvm/llvm-project/commit/5ed11e767c0c39a3bc8e035588e7a383849d46a8
Author: Alex Zinenko <zinenko at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/lib/Bytecode/Writer/IRNumbering.cpp
Log Message:
-----------
[mlir] don't use magic numbers in IRNumbering.cpp
Bytecode versions have named constants that should be used instead of
magic numbers.
Commit: ce61b0e9a41fb55beaef04610967ccc7b69307f8
https://github.com/llvm/llvm-project/commit/ce61b0e9a41fb55beaef04610967ccc7b69307f8
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/CodeGen/RuntimeLibcalls.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-outline_atomics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
Add out-of-line-atomics support to GlobalISel (#74588)
This patch implement the GlobalISel counterpart to
4d7df43ffdb460dddb2877a886f75f45c3fee188.
Commit: ff0c1f20a744b93ab8a9f8b378c5225cf3f4f68f
https://github.com/llvm/llvm-project/commit/ff0c1f20a744b93ab8a9f8b378c5225cf3f4f68f
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
Log Message:
-----------
[CodeGen] Remove unused variables in TargetLoweringBase.cpp (NFC)
llvm-project/llvm/lib/CodeGen/TargetLoweringBase.cpp:570:12: error: unused variable 'ModeN' [-Werror,-Wunused-variable]
570 | unsigned ModeN, ModelN;
| ^~~~~
llvm-project/llvm/lib/CodeGen/TargetLoweringBase.cpp:570:19: error: unused variable 'ModelN' [-Werror,-Wunused-variable]
570 | unsigned ModeN, ModelN;
| ^~~~~~
2 errors generated.
Commit: 72db578d7149bc9941d45a800fb8be4f79ba24e2
https://github.com/llvm/llvm-project/commit/72db578d7149bc9941d45a800fb8be4f79ba24e2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] Fix typo in VSELECT SimplifyDemandedVectorElts handling. NFC.
Rename UndefZero -> UndefSel (undefined elements from Sel operand).
Commit: 6bb8d69f2a66da179efec8e0e69fbf55a3296d1c
https://github.com/llvm/llvm-project/commit/6bb8d69f2a66da179efec8e0e69fbf55a3296d1c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineLoad - pull out repeated cast<MemSDNode> calls. NFC.
Commit: 43e0723899e909cb2502b34da2003a5774ffb394
https://github.com/llvm/llvm-project/commit/43e0723899e909cb2502b34da2003a5774ffb394
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
Log Message:
-----------
[DAG] BaseIndexOffset::computeAliasing - early out on failed matches. NFCI.
Don't wait to test that all base ptr matches have succeeded
Commit: 5b38ecff6e9d7ef84ba8fd9b1b1e4c9b229dbdb5
https://github.com/llvm/llvm-project/commit/5b38ecff6e9d7ef84ba8fd9b1b1e4c9b229dbdb5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
Log Message:
-----------
[DAG] BaseIndexOffset::equalBaseIndex - early out on failed matches. NFCI.
If we successfully cast only the first base node as GlobalAddressSDNode / ConstantPoolSDNode / FrameIndexSDNode then we can early out as we know that base won't cast as a later type.
Noticed while investigating profiles for potential compile time improvements.
Commit: f45b75949d8ccc9890241ecf9b9ad11349e1d036
https://github.com/llvm/llvm-project/commit/f45b75949d8ccc9890241ecf9b9ad11349e1d036
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] SimplifyDemandedBits - call demanded elts variant directly for SELECT/SELECT_CC nodes.
Don't rebuild the demanded elts mask every time.
Commit: f5efa74961560070a1e6f127214bcf6b570fef98
https://github.com/llvm/llvm-project/commit/f5efa74961560070a1e6f127214bcf6b570fef98
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
Log Message:
-----------
[Sema] When checking for constraint equivalence, do not calculate satisfaction (#74490)
... and only look at equivalence of substituted expressions, not results
of constraint satisfaction.
This is required by the standard when matching redeclarations.
Fixes #74314.
There is already some existing machinery for that in
`TemplateInstantiator` and `Sema` exposed separate functions for
substituting expressions with intention to do that:
- `Sema::SubstExpr` should not evaluate constraints.
- `Sema::SubstConstraintExpr` should.
However, both functions used to be equivalent. Introduce a new function
that does not evaluate constraint and use it when matching declarations.
Also change implementation of `SubstConstraintExpr` to call `SubstExpr`
directly so it's obvious they behave in the same way and add a FIXME to
call out that we might need to revamp this approach in the future.
Commit: 2336f792bc5a1d9195c1bd995b6040c13e73d4e7
https://github.com/llvm/llvm-project/commit/2336f792bc5a1d9195c1bd995b6040c13e73d4e7
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/IncludeCleaner.cpp
M clang-tools-extra/clangd/test/include-cleaner-batch-fix.test
Log Message:
-----------
[clangd] Dont require confirmation for include-cleaner batch-fixes (#76826)
False negative/positive rate has decreased to the degree that these
extra confirmations no longer provide any value, but only create
friction in the happy case.
When we have false analysis, people usually need to apply the fixes and
run the builds to discover the failure. At that point they can add
relevant IWYU pragmas to guide analysis, and will be more likely to
create bug reports due to extra annoyance :)
Commit: 202a4c0dfb19823a0c0fc737e32d205efaffb7ff
https://github.com/llvm/llvm-project/commit/202a4c0dfb19823a0c0fc737e32d205efaffb7ff
Author: Christian Sigg <chsigg at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix BUILD after 6ae7f66ff5169ddc5a7b9ab545707042c77e036c
Commit: e147dcbcbc8f92b7f4973eaebe800308f480dd84
https://github.com/llvm/llvm-project/commit/e147dcbcbc8f92b7f4973eaebe800308f480dd84
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/windows-seh-EHa-RegisterLiveness.ll
Log Message:
-----------
[SEH] Add test to track EHa register liveness verification (#76921)
This test tracks bug of MachineVerifier to check live range segment for
EHa. Async exception can happen at any place within seh scope, not only
the call instruction. Need to teach MachineVerifier to know that.
Commit: ca5d34ec7186f2b5750c7e67dcb8b2d0dc865d8d
https://github.com/llvm/llvm-project/commit/ca5d34ec7186f2b5750c7e67dcb8b2d0dc865d8d
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/docs/Tutorials/transform/Ch1.md
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/test/Dialect/GPU/transform-gpu-failing.mlir
M mlir/test/Dialect/Linalg/tile-to-forall.mlir
M mlir/test/Examples/transform/Ch1/invalidation-1.mlir
Log Message:
-----------
[mlir][TD] Fix the order of return handles (#76929)
Replace (in tests and docs):
%forall, %tiled = transform.structured.tile_using_forall
with (updated order of return handles):
%tiled, %forall = transform.structured.tile_using_forall
Similar change is applied to (in the TD tutorial):
transform.structured.fuse_into_containing_op
This update makes sure that the tests/documentation are consistent with
the Op specifications. Follow-up for #67320 which updated the order of
the return handles for `tile_using_forall`.
Commit: 71b3ead870107e39e998f6480e545eb01d9d28be
https://github.com/llvm/llvm-project/commit/71b3ead870107e39e998f6480e545eb01d9d28be
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
Log Message:
-----------
[clang][dataflow] Remove a redundant trailing semicolon. NFC.
This silences the following warning with GCC:
llvm-project/llvm/tools/clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp:89:4: warning: extra ‘;’ [-Wpedantic]
89 | };
| ^
| -
Commit: f8122518750e3563a79df22d72c26c3c922f63f2
https://github.com/llvm/llvm-project/commit/f8122518750e3563a79df22d72c26c3c922f63f2
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-multiples.ll
Log Message:
-----------
[ConstraintElim] Use SCEV to check for multiples (#76925)
When adding constraints for induction variables, if the step is not one,
we need to make sure that (end-start) is a multiple of step, otherwise
we might step over the end value.
Currently this only supports one specific pattern for pointers, where
the end is a gep of the start with an appropriate offset.
Generalize this by using SCEV to check for multiples, which also makes
this work for integer IVs.
Commit: 475890cd2e65d0e9fbd37a912cd359f12f1f7668
https://github.com/llvm/llvm-project/commit/475890cd2e65d0e9fbd37a912cd359f12f1f7668
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-select.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Analysis/CostModel/RISCV/splice.ll
Log Message:
-----------
[RISCV][CostModel] Add getRISCVInstructionCost() to TTI for CostKind (#76793)
Instruction cost for CodeSize and Latency/RecipThroughput can be very
different. Considering the diversity of CostKind and vendor-specific
cost, and how they are spread across various TTI functions, it's
becoming quite a challenge to handle. This patch adds an interface
getRISCVInstructionCost to address it.
Commit: 26ff659c39a67fe60517b45d4a954231f77c1350
https://github.com/llvm/llvm-project/commit/26ff659c39a67fe60517b45d4a954231f77c1350
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
Log Message:
-----------
[AMDGPU] Remove some unused check prefixes
Commit: 4de971c230e8202cfd54d4d6c36719db628d35ce
https://github.com/llvm/llvm-project/commit/4de971c230e8202cfd54d4d6c36719db628d35ce
Author: Qizhi Hu <836744285 at qq.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang][ASTImporter] import InstantiatedFromMember of ClassTemplateSpecializationDecl (#76493)
import of `ClassTemplateSpecializationDecl` didn't set
`InstantiatedFromMember` and this makes ast-dump crash. import and set
`InstantiatedFromMember`. fix
[issue](https://github.com/llvm/llvm-project/issues/76469)
Co-authored-by: huqizhi <836744285 at qq.com>
Commit: 62144969bc03490908d46675f3d6645cbe248d25
https://github.com/llvm/llvm-project/commit/62144969bc03490908d46675f3d6645cbe248d25
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElim] Add debug output for failed preconditions
Print debug output if a constraint does not get added due to a
failed precondition.
Commit: 9803de0e8e3abbbc94a4265d5847db435897a384
https://github.com/llvm/llvm-project/commit/9803de0e8e3abbbc94a4265d5847db435897a384
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-func-hidden-args-v5.ll
A llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-funcarg-hidden-args-v5.ll
A llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-kernarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
Log Message:
-----------
[AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (#65273)
"hidden_dynamic_lds_size" argument will be added in the reserved section
at offset 120 of the implicit argument layout.
Add "isDynamicLDSUsed" flag to AMDGPUMachineFunction to identify if a
function uses dynamic LDS.
hidden argument will be added in below cases:
- LDS global is used in the kernel.
- Kernel calls a function which uses LDS global.
- LDS pointer is passed as argument to kernel itself.
Commit: 3fd081f71eb6f0cda842995959df86077c2d6559
https://github.com/llvm/llvm-project/commit/3fd081f71eb6f0cda842995959df86077c2d6559
Author: alekuz01 <aleksei.kuzmenko at arm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/docs/CMake.rst
Log Message:
-----------
[llvm][doc][NFC] Fix typo in documentation in CMake.rst (#76836)
Fix for #71941
Commit: db34a94710bc93970b5a873b1eef5c7ae2a3e046
https://github.com/llvm/llvm-project/commit/db34a94710bc93970b5a873b1eef5c7ae2a3e046
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/shl.ll
Log Message:
-----------
[ConstraintElim] Add tests for shl nsw decomposition (NFC)
Commit: 4e281e2cb717c9bc6af2c01f56857d352adbe10e
https://github.com/llvm/llvm-project/commit/4e281e2cb717c9bc6af2c01f56857d352adbe10e
Author: Mauro Baladés <mauro.balades at tutanota.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
Log Message:
-----------
[NFC][Clang] Avoid copying Param and Constr (#65488)
Commit: e947b63516c8f9884e84bca000f7e9d9db7701c1
https://github.com/llvm/llvm-project/commit/e947b63516c8f9884e84bca000f7e9d9db7701c1
Author: Mirko Brkusanin <Mirko.Brkusanin at amd.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx12_asm_vimage_alias.s
Log Message:
-----------
[AMDGPU][NFC] Update alias test
Alias test should contain alternative names in check lines
Commit: 901a8160a8cb3bda3558fffb8e109485c42affe5
https://github.com/llvm/llvm-project/commit/901a8160a8cb3bda3558fffb8e109485c42affe5
Author: Pol M <polmarcetsarda at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/include/clang/AST/DeclCXX.h
M clang/lib/AST/DeclBase.cpp
M clang/utils/TableGen/ClangASTNodesEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[clang] Optimize castToDeclContext for 2% improvement in build times (#76825)
Optimize castToDeclContext for 2% improvement in build times
castToDeclContext is a heavily used function, and as such, it needs to
be kept as slim as feasible to preserve as much performance as possible.
To this end, it was observed that the function was generating suboptimal
assembly code, and putting the most common execution path in the longest
sequence of instructions. This patch addresses this by guiding the
compiler towards generating a lookup table of offsets, which can be used
to perform an addition on the pointer. This results in a 1-2%
improvement on debug builds (and a negligible improvement on release).
To achieve this, the switch was simplified to flatten the if statements
in the default branch. In order to make the values of the switch more
compact, encouraging LLVM to generate a look-up table instead of a jump
table, the AST TableGen generator was modified so it can take order
priority based on class inheritance. This combination allowed for a more
optimal generation of the function. Of note, 2 other functions with an
equivalent structure also needed to be modified.
Fixes #76824
Commit: 96c23ebd3b28f034784eab66393ea9a46e45c6ee
https://github.com/llvm/llvm-project/commit/96c23ebd3b28f034784eab66393ea9a46e45c6ee
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitCAttributes.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitCTypes.td
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
Log Message:
-----------
[mlir][EmitC] Use declarative assembly format for opaque types and attributes (#76066)
The parser and printer of string attributes were changed to handle
escape sequences. Therefore, we no longer require a custom parser and
printer. Verification is moved from the parser to the verifier
accordingly.
Commit: 79e62315be5b762f399e98c0b638e682eac66322
https://github.com/llvm/llvm-project/commit/79e62315be5b762f399e98c0b638e682eac66322
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/gather_extract_from_vectorbuild.ll
Log Message:
-----------
[SLP]Use revectorized value for extracts from buildvector, beeing
vectorized.
When trying to reuse the extractelement instruction, emitted for the
insertelement instruction, need to check, if the this insertelement
instruction was vectorized. In this case, need to use vectorized value,
not the original insertelement.
Commit: d02471ede56e727d7d16f61bcdecc4f99a2bda02
https://github.com/llvm/llvm-project/commit/d02471ede56e727d7d16f61bcdecc4f99a2bda02
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/fpbits_str.h
M libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log2f.cpp
M libc/src/math/generic/logf.cpp
M libc/test/src/stdlib/strtold_test.cpp
M libc/test/src/time/difftime_test.cpp
Log Message:
-----------
[libc][NFC] Simplify `FPBits` (#76835)
This patch reduces the scope of `FPBits` exported variables and
functions.
It also moves storage up into `FPRep` and tries to make the default and
specialized versions of `FPBits` more uniform.
The next step is to move the specialization from `FPBits` to `FPRep` so
we can manipulate floating point representations through `FPType`
alone - that is - independently from the host architecture.
Commit: 460ffcddd900b7a869a34790888e3075c6ec6549
https://github.com/llvm/llvm-project/commit/460ffcddd900b7a869a34790888e3075c6ec6549
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
Log Message:
-----------
AMDGPU: Make bf16/v2bf16 legal types (#76215)
There are some intrinsics are using i16 vectors in place of bfloat
vectors.
Move towards making bf16 vectors legal so these can migrate. Leave the
larger vectors for a later change.
Depends #76213 #76214
Commit: 2aff7f39199f214ee606e4e18a8eba178ffe0d94
https://github.com/llvm/llvm-project/commit/2aff7f39199f214ee606e4e18a8eba178ffe0d94
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][LLVM] Add !invariant.load metadata support to llvm.load (#76754)
Add support for !invariant.load metadata (by way of a unit attribute) to
the MLIR representation of llvm.load.
Commit: b336ab42dcc81a351b2f875f28c70b74d8814611
https://github.com/llvm/llvm-project/commit/b336ab42dcc81a351b2f875f28c70b74d8814611
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/include/mlir/IR/Operation.h
M mlir/lib/IR/OperationSupport.cpp
M mlir/lib/Interfaces/InferTypeOpInterface.cpp
M mlir/unittests/Bytecode/BytecodeTest.cpp
M mlir/unittests/IR/OpPropertiesTest.cpp
Log Message:
-----------
[mlir] add a way to query non-property attributes (#76959)
This helps support generic manipulation of operations that don't (yet)
use properties to store inherent attributes.
Use this mechanism in type inference and operation equivalence.
Note that only minimal unit tests are introduced as all the upstream
dialects seem to have been updated to use properties and the
non-property behavior is essentially deprecated and untested.
Commit: a87fa7f0caa1b8bf328524e0aec80a10ed4af7f9
https://github.com/llvm/llvm-project/commit/a87fa7f0caa1b8bf328524e0aec80a10ed4af7f9
Author: Gabriel Baraldi <baraldigabriel at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/memcpy-to-load.ll
Log Message:
-----------
[InstCombine] Dont throw away noalias/alias scope metadata when inlining memcpys (#74805)
This was found in julia when we changed some operations from explicit
loads + stores to memcpys. While applying it to both the src and the
dest seems weird, thats what we do for normal TBAA.
Commit: 9215741726e295d09ae7db4d235b26c1214a19ae
https://github.com/llvm/llvm-project/commit/9215741726e295d09ae7db4d235b26c1214a19ae
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/lib/IR/Operation.cpp
Log Message:
-----------
[mlir] Make fold result type check more verbose (#76867)
Print the op and its types when the fold type check fails. This is to
speed up debuging as it should be trivial to map the offending op to its
folder based on the op name.
Commit: 640ef55bbbc081b72a87f71cab1bce08762e48b0
https://github.com/llvm/llvm-project/commit/640ef55bbbc081b72a87f71cab1bce08762e48b0
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang-tools-extra/test/clang-doc/templates.cpp
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/p5.cpp
Log Message:
-----------
Reapply "[Clang][Sema] Diagnose unexpanded packs in the template argument lists of function template specializations" (#76876) (#76915)
This reapplies f034044ad94d6f7ccec13d89f08acac257ed28bb after it was
reverted by 687396b5f4ba0713d103ebd172b308e92eb930cc due to a test
failure in clang-doc.
The test in question declares a partial specialization of a function
template, as well as an explicit specialization of the same function
template. Both declarations are now set as invalid, meaning neither is
emitted by clang-doc.
Since this is the sole test of function template specializations in
clang-doc, I presume the intent is for the partial specialization to
actually be the primary template. Doing so results in the expected
output.
Commit: 569ec185f5dc4a9e4a239948191977ecc2b2b475
https://github.com/llvm/llvm-project/commit/569ec185f5dc4a9e4a239948191977ecc2b2b475
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
M llvm/docs/CommandGuide/llvm-cxxfilt.rst
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/lib/Demangle/Demangle.cpp
M llvm/lib/Demangle/ItaniumDemangle.cpp
A llvm/test/tools/llvm-cxxfilt/no-params.test
M llvm/tools/llvm-cxxfilt/Opts.td
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
Log Message:
-----------
[llvm-cxxfilt] Added the option --no-params (#75348)
Added -p / --no-params flag to skip demangling function parameters
similar to how it is supported by GNU c++filt tool.
There are cases when users want to demangle a large number of symbols in
bulk, for example, at startup, and do not care about function parameters
and overloads at that time. Skipping the demangling of parameter types
led to a measurable improvement in performance. Our users reported about
15% speed up with GNU c++filt and we expect similar results with
llvm-cxxfilt with this patch.
Commit: 8f8152091cae186b35f73331df13f36b0f905eb4
https://github.com/llvm/llvm-project/commit/8f8152091cae186b35f73331df13f36b0f905eb4
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_revd.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pfalse.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_sclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
A clang/test/Sema/aarch64-sme2-sve2p1-diagnostics.c
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[Clang][SME] Add IsStreamingOrSVE2p1 (#75958)
This patch adds IsStreamingOrSVE2p1 to the applicable builtins and a
warning for when those builtins are not used in a streaming or sve2p1
function.
Commit: a7a78fd427569a7ad8a27e682a66fe414f004a35
https://github.com/llvm/llvm-project/commit/a7a78fd427569a7ad8a27e682a66fe414f004a35
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_revd.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pfalse.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_sclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
R clang/test/Sema/aarch64-sme2-sve2p1-diagnostics.c
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
Revert "[Clang][SME] Add IsStreamingOrSVE2p1" (#76973)
Reverts llvm/llvm-project#75958
I mistakenly included a commit from my local main after rebasing.
Commit: 917b404e2ccdcc31d2d64971ad094b80967a240b
https://github.com/llvm/llvm-project/commit/917b404e2ccdcc31d2d64971ad094b80967a240b
Author: Adrian Prantl <adrian-prantl at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/include/lldb/Utility/FileSpecList.h
M lldb/source/API/SBCompileUnit.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/CppModuleConfiguration.cpp
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.h
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.h
M lldb/source/Plugins/SymbolFile/JSON/SymbolFileJSON.h
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.h
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.h
M lldb/source/Symbol/CompileUnit.cpp
M lldb/source/Symbol/SymbolFileOnDemand.cpp
M lldb/source/Utility/FileSpecList.cpp
A lldb/test/API/functionalities/inline-sourcefile/Makefile
A lldb/test/API/functionalities/inline-sourcefile/TestInlineSourceFiles.py
A lldb/test/API/functionalities/inline-sourcefile/inline.ll
A lldb/test/API/functionalities/inline-sourcefile/main.c
M lldb/unittests/Core/FileSpecListTest.cpp
Log Message:
-----------
Add support for inline DWARF source files. (#75880)
LLVM supports DWARF 5 linetable extension to store source files inline
in DWARF. This is particularly useful for compiler-generated source
code. This implementation tries to materialize them as temporary files
lazily, so SBAPI clients don't need to be aware of them.
rdar://110926168
Commit: c12a9fc2798cc74a6ea6a8c71826047f47c815ea
https://github.com/llvm/llvm-project/commit/c12a9fc2798cc74a6ea6a8c71826047f47c815ea
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/include/llvm/Object/ELFObjectFile.h
Log Message:
-----------
[ELF] Correctly set the `nvptx` triple from `makeTriple()` (#76970)
Summary:
The ELFObject file should be able to handle `nvptx` objects but we
currently list them as unknown. This patch should now make it return
`nvptx64--` correctly.
Commit: 5cd3cf107286d56cf162346d1bbbbfcc20439320
https://github.com/llvm/llvm-project/commit/5cd3cf107286d56cf162346d1bbbbfcc20439320
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/cvtv2f32.ll
Log Message:
-----------
[X86] cvtv2f32.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 076dbc02724681c7d3664959d5ae742099b7edb6
https://github.com/llvm/llvm-project/commit/076dbc02724681c7d3664959d5ae742099b7edb6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/buildvec-insertvec.ll
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
Log Message:
-----------
[X86] SimplifyDemandedVectorEltsForTargetNode - add X86ISD::VZEXT_LOAD handling.
Simplify to a scalar_to_vector(load()) if we don't demand any of the upper vector elements.
Commit: ce4459d5903fe53065f4c198cd71be6e514475c2
https://github.com/llvm/llvm-project/commit/ce4459d5903fe53065f4c198cd71be6e514475c2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll
Log Message:
-----------
[X86] 64-bit-shift-by-32-minus-y.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 63e30747815a20e9976c5bcedb81e8b44cbec582
https://github.com/llvm/llvm-project/commit/63e30747815a20e9976c5bcedb81e8b44cbec582
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/aligned-variadic.ll
Log Message:
-----------
[X86] aligned-variadic.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 2cbf6526157958531e5765e7aa6faa53bfac5c5a
https://github.com/llvm/llvm-project/commit/2cbf6526157958531e5765e7aa6faa53bfac5c5a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/avx512-pmovxrm.ll
Log Message:
-----------
[X86] avx512-pmovxrm.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: db9a16eaedd67f5b7c2dad68f1e3f2799d86d590
https://github.com/llvm/llvm-project/commit/db9a16eaedd67f5b7c2dad68f1e3f2799d86d590
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Log Message:
-----------
[mlir][nfc] Update comments in the Linalg vectoriser (#76797)
Commit: 79a2e2b9e8d0dffa602375c2386371666b412272
https://github.com/llvm/llvm-project/commit/79a2e2b9e8d0dffa602375c2386371666b412272
Author: Nishant Mittal <nishantwrp at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/test/src/__support/FPUtil/fpbits_test.cpp
Log Message:
-----------
[libc][math] Fix `is_quiet_nan` function in FPBits (#76931)
Commit: 9f9dd6be0d21a156dcfee01ebbd571eca79b08bd
https://github.com/llvm/llvm-project/commit/9f9dd6be0d21a156dcfee01ebbd571eca79b08bd
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M lldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp
Log Message:
-----------
Wrap local type declarations in anonymous namespace to fix modules build.
Commit: e78a1f491cbc0a57de7bf86058359dd0bd282540
https://github.com/llvm/llvm-project/commit/e78a1f491cbc0a57de7bf86058359dd0bd282540
Author: 刘雨培 <liuyupei951018 at hotmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
[Clang] Fix the instantiation of return type requirements in lambda bodies (#76967)
Currently, due to the incomplete implementation of p0588r1, the
instantiation of lambda expressions leads to the instantiation of the
body. And `EvaluateConstraints` is false during the instantiation of the
body, which causes crashes during the instantiation of the return type
requirement:
```cpp
template<typename T> concept doesnt_matter = true;
template<class T>
concept test =
[]{
return requires(T t) {
{ t } -> doesnt_matter; // crash
};
}();
static_assert(test<int>);
```
Although a complete implementation of p0588r1 can solve these crashes,
it will take some time. Therefore, this pull request aims to fix these
crashes first.
Fixes https://github.com/llvm/llvm-project/issues/63808
Fixes https://github.com/llvm/llvm-project/issues/64607
Fixes https://github.com/llvm/llvm-project/issues/64086
Commit: 4004f655ceb9623608ba0471aa7037c142956e31
https://github.com/llvm/llvm-project/commit/4004f655ceb9623608ba0471aa7037c142956e31
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
Log Message:
-----------
[LLDB][NativePDB] Fix use-after-free error detected by asan.
Commit: a960703466e937d99ab7a7a29f7448e1bc926e35
https://github.com/llvm/llvm-project/commit/a960703466e937d99ab7a7a29f7448e1bc926e35
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV] Remove incomplete PRE_DEC/POST_DEC code for XTHeadMemIdx. (#76922)
As far as I can tell if getIndexedAddressParts received an ISD::SUB, the
constant would be negated. So `IsInc` should be set to true since the
SUB was effectively converted to ADD. This means we should never use
PRE_DEC/POST_DEC.
No tests are affected because DAGCombine aggressively turns SUB with
constant into ADD so no lit test has a SUB reach getIndexedAddressParts.
Commit: 4f59a38821a2175408a3189327223b85ddba636f
https://github.com/llvm/llvm-project/commit/4f59a38821a2175408a3189327223b85ddba636f
Author: Pete Steinfeld <47540744+psteinfeld at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/test/Transforms/simplifyintrinsics.fir
Log Message:
-----------
Revert #76194 (#76987)
[Flang] Revert "Allow Intrinsic simpification with min/maxloc dim
and…scalar result (#76194)"
This reverts commit 9b7cf5bfb08b6e506216ef354dfd61adb15acbff.
See merge request #76194.
This change was causing several failures in our internal tests. I'm
reverting now and will work on creating a test that David Green can use
to reproduce the problem.
Commit: c041fa1093c3ad7be040fb362a10ca3900c698a4
https://github.com/llvm/llvm-project/commit/c041fa1093c3ad7be040fb362a10ca3900c698a4
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/inline-sourcefile/TestInlineSourceFiles.py
Log Message:
-----------
XFAIL test with dsymutil
Commit: 85939e5e248213dfdf66fc8305ed502fc2f3f1f0
https://github.com/llvm/llvm-project/commit/85939e5e248213dfdf66fc8305ed502fc2f3f1f0
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[mlir][openacc][NFC] Rename custom parser from WaitOperands to DeviceTypeOperandsWithSegment
Commit: 8b2bdfbca7c1db272e4e703445f5626b4bc4b9d3
https://github.com/llvm/llvm-project/commit/8b2bdfbca7c1db272e4e703445f5626b4bc4b9d3
Author: Alan Phipps <a-phipps at ti.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenPGO.h
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/CoverageMappingGen.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CoverageMapping/branch-constfolded.cpp
M clang/test/CoverageMapping/branch-mincounters.cpp
M clang/test/CoverageMapping/branch-templates.cpp
M clang/test/CoverageMapping/if.cpp
M clang/test/CoverageMapping/logical.cpp
A clang/test/CoverageMapping/mcdc-class.cpp
A clang/test/CoverageMapping/mcdc-error-conditions.cpp
A clang/test/CoverageMapping/mcdc-error-nests.cpp
A clang/test/CoverageMapping/mcdc-logical-scalar-ids.cpp
A clang/test/CoverageMapping/mcdc-logical-stmt-ids-all.cpp
A clang/test/CoverageMapping/mcdc-logical-stmt-ids.cpp
M clang/test/Profile/c-linkage-available_externally.c
A clang/test/Profile/c-mcdc-class.cpp
A clang/test/Profile/c-mcdc-nested-ternary.c
A clang/test/Profile/c-mcdc-not.c
A clang/test/Profile/c-mcdc.c
A compiler-rt/test/profile/ContinuousSyncMode/image-with-mcdc.c
Log Message:
-----------
[Coverage][clang] Enable MC/DC Support in LLVM Source-based Code Coverage (3/3)
Part 3 of 3. This includes the MC/DC clang front-end components.
Differential Revision: https://reviews.llvm.org/D138849
Commit: 0b45c7722c7661063176f4dcd108ac4b6242fd34
https://github.com/llvm/llvm-project/commit/0b45c7722c7661063176f4dcd108ac4b6242fd34
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M flang/test/Semantics/kinds04_q10.f90
Log Message:
-----------
[Flang] make ppc unsupported for x86_64 test case (NFC) (#73903)
The test case is for x86_64 adding powerpc as unsupported.
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: 05216544a34eaf7aabf45df5f64d1c6c3e4e06c6
https://github.com/llvm/llvm-project/commit/05216544a34eaf7aabf45df5f64d1c6c3e4e06c6
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/tools/llvm-ar/error-opening-permission.test
M llvm/test/tools/llvm-dwarfdump/X86/output.s
M llvm/test/tools/llvm-ifs/fail-file-write.test
M llvm/test/tools/llvm-ranlib/error-opening-permission.test
M llvm/utils/lit/lit/llvm/config.py
Log Message:
-----------
[llvm] Add support for running tests as root (#75285)
There are a few test that check access permissions, so they need to be
disabled when running the tests as root.
The most common use case for running tests as root is inside of a
container. GitHub Actions, for example, only supports running the root
user inside of containers, so this change is necessary in order to run
the tests inside of a container running in the GitHub Actions
environment.
Commit: 852596d804a1b07c01e30f2091acf9c8bf16bda4
https://github.com/llvm/llvm-project/commit/852596d804a1b07c01e30f2091acf9c8bf16bda4
Author: David Goldblatt <davidgoldblatt at fb.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Analysis/BasicAA/separate_storage-alias-sets.ll
Log Message:
-----------
[BasicAA] Guess reasonable contexts for separate storage hints (#76770)
The definition of the pointer of the memory location being queried is
always one such context. Even this conservative guess can be better than
no guess at all in some cases.
Fixes #64666
Co-authored-by: David Goldblatt <davidgoldblatt at meta.com>
Commit: 8f40783944fcdd33a2ad134be0d26a671202fd85
https://github.com/llvm/llvm-project/commit/8f40783944fcdd33a2ad134be0d26a671202fd85
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.h
Log Message:
-----------
[lldb][nfc] Mark function as const (#76974)
This function has no mutable behavior
Commit: 166bd4e1f18da221621953bd5943c1a8d17201fe
https://github.com/llvm/llvm-project/commit/166bd4e1f18da221621953bd5943c1a8d17201fe
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
A .github/workflows/build-ci-container.yml
A .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[workflows] Build a container for running CI on github actions (#75286)
Using a container will allow us to have similar testing environments on
both the GitHub hosted runners and the self-hosted runners.
Commit: 45651c357ae4e39a115bae6a936151b1741abf70
https://github.com/llvm/llvm-project/commit/45651c357ae4e39a115bae6a936151b1741abf70
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/include/clang/Basic/riscv_sifive_vector.td
Log Message:
-----------
[RISCV] Fix indentation in riscv_sifive_vector.td. NFC
Commit: b5a3e9639291359d5c9e16f0610393d92bc7d4c2
https://github.com/llvm/llvm-project/commit/b5a3e9639291359d5c9e16f0610393d92bc7d4c2
Author: ChipsSpectre <maxi.hornung at t-online.de>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/test/Parser/cxx-in-c.c
Log Message:
-----------
[Clang][Parser] Fix crash of clang when using C++ constructs like :: in C code (#74926)
Ensure we do not try to parse a nested-name-specifier when parsing an ill-formed file in C mode.
Fixes #73559
Commit: 9d829784d4c2b4f82e0b301eaa840c9ed192e919
https://github.com/llvm/llvm-project/commit/9d829784d4c2b4f82e0b301eaa840c9ed192e919
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/Target/AArch64/AArch64.td
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64] Correct features for Arm Cortex-A78C, Cortex-X1C and Cortex-X2 (#76932)
Remove AArch64::AEK_FP16ML from Arm Cortex-A78C definition, as
this is not supported, according to the Technical Reference Manual:
https://developer.arm.com/documentation/102226/latest/
Also add AArch64::AEK_FLAGM (Flag Manipulation) to Arm Cortex-X1C
and Arm Cortex-X2 as these were missing previously, but are
supported, according to the Technical Reference Manuals:
https://developer.arm.com/documentation/101968/latest/
https://developer.arm.com/documentation/101803/latest/
Fixes #62383
Commit: cd3942059eed7b7185f26bc583ac287a995db0d0
https://github.com/llvm/llvm-project/commit/cd3942059eed7b7185f26bc583ac287a995db0d0
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
A llvm/test/Transforms/SeparateConstOffsetFromGEP/split-gep-or-as-add.ll
Log Message:
-----------
[SeperateConstOffsetFromGEP] Pre-commit tests for or disjoint handling (#76972)
1. Adds tests for the existing interpretation of `or` as `add` in
SeperateConstOffsetFromGEP.
2. Pre-commits a test for `or disjoint`.
Commit: c398923f32ff5373964e1288d9de37403c2399dd
https://github.com/llvm/llvm-project/commit/c398923f32ff5373964e1288d9de37403c2399dd
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[CMake][runtimes] Check LLVM_ENABLE_PROJECTS for libc (#76845)
Only some targets may be building llvm-libc in which case the top-level
LLVM_ENABLE_RUNTIMES variable won't contain libc. Rather, we can check
LLVM_ENABLE_PROJECTS since libc is required to be included there for
libc-hdrgen to be built (and when LLVM_ENABLE_RUNTIMES contains libc, we
automatically include libc in LLVM_ENABLE_PROJECTS as well).
Commit: 71c17424b5d5c22c0ce6b4c41acaa0401515baca
https://github.com/llvm/llvm-project/commit/71c17424b5d5c22c0ce6b4c41acaa0401515baca
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Transform/IR/TransformInterfaces.cpp
M mlir/test/Dialect/Transform/apply-foreach-nested.mlir
M mlir/test/Dialect/Transform/expensive-checks.mlir
M mlir/test/Dialect/Transform/selective-targeting.mlir
M mlir/test/Dialect/Transform/test-interpreter.mlir
Log Message:
-----------
[mlir][TD] update more tests to use the "main" interpreter pass (#76963)
Update several tests under mlir/test/Dialect/Transform to use the "main"
transform interpreter pass with named entry points rather than the test
interpreter pass.
This helped discover a logic error in the expensive checks mechanism
that was exiting too early.
Commit: 2ab5c47c8752b444885d6bfaf6f570a482fb4cdf
https://github.com/llvm/llvm-project/commit/2ab5c47c8752b444885d6bfaf6f570a482fb4cdf
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
Log Message:
-----------
[VPlan] Don't replace scalarizing recipe with VPWidenCastRecipe.
Don't replace a scalarizing recipe with a VPWidenCastRecipe. This would
introduce wide (vectorizing) recipes when interleaving only.
Fixes https://github.com/llvm/llvm-project/issues/76986
Commit: 58f1640635feff282935153d295dfb4ea1818401
https://github.com/llvm/llvm-project/commit/58f1640635feff282935153d295dfb4ea1818401
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
A llvm/test/tools/llvm-mca/RISCV/SiFive7/strided-load-store.s
Log Message:
-----------
[RISCV][llvm-mca] Use correct LMUL and SEW for strided loads and stores (#76869)
The pseudos for strided loads and stores use the SEW coming from the
name. For example, vlse8 has SEW=8 and vlse16 has SEW=16.
When llvm-mca tries to lookup (VLSE8_V, SEW=S, LMUL=L) in the inverse
pseudo table, a result will only be found when S=8, where S was set from
the previous vsetvli instruction. Instead, for a match to be found, we
must lookup (VLSE8_V, SEW=8, LMUL=L') where L' is the EMUL which was
calculated by scaling the LMUL and SEW from the previous vsetvli and the
SEW=8.
Commit: a0c19bd45599c044a662752c2b513cc514cb645a
https://github.com/llvm/llvm-project/commit/a0c19bd45599c044a662752c2b513cc514cb645a
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
M mlir/test/IR/test-region-branch-op-verifier.mlir
M mlir/test/lib/Dialect/Test/TestDialect.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][RegionBranchOpInterface] explicitly check for existance of block terminator (#76831)
Commit: 03ef103235752830da7b9ce5e825c0e3ddf7f45a
https://github.com/llvm/llvm-project/commit/03ef103235752830da7b9ce5e825c0e3ddf7f45a
Author: Chris Cotter <ccotter14 at bloomberg.net>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseEmplaceCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-emplace.cpp
Log Message:
-----------
[clang-tidy] Fix bug in modernize-use-emplace (#66169)
emplace_back cannot construct an aggregate with arguments used to
initialize the aggregate.
Closes #62387
Test plan: Added test test from #62387 which contains code that should
not be replaced by the check.
Commit: d67c2d85548437ef8c3bb12a29ea330180b87913
https://github.com/llvm/llvm-project/commit/d67c2d85548437ef8c3bb12a29ea330180b87913
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseEmplaceCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Code format - leftover after #66169
Manually formating code via clang-format after previous
commit merge.
Commit: 2bc994456c5be2ab6d98b94de2349302577a9823
https://github.com/llvm/llvm-project/commit/2bc994456c5be2ab6d98b94de2349302577a9823
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/linux/app.h
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/aarch64/CMakeLists.txt
M libc/startup/linux/aarch64/start.cpp
A libc/startup/linux/aarch64/tls.cpp
A libc/startup/linux/do_start.cpp
A libc/startup/linux/do_start.h
M libc/startup/linux/riscv/CMakeLists.txt
M libc/startup/linux/riscv/start.cpp
A libc/startup/linux/riscv/tls.cpp
M libc/startup/linux/x86_64/CMakeLists.txt
M libc/startup/linux/x86_64/start.cpp
A libc/startup/linux/x86_64/tls.cpp
Log Message:
-----------
[libc] major refactor of startup library (#76092)
* separate initialization routines into _start and do_start for all
architectures.
* lift do_start as a separate object library to avoid code duplication.
* (addtionally) address the problem of building hermetic libc with
-fstack-pointer-*
The `crt1.o` is now a merged result of three components:
```
___
|___ x86_64
| |_______ start.cpp.o <- _start (loads process initial stack and aligns stack pointer)
| |_______ tls.cpp.o <- init_tls, cleanup_tls, set_thread_pointer (TLS related routines)
|___ do_start.cpp.o <- do_start (sets up global variables and invokes the main function)
```
Commit: a8cb4f7273ac4ea6f9cc3c03ed65a32542e947fe
https://github.com/llvm/llvm-project/commit/a8cb4f7273ac4ea6f9cc3c03ed65a32542e947fe
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/test/tools/llvm-mca/RISCV/SiFive7/strided-load-x0.s
Log Message:
-----------
[RISCV][llvm-mca] Fix failing strided-load-x0.s test
58f1640635feff282935153d295dfb4ea1818401 was committed but had a broken
test that I did not add the updated version to the commit. This patch
fixes the test.
Commit: 40b4ac278e87e2b98e52094b72728936df3e92d9
https://github.com/llvm/llvm-project/commit/40b4ac278e87e2b98e52094b72728936df3e92d9
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
A compiler-rt/lib/orc/executor_symbol_def.h
M compiler-rt/lib/orc/tests/unit/CMakeLists.txt
A compiler-rt/lib/orc/tests/unit/executor_symbol_def_test.cpp
M compiler-rt/lib/orc/tests/unit/simple_packed_serialization_test.cpp
A compiler-rt/lib/orc/tests/unit/simple_packed_serialization_utils.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorSymbolDef.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.h
M llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
M llvm/tools/lli/ForwardingMemoryManager.h
Log Message:
-----------
[ORC] Refactor executor symbol lookup to use ExecutorSymbolDef (NFC) (#76989)
This migrates the dylib manager lookup and related APIs to replace
ExecutorAddress with ExecutorSymbolDef so that in the future we can
model JITSymbolFlags for these symbols. The current change should be NFC
as we are only setting the Exported symbol flag.
Commit: 6af713ae170c34f0561f19e594266ce2a2af343b
https://github.com/llvm/llvm-project/commit/6af713ae170c34f0561f19e594266ce2a2af343b
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M lld/MinGW/Driver.cpp
Log Message:
-----------
[LLD] [MinGW] Remove an unnecessary include of unistd.h. NFC. (#76953)
This was present since when the MinGW LLD frontend first was merged in
894dbbe8eb0e3d8fc7d8746a76d2380f0c2b6c0f, where it most probably was a
leftover from earlier evolution of the patch.
Commit: dd047c5b64944bae830b9fecf53f8d11ff41386e
https://github.com/llvm/llvm-project/commit/dd047c5b64944bae830b9fecf53f8d11ff41386e
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M flang/unittests/Runtime/Transformational.cpp
Log Message:
-----------
[Flang] remove setting lowerbound for non existing dimension in shift runtime test case (NFC) (#76990)
The shift2 array only has 1 dimension but the lower bound for a second
dimension is being set causing a seg fault on AIX.
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: 7a05c0931f1a0ade9abc447c872a3cc7c8a37dd1
https://github.com/llvm/llvm-project/commit/7a05c0931f1a0ade9abc447c872a3cc7c8a37dd1
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M lld/COFF/Config.h
Log Message:
-----------
[LLD] [COFF] Fix option name references in Config.h. NFC.
These options have been named /lldltocache: and
/lldltocachepolicy: since they were added in
052e855e2bea78dcfbb2807acee829b56d56a729; the comment was
wrong from the original commit.
Commit: cb7fe9ad4c3103d90c20d55819a9e69ab66ab3d0
https://github.com/llvm/llvm-project/commit/cb7fe9ad4c3103d90c20d55819a9e69ab66ab3d0
Author: Valery Pykhtin <valery.pykhtin at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_constant_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_global_address_space.ll
Log Message:
-----------
[ASAN][AMDGPU] Make address sanitizer checks more efficient for the divergent target. (#72247)
Address sanitizer checks for AMDGPU target in non-recovery mode aren't
quite efficient at the moment which can be illustrated with a program:
```
instr_before;
load ptr1;
instr_in_the_middle;
load ptr2;
instr_after;
```
ASAN generates the following instrumentation:
```
instr_before;
if (sanity_check_passed(ptr1))
load ptr1;
instr_in_the_middle;
if (sanity_check_passed(ptr2))
load ptr2;
instr_after;
else
// ASAN report block 2
__asan_report(ptr2); // wave terminates
unreachable;
else
// ASAN report block 1
__asan_report(ptr1); // wave terminates
unreachable;
```
Each sanitizer check is treated as a non-uniform condition (and this is
true because some lanes may pass the check and some don't). This results
in the program above: basically normal program flow is continued in
_then_ blocks. This way it allows lanes that pass all sanity checks to
complete the program and then the wave terminates at the first reporting
_else_ block. For each _else_ block it has to keep execmask and pointer
value to report error consuming tons (megatons!) of registers which are
live till the program end.
This patch changes the behavior on a failing sanity check: instead of
waiting when passing lanes reach program end report error and terminate
as soon as any lane has violated the sanity check. Sanity check
condition is treated uniform with this approach and the resulting
program looks much like ordinary CPU code:
```
instr_before;
if (any_lane_violated(sanity_check_passed(ptr1)))
// ASAN report block 1
__asan_report(ptr1); // abort the program
unreachable;
load ptr1;
instr_in_the_middle;
if (any_lane_violated(sanity_check_passed(ptr2)))
// ASAN report block 2
__asan_report(ptr2); // abort the program
unreachable;
load ptr2;
instr_after;
```
However it has to use a trick to pass structurizer and some later
passes: ASAN check is generated like in recovery mode but reporting
function aborts, that is standard _unreachable_ instruction isn't used:
```
...
if (any_lane_violated(sanity_check_passed(ptr1)))
// ASAN report block 1
__asan_report(ptr1); // abort the program
// pretend we're going to continue the program
load ptr1;
...
```
This may create some undesirable effects:
1. Register allocator generates a lot of code for save/restore registers
for asan_report call. This may potentially bloat the code since we have
a report block for every accessed pointer.
2. Loop invariant code in report blocks is hoisted into a loop
preheader. I'm not sure but probably this can be solved using block
frequency information, but most likely this isn't a problem at all.
These problems are to be addressed later.
### Flattening address sanitizer check
In order to simplify divergent CFG this patch also changes the
instrumentation code from:
```
uint64_t address = ptr;
sbyte *shadow_address = MemToShadow(address);
sbyte shadow_value = *shadow_address;
if (shadow_value) {
sbyte last_accessed_byte = (address & 7) + kAccessSize - 1;
if (last_accessed_byte >= shadow_value) {
ReportError(address, kAccessSize, kIsWrite);
abort();
}
}
```
to
```
uint64_t address = ptr;
sbyte *shadow_address = MemToShadow(address);
sbyte shadow_value = *shadow_address;
sbyte last_accessed_byte = (address & 7) + kAccessSize - 1;
if (shadow_value && last_accessed_byte >= shadow_value) {
ReportError(address, kAccessSize, kIsWrite);
abort();
}
```
It saves one _if_ which really avoids very few instructions and their
latency can be hidden by the load from shadow memory.
Commit: 4241e847072cb436bde0abc74f2ef446a01f29aa
https://github.com/llvm/llvm-project/commit/4241e847072cb436bde0abc74f2ef446a01f29aa
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
Log Message:
-----------
[mlir][sparse] minor comment edits in sparsifier pipeline (#77000)
Commit: 0414cf09f02239254c449b7c5a37428fecb943f7
https://github.com/llvm/llvm-project/commit/0414cf09f02239254c449b7c5a37428fecb943f7
Author: ZijunZhaoCCK <88353225+ZijunZhaoCCK at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M libcxx/test/libcxx/diagnostics/nodiscard_extensions.compile.pass.cpp
M libcxx/test/libcxx/diagnostics/nodiscard_extensions.verify.cpp
M libcxx/test/libcxx/diagnostics/ranges.nodiscard_extensions.compile.pass.cpp
M libcxx/test/libcxx/diagnostics/ranges.nodiscard_extensions.verify.cpp
Log Message:
-----------
Move nondiscard tests of ranges::contains() to the right place. (#76887)
nondiscard tests of ranges::contains() should be in
ranges.nodiscard_extensions files rather than nodiscard_extensions files
Commit: 241fe83704476f81e3438e32b6d988ea123e624d
https://github.com/llvm/llvm-project/commit/241fe83704476f81e3438e32b6d988ea123e624d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Introduce ComputeReductionResult VPInstruction opcode. (#70253)
This patch introduces a new ComputeReductionResult opcode to compute the
final reduction result in the middle block. The code from fixReduction
has been moved to ComputeReductionResult, after some earlier cleanup
changes to model parts of fixReduction explicitly elsewhere as needed.
The recipe may be broken down further in the future.
Note that the phi nodes to merge the reduction result from the trip
count check and the middle block, to be used as resume value for the
scalar remainder loop are also generated based on
ComputeReductionResult.
Once we have a VPValue for the reduction result, this can also be
modeled explicitly and moved out of the recipe.
Commit: 665e46c2689cc4212345213db7d7e968b91dcc8b
https://github.com/llvm/llvm-project/commit/665e46c2689cc4212345213db7d7e968b91dcc8b
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
A compiler-rt/test/profile/Linux/instrprof-instr-suppl.test
M llvm/test/tools/llvm-profdata/Inputs/FUnique.proftext
M llvm/test/tools/llvm-profdata/Inputs/NoFUnique.proftext
M llvm/test/tools/llvm-profdata/Inputs/flatten_instr.proftext
M llvm/test/tools/llvm-profdata/suppl-instr-with-sample-flatten.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Use semicolon as the delimiter for supplementary profiles. (#75080)
When merging instrFDO profiles with afdo profile as supplementary, instrFDO counters for static functions are stored with function's PGO name (with filename.cpp; prefix).
- This pull request fixes the delimiter used when a PGO function name is 'normalized' for AFDO look-up.
Commit: 786cf76f434d2691878067dedb8b1eb99472810b
https://github.com/llvm/llvm-project/commit/786cf76f434d2691878067dedb8b1eb99472810b
Author: Adrian Prantl <adrian-prantl at users.noreply.github.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/NonRelocatableStringpool.h
M llvm/lib/CodeGen/NonRelocatableStringpool.cpp
M llvm/lib/DWARFLinker/DWARFStreamer.cpp
A llvm/test/tools/dsymutil/ARM/inline-source.test
A llvm/test/tools/dsymutil/Inputs/inline.ll
Log Message:
-----------
[dsymutil] Add support for inline DWARF source files. (#77016)
There was a strange and seemingly unncessary empty string optimization
in NonRelocatableStringPool that I had to remove in order to support
empty strings in the line_str string table, without unconditionally
forcing an empty string to be added to every debug_line_str table.
Commit: 9a2df55f47e4ec02a1efbf8efa776cfeed527df2
https://github.com/llvm/llvm-project/commit/9a2df55f47e4ec02a1efbf8efa776cfeed527df2
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M compiler-rt/test/profile/instrprof-thinlto-indirect-call-promotion.cpp
M lld/test/MachO/pgo-warn-mismatch.ll
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[InstrProf] No linkage prefixes in IRPGO names (#76994)
Change the format of IRPGO counter names to
`[<filepath>;]<mangled-name>` which is computed by
`GlobalValue::getGlobalIdentifier()` to fix #74565.
In fe051934cbb0aaf25d960d7d45305135635d650b
(https://reviews.llvm.org/D156569) the format of IRPGO counter names was
changed to be `[<filepath>;]<linkage-name>` where `<linkage-name>` is
basically `F.getName()` with some prefix, e.g., `_` or `l_` on Mach-O
(yes, it is confusing that `<linkage-name>` is computed with
`Mangler().getNameWithPrefix()` while `<mangled-name>` is just
`F.getName()`). We discovered in #74565 that this causes some missed
import issues on some targets and #74008 is a partial fix.
Since `<mangled-name>` may not match the `<linkage-name>` on some
targets like Mach-O, we will need to post-process the output of
`llvm-profdata order` before passing to the linker via `-order_file`.
Profiles generated after fe051934cbb0aaf25d960d7d45305135635d650b will
become stale after this diff, but I think this is acceptable since that
patch landed after the LLVM 18 cut which hasn't been released yet.
Commit: 3096353477a6802de9d4c74018c28f13e8ce1310
https://github.com/llvm/llvm-project/commit/3096353477a6802de9d4c74018c28f13e8ce1310
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M .github/workflows/release-binaries.yml
A clang/cmake/caches/Release.cmake
M llvm/utils/release/test-release.sh
Log Message:
-----------
test-release.sh: Add a CMake cache file for 3-stage release builds (#75903)
You can now pass the -use-cmake-cache option to test-release.sh and it
will use a predefined cache file for building the release. This will
make it easier to reproduce the builds and add other enhancements like
PGO or bolt optimizations.
---------
Co-authored-by: Konrad Kleine <konrad.kleine at posteo.de>
Commit: 71ec30132b74ba6974cece53f2a00f2749cf95f8
https://github.com/llvm/llvm-project/commit/71ec30132b74ba6974cece53f2a00f2749cf95f8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-data.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[mlir][openacc] Add device_type support for data operation (#76126)
Following #75864, this patch adds device_type support to the data
operation on the async and wait operands and attributes.
Commit: e456689fb3d6dd785202cd25f89e9443e5ad7d1a
https://github.com/llvm/llvm-project/commit/e456689fb3d6dd785202cd25f89e9443e5ad7d1a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/invalid.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[mlir][flang][openacc] Support device_type on loop construct (#76892)
This is adding support for `device_type` clause representation in the
OpenACC MLIR dialect on the acc.loop operation and adjust flang to lower
correctly to the new representation.
Each "value" that can be impacted by a `device_type` clause is now
associated with an array attribute that carry this information. This
includes:
- `worker` clause information
- `gang` clause information
- `vector` clause information
- `collapse` clause information
- `tile` clause information
The representation of the `gang` clause information has been updated and
all values are now carried in a single operand segment. This segment is
then subdivided by `device_type`. Each value in a segment is also
associated with a `GangArgType` so it can be differentiated
(num/dim/static). This simplify the handling of gang values an limit the
number of new attributes needed.
When the clause can be associated with the operation without any value
(`gang`, `vector`, `worker`). These are represented by a dedicated
attributes with device_type information.
Extra getter functions are provided to make it easier to retrieve a
value based on a device_type.
Commit: 5fd18bdef9e1f18d6069a542551f046f1a179b38
https://github.com/llvm/llvm-project/commit/5fd18bdef9e1f18d6069a542551f046f1a179b38
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/inline-sourcefile/TestInlineSourceFiles.py
Log Message:
-----------
Revert "XFAIL test with dsymutil"
This reverts commit c041fa1093c3ad7be040fb362a10ca3900c698a4 as Adrian
added support to dsymutil.
Commit: c1eef483b2c1ab2564e0ee1e4d1a30db11f8049f
https://github.com/llvm/llvm-project/commit/c1eef483b2c1ab2564e0ee1e4d1a30db11f8049f
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/include/mlir/IR/AffineExpr.h
M mlir/include/mlir/IR/AffineExprVisitor.h
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/IR/AffineExpr.cpp
A mlir/test/IR/affine-walk.mlir
M mlir/test/lib/IR/CMakeLists.txt
A mlir/test/lib/IR/TestAffineWalk.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[MLIR] Support interrupting AffineExpr walks (#74792)
Support WalkResult for AffineExpr walk and support interrupting walks
along the lines of Operation::walk. This allows interrupted walks when a
condition is met. Also, switch from std::function to llvm::function_ref
for the walk function.
Commit: 47685633a7dc74451acbc551b111929166d4d0bd
https://github.com/llvm/llvm-project/commit/47685633a7dc74451acbc551b111929166d4d0bd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
Log Message:
-----------
AMDGPU: Make v4bf16 a legal type (#76217)
Gets a few code quality improvements. A few cases are worse
from losing load narrowing.
Depends #76213 #76214 #76215
Commit: 597086c60959dd5b3c032552e8b42dd1d053f233
https://github.com/llvm/llvm-project/commit/597086c60959dd5b3c032552e8b42dd1d053f233
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/strict_fp_casts.ll
Log Message:
-----------
DAG: Implement promotion for strict_fp_round (#74332)
Needs an AMDGPU hack to get the selection to work. The ordinary
variant is custom lowered through an almost equivalent target node
that would need a strict variant for additional known bits
optimizations.
Commit: 2cf420d5b846a4733ef0ef7c8ed0ae0bfd1c6772
https://github.com/llvm/llvm-project/commit/2cf420d5b846a4733ef0ef7c8ed0ae0bfd1c6772
Author: wanglei <wanglei at loongson.cn>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
M llvm/test/CodeGen/LoongArch/code-models.ll
M llvm/test/MC/LoongArch/Basic/Integer/invalid64.s
A llvm/test/MC/LoongArch/Macros/macros-call.s
M llvm/test/MC/LoongArch/Relocations/relocations.s
Log Message:
-----------
[LoongArch] Emit function call code sequence as `PCADDU18I+JIRL` in medium code model
According to the description of the psABI v2.20:
https://github.com/loongson/la-abi-specs/releases/tag/v2.20, adjustments
are made to the function call instructions under the medium code model.
At the same time, AsmParser has already supported parsing the call36 and
tail36 macro instructions.
Commit: 3d6fc35b9071009c5ef37f879a12982c6a54db60
https://github.com/llvm/llvm-project/commit/3d6fc35b9071009c5ef37f879a12982c6a54db60
Author: wanglei <wanglei at loongson.cn>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
Log Message:
-----------
[LoongArch] Pre-commit test for #76555. NFC
Commit: c56a5e895a96fec4292e9333d998cfa88770432a
https://github.com/llvm/llvm-project/commit/c56a5e895a96fec4292e9333d998cfa88770432a
Author: wanglei <wanglei at loongson.cn>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/test/CodeGen/LoongArch/code-models.ll
M llvm/test/CodeGen/LoongArch/expand-call.ll
M llvm/test/CodeGen/LoongArch/global-address.ll
M llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
M llvm/test/CodeGen/LoongArch/tls-models.ll
Log Message:
-----------
[LoongArch] Reimplement the expansion of PseudoLA*_LARGE instructions (#76555)
According to the description of the psABI v2.30:
https://github.com/loongson/la-abi-specs/releases/tag/v2.30, moved the
expansion of relevant pseudo-instructions from
`LoongArchPreRAExpandPseudo` pass to `LoongArchExpandPseudo` pass, to
ensure that the code sequences of `PseudoLA*_LARGE` instructions and
Medium code model's function call are not scheduled.
Commit: f68647997b828eeaa580e74e1d7c8565a9ecd215
https://github.com/llvm/llvm-project/commit/f68647997b828eeaa580e74e1d7c8565a9ecd215
Author: Dávid Ferenc Szabó <30732159+dfszabo at users.noreply.github.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
Log Message:
-----------
[GlobalISel] Adding support for handling G_ASSERT_{SEXT,ZEXT,ALIGN} i… (#74196)
…n artifact combiner
These instructions are hint for optimizations and can be treated as
copies and are handled as such with this change. Without it is possible
to run into an assertion, since tryCombineUnmergeValues rightfully use
getDefIgnoringCopies to get the source MI, which already handle these
hint instructions and treat them as copies. The problem is that
markDefDead only considers COPYs, which will lead to crash with
assertion for cases like testUnmergeHintOfTrunc.
Commit: b4cfb50c65bd3893d1a0639deb33bd664214a20f
https://github.com/llvm/llvm-project/commit/b4cfb50c65bd3893d1a0639deb33bd664214a20f
Author: Michal Paszkowski <michal.paszkowski at outlook.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
M llvm/test/CodeGen/SPIRV/opaque_pointers.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/get_global_offset.ll
A llvm/test/CodeGen/SPIRV/pointers/kernel-argument-pointer-type-deduction-no-bitcast-to-generic.ll
A llvm/test/CodeGen/SPIRV/pointers/two-bitcast-users.ll
A llvm/test/CodeGen/SPIRV/pointers/two-subsequent-bitcasts.ll
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpPhi_ArgumentsPlaceholders.ll
M llvm/test/CodeGen/SPIRV/transcoding/spec_const.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
Log Message:
-----------
[SPIR-V] Emit SPIR-V bitcasts between source/expected pointer type (#69621)
This patch introduces a new spv_ptrcast intrinsic for tracking expected
pointer types. The change fixes multiple OpenCL CTS regressions due the
switch to opaque pointers (e.g. basic/hiloeo).
Commit: f5fd1836836e0d37dea61cc842199713cc0e2fc4
https://github.com/llvm/llvm-project/commit/f5fd1836836e0d37dea61cc842199713cc0e2fc4
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
R clang/test/Modules/pr60085.cppm
Log Message:
-----------
[NFC] [C++20] [Modules] Remove pr60085.cppm with deprecated practice
See https://github.com/llvm/llvm-project/issues/60085 for the complete
story.
Previously I thought the problem got fixed surprisingly. But it is not
true. I just tested it with a deprecated method. My bad. Then the
deprecated style should be removed and the proper style can't work. So
I'll remove the test and reopen that issue to look into it.
Commit: 054b5fc0fd41bcbadcc6967c39a5f6bb151bdcd1
https://github.com/llvm/llvm-project/commit/054b5fc0fd41bcbadcc6967c39a5f6bb151bdcd1
Author: Benoit Jacob <jacob.benoit.1 at gmail.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/avx512-shuffles/shuffle-chained-bf16.ll
Log Message:
-----------
X86: add some missing lowerings for shuffles on `bf16` element type. (#76076)
Some shuffles with `bf16` as element type were running into a
`llvm_unreachable`. Key to reproducing was to chain two shuffles.
```llvm
define <2 x bfloat> @shuffle_chained_v32bf16_v2bf16(<32 x bfloat> %a) {
%s = shufflevector <32 x bfloat> %a, <32 x bfloat> zeroinitializer, <32 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
%s2 = shufflevector <32 x bfloat> %s, <32 x bfloat> zeroinitializer, <2 x i32> <i32 0, i32 1>
ret <2 x bfloat> %s2
}
```
This was hitting this UNREACHABLE:
```
Not a valid 512-bit x86 vector type!
UNREACHABLE executed at /home/benoit/iree/third_party/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp:17124!
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: /home/benoit/mlir-build/bin/llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw,+avx512bf16
1. Running pass 'Function Pass Manager' on module '<stdin>'.
2. Running pass 'X86 DAG->DAG Instruction Selection' on function '@shuffle_chained_v32bf16_v2bf16'
```
Commit: 52d1397e38ee88b170585c9c824d08e6975890ca
https://github.com/llvm/llvm-project/commit/52d1397e38ee88b170585c9c824d08e6975890ca
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
Log Message:
-----------
[LoongArch] Fix -Wunused-variable in LoongArchExpandPseudoInsts.cpp (NFC)
llvm-project/llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp:480:20:
error: unused variable 'MF' [-Werror,-Wunused-variable]
MachineFunction *MF = MBB.getParent();
^
1 error generated.
Commit: 16dc82122bee915d122a68a4f1680ab810012906
https://github.com/llvm/llvm-project/commit/16dc82122bee915d122a68a4f1680ab810012906
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-04 (Thu, 04 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
Log Message:
-----------
[RISCV] Remove isGPRF64AsFPR and isGPRPF64AsFPR functions from AsmParser. NFC
These are identical to isGPRAsFPR. By overriding the PredicateMethod
on the AsmOperands in tblgen we can share a single function.
Commit: 668165002543fd3a88413a5c2601774395bfd10e
https://github.com/llvm/llvm-project/commit/668165002543fd3a88413a5c2601774395bfd10e
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/smax-icmp.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
Log Message:
-----------
[InstCombine] Revert the `signed icmp -> unsigned icmp` canonicalization when folding `icmp Pred min|max(X, Y), Z` (#76685)
This patch tries to flip the signedness of predicates when folding an
unsigned icmp with a signed min/max. It will enable more optimizations
as we canonicalizes a signed icmp into an unsigned icmp when both
operands are known to have the same sign.
Fixes #76672.
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=949ec83eaf6fa6dbffb94c2ea9c0a4d5efdbd239&to=2deca1aea8a4e13609bab72c522a97d424f0fc2d&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|-0.00%|+0.01%|+0.05%|-0.12%|-0.01%|-0.03%|-0.00%|
NOTE: We can flip the signedness of predicate if both operands are
negative. But I don't see the benefit of handling these cases.
Commit: e0c554ad87d18dcbfcb9b6485d0da800ae1338d1
https://github.com/llvm/llvm-project/commit/e0c554ad87d18dcbfcb9b6485d0da800ae1338d1
Author: Nick Anderson <nickleus27 at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
A llvm/include/llvm/CodeGen/CodeGenPrepare.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/lib/CodeGen/BasicBlockPathCloning.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
M llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll
M llvm/test/CodeGen/AArch64/convertphitype.ll
M llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll
M llvm/test/CodeGen/AArch64/sve-vscale.ll
M llvm/test/CodeGen/AArch64/sve2-vscale-sinking.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll
M llvm/test/CodeGen/Generic/addr-use-count.ll
M llvm/test/CodeGen/X86/callbr-codegenprepare.ll
M llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/CodeGen/X86/convertphitype.ll
M llvm/test/CodeGen/X86/indirect-br-gep-unmerge.ll
M llvm/test/CodeGen/X86/pr58538.ll
M llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
M llvm/test/CodeGen/X86/tailcall-extract.ll
M llvm/test/DebugInfo/ARM/salvage-debug-info.ll
M llvm/test/DebugInfo/X86/zextload.ll
M llvm/test/Other/codegenprepare-and-debug.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/sink-gather-scatter-addressing.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll
M llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll
M llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
M llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll
M llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
M llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll
M llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr72046.ll
M llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll
M llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll
M llvm/test/Transforms/CodeGenPrepare/X86/select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll
M llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll
M llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll
M llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
M llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll
M llvm/test/Transforms/HotColdSplit/coldentrycount.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll
M llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll
M llvm/tools/opt/opt.cpp
Log Message:
-----------
Port CodeGenPrepare to new pass manager (and BasicBlockSectionsProfil… (#75380)
Port CodeGenPrepare to new pass manager and dependency
BasicBlockSectionsProfileReader
Fixes: #64560
Co-authored-by: Krishna-13-cyber <84722531+Krishna-13-cyber at users.noreply.github.com>
Commit: 59af659ee3c790d06cb5e2bf580e042547c24323
https://github.com/llvm/llvm-project/commit/59af659ee3c790d06cb5e2bf580e042547c24323
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/X86/bfloat.ll
Log Message:
-----------
[X86][BF16] Try to use `f16` for lowering (#76901)
This patch fixes BF16 32-bit ABI problem:
https://godbolt.org/z/6dMnh8jGG
Commit: f5f66e26b5f010218651cab831d5651fe7a71a0a
https://github.com/llvm/llvm-project/commit/f5f66e26b5f010218651cab831d5651fe7a71a0a
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86InstrSystem.td
M llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86.ll
M llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll
M llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll
M llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll
M llvm/test/CodeGen/X86/invpcid-intrinsic.ll
M llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll
M llvm/test/CodeGen/X86/movdir-intrinsic-x86_64.ll
M llvm/test/CodeGen/X86/sha.ll
M llvm/test/CodeGen/X86/x64-cet-intrinsics.ll
Log Message:
-----------
[X86]Support lowering for APX Promoted SHA/MOVDIR/CRC32/INVPCID/CET instructions (#76786)
R16-R31 was added into GPRs in
https://github.com/llvm/llvm-project/pull/70958,
This patch supports the lowering for promoted
SHA/MOVDIR/CRC32/INVPCID/CET.
RFC:
https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
Commit: 77b124cc574bb427b066fa8c56df7d37a27feb8f
https://github.com/llvm/llvm-project/commit/77b124cc574bb427b066fa8c56df7d37a27feb8f
Author: David Green <david.green at arm.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/vecreduce-fadd-strict.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul-strict.ll
Log Message:
-----------
[AArch64][GlobalISel] Add legalization for G_VECREDUCE_SEQ_FADD. (#76238)
And G_VECREDUCE_SEQ_FMUL at the same time. They require the elements of
the vector operand to be accumulated in order, so just need to be
scalarized.
Some of the operands are not simplified as much as they can quite yet
due to not canonicalizing constant operands post-legalization.
Commit: b5ced67a2a99a2a4a419832192475c516b8b6bb2
https://github.com/llvm/llvm-project/commit/b5ced67a2a99a2a4a419832192475c516b8b6bb2
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
Log Message:
-----------
[CodeGenPassBuilder] Replace `AnalysisKey` -> `MachinePassKey` (#77053)
Forgot to update them in #75567.
Commit: 59f3b7202dc4590215e1fba92e35ec2c0eeb2f65
https://github.com/llvm/llvm-project/commit/59f3b7202dc4590215e1fba92e35ec2c0eeb2f65
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_smem.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_smem.txt
Log Message:
-----------
[AMDGPU] Add GXF12 8- and 16-bit SMEM loads (#76966)
Commit: 4d7c5ad58467502fcbc433591edff40d8a4d697d
https://github.com/llvm/llvm-project/commit/4d7c5ad58467502fcbc433591edff40d8a4d697d
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
Log Message:
-----------
[NewPM] Update CodeGenPreparePass reference in CodeGenPassBuilder (#77054)
Follows #75380.
Commit: e96e7a9a864b39a69455d5baad271f04cbf2d909
https://github.com/llvm/llvm-project/commit/e96e7a9a864b39a69455d5baad271f04cbf2d909
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
Log Message:
-----------
[AMDGPU] Implement readcyclecounter for GFX12 (#76965)
Commit: bb6d5c220004a5d7e466a669324001285a688918
https://github.com/llvm/llvm-project/commit/bb6d5c220004a5d7e466a669324001285a688918
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M flang/test/Lower/array-temp.f90
M mlir/lib/Dialect/Linalg/Transforms/DecomposeLinalgOps.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/test/Conversion/VectorToArmSME/vector-to-arm-sme.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
M mlir/test/Dialect/ArmSME/arith-ops-to-sme.mlir
M mlir/test/Dialect/LLVMIR/type-consistency.mlir
M mlir/test/Dialect/Linalg/loops.mlir
M mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/Math/algebraic-simplification.mlir
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/Dialect/Math/polynomial-approximation.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/Dialect/NVGPU/transform-create-async-groups.mlir
M mlir/test/Dialect/SCF/loop-pipelining.mlir
M mlir/test/Dialect/SparseTensor/sparse_1d.mlir
M mlir/test/Dialect/SparseTensor/sparse_affine.mlir
M mlir/test/Dialect/SparseTensor/sparse_concat.mlir
M mlir/test/Dialect/SparseTensor/sparse_storage.mlir
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
M mlir/test/Dialect/Tosa/constant-op-fold.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Vector/vector-broadcast-lowering-transforms.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/Vector/vector-mask-lowering-transforms.mlir
M mlir/test/Dialect/Vector/vector-multi-reduction-lowering.mlir
M mlir/test/Dialect/Vector/vector-scalable-create-mask-lowering.mlir
Log Message:
-----------
[mlir][Transforms] `GreedyPatternRewriteDriver`: Do not CSE constants during iterations (#75897)
The `GreedyPatternRewriteDriver` tries to iteratively fold ops and apply
rewrite patterns to ops. It has special handling for constants: they are
CSE'd and sometimes moved to parent regions to allow for additional
CSE'ing. This happens in `OperationFolder`.
To allow for efficient CSE'ing, `OperationFolder` maintains an internal
lookup data structure to find the existing constant ops with the same
value for each `IsolatedFromAbove` region:
```c++
/// A mapping between an insertion region and the constants that have been
/// created within it.
DenseMap<Region *, ConstantMap> foldScopes;
```
Rewrite patterns are allowed to modify operations. In particular, they
may move operations (including constants) from one region to another
one. Such an IR rewrite can make the above lookup data structure
inconsistent.
We encountered such a bug in a downstream project. This bug materialized
in the form of an op that uses the result of a constant op from a
different `IsolatedFromAbove` region (that is not accessible).
This commit changes the behavior of the `GreedyPatternRewriteDriver`
such that `OperationFolder` is used to CSE constants at the beginning of
each iteration (as the worklist is populated), but no longer during an
iteration. `OperationFolder` is no longer used after populating the
worklist, so we do not have to care about inconsistent state in the
`OperationFolder` due to IR rewrites. The `GreedyPatternRewriteDriver`
now performs the op folding by itself instead of calling
`OperationFolder::tryToFold`.
This change changes the order of constant ops in test cases, but not the
region in which they appear. All broken test cases were fixed by turning
`CHECK` into `CHECK-DAG`.
Alternatives considered: The state of `OperationFolder` could be
partially invalidated with every `notifyOperationModified` notification.
That is more fragile than the solution in this commit because incorrect
rewriter API usage can lead to missing notifications and hard-to-debug
`IsolatedFromAbove` violations. (It did not fix the above mention bug in
a downstream project, which could be due to incorrect rewriter API usage
or due to another conceptual problem that I missed.) Moreover, ops are
frequently getting modified during a greedy pattern rewrite, so we would
likely keep invalidating large parts of the state of `OperationFolder`
over and over.
Migration guide: Turn `CHECK` into `CHECK-DAG` in test cases. Constant
ops are no longer folded during a greedy pattern rewrite. If you rely on
folding (and rematerialization) of constant ops during a greedy pattern
rewrite, turn the folder into a pattern.
Commit: b662c9aa0e0580e1fc78a8787414c86ad1984742
https://github.com/llvm/llvm-project/commit/b662c9aa0e0580e1fc78a8787414c86ad1984742
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation.cpp
Log Message:
-----------
[mlir][bufferization][NFC] Buffer deallocation: Add comment to `handleInterface` (#76956)
This is a follow-up for #68648.
Commit: 71f56e49ceca75dbf82cbb9537c2545c2d2e51c9
https://github.com/llvm/llvm-project/commit/71f56e49ceca75dbf82cbb9537c2545c2d2e51c9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/shl.ll
Log Message:
-----------
[ConstraintElim] Decompose shl nsw for signed predicates (#76961)
shl nsw x, shift can be interpreted as mul nsw x, (1<<shift), except
when shift is bw-1 (https://alive2.llvm.org/ce/z/vDh2xT). Use this when
decomposing shl. The equivalent decomposition for the unsigned case
already exists.
Commit: 2a1e3906a4913ebf11760edb8d51c099a9cedf41
https://github.com/llvm/llvm-project/commit/2a1e3906a4913ebf11760edb8d51c099a9cedf41
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/utils/lit/lit/llvm/config.py
Log Message:
-----------
[llvm][lit] Handle case when there is no llvm default target triple (#76934)
This can happen when you do not choose a specific target triple, and do
not enable the host architecture when building (if you do enable it, it
would become the default target). Such as only enabling RISC-V, when
building on an AArch64 machine.
Originally reported
https://discourse.llvm.org/t/llvm-test-error-could-not-turn-into-itanium-abi-triple/76013.
When attempting to run a single test via lit you get: `Could not turn ''
into Itanium ABI triple`
Setting a default triple with `LLVM_DEFAULT_TARGET_TRIPLE` works around
the issue.
This change copies the existing host triple check to target triple, and
adds a note to highlight the potential issue. As `check-clang` on my
AArch64 machine failed 32% of tests in this configuration.
Which is to be expected and is ok if you only want to run specific
tests, but for anyone unintentionally building this way the note is a
clue to the cause.
Commit: 190a75b5f12d3872a5a26d6079d62adae40f147d
https://github.com/llvm/llvm-project/commit/190a75b5f12d3872a5a26d6079d62adae40f147d
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/Sema/SemaInit.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/SemaCXX/coro-lifetimebound.cpp
Log Message:
-----------
[coroutines] Introduce [[clang::coro_disable_lifetimebound]] (#76818)
Lifetime-bound analysis of reference parameters of coroutines and
coroutine wrappers is helpful in surfacing memory bugs associated with
using temporaries and stack variables in call expressions in plain
return statements.
This is the default semantics of `[[clang::coro_lifetimebound]]`. But it
should be okay to relax the requirements for a function when the
reference arguments are not lifetime bound. For example:
A coroutine wrapper accepts a reference parameter but does not pass it
to the underlying coroutine call.
```cpp
[[clang::coro_wrapper]] Task<int> wrapper(const Request& req) {
return req.shouldCallA() ? coroA() : coroB();
}
```
Or passes it the coroutine by value
```cpp
Task<int> coro(std::string s) { co_return s.size(); }
[[clang::coro_wrapper]] wrapper(const std::string& s) { return coro(s); }
```
This patch allows functions to be annotated with
`[[clang::coro_disable_lifetime_bound]]` to disable lifetime bound
analysis for all calls to this function.
---
One missing piece here is a note suggesting using this annotation in
cases of lifetime warnings. This would require some more tweaks in the
lifetimebound analysis to recognize violations involving coroutines only
and produce this note only in those cases.
Commit: 86ef039220de4b7d2e2f1d5e93874ae7a242730e
https://github.com/llvm/llvm-project/commit/86ef039220de4b7d2e2f1d5e93874ae7a242730e
Author: Z572 <zhengjunjie at iscas.ac.cn>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/icmp-abs.ll
Log Message:
-----------
[InstCombine] Simplify compare abs(X) and X. (#76385)
fix https://github.com/llvm/llvm-project/issues/72653
proof: https://alive2.llvm.org/ce/z/LZzZaj
Commit: 67963d384b23a2d46967b8f39ec2df3375731f4f
https://github.com/llvm/llvm-project/commit/67963d384b23a2d46967b8f39ec2df3375731f4f
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
Log Message:
-----------
[include-cleaner] Fix a race issue when editing multiple files. (#76960)
We have a previous fix
https://github.com/llvm/llvm-project/commit/be861b64d94198230d8f9889b17280e3cd215a0a,
which snapshots all processing files.
It works most of times, the snapshot (InMemoryFileSystem) is based on
the file path. The file-path-based lookup can fail in a subtle way for
some tricky cases (we encounter it internally), which will result in
reading a corrupted file.
This is a different fix, we don't modify files on the fly, instead, we
write files when the tool finishes for all files.
Commit: 4daea501c4fc969bc6d8baafe646487ae1881aab
https://github.com/llvm/llvm-project/commit/4daea501c4fc969bc6d8baafe646487ae1881aab
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrPredicates.td
A llvm/test/MC/Disassembler/X86/apx/div.txt
A llvm/test/MC/Disassembler/X86/apx/idiv.txt
A llvm/test/MC/Disassembler/X86/apx/imul.txt
A llvm/test/MC/Disassembler/X86/apx/mul.txt
A llvm/test/MC/X86/apx/div-att.s
A llvm/test/MC/X86/apx/div-intel.s
A llvm/test/MC/X86/apx/idiv-att.s
A llvm/test/MC/X86/apx/idiv-intel.s
A llvm/test/MC/X86/apx/imul-att.s
A llvm/test/MC/X86/apx/imul-intel.s
A llvm/test/MC/X86/apx/mul-att.s
A llvm/test/MC/X86/apx/mul-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][MC] Support encoding/decoding for APX variant MUL/IMUL/DIV/IDIV instructions (#76919)
Four variants: promoted legacy, ND (new data destination), NF (no flags
update) and NF_ND (NF + ND).
The syntax of NF instructions is aligned with GNU binutils.
https://sourceware.org/pipermail/binutils/2023-September/129545.html
Commit: a72ab9c14d604ae857acad5ed7d6b5be6914c619
https://github.com/llvm/llvm-project/commit/a72ab9c14d604ae857acad5ed7d6b5be6914c619
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/span
M libcxx/include/version
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
A libcxx/test/std/containers/views/views.span/span.elem/at.pass.cpp
M libcxx/test/std/containers/views/views.span/span.elem/op_idx.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/span.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++][span] P2821R5: `span.at()` (#74994)
- Implements: [P2821R5: span.at()](https://wg21.link/P2821R5)
(https://eel.is/c++draft/views.contiguous#views.span)
- Cleaned up `span.operator[]` test
---------
Co-authored-by: Zingam <zingam at outlook.com>
Commit: 255f95a40377677dd762df5a1aa65bcbb4f75c79
https://github.com/llvm/llvm-project/commit/255f95a40377677dd762df5a1aa65bcbb4f75c79
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/fstream
M libcxx/include/version
M libcxx/src/CMakeLists.txt
A libcxx/src/fstream.cpp
A libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/filebuf/types.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/fstream.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/fstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream/types.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream/types.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
A libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream/types.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/types.h
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++][streams] P1759R6: Native handles and file streams (#76632)
Implements: `P1759R6` https://wg21.link/P1759R6
- https://eel.is/c++draft/filebuf
- https://eel.is/c++draft/ifstream
- https://eel.is/c++draft/ofstream
- https://eel.is/c++draft/fstream
---------
Co-authored-by: Zingam <zingam at outlook.com>
Commit: a001e9718fd974859f2797a9f9ed7bf87d364e4f
https://github.com/llvm/llvm-project/commit/a001e9718fd974859f2797a9f9ed7bf87d364e4f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
A llvm/test/Transforms/InstCombine/pr77064.ll
Log Message:
-----------
[SimplifyLibCalls] Don't try to manually reprocess calls
The current code for reprocessing the result of fortified libcall
simplifications is not correct, because we might simplify to an
argument of the original call, and if that is again a libcall,
mistakenly think that this is actually the simplification result.
Instead of trying to fix this, simply remove the code entirely,
because InstCombine nowadays correctly handles reprocessing of
SimplifyLibCall results.
Fixes https://github.com/llvm/llvm-project/issues/77064.
Commit: 4319e1916dd13f5f7f56536acf01899320b82c6a
https://github.com/llvm/llvm-project/commit/4319e1916dd13f5f7f56536acf01899320b82c6a
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
Log Message:
-----------
[mlir][nvgpu] Introduce Multicast Capability to `nvgpu.tma.async.load` (#76935)
This PR improves the functionality of the `nvgpu.tma.async.load` Op by
adding support for multicast. While we already had this capability in
the lower-level `nvvm.cp.async.bulk.tensor.shared.cluster.global` NVVM
Op, this PR lowers mask information to the NVVM operation.
Commit: 2952fb349567fd95c4df020c9092e21972481710
https://github.com/llvm/llvm-project/commit/2952fb349567fd95c4df020c9092e21972481710
Author: Dmitriy Smirnov <dmitriy.smirnov at arm.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[TOSA] Usage of 32bit integer for 'index to float' in rfft2d (#75098)
Lowering of rfft2d to linalg now uses index to i32 cast if an output
float is of 32bit and cast to i64 otherwise.
Commit: 0eefcaf96d2900a4f3009026a3673ed3b7793fcc
https://github.com/llvm/llvm-project/commit/0eefcaf96d2900a4f3009026a3673ed3b7793fcc
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_revd.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pfalse.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_sclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
A clang/test/Sema/aarch64-sme2-sve2p1-diagnostics.c
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[Clang][SME] Add IsStreamingOrSVE2p1 (#76975)
This patch adds IsStreamingOrSVE2p1 to the applicable builtins and a
warning for when those builtins are not used in a streaming or sve2p1
function.
Commit: c458f928fad7bbcf08ab1da9949eb2969fc9f89c
https://github.com/llvm/llvm-project/commit/c458f928fad7bbcf08ab1da9949eb2969fc9f89c
Author: Duo Wang <duow1 at uci.edu>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/test/SemaTemplate/instantiation-depth-default.cpp
Log Message:
-----------
[NFC][clang][test][asan] Make `instantiation-depth-default.cpp` a valid test case under `asan` and `ubsan` configs (#75254)
Clang test `instantiation-depth-default.cpp` fails on Windows when built
with `ubsan` due to extra warnings printed by the compiler:
```console
File instantiation-depth-default.cpp Line 11: stack nearly exhausted; compilation time may suffer, and crashes due to stack overflow are likely
```
The test case was disabled for `asan` in 571a647 because of the extra
stack usage. Since `ubsan` also increases stack usage, seems like the
two configs should be treated uniformly.
On the other hand, we might be able to re-enable this test case for
`asan`. During some preliminary testing on Windows, Linux, and macOS
with the host compiler being as old as clang-10, the test case exited
successfully if the `stack-exhausted` warnings are suppressed, though I
haven't done exhaustive testing across platforms and clang versions. Any
insights into whether this change will introduce any risks to existing
buildbots is appreciated.
Enabling this test case for `asan` helps to improve our test coverage,
but if it causes problems on any buildbot, marking it as unsupported for
`ubsan` is also a viable solution.
Commit: b7e50df0262a9e563bc908e2bea06cd839a42140
https://github.com/llvm/llvm-project/commit/b7e50df0262a9e563bc908e2bea06cd839a42140
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/tools/lli/lli.cpp
Log Message:
-----------
[lli] Mimic default LLJIT logic with explicit --jit-linker option (#76964)
Forcing the JITLinker to the default configuration shouldn't affect the
configuration of the JIT. Since it's implemented by setting the
ObjectLinkingLayerCreator, it did have side-effects though. In
particular, we skipped the Code- and RelocationModel setting in
`LLJITBuilderState::prepareForConstruction()`.
Commit: 8c7f10eadbcf1271b6da52ccac43c241f9b8f06e
https://github.com/llvm/llvm-project/commit/8c7f10eadbcf1271b6da52ccac43c241f9b8f06e
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/Util/add-TLI-mappings.ll
Log Message:
-----------
[TLI] Add mappings to SLEEF/ArmPL libcall variants taking linear args. (#76060)
The mappings correspond to vectorized variants (fixed/scalable) for the
math functions: modf, sincos, sincospi.
Commit: 567941bcc3b1fc3b1d2a902cf7ae2e173247a45f
https://github.com/llvm/llvm-project/commit/567941bcc3b1fc3b1d2a902cf7ae2e173247a45f
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.h
Log Message:
-----------
[Clang][SME] Remove unused HasSVE2p1 variable
Removes the HasSVE2p1 variable to stop a warning from https://github.com/llvm/llvm-project/pull/76975
Commit: 44b3cf46e992b76a9e188367922a1184437dfa4c
https://github.com/llvm/llvm-project/commit/44b3cf46e992b76a9e188367922a1184437dfa4c
Author: drazi <fengxie83 at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/test/mlir-tblgen/op-format-spec.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
add prop-dict support for custom directive for mlir-tblgen (#77061)
According to
https://mlir.llvm.org/docs/DefiningDialects/Operations/#custom-directives,
custom directive supports attr-dict
> attr-dict Directive: NamedAttrList &
But it doesn't support prop-dict which is introduced into MLIR recently.
It's useful to have tblgen support prop-dict like attr-dict. This PR
enable tblgen to support prop-dict
```bash
error: only variables and types may be used as parameters to a custom directive
... custom<Print>(prop-dict)
```
Co-authored-by: Fung Xie <ftse at nvidia.com>
Commit: ace69e6b942b8fa7e610d70be2a92e801ceea481
https://github.com/llvm/llvm-project/commit/ace69e6b942b8fa7e610d70be2a92e801ceea481
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/docs/Dialects/GPU.md
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/lib/Dialect/GPU/Pipelines/GPUToNVVMPipeline.cpp
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/dump-ptx.mlir
M mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
M mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f16-f16-accum.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/sm80/transform-mma-sync-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32-bare-ptr.mlir
M mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-and.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-maxsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-minsi.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-op.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-or.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-region.mlir
M mlir/test/Integration/GPU/CUDA/all-reduce-xor.mlir
M mlir/test/Integration/GPU/CUDA/gpu-to-cubin.mlir
M mlir/test/Integration/GPU/CUDA/multiple-all-reduce.mlir
M mlir/test/Integration/GPU/CUDA/printf.mlir
M mlir/test/Integration/GPU/CUDA/shuffle.mlir
A mlir/test/Integration/GPU/CUDA/sm90/asd
M mlir/test/Integration/GPU/CUDA/sm90/cga_cluster.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
M mlir/test/Integration/GPU/CUDA/two-modules.mlir
Log Message:
-----------
[mlir][gpu] Improve `gpu-lower-to-nvvm-pipeline` Documentation (#77062)
This PR improves the documentation for the `gpu-lower-to-nvvm-pipeline`
(as it was remaning item for #75775)
- Changes pipeline `gpu-lower-to-nvvm` -> `gpu-lower-to-nvvm-pipeline`
- Adds a section in GPU Dialect in website. It clarifies the pipeline's
functionality in lowering primary dialects to NVVM targets.
Commit: 20a05677f9394d4bc9467fe7bc93a4ebd3aeda61
https://github.com/llvm/llvm-project/commit/20a05677f9394d4bc9467fe7bc93a4ebd3aeda61
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
Log Message:
-----------
[clang] Accept recursive non-dependent calls to functions with deduced return type (#75456)
Treat such calls as dependent since it is much easier to implement.
Fixes https://github.com/llvm/llvm-project/issues/71015
Commit: 7648371c25cf21b84028935c298e2dc088ae5a52
https://github.com/llvm/llvm-project/commit/7648371c25cf21b84028935c298e2dc088ae5a52
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
R llvm/include/llvm/CodeGen/CodeGenPrepare.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/lib/CodeGen/BasicBlockPathCloning.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
M llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll
M llvm/test/CodeGen/AArch64/convertphitype.ll
M llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll
M llvm/test/CodeGen/AArch64/sve-vscale.ll
M llvm/test/CodeGen/AArch64/sve2-vscale-sinking.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll
M llvm/test/CodeGen/Generic/addr-use-count.ll
M llvm/test/CodeGen/X86/callbr-codegenprepare.ll
M llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/CodeGen/X86/convertphitype.ll
M llvm/test/CodeGen/X86/indirect-br-gep-unmerge.ll
M llvm/test/CodeGen/X86/pr58538.ll
M llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
M llvm/test/CodeGen/X86/tailcall-extract.ll
M llvm/test/DebugInfo/ARM/salvage-debug-info.ll
M llvm/test/DebugInfo/X86/zextload.ll
M llvm/test/Other/codegenprepare-and-debug.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/sink-gather-scatter-addressing.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll
M llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll
M llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
M llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll
M llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
M llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll
M llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr72046.ll
M llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll
M llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll
M llvm/test/Transforms/CodeGenPrepare/X86/select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll
M llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll
M llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll
M llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
M llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll
M llvm/test/Transforms/HotColdSplit/coldentrycount.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll
M llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll
M llvm/tools/opt/opt.cpp
Log Message:
-----------
Revert 4d7c5ad58467502fcbc433591edff40d8a4d697d "[NewPM] Update CodeGenPreparePass reference in CodeGenPassBuilder (#77054)"
Revert e0c554ad87d18dcbfcb9b6485d0da800ae1338d1 "Port CodeGenPrepare to new pass manager (and BasicBlockSectionsProfil… (#75380)"
Revert #75380 and #77054 as they were breaking EXPENSIVE_CHECKS buildbots: https://lab.llvm.org/buildbot/#/builders/104
Commit: 3eeed79946124a8f67a89bb950a1e510369dcdf9
https://github.com/llvm/llvm-project/commit/3eeed79946124a8f67a89bb950a1e510369dcdf9
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CXX/drs/dr26xx.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/default-arguments.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p11-1y.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p23.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p4.cpp
M clang/test/CXX/temp/temp.deduct/p9.cpp
M clang/test/SemaCXX/cxx1y-init-captures.cpp
M clang/test/SemaCXX/cxx1z-lambda-star-this.cpp
M clang/test/SemaCXX/lambda-expressions.cpp
M clang/test/SemaCXX/lambda-pack-expansion.cpp
M clang/test/SemaCXX/vartemplate-lambda.cpp
M clang/test/SemaCXX/warn-unused-lambda-capture.cpp
M clang/test/SemaTemplate/instantiate-local-class.cpp
Log Message:
-----------
[clang] Correctly implement CWG 2672 (#75001)
Commit: d187dfe51534b8e15834346ea1898977b7bedace
https://github.com/llvm/llvm-project/commit/d187dfe51534b8e15834346ea1898977b7bedace
Author: David Green <david.green at arm.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-csel.ll
Log Message:
-----------
[AArch64] Add some tests for addLikeOr with csinc. NFC
Commit: 86127305d4602801ba7ffdc74377ed67b18819ac
https://github.com/llvm/llvm-project/commit/86127305d4602801ba7ffdc74377ed67b18819ac
Author: Qizhi Hu <836744285 at qq.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/unittests/AST/StructuralEquivalenceTest.cpp
Log Message:
-----------
[clang][ASTImporter][StructuralEquivalence] improve StructuralEquivalence on recordType (#76226)
Types comparison in `StructuralEquivalence` ignores its `DeclContext`
when they are generated by template specialization implicitly and this
will produce incorrect result. Add comparison of `DeclContext` of
ClassTemplateSpecializationDecl to improve result.
fix [issue](https://github.com/llvm/llvm-project/issues/65913)
Co-authored-by: huqizhi <836744285 at qq.com>
Commit: 70e67253d60a984bd83844690791a023448e3623
https://github.com/llvm/llvm-project/commit/70e67253d60a984bd83844690791a023448e3623
Author: Abhina Sree <69635948+abhina-sree at users.noreply.github.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M third-party/benchmark/src/timers.cc
Log Message:
-----------
[System][z/OS] Fix per-thread timing error on z/OS (#76947)
This patch calls ProcessCPUUsage() for z/OS because we do not support CLOCK_THREAD_CPUTIME_ID. This copies the change made to google benchmark here
https://github.com/google/benchmark/commit/e3824e7503187993b287ac8c8144a35bf5ccfd44
Commit: f7f7574afe4cfc11ebe5d8cb811d5cd28dc862f6
https://github.com/llvm/llvm-project/commit/f7f7574afe4cfc11ebe5d8cb811d5cd28dc862f6
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/switch-sub.ll
Log Message:
-----------
[InstCombine] Canonicalize `switch(C-X)` to `switch(X)` (#77051)
This patch canonicalizes `switch(C-X)` to `switch(X)`.
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=7954c57124b495fbdc73674d71f2e366e4afe522&to=31a9adff1e633f0f3c423fb8487fc15d17e171f2&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|-0.01%|+0.02%|+0.02%|+0.05%|-0.07%|-0.02%|-0.02%|
Commit: 0504e932880e0c4c333baeba9b8d674c5b9ae316
https://github.com/llvm/llvm-project/commit/0504e932880e0c4c333baeba9b8d674c5b9ae316
Author: Nishant Mittal <nishantwrp at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libc/config/darwin/arm/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/gpu/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/__support/str_to_float.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/nan.cpp
A libc/src/math/generic/nanf.cpp
A libc/src/math/generic/nanl.cpp
A libc/src/math/nan.h
A libc/src/math/nanf.h
A libc/src/math/nanl.h
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/nan_test.cpp
A libc/test/src/math/smoke/nanf_test.cpp
A libc/test/src/math/smoke/nanl_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Implement nan(f|l) functions (#76690)
Specification: https://en.cppreference.com/w/c/numeric/math/nan
Commit: f8e2e25a09cb0018c9310d124e2788e04a0d36ed
https://github.com/llvm/llvm-project/commit/f8e2e25a09cb0018c9310d124e2788e04a0d36ed
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn] port 255f95a40377
Commit: da148a0805f1e1057b90d282321dea7966744201
https://github.com/llvm/llvm-project/commit/da148a0805f1e1057b90d282321dea7966744201
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/avoid-free-ext-promotion.ll
Log Message:
-----------
[AArch64] Add tests showing unnecessary cast promotion.
Commit: 1dbdf7658a80088fad1787529df0c33636be1c18
https://github.com/llvm/llvm-project/commit/1dbdf7658a80088fad1787529df0c33636be1c18
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/vec_fpext.ll
Log Message:
-----------
[X86] vec_fpext.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: c3071476609c9b68343a5acf58821aee8ab8ed60
https://github.com/llvm/llvm-project/commit/c3071476609c9b68343a5acf58821aee8ab8ed60
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/vec_fptrunc.ll
Log Message:
-----------
[X86] vec_fptrunc.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 4ecd6384af60ea6eb322fc7d3992b31915ec2a5a
https://github.com/llvm/llvm-project/commit/4ecd6384af60ea6eb322fc7d3992b31915ec2a5a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/fp128-cast.ll
Log Message:
-----------
[X86] fp128-cast.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: b51130a3311d5553c92408e6e52ea74269fa5a0b
https://github.com/llvm/llvm-project/commit/b51130a3311d5553c92408e6e52ea74269fa5a0b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/combine-fneg.ll
Log Message:
-----------
[X86] combine-fneg.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: ae81400a0fad6040483f1af5947388aecca5c3f7
https://github.com/llvm/llvm-project/commit/ae81400a0fad6040483f1af5947388aecca5c3f7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/keylocker-intrinsics.ll
Log Message:
-----------
[X86] keylocker-intrinsics.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 06f1e10908e624c1e90a0c647e9f74826ad3f011
https://github.com/llvm/llvm-project/commit/06f1e10908e624c1e90a0c647e9f74826ad3f011
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[mlir][nvvm] Add clock and clock64 special registers (#77088)
Tihs PR adds `clock` and `clock64` special registers to NVVM dialect.
Commit: f07aba4bc1fbd8301b09e2114ebc4149d2439cac
https://github.com/llvm/llvm-project/commit/f07aba4bc1fbd8301b09e2114ebc4149d2439cac
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/Targets/X86.cpp
A clang/test/CodeGen/X86/fp128-abi.c
Log Message:
-----------
[X86] Add ABI handling for __float128 to match with GCC (#75156)
Fixes #74601
Commit: 2b88bd110cbe61e1e3ef764d0362a75dc7c9cd50
https://github.com/llvm/llvm-project/commit/2b88bd110cbe61e1e3ef764d0362a75dc7c9cd50
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
Log Message:
-----------
[AsmPrinter][Dwarf5][nfc] Remove template from AccelTable class (#76296)
This template is no longer used.
Commit: a776740d6296520b8bde156aa3f8d9ecb32cddd9
https://github.com/llvm/llvm-project/commit/a776740d6296520b8bde156aa3f8d9ecb32cddd9
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
Log Message:
-----------
[DebugInfo] Correctly track metadata slots for DPValues (#76941)
Currently, the AsmWriter can print DPValues, but does not consider them
when creating slots for metadata, which can result in erroneous output
where metadata is numbered incorrectly. This patch modifies the
ModuleSlotTracker to correctly track slots for metadata that appears in
DPValues.
Commit: 65df69619c49717da64140baddda0f04ed62ffdf
https://github.com/llvm/llvm-project/commit/65df69619c49717da64140baddda0f04ed62ffdf
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
A llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
Log Message:
-----------
[ConstraintElim] Add tests for signed induction variables (NFC)
Commit: a0e6b7c0429204ac42095be09bd1d5dcad4a052a
https://github.com/llvm/llvm-project/commit/a0e6b7c0429204ac42095be09bd1d5dcad4a052a
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/Target/TargetInstrPredicate.td
M llvm/include/llvm/Target/TargetSchedule.td
A llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/CMakeLists.txt
A llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
M llvm/utils/TableGen/PredicateExpander.cpp
M llvm/utils/TableGen/PredicateExpander.h
Log Message:
-----------
[TableGen] Add a backend to generate MacroFusion predicators (#72222)
`FusionPredicate` is used to predicate if target instruction matches
the requirement. The targets can be firstMI, secondMI or both.
The `Fusion` contains a list of `FusionPredicate`. The generated code
will be like:
```
bool isNAME(const TargetInstrInfo &TII,
const TargetSubtargetInfo &STI,
const MachineInstr *FirstMI,
const MachineInstr &SecondMI) {
auto &MRI = SecondMI.getMF()->getRegInfo();
/* Predicates */
return true;
}
```
A boilerplate class called `SimpleFusion` is added. `SimpleFusion` has
a predefined structure of predicates and accepts predicate for
`firstMI`, predicate for `secondMI` and epilog/prolog as arguments.
The generated code for `SimpleFusion` will be like:
```
bool isNAME(const TargetInstrInfo &TII,
const TargetSubtargetInfo &STI,
const MachineInstr *FirstMI,
const MachineInstr &SecondMI) {
auto &MRI = SecondMI.getMF()->getRegInfo();
/* Prolog */
/* Predicate for `SecondMI` */
/* Wildcard */
/* Predicate for `FirstMI` */
/* Check One Use */
/* Tie registers */
/* Epilog */
return true;
}
```
Commit: 59569eb756265b2a5d9d96f6c6c5ee1a3c371c4f
https://github.com/llvm/llvm-project/commit/59569eb756265b2a5d9d96f6c6c5ee1a3c371c4f
Author: Arseniy Obolenskiy <gooddoog at student.su>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/test/Dialect/SCF/transform-ops.mlir
Log Message:
-----------
[mlir] Fix support for loop normalization with integer indices (#76566)
Choose correct type for updated loop boundaries after scf loop
normalization, do not force chosen type to IndexType
Commit: 0f8adc8d30d2cd4a9fcf8455b64a1d66fa971339
https://github.com/llvm/llvm-project/commit/0f8adc8d30d2cd4a9fcf8455b64a1d66fa971339
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
Log Message:
-----------
[OpenACC] Fix comments on OpenACC enum to use ///
Commit: 736cc0cbf0107f6a1678a5495e1931733ab57393
https://github.com/llvm/llvm-project/commit/736cc0cbf0107f6a1678a5495e1931733ab57393
Author: Nishant Mittal <nishantwrp at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libc/test/src/math/smoke/nanl_test.cpp
Log Message:
-----------
[libc][math] fix failing nanl_test build (#77102)
Commit: 10b03e66629aedad79a804e22d23b575077303b3
https://github.com/llvm/llvm-project/commit/10b03e66629aedad79a804e22d23b575077303b3
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/CodeGen/AArch64/fast-isel-branch-uncond-debug.ll
M llvm/test/CodeGen/AArch64/fast-isel-dbg.ll
M llvm/test/CodeGen/AArch64/fastisel-debugvalue-undef.ll
M llvm/test/CodeGen/ARM/debug-info-blocks.ll
M llvm/test/CodeGen/Generic/csw-debug-assert.ll
M llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll
M llvm/test/CodeGen/X86/DbgValueOtherTargets.test
M llvm/test/CodeGen/X86/fast-isel-dbg-value-alloca.ll
M llvm/test/CodeGen/X86/fold-sext-trunc.ll
M llvm/test/CodeGen/X86/fold-zext-trunc.ll
M llvm/test/CodeGen/X86/label-heapallocsite.ll
M llvm/test/CodeGen/X86/machine-outliner-disubprogram.ll
M llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll
M llvm/test/CodeGen/X86/sink-local-value.ll
M llvm/test/DebugInfo/AArch64/cfi-eof-prologue.ll
M llvm/test/DebugInfo/AArch64/frameindices.ll
M llvm/test/DebugInfo/ARM/split-complex.ll
M llvm/test/DebugInfo/COFF/class-options-common.ll
M llvm/test/DebugInfo/COFF/cpp-mangling.ll
M llvm/test/DebugInfo/COFF/enum-co.ll
M llvm/test/DebugInfo/COFF/function-options.ll
M llvm/test/DebugInfo/COFF/global_visibility.ll
M llvm/test/DebugInfo/COFF/globals.ll
M llvm/test/DebugInfo/COFF/lambda.ll
M llvm/test/DebugInfo/COFF/lines-bb-start.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/numeric-leaves.ll
M llvm/test/DebugInfo/COFF/parent-type-scopes.ll
M llvm/test/DebugInfo/COFF/purge-typedef-udts.ll
M llvm/test/DebugInfo/COFF/thunk.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/COFF/types-cvarargs.ll
M llvm/test/DebugInfo/COFF/types-integer-old.ll
M llvm/test/DebugInfo/COFF/types-method-ref-qualifiers.ll
M llvm/test/DebugInfo/Generic/2010-10-01-crash.ll
M llvm/test/DebugInfo/Generic/PR20038.ll
M llvm/test/DebugInfo/Generic/dead-argument-order.ll
M llvm/test/DebugInfo/Generic/discriminated-union.ll
M llvm/test/DebugInfo/Generic/disubrange_vla.ll
M llvm/test/DebugInfo/Generic/enum-types.ll
M llvm/test/DebugInfo/Generic/enum.ll
M llvm/test/DebugInfo/Generic/import-inlined-declaration.ll
M llvm/test/DebugInfo/Generic/inlined-vars.ll
M llvm/test/DebugInfo/Generic/recursive_inlining.ll
M llvm/test/DebugInfo/Generic/univariant-discriminated-union.ll
M llvm/test/DebugInfo/Mips/delay-slot.ll
M llvm/test/DebugInfo/X86/aligned_stack_var.ll
M llvm/test/DebugInfo/X86/arguments.ll
M llvm/test/DebugInfo/X86/asan_debug_info.ll
M llvm/test/DebugInfo/X86/byvalstruct.ll
M llvm/test/DebugInfo/X86/convert-linked.ll
M llvm/test/DebugInfo/X86/dbg-declare-arg.ll
M llvm/test/DebugInfo/X86/dbg-declare-inalloca.ll
M llvm/test/DebugInfo/X86/dbg-declare.ll
M llvm/test/DebugInfo/X86/dbg_value_direct.ll
M llvm/test/DebugInfo/X86/debug-info-template-parameter.ll
M llvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll
M llvm/test/DebugInfo/X86/double-declare.ll
M llvm/test/DebugInfo/X86/fi-piece.ll
M llvm/test/DebugInfo/X86/implicit_value-double.ll
M llvm/test/DebugInfo/X86/instr-ref-opt-levels.ll
M llvm/test/DebugInfo/X86/instr-ref-selectiondag.ll
M llvm/test/DebugInfo/X86/missing-abstract-variable.ll
M llvm/test/DebugInfo/X86/parameters.ll
M llvm/test/DebugInfo/X86/pieces-1.ll
M llvm/test/DebugInfo/X86/reference-argument.ll
M llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/subreg.ll
M llvm/test/DebugInfo/X86/subregisters.ll
M llvm/test/DebugInfo/X86/vla.ll
Log Message:
-----------
[RemoveDIs] Handle DPValues in FastISel (#76952)
The change is fairly mechanical:
1. Factor code from `FastISel::selectIntrinsicCall`, which converts
debug intrinsics into debug instructions, into functions (NFC).
2. Call those functions for DPValues attached to instructions too.
The test updates look the same as other RemoveDIs changes: re-run the
tests with `--try-experimental-debuginfo-iterators`, which checks the
output is identical using the new debug info format (if it has been
enabled in the cmake configuration).
Depends on #76941 (otherwise some modified tests spuriously fail).
Commit: fc18b13492880ba8597333c6050a18ec6db0f831
https://github.com/llvm/llvm-project/commit/fc18b13492880ba8597333c6050a18ec6db0f831
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/test/Dialect/Mesh/invalid.mlir
Log Message:
-----------
[mlir][mesh] In sharding attr use FlatSymbolRefAttr instead of SymbolRefAttr (#76886)
Analogous to func.call use FlatSymbolRefAttr to reference the
corresponding mesh.
Commit: 922b7b8bf465ddc292fa91bd6a860510a1eea6e2
https://github.com/llvm/llvm-project/commit/922b7b8bf465ddc292fa91bd6a860510a1eea6e2
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/lib/Headers/llvm_libc_wrappers/stdio.h
Log Message:
-----------
[Clang][OpenMP] Fix stdio.h wrapper when glibc includes again (#77017)
Since D154036 landed (2a65d0388ca0 on July 7, 2023), I've been seeing
many (40-50) libomptarget test failures with errors like the following
on some of our test systems:
```
/auto/software/gcc/x86_64/gcc-11.1.0/lib/gcc/x86_64-pc-linux-gnu/11.1.0/../../../../include/c++/11.1.0/cstdio:99:11: error: no member named 'fpos_t' in the global namespace
99 | using ::fpos_t;
| ~~^
```
This patch fixes that and doesn't break our other test sytems. I've
looked through the glibc history and at LLVM's libc stdio.h to give me
confidence that this solution should work on other systems. Of course,
there might be use cases I've overlooked, so feedback is appreciated.
Commit: de5039545ee4e9f5aa7023632d5c4baa5e782e51
https://github.com/llvm/llvm-project/commit/de5039545ee4e9f5aa7023632d5c4baa5e782e51
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Type.h
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/dependent-noexcept-uninstantiated.cpp
Log Message:
-----------
[clang]Transform uninstantiated ExceptionSpec in `TemplateInstantiator` (#77073)
Fixes: #77071
`SubstituteDeducedTypeTransform` will transform type and it will visit
uninstantiated `ExceptionSpecInfo`, which will cause odd behavior.
Commit: 63ab56e2a3a05bcb1ca367d9c40eaabd18cb42d5
https://github.com/llvm/llvm-project/commit/63ab56e2a3a05bcb1ca367d9c40eaabd18cb42d5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/test/CodeGen/RISCV/riscv-abi.cpp
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
Log Message:
-----------
[Clang] Regenerate test checks (NFC)
Commit: e2972389111e30a93a21cf8c5f4d2284cbb60268
https://github.com/llvm/llvm-project/commit/e2972389111e30a93a21cf8c5f4d2284cbb60268
Author: Nishant Mittal <nishantwrp at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libc/test/src/math/smoke/nan_test.cpp
M libc/test/src/math/smoke/nanf_test.cpp
M libc/test/src/math/smoke/nanl_test.cpp
Log Message:
-----------
[libc][math] fix nan* death tests failing in asan builds (#77110)
Commit: 5352ce32fccd37c54aff2b3a2b0e3ca5115bb8a9
https://github.com/llvm/llvm-project/commit/5352ce32fccd37c54aff2b3a2b0e3ca5115bb8a9
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libc/src/string/memory_utils/op_builtin.h
Log Message:
-----------
[libc] fix -Warray-bounds in block_offset (#77001)
GCC reports an instance of -Warray-bounds in block_offset. Reimplement
block_offset in terms of memcpy_inline which was created to avoid this
diagnostic. See the linked issue for the full trace of diagnostic.
Fixes: https://github.com/llvm/llvm-project/issues/76877
Commit: 3b337bbc811002d088d3ae6fcae869a8d5682bc1
https://github.com/llvm/llvm-project/commit/3b337bbc811002d088d3ae6fcae869a8d5682bc1
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/Object/ObjectFile.h
M llvm/lib/Object/ObjectFile.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[ELF] Attempt to set the OS when using 'makeTriple()' (#76992)
Summary:
This patch fixes up the `makeTriple()` interface to emit append the
operating system information when it is readily avaialble from the ELF.
The main motivation for this is so the GPU architectures can be easily
identified correctly when given and ELF. E.g. we want
`amdgpu-amd-amdhsa` as the output and not `amdgpu--`.
This required adding support for the CUDA OS/ABI, which is easily found
to be `0x33` when using `readelf`.
Commit: 59567e711d262813b6708f1a242433a401c03e9f
https://github.com/llvm/llvm-project/commit/59567e711d262813b6708f1a242433a401c03e9f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[ELF][Obvious] Remove unused CUDA OS/ABI struct
Summary:
This did not need a separate struct because it is not past the
"architecture specific" ones in the identifier. This was accidentally
left when it was added somewhere else and caused unused variable
warnings.
Commit: c49965b97e159b7ff92a5fca3e144b2d2574a84d
https://github.com/llvm/llvm-project/commit/c49965b97e159b7ff92a5fca3e144b2d2574a84d
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/MLRegAlloc/dev-mode-extra-features-logging.ll
Log Message:
-----------
[mlgo] Fix post PR #76919
Relaxed a bit the opcode checks to make the test less sensitive to
changes resulting in opcode numbering.
Commit: 4dd5d967975fa8d52b8c60596d892d9dd5615809
https://github.com/llvm/llvm-project/commit/4dd5d967975fa8d52b8c60596d892d9dd5615809
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
Log Message:
-----------
[RISCV] Don't call use_nodbg_operands for physical registers in RISCVOptWInstrs hasAllNBitUsers. (#77032)
The ADDIW in the new test case was incorrectly removed due to
incorrectly following the x10 register from the return value back to the
argument. This is due to use_nodbg_operands returning every instruction
that uses a physical register regardless of the data flow.
Commit: dfe9bb4dc22796073b677984f2ffa5580003ce82
https://github.com/llvm/llvm-project/commit/dfe9bb4dc22796073b677984f2ffa5580003ce82
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[ELF] Attempt to fix test on big endian architectures
Summary:
This test fails because AMDGPU has a check for little-endianness before
returning the architecture. This test attempts to force the type to be
considered little-endian for the purpose of this test.
Commit: e42edb5547618c172abe25914000bb61f5278c4c
https://github.com/llvm/llvm-project/commit/e42edb5547618c172abe25914000bb61f5278c4c
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
A lldb/test/API/commands/expression/nested/Makefile
A lldb/test/API/commands/expression/nested/TestNestedExpressions.py
A lldb/test/API/commands/expression/nested/main.cpp
Log Message:
-----------
[lldb] Fix expressions that involve nested structs/classes/unions. (#77029)
The LLDB expression parser relies on using the external AST source
support in LLDB. This allows us to find a class at the root namespace
level, but it wouldn't allow us to find nested classes all of the time.
When LLDB finds a class via this mechanism, it would be able to complete
this class when needed, but during completion, we wouldn't populate
nested types within this class which would prevent us from finding
contained types when needed as clang would expect them to be present if
a class was completed. When we parse a type for a class, struct or
union, we make a forward declaration to the class which can be
completed. Now when the class is completed, we also add any contained
types to the class' declaration context which now allows these types to
be found. If we have a struct that contains a struct, we will add the
forward declaration of the contained structure which can be c ompleted
later. Having this forward declaration makes it possible for LLDB to
find everything it needs now.
This should fix an existing issue:
https://github.com/llvm/llvm-project/issues/53904
Previously, contained types could be parsed by accident and allow
expression to complete successfully. Other times we would have to run an
expression multiple times because our old type lookup from our
expressions would cau se a type to be parsed, but not used in the
current expression, but this would have parsed a type into the
containing decl context and the expression might succeed if it is run
again.
Commit: 1259c0512292a6559fb073b16056bff2e934822b
https://github.com/llvm/llvm-project/commit/1259c0512292a6559fb073b16056bff2e934822b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/switch-shl.ll
Log Message:
-----------
[InstCombine] Canonicalize `switch(X << C)` into `switch(X)` (#77068)
This patch canonicalizes `switch(X << C)` to `switch(X)`. If the shift
may wrap, an and instruction will be created to mask out all of the
shifted bits.
Alive2: https://alive2.llvm.org/ce/z/wSsL5y
NOTE: We can relax the one-use constraint. But I don't see any benefit
in my benchmark.
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=a776740d6296520b8bde156aa3f8d9ecb32cddd9&to=6dd783b9f90ae5f258102d732953567d7e317c02&stat=instructions%3Au
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|-0.00%|+0.01%|-0.02%|-0.01%|+0.02%|-0.00%|+0.01%|
Commit: 0e8b09c43d9f9e68c95fa1e6f6fb5c8307f3927d
https://github.com/llvm/llvm-project/commit/0e8b09c43d9f9e68c95fa1e6f6fb5c8307f3927d
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'default' clause parsing. (#77002)
A simple clause that is permitted on a few different constructs,
'default' takes a required parameter of either 'none' or 'present'.
This patch implements parsing for it.
Commit: c2f5e435a561cb0ebd3334a1377ebbefe8dcf5c3
https://github.com/llvm/llvm-project/commit/c2f5e435a561cb0ebd3334a1377ebbefe8dcf5c3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[ELF] Again attempt to fix test on BE architectures
Summary:
This formats something according to the style, and again attempts to fix
this failing on the BE PPC test. Sorry for the spam, these commits are
the only way I can check it because the failure isn't local.
Commit: 070ac1dcd5cf27ce3722e60c8416217a6fdb5581
https://github.com/llvm/llvm-project/commit/070ac1dcd5cf27ce3722e60c8416217a6fdb5581
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/vec-perm-14.ll
Log Message:
-----------
[SystemZ] vec-perm-14.ll - partially regenerate checks so we can see all the vperm codegen
We can't use the script as we need to keep the shuffle mask constant pool checks, but do more than just check that a second vperm isn't generated
Commit: 0cb98167ecee4b8e91fb07cb186daae616045454
https://github.com/llvm/llvm-project/commit/0cb98167ecee4b8e91fb07cb186daae616045454
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[ELF][Obvious] Last time fixing this test hopefully
Commit: 848d7af956442fbf08310cc2d094035802fbe6ea
https://github.com/llvm/llvm-project/commit/848d7af956442fbf08310cc2d094035802fbe6ea
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/select.ll
Log Message:
-----------
[CVP] Improve the value solving of select at use (#76700)
This patch improves the value solving of select at use if the condition
is an icmp and we know the result of comparison from
`LVI->getPredicateAt`.
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=7e405eb722e40c79b7726201d0f76b5dab34ba0f&to=3c315b1ddcb0ad82554b33f08b9356679fae4bb7&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|-0.01%|+0.01%|-0.00%|-0.00%|-0.08%|+0.02%|-0.01%|
Commit: 02a33b72fd21cdbf476d6bda72faa462e073e510
https://github.com/llvm/llvm-project/commit/02a33b72fd21cdbf476d6bda72faa462e073e510
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaInit.cpp
A clang/test/SemaCXX/crash-GH76228.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
Log Message:
-----------
"Reapply "[Sema] Fix crash on invalid code with parenthesized aggrega… (#76833)
…te initialization" (#76272)""
With updates the libc++ tests.
This reverts commit 2205d23 and relands
86dc6e1 and
7ab16fb.
Original commit was reverted because of failing libc++ tests, see #76232
for the discussion.
The errors in the tests are spurious in the first place (coming from
initialization of invalid classes), so update the tests to match new
behavior that does not show those errors.
The original patch was written by @ilya-biryukov
To fix the CI two libc++ tests are temporary disabled for clang-18.
Commit: 31626dadcef86e48bcc44e86e4411578094c8739
https://github.com/llvm/llvm-project/commit/31626dadcef86e48bcc44e86e4411578094c8739
Author: Nathan Sidwell <nathan at acm.org>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/test/Assembler/autoupgrade-thread-pointer.ll
Log Message:
-----------
[llvm][NFC] Refactor AutoUpgrader arm/aarch64 (#74145)
Break out and refactor AArch64 & ARM intrinsic updating. There's a fair amount of comonality, but let's avoid continually checking the same prefixes.
Commit: 8d6784db04ee5d925a2d036a68f00a7c124c6cf9
https://github.com/llvm/llvm-project/commit/8d6784db04ee5d925a2d036a68f00a7c124c6cf9
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc][math] Add missing nan(f|l) deps
After 0504e932880e0c4c333baeba9b8d674c5b9ae316
Commit: 93d2e49b6aa6904620a7e9b559c04ec8756dc596
https://github.com/llvm/llvm-project/commit/93d2e49b6aa6904620a7e9b559c04ec8756dc596
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
A llvm/test/tools/llvm-dwarfdump/verify-no-file.yaml
Log Message:
-----------
Fix file index verifier when there is no file name in the prologue. (#77004)
If there is no file name in the prologue of a line table, the verifier
will try to verify the file index, which will be set to 1 by default.
This will cause the DWARF verifier to throw an error even if there is no
error.
rdar://114476503
rdar://114343624
Commit: f9aba820eb6478a617145eb690ba8b06490d7ac5
https://github.com/llvm/llvm-project/commit/f9aba820eb6478a617145eb690ba8b06490d7ac5
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn] port a0e6b7c04292
Commit: f22dc88759a53d4224c17d3833a359ef5674b4ea
https://github.com/llvm/llvm-project/commit/f22dc88759a53d4224c17d3833a359ef5674b4ea
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/test/tools/llvm-dwarfdump/verify-no-file.yaml
Log Message:
-----------
[NFC] Address review feedback from PR #77004 (#77134)
Accidentally didn't commit the review feedback before merging the PR
Commit: 5121e2cffd23751360e71a8ac69b7462dae23aa8
https://github.com/llvm/llvm-project/commit/5121e2cffd23751360e71a8ac69b7462dae23aa8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
M clang/tools/clang-linker-wrapper/OffloadWrapper.cpp
Log Message:
-----------
[OpenMP] Change `__tgt_device_image` to point to the image (#77003)
Summary:
We use the OffloadBinary to contain bundled offloading objects used to
support many images / targets at the same time. The `__tgt_device_info`
struct used to contain a pointer to this underlying binary format, which
contains information about the triple and architecture. We used to parse
this in the runtime to do image verification.
Recent changes removed the need for this to be used internally, as we
just parse it out of the ELF directly. This patch sets the pointers up
so they point to the ELF without requiring any further parsing.
Commit: 7c3bcc307a8fa9153a171f6abb4e8fdc91bd6030
https://github.com/llvm/llvm-project/commit/7c3bcc307a8fa9153a171f6abb4e8fdc91bd6030
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/phi.ll
A llvm/test/Transforms/InstCombine/switch-zext-sext.ll
A llvm/test/Transforms/PhaseOrdering/switch-sext.ll
Log Message:
-----------
[InstCombine] Fold `switch(zext/sext(X))` into `switch(X)` (#76988)
This patch folds `switch(zext/sext(X))` into `switch(X)`.
The original motivation of this patch is to optimize a pattern found in
cvc5. For example:
```
%bf.load.i = load i16, ptr %d_kind.i, align 8
%bf.clear.i = and i16 %bf.load.i, 1023
%bf.cast.i = zext nneg i16 %bf.clear.i to i32
switch i32 %bf.cast.i, label %if.else [
i32 335, label %if.then
i32 303, label %if.then
]
if.then: ; preds = %entry, %entry
%d_children.i.i = getelementptr inbounds %"class.cvc5::internal::expr::NodeValue", ptr %0, i64 0, i32 3
%cmp.i.i.i.i.i = icmp eq i16 %bf.clear.i, 1023
%cond.i.i.i.i.i = select i1 %cmp.i.i.i.i.i, i32 -1, i32 %bf.cast.i
```
`%cmp.i.i.i.i.i` always evaluates to false because `%bf.clear.i` can
only be 335 or 303.
Folding `switch i32 %bf.cast.i` to `switch i16 %bf.clear.i` will help
`CVP` to handle this case.
See also
https://github.com/llvm/llvm-project/pull/76928#issuecomment-1877055722.
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=7954c57124b495fbdc73674d71f2e366e4afe522&to=502b13ed34e561d995ae1f724cf06d20008bd86f&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|+0.03%|+0.06%|+0.07%|+0.00%|-0.02%|-0.03%|+0.02%|
Commit: fc1c478709e380164733560e4a2c8f9e8d5e2c1c
https://github.com/llvm/llvm-project/commit/fc1c478709e380164733560e4a2c8f9e8d5e2c1c
Author: Jordan R AW <103465530+ajordanr-google at users.noreply.github.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind] Replace process_vm_readv with SYS_rt_sigprocmask (#74791)
process_vm_readv is generally considered dangerous from a syscall
perspective, and is frequently blanket banned in seccomp filters such as
those in Chromium and ChromiumOS. We can get the same behaviour during
the invalid PC address case with the raw SYS_rt_sigprocmask syscall.
Testing to ensure that process_vm_readv does not appear, I ran the
output of check-unwind on an ARM64 device under strace. Previously,
bad_unwind_info in particular would use process_vm_readv, but with this
commit, it now no longer uses it:
```
strace test/Output/bad_unwind_info.pass.cpp.dir/t.tmp.exe \
|& grep process_vm_readv
```
The libunwind unittests were also tested on ARM64 ChromeOS (Gentoo
Linux) devices.
Commit: 365fbbfbcfefb8766f7716109b9c3767b58e6058
https://github.com/llvm/llvm-project/commit/365fbbfbcfefb8766f7716109b9c3767b58e6058
Author: David Green <david.green at arm.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/selectopt.ll
Log Message:
-----------
[AArch64] Add some extra tests for SelectOpt. NFC
Commit: dcdb4a36ae3549fb1852b2c0089247a8d477eaf3
https://github.com/llvm/llvm-project/commit/dcdb4a36ae3549fb1852b2c0089247a8d477eaf3
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCObjectRules.cmake
Log Message:
-----------
[libc][cmake] append per obj compile options instead of prepending (#77126)
This allows individual object files to override the common compile
commands in
their local CMakeLists' add_object_library call.
For example, the common compile commands contain -Wall and -Wextra.
Before
this patch, the per object COMPILE_OPTIONS were prepended to these, so
that
builds of individual object files could not individually disable
specific
diagnostics from those groups explicitly.
After this patch, the per-object file compile objects are appended to
the list
of compiler flags, enabling this use case.
ARGN is a bit of cmake magic; let's be explicit in the APPEND that we're
appending the compile options.
Link: #77007
Commit: 6f4cc1310b12bc59210e4596a895db4cb9ad6075
https://github.com/llvm/llvm-project/commit/6f4cc1310b12bc59210e4596a895db4cb9ad6075
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/PerfHelper.cpp
M llvm/tools/llvm-exegesis/lib/PerfHelper.h
Log Message:
-----------
[llvm-exegesis] Remove unused Counter::read method (#76651)
This method was simply a wrapper around readOrError. All users within
the llvm-exegesis code base should have been processing an actual error
rather than using the wrapper. This patch removes the wrapper and
rewrites the users (just 1) to use the readOrError method.
Commit: d9c8edf08afce3d1e563e4521ae847a6809bb993
https://github.com/llvm/llvm-project/commit/d9c8edf08afce3d1e563e4521ae847a6809bb993
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/unittests/tools/llvm-exegesis/X86/BenchmarkResultTest.cpp
Log Message:
-----------
[llvm-exegesis] Add matcher for register initial values (#76666)
Currently, the unit tests for the BenchmarkResult struct do not check if
the register initial values can be parsed back in. This patch adds a
matcher and tests that the register initial values can be parsed
correctly. This exercises code already contained within the benchmark to
yaml infrastructure.
Commit: 853b13342a131e06d61293ec6e840642054c6c85
https://github.com/llvm/llvm-project/commit/853b13342a131e06d61293ec6e840642054c6c85
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/test/Lexer/case-insensitive-include-absolute.c
Log Message:
-----------
[clang] Fix test for case-insensitive absolute includes (#76985)
When CMake on Windows is told to generate the build into a directory
whose real path has a different drive letter (e.g. due to a symlink),
the "clang/test/Lexer/case-insensitive-include-absolute.c" test fails.
That happens because because `trySimplifyPath()` in `PPDirectives.cpp`
finds out there's more than a case difference between the `#include`
path (containing `%/t`) and the real path, which prevents the diagnostic
to fire.
I thought this is only an issue on Windows due to the fact that LIT does
not drag the path to the build directory through `os.path.realpath()`
like it does on other systems (see `abs_path_preserve_drive()` in
"llvm/utils/lit/lit/util.py"). However, even after only using
`os.path.abspath()` on a Unix system, build generated into a symlinked
directory tests correctly. I assume there must be something else at
play, but I don't have the time to dig deeper.
The fix is is fairly straightforward: use the real path in the
`#include` (with `%{/t:real}`), which removes the non-case difference
and unblocks the diagnostic.
Commit: f1d75d08adb9841dd9cebad63b76d4823ec2bdac
https://github.com/llvm/llvm-project/commit/f1d75d08adb9841dd9cebad63b76d4823ec2bdac
Author: Jonathon Penix <107437988+jonathonpenix at users.noreply.github.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/test/Driver/nostdincxx.cpp
Log Message:
-----------
[clang][Driver] Don't warn when -nostdinc and -nostdinc++ are both specified (#77130)
When -nostdinc and -nostdinc++ are both specified and the Baremetal
toolchain is used, an unused command line argument warning for
-nostdinc++ is produced. This doesn't seem particularly meaningful as
-nostdinc++ would have been claimed/used had the check in
AddClangCXXStdlibIncludeArgs not short-circuited. So, just claim all
arguments in this check.
I believe this is consistent with what was done for the GNU toolchain
(see 6fe7de90b9e4e466a5c2baadafd5f72d3203651d), so hopefully this is
appropriate here as well.
Commit: d7b4debf98fd740f821bda717de7b807e26ae95a
https://github.com/llvm/llvm-project/commit/d7b4debf98fd740f821bda717de7b807e26ae95a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/cmake/config-ix.cmake
Log Message:
-----------
[cmake,Apple] Check ld-classic when looking for ld64. (#77136)
In newer SDKs, ld64 is called ld-classic. Look for it first, as ld in
those SDKs is still missing some functionality some tests depend on.
This enables running the tests from check-llvm-tools-lto with newer SDKs
on ARM64 macOS.
Commit: 8e92d9ea8dfcc49223e4ac62c998aea4d2d4fc84
https://github.com/llvm/llvm-project/commit/8e92d9ea8dfcc49223e4ac62c998aea4d2d4fc84
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
A llvm/test/tools/llvm-dwarfdump/AArch64/verify-no-file.yaml
R llvm/test/tools/llvm-dwarfdump/verify-no-file.yaml
Log Message:
-----------
Move verify-no-file.yaml to AArch64 folder (#77149)
This test fails on power pc and solaris, moving it to AArch64 folder
because the yaml is generated for an AArch64 MachO object file.
Commit: 5b54dd4f5eccc66c6352f9277d0a6edbd2e80435
https://github.com/llvm/llvm-project/commit/5b54dd4f5eccc66c6352f9277d0a6edbd2e80435
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_report.cpp
Log Message:
-----------
[tsan] Generalize FrameIsInternal (#77143)
Prepare to move this into sanitizer_common.
Commit: 9cf4f10609435bccd5fb32b979557a9e339563b6
https://github.com/llvm/llvm-project/commit/9cf4f10609435bccd5fb32b979557a9e339563b6
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_report.cpp
Log Message:
-----------
[NFC][tsan] `ptr != 0` to implicit check (#77144)
Commit: 77724d5f46efea1306e036aa0eca8e2ecb64916c
https://github.com/llvm/llvm-project/commit/77724d5f46efea1306e036aa0eca8e2ecb64916c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
A llvm/test/tools/lto/discard-value-names.ll
Log Message:
-----------
[LTO] Add test showing lto-discard-value-names option being ignored.
At the moment, lto-discard-value-names isn't handled properly by libLTO.
Commit: f74ce000752d565dbd9d6fcc1e2ed7f49ff7e398
https://github.com/llvm/llvm-project/commit/f74ce000752d565dbd9d6fcc1e2ed7f49ff7e398
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_report.cpp
Log Message:
-----------
[tsan] Fallback to top frame (#77145)
Probably it's not important, as it should not happen often,
but if all frames are internal we should pick top, not
the bottom frame.
Commit: a89141f733cef817c586bb6da0ea69a5a323874e
https://github.com/llvm/llvm-project/commit/a89141f733cef817c586bb6da0ea69a5a323874e
Author: Danny Mösch <danny.moesch at icloud.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
A clang-tools-extra/clang-tidy/readability/AvoidReturnWithVoidValueCheck.cpp
A clang-tools-extra/clang-tidy/readability/AvoidReturnWithVoidValueCheck.h
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/avoid-return-with-void-value.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/avoid-return-with-void-value.cpp
Log Message:
-----------
[clang-tidy] Add check `readability-avoid-return-with-void-value` (#76249)
Commit: a9c5bddc8f18926bac6dc224144a32512207bd38
https://github.com/llvm/llvm-project/commit/a9c5bddc8f18926bac6dc224144a32512207bd38
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Log Message:
-----------
[gn build] Port a89141f733ce
Commit: 08c5f1fede969e687e77d0508008682e5f188f49
https://github.com/llvm/llvm-project/commit/08c5f1fede969e687e77d0508008682e5f188f49
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M bolt/lib/Rewrite/JITLinkLinker.cpp
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
Log Message:
-----------
[ORC] Add absoluteSymbolsLinkGraph to expose absolute symbols to platform (#77008)
Adds a function to create a LinkGraph of absolute symbols, and a
callback in dynamic library search generators to enable using it to
expose its symbols to the platform/orc runtime. This allows e.g. using
__orc_rt_run_program to run a precompiled function that was found via
dlsym. Ideally we would use this in llvm-jitlink's own search generator,
but it will require more work to align with the Process/Platform
JITDylib split, so not handled here.
As part of this change we need to handle LinkGraphs that only have
absolute symbols.
Commit: def42537ee65fd5d309b7ab70a9ea4d32eb6aadd
https://github.com/llvm/llvm-project/commit/def42537ee65fd5d309b7ab70a9ea4d32eb6aadd
Author: Daniel Hoekwater <hoekwater at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/test/CodeGen/Generic/machine-function-splitter.ll
Log Message:
-----------
[NFC][CodeGen][AArch64] Add tests for unconditional branch duplication
c9f3288 introduced unconditional branch deduplication for basic block
sections and machine function splitting, but it didn't add tests for
AArch64 since prior behavior crashed the test.
This change adds tests for AArch64 and has no functional change.
Commit: 651a42ff65c3afc2a2ec6c7fc19009387757d686
https://github.com/llvm/llvm-project/commit/651a42ff65c3afc2a2ec6c7fc19009387757d686
Author: Lang Hames <lhames at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
Log Message:
-----------
[ORC] Remove unused flag (PendingRemoval) from JITDylib symbol table.
Commit: 5e54319b7be3e8aa035836098e0a9defc0a41c3a
https://github.com/llvm/llvm-project/commit/5e54319b7be3e8aa035836098e0a9defc0a41c3a
Author: Dimple Prajapati <dimpalben.r.prajapati at intel.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/SerializeOps.cpp
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Target/SPIRV/global-variable.mlir
Log Message:
-----------
[mlir][spirv] Support spec constants as GlobalVar initializer (#75660)
Changes include:
- spirv serialization and deserialization needs handling in cases when
GlobalVariableOp initializer is defined using spirv SpecConstant or
SpecConstantComposite op, currently even though it allows SpecConst, it
only looked up in for GlobalVariable Map to find initializer symbol
reference, change is fixing this and extending the support to
SpecConstantComposite as an initializer.
- Adds tests to make sure GlobalVariable can be initialized using
specialized constants.
---------
Co-authored-by: Lei Zhang <antiagainst at gmail.com>
Commit: 4f215fdd62d3f014750339eab9a46946b6fb1c4a
https://github.com/llvm/llvm-project/commit/4f215fdd62d3f014750339eab9a46946b6fb1c4a
Author: Konstantin Varlamov <varconsteq at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libcxx/include/__algorithm/pop_heap.h
M libcxx/include/__algorithm/sift_down.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__charconv/to_chars_base_10.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__charconv/traits.h
M libcxx/include/__chrono/parser_std_format_spec.h
M libcxx/include/__config
M libcxx/include/__filesystem/directory_iterator.h
M libcxx/include/__filesystem/path_iterator.h
M libcxx/include/__format/buffer.h
M libcxx/include/__format/format_arg.h
M libcxx/include/__format/formatter_bool.h
M libcxx/include/__format/formatter_floating_point.h
M libcxx/include/__format/formatter_integral.h
M libcxx/include/__format/formatter_output.h
M libcxx/include/__format/formatter_string.h
M libcxx/include/__format/parser_std_format_spec.h
M libcxx/include/__format/range_formatter.h
M libcxx/include/__format/unicode.h
M libcxx/include/__format/write_escaped.h
M libcxx/include/__hash_table
M libcxx/include/__iterator/advance.h
M libcxx/include/__iterator/next.h
M libcxx/include/__iterator/prev.h
M libcxx/include/__random/negative_binomial_distribution.h
M libcxx/include/__ranges/chunk_by_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__thread/thread.h
M libcxx/include/__utility/exception_guard.h
M libcxx/include/__utility/unreachable.h
M libcxx/include/print
M libcxx/include/regex
M libcxx/include/set
M libcxx/src/filesystem/error.h
M libcxx/src/filesystem/format_string.h
M libcxx/src/filesystem/posix_compat.h
M libcxx/src/include/to_chars_floating_point.h
M libcxx/src/memory_resource.cpp
M libcxx/src/strstream.cpp
M libcxx/src/system_error.cpp
M libcxx/test/libcxx/utilities/assert.exception_guard.no_exceptions.pass.cpp
M libcxx/test/std/utilities/utility/utility.unreachable/assert.unreachable.pass.cpp
Log Message:
-----------
[libc++][hardening] Categorize more assertions. (#75918)
Also introduce `_LIBCPP_ASSERT_PEDANTIC` for assertions violating which
results in a no-op or other benign behavior, but which may nevertheless
indicate a bug in the invoking code.
Commit: 4df566290751403f470fea3b27aa148ab1ddf144
https://github.com/llvm/llvm-project/commit/4df566290751403f470fea3b27aa148ab1ddf144
Author: hev <wangrui at loongson.cn>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M clang/include/clang/AST/Attr.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGen/LoongArch/attributes.cpp
A clang/test/Sema/attr-model.cpp
Log Message:
-----------
[clang] Add per-global code model attribute (#72078)
This patch adds a per-global code model attribute, which can override
the target's code model to access global variables.
Currently, the code model attribute is only supported on LoongArch. This
patch also maps GCC's code model names to LLVM's, which allows for
better compatibility between the two compilers.
Suggested-by: Arthur Eubanks <aeubanks at google.com>
Link:
https://discourse.llvm.org/t/how-to-best-implement-code-model-overriding-for-certain-values/71816
Link:
https://discourse.llvm.org/t/rfc-add-per-global-code-model-attribute/74944
---------
Signed-off-by: WANG Rui <wangrui at loongson.cn>
Commit: 2652243f19314cf0a7583402d37d28dbae9ec1e6
https://github.com/llvm/llvm-project/commit/2652243f19314cf0a7583402d37d28dbae9ec1e6
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/lib/tsan/rtl/tsan_report.cpp
Log Message:
-----------
[NFC][tsan] Move SkipInternalFrames into sanitizer_common (#77146)
Commit: 09e0d71ad34169e075e146e13a93b2d79f992e1d
https://github.com/llvm/llvm-project/commit/09e0d71ad34169e075e146e13a93b2d79f992e1d
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M compiler-rt/lib/ubsan/ubsan_diag.cpp
M compiler-rt/test/ubsan/TestCases/Misc/print_summary.c
Log Message:
-----------
[ubsan] Drop terminal "in " from reports without functions (#77163)
Commit: 40c07b559aa6ab4bac074c943967d3207bc07ae0
https://github.com/llvm/llvm-project/commit/40c07b559aa6ab4bac074c943967d3207bc07ae0
Author: Haowei Wu <haowei at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/fstream
M libcxx/include/version
M libcxx/src/CMakeLists.txt
R libcxx/src/fstream.cpp
R libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/native_handle.assert.pass.cpp
R libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/filebuf/types.pass.cpp
R libcxx/test/std/input.output/file.streams/fstreams/fstream.members/native_handle.assert.pass.cpp
R libcxx/test/std/input.output/file.streams/fstreams/fstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream/types.pass.cpp
R libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/native_handle.assert.pass.cpp
R libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream/types.pass.cpp
R libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
R libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/native_handle.assert.pass.cpp
R libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream/types.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/types.h
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
Revert "[libc++][streams] P1759R6: Native handles and file streams (#76632)"
This reverts commit 255f95a40377677dd762df5a1aa65bcbb4f75c79, which
contains a breaking libcxx test on Windows when using C++26
Commit: 1c43e64d7072bba3e6199999184f8323045684ac
https://github.com/llvm/llvm-project/commit/1c43e64d7072bba3e6199999184f8323045684ac
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
A llvm/include/llvm/CodeGen/ShadowStackGCLowering.h
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[CodeGen] Port `ShadowStackGCLowering` to new pass manager (#75324)
IIUC the new pass system was designed with parallelism. This pass needs
to add some global variables into the current module, this is not
allowed by
[WritingAnLLVMPass](https://llvm.org/docs/WritingAnLLVMPass.html#the-functionpass-class),
so convert it to module pass, see FIXME in `GetFrameMap`.
Therefore, this will trigger assertion in `CodeGenPassBuilder`:
https://github.com/llvm/llvm-project/blob/effd47ed45e3badd756103346a7c3b9e1e939e5e/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h#L200-L207
Will fix it in future.
Commit: ba1f4c6c50205bb7c6937c236084987f8669191c
https://github.com/llvm/llvm-project/commit/ba1f4c6c50205bb7c6937c236084987f8669191c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn build] Port 40c07b559aa6
Commit: fc6b5666db92e0c1701177aee885db66296e5a86
https://github.com/llvm/llvm-project/commit/fc6b5666db92e0c1701177aee885db66296e5a86
Author: Bill Wendling <5993918+bwendling at users.noreply.github.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
Log Message:
-----------
[NFC][ObjectSizeOffset] Use classes instead of std::pair (#76882)
The use of std::pair makes the values it holds opaque. Using classes
improves this while keeping the POD aspect of a std::pair. As a nice
addition, the "known" functions held inappropriately in the Visitor
classes can now properly reside in the value classes. :-)
Commit: 9a95b2481e5ee0708aa8604e0c04b5bd1041de3a
https://github.com/llvm/llvm-project/commit/9a95b2481e5ee0708aa8604e0c04b5bd1041de3a
Author: Valentin Clement <clementval at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M flang/test/Lower/OpenACC/acc-reduction.f90
Log Message:
-----------
[flang][openacc][NFC] Remove obsolete FIR testing in acc-reduction.f90 test
Most tests were updated in #73054. This is the last one for OpenACC lowering
Commit: 23aabdd66f78dc28919c4a85d4bdcbf7b0dd89f7
https://github.com/llvm/llvm-project/commit/23aabdd66f78dc28919c4a85d4bdcbf7b0dd89f7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M compiler-rt/lib/asan/asan_suppressions.cpp
M compiler-rt/lib/hwasan/hwasan_report.cpp
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stacktrace_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/lib/ubsan/ubsan_diag.h
Log Message:
-----------
[NFC][sanitizer] Move SymbolizedStackHolder into sanitizer_common (#77152)
And replace most `ClearAll()` uses.
Commit: c7e4065aad78f77d61be1d1ac674546cc62208d1
https://github.com/llvm/llvm-project/commit/c7e4065aad78f77d61be1d1ac674546cc62208d1
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/lib/tsan/rtl/tsan_report.cpp
Log Message:
-----------
[NFC][sanitizer] Add consts to SkipInternalFrames (#77162)
Commit: dbea538c4391caa8a369c0ccf720367f042185b1
https://github.com/llvm/llvm-project/commit/dbea538c4391caa8a369c0ccf720367f042185b1
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/DWARFLinker/DWARFStreamer.cpp
M llvm/lib/DWARFLinkerParallel/DebugLineSectionEmitter.h
M llvm/lib/DWARFLinkerParallel/OutputSections.cpp
M llvm/lib/DWARFLinkerParallel/OutputSections.h
M llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test
M llvm/test/tools/dsymutil/ARM/dwarf5-macho.test
Log Message:
-----------
[DWARFLinker] Support MD5 checksums in the line table (#77151)
Add support to the DWARF linkers for emitting DWARF 5 MD5 checksum in
the line table.
Commit: 2873060f3cfbd92dcff8d1037a08e9fb60f7882e
https://github.com/llvm/llvm-project/commit/2873060f3cfbd92dcff8d1037a08e9fb60f7882e
Author: Micah Weston <micahsweston at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/include/llvm/Object/ELFTypes.h
M llvm/lib/Object/ELF.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[SHT_LLVM_BB_ADDR_MAP] Fixes two bugs in decoding of PGOAnalyses in BBAddrMap. (#77139)
We had specified that `readBBAddrMap` will always keep PGOAnalyses and
BBAddrMaps the same length on success.
https://github.com/llvm/llvm-project/blob/365fbbfbcfefb8766f7716109b9c3767b58e6058/llvm/include/llvm/Object/ELFObjectFile.h#L116-L117
It turns out that this is not currently the case when no analyses exist
in a function. No test had caught it.
We also should not append PGOBBEntries when there is no BBFreq or
BrProb.
This patch adds:
* tests that PGOAnalyses and BBAddrMaps are same length even when no
analyses are enabled
* fixes decode so that PGOAnalyses and BBAddrMaps are same length
* updates test to not emit unnecessary PGOBBEntries
* fixes decode to not emit PGOBBEntries when unnecessary
Commit: 1637c0792550f70e4b2ef42b3d08aa91dd27f4a9
https://github.com/llvm/llvm-project/commit/1637c0792550f70e4b2ef42b3d08aa91dd27f4a9
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/amdgpu/utils/UtilitiesRTL.h
Log Message:
-----------
[openmp][amdgpu] Add DynamicLdsSize to AMDGPUImplicitArgsTy (#65325)
#65273 "hidden_dynamic_lds_size" argument will be added in the reserved
section at offset 120 of the implicit argument layout
Add DynamicLdsSize to AMDGPUImplicitArgsTy struct at offset 120 and fill
the dynamic LDS size before kernel launch.
Commit: ba3ef331b4568b5996172076572581e68c2d3c0c
https://github.com/llvm/llvm-project/commit/ba3ef331b4568b5996172076572581e68c2d3c0c
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/bswap-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/bswap-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv64.mir
Log Message:
-----------
[RISCV][GlobalISel] Zbkb support for G_BSWAP (#77050)
This instructions is legal in the presence of Zbkb extension.
Commit: a5902a4d2425ac083f1530719e35b5c562cb1e60
https://github.com/llvm/llvm-project/commit/a5902a4d2425ac083f1530719e35b5c562cb1e60
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
A llvm/lib/Target/X86/X86CompressEVEX.cpp
R llvm/lib/Target/X86/X86EvexToVex.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/O0-pipeline.ll
M llvm/test/CodeGen/X86/evex-to-vex-compress.mir
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/utils/TableGen/CMakeLists.txt
A llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
R llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp
Log Message:
-----------
[X86][NFC] Rename variables/passes for EVEX compression optimization
RFC: https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031
APX introduces EGPR, NDD and NF instructions. In addition to compressing
EVEX encoded AVX512 instructions into VEX encoding, we also have several
more possible optimizations.
a. Promoted instruction (EVEX space) -> pre-promotion instruction (legacy space)
b. NDD (EVEX space) -> non-NDD (legacy space)
c. NF_ND (EVEX space) -> NF (EVEX space)
The first two types of compression can usually reduce code size, while
the third type of compression can help hardware decode although the
instruction length remains unchanged.
So we do the renaming for the upcoming APX optimizations.
BTW, I clang-format the code in X86CompressEVEX.cpp,
X86CompressEVEXTablesEmitter.cpp.
This patch also extracts the NFC in #77065 into a separate commit.
Commit: 241e4c7466b877265e1645ca4709fe666c95c6c4
https://github.com/llvm/llvm-project/commit/241e4c7466b877265e1645ca4709fe666c95c6c4
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixup for #77008 (`orc::SymbolMap`)
Commit: 16094cb629159ee0896e2ca1facc15118b229665
https://github.com/llvm/llvm-project/commit/16094cb629159ee0896e2ca1facc15118b229665
Author: hev <wangrui at loongson.cn>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
A llvm/test/CodeGen/LoongArch/global-variable-code-model.ll
Log Message:
-----------
[llvm][LoongArch] Support per-global code model attribute for LoongArch (#72079)
This patch gets the code model from global variable attribute if it has,
otherwise the target's will be used.
---------
Signed-off-by: WANG Rui <wangrui at loongson.cn>
Commit: 602c8fa2d8da6562e4f36df3bd63c26a4c7461e7
https://github.com/llvm/llvm-project/commit/602c8fa2d8da6562e4f36df3bd63c26a4c7461e7
Author: Craig Hesling <craig at hesling.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M .github/workflows/llvm-project-tests.yml
Log Message:
-----------
[GitHub] Fix slow sccache install on macOS by upgrading macOS version (#77165)
The "Setup ccache" step on macOS-11 builds takes between 15 to 20 mins,
whereas this step takes a less than 10 seconds on other runners. The
bulk of this time is spent at the "Install sccache" step, where brew
emits warnings like "Warning: You are using macOS 11." and "We (and
Apple) do not provide support for this old version...".
Bumping the version of macOS greatly decreases this cache setup time to
about 20 seconds. Furthermore, it seems like it is speeding up general
build times, too.
It appears that
https://github.com/actions/virtual-environments/issues/5900 has been
resolved or obsoleted, so I do not believe
we need to lock macOS to 11 anymore.
Commit: cf02e6e71064ba2ce36c354e3bd6b2d57de29d85
https://github.com/llvm/llvm-project/commit/cf02e6e71064ba2ce36c354e3bd6b2d57de29d85
Author: Craig Hesling <craig at hesling.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
M .github/workflows/llvm-project-tests.yml
Log Message:
-----------
[GitHub] Remove redundant cache key prefix (#76914)
Remove the redundant sccache cache key prefix.
This prefix is already added by the ccache action, which results in
cache keys like "sccache-sccache-ubuntu-...".
See the following source lines as proof:
https://github.com/hendrikmuhs/ccache-action/blob/2a51777f6f64b7b7bea213601acba8f5f4fdbe03/src/restore.ts#L22-L23
Commit: 376baeb2d535826eb2d8158c4147e37cda493f35
https://github.com/llvm/llvm-project/commit/376baeb2d535826eb2d8158c4147e37cda493f35
Author: Craig Hesling <craig at hesling.com>
Date: 2024-01-05 (Fri, 05 Jan 2024)
Changed paths:
A .github/workflows/libclang-python-tests.yml
Log Message:
-----------
[GitHub] Add basic CI for libclang Python binding unit tests (#76784)
This is important to aid development of Python type annotations in the
libclang binding.
See https://github.com/llvm/llvm-project/issues/76664 for more details.
* Run on all pull requests and direct pushes.
* This makes use of the existing llvm-project-tests.yml recipe, which
will preload ccache from previous runs.
* Building libclang currently takes about 9mins when ccache is warm and
about an 1hr 20mins if it is cold using the standard GitHub ubuntu
runner.
* In the future, this could be broken into the following discrete steps
for clarity:
1. Build libclang dependency.
ninja -C build libclang
2. Run Python unit tests.
ninja -C build check-clang-python
* Followup changes will bring testing on older python versions and
static type checking.
Issue https://github.com/llvm/llvm-project/issues/76601.
Commit: 80dbf601d1815ff90b5aee18f426da964920dbe7
https://github.com/llvm/llvm-project/commit/80dbf601d1815ff90b5aee18f426da964920dbe7
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFormats.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
A llvm/utils/TableGen/X86ManualCompressEVEXTables.def
Log Message:
-----------
[X86][NFC] Remove EVEX2VEXOverride/NotEVEX2VEXConvertible
Remove these two classes and put all the entries in X86 EVEX compression tables
that need special handling in .def file.
PR #77065 tries to add entries that need special handling for APX in
.def file. Compared to setting fields in td files, that method looks
cleaner. This patch is to unify the addition of manual entries.
Commit: 04a7ec610ee1ad869e402c327984cb649be86f3c
https://github.com/llvm/llvm-project/commit/04a7ec610ee1ad869e402c327984cb649be86f3c
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFormats.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
M llvm/utils/TableGen/X86FoldTablesEmitter.cpp
M llvm/utils/TableGen/X86ManualCompressEVEXTables.def
Log Message:
-----------
[X86][NFC] Remove VEX_W1X after 80dbf60
Commit: b2246cf73e10c38aefffd923e4b53a1975f45909
https://github.com/llvm/llvm-project/commit/b2246cf73e10c38aefffd923e4b53a1975f45909
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Bazel port for a5902a4d2425ac083f1530719e35b5c562cb1e60
Commit: ab073cbccb6e79d8b65a286e8948bc1f07c7c09b
https://github.com/llvm/llvm-project/commit/ab073cbccb6e79d8b65a286e8948bc1f07c7c09b
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/test/tools/llvm-dwarfdump/AArch64/verify-no-file.yaml
Log Message:
-----------
Add requires darwin to verify-no-file.yaml (#77188)
Commit: 5b33cff39753c790ecc6847435664592abe40415
https://github.com/llvm/llvm-project/commit/5b33cff39753c790ecc6847435664592abe40415
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/test/Conversion/SCFToGPU/no_blocks_no_threads.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/outlining.mlir
Log Message:
-----------
[mlir][gpu] Add Support for Cluster of Thread Blocks in `gpu.launch` (#76924)
Commit: 1687555572ee4fb435da400dde02e7a1e60b742c
https://github.com/llvm/llvm-project/commit/1687555572ee4fb435da400dde02e7a1e60b742c
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
Log Message:
-----------
[GlobalIsel] Combine select of binops (#76763)
Commit: 0abf3a93a3088140c0585672c8b852e5db93a302
https://github.com/llvm/llvm-project/commit/0abf3a93a3088140c0585672c8b852e5db93a302
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
Log Message:
-----------
[X86][NFC] Use single table for EVEX compression
This patch is to address my review comments in #77065 to simplify the
implemention of EVEX2Legacy compression.
Commit: bd0dc357af453f03770c5d43c66ee5a3584abdca
https://github.com/llvm/llvm-project/commit/bd0dc357af453f03770c5d43c66ee5a3584abdca
Author: Abhinav271828 <71174780+Abhinav271828 at users.noreply.github.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
A mlir/include/mlir/Analysis/Presburger/GeneratingFunction.h
R mlir/lib/Analysis/Presburger/GeneratingFunction.h
M mlir/unittests/Analysis/Presburger/CMakeLists.txt
A mlir/unittests/Analysis/Presburger/GeneratingFunctionTest.cpp
M mlir/unittests/Analysis/Presburger/Utils.h
Log Message:
-----------
[MLIR][Presburger] Shift GeneratingFunction.h to includes (#77114)
We shift the GeneratingFunction.h header file to the include/ directory
and wrap it in a `detail` namespace.
Commit: d08482924efe8b2c44913583af7b8f60a29975d1
https://github.com/llvm/llvm-project/commit/d08482924efe8b2c44913583af7b8f60a29975d1
Author: Qizhi Hu <836744285 at qq.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/MissingStdForwardCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward.cpp
Log Message:
-----------
[clang-tidy] fix false positive in cppcoreguidelines-missing-std-forward (#77056)
Parameter variable which is forwarded in lambda capture list or in body
by reference is reasonable and current version of this check produces
false positive on these cases. This patch try to fix the
[issue](https://github.com/llvm/llvm-project/issues/68105)
Co-authored-by: huqizhi <836744285 at qq.com>
Commit: 3fb0d8dc808cb7f315670d76109edc9c57cb3d90
https://github.com/llvm/llvm-project/commit/3fb0d8dc808cb7f315670d76109edc9c57cb3d90
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
Log Message:
-----------
Recommit "[VPlan] Mark Select VPInstructions as not having sideeffects."
With #70253 landed, selects for reduction results are explicitly used by
ComputeReductionResult and Selects can be marked as not having
side-effects again.
This reverts the revert commit 173032902c960d4d0d67b521d8c149553d8e8ba3.
Commit: 4b9bbd38686af3dbffd45b360bd5af629426bdbc
https://github.com/llvm/llvm-project/commit/4b9bbd38686af3dbffd45b360bd5af629426bdbc
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
Log Message:
-----------
[X86][NFC] Refine code in X86CompressEVEXTablesEmitter.cpp
1. Simplify getValueFromBitsInit about cast and return type
2. Remove out-of-date comments and allow memory ops in function
object `IsMatch` so that we can reuse it for EVEX2Legacy compression.
This patch is to extract NFC in #77065 into a separate commit.
Commit: 8bbf100799a97f8342bf1a8409c6fb48f03e837f
https://github.com/llvm/llvm-project/commit/8bbf100799a97f8342bf1a8409c6fb48f03e837f
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
Log Message:
-----------
[X86][NFC] Remove dead code for "_REV" instructions
Those "_REV" instructions should not appear before encoding
optimization, while macro fusion and flag-copy lowering are before
encoding optimization.
Commit: 0c7d46a7fd5b7956e285d385a6945153d6a06eb0
https://github.com/llvm/llvm-project/commit/0c7d46a7fd5b7956e285d385a6945153d6a06eb0
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
Log Message:
-----------
[Clang] Correctly construct template arguments for template template parameters (#76811)
This fixes the bug introduced by
https://github.com/llvm/llvm-project/commit/6db007a0654ed7a6ed5c3aa3b61a937c19a6bc6b.
We construct placeholder template arguments for template-template
parameters to avoid mismatching argument substitution since they have
different depths with their corresponding template arguments. In this
case,
```cpp
template <template <Concept C> class T> void foo(T<int>);
```
T lies at the depth 0, and C lies at 1. The corresponding argument, of
which there is exactly one, int, is at depth 0. If we consider the
argument as the outermost one, then we would end up substituting 'int'
into the wrong parameter T.
We used to perform such placeholder construction during the context
walk-up. In the previous patch, we slipped through that inadvertently
because we would walk up to the parent, which is precisely a FileContext
for template-template parameters, after adding innermost arguments.
Besides, this patch moves the sanity check up to the context switch.
That way, we avoid dereferencing null pointers if ND is unspecified.
Closes https://github.com/llvm/llvm-project/issues/57410.
Closes https://github.com/llvm/llvm-project/issues/76604. (The case is
slightly different than that in #57410. We should *not* assume the
surrounding context to be a file-scope one.)
Commit: 61bb3d499a234f20b74e70a37a68c0c7d47eb5dc
https://github.com/llvm/llvm-project/commit/61bb3d499a234f20b74e70a37a68c0c7d47eb5dc
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
Log Message:
-----------
[X86][NFC] Avoid uselss iterations when emitting EVEX compression table
BTW, we relax the condition for EVEX compression from
ST.hasAVX512() to ST.hasEGPR() || ST.hasAVX512(). It does not have any
effect now b/c no APX instruction is in the EVEX compression table so
far.
This patch is to extract NFC in #77065 into a separate commit.
Commit: a085402ef54379758e6c996dbaedfcb92ad222b5
https://github.com/llvm/llvm-project/commit/a085402ef54379758e6c996dbaedfcb92ad222b5
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
Log Message:
-----------
Revert "[GlobalIsel] Combine select of binops (#76763)"
This reverts commit 1687555572ee4fb435da400dde02e7a1e60b742c.
Commit: b5de136ef3fd63c6a6aabaea16792e47be1eeeff
https://github.com/llvm/llvm-project/commit/b5de136ef3fd63c6a6aabaea16792e47be1eeeff
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Refactor subreg indices. (#77173)
-Rename sub_32_hi to sub_gpr_odd
-Add dedicated sub_gpr_even.
-Rename sub_32 and sub_16 to sub_fpr32 and sub_fpr16.
-Remove start offset from sub_gpr_odd. AArch64 doesn't use non-zero offset for GPR
tuples so I don't think we need to.
This is preparation for a RV64 GPRPair for Zacas.
Commit: 747d8fb01c2417546ebaa774874ff8c3005e058a
https://github.com/llvm/llvm-project/commit/747d8fb01c2417546ebaa774874ff8c3005e058a
Author: Kohei Yamaguchi <fix7211 at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/SerializeOps.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.h
M mlir/test/Conversion/SPIRVToLLVM/spirv-storage-class-mapping.mlir
M mlir/test/Dialect/SPIRV/IR/cast-ops.mlir
M mlir/test/Dialect/SPIRV/IR/function-decorations.mlir
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
M mlir/test/Target/SPIRV/cast-ops.mlir
M mlir/test/Target/SPIRV/function-decorations.mlir
Log Message:
-----------
[mlir][spirv] Support alias/restrict function argument decorations (#76353)
Closes #76106
---------
Co-authored-by: Lei Zhang <antiagainst at gmail.com>
Commit: 6e1ecd100d7663a91135b1cf6c4a603681b7385b
https://github.com/llvm/llvm-project/commit/6e1ecd100d7663a91135b1cf6c4a603681b7385b
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn build] Manually port ba3ef331
Commit: 83be8a74001904a63ed0cffa0cecc43649a7bb29
https://github.com/llvm/llvm-project/commit/83be8a74001904a63ed0cffa0cecc43649a7bb29
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M mlir/python/mlir/ir.py
M mlir/test/python/dialects/memref.py
Log Message:
-----------
[mlir][python] add MemRefTypeAttr attr builder (#76371)
Commit: 2af0695b875911144ed1f7b4e5679be500b86a77
https://github.com/llvm/llvm-project/commit/2af0695b875911144ed1f7b4e5679be500b86a77
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[docs] Small spelling fix ("if <...>`than` -> if <...> `then`") (#77215)
Commit: 90e7578a56704eff2143beb8fbe99e05b0a3bb24
https://github.com/llvm/llvm-project/commit/90e7578a56704eff2143beb8fbe99e05b0a3bb24
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll
Log Message:
-----------
[test] Test StackSafetyAnalysis handles MemIntrinsic even in the presence of __asan_memcpy
Commit: 0ebe97115dc79482cd9fa6a4bd31f9faa259dca0
https://github.com/llvm/llvm-project/commit/0ebe97115dc79482cd9fa6a4bd31f9faa259dca0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
Revert "[RISCV] Refactor subreg indices. (#77173)"
This reverts commit b5de136ef3fd63c6a6aabaea16792e47be1eeeff.
Based on post commit feedback, I need to some other work before
this makes sense.
Commit: c63febb1025564b078a5c8e52e6df638e8a1d808
https://github.com/llvm/llvm-project/commit/c63febb1025564b078a5c8e52e6df638e8a1d808
Author: Alex Beloi <alexbeloi at users.noreply.github.com>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
M mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
M mlir/test/Conversion/MemRefToSPIRV/alloc.mlir
M mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
M mlir/test/Conversion/MemRefToSPIRV/bitwidth-emulation.mlir
M mlir/test/Dialect/SPIRV/IR/atomic-ops.mlir
M mlir/test/Dialect/SPIRV/IR/availability.mlir
M mlir/test/Dialect/SPIRV/IR/target-env.mlir
M mlir/test/Dialect/SPIRV/Transforms/inlining.mlir
M mlir/test/Target/SPIRV/atomic-ops.mlir
M mlir/test/Target/SPIRV/debug.mlir
Log Message:
-----------
[mlir][spirv] Use assemblyFormat to define atomic op assembly (#76323)
see #73359
Declarative assemblyFormat ODS is more concise and requires less
boilerplate than filling out CPP interfaces.
Changes:
* updates the Ops defined in `SPIRVAtomicOps.td` to use assemblyFormat.
* Removes print/parse from`AtomcOps.cpp` which is now generated by
assemblyFormat
* Adds `Trait` to verify that a pointer operand `foo`'s pointee type
matches operand `bar`'s type
* * Updates error message expected in tests from new Trait
* Updates tests to updated format (largely using <operand> in place of
"operand")
Commit: 5dfcb3e5d1d16bb4f8fce52b3c089119ed977e7f
https://github.com/llvm/llvm-project/commit/5dfcb3e5d1d16bb4f8fce52b3c089119ed977e7f
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-06 (Sat, 06 Jan 2024)
Changed paths:
M llvm/test/Instrumentation/AddressSanitizer/debug_info_noninstrumented_alloca2.ll
M llvm/test/Instrumentation/AddressSanitizer/hoist-argument-init-insts.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime.ll
Log Message:
-----------
[asan,test] Improve tests to ensure instrumentation even in the presence of StackSafetyAnalysis
Commit: 274f8332b9d1d460d38516f2c685692a46a93c7a
https://github.com/llvm/llvm-project/commit/274f8332b9d1d460d38516f2c685692a46a93c7a
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
Log Message:
-----------
[RISCV] Don't attempt PRE if available info is SEW/LMUL ratio only (#77063)
Commit: 780a5116ba68ec8c53b65008b3407479478b2d5e
https://github.com/llvm/llvm-project/commit/780a5116ba68ec8c53b65008b3407479478b2d5e
Author: David Green <david.green at arm.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
Log Message:
-----------
[AArch64] Fix condition for combining UADDV and Add. (#76809)
This should have been checking that the transform was valid, but used
incorrect conditions letting through invalid combinations of lo/hi
extracts.
Hopefully fixes #76769
Commit: c82c54a1ef89ebd4903adfd977dabd34718a136e
https://github.com/llvm/llvm-project/commit/c82c54a1ef89ebd4903adfd977dabd34718a136e
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang][NFC] Fix trailing whitespace in ReleaseNotes.rst
Commit: 4c8dbb68138959477d9fccbae3669663260dfe31
https://github.com/llvm/llvm-project/commit/4c8dbb68138959477d9fccbae3669663260dfe31
Author: Abhinav271828 <71174780+Abhinav271828 at users.noreply.github.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
A mlir/include/mlir/Analysis/Presburger/Barvinok.h
A mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/CMakeLists.txt
A mlir/unittests/Analysis/Presburger/BarvinokTest.cpp
M mlir/unittests/Analysis/Presburger/CMakeLists.txt
Log Message:
-----------
[MLIR][Presburger] Definitions for basic functions related to cones (#76650)
We add some basic type aliases and function definitions relating to
cones for Barvinok's algorithm.
These include functions to get the dual of a cone and find its index.
Commit: 2835be82db2037367154bc3226473947abbf661f
https://github.com/llvm/llvm-project/commit/2835be82db2037367154bc3226473947abbf661f
Author: Abhinav271828 <71174780+Abhinav271828 at users.noreply.github.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/GeneratingFunction.h
M mlir/unittests/Analysis/Presburger/GeneratingFunctionTest.cpp
Log Message:
-----------
[MLIR][Presburger] Fix ParamPoint to be column-wise instead of row-wise (#77232)
The ParamPoint datatype has each column representing an affine function.
The code for generating functions is modified to reflect this.
Commit: 3eb9fd8ac8bb7524b45912115dc212b7e80be588
https://github.com/llvm/llvm-project/commit/3eb9fd8ac8bb7524b45912115dc212b7e80be588
Author: Bharathi Ramana Joshi <joshibharathiramana at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/unittests/Analysis/Presburger/IntegerRelationTest.cpp
Log Message:
-----------
[MLIR][Presburger] Implement IntegerRelation::mergeAndAlignSymbols (#76736)
Commit: 0903d992cc961281a0bffc8704796f27f8c2e696
https://github.com/llvm/llvm-project/commit/0903d992cc961281a0bffc8704796f27f8c2e696
Author: Bill Wendling <morbo at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
Log Message:
-----------
[NFC][ObjectSizeOffset] Add template stuff for Visual Studio
Visual Studio needs the class template stuff.
C:\llvm\include\llvm/Analysis/MemoryBuiltins.h(217): error C2990: 'llvm::SizeOffsetType': non-class template has already been declared as a class template
C:\llvm\include\llvm/Analysis/MemoryBuiltins.h(193): note: see declaration of 'llvm::SizeOffsetType'
Commit: fd1c156e5d6584684ce58c0536dca96cedcc41f0
https://github.com/llvm/llvm-project/commit/fd1c156e5d6584684ce58c0536dca96cedcc41f0
Author: Bill Wendling <morbo at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
Log Message:
-----------
Revert "[NFC][ObjectSizeOffset] Add template stuff for Visual Studio"
This reverts commit 0903d992cc961281a0bffc8704796f27f8c2e696.
This is causing all non-Visual Studio builds fail.
Commit: 2eb7a82af3b66f9448f9d2843b438fa8ec4ff53f
https://github.com/llvm/llvm-project/commit/2eb7a82af3b66f9448f9d2843b438fa8ec4ff53f
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp.ll
Log Message:
-----------
[InstCombine] Relax the one-use constraints for `icmp pred (binop X, Z), (binop Y, Z)` (#76384)
This patch relaxes the one-use constraints for `icmp pred (binop X, Z),
(binop Y, Z)`. It will enable more optimizations with pointer
arithmetic.
One example in `boost::match_results::set_size`:
```
declare void @use(i64)
define i1 @src(ptr %a1, ptr %a2, ptr %add.ptr.i66, i64 %sub.ptr.rhs.cast.i) {
%sub.ptr.lhs.cast.i = ptrtoint ptr %a1 to i64
%sub.ptr.rhs.cast.i = ptrtoint ptr %a2 to i64
%sub.ptr.sub.i = sub i64 %sub.ptr.lhs.cast.i, %sub.ptr.rhs.cast.i
%sub.ptr.div.i = sdiv exact i64 %sub.ptr.sub.i, 24
call void @use(i64 %sub.ptr.div.i)
%sub.ptr.lhs.cast.i.i = ptrtoint ptr %add.ptr.i66 to i64
%sub.ptr.sub.i.i = sub i64 %sub.ptr.lhs.cast.i.i, %sub.ptr.rhs.cast.i
%sub.ptr.div.i.i = sdiv exact i64 %sub.ptr.sub.i.i, 24
%cmp.i.not.i.i = icmp eq i64 %sub.ptr.div.i.i, %sub.ptr.div.i
ret i1 %cmp.i.not.i.i
}
define i1 @tgt(ptr %a1, ptr %a2, ptr %add.ptr.i66, i64 %sub.ptr.rhs.cast.i) {
%sub.ptr.lhs.cast.i = ptrtoint ptr %a1 to i64
%sub.ptr.rhs.cast.i = ptrtoint ptr %a2 to i64
%sub.ptr.sub.i = sub i64 %sub.ptr.lhs.cast.i, %sub.ptr.rhs.cast.i
%sub.ptr.div.i = sdiv exact i64 %sub.ptr.sub.i, 24
call void @use(i64 %sub.ptr.div.i)
%cmp.i.not.i.i = icmp eq i64 %sub.ptr.sub.i.i, %sub.ptr.sub.i
ret i1 %cmp.i.not.i.i
}
```
Commit: dd450f08cfeb9da372cbe459058bc9ae9425f862
https://github.com/llvm/llvm-project/commit/dd450f08cfeb9da372cbe459058bc9ae9425f862
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/BufferUtils.h
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/lib/Dialect/Bufferization/Transforms/BufferOptimizations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferUtils.cpp
M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
Log Message:
-----------
[mlir][Interfaces][NFC] Move region loop detection to `RegionBranchOpInterface` (#77090)
`BufferPlacementTransformationBase::isLoop` checks if there a loop in
the region branching graph of an operation. This algorithm is similar to
`isRegionReachable` in the `RegionBranchOpInterface`. To avoid duplicate
code, `isRegionReachable` is generalized, so that it can be used to
detect region loops. A helper function
`RegionBranchOpInterface::hasLoop` is added.
This change also turns a recursive implementation into an iterative one,
which is the preferred implementation strategy in LLVM.
Also move the `isLoop` to `BufferOptimizations.cpp`, so that we can
gradually retire `BufferPlacementTransformationBase`. (This is so that
proper error handling can be added to `BufferViewFlowAnalysis`.)
Commit: 752df2bc0b606127efea80023b0dfd8a7a36bf8c
https://github.com/llvm/llvm-project/commit/752df2bc0b606127efea80023b0dfd8a7a36bf8c
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/BufferUtils.h
M mlir/include/mlir/IR/Dominance.h
Log Message:
-----------
[mlir][IR] `DominanceInfo`: Add function to query dominator of a range of block (#77098)
Also improve the implementation of `findCommonDominator` (skip duplicate
blocks) and extract it from `BufferPlacementTransformationBase` (so that
`BufferPlacementTransformationBase` can be retired eventually).
Commit: 1f9c2ddd8c1c5ff013c1f3b5570a0af0657311a8
https://github.com/llvm/llvm-project/commit/1f9c2ddd8c1c5ff013c1f3b5570a0af0657311a8
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
Log Message:
-----------
[libc++][test] Improves suspurious clang diagnostics. (#77234)
As suggested by @philnik777 this is a better fix than
02a33b72fd21cdbf476d6bda72faa462e073e510
Fixes: https://github.com/llvm/llvm-project/issues/77123
Commit: 249d2ccb1d8475d3ff4ead9566a83fc0adf476db
https://github.com/llvm/llvm-project/commit/249d2ccb1d8475d3ff4ead9566a83fc0adf476db
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
Log Message:
-----------
[LV] Add test showing overly aggressive dropping of inbounds.
As %B.gep.0 executes unconditionally in the latch, inbounds could
be preserved in the vector version.
https://alive2.llvm.org/ce/z/XWbMuD
Commit: 18ec3304a9e4aed25d998180728faaf02236205d
https://github.com/llvm/llvm-project/commit/18ec3304a9e4aed25d998180728faaf02236205d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
Log Message:
-----------
[VPlan] Manage InBounds via VPRecipeWithIRFlags for VectorPtrRecipe.
As suggested as follow-up in
https://github.com/llvm/llvm-project/pull/72164, manage inbounds via
VPRecipeWithIRFlags.
Note that in some cases we can now preserve inbounds in a few more
cases.
Commit: e497f689236dc2f14f08f09e1af8c2b10820952a
https://github.com/llvm/llvm-project/commit/e497f689236dc2f14f08f09e1af8c2b10820952a
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libcxx/include/tuple
Log Message:
-----------
[NFC][libc++] Formats tuple.
The fix used macros that confuses clang-format. This is formatted with
clang-format and then excluded from formatting.
Commit: 3e498b3db5bdd6b0e8cbebb1d8ac88a59b4eef7a
https://github.com/llvm/llvm-project/commit/3e498b3db5bdd6b0e8cbebb1d8ac88a59b4eef7a
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
Log Message:
-----------
[libc++][doc] Minor release notes style fixes.
Commit: 8f76f1816ea63b7cc28e150ba319ffbfe6351f9e
https://github.com/llvm/llvm-project/commit/8f76f1816ea63b7cc28e150ba319ffbfe6351f9e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
Log Message:
-----------
[OpenMP][Obvious] Fix test failing on BE architectures
Summary:
This accidentally included a byte past the magic, which was out of order
on big endian architectures.
Commit: b306a9c9986f254d0aff5eb892da9359e2588f54
https://github.com/llvm/llvm-project/commit/b306a9c9986f254d0aff5eb892da9359e2588f54
Author: natanelh-mobileye <155897558+natanelh-mobileye at users.noreply.github.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
Log Message:
-----------
[PatternMatch] Fix typo in comment (NFC) (#77240)
Tiny spelling mistake fixup. please review the two lines of code below
to see the correctness of this PR.
Commit: 535d8e8b92e3f8cf4107d9431012310c9a72c8d3
https://github.com/llvm/llvm-project/commit/535d8e8b92e3f8cf4107d9431012310c9a72c8d3
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SwitchLoweringUtils.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SwitchLoweringUtils.cpp
Log Message:
-----------
NFC: Extract switch lowering binary tree splitting code from DAG into SwitchLoweringUtils.
This will help re-use this code with the upcoming GlobalISel implementation of
this optimization.
Commit: 92e243173c09fc78c25814a7d7e392971034f5be
https://github.com/llvm/llvm-project/commit/92e243173c09fc78c25814a7d7e392971034f5be
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/fstream
M libcxx/include/version
M libcxx/src/CMakeLists.txt
A libcxx/src/fstream.cpp
A libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/filebuf/types.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/fstream.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/fstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/fstream/types.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ifstream/types.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/native_handle_assert_test_helpers.h
A libcxx/test/std/input.output/file.streams/fstreams/native_handle_test_helpers.h
A libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/native_handle.assert.pass.cpp
A libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/native_handle.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/ofstream/types.pass.cpp
M libcxx/test/std/input.output/file.streams/fstreams/types.h
M libcxx/test/std/language.support/support.limits/support.limits.general/fstream.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
Reapply "[libc++][streams] P1759R6: Native handles and file streams" (#77190)
Fixes build on Windows in C++26 mode.
Reverted in:
https://github.com/llvm/llvm-project/commit/40c07b559aa6ab4bac074c943967d3207bc07ae0
Original PR: https://github.com/llvm/llvm-project/pull/76632
---------
Co-authored-by: Zingam <zingam at outlook.com>
Commit: 38228d5efe18cbe45ea02ebb08b2d2a7e4b68560
https://github.com/llvm/llvm-project/commit/38228d5efe18cbe45ea02ebb08b2d2a7e4b68560
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/include/CMakeLists.txt
M libc/src/__support/StringUtil/CMakeLists.txt
Log Message:
-----------
[libc] Fix GPU tests not running after recent patches (#77248)
Summary:
A previous patch added a dependency on the stack protectors, this was
not built on the GPU targets so every test was disabled. It turns out
that disabled tests still get targets so we need to specifically check
if the it is in the target's set of entrypoints before we can use it.
Another patch, because the build-bot was down, snuck in that prevented
the new math tests from being run. The problem is that the `signal.h`
header requires target specific definitions but was being used
unconditionally. I have made changes that disable building this header
if the file is not defined in the config. This required disbaling the
signal_to_string utility, so that will simply be missing from targets
that don't define it.
Commit: fece9818abce9339e3a46ce174c662602e32d593
https://github.com/llvm/llvm-project/commit/fece9818abce9339e3a46ce174c662602e32d593
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M libc/include/CMakeLists.txt
Log Message:
-----------
[libc] Attempt to fix incorrect pathin on Linux builds
Commit: c5e35986d8064775182b03a7e1a7e02f1cf7e4a9
https://github.com/llvm/llvm-project/commit/c5e35986d8064775182b03a7e1a7e02f1cf7e4a9
Author: Nicholas Mosier <nh.mosier at gmail.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M lld/ELF/Arch/X86_64.cpp
M lld/test/ELF/x86-64-tls-pie.s
Log Message:
-----------
[lld][ELF][X86] Add missing X86_64_TPOFF64 case in switches (#77208)
Close #77201. When linking code with a R_X86_64_TPOFF64 relocation, LLD
exits with an 'unknown reloaction' error message due to two missing
cases in relocation switch statements. This patch adds in those cases so
that LLD successfully links code R_X86_64_TPOFF64 relocations.
Commit: eabaee0c59110d0e11b33a69db54ccda526b35fd
https://github.com/llvm/llvm-project/commit/eabaee0c59110d0e11b33a69db54ccda526b35fd
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/addrspacecast.ll
M llvm/test/CodeGen/RISCV/aext-to-sext.ll
M llvm/test/CodeGen/RISCV/alloca.ll
M llvm/test/CodeGen/RISCV/analyze-branch.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/atomic-load-store.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-sub.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/bf16-promote.ll
M llvm/test/CodeGen/RISCV/bfloat-br-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-frem.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
M llvm/test/CodeGen/RISCV/bfloat.ll
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/byval.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-sext-zext.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll
M llvm/test/CodeGen/RISCV/calls.ll
M llvm/test/CodeGen/RISCV/cm_mvas_mvsa.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/double-arith-strict.ll
M llvm/test/CodeGen/RISCV/double-arith.ll
M llvm/test/CodeGen/RISCV/double-br-fcmp.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert-strict.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/double-fcmp.ll
M llvm/test/CodeGen/RISCV/double-frem.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-previous-failure.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
M llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll
M llvm/test/CodeGen/RISCV/emutls.ll
M llvm/test/CodeGen/RISCV/exception-pointer-register.ll
M llvm/test/CodeGen/RISCV/fastcc-float.ll
M llvm/test/CodeGen/RISCV/fastcc-int.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/fli-licm.ll
M llvm/test/CodeGen/RISCV/float-arith-strict.ll
M llvm/test/CodeGen/RISCV/float-arith.ll
M llvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll
M llvm/test/CodeGen/RISCV/float-br-fcmp.ll
M llvm/test/CodeGen/RISCV/float-convert-strict.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/float-fcmp.ll
M llvm/test/CodeGen/RISCV/float-frem.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-mem.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/float-round-conv.ll
M llvm/test/CodeGen/RISCV/float-zfa.ll
M llvm/test/CodeGen/RISCV/fmax-fmin.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fp16-promote.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/frame-info.ll
M llvm/test/CodeGen/RISCV/frame.ll
M llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll
M llvm/test/CodeGen/RISCV/ghccc-rv32.ll
M llvm/test/CodeGen/RISCV/ghccc-rv64.ll
M llvm/test/CodeGen/RISCV/ghccc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-br-fcmp.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-frem.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-mem.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
M llvm/test/CodeGen/RISCV/interrupt-attr.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/libcall-tail-calls.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/machine-outliner-and-machine-copy-propagation.ll
M llvm/test/CodeGen/RISCV/machine-outliner-throw.ll
M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
M llvm/test/CodeGen/RISCV/mem.ll
M llvm/test/CodeGen/RISCV/mem64.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/nest-register.ll
M llvm/test/CodeGen/RISCV/nomerge.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr51206.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/reduce-unnecessary-extension.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/remat.ll
M llvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
M llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64-large-stack.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/div.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/mem64.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rem.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rv64i-complex-float.ll
M llvm/test/CodeGen/RISCV/rv64i-double-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr63596.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
M llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
M llvm/test/CodeGen/RISCV/select-and.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-or.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shadowcallstack.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
M llvm/test/CodeGen/RISCV/shrinkwrap-jump-table.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/split-sp-adjust.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/stack-protector-target.ll
M llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/RISCV/stack-realignment.ll
M llvm/test/CodeGen/RISCV/stack-slot-size.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/tls-models.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/vlenb.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/CodeGen/RISCV/zcmp-with-float.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
M llvm/test/MC/RISCV/function-call.s
M llvm/test/MC/RISCV/tail-call.s
Log Message:
-----------
[RISCV] Omit "@plt" in assembly output "call foo at plt" (#72467)
R_RISCV_CALL/R_RISCV_CALL_PLT distinction is not necessary and
R_RISCV_CALL has been deprecated. Since https://reviews.llvm.org/D132530
`call foo` assembles to R_RISCV_CALL_PLT. The `@plt` suffix is not
useful and can be removed now (matching AArch64 and PowerPC).
GNU assembler assembles `call foo` to RISCV_CALL_PLT since 2022-09
(70f35d72ef04cd23771875c1661c9975044a749c).
Without this patch, unconditionally changing MO_CALL to MO_PLT could
create `jump .L1 at plt, a0`, which is invalid in LLVM integrated assembler
and GNU assembler.
Commit: 360996ac5ad26714a6ddbee45730fbcfb7dc3eea
https://github.com/llvm/llvm-project/commit/360996ac5ad26714a6ddbee45730fbcfb7dc3eea
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/variadic-call.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ceil-floor.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv64.mir
M llvm/test/CodeGen/RISCV/float-select-verify.ll
M llvm/test/CodeGen/RISCV/live-sp.mir
M llvm/test/CodeGen/RISCV/make-compressible.mir
M llvm/test/CodeGen/RISCV/mir-target-flags.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
M llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
M llvm/test/CodeGen/RISCV/vector-abi.ll
Log Message:
-----------
[RISCV] Merge machine operand flag MO_PLT into MO_CALL (#77253)
Since #72467, `@plt` in assembly output "call foo at plt" is omitted. We
can trivially merge MO_PLT and MO_CALL without any functional change to
assembly/relocatable file output.
Earlier architectures use different call relocation types whether a PLT
is potentially needed: R_386_PLT32/R_386_PC32, R_68K_PLT32/R_68K_PC32,
R_SPARC_WDISP30/R_SPARC_WPLT320. However, as the PLT property is
per-symbol instead of per-call-site and linkers can optimize out a PLT,
the distinction has been confusing.
Arm made good names R_ARM_CALL/R_AARCH64_CALL. Let's use MO_CALL instead
of MO_PLT.
As follow-ups, we can merge fixup_riscv_call/fixup_riscv_call_plt and
VK_RISCV_CALL/VK_RISCV_CALL_PLT.
Commit: 4ca1b5e094280ef1af40412e3cfcb62dc3cf15bc
https://github.com/llvm/llvm-project/commit/4ca1b5e094280ef1af40412e3cfcb62dc3cf15bc
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw-sysroot.cpp
Log Message:
-----------
[clang] [MinGW] Don't look for a GCC in path if the install base has a proper mingw sysroot (#76949)
This fixes uses of the MSYS2 clang64 environment compilers, if another
set of GCC based compilers are available further back in PATH (which may
be explicitly added, or inherited unintentionally from other software
installed).
(The issue in the clang64 environment can be worked around somewhat by
installing *-gcc-compat packages which present aliases named
<triple>-gcc within the clang64 environment as well.)
This fixes https://github.com/msys2/MINGW-packages/issues/11495 and
https://github.com/msys2/MINGW-packages/issues/19279.
Commit: f8c5541f5a6b6e4806f9fb5ab191d4a7e60609c4
https://github.com/llvm/llvm-project/commit/f8c5541f5a6b6e4806f9fb5ab191d4a7e60609c4
Author: Bill Wendling <morbo at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
Log Message:
-----------
[NFC][ObjectSize] Make method public
Windows barfs on the 'friend class SizeOffsetType;' statement. Attempt
to fix by making the method called by the "friend" class public.
Commit: 0359acf0f5f04da184386c886d56ee45db7b7be0
https://github.com/llvm/llvm-project/commit/0359acf0f5f04da184386c886d56ee45db7b7be0
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
A lld/test/ELF/eh-frame-nonzero-offset-riscv.s
Log Message:
-----------
[ELF,test] Add eh-frame-nonzero-offset-riscv.s for #65966
I plan to define RISCV::relocateAllocate in a subsequent change.
Add a test to verify
`else if (auto *ehIn = dyn_cast<EhInputSection>(&sec)) secAddr += ehIn->getParent()->outSecOff;`
Commit: 60c4f82d3c4e9cfc337c360f489d830d0379b04d
https://github.com/llvm/llvm-project/commit/60c4f82d3c4e9cfc337c360f489d830d0379b04d
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/test/Instrumentation/InstrProfiling/platform.ll
M llvm/test/Instrumentation/InstrProfiling/profiling.ll
Log Message:
-----------
[InstrProfiling] No runtime registration for ELF, COFF, Mach-O and XCOFF (#77225)
Whether runtime registration is needed is not dependent on the OS but
the file format. For ELF, COFF, Mach-O or XCOFF, we can always use the
linker support. This is important for baremetal platforms such as RTOS
and UEFI platforms where there is no OS but we still don't want to use
runtime registration and rely on linker support instead.
Commit: c7cae61b289fd12171a2da80a6e90b867ee1c4fc
https://github.com/llvm/llvm-project/commit/c7cae61b289fd12171a2da80a6e90b867ee1c4fc
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
Log Message:
-----------
[NFC] Remove trailing whitespace in `llvm/lib/Target/AMDGPU/VOP2Instructions.td`
Commit: d6aef863d83e5a352e78a0211a935a59efda0a0c
https://github.com/llvm/llvm-project/commit/d6aef863d83e5a352e78a0211a935a59efda0a0c
Author: Chen Zheng <czhengsz at cn.ibm.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
Log Message:
-----------
[PowerPC] make LR/LR8 CTR/CTR8 aliased (#76926)
fixes https://github.com/llvm/llvm-project/issues/47156
fixes https://github.com/llvm/llvm-project/issues/47155
Commit: 5034994134bbec92c1f1116c56008ac504f7d763
https://github.com/llvm/llvm-project/commit/5034994134bbec92c1f1116c56008ac504f7d763
Author: Haocong Lu <74847248+Luhaocong at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/AST/FormatString.cpp
M clang/test/Sema/attr-format.c
M clang/test/SemaCXX/attr-format.cpp
M clang/test/SemaCXX/format-strings-scanf.cpp
Log Message:
-----------
[Sema] Warning for _Float16 passed to format specifier '%f' (#74439)
According to https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2844.pdf,
default argument promotions for _FloatN types has been removed.
A warning is needed to notice user to promote _Float16 to double
explicitly, and then pass it to format specifier '%f', which is
consistent with GCC.
Fixes: https://github.com/llvm/llvm-project/issues/68538
Commit: 78550bef98347bccbf0e8e5fb66dc59718fc35ec
https://github.com/llvm/llvm-project/commit/78550bef98347bccbf0e8e5fb66dc59718fc35ec
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
[CMake] Include riscv32-unknown-elf runtimes in Fuchsia toolchain (#76849)
This contains compiler-rt builtins and llvm-libc for baremetal use.
Differential Revision: https://reviews.llvm.org/D155337
Commit: 225e2704af3c53bc0c4ee6bf92f32ace54d10fbc
https://github.com/llvm/llvm-project/commit/225e2704af3c53bc0c4ee6bf92f32ace54d10fbc
Author: Kai Luo <gluokai at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
A llvm/test/CodeGen/PowerPC/intrinsic-trap.ll
Log Message:
-----------
[PowerPC] Precommit test for lowering llvm.trap on ppc64le. NFC.
Commit: b58a97d6aea12a30e2d1b01c6289abb2fd061f0b
https://github.com/llvm/llvm-project/commit/b58a97d6aea12a30e2d1b01c6289abb2fd061f0b
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
Log Message:
-----------
[RISCV][NFC] Move Zawrs/Zacas implementation to RISCVInstrInfoZa.td (#76940)
To keep the structure of TableGen files clear.
The definitions are simplified by the way.
Commit: a90ed3e8a4ea8c5238fd660bbac0371366afe3b5
https://github.com/llvm/llvm-project/commit/a90ed3e8a4ea8c5238fd660bbac0371366afe3b5
Author: Petr Hosek <phosek at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
Log Message:
-----------
Revert "[CMake] Include riscv32-unknown-elf runtimes in Fuchsia toolchain (#76849)"
This reverts commit 78550bef98347bccbf0e8e5fb66dc59718fc35ec since
it broke the two stage build.
Commit: f22cde10e7cc711bba9f43d7529ea6c1394c5b48
https://github.com/llvm/llvm-project/commit/f22cde10e7cc711bba9f43d7529ea6c1394c5b48
Author: Ningning Shi(史宁宁) <shiningning at iscas.ac.cn>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/ARM/ARMLegalizerInfo.h
M llvm/lib/Target/M68k/GISel/M68kLegalizerInfo.h
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
Log Message:
-----------
[GlobalISel][NFC]Delete the comments of XXLegalizerInfo (#76918)
Delete the LegalizerInfo comments of AArch64/AMD64/ARM/M68k/RISCV/x86,
they are copied from register bank.
Commit: ce944597e43ae4f77260d4683f8d6535947fb0a2
https://github.com/llvm/llvm-project/commit/ce944597e43ae4f77260d4683f8d6535947fb0a2
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn] port 92e243173c09
Commit: 1dfb9498333a6c7c6ac012eb70dc593f5165a025
https://github.com/llvm/llvm-project/commit/1dfb9498333a6c7c6ac012eb70dc593f5165a025
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
R lld/test/ELF/linkerscript/overlay-reject.test
R lld/test/ELF/linkerscript/overlay-reject2.test
M lld/test/ELF/linkerscript/overlay.test
Log Message:
-----------
[ELF] Improve OVERLAY tests
Also test two issues:
* When the start address is `.`, subsequent sections don't share the
address of the first overlay section.
* When the first overlay section is empty and discardable, `p_paddr` is
incorrectly zero. This is because a discarded section has a zero
address, causing `prev->getLMA() + prev->size` where `prev` refers to
the first section to evaluate to zero.
Commit: 93c8468c6cd154efb8fae16a4025e116be8181c7
https://github.com/llvm/llvm-project/commit/93c8468c6cd154efb8fae16a4025e116be8181c7
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
Log Message:
-----------
[X86][NFC] Remove duplicate comments in X86CompressEVEX.cpp
Commit: 624b48789f6941d5f10c9ddf144e2bf72365fdd1
https://github.com/llvm/llvm-project/commit/624b48789f6941d5f10c9ddf144e2bf72365fdd1
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
Log Message:
-----------
[AArch64][NFC] Pre-commit IR translator switch lowering test.
Commit: b3037ae1fc6d26459e37f813757ad30872eb2eee
https://github.com/llvm/llvm-project/commit/b3037ae1fc6d26459e37f813757ad30872eb2eee
Author: Christian Ulmann <christianulmann at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugFoundation.cpp
M flang/test/Transforms/debug-line-table-existing.fir
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table.fir
M mlir/examples/toy/Ch6/toyc.cpp
M mlir/examples/toy/Ch7/toyc.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/Transforms/Passes.td
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
M mlir/test/Dialect/LLVMIR/call-location.mlir
M mlir/test/Dialect/LLVMIR/debuginfo.mlir
M mlir/test/Dialect/LLVMIR/global.mlir
M mlir/test/Dialect/LLVMIR/invalid-call-location.mlir
M mlir/test/Dialect/LLVMIR/loop-metadata.mlir
M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/loop-metadata.mlir
Log Message:
-----------
[MLIR][LLVM] Add distinct identifier to DICompileUnit attribute (#77070)
This commit adds a distinct attribute parameter to the DICompileUnit to
enable the modeling of distinctness. LLVM requires DICompileUnits to be
distinct and there are cases where one gets two equivalent compilation
units but LLVM still requires differentiates them. We observed such
cases for combinations of LTO and inline functions.
This patch also changes the DIScopeForLLVMFuncOp pass to a module pass,
to ensure that only one distinct DICompileUnit is created, instead of
one for each function.
Commit: 9b808a4beb8e6c8255b412fdd6f5a3e20cbcf270
https://github.com/llvm/llvm-project/commit/9b808a4beb8e6c8255b412fdd6f5a3e20cbcf270
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
A clang/test/Modules/explicit-specializations.cppm
Log Message:
-----------
[NFC] [Modules] Add a test case for selecting specializations with aliased template args
This a test for https://github.com/llvm/llvm-project/pull/76774. In the
review comments, we're concerning about the case that ODRHash may
produce the different hash values for semantical same template
arguments. For example, if the template argument in a specialization is
not qualified and the semantical same template argument in the instantiation
point is qualified, we should be able to select that template
specialization. And this patch tests this behavior: we should be able to select
the correct specialization with semantical same template arguments.
Commit: fe1364f1e7ac0c4d0f9a4b15189485782241190d
https://github.com/llvm/llvm-project/commit/fe1364f1e7ac0c4d0f9a4b15189485782241190d
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
Log Message:
-----------
Update pre-committed test. Accidentally committed the wrong version, this one
properly demonstrates the upcoming change.
Commit: 9de81ce87d9f99850d427c9e0440440b5ef9ebbf
https://github.com/llvm/llvm-project/commit/9de81ce87d9f99850d427c9e0440440b5ef9ebbf
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-07 (Sun, 07 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
Log Message:
-----------
NFC: Another pre-commit test change.
Commit: bae1fdea712fcd0b0ea525b115e661f92263f2e7
https://github.com/llvm/llvm-project/commit/bae1fdea712fcd0b0ea525b115e661f92263f2e7
Author: Christian Ulmann <christianulmann at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugFoundation.cpp
M flang/test/Transforms/debug-line-table-inc-file.fir
M flang/test/Transforms/debug-line-table.fir
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/test/Dialect/LLVMIR/add-debuginfo-func-scope.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/Import/global-variables.ll
Log Message:
-----------
[MLIR][LLVM] Add distinct identifier to the DISubprogram attribute (#77093)
This commit adds an optional distinct attribute parameter to the
DISubprogramAttr. This enables modeling of distinct subprograms, as
required for LLVM IR. This change is required to avoid accidential
uniquing of subprograms on functions that would lead to invalid LLVM IR
post export.
Commit: 7e54ae24d84bce4452ac4a28acb6568db52980fb
https://github.com/llvm/llvm-project/commit/7e54ae24d84bce4452ac4a28acb6568db52980fb
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMInlining.cpp
M mlir/test/Dialect/LLVMIR/inlining.mlir
Log Message:
-----------
[mlir][llvm] Do not inline variadic functions (#77241)
This revision updates the llvm dialect inliner to explicitly disallow
the inlining of variadic functions. Already previously the inlining
failed if the number of function arguments did not match the number of
call arguments. After the change, inlining checks the function is not
variadic and it does not contain a va_start intrinsic.
Commit: c15e5836d49763e43736d13eb4b873e01dcc9ef0
https://github.com/llvm/llvm-project/commit/c15e5836d49763e43736d13eb4b873e01dcc9ef0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/test/AST/Interp/arrays.cpp
Log Message:
-----------
[clang][Interp] Fix nullptr array dereferencing (#75798)
The attached test case would cause an assertion failure in Pointer.h
when operating on a null pointer.
Commit: 6343b4e48205fe5772f707b9023e8a57c95154a9
https://github.com/llvm/llvm-project/commit/6343b4e48205fe5772f707b9023e8a57c95154a9
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/include/mlir/ExecutionEngine/RunnerUtils.h
Log Message:
-----------
[mlir] Apply ClangTidy performance finding
- Use '\n' instead of std::endl;
https://clang.llvm.org/extra/clang-tidy/checks/performance/avoid-endl.html
Commit: ca20c99bb185838e5f275cf27fdcaccb17d7978d
https://github.com/llvm/llvm-project/commit/ca20c99bb185838e5f275cf27fdcaccb17d7978d
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
Log Message:
-----------
[GlobalISel][IRTranslator] Port switch binary tree search optimization. (#77279)
This re-uses some code extracted earlier from SelectionDAG into
SwitchLoweringUtils
Much of the code is a straight port from SDAG's splitWorkItem(), with
minor changes needed for GISel.
Commit: 2642240de9b9004a431f4e601c055c8c135c9d39
https://github.com/llvm/llvm-project/commit/2642240de9b9004a431f4e601c055c8c135c9d39
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/include/mlir/ExecutionEngine/RunnerUtils.h
Log Message:
-----------
[mlir] Add explicit call to flush
ClangTidy performance suggested to use '\n' instead of std::endl, but it
seems the flushing behavior was intended here (tests started failing).
Commit: 3574b61013b341c96d5c9b7d2ca5480a398586b3
https://github.com/llvm/llvm-project/commit/3574b61013b341c96d5c9b7d2ca5480a398586b3
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Analysis/VFABIDemangling.cpp
M llvm/unittests/Analysis/VectorFunctionABITest.cpp
Log Message:
-----------
[VFABI] Reject demangled variants with unexpected number of params. (#76855)
When demangling a vector variant we are not checking that the number of
parameters is the same as that of the scalar function. This check is
hoisted out of getScalableECFromSignature() making the equvalent check
in the unittests obsolete.
Commit: 1c674666fa3bc0cf6d62d920bdddc846b8105d12
https://github.com/llvm/llvm-project/commit/1c674666fa3bc0cf6d62d920bdddc846b8105d12
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86.ll
M llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll
M llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll
M llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll
M llvm/test/CodeGen/X86/invpcid-intrinsic.ll
M llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll
M llvm/test/CodeGen/X86/movdir-intrinsic-x86_64.ll
M llvm/test/CodeGen/X86/sha.ll
M llvm/test/CodeGen/X86/x64-cet-intrinsics.ll
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
Log Message:
-----------
[X86] Support EVEX compression for EGPR (#77202)
Compress promoted instruction (EVEX) to pre-promotion instruction
(legacy/VEX) when R16-R31 is not used.
Alternative of #77065
Commit: 68a1583a8900fe13e33fe9ff6005f7a3e5b82c53
https://github.com/llvm/llvm-project/commit/68a1583a8900fe13e33fe9ff6005f7a3e5b82c53
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-armpl.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef-scalable.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-sleef.ll
Log Message:
-----------
[TLI] replace-with-veclib works with FRem Instruction. (#76166)
Updated SLEEF and ArmPL tests with Fixed-Width and Scalable cases for
frem. Those are mapped to fmod/fmodf.
Commit: acbb491ab23fd04e201b58195f78e04c5a647d47
https://github.com/llvm/llvm-project/commit/acbb491ab23fd04e201b58195f78e04c5a647d47
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxx/cmake/caches/Armv7M-picolibc.cmake
M libcxx/utils/qemu_baremetal.py
Log Message:
-----------
[libcxx] Require qemu-system-arm for armv7m builder (#77067)
And add a check in the python script that the binary given to `--qemu`
actually exists. Otherwise you get a generic Python error:
```
# .---command stderr------------
# | Traceback (most recent call last):
# | File "/home/david.spickett/modules-llvm-project/libcxx/utils/qemu_baremetal.py", line 70, in <module>
# | exit(main())
# | File "/home/david.spickett/modules-llvm-project/libcxx/utils/qemu_baremetal.py", line 66, in main
# | os.execvp(qemu_commandline[0], qemu_commandline)
# | File "/usr/lib/python3.8/os.py", line 568, in execvp
# | _execvpe(file, args)
# | File "/usr/lib/python3.8/os.py", line 610, in _execvpe
# | raise last_exc
# | File "/usr/lib/python3.8/os.py", line 601, in _execvpe
# | exec_func(fullname, *argrest)
# | FileNotFoundError: [Errno 2] No such file or directory
# `-----------------------------
# error: command failed with exit status: 1
```
When it tries to run the entire command later.
For the builder, it's only ever going to use qemu-system-arm so error at
config time if it's not there.
Commit: ed1632b72ec029256f3af60822dad54970a79577
https://github.com/llvm/llvm-project/commit/ed1632b72ec029256f3af60822dad54970a79577
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
Log Message:
-----------
[ConstraintElim] Support signed induction variables (#77103)
When adding information for induction variables, add both unsigned and
signed constraints, with corresponding signed and unsigned
preconditions.
I believe the logic here is equally valid for signed/unsigned, we just
need to add preconditions of the same type.
Commit: 2c213c45046b78eac48809b013e7a80099607ebb
https://github.com/llvm/llvm-project/commit/2c213c45046b78eac48809b013e7a80099607ebb
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/test/Driver/riscv-rvv-vector-bits.c
Log Message:
-----------
[Clang] Fix reference to sve in rvv driver test comment. NFC
Commit: d02c7931d1be794a230943e300fec4172032e6a8
https://github.com/llvm/llvm-project/commit/d02c7931d1be794a230943e300fec4172032e6a8
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Analysis/MemorySSAUpdater.cpp
A llvm/test/Transforms/SimpleLoopUnswitch/memssa-readnone-access.ll
Log Message:
-----------
[MSSA] Don't require clone creation to succeed (#76819)
Sometimes, we create a MemoryAccess for an instruction, which is later
simplified (e.g. via devirtualization) such that the new instruction has
no memory effects anymore.
If we later clone the instruction (e.g. during unswitching), then MSSA
will not create a MemoryAccess for the new instruction, triggering an
assert.
Disable the assertion (by passing CreationMustSucceed=false) and adjust
getDefiningAccessForClone() to work correctly in that case.
This PR implements the alternative suggestion by alinas from
https://github.com/llvm/llvm-project/pull/76142.
Commit: 442f67c8702a792a135d61765909b732827d6bf2
https://github.com/llvm/llvm-project/commit/442f67c8702a792a135d61765909b732827d6bf2
Author: Lu Haocong <haoconglu at qq.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
A clang/test/Sema/attr-format-Float16.c
M clang/test/Sema/attr-format.c
A clang/test/SemaCXX/attr-format-Float16.cpp
M clang/test/SemaCXX/attr-format.cpp
M clang/test/SemaCXX/format-strings-scanf.cpp
Log Message:
-----------
[Sema][test] Split format attribute test cases for _Float16
Fixes https://github.com/llvm/llvm-project/pull/74439#issuecomment-1880528376
Commit: 0ba868db709d2822b00f4ee9552d7fe41e5f2722
https://github.com/llvm/llvm-project/commit/0ba868db709d2822b00f4ee9552d7fe41e5f2722
Author: Javed Absar <106147771+javedabsar1 at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/BufferViewFlowAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
Log Message:
-----------
[MLIR][Bufferizer][NFC] Simplify some codes. (#77254)
NFC. clean up.
Commit: 27f547968cce89d4706ae2b27a0c15254d1670ee
https://github.com/llvm/llvm-project/commit/27f547968cce89d4706ae2b27a0c15254d1670ee
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Break after string literals with trailing line breaks (#76795)
This restores a subset of functionality that was forego in
d68826dfbd987377ef6771d40c1d984f09ee3b9e.
Streaming multiple string literals is rare enough in practice, hence
that change makes sense in general. But it seems people were
incidentally relying on this for having line breaks after string
literals that ended with `\n`.
This patch tries to restore that behavior to prevent regressions in the
upcoming LLVM release, until we can implement some configuration based
approach as proposed in https://github.com/llvm/llvm-project/pull/69859.
Commit: a831a21e4d8d41b044edaf61a90debb2ad756bda
https://github.com/llvm/llvm-project/commit/a831a21e4d8d41b044edaf61a90debb2ad756bda
Author: Mitch Phillips <31459023+hctim at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
M lld/test/ELF/aarch64-memtag-android-abi.s
Log Message:
-----------
[lld] [MTE] Allow android note for static executables. (#77078)
Florian pointed out that we're accidentally eliding the Android note for
static executables, as it's guarded behind the "can have memtag globals"
conditional. Of course, memtag globals are unsupported for static
executables, but we should still allow static binaries to produce the
Android note (as that's the only way they get MTE).
Commit: a9ffc92fc4428723e85485102dfe10fbea966e64
https://github.com/llvm/llvm-project/commit/a9ffc92fc4428723e85485102dfe10fbea966e64
Author: Nathan Gauër <brioche at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll
Log Message:
-----------
[SPIR-V] Add pre-headers to loops. (#75844)
This is the first of the 7 steps outlined in #75801. This PR explicitely
calls the SimplifyLoops pass. Directly following this pass should follow
the 6 others required to structurize the IR.
Running this pass could generate empty basic-blocks, which are implicit
fallthrough to the successor BB.
There was a specific condition in the SPIR-V ISel which handled implicit
fallthrough, but it couldn't work on empty basic-blocks. This commits
removes the old logic, and adds this new logic, which checks all
basic-blocks for implicit fallthroughs, including empty ones.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 10b5b5d6e2df25dab86fe89a78c5df6f507f6e50
https://github.com/llvm/llvm-project/commit/10b5b5d6e2df25dab86fe89a78c5df6f507f6e50
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang] Fix a crash when referencing the result if the overload fails (#77288)
after 20a05677f9394d4bc9467fe7bc93a4ebd3aeda61
If the overload fails, the `Best` might point to the `end()`,
referencing it leads to asan crashes.
Commit: e35c912039a644a2cc44cf88f451f7a2cdc455d9
https://github.com/llvm/llvm-project/commit/e35c912039a644a2cc44cf88f451f7a2cdc455d9
Author: Liao Chunyu <chunyu at iscas.ac.cn>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV][NFC] Fix gcc -Wparentheses warning in RISCVISelDAGToDAG.cpp
warning:
RISCVISelDAGToDAG.cpp:767: warning: suggest parentheses around ‘&&’ within ‘||’ [-Wparentheses]
767 | AM == ISD::POST_INC && "Unexpected addressing mode");
Commit: c8c525678e6dab2796c1996e0cdea31d4a865a9d
https://github.com/llvm/llvm-project/commit/c8c525678e6dab2796c1996e0cdea31d4a865a9d
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/lib/Frontend/FrontendActions.cpp
Log Message:
-----------
[Flang] Remove unused triple variable. NFC (#77275)
I'm not sure why we don't get an unused variable warning, but triple
doesn't
seem to be used after 898db1136e679.
Commit: fb72a445c1abb21034dc4a63b8489f39150a5566
https://github.com/llvm/llvm-project/commit/fb72a445c1abb21034dc4a63b8489f39150a5566
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
Log Message:
-----------
[X86] Emit NDD2NonNDD entris in the EVEX comprerssion table, NFCI
This patch is a straightfoward change based on the design in #77202.
It does not have any effect since we haven't supported compressing ND
to non-ND in X86CompressEVEX.cpp.
Commit: 4fdd24b8d355e49d657c7c8a380b6f9b1b47ce1e
https://github.com/llvm/llvm-project/commit/4fdd24b8d355e49d657c7c8a380b6f9b1b47ce1e
Author: OCHyams <orlando.hyams at sony.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
Log Message:
-----------
[RemoveDIs][NFC] Update SelectionDAG test to check RemoveDIs mode too
In line with other RemoveDIs test updates. This test fails without #76941.
Commit: bdbaf6e61b63e24b94c85d7f71c11c212cd4cc9b
https://github.com/llvm/llvm-project/commit/bdbaf6e61b63e24b94c85d7f71c11c212cd4cc9b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16.ll
Log Message:
-----------
AMDGPU: Make v8bf16/v16bf16 legal types (#76678)
Depends #76217
Commit: 67782d2de5ea9c8653b8f0110237a3c355291c0e
https://github.com/llvm/llvm-project/commit/67782d2de5ea9c8653b8f0110237a3c355291c0e
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/unittests/Runtime/ExternalIOTest.cpp
Log Message:
-----------
[flang] Remove duplicate tests. (#77059)
Commit: d218092543b3f9ba2204d7c8fe5ac70befa3d772
https://github.com/llvm/llvm-project/commit/d218092543b3f9ba2204d7c8fe5ac70befa3d772
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/test/Transforms/SCCP/switch.ll
Log Message:
-----------
[SCCP] Check whether the default case is reachable (#76295)
This patch eliminates unreachable default cases using range information.
Fixes #76085.
Commit: 8b49ed8ba1ba5ecd35bd1efa4be5a0f56b0135b8
https://github.com/llvm/llvm-project/commit/8b49ed8ba1ba5ecd35bd1efa4be5a0f56b0135b8
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/test/API/functionalities/inline-sourcefile/TestInlineSourceFiles.py
Log Message:
-----------
[lldb][test] Skip DWARF inline source file test on Windows
This was added by 917b404e2ccdcc31d2d64971ad094b80967a240b
and fails for unknown reasons.
Commit: ba4cf31facdaf9bb9943c057d325ff0968331e9a
https://github.com/llvm/llvm-project/commit/ba4cf31facdaf9bb9943c057d325ff0968331e9a
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/test/API/commands/expression/nested/TestNestedExpressions.py
Log Message:
-----------
[lldb][test] Skip part of nested expressions test on Windows
This was added by e42edb5547618c172abe25914000bb61f5278c4c and
has been failing: https://lab.llvm.org/buildbot/#/builders/219/builds/8012
Commit: eb523a4d272e81c8f7bf48da3923ed502f41c187
https://github.com/llvm/llvm-project/commit/eb523a4d272e81c8f7bf48da3923ed502f41c187
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/vec_extract-avx.ll
M llvm/test/CodeGen/X86/vec_extract-mmx.ll
M llvm/test/CodeGen/X86/vec_extract-sse4.ll
M llvm/test/CodeGen/X86/vec_extract.ll
Log Message:
-----------
[X86] vec_extract - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: e3f8e44b00ecb95818bc68c693b6637460112b2a
https://github.com/llvm/llvm-project/commit/e3f8e44b00ecb95818bc68c693b6637460112b2a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-lzcnt-256.ll
M llvm/test/CodeGen/X86/vector-tzcnt-256.ll
Log Message:
-----------
[X86] vector-lzcnt-256.ll / vector-tzcnt-256.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: f1e3a8f1eb7877b07d386af1a02cd7578a76c7d1
https://github.com/llvm/llvm-project/commit/f1e3a8f1eb7877b07d386af1a02cd7578a76c7d1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/avx2-gather.ll
Log Message:
-----------
[X86] avx2-gather.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 0e4a38018a7228d93d72a31d9fae6855f866dded
https://github.com/llvm/llvm-project/commit/0e4a38018a7228d93d72a31d9fae6855f866dded
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/avx2-nontemporal.ll
Log Message:
-----------
[X86] avx2-nontemporal.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 2edce427a8b17d1d2192c1ee4a2227b6eb2971a0
https://github.com/llvm/llvm-project/commit/2edce427a8b17d1d2192c1ee4a2227b6eb2971a0
Author: Xing Xue <57193974+xingxue-ibm at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/CMakeLists.txt
M openmp/cmake/OpenMPTesting.cmake
M openmp/runtime/CMakeLists.txt
M openmp/runtime/cmake/LibompGetArchitecture.cmake
M openmp/runtime/cmake/config-ix.cmake
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_config.h.cmake
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_global.cpp
M openmp/runtime/src/kmp_gsupport.cpp
M openmp/runtime/src/kmp_os.h
M openmp/runtime/src/kmp_platform.h
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_wrapper_getpid.h
M openmp/runtime/src/z_Linux_util.cpp
M openmp/runtime/test/lit.cfg
Log Message:
-----------
[openmp][AIX]Initial changes for porting to AIX (#76841)
This PR contains initial changes for building and testing libomp on AIX.
More changes will follow.
- `KMP_OS_AIX` is defined for the AIX platform
- `KMP_ARCH_PPC` is defined for 32-bit PPC
- `KMP_ARCH_PPC_XCOFF` and `KMP_ARCH_PPC64_XCOFF` are for 32- and 64-bit
XCOFF object formats respectively
- Assembly file `z_AIX_asm.S` is used for AIX specific assembly code and
will be added in a separate PR
- The target library is disabled because AIX does not have the device
support
- OMPT is temporarily disabled
Commit: 763109e346b90193027b24743e266495d992b1c6
https://github.com/llvm/llvm-project/commit/763109e346b90193027b24743e266495d992b1c6
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir][gpu] Use `known_block_size` to set `maxntid` for NVVM target (#77301)
Setting thread block size with `maxntid` on the kernel has great
performance benefits. In this way, downstream PTX compiler can do better
register allocation.
MLIR's `gpu.launch` and `gpu.launch_func` already has an attribute
(`known_block_size`) that keeps the thread block size when it is known.
This PR simply uses this attribute to set `maxntid`.
Commit: 4a456489e051ff037655597a0b54654aa1f5a2a5
https://github.com/llvm/llvm-project/commit/4a456489e051ff037655597a0b54654aa1f5a2a5
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/test/Lower/OpenMP/FIR/declare-target-implicit-func-and-subr-cap-enter.f90
M flang/test/Lower/OpenMP/FIR/declare-target-implicit-func-and-subr-cap.f90
M flang/test/Lower/OpenMP/declare-target-implicit-func-and-subr-cap-enter.f90
M flang/test/Lower/OpenMP/declare-target-implicit-func-and-subr-cap.f90
Log Message:
-----------
[Flang][OpenMP] Disable declarate target tests on Windows (#77306)
These tests seem to be failing in Windows bots.
See https://github.com/llvm/llvm-project/issues/77086
Commit: f0f16be77e1977d04535556ef69eaccd5bfef36f
https://github.com/llvm/llvm-project/commit/f0f16be77e1977d04535556ef69eaccd5bfef36f
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang][Sema][NFC] Clean up BuildOverloadedCallExpr
Commit: 7ca4473dd97328ebaa95dd3411e3c817935389de
https://github.com/llvm/llvm-project/commit/7ca4473dd97328ebaa95dd3411e3c817935389de
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] Add new cache flushing instructions for GFX12 (#76944)
Co-authored-by: Diana Picus <Diana-Magda.Picus at amd.com>
Commit: 2bf01d73f6ebca11f36c17a65b7a86109d44681e
https://github.com/llvm/llvm-project/commit/2bf01d73f6ebca11f36c17a65b7a86109d44681e
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
A lldb/test/Shell/SymbolFile/DWARF/Inputs/dwo-static-data-member.cpp
A lldb/test/Shell/SymbolFile/DWARF/dwo-static-data-member-access.test
Log Message:
-----------
[lldb][DWARFASTParserClang] GetClangDeclForDIE: don't create VarDecl for static data members (#77155)
With DWARFv5, C++ static data members are represented as
`DW_TAG_variable`s (see `faa3a5ea9ae481da757dab1c95c589e2d5645982`).
In GetClangDeclForDIE, when trying to parse the `DW_AT_specification`
that a static data member's CU-level `DW_TAG_variable` points to, we
would try to `CreateVariableDeclaration`. Whereas previously it was a
no-op (for `DW_TAG_member`s). However, adding `VarDecls` to RecordDecls
for static data members should always be done in
`CreateStaticMemberVariable`. The test-case is an exapmle where we would
crash if we tried to create a `VarDecl` from within `GetClangDeclForDIE`
for a static data member.
This patch simply checks whether the `DW_TAG_variable` being parsed is a
static data member, and if so, trivially returns from
`GetClangDeclForDIE` (as we previously did for `DW_TAG_member`s).
Commit: b4ee7d6119f97931d9f38ac8c6bc7409eed87aab
https://github.com/llvm/llvm-project/commit/b4ee7d6119f97931d9f38ac8c6bc7409eed87aab
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Log Message:
-----------
[lldb][DWARFIndex][nfc] Factor out fully qualified name query (#76977)
This moves the functionally of finding a DIE based on a fully qualified
name from SymbolFileDWARF into DWARFIndex itself, so that
specializations of DWARFIndex can implement faster versions of this
query.
Commit: ade7ae4760a0b0e74cddd8f852830ca946295930
https://github.com/llvm/llvm-project/commit/ade7ae4760a0b0e74cddd8f852830ca946295930
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/Transforms/InstSimplify/select.ll
Log Message:
-----------
[InstSimplify] Add test for #77320 (NFC)
Commit: 97e3220d6312ae00bcbe08673f218bd0f705776b
https://github.com/llvm/llvm-project/commit/97e3220d6312ae00bcbe08673f218bd0f705776b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/select.ll
Log Message:
-----------
[InstSimplify] Consider bitcast as potential cross-lane operation
The bitcast might change the number of vector lanes, in which case
it will be a cross-lane operation.
Fixes https://github.com/llvm/llvm-project/issues/77320.
Commit: 16cd344380aa89a4bc47939ae65fd59fe8c77181
https://github.com/llvm/llvm-project/commit/16cd344380aa89a4bc47939ae65fd59fe8c77181
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
Log Message:
-----------
[RISCV] Fix collectNonISAExtFeature returning negative extension features (#76962)
collectNonISAExtFeature was returning any negative extension features,
e.g.
given an input of
+zifencei,+m,+a,+save-restore,-zbb,-relax,-zfa
It would return
+save-restore,-zbb,-relax,-zfa
Because negative extensions aren't emitted when calling
toFeatureVector(), and
so were considered missing. Hence why we still see "-zfa" and "-zfb" in
the tests for
the full arch string attributes, even though with a full arch string we
should be overriding the extensions.
This fixes it by using RISCVISAInfo::isSupportedExtensionFeature instead
to
check if a feature is an ISA extension.
Commit: e6b7c8c4951a470cc63a1721bc5f5ac7f3748a2f
https://github.com/llvm/llvm-project/commit/e6b7c8c4951a470cc63a1721bc5f5ac7f3748a2f
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'if' clause
The 'if' clause takes a required 'condition' expression. This patch
implements that as an expression we will later ensure is convertible to
a binary expression.
Commit: 0deb27c95722311c1ebedbbb8c8c4ac7735701fc
https://github.com/llvm/llvm-project/commit/0deb27c95722311c1ebedbbb8c8c4ac7735701fc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M flang/test/Lower/OpenMP/FIR/declare-target-implicit-func-and-subr-cap-enter.f90
M flang/test/Lower/OpenMP/FIR/declare-target-implicit-func-and-subr-cap.f90
M flang/test/Lower/OpenMP/declare-target-implicit-func-and-subr-cap-enter.f90
M flang/test/Lower/OpenMP/declare-target-implicit-func-and-subr-cap.f90
Log Message:
-----------
Revert "[Flang][OpenMP] Disable declarate target tests on Windows" (#77324)
Reverts llvm/llvm-project#77306
These tests aren't broken on Windows, marking them XFAIL will just ~
consistently fail the build.
Commit: 036e48e2f5f890e1f9574cdb610e2336f12038a2
https://github.com/llvm/llvm-project/commit/036e48e2f5f890e1f9574cdb610e2336f12038a2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/splat-buildvector.ll
Log Message:
-----------
[SLP]Fix PR76850: do the analysis of the submask.
Need to limit the transformation of the VecMask by the corresponding part of the mask of SliceSize size to avoid compiler crash during further cost analysis.
Commit: 34dbaddc6fa1ce0892ecf3ca06866e7038b2a9b3
https://github.com/llvm/llvm-project/commit/34dbaddc6fa1ce0892ecf3ca06866e7038b2a9b3
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
Log Message:
-----------
[clang][ASTImporter] Only reorder fields of RecordDecls (#77079)
Prior to `e9536698720ec524cc8b72599363622bc1a31558`
(https://reviews.llvm.org/D154764) we only re-ordered the fields of
`RecordDecl`s. The change refactored this logic to make sure
`FieldDecl`s are imported before other member decls. However, this
change also widened the types of `DeclContext`s we consider for
re-ordering from `RecordDecl` to anything that's a `DeclContext`. This
seems to have been just a drive-by cleanup.
Internally we've seen numerous crashes in LLDB where we try to perform
this re-ordering on fields of `ObjCInterfaceDecl`s.
This patch restores old behaviour where we limit the re-ordering to just
`RecordDecl`s.
rdar://119343184
rdar://119636274
rdar://119832131
Commit: 69066ab31959968ebcbca71f3872bdedef8fb8cd
https://github.com/llvm/llvm-project/commit/69066ab31959968ebcbca71f3872bdedef8fb8cd
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CXX/over/over.load/p2-0x.cpp
Log Message:
-----------
[Clang] Fix IsOverload for function templates (#77323)
Functions which correspond but have different template parameter lists
are not redeclarations.
Fixes a regression introduced by af4751
(The patch just moves the template parameters check above if the
signature check)
Fixes #76358
Commit: bda562519b89ea3832be00d8ac75cfcdb924dce2
https://github.com/llvm/llvm-project/commit/bda562519b89ea3832be00d8ac75cfcdb924dce2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Libomptarget][NFC] Fix unhandled allocator enum value
Commit: 01410103a6eb50436c39f71299773749b7de9dec
https://github.com/llvm/llvm-project/commit/01410103a6eb50436c39f71299773749b7de9dec
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxx/docs/Status/Cxx20Issues.csv
Log Message:
-----------
[libc++][doc] Marks LWG3257 as complete (#77237)
The macros were already updated
- __cpp_lib_string_view in 466df1718e41fe2fca6ce6bd98c01b18f42c05e4
- __cpp_lib_array_constexpr in 77b9abfc8e89ca627e4f9a1cc206bea131db6db1
Based on the dates of the commit and that
P0858 "Constexpr iterator requirements"
was completed in LLVM 12, set this issue as completed in the same
version.
Completes
- LWG3257 Missing feature testing macro update from P0858
Commit: 053aed2024a1014736ffe35b001710b263c7a4b5
https://github.com/llvm/llvm-project/commit/053aed2024a1014736ffe35b001710b263c7a4b5
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Check if machine loop is passed while getting loop alignment (#77283)
After d6bb96e677759375b2bea00115918b2cb6552f5b, calling
getPrefLoopAlignment without passing in a pointer to a MachineLoop
causes a segmentation fault. This conflicts with the API in
TargetLoweringBase where the default MachineLoop pointer passed is
nullptr. This patch fixes this by checking if the pointer points to
something before enabling the optional functionality.
Commit: ff47989ec238dafe4a68c6a716e8dbccc9f559f5
https://github.com/llvm/llvm-project/commit/ff47989ec238dafe4a68c6a716e8dbccc9f559f5
Author: Amara Emerson <amara at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-ext-debugloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-extending-loads.mir
Log Message:
-----------
[AArch64][GlobalISel] Allow anyexting loads from 32b -> 64b to be legal.
We can already support selection of these through imported patterns, we were
just missing the legalizer rule to allow these to be formed.
Nano size benefit overall.
Commit: 12101ca8e322c4cbf40e44b5b1fbf7ea76aff581
https://github.com/llvm/llvm-project/commit/12101ca8e322c4cbf40e44b5b1fbf7ea76aff581
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/__support/threads/linux/CMakeLists.txt
Log Message:
-----------
[libc] set -Wno-frame-address for thread.cpp (#77140)
The aarch64 code is using __builtin_return_address with a non-zero
parameter,
which generates the following warning:
llvm-project/libc/src/__support/threads/linux/thread.cpp:171:38: error:
calling '__builtin_frame_address' with a nonzero argument is unsafe
[-Werror,-Wframe-address]
171 | return reinterpret_cast<uintptr_t>(__builtin_frame_address(1));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
Disable this diagnostic just for this file so that we can enable
-Werror.
Fixes: #77007
Commit: 0e7199cf3d08c83d18549c9cd083e9fec6e9db54
https://github.com/llvm/llvm-project/commit/0e7199cf3d08c83d18549c9cd083e9fec6e9db54
Author: arpilipe <apilipenko at azul.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/test/Other/print-at-pass-number.ll
Log Message:
-----------
Replace print-at-pass-number cl::opt with print-before-pass-number (#76211)
The existing option prints the IR after the pass, but it's not clear
from its name. In this patch I change the option to print the IR before
the pass and change the name to make the behavior clear.
Printing the IR before the pass is slightly simpler than after as I
don't need to worry about printAfterPassInvalidated case. Either before
or after the pass would be ok for the original use case this option was
introduced for.
Commit: c68a9d25e99a096f6862fc4b57dd380a21245d31
https://github.com/llvm/llvm-project/commit/c68a9d25e99a096f6862fc4b57dd380a21245d31
Author: Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[ASan][libc++] String annotations optimizations fix with lambda (#76200)
This commit addresses optimization and instrumentation challenges
encountered within comma constructors.
1) _LIBCPP_STRING_INTERNAL_MEMORY_ACCESS does not work in comma
constructors.
2) Code inside comma constructors is not always correctly optimized.
Problematic code examples:
- `: __r_(((__str.__is_long() ? 0 : (__str.__annotate_delete(), 0)),
std::move(__str.__r_))) {`
- `: __r_(__r_([&](){ if(!__s.__is_long()) __s.__annotate_delete();
return std::move(__s.__r_);}())) {`
However, lambda with argument seems to be correctly optimized. The patch employs this.
Use of lambda based on an idea from @ldionne.
Commit: c52b467875e26d5d3554514489d965eda3ab0cd2
https://github.com/llvm/llvm-project/commit/c52b467875e26d5d3554514489d965eda3ab0cd2
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/docs/dev/code_style.rst
Log Message:
-----------
Reapply "[libc] build with -Werror (#73966)" (#74506)
This reverts commit 6886a52d6dbefff77f33de12ff85d654e2557f81.
Most of the errors observed in postsubmit have been addressed. We can
fix-forward the remaining ones.
Link: https://lab.llvm.org/buildbot/#/changes/117129
Commit: f3f66773117259185b76574de9385e25e3902658
https://github.com/llvm/llvm-project/commit/f3f66773117259185b76574de9385e25e3902658
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/combine-bextr.ll
Log Message:
-----------
[X86] combine-bextr.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
Commit: 61dcfaa745e22b0e5330fc82ee4b7de4b6c99ab7
https://github.com/llvm/llvm-project/commit/61dcfaa745e22b0e5330fc82ee4b7de4b6c99ab7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/i64-mem-copy.ll
Log Message:
-----------
[X86] i64-mem-copy.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
Commit: 8bd16789ff0af00270936c4536dd18b48e4d3897
https://github.com/llvm/llvm-project/commit/8bd16789ff0af00270936c4536dd18b48e4d3897
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/lea-2.ll
Log Message:
-----------
[X86] lea-2.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only (although in this case the gnux32 tests share the X64 checks)
Commit: 635f6d384596950e73b2485842c587a2954c655f
https://github.com/llvm/llvm-project/commit/635f6d384596950e73b2485842c587a2954c655f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/inline-sse.ll
Log Message:
-----------
[X86] inline-sse.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Commit: 9632f987161b4efeb8c087f19a3eb4f7c69cc920
https://github.com/llvm/llvm-project/commit/9632f987161b4efeb8c087f19a3eb4f7c69cc920
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/legalize-shl-vec.ll
Log Message:
-----------
[X86] legalize-shl-vec.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
Commit: fbfc9cb7ea756ea645cc55eea478b819573fc7a5
https://github.com/llvm/llvm-project/commit/fbfc9cb7ea756ea645cc55eea478b819573fc7a5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-mmx.ll
Log Message:
-----------
[X86] vector-shuffle-mmx.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
Commit: 52ebf61bac9d17a960908fe0c5e75dea76de165a
https://github.com/llvm/llvm-project/commit/52ebf61bac9d17a960908fe0c5e75dea76de165a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/ftrunc.ll
Log Message:
-----------
[X86] ftrunc.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add common AVX check prefix for 32/64 bit test coverage
Commit: a14650572c2752c0e08a66ce94c43578abf378f8
https://github.com/llvm/llvm-project/commit/a14650572c2752c0e08a66ce94c43578abf378f8
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaInit.cpp
Log Message:
-----------
[Sema] Clean up -Wc++11-narrowing-const-reference code after #76094. NFC (#77278)
Commit: 61968286f9a39815040b0d94299c3732834661bf
https://github.com/llvm/llvm-project/commit/61968286f9a39815040b0d94299c3732834661bf
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M polly/lib/Transform/ScheduleOptimizer.cpp
A polly/test/ScheduleOptimizer/schedule_computeout.ll
Log Message:
-----------
[polly][ScheduleOptimizer] Reland Fix long compile time(hang) reported in polly (#77280)
There is no upper cap set on current Schedule Optimizer to compute
schedule. In some cases a very long compile time taken to compute the
schedule resulting in hang kind of behavior. This patch introduces a
flag 'polly-schedule-computeout' to pass the capwhich is initialized to
300000. This patch handles the compute out cases by bailing out and
exiting gracefully.
Fixed the test that failed in previous commit.
Fixes #69090
Commit: de15c5501903a5a52dcae976e40b8b1f6a838911
https://github.com/llvm/llvm-project/commit/de15c5501903a5a52dcae976e40b8b1f6a838911
Author: Craig Hesling <craig at hesling.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M .github/workflows/llvm-project-tests.yml
Log Message:
-----------
Revert "[GitHub] Fix slow sccache install on macOS by upgrading macOS version (#77165)" (#77270)
This reverts commit 602c8fa2d8da6562e4f36df3bd63c26a4c7461e7, due to an
sccache issue seen on larger builds using macOS-12 runners.
The issue is documented in in the following issue:
https://github.com/hendrikmuhs/ccache-action/issues/174
The original PR is the following:
https://github.com/llvm/llvm-project/pull/77165
Commit: 5351ded68d579921a61b26a34e36046c22f668bd
https://github.com/llvm/llvm-project/commit/5351ded68d579921a61b26a34e36046c22f668bd
Author: Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxx/include/sstream
Log Message:
-----------
[libc++] Remove usage of internal string function in sstream (#75858)
This function replaces a call to `__move_assign` (internal function)
with two calls to public member functions (`resize` and `erase`). The
order of calls is chosen for the best performance.
This change is required to [turn on ASan string annotations for short
strings](https://github.com/llvm/llvm-project/pull/75882) (Short String
Optimization - SSO).
The `std::basic_string` class's `void __move_assign(basic_string&&
__str, size_type __pos, size_type __len)` function operates on
uninitialized strings, where it is reasonable to assume that the memory
is not poisoned. However, in `sstream` this function is applied to
existing strings that already have poisoned memory.
String ASan annotations turned on here:
https://github.com/llvm/llvm-project/pull/72677
Commit: d460c1de3b989cea919b9d60c21644f28f987950
https://github.com/llvm/llvm-project/commit/d460c1de3b989cea919b9d60c21644f28f987950
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/vselect-ext.ll
M llvm/test/CodeGen/SystemZ/vec-perm-14.ll
M llvm/test/CodeGen/X86/test-shrink-bug.ll
M llvm/test/CodeGen/X86/vec_setcc.ll
Log Message:
-----------
[DAG] SimplifyDemandedBits - don't fold sext(x) -> aext(x) if we lose an 0/-1 allsignbits mask (#77296)
For targets that use 0/-1 boolean results, we want to keep this pattern through extensions/truncations as much as possible - so avoid simplifying to any_extend even if we don't demand the upper bits.
Noticed in triage for https://reviews.llvm.org/D152928
Commit: 4c66180e46eaed0cd6aa37102a1e3b37cc9d85fa
https://github.com/llvm/llvm-project/commit/4c66180e46eaed0cd6aa37102a1e3b37cc9d85fa
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
Log Message:
-----------
[RISCV] Use COPY to create artificial 64-bit uses in RISCVOptWInstrs's tests
In reflection of 4dd5d967975fa8d52b8c60596d892d9dd5615809, we can now
use COPY to physical registers to create artificial 64-bit uses to
prevent RISCVOptWInstrs from optimizing away sext in absent of the
IsSignExtendingOpW flag.
NFCI.
Commit: c1023c585de2629911a529cdf32490b99df83345
https://github.com/llvm/llvm-project/commit/c1023c585de2629911a529cdf32490b99df83345
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/__support/HashTable/generic/bitmask_impl.inc
M libc/src/__support/HashTable/table.h
Log Message:
-----------
[libc] fix -Wmissing-braces (#77345)
Fixes the following errors observed on the aarch64 fullbuild:
/home/libc-buildbot/libc-aarch64-ubuntu/libc-aarch64-ubuntu-fullbuild-dbg/llvm-project/libc/src/__support/HashTable/generic/bitmask_impl.inc:116:13:
error: suggest braces around initialization of subobject
[-Werror,-Wmissing-braces]
return {static_cast<bitmask_t>(mask_available().word ^
repeat_byte(0x80))};
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{ }
In file included from
/home/libc-buildbot/libc-aarch64-ubuntu/libc-aarch64-ubuntu-fullbuild-dbg/llvm-project/libc/src/search/hdestroy.cpp:10:
/home/libc-buildbot/libc-aarch64-ubuntu/libc-aarch64-ubuntu-fullbuild-dbg/llvm-project/libc/src/__support/HashTable/table.h:336:41:
error: suggest braces around initialization of subobject
[-Werror,-Wmissing-braces]
iterator end() const { return {0, 0, {0}, *this}; }
^
{}
Link:
https://lab.llvm.org/buildbot/#/builders/223/builds/33868/steps/6/logs/stdio
Link: https://github.com/llvm/llvm-project/pull/74506
Commit: eb42868f25665ba6301a94a30e9df33e0d6ae61f
https://github.com/llvm/llvm-project/commit/eb42868f25665ba6301a94a30e9df33e0d6ae61f
Author: Billy Zhu <billyzhu at modular.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/test/Transforms/canonicalize.mlir
Log Message:
-----------
[MLIR] Handle materializeConstant failure in GreedyPatternRewriteDriver (#77258)
Make GreedyPatternRewriteDriver handle failures of `materializeConstant`
gracefully. Previously it was not checking whether the returned op was
null and crashing. This PR handles it similarly to how OperationFolder
does it.
Commit: 07d6fbf8d80083470b4371f2ddabd656a9c317e6
https://github.com/llvm/llvm-project/commit/07d6fbf8d80083470b4371f2ddabd656a9c317e6
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
Log Message:
-----------
[lldb][NFCI] Remove BreakpointIDList::InsertStringArray (#77161)
This abstraction is leaky and BreakpointIDList does not need to know
about CommandReturnObject.
Additionally, setting the CommandReturnObject inout param to a success
state does very little. The function returns immediately if the input
ArrayRef is empty, and reading
CommandObjectMultiwordBreakpoint::VerifyIDs more closely, the input is
always empty if the previous call to
BreakpointIDList::FindAndReplaceIDRanges failed. If the call was
successful, then the CommandReturnObject is already in a success state.
I have opted to remove the function altogether and inline the
functionality where it was used.
Commit: 5cbf74b012c10e9cc841a27cd5d7335e556f47dd
https://github.com/llvm/llvm-project/commit/5cbf74b012c10e9cc841a27cd5d7335e556f47dd
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/source/Breakpoint/BreakpointIDList.cpp
Log Message:
-----------
[lldb][NFCI] Change return type of BreakpointIDList::GetBreakpointIDAtIndex (#77166)
There are 2 motivations here:
1.) There is no need to hand out constant references to BreakpointIDs,
they are only 8 bytes big. In addition, every use of this method already
makes a copy anyway.
2.) Each BreakpointIDList held onto an invalid BreakpointID specifically
to
prevent lifetime issues. Returning a value means you can return an
invalid BreakpointID instead of needing to allocate storage for an
invalid BreakpointID.
Commit: 478ec63312582c24c8d6ecab280da2380137c0b7
https://github.com/llvm/llvm-project/commit/478ec63312582c24c8d6ecab280da2380137c0b7
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
Log Message:
-----------
[RISCV] Mark VFIRST and VCPOP as SignExtendingOpW (#77022)
Since their values are small enough ([-1, 65535] & [0, 65535],
respectively) to fit into signed 32 bits, any sext (or downcasting +
sext) will be redundnat. Hence marking them as SignExtendingOpW.
Commit: f4bc70e886f2eb1b646d84871b93897db749c826
https://github.com/llvm/llvm-project/commit/f4bc70e886f2eb1b646d84871b93897db749c826
Author: Juergen Ributzka <juergen at ributzka.de>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Lex/ModuleMap.cpp
R clang/test/Modules/Inputs/AutolinkTBD.framework/AutolinkTBD.tbd
R clang/test/Modules/Inputs/AutolinkTBD.framework/Headers/AutolinkTBD.h
R clang/test/Modules/autolinkTBD.m
A clang/test/Modules/autolink_private_module.m
Log Message:
-----------
[clang][modules] Remove `_Private` suffix from framework auto-link hints. (#77120)
- [clang][modules] Remove no longer needed autolink test for TBD files.
- [clang][modules] Remove `_Private` suffix from framework auto-link
hints.
Commit: 23e03a85dc665c784c8b77d429f0f0e2e6d0c2fe
https://github.com/llvm/llvm-project/commit/23e03a85dc665c784c8b77d429f0f0e2e6d0c2fe
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M bolt/test/RISCV/relax.s
Log Message:
-----------
[BOLT] Update test case after #77253
PR #77253 removed the '@plt' suffix from callee symbols. Update
RISCV/relax.s accordingly.
Commit: daa4728deed3d222ff163cfb963321938549ddf1
https://github.com/llvm/llvm-project/commit/daa4728deed3d222ff163cfb963321938549ddf1
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
Log Message:
-----------
[AMDGPU] Add CodeGen support for GFX12 s_mul_u64 (#75825)
Commit: e7655ad605d77e206ec94b2cef59c41a508edba7
https://github.com/llvm/llvm-project/commit/e7655ad605d77e206ec94b2cef59c41a508edba7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/amdgpu/CMakeLists.txt
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[Libomptarget] Remove unnecessary CMake definition of endiannness (#77205)
Summary:
This is needed for some definition in `hsa.h` that requires this to be
set for some architectures when it fails at autodetection. We only
really build `libomptarget` with `gcc` and `clang` which already provide
their own way of detecting this. Remove the unnecessary define and move
it into the source.
Commit: 7173ae99c0e1b13536a8492335c595f8aaee4267
https://github.com/llvm/llvm-project/commit/7173ae99c0e1b13536a8492335c595f8aaee4267
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/SnippetRepetitor.cpp
Log Message:
-----------
[llvm-exegesis] Align loop MBB in loop repetitor (#77264)
This patch sets the alignment of the loob MBB in the loop repetitor to
16 to avoid instruction fetch/predecoding bottlenecks that can come up
with unaligned code. The value of 16 was chosen based on numbers for
recent Intel microarchitectures and reccomendations from Agner Fog.
Fixes #77259.
Commit: eea627e3e3c423149cd2cd46cb6309b8d303e8bd
https://github.com/llvm/llvm-project/commit/eea627e3e3c423149cd2cd46cb6309b8d303e8bd
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M compiler-rt/lib/msan/msan.h
M compiler-rt/lib/msan/msan_allocator.cpp
Log Message:
-----------
[NFC][msan] Switch allocator interface to use BufferedStackTrace (#77363)
We will need it to unwind for fatal errors.
Commit: e72c71671e044aa30ca35bed9e20da771ae216b5
https://github.com/llvm/llvm-project/commit/e72c71671e044aa30ca35bed9e20da771ae216b5
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/AccelTable.h
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
Log Message:
-----------
[AccelTable][nfc] Add helper function to cast AccelTableData (#77100)
Specializations of AccelTableBase are always interested in accessing the
derived versions of their data classes (e.g. DWARF5AccelTableData). They
do so by sprinkling `static_casts` all over the code.
This commit adds a helper function to simplify this process, reducinng
the number of casts that have to be made in the middle of code, making
it easier to read.
Commit: 87f67c2599410786ea3600d388fd1d2df13e60af
https://github.com/llvm/llvm-project/commit/87f67c2599410786ea3600d388fd1d2df13e60af
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
Log Message:
-----------
[OpenACC] Implement 'self' clause parsing
The 'self' clause takes an optional 'condition' expression, same as the
non-optional expression taken by the 'if' clause. This patch extracts
the 'condition' expression to a separate function, and implements the
'optional parens' infrastructure for clauses, then implements 'self'
parsing.
Commit: 22a73e7c4616e0405db85598c049a7ca70cca7cc
https://github.com/llvm/llvm-project/commit/22a73e7c4616e0405db85598c049a7ca70cca7cc
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/include/Shared/PluginAPI.h
M openmp/libomptarget/include/Shared/PluginAPI.inc
M openmp/libomptarget/include/Shared/Requirements.h
M openmp/libomptarget/include/device.h
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/amdgpu/utils/UtilitiesRTL.h
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/src/OpenMP/Mapping.cpp
M openmp/libomptarget/src/PluginManager.cpp
M openmp/libomptarget/src/device.cpp
A openmp/libomptarget/test/mapping/auto_zero_copy.cpp
Log Message:
-----------
[OpenMP][libomptarget] Enable automatic unified shared memory executi… (#75999)
…on (zero-copy) on MI300A.
This patch enables applications that did not request OpenMP
unified_shared_memory to run with the same zero-copy behavior, where
mapped memory does not result in extra memory allocations and memory
copies, but CPU-allocated memory is accessed from the device. The name
for this behavior is "automatic zero-copy" and it relies on detecting:
that the runtime is running on a MI300A, that the user did not select
unified_shared_memory in their program, and that XNACK (unified memory
support) is enabled in the current GPU configuration. If all these
conditions are met, then automatic zero-copy is triggered.
This patch is still missing support for global variables, which will be
provided in a subsequent patch.
Co-authored-by: Thorsten Blass <thorsten.blass at amd.com>
Commit: 6684a09ca84b44f320052a77cb01cb4216e6511b
https://github.com/llvm/llvm-project/commit/6684a09ca84b44f320052a77cb01cb4216e6511b
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Gnu.cpp
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtbegin.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtend.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crti.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtn.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtbegin.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtend.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crti.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtn.o
A clang/test/Driver/gcc-triple.cpp
Log Message:
-----------
[Driver] Add the --gcc-triple option (#73214)
When --gcc-triple is used, the driver will search for the 'best' gcc
installation that has the given triple. This is useful for distributions
that want clang to use a specific gcc triple, but do not want to pin to
a specific version as would be required by using --gcc-install-dir.
Having clang linked to a specific gcc version can cause clang to stop
working when the version of gcc installed on the system gets updated.
Commit: ce4144406c94c3b9cf44bcf2997bae80debc6681
https://github.com/llvm/llvm-project/commit/ce4144406c94c3b9cf44bcf2997bae80debc6681
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/include/Shared/PluginAPI.h
M openmp/libomptarget/include/Shared/PluginAPI.inc
M openmp/libomptarget/include/Shared/Requirements.h
M openmp/libomptarget/include/device.h
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/amdgpu/utils/UtilitiesRTL.h
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/src/OpenMP/Mapping.cpp
M openmp/libomptarget/src/PluginManager.cpp
M openmp/libomptarget/src/device.cpp
R openmp/libomptarget/test/mapping/auto_zero_copy.cpp
Log Message:
-----------
Revert "[OpenMP][libomptarget] Enable automatic unified shared memory executi…" (#77371)
Reverts llvm/llvm-project#75999
lit test is failing.
Commit: ce1305a3cea42dad8dd6ee5606dd4259e8632953
https://github.com/llvm/llvm-project/commit/ce1305a3cea42dad8dd6ee5606dd4259e8632953
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/include/llvm-libc-types/off_t.h
Log Message:
-----------
[libc] make off_t 32b for 32b arm (#77350)
Fixes the following diagnostic:
llvm-project/libc/src/sys/mman/linux/mmap.cpp:44:59: error: implicit
conversion loses integer precision: 'off_t' (aka 'long long') to 'long'
[-Werror,-Wshorten-64-to-32]
size, prot, flags, fd, offset);
^~~~~~
It looks like off_t is a curious types on different platforms. FWICT,
it's 32b
on arm (at least for arm-linux-gnueabi) but 64b elsewhere (including 32b
riscv32-linux-gnu).
Commit: 4435ced94998c00a6589c3500822015b6341c9e3
https://github.com/llvm/llvm-project/commit/4435ced94998c00a6589c3500822015b6341c9e3
Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterface.cpp
Log Message:
-----------
[mlir][TilingInterface] Allow controlling what fusion is done within tile and fuse (#76871)
Currently the `tileConsumerAndFuseProducerGreedilyUsingSCFFor` method
greedily fuses through all slices that are generated during the tile and
fuse flow. That is not the normal use case. Ideally the caller would
like to control which slices get fused and which dont. This patch
introduces a new field to the `SCFTileAndFuseOptions` to specify this
control.
The contol function also allows the caller to specify if the replacement
for the fused producer needs to be yielded from within the tiled
computation. This allows replacing the fused producers in case they have
other uses. Without this the original producers still survive negating
the utility of the fusion.
The change here also means that the name of the function
`tileConsumerAndFuseProducerGreedily...` can be updated. Defering that
to a later stage to reduce the churn of API changes.
Commit: 7ab64b3266c580f946b3b65992030c3f68cbe392
https://github.com/llvm/llvm-project/commit/7ab64b3266c580f946b3b65992030c3f68cbe392
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Remove tab character from RISCVRegisterInfo.td. NFC
Commit: 09e32ab75076a1f2270d37343922c86c12bdd047
https://github.com/llvm/llvm-project/commit/09e32ab75076a1f2270d37343922c86c12bdd047
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/include/lldb/API/SBBreakpoint.h
Log Message:
-----------
[lldb] Deprecate SBBreakpoint::AddName in favor of AddNameWithErrorHandling (#71228)
AddName gives no feedback other than if it succeeded whereas
AddNameWithErrorHandling gives you back an SBError object. I would like
to mark AddName as deprecated and direct folks to use
AddNameWithErorrHandling instead.
---------
Co-authored-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 16b8a0dc6885dea0882887a6e642a504fd1e193c
https://github.com/llvm/llvm-project/commit/16b8a0dc6885dea0882887a6e642a504fd1e193c
Author: Alex Langford <alangford at apple.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lldb/include/lldb/Utility/StructuredData.h
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] Change interface of StructuredData::Array::GetItemAtIndexAsInteger (#71993)
This is a follow-up to (#71613) and (#71961).
Commit: f700d748f0447b6a761eb9d42575b28e0af98708
https://github.com/llvm/llvm-project/commit/f700d748f0447b6a761eb9d42575b28e0af98708
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/__support/HashTable/sse2/bitmask_impl.inc
Log Message:
-----------
[libc] fix more -Wmissing-brace (#77382)
Similar to #77345, the buildbots are observing similar warnings for the
sse2
implementation.
llvm-project/libc/src/__support/HashTable/sse2/bitmask_impl.inc:36:13:
error: suggest braces around initialization of subobject
[-Werror,-Wmissing-braces]
return {bitmask};
^~~~~~~
{ }
llvm-project/libc/src/__support/HashTable/sse2/bitmask_impl.inc:45:13:
error: suggest braces around initialization of subobject
[-Werror,-Wmissing-braces]
return {static_cast<uint16_t>(~mask_available().word)};
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
{ }
Link:
https://lab.llvm.org/buildbot/#/builders/163/builds/49350/steps/8/logs/stdio
Link: https://github.com/llvm/llvm-project/pull/74506
Commit: f84bfa2f92d2aa3329bc06902a12c0f4c54d7297
https://github.com/llvm/llvm-project/commit/f84bfa2f92d2aa3329bc06902a12c0f4c54d7297
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lld/MinGW/Options.td
Log Message:
-----------
[LLD] [MinGW] Sync --thinlto-cache-dir option details with ELF (#77010)
Disallow using the form with a separate argument,
"--thinlto-cache-dir dir", allow only the one with equals,
"--thintlo-cache-dir=dir". This is the only form that actually was
tested when this was added in
f794808bb9ec06966a67fe33d41a13b9601768f8, and matches the ELF side,
where only the form with an equals is supported (and this was also the
case at the time when this option was added to the MinGW linker).
Commit: b2ea9ec7fcf37ca01979c11c5b2b1cab0e1ae212
https://github.com/llvm/llvm-project/commit/b2ea9ec7fcf37ca01979c11c5b2b1cab0e1ae212
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/CommandLine.rst
M llvm/lib/Support/CommandLine.cpp
M llvm/test/tools/llvm-debuginfo-analyzer/cmdline.test
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
[CommandLine] Do not print empty categories with '--help-hidden' (#77043)
If a category has no options associated with it, the `--help-hidden`
command still shows that category with the annotation "This option
category has no options", and this is how it was implemented from the
beginning when the categories were introduced, see commit 0537a98878. A
feature to hide unrelated options was added later, in
https://reviews.llvm.org/D7100. Now, if a tool needs to hide unrelated
options that are associated with categories, leaving some of them empty,
those categories will still be visible on the `--help-hidden` output,
even if they have no use for the tool; see the changes in
`llvm/test/tools/llvm-debuginfo-analyzer/cmdline.test` for an example.
The patch ensures that only categories with options are shown on both
main and hidden help output.
Commit: d5f84e6121f0d0cc8984dccc1774ce9ddb7168c4
https://github.com/llvm/llvm-project/commit/d5f84e6121f0d0cc8984dccc1774ce9ddb7168c4
Author: Iain Sandoe <iain at sandoe.co.uk>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libcxxabi/src/private_typeinfo.cpp
M libcxxabi/src/private_typeinfo.h
A libcxxabi/test/catch_null_pointer_to_object_pr64953.pass.cpp
Log Message:
-----------
[libc++abi] Handle catch null pointer-to-object (#68076)
This addresses cases (currently failing) where we throw a null
pointer-to-object and fixes #64953.
We are trying to satisfy the following bullet from the C++ ABI 15.3:
* the handler is of type cv1 T* cv2 and E is a pointer type that can be
converted to the type of the handler by either or both of:
- a standard pointer conversion (4.10 [conv.ptr]) not involving
conversions to private or protected or ambiguous classes.
- a qualification conversion.
The existing implementation assesses the ambiguity of bases by computing
the offsets to them; ambiguous cases are then when the same base appears
at different offsets. The computation of offset includes indirecting
through the vtables to find the offsets to virtual bases.
When the thrown pointer points to a real object, this is quite efficient
since, if the base is found, and it is not ambiguous and on a public
path, the offset is needed to return the adjusted pointer (and the
indirections are not particularly expensive to compute).
However, when we throw a null pointer-to-object, this scheme is no
longer applicable (and the code currently bypasses the relevant
computations, leading to the incorrect catches reported in the issue).
-----
The solution proposed here takes a composite approach:
1. When the pointer-to-object points to a real instance (well, at least,
it is determined to be non-null), we use the existing scheme.
2. When the pointer-to-object is null:
* We note that there is no real object.
* When we are processing non-virtual bases, we continue to compute the
offsets, but for a notional dummy object based at 0. This is OK, since
we never need to access the object content for non-virtual bases.
* When we are processing a path with one or more virtual bases, we
remember a cookie corresponding to the inner-most virtual base found so
far (and set the notional offset to 0). Offsets to inner non-virtual
bases are then computed as normal.
A base is then ambiguous iff:
* There is a recorded virtual base cookie and that is different from the
current one or,
* The non-virtual base offsets differ.
When a handler for a pointer succeeds in catching a base pointer for a
thrown null pointer-to-object, we still return a nullptr (so the
adjustment to the pointer is not required and need not be computed).
Since we noted that there was no object when starting the search for
ambiguous bases, we know that we can skip the pointer adjustment.
This was originally uploaded as https://reviews.llvm.org/D158769.
Fixes #64953
Commit: 0fe86f9c518fb1296bba8d66ce495f9dfff2c435
https://github.com/llvm/llvm-project/commit/0fe86f9c518fb1296bba8d66ce495f9dfff2c435
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M openmp/libomptarget/include/DeviceImage.h
M openmp/libomptarget/include/OffloadEntry.h
M openmp/libomptarget/include/device.h
M openmp/libomptarget/src/DeviceImage.cpp
M openmp/libomptarget/src/PluginManager.cpp
M openmp/libomptarget/src/device.cpp
Log Message:
-----------
[Libomptarget] Remove extra cache for offloading entries (#77012)
Summary:
The offloading entries right now are assumed to be baked into the binary
itself, and thus always valid whenever the library is executing. This
means that we don't need to copy them to additional storage and can
instead simply pass around references to it.
This is not likely to change in the expected operation of the OpenMP
library. Additionally, the indirection for the offload entry struct is
simply two pointers, so moving it by value is trivial.
Commit: 6e90f13cc9bc9dbc5c2c248d95c6e18a5fb021b4
https://github.com/llvm/llvm-project/commit/6e90f13cc9bc9dbc5c2c248d95c6e18a5fb021b4
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/GPUToSPIRV/GPUToSPIRV.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCooperativeMatrixOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRVPass.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/lib/Dialect/SPIRV/IR/CastOps.cpp
M mlir/lib/Dialect/SPIRV/IR/CooperativeMatrixOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Conversion/GPUToSPIRV/wmma-ops-to-spirv-khr-coop-matrix.mlir
R mlir/test/Conversion/GPUToSPIRV/wmma-ops-to-spirv-nv-coop-matrix.mlir
M mlir/test/Dialect/SPIRV/IR/cast-ops.mlir
M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
M mlir/test/Dialect/SPIRV/IR/khr-cooperative-matrix-ops.mlir
M mlir/test/Dialect/SPIRV/IR/matrix-ops.mlir
R mlir/test/Dialect/SPIRV/IR/nv-cooperative-matrix-ops.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Target/SPIRV/matrix.mlir
R mlir/test/Target/SPIRV/nv-cooperative-matrix-ops.mlir
Log Message:
-----------
[mlir][spirv] Drop support for SPV_NV_cooperative_matrix (#76782)
This extension has been superseded by SPV_KHR_cooperative_matrix which
is supported across major vendors GPU like Nvidia, AMD, and Intel.
Given that the KHR version has been supported for nearly half a year,
drop the NV-specific extension to reduce the maintenance burden and code
duplication.
Commit: 6eab9dd7f01e6cad9f1a93bd52e4c6e7b4c3c1fa
https://github.com/llvm/llvm-project/commit/6eab9dd7f01e6cad9f1a93bd52e4c6e7b4c3c1fa
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
Log Message:
-----------
[NVPTX] remove incorrect NVPTX intrinsic transformations (#76870)
`nvvm_fabs_f`
`nvvm_fabs_ftz_f`
Unfortunately, llvm fabs is not equivalent to these intrinsics since
llvm fabs is defined to only set the sign bit to zero while these can
also flush subnormal inputs and modify NaNs.
`nvvm_round_d`
`nvvm_round_f`
`nvvm_round_ftz_f`
llvm.nvvm.round uses RNI, while llvm.round codegens to RZI. LLVM defines
llvm.round to use the same rounding as libm
`round[f]()`, which is not necessary the same as how we define
llvm.nvvm.round.
`nvvm_sqrt_rn_f`
`nvvm_sqrt_rn_ftz_f`
sqrt may be lowered to a less precise version of sqrt, such as
sqrt.approx in NVPTX depending on factors such as the value of
-nvptx-prec-sqrtf32. These intrinsics should always become the
corresponding NVPTX instructions.
`nvvm_add_rn_d`
`nvvm_add_rn_f`
`nvvm_add_rn_ftz_f`
`nvvm_mul_rn_d`
`nvvm_mul_rn_f`
`nvvm_mul_rn_ftz_f`
These nvvm intrinsics have an explicitly specified rounding mode (.rn).
They should always be lowered to a PTX instruction with the same
explicit rounding mode. Converting to fmul and fadd instructions result
in the PTX instructions without rounding modes specified. This can cause
issue because:
> An add [or mul] instruction with no rounding modifier defaults to
round-to-nearest-even and may be optimized aggressively by the code
optimizer. In particular, mul/add sequences with no rounding modifiers
may be optimized to use fused-multiply-add instructions on the target
device.
`nvvm_div_rn_f`
`nvvm_div_rn_ftz_f`
`nvvm_rcp_rn_f`
`nvvm_rcp_rn_ftz_f`
fdiv may be lowered to a less precise version of div, such as div.full
in NVPTX depending on factors such as the value of -nvptx-prec-divf32.
These intrinsics should always become the corresponding NVPTX
instructions.
Commit: f5145f4dc819d73ff8bebcfba3779533b150884e
https://github.com/llvm/llvm-project/commit/f5145f4dc819d73ff8bebcfba3779533b150884e
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/CFG.h
Log Message:
-----------
[Clang][NFC] Fix out-of-bounds access (#77193)
The changes to tablegen made by
https://github.com/llvm/llvm-project/pull/76825 result in
`StmtClass::lastStmtConstant` changing from `StmtClass::WhileStmtClass`
to `StmtClass::GCCAsmStmtClass`. Since `CFG::BuildOptions::alwaysAdd` is
never called with a `WhileStmt`, this has flown under the radar until
now.
Once such test in which an out-of-bounds access occurs is
`test/Sema/inline-asm-validate.c`, among many others.
Commit: faa326de97bf6119dcc42806b07f3523c521ae96
https://github.com/llvm/llvm-project/commit/faa326de97bf6119dcc42806b07f3523c521ae96
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
A llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
Log Message:
-----------
[RISCV] Add branch+c.mv macrofusion for sifive-p450. (#76169)
sifive-p450 supports a very restricted version of the short forward
branch optimization from the sifive-7-series.
For sifive-p450, a branch over a single c.mv can be macrofused as a
conditional move operation. Due to encoding restrictions on c.mv, we
can't conditionally move from X0. That would require c.li instead.
Commit: 1ea7a56057492d9da1124787a9855cc2edca7df9
https://github.com/llvm/llvm-project/commit/1ea7a56057492d9da1124787a9855cc2edca7df9
Author: Advenam Tacet <advenam.tacet at trailofbits.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
Revert "[ASan][libc++] String annotations optimizations fix with lambda (#76200)"
This reverts commit c68a9d25e99a096f6862fc4b57dd380a21245d31.
Commit: ac8b4f874945f83eec8c8f56d9fc80093e02a7b2
https://github.com/llvm/llvm-project/commit/ac8b4f874945f83eec8c8f56d9fc80093e02a7b2
Author: Usman Nadeem <mnadeem at quicinc.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve2-bcax.ll
Log Message:
-----------
[AArch64][SVE2] Add pattern for BCAX (#77159)
Bitwise clear and exclusive or
Add pattern for:
xor x, (and y, not(z)) -> bcax x, y, z
Commit: a0ae5258065a856d5f8d9f8dcb12e9d8394f789f
https://github.com/llvm/llvm-project/commit/a0ae5258065a856d5f8d9f8dcb12e9d8394f789f
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy]unused using decls only check cpp files (#77335)
Commit: 6958986f77bdbedd6ba571af7b546018f9108067
https://github.com/llvm/llvm-project/commit/6958986f77bdbedd6ba571af7b546018f9108067
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/string/memory_utils/op_x86.h
Log Message:
-----------
[libc] fix -Wconversion (#77384)
Fixes the following from GCC:
llvm-project/libc/src/string/memory_utils/op_x86.h:236:24: error:
conversion from ‘long unsigned int’ to ‘uint32_t’ {aka ‘unsigned int’}
may
change value [-Werror=conversion]
236 | return (xored >> 32) | (xored & 0xFFFFFFFF);
| ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~
Link:
https://lab.llvm.org/buildbot/#/builders/250/builds/16236/steps/8/logs/stdio
Link: https://github.com/llvm/llvm-project/pull/74506
Commit: 7c89b20e02ff079ec84fc54880dbc6c063d8c915
https://github.com/llvm/llvm-project/commit/7c89b20e02ff079ec84fc54880dbc6c063d8c915
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lld/ELF/ScriptParser.cpp
M lld/test/ELF/linkerscript/overlay.test
Log Message:
-----------
[ELF] OVERLAY: support optional start address and LMA
https://reviews.llvm.org/D44780 implemented rudimentary support for
OVERLAY. The start address and `AT(ldaddr)` in `OVERLAY [start] :
[NOCROSSREFS] [AT ( ldaddr )]` are not optional.
In addition, there are two issues:
* When the start address is `.`, subsequent sections don't share the
address of the first overlay section.
* When the first overlay section is empty and discardable, `p_paddr` is
incorrectly zero. This is because a discarded section has a zero
address, causing `prev->getLMA() + prev->size` where `prev` refers to
the first section to evaluate to zero.
This patch supports optional start address and LMA and fix the issues.
Close #77265
Pull Request: https://github.com/llvm/llvm-project/pull/77272
Commit: 1689bbea17683129f41246110af1ebd32b98362f
https://github.com/llvm/llvm-project/commit/1689bbea17683129f41246110af1ebd32b98362f
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/string/memory_utils/op_x86.h
Log Message:
-----------
[libc] fix up #77384
Commit: 70cea91e0fc93db618069588e6a06314b2b0e2d3
https://github.com/llvm/llvm-project/commit/70cea91e0fc93db618069588e6a06314b2b0e2d3
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M libc/src/sys/mman/linux/CMakeLists.txt
Log Message:
-----------
[libc] temporarily set -Wno-shorten-64-to-32 (#77396)
This is still broken after #77350. Disable the warning for now, and fix
properly once the buildbot it back to green.
Link: https://github.com/llvm/llvm-project/issues/77395
Commit: eee71ed3f7d0abe40f7c54166421421362a8ac46
https://github.com/llvm/llvm-project/commit/eee71ed3f7d0abe40f7c54166421421362a8ac46
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Log Message:
-----------
[mlir][complex] Support Fastmath flag for complex.mulf (#74554)
Support fast math flag in the conversion of `complex.mulf` op to
standard dialect.
See:
https://discourse.llvm.org/t/rfc-fastmath-flags-support-in-complex-dialect/71981
Commit: 4147b72301bf77ad63793e1dcefefe8d37e69a37
https://github.com/llvm/llvm-project/commit/4147b72301bf77ad63793e1dcefefe8d37e69a37
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/cast.ll
Log Message:
-----------
[CostModel][X86] Fix fpext conversion cost for 16 elements (#76278)
The fpext conversion cost for 16 elements should be 4 from Znver4.
Commit: 8d982e509bf61fab1df58eaf3582138fc3c331b2
https://github.com/llvm/llvm-project/commit/8d982e509bf61fab1df58eaf3582138fc3c331b2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M compiler-rt/test/hwasan/TestCases/Linux/aligned_alloc-alignment.cpp
M compiler-rt/test/hwasan/TestCases/Linux/pvalloc-overflow.cpp
M compiler-rt/test/hwasan/TestCases/Posix/posix_memalign-alignment.cpp
M compiler-rt/test/hwasan/TestCases/allocator_returns_null.cpp
Log Message:
-----------
[test][hwasan] Test function name in summaries #77391 (#77397)
Push #77391 into the main.
Commit: c54a8ac35ab0fe3b7d204dc9867bf05fcb1775cd
https://github.com/llvm/llvm-project/commit/c54a8ac35ab0fe3b7d204dc9867bf05fcb1775cd
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[Sema] Use StringRef::ltrim (NFC)
Commit: 898093638043e465a9099829e32614f38cf3e1a8
https://github.com/llvm/llvm-project/commit/898093638043e465a9099829e32614f38cf3e1a8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M compiler-rt/lib/msan/msan.h
M compiler-rt/lib/msan/msan_allocator.cpp
M compiler-rt/lib/msan/msan_new_delete.cpp
M compiler-rt/test/sanitizer_common/TestCases/max_allocation_size.cpp
Log Message:
-----------
[msan] Unwind stack before fatal reports (#77168)
Msan does not unwind stack in malloc without origins, but we still need
trace
for fatal errors.
Commit: 2b3baffb4720d4ddc7ddd7080f5ea624230b9324
https://github.com/llvm/llvm-project/commit/2b3baffb4720d4ddc7ddd7080f5ea624230b9324
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/lib/Analysis/PathDiagnostic.cpp
Log Message:
-----------
[Analysis] Use StringRef::rtrim (NFC)
Commit: 7dd20637c801b429f2dd1040941d00141459d64e
https://github.com/llvm/llvm-project/commit/7dd20637c801b429f2dd1040941d00141459d64e
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/Analysis/errno-stdlibraryfunctions.c
Log Message:
-----------
Improve modeling of 'getcwd' in the StdLibraryFunctionsChecker (#77040)
1. Improve the 'errno' modeling.
2. Improve constraints of the arguments.
Commit: af1fdcc343d1c850d73f7dd47493ffb9a18d596b
https://github.com/llvm/llvm-project/commit/af1fdcc343d1c850d73f7dd47493ffb9a18d596b
Author: wangpc <wangpengcheng.pp at bytedance.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/StackMaps.rst
Log Message:
-----------
[doc][StackMaps] Fix typo
Commit: 96c4f1034cc3a93dafa9f8541548249deb813b78
https://github.com/llvm/llvm-project/commit/96c4f1034cc3a93dafa9f8541548249deb813b78
Author: Jim Lin <jim at andestech.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
Log Message:
-----------
[RISCV] Add support predicating for ANDN/ORN/XNOR with short-forward-branch-opt. (#77077)
ANDN/ORN/XNOR are like other ALU instructions. It should be able to be
predicated by the cpu that supports short-forward-branch.
Commit: b856e77b2df212d740bfedc984572d812d07ecc8
https://github.com/llvm/llvm-project/commit/b856e77b2df212d740bfedc984572d812d07ecc8
Author: James Y Knight <jyknight at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/ARC/atomic-oversize.ll
A llvm/test/CodeGen/BPF/atomic-oversize.ll
A llvm/test/CodeGen/Lanai/atomic-oversize.ll
A llvm/test/CodeGen/MSP430/atomic-oversize.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
Log Message:
-----------
Set MaxAtomicSizeInBitsSupported for remaining targets. (#75703)
Targets affected:
- NVPTX and BPF: set to 64 bits.
- ARC, Lanai, and MSP430: set to 0 (they don't implement atomics).
Those which didn't yet add AtomicExpandPass to their pass pipeline now
do so.
This will result in larger atomic operations getting expanded to
`__atomic_*` libcalls via AtomicExpandPass. On all these targets, this
now matches what Clang already does in the frontend.
The only targets which do not configure AtomicExpandPass now are:
- DirectX and SPIRV: they aren't normal backends.
- AVR: a single-cpu architecture with no privileged/user divide, which
could implement all atomics by disabling/enabling interrupts, regardless
of size/alignment. Will be addressed by future work.
Commit: a8e9dceb49a9824b9326a16acedd19dbb29add2f
https://github.com/llvm/llvm-project/commit/a8e9dceb49a9824b9326a16acedd19dbb29add2f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
Log Message:
-----------
[RISCV] Use getELen() instead of hardcoded 64 in lowerBUILD_VECTOR. (#77355)
This is needed to properly support Zve32x.
Commit: 700a1928bbc2bac557384e20efa56bc61ee64b86
https://github.com/llvm/llvm-project/commit/700a1928bbc2bac557384e20efa56bc61ee64b86
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
Log Message:
-----------
[test][sanitizer] Check summary function and a single stack frame
Commit: b43c50490c5964b3b1aa1b95a9025a5b5942a46e
https://github.com/llvm/llvm-project/commit/b43c50490c5964b3b1aa1b95a9025a5b5942a46e
Author: Justin Fargnoli <34139864+justinfargnoli at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithDialect.cpp
M mlir/lib/Dialect/Complex/IR/ComplexDialect.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/lib/Dialect/Index/IR/IndexDialect.cpp
M mlir/lib/Dialect/Math/IR/MathDialect.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefDialect.cpp
M mlir/lib/Dialect/UB/IR/UBOps.cpp
Log Message:
-----------
[mlir] Declare promised interfaces for the ConvertToLLVM extension (#76341)
This PR adds promised interface declarations for
`ConvertToLLVMPatternInterface` in all the dialects that support the
`ConvertToLLVM` dialect extension.
Promised interfaces allow a dialect to declare that it will have an
implementation of a particular interface, crashing the program if one
isn't provided when the interface is used.
Commit: 3fa17954dedd59bfad9cef1778719fb6312a5949
https://github.com/llvm/llvm-project/commit/3fa17954dedd59bfad9cef1778719fb6312a5949
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Target.h
M lld/test/ELF/riscv-reloc-leb128.s
Log Message:
-----------
[ELF] Support R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 in SHF_ALLOC sections (#77261)
Complement #72610 (non-SHF_ALLOC sections). GCC-generated
.gcc_exception_table has the SHF_ALLOC flag and may contain
R_RISCV_SET_ULEB128/R_RISCV_SUB_ULEB128 relocations.
Commit: 49c35f69ac6884a07f07e7c09ca7b79282707f49
https://github.com/llvm/llvm-project/commit/49c35f69ac6884a07f07e7c09ca7b79282707f49
Author: Brad Smith <brad at comstyle.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/tools/clang-shlib/CMakeLists.txt
M clang/tools/libclang/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
M llvm/tools/llvm-shlib/CMakeLists.txt
Log Message:
-----------
[CMake] Add support for building on illumos (#74930)
illumos has an older version of the Solaris linker that does not
support the GNU version script compat nor version scripts and does
not support -Bsymbolic-functions. Treat illumos linker separately.
The libclang/CMakeLists part lifted from NetBSD's pkgsrc.
Build tested on Solaris 11.4 and OpenIndiana 2023.10.
/usr/bin/ld --version
ld: Software Generation Utilities - Solaris Link Editors: 5.11-1.3260
ld: Software Generation Utilities - Solaris Link Editors: 5.11-1.1790 (illumos)
Commit: f6dbd4cc5f52b6d40f98cf09af22b276b8e1f289
https://github.com/llvm/llvm-project/commit/f6dbd4cc5f52b6d40f98cf09af22b276b8e1f289
Author: ZijunZhaoCCK <88353225+ZijunZhaoCCK at users.noreply.github.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/Driver.cpp
M clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
M clang/test/Driver/aarch64-fix-cortex-a53-835769.c
A clang/test/Driver/android-version.cpp
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
Make clang report invalid target versions. (#75373)
Clang always silently ignores garbage target versions and this makes
debug harder. So clang will report when target versions are invalid.
Commit: b2b4ffbc9bdda617977cbece015b8ea5ac44c531
https://github.com/llvm/llvm-project/commit/b2b4ffbc9bdda617977cbece015b8ea5ac44c531
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/test/Transforms/PGOProfile/Inputs/multiple_hash_profile.proftext
M llvm/test/Transforms/PGOProfile/multiple_hash_profile.ll
Log Message:
-----------
[Instrumentation] Remove -pgo-instr-old-cfg-hashing (#77357)
It's been more than 3 years since -pgo-instr-old-cfg-hashing was
introduced by:
commit 120e66b3418b37b95fc1dbbb23e296a602a24fa8
Author: Hiroshi Yamauchi <yamauchi at google.com>
Date: Tue Jul 28 10:09:49 2020 -0700
I don't think anyone really cares about the ability to use the old CFG
hashing at this point.
Commit: 0930f62cf600d9e2e9a45fef1b3a422d50be89d5
https://github.com/llvm/llvm-project/commit/0930f62cf600d9e2e9a45fef1b3a422d50be89d5
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M lld/ELF/LinkerScript.cpp
A lld/test/ELF/linkorder-group.test
Log Message:
-----------
[ELF] -r: fix crash when SHF_LINK_ORDER linked-to section has a larger index
Fixes: b8dface221f4490933b0d39deb769e97ca134e5f
ThinLTO asan build may place `asan_globals` before the associated `.bss.xxx` section.
`rel->getOutputSection()` is nullptr because `rel->parent` hasn't been
set, leading to a crash. Simplify return `s->name` in this case.
Commit: 782c5250077cf472941f0ab7555f87ff22d6e724
https://github.com/llvm/llvm-project/commit/782c5250077cf472941f0ab7555f87ff22d6e724
Author: SunilKuravinakop <98882378+SunilKuravinakop at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/loop_bind_messages.cpp
M clang/test/PCH/pragma-loop.cpp
Log Message:
-----------
[OpenMP] Patch for Support to loop bind clause : Checking Parent Region (#76938)
Changes uploaded to the phabricator on Dec 16th are lost because the
phabricator is down. Hence re-uploading it to the github.com.
Changes to be committed:
modified: clang/include/clang/Sema/Sema.h
modified: clang/lib/Sema/SemaOpenMP.cpp
modified: clang/test/OpenMP/generic_loop_ast_print.cpp
modified: clang/test/OpenMP/loop_bind_messages.cpp
modified: clang/test/PCH/pragma-loop.cpp
---------
Co-authored-by: Sunil Kuravinakop
Commit: abaa79b25dde740d5b54adab463432bee2840c85
https://github.com/llvm/llvm-project/commit/abaa79b25dde740d5b54adab463432bee2840c85
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M mlir/lib/Query/Matcher/Parser.cpp
M mlir/lib/Query/QueryParser.cpp
M mlir/lib/TableGen/Class.cpp
M mlir/lib/Tools/lsp-server-support/SourceMgrUtils.cpp
Log Message:
-----------
[mlir] Use StringRef::ltrim (NFC)
Commit: ee78e038667d89f5dcd5ed25a36659b3653095d0
https://github.com/llvm/llvm-project/commit/ee78e038667d89f5dcd5ed25a36659b3653095d0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Avoid instantiating PatFrag with null_frag (#77271)
This makes it possible to pass null_frag to the MAIInst multiclass.
null_frag does not work as you may hope if used as the input to a
PatFrag, which is what happens when it's passed through to *MAIFrag.
Avoid this by checking for null_frag. It might be possible to hack up
tablegen to allow consuming PatFrag inputs.
Commit: 0c24c175f262b1043752c67798cd83f79188e9d2
https://github.com/llvm/llvm-project/commit/0c24c175f262b1043752c67798cd83f79188e9d2
Author: Chia <sun1011jacobi at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
A llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
Log Message:
-----------
[RISCV][ISel] Use vaaddu with rounding mode rdn for ISD::AVGFLOORU. (#76550)
This patch aims to use `vaaddu` with rounding mode rdn (i.e `vxrm[1:0] =
0b10`) for `ISD::AVGFLOORU`.
### Source code
```
define <8 x i8> @vaaddu_auto(ptr %x, ptr %y, ptr %z) {
%xv = load <8 x i8>, ptr %x, align 2
%yv = load <8 x i8>, ptr %y, align 2
%xzv = zext <8 x i8> %xv to <8 x i16>
%yzv = zext <8 x i8> %yv to <8 x i16>
%add = add nuw nsw <8 x i16> %xzv, %yzv
%div = lshr <8 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
%ret = trunc <8 x i16> %div to <8 x i8>
ret <8 x i8> %ret
}
```
### Before this patch
```
vaaddu_auto:
vsetivli zero, 8, e8, mf2, ta, ma
vle8.v v8, (a0)
vle8.v v9, (a1)
vwaddu.vv v10, v8, v9
vnsrl.wi v8, v10, 1
ret
```
### After this patch
```
vaaddu_auto:
vsetivli zero, 8, e8, mf2, ta, ma
vle8.v v8, (a0)
vle8.v v9, (a1)
csrwi vxrm, 2
vaaddu.vv v8, v8, v9
ret
```
### Note on signed averaging addition
Based on the rvv spec, there is also a variant for signed averaging
addition called `vaadd`.
But AFAIU, no matter in which rounding mode, we cannot achieve the
semantic of signed averaging addition through `vaadd`.
Thus this patch only introduces `vaaddu`.
Commit: 38ce770ef13131dce92a76ff80e6d5caba2d8422
https://github.com/llvm/llvm-project/commit/38ce770ef13131dce92a76ff80e6d5caba2d8422
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/apx/gr8_norex2.ll
Log Message:
-----------
[X86][test] Add test to check ah is not allocatable for register class gr8_norex2
This test should be added after #73529
Commit: f1ec0d12bb0843f0deab83ef2b5cf1339cbc4f0b
https://github.com/llvm/llvm-project/commit/f1ec0d12bb0843f0deab83ef2b5cf1339cbc4f0b
Author: Nick Anderson <nickleus27 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
A llvm/include/llvm/CodeGen/CodeGenPrepare.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/lib/CodeGen/BasicBlockPathCloning.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
M llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll
M llvm/test/CodeGen/AArch64/convertphitype.ll
M llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll
M llvm/test/CodeGen/AArch64/sve-vscale.ll
M llvm/test/CodeGen/AArch64/sve2-vscale-sinking.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll
M llvm/test/CodeGen/Generic/addr-use-count.ll
M llvm/test/CodeGen/X86/callbr-codegenprepare.ll
M llvm/test/CodeGen/X86/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/CodeGen/X86/convertphitype.ll
M llvm/test/CodeGen/X86/indirect-br-gep-unmerge.ll
M llvm/test/CodeGen/X86/pr58538.ll
M llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
M llvm/test/CodeGen/X86/tailcall-extract.ll
M llvm/test/DebugInfo/ARM/salvage-debug-info.ll
M llvm/test/DebugInfo/X86/zextload.ll
M llvm/test/Other/codegenprepare-and-debug.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/sink-gather-scatter-addressing.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll
M llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll
M llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
M llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll
M llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
M llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll
M llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr72046.ll
M llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll
M llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll
M llvm/test/Transforms/CodeGenPrepare/X86/select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll
M llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll
M llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll
M llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
M llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll
M llvm/test/Transforms/HotColdSplit/coldentrycount.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll
M llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll
M llvm/tools/opt/opt.cpp
Log Message:
-----------
Port CodeGenPrepare to new pass manager (and BasicBlockSectionsProfil… (#77182)
Port CodeGenPrepare to new pass manager and dependency
BasicBlockSectionsProfileReader
Fixes: #75380
Co-authored-by: Krishna-13-cyber <84722531+Krishna-13-cyber at users.noreply.github.com>
Commit: cf6e9c4b2711fa4450c537aa381a1d693e130740
https://github.com/llvm/llvm-project/commit/cf6e9c4b2711fa4450c537aa381a1d693e130740
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-08 (Mon, 08 Jan 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[RISCV] Add documentation in the LangRef on GHC CC (#72762)
The GHC CC got added to RISCV in
a8dc2110cd4dd69212a204bc1074729f95d5402a but it never got documented in
the LangRef. This adds documentation in the LangRef noting that RISCV is
supports the GHC calling convention and notes the specific limitations
of the GHC CC on RISCV.
Commit: 4a5ebc7f6538dbebe9d671346de6138de657cb7d
https://github.com/llvm/llvm-project/commit/4a5ebc7f6538dbebe9d671346de6138de657cb7d
Author: Lu Weining <luweining at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELFRelocs/LoongArch.def
M llvm/test/tools/llvm-readobj/ELF/reloc-types-loongarch64.test
Log Message:
-----------
[BinaryFormat][LoongArch] Define psABI v2.30 relocs (#77039)
Commit: dad614cc606333fa614e696dbdd22263096dadb7
https://github.com/llvm/llvm-project/commit/dad614cc606333fa614e696dbdd22263096dadb7
Author: Hana Dusíková <hanicka at hanicka.net>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/SphinxQuickstartTemplate.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl08.rst
Log Message:
-----------
[Documentation] fix invalid links in documentation (#76502)
Commit: b57159cb19cdc06ec5733f93f0975aa6f40595cb
https://github.com/llvm/llvm-project/commit/b57159cb19cdc06ec5733f93f0975aa6f40595cb
Author: Jinyang He <hejinyang at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
A llvm/test/MC/LoongArch/Relocations/leb128.s
M llvm/test/MC/LoongArch/Relocations/relax-addsub.s
Log Message:
-----------
[LoongArch] Support R_LARCH_{ADD,SUB}_ULEB128 for .uleb128 and force relocs when sym is not in section (#76433)
1, Follow RISCV 1df5ea29 to support generates relocs for .uleb128 which
can not be folded. Unlike RISCV, the located content of LoongArch should
be zero. LoongArch fixup uleb128 value by in-place addition and
subtraction reloc types named R_LARCH_{ADD,SUB}_ULEB128. The located
content can affect the result and R_LARCH_ADD_ULEB128 has enough info to
represent the first symbol value, so it needs to be set to zero.
2, Force relocs if sym is not in section so that it can emit relocs for
external symbol.
Fixes:
https://github.com/llvm/llvm-project/pull/72960#issuecomment-1866844679
Commit: 7b45c549670a8e8b6fe90f4382b0699dd20707d3
https://github.com/llvm/llvm-project/commit/7b45c549670a8e8b6fe90f4382b0699dd20707d3
Author: Jinyang He <hejinyang at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/MC/MCExpr.cpp
A llvm/test/MC/RISCV/align-non-executable.s
Log Message:
-----------
[MC][RISCV] Check hasEmitNops before call shouldInsertExtraNopBytesForCodeAlign (#77236)
The shouldInsertExtraNopBytesForCodeAlign() need STI to check whether
relax is enabled or not. It is initialized when call setEmitNops. The
setEmitNops may not be called in a section which has instructions but is
not executable. In this case uninitialized STI will cause problems.
Thus, check hasEmitNops before call it.
Fixes:
https://github.com/llvm/llvm-project/pull/76552#issuecomment-1878952480
Commit: 3d688d4e3db58c68f090c3e118e7e052c9c25593
https://github.com/llvm/llvm-project/commit/3d688d4e3db58c68f090c3e118e7e052c9c25593
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][Bazel] Adjust BUILD.bazel file for b43c50490c5964b3b1aa1b95a9025a5b5942a46e
Commit: 81df51fb318f2a83de3414c6f9f6770fa6ccda38
https://github.com/llvm/llvm-project/commit/81df51fb318f2a83de3414c6f9f6770fa6ccda38
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
Log Message:
-----------
[mlir][vector] Don't treat memrefs with empty stride as non-contiguous (#76848)
As per the docs [1]:
```
In absence of an explicit layout, a memref is considered to have a
multi-dimensional identity affine map layout.
```
This patch makes sure that MemRefs with no strides (i.e. no explicit
layout) are treated as contiguous when checking whether a particular
vector is a contiguous slice of the given MemRef.
[1] https://mlir.llvm.org/docs/Dialects/Builtin/#layout
Follow-up for #76428.
Commit: daecc303bb719ed63566fcb343afec169826f82c
https://github.com/llvm/llvm-project/commit/daecc303bb719ed63566fcb343afec169826f82c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sqrt.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
Log Message:
-----------
AMDGPU: Replace sqrt OpenCL libcalls with llvm.sqrt (#74197)
The library implementation is just a wrapper around a call to the
intrinsic, but loses metadata. Swap out the call site to the intrinsic
so that the lowering can see the !fpmath metadata and fast math flags.
Since d56e0d07cc5ee8e334fd1ad403eef0b1a771384f, clang started placing
!fpmath on OpenCL library sqrt calls. Also don't bother emitting
native_sqrt anymore, it's just another wrapper around llvm.sqrt.
Commit: c6bb89f308c6715edf3f35fb7c6257713ecfc614
https://github.com/llvm/llvm-project/commit/c6bb89f308c6715edf3f35fb7c6257713ecfc614
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Decl.cpp
M clang/test/CodeGen/flexible-array-init.c
Log Message:
-----------
[clang] Fix assertion failure when initializing union with FAM (#77298)
When initializing a union that constrain a struct with a flexible array
member, and the initializer list is empty, we currently trigger an
assertion failure. This happens because getFlexibleArrayInitChars()
assumes that the initializer list is non-empty.
Fixes https://github.com/llvm/llvm-project/issues/77085.
Commit: 4cb1d914ff7b36be06137a8357da0afbf8d628c9
https://github.com/llvm/llvm-project/commit/4cb1d914ff7b36be06137a8357da0afbf8d628c9
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics-library.cpp
Log Message:
-----------
[flang] add folding support for quad bessels (#77314)
This is done using libquadmath and the mappings are only available if
libquadmath was found by cmake.
Support for non quad bessels is already available on POSIX platform
using libm extensions.
Commit: 2357e899cb11e05312c54b689ebd0355487be6bc
https://github.com/llvm/llvm-project/commit/2357e899cb11e05312c54b689ebd0355487be6bc
Author: avl-llvm <55248412+avl-llvm at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M bolt/lib/Rewrite/CMakeLists.txt
M bolt/lib/Rewrite/DWARFRewriter.cpp
A llvm/include/llvm/DWARFLinker/AddressesMap.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerCompileUnit.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerDeclContext.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
A llvm/include/llvm/DWARFLinker/DWARFFile.h
R llvm/include/llvm/DWARFLinker/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/DWARFLinkerBase.h
R llvm/include/llvm/DWARFLinker/DWARFLinkerCompileUnit.h
R llvm/include/llvm/DWARFLinker/DWARFLinkerDeclContext.h
R llvm/include/llvm/DWARFLinker/DWARFStreamer.h
A llvm/include/llvm/DWARFLinker/Parallel/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/StringPool.h
R llvm/include/llvm/DWARFLinkerParallel/AddressesMap.h
R llvm/include/llvm/DWARFLinkerParallel/DWARFFile.h
R llvm/include/llvm/DWARFLinkerParallel/DWARFLinker.h
R llvm/include/llvm/DWARFLinkerParallel/StringPool.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
M llvm/lib/CMakeLists.txt
M llvm/lib/DWARFLinker/CMakeLists.txt
A llvm/lib/DWARFLinker/Classic/CMakeLists.txt
A llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
A llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
A llvm/lib/DWARFLinker/Classic/DWARFLinkerDeclContext.cpp
A llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
R llvm/lib/DWARFLinker/DWARFLinker.cpp
R llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp
R llvm/lib/DWARFLinker/DWARFLinkerDeclContext.cpp
R llvm/lib/DWARFLinker/DWARFStreamer.cpp
A llvm/lib/DWARFLinker/Parallel/AcceleratorRecordsSaver.cpp
A llvm/lib/DWARFLinker/Parallel/AcceleratorRecordsSaver.h
A llvm/lib/DWARFLinker/Parallel/ArrayList.h
A llvm/lib/DWARFLinker/Parallel/CMakeLists.txt
A llvm/lib/DWARFLinker/Parallel/DIEAttributeCloner.cpp
A llvm/lib/DWARFLinker/Parallel/DIEAttributeCloner.h
A llvm/lib/DWARFLinker/Parallel/DIEGenerator.h
A llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinker.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerGlobalData.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
A llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
A llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
A llvm/lib/DWARFLinker/Parallel/DependencyTracker.h
A llvm/lib/DWARFLinker/Parallel/IndexedValuesMap.h
A llvm/lib/DWARFLinker/Parallel/OutputSections.cpp
A llvm/lib/DWARFLinker/Parallel/OutputSections.h
A llvm/lib/DWARFLinker/Parallel/StringEntryToDwarfStringPoolEntryMap.h
A llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
A llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.h
A llvm/lib/DWARFLinker/Parallel/TypePool.h
A llvm/lib/DWARFLinker/Parallel/Utils.h
A llvm/lib/DWARFLinker/Utils.cpp
R llvm/lib/DWARFLinkerParallel/AcceleratorRecordsSaver.cpp
R llvm/lib/DWARFLinkerParallel/AcceleratorRecordsSaver.h
R llvm/lib/DWARFLinkerParallel/ArrayList.h
R llvm/lib/DWARFLinkerParallel/CMakeLists.txt
R llvm/lib/DWARFLinkerParallel/DIEAttributeCloner.cpp
R llvm/lib/DWARFLinkerParallel/DIEAttributeCloner.h
R llvm/lib/DWARFLinkerParallel/DIEGenerator.h
R llvm/lib/DWARFLinkerParallel/DWARFEmitterImpl.cpp
R llvm/lib/DWARFLinkerParallel/DWARFEmitterImpl.h
R llvm/lib/DWARFLinkerParallel/DWARFFile.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinker.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerCompileUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerCompileUnit.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerGlobalData.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerImpl.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerImpl.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerTypeUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerTypeUnit.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerUnit.h
R llvm/lib/DWARFLinkerParallel/DebugLineSectionEmitter.h
R llvm/lib/DWARFLinkerParallel/DependencyTracker.cpp
R llvm/lib/DWARFLinkerParallel/DependencyTracker.h
R llvm/lib/DWARFLinkerParallel/IndexedValuesMap.h
R llvm/lib/DWARFLinkerParallel/OutputSections.cpp
R llvm/lib/DWARFLinkerParallel/OutputSections.h
R llvm/lib/DWARFLinkerParallel/StringEntryToDwarfStringPoolEntryMap.h
R llvm/lib/DWARFLinkerParallel/StringPool.cpp
R llvm/lib/DWARFLinkerParallel/SyntheticTypeNameBuilder.cpp
R llvm/lib/DWARFLinkerParallel/SyntheticTypeNameBuilder.h
R llvm/lib/DWARFLinkerParallel/TypePool.h
R llvm/lib/DWARFLinkerParallel/Utils.h
M llvm/tools/dsymutil/CMakeLists.txt
M llvm/tools/dsymutil/DwarfLinkerForBinary.cpp
M llvm/tools/dsymutil/DwarfLinkerForBinary.h
M llvm/tools/dsymutil/LinkUtils.h
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/llvm-dwarfutil/CMakeLists.txt
M llvm/tools/llvm-dwarfutil/DebugInfoLinker.cpp
M llvm/unittests/DWARFLinkerParallel/StringPoolTest.cpp
Log Message:
-----------
[DWARFLinker][DWARFLinkerParallel][NFC] Refactor DWARFLinker&DWARFLinkerParallel to have a common library. Part 1. (#75925)
This patch creates DWARFLinkerBase library, places DWARFLinker code into
DWARFLinker\Classic, places DWARFLinkerParallel into DWARFLinker\Parallel.
updates BOLT to use new library. This patch is NFC.
Commit: db78c30ba772af1466bb0d0c1d376c8e642ee4a9
https://github.com/llvm/llvm-project/commit/db78c30ba772af1466bb0d0c1d376c8e642ee4a9
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M llvm/include/llvm/Support/RISCVISAInfo.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Deduplicate RISCVISAInfo::toFeatures/toFeatureVector. NFC (#76942)
toFeatures and toFeatureVector both output a list of target feature
flags, just with a slightly different interface. toFeatures keeps any
unsupported extensions, and also provides a way to append negative
extensions (AddAllExtensions=true).
This patch combines them into one function, so that a later patch will
be be able to get a std::vector of features that includes all the
negative extensions, which was previously only possible through the
StrAlloc interface.
Commit: ae5575db1561c0606582346d5f0cbc799c1c02f3
https://github.com/llvm/llvm-project/commit/ae5575db1561c0606582346d5f0cbc799c1c02f3
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/test/Target/LLVMIR/arm-sme-invalid.mlir
M mlir/test/Target/LLVMIR/arm-sme.mlir
Log Message:
-----------
[mlir][ArmSME] Add `arm_sme.intr.cnts(b|h|w|d)` intrinsics (#77319)
This adds MLIR versions of the Arm streaming vector length intrinsics.
These allow reading the streaming vector length regardless of the
streaming mode.
Commit: b59b8d418279f20275ece99bb6c31b1417a7bd80
https://github.com/llvm/llvm-project/commit/b59b8d418279f20275ece99bb6c31b1417a7bd80
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
M llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
Log Message:
-----------
[AMDGPU] Add GFX12 S_WAIT_* instructions (#77336)
GFX12 has separate wait instructions per counter e.g. S_WAIT_LOADCNT.
S_WAITCNT still exists but is deprecated and codegen should stop using
it. S_WAITCNT_* (e.g. S_WAITCNT_VSCNT) are removed.
This patch adds/removes MC layer support for these instructions.
Commit: b399c8407351a8fce7313d6ecd6510cb04e94d8f
https://github.com/llvm/llvm-project/commit/b399c8407351a8fce7313d6ecd6510cb04e94d8f
Author: Mitch Phillips <31459023+hctim at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[NFC] [lld] [MTE] Rename MemtagDescriptors to MemtagGlobalDescriptors (#77300)
Requested in https://github.com/llvm/llvm-project/pull/77078, I agree
that we may as well be unambiguous.
Commit: b81ba52e15d95c3353489d4ce2f61c3771714c28
https://github.com/llvm/llvm-project/commit/b81ba52e15d95c3353489d4ce2f61c3771714c28
Author: Frederik Carlier <frederik.carlier at quamotion.mobi>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/test/CodeGenObjC/dllstorage.m
Log Message:
-----------
Set dllstorage on ObjectiveC ivar offsets (#77385)
Mark instance variable offset symbols with `dllexport`/`dllimport` if
they are not hidden and the interface declaration is marked with
`dllexport`/`dllimport`, when using the GNUstep 2.x ABI.
/cc @davidchisnall
Commit: 243a5822f68d784f5d8b12db5d50353a37a2f0f4
https://github.com/llvm/llvm-project/commit/243a5822f68d784f5d8b12db5d50353a37a2f0f4
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] update build for 2357e899cb11e05312c54b689ebd0355487be6bc
Commit: 414ea3a77181ef01d2cc2ad34950fc1c03ce0d41
https://github.com/llvm/llvm-project/commit/414ea3a77181ef01d2cc2ad34950fc1c03ce0d41
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/AST/TextNodeDumper.h
M clang/lib/AST/TextNodeDumper.cpp
A clang/test/AST/ast-dump-coroutine.cpp
Log Message:
-----------
[AST] Teach TextNodeDumper to print the "implicit" bit for coroutine AST nodes (#77311)
Commit: 25e0dc92a1df906d6e42c66a32f1fa764f1acabd
https://github.com/llvm/llvm-project/commit/25e0dc92a1df906d6e42c66a32f1fa764f1acabd
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/GCMetadata.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/lib/CodeGen/GCRootLowering.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[CodeGen] Port `GCLowering` to new pass manager (#75305)
Commit: f9fec402896a90f3b09cea359c330f65a0908649
https://github.com/llvm/llvm-project/commit/f9fec402896a90f3b09cea359c330f65a0908649
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
Log Message:
-----------
AMDGPU: Make v32bf16 a legal type (#76679)
Depends #76678
Commit: 7a2596344045565f24dd08486a36a30d8966d27e
https://github.com/llvm/llvm-project/commit/7a2596344045565f24dd08486a36a30d8966d27e
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSDIRInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/EXPInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
Log Message:
-----------
[AMDGPU] Flip the default value of maybeAtomic. NFCI. (#75220)
In practice maybeAtomic = 0 is used to prevent SIMemoryLegalizer from
interfering with instructions that are mayLoad or mayStore but lack
MachineMemOperands. These instructions should be the exception not the
rule, so this patch sets maybeAtomic = 1 by default and only overrides
it to 0 where necessary.
Commit: 124efcaa973306ce42633cea07ed3cf55d63afde
https://github.com/llvm/llvm-project/commit/124efcaa973306ce42633cea07ed3cf55d63afde
Author: Matthias Springer <me at m-sp.org>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[mlir][bufferization][NFC] Clean up Bazel build files (#77429)
`*OpsIncGen` should depend only on the respective `*OpsTdFiles`.
Commit: f92b928b1e1e662e091c8064a161bf4b5dfccdb9
https://github.com/llvm/llvm-project/commit/f92b928b1e1e662e091c8064a161bf4b5dfccdb9
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/TableGen/GlobalISelCombinerEmitter/type-inference.td
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
[GISel] Infer the type of an immediate when there is one element in TEC (#77399)
When there is just one element in the type equivalence class (TEC),
`inferNamedOperandType` fails because it does not consider the passed
operand as a suitable one. This is incorrect when inferring the type of
an (unnamed) immediate operand.
Commit: 51afb101743855e2ae2624ebbe087da77128d92c
https://github.com/llvm/llvm-project/commit/51afb101743855e2ae2624ebbe087da77128d92c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[LV] Create block in mask up-front if needed. (#76635)
At the moment, block and edge masks are created on demand, which means
that they are inserted at the point where they are demanded and then
cached. It is possible that the mask for a block is looked up later at a
point that's not dominated by the point where the mask has been
inserted.
To avoid this, create masks up front on entry to the corresponding basic
block and leave it to VPlan simplification to remove unneeded masks.
Note that we need to create masks for all blocks, if any of the blocks
in the loop needs predication, as computing the mask of a block depends
on the masks of its predecessor.
Needed for #76090.
https://github.com/llvm/llvm-project/pull/76635
Commit: c7d404ea728f1f74d6bacd3dec3ebfa28ac6a0a5
https://github.com/llvm/llvm-project/commit/c7d404ea728f1f74d6bacd3dec3ebfa28ac6a0a5
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr24xx.cpp
M clang/test/CXX/drs/dr25xx.cpp
M clang/test/CXX/drs/dr26xx.cpp
M clang/test/CXX/drs/dr27xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Update cxx_dr_status.html (#77372)
This patch updates `cxx_dr_status.html` to bring it in sync with Core Issues List Revision 113.
Commit: 9be29ad48cdd948ad54f305f6ede391b83198eb9
https://github.com/llvm/llvm-project/commit/9be29ad48cdd948ad54f305f6ede391b83198eb9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bf16.ll
Log Message:
-----------
AMDGPU: Regenerate test checks
Fix test failures after auto-merge of f9fec402896a90f3b09cea359c330f65a0908649
Commit: 4f68ee36fc80212fe5d31085ac2d8503630d99cc
https://github.com/llvm/llvm-project/commit/4f68ee36fc80212fe5d31085ac2d8503630d99cc
Author: hstk30-hw <hanwei62 at huawei.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Headers/arm_acle.h
A clang/test/CodeGen/arm-acle-coproc.c
M clang/test/Preprocessor/aarch64-target-features.c
Log Message:
-----------
[ARM] arm_acle.h add Coprocessor Instrinsics (#75440)
https://github.com/llvm/llvm-project/issues/75424
Add Coprocessor Instrinsics
Commit: f9a1d157e5168acefaa2281ef14c3809bc6ee539
https://github.com/llvm/llvm-project/commit/f9a1d157e5168acefaa2281ef14c3809bc6ee539
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/include/llvm/CodeGen/StackProtector.h
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[CodeGen] Port `StackProtector` to new pass manager (#75334)
The original `StackProtector` is both transform and analysis pass, break
it into two passes now. `getAnalysis<StackProtector>()` could be now
replaced by `FAM.getResult<SSPLayoutAnalysis>(F)` in new pass system.
Commit: a529b6eaf05d24518bbe0f0a5539c378252d2671
https://github.com/llvm/llvm-project/commit/a529b6eaf05d24518bbe0f0a5539c378252d2671
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/StackProtector.h
Log Message:
-----------
[CodeGen] Fix -Wmismatched-tags in StackProtector.h (NFC)
llvm-project/llvm/include/llvm/CodeGen/StackProtector.h:69:10:
error: class 'AnalysisInfoMixin' was previously declared as a struct; this is valid, but may result in linker errors under the Microsoft C++ ABI [-Werror,-Wmismatched-tags]
69 | friend class AnalysisInfoMixin<SSPLayoutAnalysis>;
| ^
llvm-project/llvm/include/llvm/IR/PassManager.h:414:8: note: previous use is here
414 | struct AnalysisInfoMixin : PassInfoMixin<DerivedT> {
| ^
llvm-project/llvm/include/llvm/CodeGen/StackProtector.h:69:10: note: did you mean struct here?
69 | friend class AnalysisInfoMixin<SSPLayoutAnalysis>;
| ^~~~~
| struct
1 error generated.
Commit: 839435cc6ccbd84fff20790285af84bdba83778a
https://github.com/llvm/llvm-project/commit/839435cc6ccbd84fff20790285af84bdba83778a
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRType.h
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Lower/HLFIR/calls-poly-to-assumed-type.f90
M flang/test/Lower/polymorphic.f90
Log Message:
-----------
[flang] Fix fir::isPolymorphic for TYPE(*) assumed-size arrays (#77339)
fir::isPolymorphic was returning false for TYPE(*) assumed-size arrays
causing bad fir.rebox to be created when passing a polymorphic actual
argument to such TYPE(*) dummy.
Fix fir::isAssumedSize to return true for fir.ref<fir.array<none>> and
fir.ref<none>.
@cabreraam, I found this bug when testing your patch, although it is not
caused by it, so you may hit it when passing TYPE(*) deferred shape of
to assumed size TYPE(*) with a different rank.
Commit: c7148467fc08eefaaae876c7d11d629c849f42cf
https://github.com/llvm/llvm-project/commit/c7148467fc08eefaaae876c7d11d629c849f42cf
Author: David Sherwood <57997763+david-arm at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64.h
A llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.cpp
A llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/CMakeLists.txt
A llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[AArch64] Add an AArch64 pass for loop idiom transformations (#72273)
We have added a new pass that looks for loops such as the following:
```
while (i != max_len)
if (a[i] != b[i])
break;
... use index i ...
```
Although similar to a memcmp, this is slightly different because instead
of returning the difference between the values of the first non-matching
pair of bytes, it returns the index of the first mismatch. As such, we
are not able to lower this to a memcmp call.
The new pass can now spot such idioms and transform them into a
specialised predicated loop that gives a significant performance
improvement for AArch64. It is intended as a stop-gap solution until
this can be handled by the vectoriser, which doesn't currently deal with
early exits.
This specialised loop makes use of a generic intrinsic that counts the
trailing zero elements in a predicate vector. This was added in
https://reviews.llvm.org/D159283 and for SVE we end up with brkb & incp
instructions.
Although we have added this pass only for AArch64, it was written in a
generic way so that in theory it could be used by other targets.
Currently the pass requires scalable vector support and needs to know
the minimum page size for the target, however it's possible to make it
work for fixed-width vectors too. Also, the llvm.experimental.cttz.elts
intrinsic used by the pass has generic lowering, but can be made
efficient for targets with instructions similar to SVE's brkb, cntp and
incp.
Original version of patch was posted on Phabricator:
https://reviews.llvm.org/D158291
Patch co-authored by Kerry McLaughlin (@kmclaughlin-arm) and David
Sherwood (@david-arm)
See the original discussion on Discourse:
https://discourse.llvm.org/t/aarch64-target-specific-loop-idiom-recognition/72383
Commit: 19870ed9c3238f348bf82dcc2b2e0a2894536874
https://github.com/llvm/llvm-project/commit/19870ed9c3238f348bf82dcc2b2e0a2894536874
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/X86/avx512er-builtins.c
M clang/test/CodeGen/X86/avx512pf-builtins.c
M clang/test/Driver/cl-x86-flags.c
M clang/test/Frontend/x86-target-cpu.c
Log Message:
-----------
[X86] Emit Warnings for frontend options to enable knl/knm specific ISAs. (#75580)
Since Knight Landing and Knight Mill microarchitectures are EOL, we
would like to remove intrinsic supports for its specific ISA in LLVM 19.
In LLVM 18, we will first emit a warning for the usage.
Commit: d5985d4c70bad7b25740027cb873c91a31ff0659
https://github.com/llvm/llvm-project/commit/d5985d4c70bad7b25740027cb873c91a31ff0659
Author: Kohei Yamaguchi <fix7211 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/docs/Passes.md
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Passes.td
Log Message:
-----------
[mlir][docs] Fix a broken passes documentation (#77402)
- Add EmitC passes into Pass.md
- Modify header level of the pass description to under the
`LegalizeVectorStorage` pass
Commit: 62b30e7948d1278900585518523794f9286fa5c9
https://github.com/llvm/llvm-project/commit/62b30e7948d1278900585518523794f9286fa5c9
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/StackProtector.h
Log Message:
-----------
[CodeGen] Fix friend declaration in SSPLayoutAnalysis (#77447)
Commit: e7636b1094ba53fe4edc16dd52ef981c01e35ceb
https://github.com/llvm/llvm-project/commit/e7636b1094ba53fe4edc16dd52ef981c01e35ceb
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
Log Message:
-----------
[NewPM] Update `CodeGenPreparePass` reference in `CodeGenPassBuilder.h` (#77446)
Reland #77054.
Commit: 0b9b00c8c86d42f72f8abf379052a451778dcc63
https://github.com/llvm/llvm-project/commit/0b9b00c8c86d42f72f8abf379052a451778dcc63
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
Log Message:
-----------
[AMDGPU] Make isScalarLoadLegal a member of AMDGPURegisterBankInfo. NFC.
Commit: 4f7c402d9ff1b2c908b97b78baf84157f08745e8
https://github.com/llvm/llvm-project/commit/4f7c402d9ff1b2c908b97b78baf84157f08745e8
Author: Saiyedul Islam <Saiyedul.Islam at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
M llvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Log Message:
-----------
[AMDGPU][NFC] Update left over tests for COV5 (#76984)
Update AMDGPU CodeGen lit tests to check for COV5 ABI.
Commit: 633d9184f5f8ab227ab22fd7a7db366b843a02d2
https://github.com/llvm/llvm-project/commit/633d9184f5f8ab227ab22fd7a7db366b843a02d2
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/test/Dialect/Transform/ops-invalid.mlir
M mlir/test/Dialect/Transform/test-interpreter.mlir
Log Message:
-----------
[mlir] introduce transform.collect_matching (#76724)
Introduce a new match combinator into the transform dialect. This
operation collects all operations that are yielded by a satisfactory
match into its results. This is a simpler version of `foreach_match`
that can be inserted directly into existing transform scripts.
Commit: 4cb2ef4fe372d32d1773f4dd358d6dff91518b5f
https://github.com/llvm/llvm-project/commit/4cb2ef4fe372d32d1773f4dd358d6dff91518b5f
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A mlir/docs/Tutorials/transform/Ch4.md
M mlir/docs/Tutorials/transform/_index.md
M mlir/examples/transform/CMakeLists.txt
M mlir/examples/transform/Ch3/transform-opt/transform-opt.cpp
A mlir/examples/transform/Ch4/CMakeLists.txt
A mlir/examples/transform/Ch4/include/CMakeLists.txt
A mlir/examples/transform/Ch4/include/MyExtension.h
A mlir/examples/transform/Ch4/include/MyExtension.td
A mlir/examples/transform/Ch4/lib/CMakeLists.txt
A mlir/examples/transform/Ch4/lib/MyExtension.cpp
A mlir/examples/transform/Ch4/transform-opt/transform-opt.cpp
M mlir/test/CMakeLists.txt
A mlir/test/Examples/transform/Ch4/features.mlir
A mlir/test/Examples/transform/Ch4/multiple.mlir
A mlir/test/Examples/transform/Ch4/sequence.mlir
M mlir/test/lit.cfg.py
Log Message:
-----------
[mlir] add a chapter on matchers to the transform dialect tutorial (#76725)
These operations has been available for a while, but were not described
in the tutorial. Add a new chapter on using and defining match
operations.
Commit: 197214e39b7100dd0e88aa38cffdce9ee1f4464b
https://github.com/llvm/llvm-project/commit/197214e39b7100dd0e88aa38cffdce9ee1f4464b
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
Log Message:
-----------
[RFC][SelectionDAG] Add and use SDNode::getAsZExtVal() helper (#76710)
This follows on from #76708, allowing
`cast<ConstantSDNode>(N)->getZExtValue()` to be replaced with just
`N->getAsZextVal();`
Introduced via `git grep -l "cast<ConstantSDNode>\(.*\).*getZExtValue" |
xargs sed -E -i
's/cast<ConstantSDNode>\((.*)\)->getZExtValue/\1->getAsZExtVal/'` and
then using `git clang-format` on the result.
Commit: f499472de3e1184b83fc6cd78bc244a55f2cac7d
https://github.com/llvm/llvm-project/commit/f499472de3e1184b83fc6cd78bc244a55f2cac7d
Author: wanglei <wanglei at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
Log Message:
-----------
[LoongArch] Pre-commit test for #76913. NFC
This test will crash with expensive check.
Crash message:
```
*** Bad machine code: Using an undefined physical register ***
- function: main
- basic block: %bb.0 entry (0x20fee70)
- instruction: $r3 = frame-destroy ADDI_D $r22, -288
- operand 1: $r22
```
Commit: 98c6aa72299caeff6b188e1ff2fc1b39c5b893b6
https://github.com/llvm/llvm-project/commit/98c6aa72299caeff6b188e1ff2fc1b39c5b893b6
Author: wanglei <wanglei at loongson.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.h
M llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
Log Message:
-----------
[LoongArch] Implement LoongArchRegisterInfo::canRealignStack() (#76913)
This patch fixes the crash issue in the test:
CodeGen/LoongArch/can-not-realign-stack.ll
Register allocator may spill virtual registers to the stack, which
introduces stack alignment requirements (when the size of spilled
registers exceeds the default alignment size of the stack). If a
function does not have stack alignment requirements before register
allocation, registers used for stack alignment will not be preserved.
Therefore, we should implement `canRealignStack()` to inform the
register allocator whether it is allowed to perform stack realignment
operations.
Commit: d9710d7624171ff3d476925da0f4670c2c9a34cd
https://github.com/llvm/llvm-project/commit/d9710d7624171ff3d476925da0f4670c2c9a34cd
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
M flang/test/Driver/omp-driver-offload.f90
Log Message:
-----------
[Flang][Driver] Enable gpulibc/nogpulibc options for Flang, which allows linking of GPU LIBC for the fortran and OpenMP runtime (#77135)
This patch seeks to add the -gpulibc and -nogpulibc for Flang, which
allows the linking of the GPU libc library, this allows the use of
memcpy and other useful library functions for GPU.
In particular, this allows the Fortran runtime (written in C++) to be
compiled for offload and then linked against the GPU LIBC library via
this option to resolve memcpy and other C library functions that the
fortran runtime depends on for AMD GPU devices (and likely other GPU
devices).
This is the current method I've tested and found to be able to utilise
the Fortran runtime when compiled for AMD GPU, albeit it requires
compiling libc for GPU and then the Fortran runtime for GPU, so not
particularly straight forward or user friendly yet.
Activating this option will allow the subset of C functions to also be
utilised for GPU in other C/C++ based Fortran libraries if any are made
when linking against GPU libc.
Commit: c1ed45a271145acbfad81d87706aeebf361809c3
https://github.com/llvm/llvm-project/commit/c1ed45a271145acbfad81d87706aeebf361809c3
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/DLTI/DLTI.h
M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.cpp
M mlir/lib/Target/LLVMIR/DataLayoutImporter.h
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/layout.mlir
M mlir/test/lib/Dialect/DLTI/TestDataLayoutQuery.cpp
M mlir/unittests/Interfaces/DataLayoutInterfacesTest.cpp
Log Message:
-----------
[mlir] Add global and program memory space handling to the data layout subsystem (#77367)
This patch is based on a previous PR https://reviews.llvm.org/D144657
that added alloca address space handling to MLIR's DataLayout and DLTI
interface. This patch aims to add identical features to import and
access the global and program memory space through MLIR's
DataLayout/DLTI system.
Commit: 2c651e6c381905aff6c7ac4b1585bad168f5b553
https://github.com/llvm/llvm-project/commit/2c651e6c381905aff6c7ac4b1585bad168f5b553
Author: David Sherwood <57997763+david-arm at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/Transforms/LoopIdiom/AArch64/lit.local.cfg
Log Message:
-----------
[AArch64] Fix regression introduced by c7148467fc08eefaaae876c7d11d62… (#77467)
…9c849f42cf
Commit: 20c144ea10be1e4b2620a4a1c949cbad315cff72
https://github.com/llvm/llvm-project/commit/20c144ea10be1e4b2620a4a1c949cbad315cff72
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExpr.cpp
Log Message:
-----------
[clang][Sema][NFC] Make a few parameters const
Commit: 963a2ebef8e9b3409ffc728e377dc53b0baff722
https://github.com/llvm/llvm-project/commit/963a2ebef8e9b3409ffc728e377dc53b0baff722
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/Transforms/JumpThreading/ddt-crash.ll
M llvm/test/Transforms/JumpThreading/loop-phi.ll
M llvm/test/Transforms/JumpThreading/unreachable-loops.ll
Log Message:
-----------
[JumpThreading] Regenerate test checks (NFC)
Commit: 7c00a5be5cdeb34711a546054ba0aa89c26d14eb
https://github.com/llvm/llvm-project/commit/7c00a5be5cdeb34711a546054ba0aa89c26d14eb
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll
Log Message:
-----------
[PhaseOrdering] Regenerate test checks (NFC)
Commit: 2d54ec36f762a081c9f17cacd3407cc6f35622b1
https://github.com/llvm/llvm-project/commit/2d54ec36f762a081c9f17cacd3407cc6f35622b1
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/utils/TableGen/CodeGenDAGPatterns.cpp
Log Message:
-----------
[SelectionDAG] Add and use SDNode::getAsAPIntVal() helper (#77455)
This is the logical equivalent for #76710 for APInt and uses the same
naming scheme.
Converted existing users through:
`git grep -l "cast<ConstantSDNode>\(.*\).*getAPIntValueValue" | xargs
sed -E -i
's/cast<ConstantSDNode>\((.*)\)->getAPIntValue/\1->getAsAPIntVal/'`
Commit: a2dba0c97756c65c7dd9d91bec2ceda80a933bb1
https://github.com/llvm/llvm-project/commit/a2dba0c97756c65c7dd9d91bec2ceda80a933bb1
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
Log Message:
-----------
[SEH][CodeGen] Add test to track CFG optimization bug for SEH (#77441)
LiveDebugValues requires CFG only has one entry. BranchFolding and
MachineBlockPlacement may remove all predecessors of landing pad which
leaves it to be another entry.
Commit: 06286a553280fc843d6f5df477a2c776aa2ece35
https://github.com/llvm/llvm-project/commit/06286a553280fc843d6f5df477a2c776aa2ece35
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
A llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
[GISel] Add RegState::Define to temporary defs in apply patterns (#77425)
Previously, registers created for temporary defs in apply patterns were
rendered as uses, resulting in machine verifier errors.
Commit: e9ac2dc68d0b0578a5c1a98b4e083d133c1d7b2b
https://github.com/llvm/llvm-project/commit/e9ac2dc68d0b0578a5c1a98b4e083d133c1d7b2b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] XformToShuffleWithZero - use dyn_cast instead of isa/cast pair. NFCI.
Commit: db1d9ad109d8e0f17acb2de60c8b57085fe2de77
https://github.com/llvm/llvm-project/commit/db1d9ad109d8e0f17acb2de60c8b57085fe2de77
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/unittests/MI/LiveIntervalTest.cpp
Log Message:
-----------
[llvm/unittests] Reset the IsSSA property when using finalizeBundle() (#77469)
Commit: 0242d27dc89ff19e331ae4945933cdb360c7d4cf
https://github.com/llvm/llvm-project/commit/0242d27dc89ff19e331ae4945933cdb360c7d4cf
Author: Pradeep Kumar <pradeepisro49 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
Log Message:
-----------
[MLIR][NVVM] Add missing `;` when lowering stmatrix Op (#77471)
Commit: ab4af25d5dfaecf01e6c6e94dc79e7304321c376
https://github.com/llvm/llvm-project/commit/ab4af25d5dfaecf01e6c6e94dc79e7304321c376
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A mlir/docs/Dialects/OpenACC.md
M mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
Log Message:
-----------
[acc] OpenACC dialect design philosophy and details (#75548)
This document captures the design philosophy of the acc dialect. It also
shares the rationale behind the design and implementation of various
operations - and ties that back to the dialect design goals.
Co-authored-by: Valentin Clement <clementval at gmail.com>
Co-authored-by: Slava Zakharin <szakharin at nvidia.com>
Commit: a85cbe8f9036c8771fbf61335eb288eaefcda365
https://github.com/llvm/llvm-project/commit/a85cbe8f9036c8771fbf61335eb288eaefcda365
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/test/Modules/autolink_private_module.m
Log Message:
-----------
Disable autolink_private_module.m for z/OS & AIX
This change disables it on z/OS and AIX since it fails on both platforms with:
fatal error: error in backend: Objective-C support is unimplemented for object file format
Commit: 07c9189fcc063bdf6219d2733843c89cde3991e1
https://github.com/llvm/llvm-project/commit/07c9189fcc063bdf6219d2733843c89cde3991e1
Author: Qiongsi Wu <274595+qiongsiwu at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Profile/c-general.c
M compiler-rt/include/CMakeLists.txt
A compiler-rt/include/profile/instr_prof_interface.h
M compiler-rt/lib/profile/InstrProfiling.h
A compiler-rt/test/profile/Linux/instrprof-weak-symbol.c
A compiler-rt/test/profile/instrprof-api.c
Log Message:
-----------
[PGO] Exposing PGO's Counter Reset and File Dumping APIs (#76471)
This PR exposes four PGO functions
- `__llvm_profile_set_filename`
- `__llvm_profile_reset_counters`,
- `__llvm_profile_dump`
- `__llvm_orderfile_dump`
to user programs through the new header `instr_prof_interface.h` under
`compiler-rt/include/profile`. This way, the user can include the header
`profile/instr_prof_interface.h` to introduce these four names to their
programs.
Additionally, this PR defines macro `__LLVM_INSTR_PROFILE_GENERATE` when
the program is compiled with profile generation, and defines macro
`__LLVM_INSTR_PROFILE_USE` when the program is compiled with profile
use. `__LLVM_INSTR_PROFILE_GENERATE` together with
`instr_prof_interface.h` define the PGO functions only when the program
is compiled with profile generation. When profile generation is off,
these PGO functions are defined away and leave no trace in the user's
program.
Background:
https://discourse.llvm.org/t/pgo-are-the-llvm-profile-functions-stable-c-apis-across-llvm-releases/75832
Commit: ca06c330fd07f05e65a638892c32ca1474d47b5e
https://github.com/llvm/llvm-project/commit/ca06c330fd07f05e65a638892c32ca1474d47b5e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
A libcxx/cmake/caches/Generic-optimized-speed.cmake
M libcxx/test/libcxx/depr/depr.default.allocator/allocator.members/allocate.cxx2a.pass.cpp
M libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_ctor_conversion.pass.cpp
M libcxx/test/std/input.output/filesystems/class.path/path.member/path.assign/move.pass.cpp
M libcxx/test/std/input.output/filesystems/class.path/path.member/path.construct/move.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size.replace.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_align_nothrow.replace.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_nothrow.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new.size_nothrow.replace.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size.replace.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_align_nothrow.replace.indirect.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new.size_nothrow.replace.indirect.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.alg/swap.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/F.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/copy_assign.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/copy_move.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/nullptr_t_assign.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.mod/swap.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.pass.cpp
M libcxx/test/support/count_new.h
M libcxx/test/support/test_macros.h
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/params.py
M libunwind/test/libunwind_02.pass.cpp
M libunwind/test/unw_resume.pass.cpp
M libunwind/test/unwind_leaffunction.pass.cpp
Log Message:
-----------
[libc++] Allow running the test suite with optimizations (#68753)
This patch adds a configuration of the libc++ test suite that enables
optimizations when building the tests. It also adds a new CI
configuration to exercise this on a regular basis. This is added in the
context of [1], which requires building with optimizations in order to
hit the bug.
[1]: https://github.com/llvm/llvm-project/issues/68552
Commit: 2aec7083ada09c8b8a0aad79492cbedcf8f9fbb7
https://github.com/llvm/llvm-project/commit/2aec7083ada09c8b8a0aad79492cbedcf8f9fbb7
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[mlir][gpu] Use DenseI32Array for NVVM's maxntid and reqntid (NFC) (#77466)
Commit: 4b7e861d136d941d86b234fbcef520fd798b26fa
https://github.com/llvm/llvm-project/commit/4b7e861d136d941d86b234fbcef520fd798b26fa
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/cxx1z-noexcept-function-type.cpp
Log Message:
-----------
[clang]use correct this scope to evaluate noexcept expr (#77416)
Fixes: #77411
When substituting deduced type, noexcept expr in method should be
instantiated and evaluated.
ThisScrope should be switched to method context instead of origin sema
context
Commit: 7f9e3bf062a4aa36ed5350282cc1c307641145f0
https://github.com/llvm/llvm-project/commit/7f9e3bf062a4aa36ed5350282cc1c307641145f0
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/bolt/lib/Rewrite/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DWARFLinker/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/DWARFLinker/Classic/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/DWARFLinker/Parallel/BUILD.gn
R llvm/utils/gn/secondary/llvm/lib/DWARFLinkerParallel/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwarfutil/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn
Log Message:
-----------
[gn] port 07c9189fcc06 (DWARFLinker/Classic)
Commit: ec56c922ab257845538215f21cac00cf278fbd04
https://github.com/llvm/llvm-project/commit/ec56c922ab257845538215f21cac00cf278fbd04
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/include/BUILD.gn
Log Message:
-----------
[gn] port 07c9189fcc06
Commit: f7cb1afa06335edfc043cb5f11f97907e9df844c
https://github.com/llvm/llvm-project/commit/f7cb1afa06335edfc043cb5f11f97907e9df844c
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/utils/gn/build/sync_source_lists_from_cmake.py
Log Message:
-----------
[gn] Make sync script print github URLs
Phab no longer knows about new revisions.
Commit: 4ea5c603b4c4db36b8ee7e04adf96416f4d996dc
https://github.com/llvm/llvm-project/commit/4ea5c603b4c4db36b8ee7e04adf96416f4d996dc
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/include/lldb/Symbol/Type.h
M lldb/source/Symbol/Type.cpp
Log Message:
-----------
[lldb][Type] Add TypeQuery::SetLanguages API (#75926)
This is required for users of `TypeQuery` that limit the set of
languages of the query using APIs such as
`GetSupportedLanguagesForTypes` or
`GetSupportedLanguagesForExpressions`.
Example usage: https://github.com/apple/llvm-project/pull/7885
Commit: b5f2db940643af3837c77adde1dadb7208922211
https://github.com/llvm/llvm-project/commit/b5f2db940643af3837c77adde1dadb7208922211
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/TestDataFormatterLibcxxChrono.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/main.cpp
Log Message:
-----------
[lldb][libc++] Adds some C++20 calendar data formatters. (#76983)
This adds a subset of the C++20 calendar data formatters:
- day,
- month,
- year,
- month_day,
- month_day_last, and
- year_month_day.
A followup patch will add the missing calendar data formatters:
- weekday,
- weekday_indexed,
- weekday_last,
- month_weekday,
- month_weekday_last,
- year_month,
- year_month_day_last
- year_month_weekday, and
- year_month_weekday_last.
Commit: 51bf0dff53fdaca25f30d30a1c99462c7afdce74
https://github.com/llvm/llvm-project/commit/51bf0dff53fdaca25f30d30a1c99462c7afdce74
Author: Shan Huang <52285902006 at stu.ecnu.edu.cn>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVNSink.cpp
A llvm/test/Transforms/GVNSink/sink-ignore-dbg-intrinsics.ll
Log Message:
-----------
[GVNSink] Skip debug intrinsics when identifying sinking candidates (#77419)
Fixes #77147.
Commit: 9160f49e08af4267efdc870a1c9a434bfd155ae3
https://github.com/llvm/llvm-project/commit/9160f49e08af4267efdc870a1c9a434bfd155ae3
Author: Romaric Jodin <89833130+rjodinchr at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libclc/generic/lib/math/erf.cl
M libclc/generic/lib/math/erfc.cl
Log Message:
-----------
libclc: generic: add half implementation for erf/erfc (#66901)
libclc does not have a half implementation for erf/erfc
Add one based on the float implementation by extending the input and
truncating the output.
Commit: c19995e9654f3ad01defea06f2cfe25cf57475c5
https://github.com/llvm/llvm-project/commit/c19995e9654f3ad01defea06f2cfe25cf57475c5
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
Log Message:
-----------
[bazel] Fix compiler-rt build after 07c9189fcc063bdf6219d2733843c89cde3991e1
Commit: affd9e8e00fc94ccfe87cc41b337852fb681adde
https://github.com/llvm/llvm-project/commit/affd9e8e00fc94ccfe87cc41b337852fb681adde
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
Log Message:
-----------
AMDGPU: Break vop3p handling out of vop3 base patterns (#77472)
Add the vop3p op_sel fields in getInsVOP3P instead of getInsVOP3Base.
Also start using defvar for some of the intermediate fields. let
overrides of all the visible fields are really difficult to follow.
Commit: dc03382d3e38c8028926b2b66eebf3ca98efc7d3
https://github.com/llvm/llvm-project/commit/dc03382d3e38c8028926b2b66eebf3ca98efc7d3
Author: Brad Smith <brad at comstyle.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M openmp/runtime/src/z_Linux_util.cpp
Log Message:
-----------
[openmp][AIX] Add AIX to __kmp_set_stack_info() (#77421)
Commit: 5cfe24eee49dfb9f6f72e73142e075dbbadd3089
https://github.com/llvm/llvm-project/commit/5cfe24eee49dfb9f6f72e73142e075dbbadd3089
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][Vector] Add nontemporal attribute, mirroring memref (#76752)
Since vector loads and stores from scalar memrefs translate to
llvm.load/store, add the ability to tag said loads and stores as
nontemporal. This mirrors functionality available in memref.load/store.
Commit: 888a20c466e1a7b0da4bd662da8668f13a14e75f
https://github.com/llvm/llvm-project/commit/888a20c466e1a7b0da4bd662da8668f13a14e75f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
A llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
Log Message:
-----------
AMDGPU: Drop amdgpu-no-lds-kernel-id attribute in LDS lowering (#71481)
This is in preparation for moving the run of AMDGPUAttributor earlier.
Currently it infers the lack of the corresponding intrinsic calls,
so if we introduce new ones we need to remove the attribute from any
possible transitive callers. This is more conservative than necessary,
we could try to identify specific subgraphs where LDS globals are not
used.
Other options include teaching the attributor to avoid adding it in
cases
where the lowering may choose the table, but this seems more complex.
Alternatively could add a second run which doesn't seem worth it.
Depends #71349
Commit: 79e17cd01491c0fde241097ad4c5c24afbb1883e
https://github.com/llvm/llvm-project/commit/79e17cd01491c0fde241097ad4c5c24afbb1883e
Author: Andrey Ali Khan Bolshakov <32954549+bolshakov-a at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CXX/drs/dr12xx.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
Log Message:
-----------
[clang] Improve bit-field in ref NTTP diagnostic (#71077)
Prior to this, attempts to bind a bit-field to an NTTP of reference type
produced an error because references to subobjects in NTTPs are
disallowed. But C++20 allows references to subobjects in NTTPs generally
(see
[P1907R1](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1907r1.html)).
Without this change, implementing P1907R1 would cause a bug allowing
bit-fields to be bound to reference template arguments.
Extracted from https://reviews.llvm.org/D140996
Commit: c9da4dc77f780df003718bc0d36c0c9e371bfb9c
https://github.com/llvm/llvm-project/commit/c9da4dc77f780df003718bc0d36c0c9e371bfb9c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Refactor GPRF64 register class to make it usable for Zacas. (#77408)
-Rename to GPRPair.
-Rename registers to be named like X10_X11 instead of X10_PD. Except X0
which is now X0_Pair since it is not paired with X1.
-Use unknown size and offset for the subreg indices. This might
be a functional change, but does not affect any lit tests.
Commit: 6eb372e4e46a6dc4511f454b6501e93eb4cad22d
https://github.com/llvm/llvm-project/commit/6eb372e4e46a6dc4511f454b6501e93eb4cad22d
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
Log Message:
-----------
[clang-tidy] Improve performance of misc-const-correctness (#72705)
Replaced certain AST matchers in ExprMutationAnalyzer with a more direct
utilization of AST classes. The primary bottleneck was identified in the
canResolveToExpr AST matcher. Since this matcher was employed multiple
times and used recursively, each invocation led to the constant creation
and destruction of other matchers within it. Additionally, the continual
comparison of DynTypedNode resulted in significant performance
degradation.
The optimization was tested on the TargetLowering.cpp file. Originally,
the check took 156 seconds on that file, but after implementing this
enhancement, it now takes approximately 40 seconds, making it nearly
four times faster.
Despite this improvement, there are still numerous issues in this file.
To further reduce the computational cost of this class, it is advisable
to consider removing the remaining matchers and exploring alternatives
such as leveraging RecursiveASTVisitor and increasing the direct use of
AST classes.
Closes #71786
Commit: 810c291574831eb06bfcb8fa0e27f9bbd5af6c59
https://github.com/llvm/llvm-project/commit/810c291574831eb06bfcb8fa0e27f9bbd5af6c59
Author: David Green <david.green at arm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
A flang/test/HLFIR/count-elemental.fir
Log Message:
-----------
[Flang] Generate inline reduction loops for elemental count intrinsics (#75774)
This adds a ReductionElementalConversion transform to
OptimizedBufferizationPass, taking hlfir::count(hlfir::elemental) and
generating the inline loop to perform the count of true elements. This
lets us generate a single loop instead of ending up as two plus a
temporary.
Any and All should be able to share the same code with a different
function/initial value.
Commit: 8ca0364d33c7e6c4083e3b1c0b77b00b2c93ff46
https://github.com/llvm/llvm-project/commit/8ca0364d33c7e6c4083e3b1c0b77b00b2c93ff46
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/TextAPI/InterfaceFile.cpp
Log Message:
-----------
[TextAPI] Skip adding empty attributes (#77400)
An empty string attribute value (e.g. a parent-umbrella: "") is
equivalent to omitting it. Theres no reason to write it out.
Commit: 90525125421300d9d1b6bf55288bd1871855d35d
https://github.com/llvm/llvm-project/commit/90525125421300d9d1b6bf55288bd1871855d35d
Author: David Green <david.green at arm.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
Log Message:
-----------
[Flang] Remove unnecessary static_assert
Certain compilers do not seem to like the static assert with a string, causing
a implicit conversion. It can be removed as it should not be reachable and the
mlir::failure should handle it correctly in case it is.
Commit: 02fa434b92a5529f043b3fa353bc4fc5bd680424
https://github.com/llvm/llvm-project/commit/02fa434b92a5529f043b3fa353bc4fc5bd680424
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/unittests/Dialect/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
Log Message:
-----------
[mlir][openacc] Restore unit tests for device_type functions (#77122)
These tests were initially pushed together with
https://github.com/llvm/llvm-project/pull/75864 but they were triggering
some buildbot failure (sanitizers). They now make use of the
`OwningOpRef` so all the resources are correctly destroyed at the end of
each tests.
They will be extended to includes all the extra getter functions added
with device_type support.
Commit: ed640420b50e960b7700e2fa973b9fdcdcb32838
https://github.com/llvm/llvm-project/commit/ed640420b50e960b7700e2fa973b9fdcdcb32838
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/test/Semantics/OpenACC/acc-loop.f90
M llvm/include/llvm/Frontend/OpenACC/ACC.td
Log Message:
-----------
[flang][openacc] Fix clauses check with device_type (#77389)
A couple of clauses are allowed multiple times when they are separated
by a device_type clause. This patch updates the ACC.td file to move
these clauses to the `allowedClause` list and the
`CheckAllowedOncePerGroup` function is used to make sure they appear
only once on the directive or for each device_type.
Commit: 064e73cd54061d39d42ae682d2f0780296a6ca5d
https://github.com/llvm/llvm-project/commit/064e73cd54061d39d42ae682d2f0780296a6ca5d
Author: Nikita Popov <nikita.ppv at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVNSink.cpp
R llvm/test/Transforms/GVNSink/sink-ignore-dbg-intrinsics.ll
Log Message:
-----------
Revert "[GVNSink] Skip debug intrinsics when identifying sinking candidates (#77419)"
This reverts commit 51bf0dff53fdaca25f30d30a1c99462c7afdce74.
There are test failures on Windows.
Commit: d29297239f4ebfd2948915fe084e1d2e36f558f9
https://github.com/llvm/llvm-project/commit/d29297239f4ebfd2948915fe084e1d2e36f558f9
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/include/tuple
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/apply.pass.cpp
Log Message:
-----------
[libc++] Implements P2517R1. (#77239)
As pointed out by @Zingam the paper was implemented in libc++ as an
extension. This patch does the bookkeeping. The inital release version
is based on historical release dates.
Completes:
- Add a conditional noexcept specification to std::apply
Commit: f0fd8fd752d69671d0cf391d90d9aba10da98978
https://github.com/llvm/llvm-project/commit/f0fd8fd752d69671d0cf391d90d9aba10da98978
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M README.md
M libcxx/docs/index.rst
Log Message:
-----------
[libc++][CI] Moves CI badge to main README. (#77247)
The current CI badge is currently in libc++ documentation. This does not
seem the right place:
- The typical location on GitHub is on the main README.
- The documentation is shipped as part of the release:
- This link does not work in off-line mode. Currently our documentation
works in off-line mode.
- The status in the release documentation does not reflect the status of
the shipped library. So users looking at it may see a red status and get
confused.
This moves the badge to the README.
Commit: 03a0bfa96a6eb09c4bbae344ac3aa062339aa730
https://github.com/llvm/llvm-project/commit/03a0bfa96a6eb09c4bbae344ac3aa062339aa730
Author: martinboehme <mboehme at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/Formula.h
M clang/lib/Analysis/FlowSensitive/DataflowAnalysisContext.cpp
Log Message:
-----------
[clang][dataflow] Add an early-out to `flowConditionImplies()` / `flowConditionAllows()`. (#77453)
This saves having to assemble the set of constraints and run the SAT
solver in
the trivial case where `F` is true.
This is a performance win on the benchmarks for the Crubit nullability
checker:
```
name old cpu/op new cpu/op delta
BM_PointerAnalysisCopyPointer 64.1µs ± 5% 63.1µs ± 0% -1.56% (p=0.000 n=20+17)
BM_PointerAnalysisIntLoop 172µs ± 2% 171µs ± 0% ~ (p=0.752 n=20+17)
BM_PointerAnalysisPointerLoop 408µs ± 3% 355µs ± 0% -12.99% (p=0.000 n=20+17)
BM_PointerAnalysisBranch 201µs ± 2% 184µs ± 0% -8.28% (p=0.000 n=20+19)
BM_PointerAnalysisLoopAndBranch 684µs ± 2% 613µs ± 2% -10.38% (p=0.000 n=20+19)
BM_PointerAnalysisTwoLoops 309µs ± 2% 308µs ± 2% ~ (p=0.728 n=20+19)
BM_PointerAnalysisJoinFilePath 37.9ms ± 2% 37.9ms ± 2% +0.06% (p=0.041 n=20+19)
BM_PointerAnalysisCallInLoop 26.5ms ± 2% 26.4ms ± 4% -0.59% (p=0.024 n=20+20)
```
When running clang-tidy on real-world code, the results are less clear.
In
three runs, averaged, on an arbitrarily chosen input file, I get 11.91 s
of user
time without this patch and 11.81 s with it, though with considerable
measurement noise (I'm seeing up to 0.2 s of variation between runs).
Still, this is a very simple change, and it is a clear win in
benchmarks, so I
think it is worth making.
Commit: 1b8e39a1a2e8237852914501e3361d98af6db054
https://github.com/llvm/llvm-project/commit/1b8e39a1a2e8237852914501e3361d98af6db054
Author: Jake Egan <5326451+jakeegan at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/test/Modules/autolink_private_module.m
Log Message:
-----------
[clang][modules] Objective-C test lacks support on AIX/zOS (#77485)
To fix error: `fatal error: error in backend: Objective-C support is
unimplemented for object file format`
Same rationale as 22f01cd.
Commit: 7620f03ef7a662384d67b6bd1fad8582dfe9dd82
https://github.com/llvm/llvm-project/commit/7620f03ef7a662384d67b6bd1fad8582dfe9dd82
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCSectionELF.cpp
M llvm/test/CodeGen/AArch64/patchable-function-entry.ll
M llvm/test/CodeGen/LoongArch/patchable-function-entry.ll
M llvm/test/CodeGen/Mips/xray-section-group.ll
M llvm/test/CodeGen/RISCV/patchable-function-entry.ll
M llvm/test/CodeGen/X86/basic-block-sections-labels-functions-sections.ll
M llvm/test/CodeGen/X86/gcc_except_table-multi.ll
M llvm/test/CodeGen/X86/patchable-function-entry.ll
M llvm/test/CodeGen/X86/stack-size-section-function-sections.ll
M llvm/test/CodeGen/X86/stack-size-section.ll
M llvm/test/CodeGen/X86/xray-section-group.ll
M llvm/test/MC/ELF/section-combine.s
M llvm/test/MC/ELF/section.s
Log Message:
-----------
[MC] Parse SHF_LINK_ORDER argument before section group name (#77407)
When both SHF_LINK_ORDER | SHF_GROUP flags are set, GNU assembler from
2.35 onwards (https://sourceware.org/PR25381
https://sourceware.org/binutils/docs/as/Section.html) parses the
SHF_LINK_ORDER argument before section group name, different from us.
This is unfortunate, but does not matter because the `.section` flag `o`
is a niche feature only used by compiler instrumentations, not adopted
by hand-written assembly, and using both flags is extremely rare. Let's
just match GNU assembler. There is another benefit: we now support
zero-flag section group with the SHF_LINK_ORDER flag, while previously
there isn't a syntax.
While here, print 'G' after 'o' to be clear that the 'G' argument is
parsed after the 'o' argument. To make the diff smaller, we don't print
'G' after 'w' in the absence of 'o' for now.
Commit: fa9284589f111cfd3614a75bfbe0709db39a8f15
https://github.com/llvm/llvm-project/commit/fa9284589f111cfd3614a75bfbe0709db39a8f15
Author: Adrian Prantl <adrian-prantl at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/include/lldb/Core/Module.h
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/test/Shell/SymbolFile/DWARF/x86/find-basic-function.cpp
M lldb/tools/lldb-test/lldb-test.cpp
Log Message:
-----------
[lldb] DWARFDIE: Follow DW_AT_specification when computing CompilerCo… (#77157)
…ntext
Following the specification chain seems to be clearly the expected
behavior of GetDeclContext(). Otherwise C++ methods have an empty
CompilerContext instead of being nested in their struct/class.
Theprimary motivation for this functionality is the Swift plugin. In
order to test the change I added a proof-of-concept implementation of a
Module::FindFunction() variant that takes a CompilerContext, expesed via
lldb-test.
rdar://120553412
Commit: f972e4d3434364718899f974e4d1c8e60aea91fa
https://github.com/llvm/llvm-project/commit/f972e4d3434364718899f974e4d1c8e60aea91fa
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/MC/MCSectionELF.cpp
M llvm/test/CodeGen/Mips/ehframe-indirect.ll
M llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll
M llvm/test/CodeGen/SPARC/constructor.ll
M llvm/test/CodeGen/X86/constructor.ll
M llvm/test/CodeGen/X86/elf-comdat.ll
M llvm/test/CodeGen/X86/elf-comdat2.ll
M llvm/test/CodeGen/X86/elf-group.ll
M llvm/test/CodeGen/X86/explicit-section-mergeable.ll
M llvm/test/CodeGen/X86/global-sections-comdat.ll
M llvm/test/DebugInfo/SystemZ/eh_frame_personality.ll
M llvm/test/DebugInfo/SystemZ/eh_frame_personality.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_basic.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_large_static_personality_encodings.s
M llvm/test/MC/ELF/alias-to-local.s
M llvm/test/MC/ELF/relocation.s
M llvm/test/tools/llvm-symbolizer/frame.s
Log Message:
-----------
[MC,ELF] .section: unconditionally print section flag 'G' after 'o'
* Placing 'G' before 'M' (SHF_MERGE) can be misleading as the sh_entsize
argument goes before the section group name, if a reader doesn't know
that the order of extra arguments is not affected by the order of flags.
* 'a', 'w', and 'x' indicate basic permission-related flags. Separating
them with 'G' is kinda ugly.
Simplify code and move 'G' after 'o'. The new output is more similar to
GCC.
Commit: c1173e4e05375514b1416e00b092e1ea1468a46e
https://github.com/llvm/llvm-project/commit/c1173e4e05375514b1416e00b092e1ea1468a46e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] Use FoldConstantArithmetic for unary bitops constant folding.
BSWAP/BITREVERSE/CTPOP/CTLZ/CTLZ_ZERO_UNDEF/CTTZ/CTTZ_ZERO_UNDEF are all handled by FoldConstantArithmetic - so use directly instead of testing for isConstantIntBuildVectorOrConstantInt and relying on DAG.getNode() to perform the constant fold.
Commit: 417df8ee4a149cc49b3fa7e68c64cb926fee8a6f
https://github.com/llvm/llvm-project/commit/417df8ee4a149cc49b3fa7e68c64cb926fee8a6f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/pr77459.ll
Log Message:
-----------
[X86] Add test coverage for #77459
Commit: a50ea2f76f993f65c8756067f7ad5a21e560b0c9
https://github.com/llvm/llvm-project/commit/a50ea2f76f993f65c8756067f7ad5a21e560b0c9
Author: Nicholas Mosier <nmosier at stanford.edu>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/source/Plugins/Trace/intel-pt/CommandObjectTraceStartIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.cpp
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.h
M lldb/source/Plugins/Trace/intel-pt/LibiptDecoder.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceCursorIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPTBundleLoader.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceLoad.py
Log Message:
-----------
[lldb] Fix Intel PT plugin compile errors (#77252)
Fix #77251.
Commit: 0ab5d8ba023f920e03dcd328f62c4df1855af374
https://github.com/llvm/llvm-project/commit/0ab5d8ba023f920e03dcd328f62c4df1855af374
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lld/test/ELF/linkorder-group.test
Log Message:
-----------
[ELF,test] Set alignment of SHT_GROUP to 4
Fixes: 0930f62cf600d9e2e9a45fef1b3a422d50be89d5
This makes the test more conforming and fixes a -fsanitize=alignment
failure in finalizeShtGroup.
Commit: 144ae5b271f7026dec51617c667047a9641fd9e0
https://github.com/llvm/llvm-project/commit/144ae5b271f7026dec51617c667047a9641fd9e0
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M flang/test/HLFIR/simplify-hlfir-intrinsics.fir
Log Message:
-----------
[Flang] Xfail hlfir test case on AIX (#76802)
This test case seems to fail at the `Merge disjoint stack slots` pass on
AIX, it passes if compilled with `-mllvm --no-stack-coloring`. This PR
xfails the teest case on AIX temporarily until the issue is addressed.
---------
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: 3210ce276350a247220b193db12a9b45d1034724
https://github.com/llvm/llvm-project/commit/3210ce276350a247220b193db12a9b45d1034724
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr77459.ll
Log Message:
-----------
[X86] Fold (iX bitreverse(bitcast(vXi1 X))) -> (iX bitcast(shuffle(X)))
X86 doesn't have a BITREVERSE instruction, so if we're working with a casted boolean vector, we're better off shuffling the vector instead if we have PSHUFB (SSSE3 or later)
Fixes #77459
Commit: b565ee1ad3b40a6eadfce24f65069091b76ea47f
https://github.com/llvm/llvm-project/commit/b565ee1ad3b40a6eadfce24f65069091b76ea47f
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
R mlir/docs/Dialects/OpenACC.md
A mlir/docs/Dialects/OpenACCDialect.md
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
Log Message:
-----------
[acc] Fix OpenACC documentation (#77502)
After PR#75548, the OpenACC documentation on the MLIR website has a few
issues. This change corrects them:
- Renames OpenACC.md to OpenACCDialect.md so that links remain
unchanged. In its current state, the links to
https://mlir.llvm.org/docs/Dialects/OpenACCDialect/ no longer work.
- Since the old OpenACCDialect.md (the one with operation definitions)
is being included in the new file, rename the old file to prevent name
ambiguity.
- A header is needed in the .md file, otherwise the index on website is
not properly created.
- Add a new section before including the operations .md file because
otherwise the separation is not clear.
Commit: b629b8662c16ebe76c0779d85bef41a2eea49671
https://github.com/llvm/llvm-project/commit/b629b8662c16ebe76c0779d85bef41a2eea49671
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/hsa-globals.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
Log Message:
-----------
[AMDGPU][MC] Use normal ELF syntax for section switching (#77267)
For some reasons `SunStyleELFSectionSwitchSyntax` is set to `true` for
AMDGPU, but according to
https://github.com/llvm/llvm-project/issues/64862#issuecomment-1880419239
that syntax is only limited to Sun system.
Fix #64862.
Commit: a43e0f90b650fdcdf80bcb221d50a62905bf8977
https://github.com/llvm/llvm-project/commit/a43e0f90b650fdcdf80bcb221d50a62905bf8977
Author: Wu Yingcong <yingcong.wu at intel.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/test/support/filesystem_test_helper.h
Log Message:
-----------
[libc++][test] try to directly create socket file in /tmp when filepath is too long (#77058)
If TMP is set to a folder which path is too long, the current libcxx
test helper function `create_socket()` will fail because of the test
temp folder `test_root`'s path is too long to be used in socket
creation.
In such case, this patch will try to create the socket file directly in
`/tmp` folder.
This patch also add an assertion for `bind()`.
Commit: 6c207ee5d20d2b054509123e6d0507df1332b376
https://github.com/llvm/llvm-project/commit/6c207ee5d20d2b054509123e6d0507df1332b376
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
A llvm/test/CodeGen/RISCV/option-relax-relocation.ll
Log Message:
-----------
[RISCV] Force relocations if initial MCSubtargetInfo contains FeatureRelax (#77436)
Regarding
```
.option norelax
j label
.option relax
// relaxable instructions
// For assembly input, RISCVAsmParser::ParseInstruction will set ForceRelocs (https://reviews.llvm.org/D46423).
// For direct object emission, ForceRelocs is not set after https://github.com/llvm/llvm-project/pull/73721
label:
```
The J instruction needs a relocation to ensure the target is correct
after linker relaxation. This is related a limitation in the assembler:
RISCVAsmBackend::shouldForceRelocation decides upfront whether a
relocation is needed, instead of checking more information (whether
there are relaxable fragments in between).
Despite the limitation, `j label` produces a relocation in direct object
emission mode, but was broken by #73721 due to the shouldForceRelocation
limitation.
Add a workaround to RISCVTargetELFStreamer to emulate the previous
behavior.
Link: https://github.com/ClangBuiltLinux/linux/issues/1965
Commit: 0804ef2d1539fde7f45e18e4f87d99f7019f9aae
https://github.com/llvm/llvm-project/commit/0804ef2d1539fde7f45e18e4f87d99f7019f9aae
Author: Sanjay Marreddi <sanjay.mareddi at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/include/regex
M libcxx/test/std/re/re.const/re.matchflag/match_not_eol.pass.cpp
Log Message:
-----------
[libc++] Fix `regex_search` to match `$` alone with `match_default` flag (#77256)
Using `regex_search` with the regex_constant `match_default` and a
simple regex pattern `$` is expected to match general strings such as
_"a", "ab", "abc"..._ at `[last, last)` positions. But, the current
implementation fails to do so.
Fixes #75042
Commit: 65a1efc60ca390cb68409fd27d5648b4caa6cb54
https://github.com/llvm/llvm-project/commit/65a1efc60ca390cb68409fd27d5648b4caa6cb54
Author: James Touton <bekenn at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/include/__memory/shared_ptr.h
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.cmp/cmp_nullptr.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.special/cmp_nullptr.pass.cpp
Log Message:
-----------
Fixed shared_ptr comparisons with nullptr_t when spaceship is unavailable. (#76781)
This was causing compilation errors when attempting to compare a
`shared_ptr<T[]>` with `nullptr`, as `get()` returns `T*` rather than `T
(*)[]`. `unique_ptr` did not have this issue, but I've added tests to
make sure.
Commit: 7e956ca88a90feadd2982ba52e0b008a9fa2249e
https://github.com/llvm/llvm-project/commit/7e956ca88a90feadd2982ba52e0b008a9fa2249e
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
Log Message:
-----------
[NFC][AMDGPU] Require `x86-registered-target` for `llvm/test/Transforms/MemCpyOpt/no-libcalls.ll`
The test sets `-mtriple=x86_64` but doesn't require it. This can cause issue on
non-x86 system.
Commit: b6d1577071017f1ba3f12bfe30c1746ffaf5d98d
https://github.com/llvm/llvm-project/commit/b6d1577071017f1ba3f12bfe30c1746ffaf5d98d
Author: Qiongsi Wu <274595+qiongsiwu at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M compiler-rt/test/profile/instrprof-api.c
Log Message:
-----------
[PGO] Fix `instrprof-api.c` on Windows (#77508)
https://github.com/llvm/llvm-project/pull/76471 introduced a new test
but the check lines have over-restrictive patterns for a string variable
name that cause test failures on Windows (e.g.
https://lab.llvm.org/buildbot/#/builders/127/builds/60637/steps/4/logs/stdio).
This PR fixes the test.
Commit: c7c68f1764ddd38d940946007c634b4bacb902b2
https://github.com/llvm/llvm-project/commit/c7c68f1764ddd38d940946007c634b4bacb902b2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M openmp/libomptarget/cmake/Modules/LibomptargetGetDependencies.cmake
M openmp/libomptarget/plugins-nextgen/CMakeLists.txt
A openmp/libomptarget/plugins-nextgen/generic-elf-64bit/dynamic_ffi/ffi.cpp
A openmp/libomptarget/plugins-nextgen/generic-elf-64bit/dynamic_ffi/ffi.h
M openmp/libomptarget/plugins-nextgen/generic-elf-64bit/src/rtl.cpp
Log Message:
-----------
[Libomptarget] Allow the CPU targets to be built without libffi (#77495)
Summary:
The CPU targets currently rely on `libffi` to invoke the "kernel"
functions. Previously we would not build these if this dependency was
not found. This patch copies th eapproach used for things like CUDA and
HSA to dynamically load this if it is not found.
The one sketchy thing this does is hard-code the default ABI for the
target. These are normally defined on a per-file basis in the FFI
source, so I had to fish out the expected values. We only use two types,
so ideally we will always be able to use the default ABI.
It's possible we could remove this dependency entirely in the future as
well.
Commit: 340cc1702e21128b62799c5dfbf2875c3c2c96a1
https://github.com/llvm/llvm-project/commit/340cc1702e21128b62799c5dfbf2875c3c2c96a1
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/setmaxnreg.ll
A llvm/test/Verifier/NVPTX/lit.local.cfg
A llvm/test/Verifier/NVPTX/setmaxnreg.ll
Log Message:
-----------
[LLVM][NVPTX]: Add intrinsic for setmaxnreg (#77289)
This patch adds an intrinsic for setmaxnreg PTX instruction.
* PTX Doc link for this instruction:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#miscellaneous-instructions-setmaxnreg
* The i32 argument, an immediate value, specifies the actual
absolute register count for the instruction.
* The `setmaxnreg` instruction is available in SM90a.
So, this patch adds 'hasSM90a' predicate to use in
the NVPTX backend.
* lit tests are added to verify the lowering of the intrinsic.
* Verifier logic (and tests) are added to test the register
count range and divisibility-by-8 requirements.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 47605ffec8864e989905027b2f56277e2dc8b8fa
https://github.com/llvm/llvm-project/commit/47605ffec8864e989905027b2f56277e2dc8b8fa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/source/Target/ProcessTrace.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Target/ProcessTrace.cpp:23:33: error: extra ';' outside
of a function is incompatible with C++98
[-Werror,-Wc++98-compat-extra-semi]
Commit: fb1466216889e9f4d884a387f430d2e85b4542f6
https://github.com/llvm/llvm-project/commit/fb1466216889e9f4d884a387f430d2e85b4542f6
Author: Ralf Jung <post at ralfj.de>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
LangRef: rint, nearbyint: mention that default rounding mode is assumed (#77191)
LLVM assumes round-to-nearest mode and sometimes performs constant-folding based on that assumption. This updates the language ref documentation for the rint and nearbyint intrinsics to mention that fact.
Commit: baa8c2abcd8da31549996458c9df4871454b0673
https://github.com/llvm/llvm-project/commit/baa8c2abcd8da31549996458c9df4871454b0673
Author: sethp <seth.pellegrino at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/test/Frontend/verify.c
Log Message:
-----------
[Clang] Wide delimiters ('{{{') for expect strings (#77326)
Prior to this commit, it was impossible to use the simple string
matching directives to look for any content that contains unbalanced
`{{` `}}` pairs, such as:
```
// expected-note {{my_struct{{1}, 2}}}
```
Which would parse like so:
```
"nested" brace v
// expected-note {{my_struct{{1}, 2}}}
closes the nested brace ^ |
trailing }
```
And the frontend would complain 'cannot find end ('}}') of expected'.
At this snapshot, VerifyDiagnosticConsumer's parser now counts the
opening braces and looks for a matching length of closing sigils,
allowing the above to be written as:
```
// expected-note {{{my_struct{{1}, 2}}}}
opening brace |-| |-|
closing brace is '}}}', found here ^
```
This came about as a result of this discussion:
https://github.com/llvm/llvm-project/pull/74852#discussion_r1443117644
cc @erichkeane
Commit: 3a8a9267c5ee75e0d1e2f00662d2b913e1dba8d1
https://github.com/llvm/llvm-project/commit/3a8a9267c5ee75e0d1e2f00662d2b913e1dba8d1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
Log Message:
-----------
[Instrumentation] Remove redundant LLVM_DEBUG (NFC)
Commit: cd101ab76bdee8d2583ae7b0dfbae9a745373731
https://github.com/llvm/llvm-project/commit/cd101ab76bdee8d2583ae7b0dfbae9a745373731
Author: Nic <NCGThompson at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Tweak description of `@llvm.is.constant.*` (#77519)
Fixes #77517
Commit: ab590377a371d8099829f77ab4e67c24f8740bd9
https://github.com/llvm/llvm-project/commit/ab590377a371d8099829f77ab4e67c24f8740bd9
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/Transforms/Simplifications.h
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
A mlir/test/Dialect/Mesh/folding.mlir
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
M mlir/test/lib/Dialect/Mesh/TestSimplifications.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
Log Message:
-----------
[mlir][mesh] Add folding of ClusterShapeOp (#77033)
If the mesh has static size on some of the requested axes, the result is
substituted with a constant.
Commit: 4e8986fc58dd88cbef9089a9b2841e0a87cbb481
https://github.com/llvm/llvm-project/commit/4e8986fc58dd88cbef9089a9b2841e0a87cbb481
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
A llvm/test/CodeGen/X86/cov-sections.ll
Log Message:
-----------
[Coverage] Mark coverage sections as metadata sections on COFF. (#76834)
Mark `.lcovmap$M`, `.lcovfun$M`, `.lcovd` and `.lcovn` as metadata
sections on COFF so they are not loaded into memory.
Commit: 71e5652f47b0d02a54aa9582319648bc4c23842c
https://github.com/llvm/llvm-project/commit/71e5652f47b0d02a54aa9582319648bc4c23842c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/test/hwasan/TestCases/Linux/aligned_alloc-alignment.cpp
M compiler-rt/test/hwasan/TestCases/Linux/pvalloc-overflow.cpp
M compiler-rt/test/hwasan/TestCases/Posix/posix_memalign-alignment.cpp
M compiler-rt/test/hwasan/TestCases/allocator_returns_null.cpp
M compiler-rt/test/hwasan/TestCases/halt-on-error.cpp
M compiler-rt/test/hwasan/TestCases/report-unmapped.cpp
M compiler-rt/test/hwasan/TestCases/use-after-free.c
M compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp
M compiler-rt/test/sanitizer_common/TestCases/max_allocation_size.cpp
Log Message:
-----------
[sanitizer] Select non-internal frames in ReportErrorSummary (#77406)
Summary contains one line and should point to user code instead of
internal compiler-rt location. TSAN already does that.
Commit: e07a2f49e3d3c13b6e9b89e0f6118652f2b2d3ac
https://github.com/llvm/llvm-project/commit/e07a2f49e3d3c13b6e9b89e0f6118652f2b2d3ac
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libcxx/test/libcxx/ranges/range.utility.helpers/simple_view.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.drop/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.drop/types.h
M libcxx/test/std/ranges/range.adaptors/range.elements/types.h
M libcxx/test/std/ranges/range.adaptors/range.join/range.join.sentinel/ctor.other.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.join/types.h
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/end.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.take.while/types.h
M libcxx/test/std/ranges/range.adaptors/range.take/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/ctor.other.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/eq.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/minus.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/types.h
M libcxx/test/support/test_range.h
Log Message:
-----------
[libc++][NFC] Create and use test-defined simple_view concept (#77334)
Instead of using a concept defined in the internal implementation, use a
definition of the simple_view ranges concept separately defined and
included in test code.
Commit: b5d4332286154838557a8ab5c76b794e85d946b3
https://github.com/llvm/llvm-project/commit/b5d4332286154838557a8ab5c76b794e85d946b3
Author: Walter Erquinigo <a20012251 at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
A lldb/tools/lldb-dap/.editorconfig
A lldb/tools/lldb-dap/.gitignore
A lldb/tools/lldb-dap/.prettierrc.json
A lldb/tools/lldb-dap/.vscode/launch.json
A lldb/tools/lldb-dap/.vscode/tasks.json
A lldb/tools/lldb-dap/LICENSE.TXT
M lldb/tools/lldb-dap/README.md
A lldb/tools/lldb-dap/package-lock.json
M lldb/tools/lldb-dap/package.json
A lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
A lldb/tools/lldb-dap/src-ts/disposable-context.ts
A lldb/tools/lldb-dap/src-ts/extension.ts
A lldb/tools/lldb-dap/src-ts/types.ts
A lldb/tools/lldb-dap/tsconfig.json
Log Message:
-----------
[lldb-dap] Create a typescript extension for lldb-dap (#75515)
The main motivations behind this are two:
- Allow different companies developing their own vscode extensions for
LLDB to have a single contribution point, thus sharing resources and
working as a virtual large team.
- Allow for visual ways to configure the debugger, which currently has
to be done through launch.json files.
In terms of implementation, this is very straightforward and these are
the most important details:
- All the cpp code has been moved to a subfolder for cleanness. There's
a specific commit in the list of commits of this PR that just does that,
in case that helps reviewing this.
- A new folder `src-ts` has been created for the typescript code
- The ts extension can be used in two ways: as a regular vscode
extension and as a library. There file `extension.ts` explains which
entry point to use.
- The README has been updated the mention how to install the extension,
which is simpler than before. There are two additional sections for
rebuilding and formatting.
- The ts code I added merely sets up the debug adapter using two
possible options: reading the lldb-dap path from vscode settings or from
a config object passed by users of the extension is used as a library. I
did this to show how we can support easily both worlds.
Commit: a7262d2d9bee9bdfdbcd03ca27a0128c2e2b1c1a
https://github.com/llvm/llvm-project/commit/a7262d2d9bee9bdfdbcd03ca27a0128c2e2b1c1a
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/lib/Conversion/ArithCommon/AttrToLLVMConverter.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/python/ir/diagnostic_handler.py
Log Message:
-----------
[mlir][arith] Add overflow flags support to arith ops (#77211)
Add overflow flags support to the following ops:
* `arith.addi`
* `arith.subi`
* `arith.muli`
Example of new syntax:
```
%res = arith.addi %arg1, %arg2 overflow<nsw> : i64
```
Similar to existing LLVM dialect syntax
```
%res = llvm.add %arg1, %arg2 overflow<nsw> : i64
```
Tablegen canonicalization patterns updated to always drop flags, proper
support with tests will be added later.
Updated LLVMIR translation as part of this commit as it currenly written
in a way that it will crash when new attributes added to arith ops
otherwise.
Discussion
https://discourse.llvm.org/t/rfc-integer-overflow-flags-support-in-arith-dialect/76025
---------
Co-authored-by: Yi Wu <yi.wu2 at arm.com>
Commit: b932f03bda5a88f699d33d118ca2735da3c66677
https://github.com/llvm/llvm-project/commit/b932f03bda5a88f699d33d118ca2735da3c66677
Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/src/math/smoke/CMakeLists.txt
Log Message:
-----------
[libc] Disable Death Tests While Hermetic (#77388)
The death test infrastructure seems to depend on operator new, which
isn't currently supported in our hermetic tests. This patch just
disables the death tests in hermetic mode since they only overlap in the
nan tests.
Commit: 5f71aa9270c3d680babfbc6e766773d113c2a79a
https://github.com/llvm/llvm-project/commit/5f71aa9270c3d680babfbc6e766773d113c2a79a
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/firmware-corefile/create-empty-corefile.cpp
Log Message:
-----------
[lldb] [Mach-O] don't strip the end of the "kern ver str" LC_NOTE (#77538)
The "kern ver str" LC_NOTE gives lldb a kernel version string -- with a
UUID and/or a load address (stext) to load it at. The LC_NOTE specifies
a size of the identifier string in bytes. In
ObjectFileMachO::GetIdentifierString, I copy that number of bytes into a
std::string, and in case there were additional nul characters at the end
of the sting for padding reasons, I tried to shrink the std::string to
not include these extra nul's.
However, I did this resizing without handling the case of an empty
identifier string. I don't know why any corefile creator would do that,
but of course at least one does. This patch removes the resizing
altogether; I was solving something that hasn't ever shown to be a
problem. I also added a test case for this, to check that lldb doesn't
crash when given one of these corefiles.
rdar://120390199
Commit: feb49bb42433c55a206489d4c8dafd940c019e30
https://github.com/llvm/llvm-project/commit/feb49bb42433c55a206489d4c8dafd940c019e30
Author: Nour1248 <121687016+Nour1248 at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/AST.cpp
Log Message:
-----------
[clangd] Fix typo in function name in AST.cpp (#77504)
Commit: 046dffce237f193a50a46c3f5bd8a8ca2efc3c77
https://github.com/llvm/llvm-project/commit/046dffce237f193a50a46c3f5bd8a8ca2efc3c77
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/test/lib/Dialect/Mesh/TestSimplifications.cpp
Log Message:
-----------
Fix -Wunused-variable in TestSimplifications.cpp (NFC)
llvm-project/mlir/test/lib/Dialect/Mesh/TestSimplifications.cpp:36:17:
error: unused variable 'status' [-Werror,-Wunused-variable]
LogicalResult status =
^
1 error generated.
Commit: ab82b0624015d910455b5844cb0ad3d2a4d38732
https://github.com/llvm/llvm-project/commit/ab82b0624015d910455b5844cb0ad3d2a4d38732
Author: Chris Apple <14171107+cjappl at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
Log Message:
-----------
Make SANITIZER_MIN_OSX_VERSION a cache variable (#74394)
It is desirable to be able to configure the `-mmacosx-version-min` flag
for the sanitizers, but this flag was never made a CACHE variable in
cmake.
By doing this, it will allow developers to select different minimum
versions, which results in different interceptors being enabled or
disabled on their platforms. This version can now persist between cmake
runs, so it can be remembered by cmake, and edited in the cache file.
Commit: 412d784188257f6b8a3748ac9a800002db861181
https://github.com/llvm/llvm-project/commit/412d784188257f6b8a3748ac9a800002db861181
Author: Yinying Li <107574043+yinying-lisa-li at users.noreply.github.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M mlir/include/mlir/ExecutionEngine/CRunnerUtils.h
M mlir/lib/ExecutionEngine/CRunnerUtils.cpp
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_generate.mlir
Log Message:
-----------
[mlir][sparse][CRunnerUtils] Add shuffle in CRunnerUtils (#77124)
Shuffle can generate an array of unique and random numbers from 0 to
size-1. It can be used to generate tensors with specified sparsity
level.
Commit: 46944210ebd93765b068eeba22bd3e337099af3e
https://github.com/llvm/llvm-project/commit/46944210ebd93765b068eeba22bd3e337099af3e
Author: Ding Fei <fding at feysh.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDecl.cpp
A clang/test/Parser/gh30908-scope-balance-on-invalid-var-direct-init-1.cpp
A clang/test/Parser/gh30908-scope-balance-on-invalid-var-direct-init-2.cpp
Log Message:
-----------
[clang][Parser] Pop scope prior VarDecl invalidating by invalid init (#77434)
Invalid (direct) initializer would invalid `VarDecl` so
`InitializerScopeRAII` cannot restore scope stack balance.
As with other kind of initializer, `InitializerScopeRAII::pop()` is
moved up before `Sema::ActOnInitializerError()` which invalidates the
`VarDecl`, so scope can be balanced and current `DeclContext` can be
restored.
Fixes #30908
Commit: ea3c7b3397f8de8e885ea7cd1ed5138ec4a72d50
https://github.com/llvm/llvm-project/commit/ea3c7b3397f8de8e885ea7cd1ed5138ec4a72d50
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
Log Message:
-----------
Revert "[X86][NFC] Remove dead code for "_REV" instructions"
This reverts commit 85f3d81fabb9381ce5bc0112d029a7c684b01006.
Affects BOLT macro-fusion and not NFC.
Commit: 6615581526f62a00833b2d60cc31f7f12497b5ff
https://github.com/llvm/llvm-project/commit/6615581526f62a00833b2d60cc31f7f12497b5ff
Author: Kai Luo <lkail at cn.ibm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/test/CodeGen/PowerPC/intrinsic-trap.ll
Log Message:
-----------
[PowerPC] Make verifier happy when lowering `llvm.trap` (#77266)
`llvm.trap` is lowered to `PPC::TRAP` and `PPC::TRAP` is set as
terminator. Verifier complains about terminator should not lie in the
middle of an MBB. See #77095.
Fix it by removing `isTerminator` and `isBarrier` and then set `isTrap`
which was introduced by https://reviews.llvm.org/D48836# and is being
used by X86 and AArch64.
`PPC::TRAP` is not a hardware memory barrier and `llvm.trap` doesn't
indicate a memory barrier either.
Commit: c9124adfd8291a5f5b1d23295308d8940648c596
https://github.com/llvm/llvm-project/commit/c9124adfd8291a5f5b1d23295308d8940648c596
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
R llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
Log Message:
-----------
Revert "[SEH][CodeGen] Add test to track CFG optimization bug for SEH" (#77542)
Reverts llvm/llvm-project#77441
I'll land it with fix.
Commit: e364ddf0c9044f3af147a907aa770599a206c30f
https://github.com/llvm/llvm-project/commit/e364ddf0c9044f3af147a907aa770599a206c30f
Author: Nicholas Mosier <nmosier at stanford.edu>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/docs/MyFirstTypoFix.rst
Log Message:
-----------
[docs] Fix formatting issues in MyFirstTypoFix (#77527)
Fix various formatting issues in MyFirstTypoFix.
Commit: aa4c1e90b6f25a5c6312927e0574f9d07fa25582
https://github.com/llvm/llvm-project/commit/aa4c1e90b6f25a5c6312927e0574f9d07fa25582
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M compiler-rt/test/profile/instrprof-api.c
Log Message:
-----------
Revert "[PGO] Fix `instrprof-api.c` on Windows (#77508)"
Issue #77546
This reverts commit b6d1577071017f1ba3f12bfe30c1746ffaf5d98d.
Commit: a828cda9c80282a77b579f8fc9dc17a310173af4
https://github.com/llvm/llvm-project/commit/a828cda9c80282a77b579f8fc9dc17a310173af4
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Frontend/Utils.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Profile/c-general.c
M compiler-rt/include/CMakeLists.txt
R compiler-rt/include/profile/instr_prof_interface.h
M compiler-rt/lib/profile/InstrProfiling.h
R compiler-rt/test/profile/Linux/instrprof-weak-symbol.c
R compiler-rt/test/profile/instrprof-api.c
Log Message:
-----------
Revert "[PGO] Exposing PGO's Counter Reset and File Dumping APIs (#76471)"
Issue #77546
This reverts commit 07c9189fcc063bdf6219d2733843c89cde3991e1.
Commit: 3593ade43dd8af557432dce72f93aa0186c281ef
https://github.com/llvm/llvm-project/commit/3593ade43dd8af557432dce72f93aa0186c281ef
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/include/BUILD.gn
Log Message:
-----------
[gn build] Port a828cda9c802
Commit: a79d13f12ab81bc6edd54e27f7cfffb96487af8d
https://github.com/llvm/llvm-project/commit/a79d13f12ab81bc6edd54e27f7cfffb96487af8d
Author: Chia <sun1011jacobi at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
Log Message:
-----------
[RISCV][ISel] Use vaaddu with rounding mode rnu for ISD::AVGCEILU. (#77473)
Similar to #76550, but for `ISD::AVGCEILU`.
Specifically, this patch aims to use `vaaddu` with rounding mode rnu
(i.e `vxrm[1:0] = 0b00`) for `ISD::AVGCEILU`.
### Source code
```
define <vscale x 8 x i8> @vaaddu_vv_nxv8i8_ceil(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y) {
%xzv = zext <vscale x 8 x i8> %x to <vscale x 8 x i16>
%yzv = zext <vscale x 8 x i8> %y to <vscale x 8 x i16>
%add = add nuw nsw <vscale x 8 x i16> %xzv, %yzv
%one = insertelement <vscale x 8 x i16> poison, i16 1, i32 0
%splat = shufflevector <vscale x 8 x i16> %one, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
%add1 = add nuw nsw <vscale x 8 x i16> %add, %splat
%div = lshr <vscale x 8 x i16> %add1, %splat
%ret = trunc <vscale x 8 x i16> %div to <vscale x 8 x i8>
ret <vscale x 8 x i8> %ret
}
```
### Before this patch
```
vaaddu_vv_nxv8i8_ceil:
vsetvli a0, zero, e8, m1, ta, ma
vwaddu.vv v10, v8, v9
vsetvli zero, zero, e16, m2, ta, ma
vadd.vi v10, v10, 1
vsetvli zero, zero, e8, m1, ta, ma
vnsrl.wi v8, v10, 1
ret
```
### After this patch
```
vaaddu_vv_nxv8i8_ceil:
vsetvli a0, zero, e8, m1, ta, ma
csrwi vxrm, 0
vaaddu.vv v8, v8, v9
ret
```
Commit: a9f39ff2b628e38826d5b95c1e8ae3cb7c692de9
https://github.com/llvm/llvm-project/commit/a9f39ff2b628e38826d5b95c1e8ae3cb7c692de9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
Log Message:
-----------
[RISCV] Reorder RISCVInstrInfoA.td. NFC (#77539)
Move classes out of `let Predicates` scopes. The instantiation of the
class should be responsible for providing the Predicates.
Put the RV64 pseudoinstructions and patterns next to the RV32 version of
the same category. The categories are AMOs, pseudo AMOs, and compare
exchange. The main reason for this commit is that the compare exchange
patterns need to be disabled when Zacas is enabled so we can directly
select Zacas instructions with isel patterns. This necessitates compare
exchange having a different `let Predicates=` from the others anyway.
Commit: e42a70afab47a7a9e76a40bb553eee458a5f18ae
https://github.com/llvm/llvm-project/commit/e42a70afab47a7a9e76a40bb553eee458a5f18ae
Author: jiahanxie353 <jx353 at cornell.edu>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-alu.ll
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-add-zve32x.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-add.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-and.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-or.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-sub.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-xor.mir
Log Message:
-----------
[RISCV][GISel] IRTranslate and Legalize some instructions with scalable vector type
* Add IRTranslate tests for ADD, SUB, AND, OR, and XOR with scalable
vector types to show that they work as expected.
* Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR of scalable vector
type for the RISC-V vector extension.
Commit: b53628a52d1947c51e250d6fa4ff5dd12b737aa0
https://github.com/llvm/llvm-project/commit/b53628a52d1947c51e250d6fa4ff5dd12b737aa0
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M clang/docs/ClangFormat.rst
M clang/test/Format/clang-format-ignore.cpp
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
Reland "[clang-format] Optimize processing .clang-format-ignore files"
(42ec976184ac was reverted by 26993f61673e due to a use-after-scope bug.)
Reuse the patterns governing the previous input file being formatted if
the current input file is from the same directory.
Commit: c2b57a052daee22cb6401bc7bc514d858ea11eb6
https://github.com/llvm/llvm-project/commit/c2b57a052daee22cb6401bc7bc514d858ea11eb6
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Descriptor.h
M clang/lib/AST/Interp/Program.cpp
Log Message:
-----------
[clang][Interp][NFC] Make a few pointers const
Commit: 7388b7422f9307dd5ae3fe3876a676d83d702daf
https://github.com/llvm/llvm-project/commit/7388b7422f9307dd5ae3fe3876a676d83d702daf
Author: Juneyoung Lee <aqjune at gmail.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
A llvm/test/CodeGen/WebAssembly/signext-zeroext-callsite.ll
Log Message:
-----------
[WebAssembly] Correctly consider signext/zext arg flags at function declaration (#77281)
This patch fixes WebAssembly's FastISel pass to correctly consider
signext/zeroext parameter flags at function declaration.
Previously, the flags at call sites were only considered during code
generation, which caused an interesting bug report #63388 .
This is problematic especially because in WebAssembly's ABI, either
signext or zeroext can be tagged to a function argument, and it must be
correctly reflected in the generated code. Unit test
https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
shows that `i8 zeroext %t` and `i8 signext %t`'s code gen are different.
Commit: 7fc7ef14340a3a58cebd0801497b68eb698c2784
https://github.com/llvm/llvm-project/commit/7fc7ef14340a3a58cebd0801497b68eb698c2784
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fpenv.ll
A llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/TableGen/GlobalISelEmitter.td
Log Message:
-----------
[GlobalISel] Lowering of {get,set,reset}_fpenv (#75086)
The intrinsics get_fpenv, set_fpenv and reset_fpenv in this change are
implemented as calls to math library functions. Target specific lowering
will be implemented later on.
Commit: efcf192a0a5993165f837ce71250fb6df689634b
https://github.com/llvm/llvm-project/commit/efcf192a0a5993165f837ce71250fb6df689634b
Author: Bhuminjay Soni <76656712+11happy at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Type.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/SemaCXX/warn-range-loop-analysis-trivially-copyable.cpp
Log Message:
-----------
Changed Checks from TriviallyCopyable to TriviallyCopyConstructible (#77194)
**Overview:**
Fix a bug where Clang's range-loop-analysis incorrectly checks for trivial copyability instead
of trivial copy constructibility, leading to erroneous warnings.
Fixes #47355
Commit: b788692fa5b6ed79ea2c85ee464353cca30d867a
https://github.com/llvm/llvm-project/commit/b788692fa5b6ed79ea2c85ee464353cca30d867a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-09 (Tue, 09 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-alu.ll
Log Message:
-----------
[RISCV][NFC] Remove unused CHECK prefixes to fix buildbots. NFC
Commit: 8f78dd4b92b44c490d263a4d161850853874859d
https://github.com/llvm/llvm-project/commit/8f78dd4b92b44c490d263a4d161850853874859d
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream-noopen.c
M clang/test/Analysis/stream.c
Log Message:
-----------
[clang][analyzer] Add function 'ungetc' to StreamChecker. (#77331)
`StdLibraryFunctionsChecker` is updated too with `ungetc`.
Commit: f443fbc49b8914a8453de61aea741221df9648cf
https://github.com/llvm/llvm-project/commit/f443fbc49b8914a8453de61aea741221df9648cf
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/LangOptions.def
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
A flang/test/Lower/OpenMP/nogpulib.f90
M flang/tools/bbc/bbc.cpp
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/attr.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[Flang][OpenMP][MLIR] Add support for -nogpulib option (#71045)
If -nogpulib option is passed by the user, then the OpenMP device
runtime is not used and we should not emit globals to configure
debugging at compile-time for the device runtime.
Link to -nogpulib flag implementation for Clang:
https://reviews.llvm.org/D125314
Commit: 084f1c2ee074a5ac8186ea4b5b181b48bf4621b6
https://github.com/llvm/llvm-project/commit/084f1c2ee074a5ac8186ea4b5b181b48bf4621b6
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/MC/AMDGPU/gfx11_asm_err.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
A llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa-fake16.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
Log Message:
-----------
[AMDGPU][True16] Support V_CEIL_F16. (#73108)
As not all fake instructions have their real counterparts implemented
yet, we specify no AssemblerPredicate for UseFakeTrue16Insts to allow
both fake and real True16 instructions in assembler and disassembler
tests in the -mattr=+real-true16 mode during the transition period.
Source DPP and desitnation VOPDstOperand_t16 operands are still not
supported and will be addressed separately.
Commit: d0918a20d2a85bad3cd0ec48be4b91e873bfe737
https://github.com/llvm/llvm-project/commit/d0918a20d2a85bad3cd0ec48be4b91e873bfe737
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr18xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add tests for CWG1800-1804 (#77509)
Covers C++ core issues 1800, 1801, 1802, 1803, 1804.
Commit: c69ec700adec315b3daa55742f2ef655242fa297
https://github.com/llvm/llvm-project/commit/c69ec700adec315b3daa55742f2ef655242fa297
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Format/.clang-format
M clang/lib/Format/.clang-format
M clang/tools/clang-format/.clang-format
M clang/unittests/Format/.clang-format
Log Message:
-----------
[clang-format][NFC] Don't use clang-format style in config files
The current CI doesn't use the latest clang-format and fails most
clang-format patches on the code formatting check. This patch
temporarily removes the clang-format style from the .clang-format
files.
Commit: 14435a28cd144f157ec4e6022d8c0ff0926e549f
https://github.com/llvm/llvm-project/commit/14435a28cd144f157ec4e6022d8c0ff0926e549f
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/CMakeLists.txt
Log Message:
-----------
[OpenMP] Allow setting OPENMP_INSTALL_LIBDIR (#77533)
The comment indicate that it should be possible, but as long as it
wasn't a cache variable, the cmake script overwrote whatever variable
the user had set.
Commit: be320fdf7ba9a94f6970f433ec1402cdc5cfe6b1
https://github.com/llvm/llvm-project/commit/be320fdf7ba9a94f6970f433ec1402cdc5cfe6b1
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libunwind/CMakeLists.txt
Log Message:
-----------
[libunwind] Convert a few options from CACHE PATH to CACHE STRING (#77534)
This applies the same change as in
760261a3daf98882ccbd177e3133fb4a058f47ad (where they were applied to
libcxxabi and libcxx) to libunwind as well.
These options can reasonably be set either as an absolute or relative
path, but if set as type PATH, they are rewritten from relative into
absolute relative to the build directory, while the relative form is
intended to be relative to the install prefix.
Commit: 65a56a29b6ad3d9df43df1c5a1238b1f870f24f9
https://github.com/llvm/llvm-project/commit/65a56a29b6ad3d9df43df1c5a1238b1f870f24f9
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/test/Driver/linux-ld.c
Log Message:
-----------
[clang] [Driver] Treat MuslEABIHF as a hardfloat environment wrt multiarch directories (#77536)
If using multiarch directories with musl, the multiarch directory still
uses *-linux-gnu triples - which may or may not be intentional, while it
is somewhat consistent at least.
However, for musl armhf targets, make sure that this also picks
arm-linux-gnueabihf, rather than arm-linux-gnueabi.
Commit: ef87e6643ea24103e884a71ec2f5cd2e13e0b454
https://github.com/llvm/llvm-project/commit/ef87e6643ea24103e884a71ec2f5cd2e13e0b454
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
Log Message:
-----------
[LVI] Assert that only one value is pushed (NFC)
Commit: a6b5d6dab0544892fb6afc46f71677969285c5a8
https://github.com/llvm/llvm-project/commit/a6b5d6dab0544892fb6afc46f71677969285c5a8
Author: avl-llvm <55248412+avl-llvm at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/test/tools/dsymutil/ARM/inline-source.test
Log Message:
-----------
[DWARFLinker] backport line table patch into the DWARFLinkerParallel. (#77497)
This patch backports https://github.com/llvm/llvm-project/pull/77016
into the DWARFLinkerParallel.
Commit: 7c71a09d5e712bedbed867226b3fa0bbfe789384
https://github.com/llvm/llvm-project/commit/7c71a09d5e712bedbed867226b3fa0bbfe789384
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/AssignmentTrackingAnalysis.h
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
Log Message:
-----------
[CodeGen][NewPM] Port AssignmentTrackingAnalysis to new pass manager (#77550)
Commit: 7ce010f2fb01341ab253547324e126d81d47f794
https://github.com/llvm/llvm-project/commit/7ce010f2fb01341ab253547324e126d81d47f794
Author: martinboehme <mboehme at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/Formula.h
M clang/lib/Analysis/FlowSensitive/DataflowAnalysisContext.cpp
Log Message:
-----------
Revert "[clang][dataflow] Add an early-out to `flowConditionImplies()` / `flowConditionAllows()`." (#77570)
Reverts llvm/llvm-project#77453
Commit: e22cb93890c33e21534338e4f2ea5ce640c78b77
https://github.com/llvm/llvm-project/commit/e22cb93890c33e21534338e4f2ea5ce640c78b77
Author: David Green <david.green at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
A flang/test/HLFIR/all-elemental.fir
A flang/test/HLFIR/any-elemental.fir
Log Message:
-----------
[Flang] Any and All elemental lowering (#75776)
This is an extension of https://github.com/llvm/llvm-project/pull/75774,
with Any and All lowering added alongside Count.
Commit: a26cc759ae5a8018e2c328cf53173992340b995a
https://github.com/llvm/llvm-project/commit/a26cc759ae5a8018e2c328cf53173992340b995a
Author: Hana Dusíková <hanicka at hanicka.net>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Stmt.h
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CoverageMapping/if.cpp
Log Message:
-----------
[clang][coverage] Fix "if constexpr" and "if consteval" coverage report (#77214)
Replace the discarded statement by an empty compound statement so we can keep track of the
whole source range we need to skip in coverage
Fixes #54419
Commit: e2b896aa640fec25f68d283948c1b44711087f0f
https://github.com/llvm/llvm-project/commit/e2b896aa640fec25f68d283948c1b44711087f0f
Author: Yi Wu <43659785+yi-wu-arm at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
A flang/include/flang/Optimizer/Builder/Runtime/Execute.h
A flang/include/flang/Runtime/execute.h
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/lib/Optimizer/Builder/Runtime/Execute.cpp
M flang/runtime/CMakeLists.txt
M flang/runtime/command.cpp
A flang/runtime/execute.cpp
M flang/runtime/tools.cpp
M flang/runtime/tools.h
A flang/test/Lower/Intrinsics/execute_command_line-optional.f90
A flang/test/Lower/Intrinsics/execute_command_line.f90
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang] Add EXECUTE_COMMAND_LINE runtime and lowering intrinsics implementation (#74077)
This patch add support of intrinsics Fortran 2008 EXECUTE_COMMAND_LINE.
The patch contains both the lowering and the runtime code and works on
both Windows and Linux. The patch contains a list of commits, to convey
the authorship and the history of changes. Some implementation specifics
or status has been added to `flang/docs/Intrinsics.md`.
I have provided a summary of the usage and the options required for the
`EXECUTE_COMMAND_LINE intrinsic`. The intrinsic supports both a
synchronous
(by default) and an asynchronous option.
| System | Mode | Implemention |
|---------|-------|---------------------------|
| Linux | Sync | std::system() |
| Windows | Sync | std::system() |
| Linux | Async | fork() |
| Windows | Async | CreateProcess |
Support for the SYSTEM GNU extension will be added in a separate PR.
Co-authored with @jeffhammond
---------
Signed-off-by: Jeff Hammond <jeff.science at gmail.com>
Co-authored-by: Jeff Hammond <jeff.science at gmail.com>
Co-authored-by: Yi Wu <yiwu02 at wdev-yiwu02.arm.com>
Commit: ccaf9e0bc0a4739170584d995f9de98bf3beb1f9
https://github.com/llvm/llvm-project/commit/ccaf9e0bc0a4739170584d995f9de98bf3beb1f9
Author: David Sherwood <57997763+david-arm at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.cpp
M llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
Log Message:
-----------
[AArch64] Enable AArch64 loop idiom transform pass (#77480)
Following on from
https://github.com/llvm/llvm-project/pull/72273
which added the new AArch64 loop idiom transformation pass, this patch
enables the pass by default for AArch64.
Commit: 38394a3d0b8b9a1fdc444bdebeba17a19250997d
https://github.com/llvm/llvm-project/commit/38394a3d0b8b9a1fdc444bdebeba17a19250997d
Author: Lu Weining <luweining at loongson.cn>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Target.h
M lld/test/ELF/loongarch-pc-aligned.s
Log Message:
-----------
[lld][LoongArch] Handle extreme code model relocs according to psABI v2.30 (#73387)
psABI v2.30 requires the extreme code model instructions sequence
(pcalau12i+addi.d+lu32i.d+lu52i.d) to be adjacent.
See https://github.com/llvm/llvm-project/pull/71907 and
https://github.com/loongson-community/discussions/issues/17 for details.
Commit: 53d48902bc6b05cc284f767089fe070ada651910
https://github.com/llvm/llvm-project/commit/53d48902bc6b05cc284f767089fe070ada651910
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
Log Message:
-----------
[mlir][ArmSME] Add arm_sme.streaming_vl operation (#77321)
This operation provides a convenient way to query the streaming vector
length regardless of the streaming mode. This most useful for functions
that call/pass data to streaming functions, but are not streaming
themselves.
Example:
```mlir
%svl_w = arm_sme.streaming_vl <word>
```
Created based on discussion here:
https://github.com/llvm/llvm-project/pull/76086#discussion_r1434226352
Commit: 76482b74400cccae10d30195f6613f2bf538a43f
https://github.com/llvm/llvm-project/commit/76482b74400cccae10d30195f6613f2bf538a43f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
Log Message:
-----------
[SLSR] Regenerate test checks (NFC)
Commit: 9bc4355f091b530625ec6839a8c4858b6de4f1b4
https://github.com/llvm/llvm-project/commit/9bc4355f091b530625ec6839a8c4858b6de4f1b4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
Log Message:
-----------
[SLSR] Always generate i8 GEPs
Always generate canonical i8 GEPs. Especially as this is a backend
pass, trying to generate a "nice" GEP representation is not useful.
Commit: c2654befcaecba121ca40415d157925e0da05b5e
https://github.com/llvm/llvm-project/commit/c2654befcaecba121ca40415d157925e0da05b5e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
Log Message:
-----------
[SeparateConstOFfsetFromGEP] Regenerate test checks (NFC)
Commit: 5cc03442d392693d0d2457f571cc8fa1736bfe5e
https://github.com/llvm/llvm-project/commit/5cc03442d392693d0d2457f571cc8fa1736bfe5e
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
Log Message:
-----------
[clang-repl] Enable native CPU detection by default (#77491)
We can pass `-mcpu=native` to the clang driver to let it consider the
host CPU when choosing the compile target for `clang-repl`. We can
already achieve this behavior with `clang-repl -Xcc -mcpu=native`, but
it seems like a reasonable default actually.
The trade-off between optimizing for a specific CPU and maximum
compatibility often leans towards the latter for static binaries,
because distributing many versions is cumbersome. However, when
compiling at runtime, we know the exact target CPU and we can use that
to optimize the generated code.
This patch makes a difference especially for "scattered" architectures
like ARM. When cross-compiling for a Raspberry Pi for example, we may
use a stock toolchain like arm-linux-gnueabihf-gcc. The resulting binary
will be compatible with all hardware versions. This is handy, but they
will all have `arm-linux-gnueabihf` as their host triple. Previously,
this caused the clang driver to select triple `armv6kz-linux-gnueabihf`
and CPU `arm1176jzf-s` as the REPL target. After this patch the default
triple and CPU on Raspberry Pi 4b will be `armv8a-linux-gnueabihf` and
`cortex-a72` respectively.
With this patch clang-repl matches the host detection in Orc.
Commit: 08da7ac80c165dbae0cb71257b3cdcd8a1006a76
https://github.com/llvm/llvm-project/commit/08da7ac80c165dbae0cb71257b3cdcd8a1006a76
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
Log Message:
-----------
[AMDGPU] Fix broken sign-extended subword buffer load combine (#77470)
Commit: 9e5a77f252badfc932d1e28ee998746072ddc33f
https://github.com/llvm/llvm-project/commit/9e5a77f252badfc932d1e28ee998746072ddc33f
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AArch64/scalable-vector-geps.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
Log Message:
-----------
[SeparateConstOffsetFromGEP] Always emit i8 gep
Always emit canonical i8 GEPs, don't try to preserve the original
element type. As this is a backend pass, trying to preserve the
type is not useful.
Commit: 29f98d6c25e237d311038ce225f0b3109925d400
https://github.com/llvm/llvm-project/commit/29f98d6c25e237d311038ce225f0b3109925d400
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/bitreverse-known-bits.ll
A llvm/test/Transforms/InstCombine/bitwiselogic-bitmanip.ll
M llvm/test/Transforms/InstCombine/bswap-fold.ll
Log Message:
-----------
[InstCombine] Fold bitwise logic with intrinsics (#77460)
This patch does the following folds:
```
bitwise(fshl (A, B, ShAmt), fshl(C, D, ShAmt)) -> fshl(bitwise(A, C), bitwise(B, D), ShAmt)
bitwise(fshr (A, B, ShAmt), fshr(C, D, ShAmt)) -> fshr(bitwise(A, C), bitwise(B, D), ShAmt)
bitwise(bswap(A), bswap(B)) -> bswap(bitwise(A, B))
bitwise(bswap(A), C) -> bswap(bitwise(A, bswap(C)))
bitwise(bitreverse(A), bitreverse(B)) -> bitreverse(bitwise(A, B))
bitwise(bitreverse(A), C) -> bitreverse(bitwise(A, bitreverse(C)))
```
Alive2: https://alive2.llvm.org/ce/z/iZN_TL
Commit: adfd13157dac4f512f579c14de8da6c7c0c9b698
https://github.com/llvm/llvm-project/commit/adfd13157dac4f512f579c14de8da6c7c0c9b698
Author: Mark Harley <mark.harley at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-m-forms-no-active-lanes.ll
Log Message:
-----------
[AArch64][SVE] Add optimisation for SVE intrinsics with no active lanes (#73964)
This patch introduces optimisations for SVE intrinsic function calls
which have all false predicates.
Commit: 78cf2c041b778c82cc01b8606ec3e68840b769af
https://github.com/llvm/llvm-project/commit/78cf2c041b778c82cc01b8606ec3e68840b769af
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/pr77459.ll
Log Message:
-----------
[X86] pr77459.ll - add missing AVX512 check prefixes
Missed these in 3210ce276350a247220b193db12a9b45d1034724 for the #77459 fix
Commit: 5b4abae7630572c96a736faa1f09b1a3c37201a2
https://github.com/llvm/llvm-project/commit/5b4abae7630572c96a736faa1f09b1a3c37201a2
Author: darkfeline <darkfeline at felesatra.moe>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang-tools-extra/clang-include-fixer/tool/clang-include-fixer.el
M clang/tools/clang-format/clang-format.el
M clang/tools/clang-rename/clang-rename.el
M llvm/utils/emacs/tablegen-mode.el
M mlir/utils/emacs/mlir-lsp-client.el
M mlir/utils/emacs/mlir-mode.el
Log Message:
-----------
[emacs] Fix Emacs library formatting (#76110)
This makes it easier to ship/install these using the builtin Emacs
package format (in particular, a Version is required).
Commit: 205aa3fb89769c703c14ff448cb7bff73438488f
https://github.com/llvm/llvm-project/commit/205aa3fb89769c703c14ff448cb7bff73438488f
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/docs/GettingStarted.md
Log Message:
-----------
[flang] Document DEFAULT_SYSROOT usage on Darwin (#77353)
Commit: 1220c9bafc11a3edf96921a8ab892d777b7ed06b
https://github.com/llvm/llvm-project/commit/1220c9bafc11a3edf96921a8ab892d777b7ed06b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
A llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
Log Message:
-----------
[InstCombine] Fold the `log2_ceil` idiom (#76661)
This patch folds the `log2_ceil` idiom:
```
(BW - ctlz(A)) + (is_power2(A) ? 0 : 1) ->
zext(ctpop(A) >u/!= 1) + (ctlz(A, true) ^ (BW - 1)) (canonical form) ->
BW - ctlz(A - 1, false)
```
Alive2: https://alive2.llvm.org/ce/z/6mSbdi
Commit: c933bd818594c872435d6f1d2cc5ad18715a8986
https://github.com/llvm/llvm-project/commit/c933bd818594c872435d6f1d2cc5ad18715a8986
Author: Thomas Raoux <thomas.raoux at openai.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/test/Dialect/SCF/loop-pipelining.mlir
Log Message:
-----------
[MLIR][SCF] Add checks to verify that the pipeliner schedule is correct. (#77083)
Add a check to validate that the schedule passed to the pipeliner
transformation is valid and won't cause the pipeliner to break SSA.
This checks that the for each operation in the loop operations are
scheduled after their operands.
Commit: 19044b099db0882af788d44bf2369a5becf47b00
https://github.com/llvm/llvm-project/commit/19044b099db0882af788d44bf2369a5becf47b00
Author: Maciej Gabka <maciej.gabka at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/VecFuncs.def
Log Message:
-----------
[NFC][TLI] order SLEEF and ArmPL mappings by alphabetical order (#77500)
To make checking test easier, it is better to keep an order of the TLI
mappings. This patch sorts all variants of the SLEEF and ArmPL mappings
in the order of their base names.
This patch also removes some extra inconsistent whitespace added to some
of the entries.
Commit: 77753750033632e353e17948457433efd67f92de
https://github.com/llvm/llvm-project/commit/77753750033632e353e17948457433efd67f92de
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/docs/GettingStarted.md
Log Message:
-----------
[flang][doc] Correct spelling of CMake
Commit: cc21aa1922b3d0c4fde52046d8d16d1048f8064e
https://github.com/llvm/llvm-project/commit/cc21aa1922b3d0c4fde52046d8d16d1048f8064e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr77459.ll
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
Log Message:
-----------
[X86] lower1BitShuffle - fold permute(setcc(x,y)) -> setcc(permute(x),permute(y)) for 32/64-bit element vectors
Noticed in #77459 - for wider element types, its usually better to pre-shuffle the comparison arguments if we can, like we already for broadcasts
Commit: b8dca4fa729fcbd5d42ce3ca056dc4d278da2548
https://github.com/llvm/llvm-project/commit/b8dca4fa729fcbd5d42ce3ca056dc4d278da2548
Author: Vivek Khandelwal <vivekkhandelwal1424 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/test/Conversion/MathToLibm/convert-to-libm.mlir
Log Message:
-----------
[mlir][math] Add math.acosh|asin|asinh|atanh op (#77463)
Signed-Off By: Vivek Khandelwal <vivekkhandelwal1424 at gmail.com>
Commit: 60bb5c54f6e1eeed0aae7917d10f746ee8135d9d
https://github.com/llvm/llvm-project/commit/60bb5c54f6e1eeed0aae7917d10f746ee8135d9d
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
Log Message:
-----------
[AMDGPU] Fix predicates for various True16 instructions. (#77581)
Resolves AsmParser ambiguities, e.g., between
V_SUBREV_F16_t16_dpp8_gfx11 and V_SUBREV_F16_t16_dpp8_gfx12.
Part of <https://github.com/llvm/llvm-project/issues/69256>.
Commit: 5c0b3a0cb7f70db3ebcd195596e5fadc12d0bc9c
https://github.com/llvm/llvm-project/commit/5c0b3a0cb7f70db3ebcd195596e5fadc12d0bc9c
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
Log Message:
-----------
[lldb][ClangASTImporter][NFC] Remove redundant do-while loop (#77596)
This seems to have always been a redundant do-while since its
introduction in `2e93a2ad2148d19337bf5f9885e46e3c00e8ab82`.
Commit: d65a7d1f1a2139f927949ab6b1a9d90113de9a90
https://github.com/llvm/llvm-project/commit/d65a7d1f1a2139f927949ab6b1a9d90113de9a90
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/CMakeLists.txt
Log Message:
-----------
[Libomptarget] Do not run CPU tests if FFI was not found
Summary:
The previous behaviour before I made it dynamically open libFFI was that
these tests would be ignored if FFI was not found. This now allows tests
to be run without the dependency and thus the tests fails on some
buildbots. This simply makesit not build the tests if it's not present.
Commit: 9aa8c82748bfb313598e71476123b785f6da41b9
https://github.com/llvm/llvm-project/commit/9aa8c82748bfb313598e71476123b785f6da41b9
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
A llvm/test/CodeGen/SystemZ/shift-16.ll
Log Message:
-----------
[SystemZ] Fix 256-bit shifts when i128 is legal
When i128 is a legal type, SelectionDAG now attempts to use
SRL_PARTS etc. with type i128, which is not implemented. Fix
by marking those as Expand, just like we do for i64.
Fixes https://github.com/llvm/llvm-project/issues/77132
Commit: ae978baaf6cc5566036b89ceaadcabb47361ba2f
https://github.com/llvm/llvm-project/commit/ae978baaf6cc5566036b89ceaadcabb47361ba2f
Author: John Brawn <john.brawn at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/Scalar/LoopFlatten.cpp
A llvm/test/Transforms/LoopFlatten/loop-flatten-gep.ll
Log Message:
-----------
[LoopFlatten] Recognise gep+gep (#72515)
Now that InstCombine canonicalises add+gep to gep+gep, LoopFlatten needs
to recognise (gep (gep ptr (i*M)), j) as being something it can
optimise.
Commit: 9bde5becb44ea071f5e1fa1f5d4071dc8788b18c
https://github.com/llvm/llvm-project/commit/9bde5becb44ea071f5e1fa1f5d4071dc8788b18c
Author: HaohaiWen <haohai.wen at intel.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/branchfolding-landingpad-cfg.mir
Log Message:
-----------
[BranchFolding][SEH] Add test to track SEH CFG optimization (#77598)
This test tracks BranchFolding pass which removes fall through jump and
leaves landing-pad to be machine basic block of no predecessors. It
would raise bug as introduced in #77441.
Commit: 113bce0c79fe5cc2b949949c5d96b7f679524b6e
https://github.com/llvm/llvm-project/commit/113bce0c79fe5cc2b949949c5d96b7f679524b6e
Author: Prathamesh Tagore <63031630+meshtag at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
Log Message:
-----------
[mlir][tensor] Fold producer linalg transpose with consumer tensor pack (#75658)
Successor to https://github.com/llvm/llvm-project/pull/74206
Partial fix to https://github.com/openxla/iree/issues/15367
Commit: 45be680b1ae51866568b1794fa6f59190042ee92
https://github.com/llvm/llvm-project/commit/45be680b1ae51866568b1794fa6f59190042ee92
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/rangereduce.ll
Log Message:
-----------
[SimplifyCFG] Emit `rotl` directly in `ReduceSwitchRange` (#77603)
This patch emits `ROTL(Cond, BitWidth - Shift)` directly in
`ReduceSwitchRange`. This should give better codegen because
`SimplifyDemandedBits` will break the rotation patterns in the original
form.
See also https://github.com/llvm/llvm-project/pull/73441 and the IR diff
https://github.com/dtcxzyw/llvm-opt-benchmark/pull/115/files.
This patch should cover most of cases handled by #73441.
Commit: fef2fc3400eb5a22a5ccc96bd3862bec0058d305
https://github.com/llvm/llvm-project/commit/fef2fc3400eb5a22a5ccc96bd3862bec0058d305
Author: Visoiu Mistrih Francis <890283+francisvm at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/TableGen/Record.cpp
M llvm/test/TableGen/getsetop.td
Log Message:
-----------
[TableGen] Support non-def operators in !getdagop (#77531)
`!getdagop` expects the dag operator to be a def, and errors out if it's
not.
While that's true in most cases, when multiclasses are involved, the
late resolution of the dag operator can result in it not being a def
yet, but still have a proper type, wich is required to check against the
optional parameter Ty in `!getdagop<Ty>`.
e.g, in the following dag:
```
(!cast<TestInstruction>(TestInstructionAndPattern::NAME) foo)
```
the operator is a UnOpInit, but all we need here is to check its type.
This fixes a bug where !getdagop is used to query the dag operator that
is dependent on the multiclass, which is not yet resolved to a def. Once
the folding is performed, the field becomes a record that can be
queried.
Commit: 79aa77626770c91badd7c9ba9d26e55a28d34416
https://github.com/llvm/llvm-project/commit/79aa77626770c91badd7c9ba9d26e55a28d34416
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
A mlir/include/mlir/Dialect/Mesh/Transforms/Transforms.h
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
A mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
A mlir/test/Dialect/Mesh/process-multi-index-op-lowering.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/lib/Dialect/Mesh/CMakeLists.txt
A mlir/test/lib/Dialect/Mesh/TestProcessMultiIndexOpLowering.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][mesh] Add lowering of process multi-index op (#77490)
* Rename mesh.process_index -> mesh.process_multi_index.
* Add mesh.process_linear_index op.
* Add lowering of mesh.process_multi_index into an expression using
mesh.process_linear_index, mesh.cluster_shape and
affine.delinearize_index.
This is useful to lower mesh ops and prepare them for further lowering
where the runtime may have only the linear index of a device/process.
For example in MPI we have a rank (linear index) in a communicator.
Commit: 8b7bbedec7bcfbeaee4ab9b74471cbbbc8633e1a
https://github.com/llvm/llvm-project/commit/8b7bbedec7bcfbeaee4ab9b74471cbbbc8633e1a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Re-add early exit in VPRecipeBuilder::createBlockInMask.
Re-add early exit that was accidentally dropped in 51afb10.
Commit: 14e291000f96c20e35ef494bd407f459b4617fca
https://github.com/llvm/llvm-project/commit/14e291000f96c20e35ef494bd407f459b4617fca
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/include/llvm/Support/RISCVISAInfo.h
Log Message:
-----------
[RISCV] Remove extraneous semicolons. NFC
Commit: 6876fe53afabfc6f0c3b5e7c838f32a282da6f77
https://github.com/llvm/llvm-project/commit/6876fe53afabfc6f0c3b5e7c838f32a282da6f77
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
A mlir/test/Dialect/Linalg/transform-op-peel-and-vectorize.mlir
Log Message:
-----------
[mlir][linalg] Add a test to demonstrate peeling + vectorisation (#77590)
Following on from #75842, we can demonstrate that loop peeling combined
with masked vectorisation and existing canonicalization for vector.mask
operations leads to the following loop structure:
```
// M dimension
scf.for 1:M
// N dimension (contains vector ops _without_ masking)
scf.for 1:UB
// K dimension
scf.for 1:K
vector.add
// N dimension (contains vector ops _with_ masking)
scf.for UB:N
// K dimension
scf.for 1:K
vector.mask { vector.add }
```
This is particularly beneficial for scalable vectors which normally
require masking. This example demonstrates how to avoid them.
Commit: 73ce13d79bb6f200d6dde61a88369daf74c7a39e
https://github.com/llvm/llvm-project/commit/73ce13d79bb6f200d6dde61a88369daf74c7a39e
Author: Alexey Bataev <5361294+alexey-bataev at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
Log Message:
-----------
[SLP][TTI]Improve detection of the insert-subvector pattern for SLP. (#74749)
SLP vectorizer passes the type of the subvector and the mask, which size
determines the size of the resulting vector. TTI should support this
pattern to improve cost estimation of the insert_subvector shuffle
pattern.
Commit: 6c92770a80257018df69369fd617628c80b9fa18
https://github.com/llvm/llvm-project/commit/6c92770a80257018df69369fd617628c80b9fa18
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
Log Message:
-----------
[RewriteStatepointsForGC] Remove unnecessary bitcasts (NFCI)
Commit: d301539b777c5047d1420003b4ab1e05a1f87166
https://github.com/llvm/llvm-project/commit/d301539b777c5047d1420003b4ab1e05a1f87166
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/docs/TestingLibcxx.rst
M libcxx/utils/libcxx/test/format.py
Log Message:
-----------
[libc++][docs] Document the libc++ Lit testing format naming scheme (#73136)
As a new contributor, I found it hard to find the documentation for the
meaning of the names of different tests and how those names translate to
Lit. This patch moves the documentation to the RST documentation we
publish on the website instead of leaving it in the source code only.
Commit: 5934a6ee5967f795634d5161d46da8412be96404
https://github.com/llvm/llvm-project/commit/5934a6ee5967f795634d5161d46da8412be96404
Author: Paul T Robinson <paul.robinson at sony.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/Headers/ia32intrin.h
Log Message:
-----------
[Headers][X86] Reformat ia32intrin.h doc to match the other headers (#77525)
Doxygen comment style for every other intrinsic-function header uses ///
comments, so change ia32intrin.h from the /** style to /// style. While
I was in there, change `<c> INSTR </c>` to `\c INSTR` and toss in a few
missing full-stops.
Commit: 0d6412eae32777cd892a1a9ed016a07e68eaa191
https://github.com/llvm/llvm-project/commit/0d6412eae32777cd892a1a9ed016a07e68eaa191
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/libomptarget/src/omptarget.cpp
Log Message:
-----------
[Libomptarget] Add error message back in after changes (#77528)
Summary:
My previous reworking of the image hangling removed the image info which
was originally used for this extra error message requested by Ye Luo. I
have since added in the necessary ELF facilities to extract it from the
object file and can add it back in. It's a little verbose mostly from
needing to shuffle around types and potential errors.
Commit: d03b8c3a048262eae1b13be829e20971e1714ade
https://github.com/llvm/llvm-project/commit/d03b8c3a048262eae1b13be829e20971e1714ade
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/libomptarget/DeviceRTL/include/State.h
M openmp/libomptarget/DeviceRTL/src/Kernel.cpp
M openmp/libomptarget/DeviceRTL/src/Parallelism.cpp
M openmp/libomptarget/DeviceRTL/src/Reduction.cpp
M openmp/libomptarget/include/Shared/Profile.h
M openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/common/include/GlobalHandler.h
M openmp/libomptarget/plugins-nextgen/common/src/JIT.cpp
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/plugins-nextgen/cuda/src/rtl.cpp
M openmp/libomptarget/plugins-nextgen/generic-elf-64bit/src/rtl.cpp
M openmp/libomptarget/src/OpenMP/Mapping.cpp
M openmp/libomptarget/src/OpenMP/OMPT/Callback.cpp
M openmp/libomptarget/src/device.cpp
M openmp/libomptarget/src/interface.cpp
M openmp/libomptarget/src/omptarget.cpp
M openmp/libomptarget/tools/kernelreplay/llvm-omp-kernel-replay.cpp
Log Message:
-----------
[Libomptarget][NFC] Format in-line comments consistently (#77530)
Summary:
The LLVM style uses /*Foo=*/ when indicating the name of a constant. See
https://llvm.org/docs/CodingStandards.html#comment-formatting. This is
useful for consistency, as well as because `clang-format` understands
this syntax and formats it more cleanly. Do a bulk update of this
syntax.
Commit: d4b4ded1867768ecb2c857ae9c2593764d7f3e41
https://github.com/llvm/llvm-project/commit/d4b4ded1867768ecb2c857ae9c2593764d7f3e41
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M flang/include/flang/Parser/format-specification.h
Log Message:
-----------
[Flang][Parser] Add missing #include "flang/Common/idioms.h" (#77484)
The file format-specification.h uses definitions from Fortran::common,
but doesn't include any headers that provide them.
Commit: 2472c45ba38828ee084360d52705955ff763e5b0
https://github.com/llvm/llvm-project/commit/2472c45ba38828ee084360d52705955ff763e5b0
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Utils/IndexingUtils.h
M mlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/Dialect/Utils/IndexingUtils.cpp
M mlir/test/Dialect/Tensor/simplify-pack-unpack.mlir
Log Message:
-----------
[mlir][tensor] Enhance pack/unpack simplification for identity outer_dims_perm cases. (#77409)
They can be simplified to reshape ops if outer_dims_perm is an identity
permutation. The revision adds a `isIdentityPermutation` method to
IndexingUtils.
Commit: fb1523e7120aeb9584eef5b3241f03f1cadff62b
https://github.com/llvm/llvm-project/commit/fb1523e7120aeb9584eef5b3241f03f1cadff62b
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Port 79aa77626770c91badd7c9ba9d26e55a28d34416
Commit: 1d5106d69cf475215887c42834158d710e586f1b
https://github.com/llvm/llvm-project/commit/1d5106d69cf475215887c42834158d710e586f1b
Author: Frederik Carlier <frederik.carlier at keysight.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
A clang/test/CodeGenObjC/exceptions-personality.m
M clang/test/CodeGenObjC/personality.m
M clang/test/CodeGenObjCXX/personality.mm
Log Message:
-----------
Objective C: use C++ exceptions on MinGW+GNUstep (#77255)
The GNUstep Objective C runtime (libobjc2) is adding support for the GNU
ABI on Windows (more specifically, MinGW). The libobjc2 runtime uses C++
exceptions in that configuration; this PR updates clang to act
accordingly.
The corresponding change to libobjc2 is here:
https://github.com/gnustep/libobjc2/pull/267
Commit: af78e5daf0791135485dbd7972ffedb927727a6b
https://github.com/llvm/llvm-project/commit/af78e5daf0791135485dbd7972ffedb927727a6b
Author: Tai Ly <tai.ly at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/lib/Dialect/Tosa/TosaTestPasses.cpp
Log Message:
-----------
[mlir][tosa]Fix Rescale shift attr data type (#71084)
Change Rescale shift attribute to be DenseI8ArrayAttr to match spec
(instead of DenseI32ArrayAttr)
This replaces https://reviews.llvm.org/D157439
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: d7ac4123333a5bc042b2eb9e17df8f723f6b56d9
https://github.com/llvm/llvm-project/commit/d7ac4123333a5bc042b2eb9e17df8f723f6b56d9
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve2-min-max-clamp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-sclamp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uclamp.ll
Log Message:
-----------
[AArch64][SME] Fix definition of uclamp/sclamp instructions. (#77619)
For some reason the arguments were in the wrong order.
Commit: 14e7dac92a32f900a66cb868be89c964b687a825
https://github.com/llvm/llvm-project/commit/14e7dac92a32f900a66cb868be89c964b687a825
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1_single.c
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-extq.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-st1-single.ll
Log Message:
-----------
[Clang][LLVM][AArch64]SVE2.1 update the intrinsics according to acle[1] (#76844)
This patch changes the following intrinsic
```svst1uwq[_{d}] replaced by svst1wq[_{d}]
svst1uwq_vnum[_{d}] replaced by svst1wq_vnum[_{d}]
svst1udq[_{d}] replaced by svst1dq[_{d}]
svst1udq_vnum[_{d}] replaced by svst1dq_vnum[_{d}]
```
Drops 'u' from the quadword stores because it is simply truncating the
quadwords to 32 bits
```
svextq_lane[_{d}] replaced by svextq[_{d}]
```
EXTQ follows the previous defined EXT intrinsics
```
svdot[_{d}_{2}_{3}] replaced by svdot[_{d}_{2}]
```
Introduced with the latest SME2 ACLE change
[1]https://github.com/ARM-software/acle/pull/257
Commit: c053e9f0f4b56a56582ad149a8c89434126eff7f
https://github.com/llvm/llvm-project/commit/c053e9f0f4b56a56582ad149a8c89434126eff7f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/test/MC/RISCV/rv32zacas-invalid.s
M llvm/test/MC/RISCV/rv64zacas-invalid.s
Log Message:
-----------
[RISCV] Re-implement Zacas MC layer support to make it usable for CodeGen. (#77418)
This changes the register class to GPRPair and adds the destination
register as a source with a tied operand constraint.
Parsing for the paired register is done with a custom parser that
checks for even register and converts it to its pair version. A
bit of care needs to be taken so that we only parse as a pair register
based on which instruction we're parsing and the mode in the subtarget.
This allows amocas.w to be parsed correcty in both modes.
I've added a FIXME to note that we should be creating pair registers
for Zdinx on RV32 to match the instructions CodeGen generates.
Commit: 6bc7e3764c244b3d6ba2ab861889d80082766017
https://github.com/llvm/llvm-project/commit/6bc7e3764c244b3d6ba2ab861889d80082766017
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
Log Message:
-----------
[MLIR][Tensor] Fix checks for `fold-into-pack-and-unpack.mlir` (#77622)
Fix after 113bce0
Commit: 7cc9ae95512edd0b969823fdfa062b92cb3c4d4e
https://github.com/llvm/llvm-project/commit/7cc9ae95512edd0b969823fdfa062b92cb3c4d4e
Author: Okwan Kwon <okkwon at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Complex/IR/ComplexDialect.cpp
M mlir/test/Transforms/inlining.mlir
Log Message:
-----------
[mlir] allow inlining complex ops (#77514)
Complex ops are pure ops just like the arithmetic ops so they can be
inlined.
Commit: 2c60d59864ed8b2b26c4f0683ee7a1816c6d951e
https://github.com/llvm/llvm-project/commit/2c60d59864ed8b2b26c4f0683ee7a1816c6d951e
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M flang/test/Driver/driver-help-hidden.f90
M flang/test/Driver/driver-help.f90
A flang/test/Driver/riscv-rvv-vector-bits.f90
Log Message:
-----------
[Flang] Support -mrvv-vector-bits flag (#77588)
This patch adds support for the -mrvv-vector-bits flag in the Flang
driver, and
translates them to -mvscale-min/-mvscale-max.
The code was copied from the Clang toolchain (similarly to what was done
for
AArch64's -msve-vector-bits flag) so it also supports the same
-mrvv-vector-bits=zvl mode.
Note that Flang doesn't yet define the __riscv_v_fixed_vlen macro, so
the help
text has been updated to highlight that it's only defined for Clang.
Commit: e203968e411bba6395133d93881eb32e7895e50b
https://github.com/llvm/llvm-project/commit/e203968e411bba6395133d93881eb32e7895e50b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Libomptarget] Do not abort on failed plugin init (#77623)
Summary:
The current code logic is supposed to skip plugins that aren't found or
could not be loaded. However, the plugic ontained a call to `abort` if
it failed, which prevented us from continuing if initilalization the
plugin failed (such as if `dlopen` failed for the dyanmic plugins).
Commit: 6a075a9d5dda8f6ce37b176c6d4a7f87a770ec31
https://github.com/llvm/llvm-project/commit/6a075a9d5dda8f6ce37b176c6d4a7f87a770ec31
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM]: Update setmaxregister NVVM Op (#77594)
This patch updates the setmaxregister NVVM Op to use the
intrinsics instead of inline-ptx.
* The interface remains same (as expected).
* Tests are added to verify the lowered intrinsics in
Target/LLVMIR/nvvmir.mlir.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: f502b981b471c04bef1b2a6c581c02b59f931163
https://github.com/llvm/llvm-project/commit/f502b981b471c04bef1b2a6c581c02b59f931163
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/test/libcxx/ranges/range.utility.helpers/simple_view.compile.pass.cpp
Log Message:
-----------
[libc++][NFC] Add comment in test to explain the presence of some assertions
Commit: cd7eaaa6db0dc9a00a097ba8e6ebad6fb2dec56a
https://github.com/llvm/llvm-project/commit/cd7eaaa6db0dc9a00a097ba8e6ebad6fb2dec56a
Author: Pete Lawrence <plawrence at apple.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lldb/include/lldb/Utility/StreamString.h
M lldb/source/Utility/StreamString.cpp
Log Message:
-----------
[lldb] Add color support to StreamString (#77380)
This change just adds a `bool colors` parameter to the `StreamString`
class's constructor, which it passes up to its superclass’s constructor.
I'm working on another patch that prints out error messages using a
`StreamString` but I wasn't getting colorized text because of this
missing implementation detail.
rdar://120671168
Commit: 1c209322e462c1d1675cc4b9947712dcceac93b5
https://github.com/llvm/llvm-project/commit/1c209322e462c1d1675cc4b9947712dcceac93b5
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/include/llvm/ADT/StringRef.h
M llvm/unittests/ADT/StringRefTest.cpp
Log Message:
-----------
[ADT] Make StringRef std::string_view conversion operator constexpr. NFC (#77506)
This would allow us to compare StringRefs via std::string_view, avoiding
having
to make the existing StringRef compare machinery constexpr for now.
Commit: cac6b1a5420d76f4635696372849dbbf07a77376
https://github.com/llvm/llvm-project/commit/cac6b1a5420d76f4635696372849dbbf07a77376
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-cache-construct.c
M clang/test/ParserOpenACC/parse-cache-construct.cpp
Log Message:
-----------
[OpenACC] Implement 'var' parsing correctly, support array sections (#77617)
While investigating implementing 'var-list' generically for the variety
of clauses that support this syntax (an extensive list!) I discovered
that it includes 'compound types' and members of compound types, as well
as array sections.
This patch genericizes that function, and implements it in terms of an
assignment expression, and enables a simplified version of OMP Array
Sections for it. OpenACC only supports a startidx + length, so this
patch implements that parsing.
However, it is currently still being represented as an OpenMP Array
Section, which is semantically very similar. It is my intent to come
back and genericize the OMP Array Sections types (or create a similar
expression node) in the future when dealing with Sema.
At the moment, the only obvious problem with it is that the diagnostic
for using it in the 'wrong' place says OpenMP instead of OpenACC, which
I intend to fix when I deal with the AST node changes.
Commit: 761b9d9e4631aa85f932e5ee33aae1f7b8a0538e
https://github.com/llvm/llvm-project/commit/761b9d9e4631aa85f932e5ee33aae1f7b8a0538e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/include/__config
M libcxx/include/cstdio
Log Message:
-----------
[libc++] Remove _LIBCPP_C_HAS_NO_GETS (#77346)
Since we use _LIBCPP_USING_IF_EXISTS to handle missing C library functions
now, _LIBCPP_C_HAS_NO_GETS shouldn't be necessary anymore.
See the discussion thread in #77242 for more details.
Commit: 04f77a1320e14560543e3b876f11804fa50a45ff
https://github.com/llvm/llvm-project/commit/04f77a1320e14560543e3b876f11804fa50a45ff
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
Log Message:
-----------
[SLP][NFC]Replace constant by some meaningfull values to make test more
relevant, NFC.
Commit: 004ec8ea1e9bd775246dba4eb93c1025bedaa5bd
https://github.com/llvm/llvm-project/commit/004ec8ea1e9bd775246dba4eb93c1025bedaa5bd
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
Log Message:
-----------
[ci] Set timeout for individual tests and report slowest tests (#76300)
There are builds like
https://buildkite.com/llvm-project/github-pull-requests/builds/24894
It looks like a deadlock in a test, but we can't see which one.
`--timeout=` will make lit kill and report such tests.
`--time-tests` produces nice report about slowest test, so we can tune
them over time.
The same build as above with new flags
https://buildkite.com/llvm-project/github-pull-requests/builds/24961
Commit: f1e4142f930a4c9d301061a1c31c9a8853f28d83
https://github.com/llvm/llvm-project/commit/f1e4142f930a4c9d301061a1c31c9a8853f28d83
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingPlatformLinux.c
Log Message:
-----------
[compiler-rt][profile] remove unneeded freebsd hack. (#77209)
Commit: c1d02bd1479e669f6622f3f9b5b52423ae9631a1
https://github.com/llvm/llvm-project/commit/c1d02bd1479e669f6622f3f9b5b52423ae9631a1
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Parser.h
M mlir/lib/AsmParser/ParserState.h
Log Message:
-----------
[mlir] Change end of OperationDefinition. (#77273)
Store the last token parsed in the parser state so that the range parsed
can utilize its end rather than the start of the token after parsed.
This results in a tighter range (especially true in the case of
comments, see
```mlir
|%c4 = arith.constant 4 : index
// Foo
|
```
vs
```mlir
|%c4 = arith.constant 4 : index|
```
).
Discovered while working on a little textual post processing tool.
Commit: 5c9b713394486be91dc181062e5c01d696c30787
https://github.com/llvm/llvm-project/commit/5c9b713394486be91dc181062e5c01d696c30787
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
Log Message:
-----------
[libc++][NFC] Fix typo in comments
Commit: 3358c77b01fff71c586cc998dd80e06662d9e854
https://github.com/llvm/llvm-project/commit/3358c77b01fff71c586cc998dd80e06662d9e854
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/CMakeLists.txt
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[CMake] Deprecate GCC_INSTALL_PREFIX (#77537)
Part of https://reviews.llvm.org/D158218
GCC_INSTALL_PREFIX is a rarely-used legacy option inherited from
pre-CMake build system and has configuration file replacement nowadays.
Many `clang/test/Driver` tests specify `--gcc-toolchain=` to prevent
failures when `GCC_INSTALL_PREFIX` is specified: some contributors add
them to fix tests and some just do cargo culting. This is not healthy
for contributors adding cross compilation support for this rarely used
option.
`DEFAULT_SYSROOT` should in spirit be deprecated as well, but a relative
path doesn't have good replacement, so don't deprecate it for now.
Link:
https://discourse.llvm.org/t/add-gcc-install-dir-deprecate-gcc-toolchain-and-remove-gcc-install-prefix/65091
Link:
https://discourse.llvm.org/t/correct-cmake-parameters-for-building-clang-and-lld-for-riscv/72833
---
With `GCC_INSTALL_PREFIX=/usr`, `clang a.c` behaves like
`clang --gcc-toolchain=/usr a.c`.
Here is a simplified version of GCC installation detection code.
```
if (OPT_gcc_install_dir_EQ)
return OPT_gcc_install_dir_EQ;
if (OPT_gcc_triple)
candidate_gcc_triples = {OPT_gcc_triple};
else
candidate_gcc_triples = collectCandidateTriples();
if (OPT_gcc_toolchain)
prefixes = {OPT_gcc_toolchain};
else
prefixes = {OPT_sysroot/usr, OPT_sysroot};
for (prefix : prefixes)
if "$prefix/lib/gcc" exists // also tries $prefix/lib/gcc-cross
for (triple : candidate_gcc_triples)
if "$prefix/lib/gcc/$triple" exists
return "$prefix/lib/gcc/$triple/$version"; // pick the largest version
```
`--gcc-toolchain=` specifies a directory where
`lib/gcc{,-cross}/$triple/$version` can be found. If you actually want
to use a specific version of GCC, specify something like
`--gcc-install-dir=/usr/lib/gcc/x86_64-linux-gnu/11` in a configuration
file. You can also specify `--gcc-triple=`.
On Debian and its derivatives where the target triple omits the vendor
part, the following ways are roughly equivalent, except that
`--gcc-install-dir=` specifies a version as well:
```
clang --gcc-toolchain=/usr a.c
clang --gcc-install-dir=/usr/lib/gcc/x86_64-linux-gnu/11 a.c
clang --gcc-triple=x86_64-linux-gnu a.c
```
Commit: e6c2952eb51a422e17f002d97b0ea467be4d325b
https://github.com/llvm/llvm-project/commit/e6c2952eb51a422e17f002d97b0ea467be4d325b
Author: ChiaHungDuan <chiahungduan at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/condition_variable.h
Log Message:
-----------
[scudo] Condition variable can be disabled by setting the flag to off (#77532)
To enable the condition variable, you have to define both
UseConditionVariable and the ConditionVariableT. Otherwise, it'll be
disabled. However, you may want to disable the condition variable by
setting UseConditionVariable=false, for example, while measuring the
performance and you want to turn it off temporarily. Instead of
requiring the removal of the variable, examining its value makes more
sense.
Commit: 408dce82016463dcb5026b2ddfc62174970a88e9
https://github.com/llvm/llvm-project/commit/408dce82016463dcb5026b2ddfc62174970a88e9
Author: Alexey Bataev <5361294+alexey-bataev at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll
Log Message:
-----------
[SLP]Do not require external uses for roots and single use for other instructions in computeMinimumValueSizes. (#72679)
After changes, that does not require support from InstCombine, we can
drop some extra requirements for values-to-be-demoted. No need to check
for external uses for roots/other instructions, just check that the
no non-vectorized insertelement instruction, which may require
widening.
Commit: 51fbab134560ece663517bf1e8c2a30300d08f1a
https://github.com/llvm/llvm-project/commit/51fbab134560ece663517bf1e8c2a30300d08f1a
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/alloca_vla_interact.cpp
M compiler-rt/test/asan/TestCases/scariness_score_test.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll
M llvm/test/Instrumentation/AddressSanitizer/debug_info.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime-uar-uas.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime.ll
M llvm/test/Instrumentation/AddressSanitizer/local_stack_base.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_dynamic_alloca.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_layout.ll
Log Message:
-----------
[asan] Enable StackSafetyAnalysis by default
StackSafetyAnalysis determines whether stack-allocated variables are
guaranteed to be safe from memory access bugs and enables the removal of
certain unneeded instrumentations.
(hwasan enables StackSafetyAnalysis in https://reviews.llvm.org/D108381)
Test updates:
* asan-stack-safety.ll: test the -asan-use-stack-safety=1 default
* lifetime-uar-uas.ll: switch to an indexed store to prevent
StackSafetyAnalysis from optimizing out instrumentation for %c
* alloca_vla_interact.cpp: add a load to prevent StackSafetyAnalysis
from optimizing out `__asan_alloca_poison` for the VLA `array`
* scariness_score_test.cpp: add -asan-use-stack-safety=0 to make a load
of a `__asan_poison_memory_region`-poisoned local variable fail as
intended.
* other .ll tests: add -asan-use-stack-safety=0
Reviewers: kstoimenov, eugenis, vitalybuka
Reviewed By: kstoimenov
Pull Request: https://github.com/llvm/llvm-project/pull/77210
Commit: e80b9436476bba714e843461e03227b222185f7b
https://github.com/llvm/llvm-project/commit/e80b9436476bba714e843461e03227b222185f7b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/literals.cpp
Log Message:
-----------
[clang][Interp] Fix discarded integral and floating casts (#77295)
We need to handle this at the CastExpr level.
Commit: a1dc813f759955ddbcf9b12ed052dfc8a07fdf4a
https://github.com/llvm/llvm-project/commit/a1dc813f759955ddbcf9b12ed052dfc8a07fdf4a
Author: Emilio Cota <ecg at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/test/lib/Dialect/Mesh/TestProcessMultiIndexOpLowering.cpp
Log Message:
-----------
[mlir][mesh] fix unused variable error
Commit: 2dde029df8f9e3b2ece6899dc73bea226f227d11
https://github.com/llvm/llvm-project/commit/2dde029df8f9e3b2ece6899dc73bea226f227d11
Author: Abhinav271828 <71174780+Abhinav271828 at users.noreply.github.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/Barvinok.h
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/include/mlir/Analysis/Presburger/Matrix.h
M mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/unittests/Analysis/Presburger/BarvinokTest.cpp
Log Message:
-----------
[MLIR][Presburger] Implement computation of generating function for unimodular cones (#77235)
We implement a function that computes the generating function
corresponding to a unimodular cone.
The generating function for a polytope is obtained by summing these
generating functions over all tangent cones.
Commit: 0a1b066bbaf7e3800f47697231d7e1e91744ecbf
https://github.com/llvm/llvm-project/commit/0a1b066bbaf7e3800f47697231d7e1e91744ecbf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
Log Message:
-----------
[RISCV] Support isel for Zacas for XLen and i32. (#77666)
This adds new isel patterns for Zacas that take priority over the
pseudoinstructions we use for the A extension.
Support for 2x XLen types will come in a separate patch since they need
to be done differently.
Commit: 183eae0643719aac75ef689ee295b697d5367245
https://github.com/llvm/llvm-project/commit/183eae0643719aac75ef689ee295b697d5367245
Author: Chris B <chris.bieneman at me.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
A clang/docs/HLSL/FunctionCalls.rst
M clang/docs/HLSL/HLSLDocs.rst
Log Message:
-----------
[HLSL][Docs] Add documentation for HLSL functions (#75397)
This adds a new document that covers the HLSL approach to function calls
and parameter semantics. At time of writing this document is a proposal
for the implementation.
Commit: 1c342571b80d0f76202ec590a19706fe9e05c86d
https://github.com/llvm/llvm-project/commit/1c342571b80d0f76202ec590a19706fe9e05c86d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Use value_or to simplify code. NFC (#77030)
Commit: 3378514a4da2a09abf644273c7170ffebbd25b43
https://github.com/llvm/llvm-project/commit/3378514a4da2a09abf644273c7170ffebbd25b43
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
Log Message:
-----------
[RISCV] Use any_extend for type legalizing atomic_compare_swap with Zacas. (#77669)
With Zacas we will use amocas.w which doesn't require the input to be
sign extended.
Commit: fb7fe49960ae053c92985f3376d85a15bbd10d1a
https://github.com/llvm/llvm-project/commit/fb7fe49960ae053c92985f3376d85a15bbd10d1a
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M llvm/lib/Support/CommandLine.cpp
Log Message:
-----------
[CommandLine][NFCI] Do not add 'All' to 'RegisteredSubCommands' (#77041)
After #75679, it is no longer necessary to add the `All` pseudo
subcommand to the list of registered subcommands. The change causes the
list to contain only real subcommands, i.e. an unnamed top-level
subcommand and named ones. This simplifies the code a bit by removing
some checks for this special case.
Commit: a08506e374f5938e30a9c13b61a697e8c0e12aa3
https://github.com/llvm/llvm-project/commit/a08506e374f5938e30a9c13b61a697e8c0e12aa3
Author: Martin Storsjö <martin at martin.st>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/test/MinGW/driver.test
Log Message:
-----------
[LLD] [MinGW] Add support for more ThinLTO specific options (#77387)
This was missed when mass-adding support for other LTO options in
0b51e648307cf6c21c463d3e73e51c03aaa8c9e2.
Group the existing thinlto_cache_dir with these other options in a new
group, next to the other LTO options.
This skips adding the options --thinlto-emit-index-files and
--thinlto-single-module=, which don't seem to have corresponding options
on the lld-link level currently.
This should fix https://github.com/mstorsjo/llvm-mingw/issues/386.
Commit: aec73eade7af0e22c944714bec31570181bc1ad4
https://github.com/llvm/llvm-project/commit/aec73eade7af0e22c944714bec31570181bc1ad4
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
Log Message:
-----------
[mlir][sparse] allow unknown ops in one-shot bufferization in mini-pipeline (#77688)
Rationale:
Since this mini-pipeline may be used in alternative pipelines (viz.
different from the default "sparsifier" pipeline) where unknown ops are
handled by alternative bufferization methods that are downstream of this
mini-pipeline, we allow unknown ops by default (failure to bufferize is
eventually apparent by failing to convert to LLVM IR).
This is part of enabling e2e testing for TORCH-MLIR tests using a
sparsifier backend
Commit: e51fe958a226888f57ad3646034e6060b830f01a
https://github.com/llvm/llvm-project/commit/e51fe958a226888f57ad3646034e6060b830f01a
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-01-11 (Thu, 11 Jan 2024)
Changed paths:
M clang/test/CXX/drs/dr17xx.cpp
M clang/test/CXX/drs/dr1xx.cpp
M clang/test/CXX/drs/dr23xx.cpp
M clang/test/CXX/drs/dr4xx.cpp
Log Message:
-----------
[clang][NFC] Improve comments in C++ DR test suite (#77670)
Previously, we've been mentioning tests that were placed in their own files in corresponding `drNNxx.cpp` file. This patch makes sure we do this consistently, and improves upon existing practice by specifying the name of the file test is placed in.
Commit: 8ca07e57c3be0dc41dbb95f6b21e541fecd74e8a
https://github.com/llvm/llvm-project/commit/8ca07e57c3be0dc41dbb95f6b21e541fecd74e8a
Author: Andrew Gozillon <Andrew.Gozillon at amd.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
R openmp/libomptarget/test/offloading/fortran/failing/target_map_common_block1.f90
M openmp/libomptarget/test/offloading/fortran/target_map_common_block.f90
A openmp/libomptarget/test/offloading/fortran/target_map_common_block1.f90
Log Message:
-----------
[Flang][OpenMP][Offloading][Test] Adjust slightly incorrect tests now cmake configuration works
These tests were slightly broken, in one case a failing test that now works. In the other case
some accidentally left over code during a name change that broke compilation due to missing
symbols.
Commit: 98e3d98bf34ff9202e8b82d4967c02e4fd7d6532
https://github.com/llvm/llvm-project/commit/98e3d98bf34ff9202e8b82d4967c02e4fd7d6532
Author: Christopher Di Bella <cjdb at google.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M libcxx/test/std/ranges/range.adaptors/range.join/range.join.sentinel/ctor.other.pass.cpp
Log Message:
-----------
[libc++] Rename local variable to avoid shadowing error (#77672)
Due to the inclusion of a header, a global type is was being shadowed,
which upset GCC.
Commit: 386d3dd933150b2a1970de2e75ef6434b88210e0
https://github.com/llvm/llvm-project/commit/386d3dd933150b2a1970de2e75ef6434b88210e0
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2024-01-10 (Wed, 10 Jan 2024)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .github/CODEOWNERS
M .github/workflows/README.md
A .github/workflows/build-ci-container.yml
A .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/docs.yml
A .github/workflows/libclang-python-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/llvm-project-tests.yml
M .github/workflows/release-binaries.yml
M README.md
M bolt/lib/Rewrite/CMakeLists.txt
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/JITLinkLinker.cpp
M bolt/test/RISCV/relax.s
M clang-tools-extra/clang-include-fixer/tool/clang-include-fixer.el
M clang-tools-extra/clang-tidy/cppcoreguidelines/MissingStdForwardCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.h
M clang-tools-extra/clang-tidy/modernize/UseEmplaceCheck.cpp
A clang-tools-extra/clang-tidy/readability/AvoidReturnWithVoidValueCheck.cpp
A clang-tools-extra/clang-tidy/readability/AvoidReturnWithVoidValueCheck.h
M clang-tools-extra/clang-tidy/readability/CMakeLists.txt
M clang-tools-extra/clang-tidy/readability/ReadabilityTidyModule.cpp
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/Hover.cpp
M clang-tools-extra/clangd/IncludeCleaner.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/ParsedAST.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/FileIndex.cpp
M clang-tools-extra/clangd/index/SymbolCollector.cpp
A clang-tools-extra/clangd/test/GH75115.test
M clang-tools-extra/clangd/test/include-cleaner-batch-fix.test
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/clangd/unittests/FileIndexTests.cpp
M clang-tools-extra/clangd/unittests/IncludeCleanerTests.cpp
M clang-tools-extra/clangd/unittests/TestTU.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/optin.core.EnumCastOutOfRange.rst
A clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/security.cert.env.InvalidPtr.rst
A clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/unix.Errno.rst
A clang-tools-extra/docs/clang-tidy/checks/clang-analyzer/unix.StdCLibraryFunctions.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/avoid-return-with-void-value.rst
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/Record.h
M clang-tools-extra/include-cleaner/lib/Record.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang-tools-extra/include-cleaner/unittests/RecordTest.cpp
M clang-tools-extra/test/clang-doc/templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-emplace.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/avoid-return-with-void-value.cpp
M clang/CMakeLists.txt
A clang/cmake/caches/Release.cmake
M clang/docs/ClangFormat.rst
A clang/docs/HLSL/FunctionCalls.rst
M clang/docs/HLSL/HLSLDocs.rst
M clang/docs/InternalsManual.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Attr.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Stmt.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Analysis/CFG.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/ObjCRuntime.h
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Basic/arm_sve_sme_incl.td
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Format/.clang-format
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/StaticAnalyzer/Core/BugReporter/CommonBugCategories.h
M clang/include/clang/StaticAnalyzer/Core/Checker.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Descriptor.cpp
M clang/lib/AST/Interp/Descriptor.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Program.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/PathDiagnostic.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/AVR.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenPGO.h
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/CoverageMappingGen.h
M clang/lib/CodeGen/Targets/LoongArch.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/Solaris.cpp
M clang/lib/Format/.clang-format
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/lib/Headers/arm_acle.h
M clang/lib/Headers/ia32intrin.h
M clang/lib/Headers/llvm_libc_wrappers/stdio.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BoolAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CXXDeleteChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CallAndMessageChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CastSizeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckObjCDealloc.cpp
M clang/lib/StaticAnalyzer/Checkers/ChrootChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CloneChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ConversionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugContainerModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugIteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/DivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/EnumCastOutOfRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/FixedAddressChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/InvalidatedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.h
M clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/IteratorRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIBugReporter.cpp
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIBugReporter.h
M clang/lib/StaticAnalyzer/Checkers/MacOSKeychainAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MismatchedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MmapWriteExecChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NSAutoreleasePoolChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NonNullParamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCAtSyncChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCContainersChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSelfInitChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSuperDeallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerArithChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnPointerRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnUndefChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/SimpleStreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TaggedUnionModeling.h
M clang/lib/StaticAnalyzer/Checkers/TaintTesterChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TestAfterDivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefBranchChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefCapturedBlockVarChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefResultChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedArraySubscriptChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObject.h
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VforkChecker.cpp
M clang/lib/StaticAnalyzer/Core/CommonBugCategories.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/test/AST/Interp/arrays.cpp
M clang/test/AST/Interp/literals.cpp
A clang/test/AST/ast-dump-coroutine.cpp
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/errno-stdlibraryfunctions.c
M clang/test/Analysis/stream-error.c
M clang/test/Analysis/stream-non-posix-function.c
M clang/test/Analysis/stream-noopen.c
M clang/test/Analysis/stream-note.c
M clang/test/Analysis/stream-stdlibraryfunctionargs.c
M clang/test/Analysis/stream.c
M clang/test/CXX/drs/dr12xx.cpp
M clang/test/CXX/drs/dr17xx.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/test/CXX/drs/dr1xx.cpp
M clang/test/CXX/drs/dr23xx.cpp
M clang/test/CXX/drs/dr24xx.cpp
M clang/test/CXX/drs/dr25xx.cpp
M clang/test/CXX/drs/dr26xx.cpp
M clang/test/CXX/drs/dr27xx.cpp
M clang/test/CXX/drs/dr4xx.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/default-arguments.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p11-1y.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p23.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/p4.cpp
M clang/test/CXX/over/over.load/p2-0x.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.decls/temp.variadic/p5.cpp
M clang/test/CXX/temp/temp.deduct/p9.cpp
A clang/test/CodeGen/LoongArch/attributes.cpp
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin.c
M clang/test/CodeGen/LoongArch/lsx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lsx/builtin.c
M clang/test/CodeGen/RISCV/riscv-abi.cpp
M clang/test/CodeGen/RISCV/riscv-func-attr-target.c
M clang/test/CodeGen/X86/avx512er-builtins.c
M clang/test/CodeGen/X86/avx512pf-builtins.c
A clang/test/CodeGen/X86/fp128-abi.c
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/aarch64-fix-cortex-a53-835769.c
A clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
M clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_revd.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_cntp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_extq.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_fclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pfalse.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_psel.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_sclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1_single.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_uclamp.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_while_pn.c
A clang/test/CodeGen/arm-acle-coproc.c
M clang/test/CodeGen/arm-bf16-params-returns.c
M clang/test/CodeGen/arm-vector_type-params-returns.c
M clang/test/CodeGen/avr/avr-inline-asm-constraints.c
M clang/test/CodeGen/avr/avr-unsupported-inline-asm-constraints.c
M clang/test/CodeGen/flexible-array-init.c
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/CodeGenObjC/dllstorage.m
A clang/test/CodeGenObjC/exceptions-personality.m
M clang/test/CodeGenObjC/messages.m
M clang/test/CodeGenObjC/personality.m
M clang/test/CodeGenObjCXX/personality.mm
M clang/test/CodeGenOpenCL/as_type.cl
M clang/test/CoverageMapping/branch-constfolded.cpp
M clang/test/CoverageMapping/branch-mincounters.cpp
M clang/test/CoverageMapping/branch-templates.cpp
M clang/test/CoverageMapping/if.cpp
M clang/test/CoverageMapping/logical.cpp
A clang/test/CoverageMapping/mcdc-class.cpp
A clang/test/CoverageMapping/mcdc-error-conditions.cpp
A clang/test/CoverageMapping/mcdc-error-nests.cpp
A clang/test/CoverageMapping/mcdc-logical-scalar-ids.cpp
A clang/test/CoverageMapping/mcdc-logical-stmt-ids-all.cpp
A clang/test/CoverageMapping/mcdc-logical-stmt-ids.cpp
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtbegin.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtend.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crti.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-linux-gnu/13/crtn.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtbegin.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtend.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crti.o
A clang/test/Driver/Inputs/fedora_39_tree/usr/lib/gcc/x86_64-redhat-linux/13/crtn.o
M clang/test/Driver/aarch64-fix-cortex-a53-835769.c
A clang/test/Driver/android-version.cpp
M clang/test/Driver/cl-x86-flags.c
A clang/test/Driver/gcc-triple.cpp
A clang/test/Driver/gnustep-dispatch-method.m
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/linux-ld.c
M clang/test/Driver/mingw-sysroot.cpp
M clang/test/Driver/mips-features.c
M clang/test/Driver/nostdincxx.cpp
M clang/test/Driver/riscv-rvv-vector-bits.c
M clang/test/Format/clang-format-ignore.cpp
M clang/test/Frontend/verify.c
M clang/test/Frontend/x86-target-cpu.c
M clang/test/Lexer/case-insensitive-include-absolute.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
R clang/test/Modules/Inputs/AutolinkTBD.framework/AutolinkTBD.tbd
R clang/test/Modules/Inputs/AutolinkTBD.framework/Headers/AutolinkTBD.h
R clang/test/Modules/autolinkTBD.m
A clang/test/Modules/autolink_private_module.m
A clang/test/Modules/explicit-specializations.cppm
R clang/test/Modules/pr60085.cppm
M clang/test/OpenMP/atomic_compare_codegen.cpp
M clang/test/OpenMP/loop_bind_messages.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/PCH/pragma-loop.cpp
M clang/test/Parser/cxx-in-c.c
A clang/test/Parser/gh30908-scope-balance-on-invalid-var-direct-init-1.cpp
A clang/test/Parser/gh30908-scope-balance-on-invalid-var-direct-init-2.cpp
M clang/test/ParserOpenACC/parse-cache-construct.c
M clang/test/ParserOpenACC/parse-cache-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Profile/c-linkage-available_externally.c
A clang/test/Profile/c-mcdc-class.cpp
A clang/test/Profile/c-mcdc-nested-ternary.c
A clang/test/Profile/c-mcdc-not.c
A clang/test/Profile/c-mcdc.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
A clang/test/Sema/aarch64-sme2-sve2p1-diagnostics.c
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
A clang/test/Sema/attr-format-Float16.c
A clang/test/Sema/attr-model.cpp
A clang/test/SemaCXX/attr-format-Float16.cpp
M clang/test/SemaCXX/coro-lifetimebound.cpp
A clang/test/SemaCXX/crash-GH76228.cpp
M clang/test/SemaCXX/cxx1y-init-captures.cpp
M clang/test/SemaCXX/cxx1z-lambda-star-this.cpp
M clang/test/SemaCXX/cxx1z-noexcept-function-type.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaCXX/dependent-noexcept-uninstantiated.cpp
M clang/test/SemaCXX/lambda-expressions.cpp
M clang/test/SemaCXX/lambda-pack-expansion.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
A clang/test/SemaCXX/template-instantiation.cpp
M clang/test/SemaCXX/vartemplate-lambda.cpp
M clang/test/SemaCXX/warn-range-loop-analysis-trivially-copyable.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-warning-data-invocation.cpp
M clang/test/SemaCXX/warn-unused-lambda-capture.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/instantiate-local-class.cpp
M clang/test/SemaTemplate/instantiation-depth-default.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
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A compiler-rt/lib/orc/executor_symbol_def.h
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A compiler-rt/lib/orc/tests/unit/executor_symbol_def_test.cpp
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A flang/include/flang/Runtime/execute.h
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M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/minus.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/types.h
A libcxx/test/std/ranges/ranges_robust_against_no_unique_address.pass.cpp
M libcxx/test/std/re/re.const/re.matchflag/match_not_eol.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.alg/swap.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/F.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/copy_assign.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/copy_move.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.con/nullptr_t_assign.pass.cpp
M libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.func/func.wrap.func.mod/swap.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.cmp/cmp_nullptr.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.pass.cpp
M libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.special/cmp_nullptr.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/apply.pass.cpp
M libcxx/test/std/utilities/utility/utility.unreachable/assert.unreachable.pass.cpp
M libcxx/test/support/count_new.h
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/support/test_macros.h
M libcxx/test/support/test_range.h
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/utils/ci/run-buildbot
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/format.py
M libcxx/utils/libcxx/test/params.py
M libcxx/utils/qemu_baremetal.py
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/src/private_typeinfo.cpp
M libcxxabi/src/private_typeinfo.h
A libcxxabi/test/catch_null_pointer_to_object_pr64953.pass.cpp
M libunwind/CMakeLists.txt
M libunwind/src/UnwindCursor.hpp
M libunwind/test/libunwind_02.pass.cpp
M libunwind/test/unw_resume.pass.cpp
M libunwind/test/unwind_leaffunction.pass.cpp
M lld/COFF/Config.h
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
M lld/MinGW/Driver.cpp
M lld/MinGW/Options.td
M lld/test/COFF/savetemps.ll
M lld/test/ELF/aarch64-memtag-android-abi.s
A lld/test/ELF/eh-frame-nonzero-offset-riscv.s
R lld/test/ELF/linkerscript/overlay-reject.test
R lld/test/ELF/linkerscript/overlay-reject2.test
M lld/test/ELF/linkerscript/overlay.test
A lld/test/ELF/linkorder-group.test
M lld/test/ELF/loongarch-pc-aligned.s
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos_mixed_lto.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos_no_rtti.ll
M lld/test/ELF/lto/devirt_vcall_vis_export_dynamic.ll
M lld/test/ELF/lto/devirt_vcall_vis_public.ll
M lld/test/ELF/riscv-reloc-leb128.s
M lld/test/ELF/x86-64-tls-pie.s
M lld/test/MachO/pgo-warn-mismatch.ll
M lld/test/MinGW/driver.test
M lldb/include/lldb/API/SBBreakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointIDList.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Symbol/CompileUnit.h
M lldb/include/lldb/Symbol/SymbolFile.h
M lldb/include/lldb/Symbol/SymbolFileOnDemand.h
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/Utility/FileSpecList.h
M lldb/include/lldb/Utility/StreamString.h
M lldb/include/lldb/Utility/StructuredData.h
M lldb/source/API/SBCompileUnit.cpp
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Breakpoint/BreakpointResolverAddress.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/CppModuleConfiguration.cpp
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.h
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.h
M lldb/source/Plugins/SymbolFile/JSON/SymbolFileJSON.h
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.h
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
M lldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.h
M lldb/source/Plugins/Trace/intel-pt/CommandObjectTraceStartIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.cpp
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.h
M lldb/source/Plugins/Trace/intel-pt/LibiptDecoder.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceCursorIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPTBundleLoader.cpp
M lldb/source/Symbol/CompileUnit.cpp
M lldb/source/Symbol/SymbolFileOnDemand.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/source/Utility/FileSpecList.cpp
M lldb/source/Utility/StreamString.cpp
A lldb/test/API/commands/expression/nested/Makefile
A lldb/test/API/commands/expression/nested/TestNestedExpressions.py
A lldb/test/API/commands/expression/nested/main.cpp
M lldb/test/API/commands/trace/TestTraceDumpInfo.py
M lldb/test/API/commands/trace/TestTraceLoad.py
M lldb/test/API/functionalities/breakpoint/serialize/TestBreakpointSerialization.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/TestDataFormatterLibcxxChrono.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/chrono/main.cpp
A lldb/test/API/functionalities/inline-sourcefile/Makefile
A lldb/test/API/functionalities/inline-sourcefile/TestInlineSourceFiles.py
A lldb/test/API/functionalities/inline-sourcefile/inline.ll
A lldb/test/API/functionalities/inline-sourcefile/main.c
M lldb/test/API/macosx/lc-note/firmware-corefile/TestFirmwareCorefiles.py
M lldb/test/API/macosx/lc-note/firmware-corefile/create-empty-corefile.cpp
M lldb/test/API/python_api/global_module_cache/TestGlobalModuleCache.py
M lldb/test/API/tools/lldb-dap/optimized/TestDAP_optimized.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
A lldb/test/Shell/SymbolFile/DWARF/Inputs/dwo-static-data-member.cpp
A lldb/test/Shell/SymbolFile/DWARF/dwo-static-data-member-access.test
M lldb/test/Shell/SymbolFile/DWARF/x86/find-basic-function.cpp
A lldb/tools/lldb-dap/.editorconfig
A lldb/tools/lldb-dap/.gitignore
A lldb/tools/lldb-dap/.prettierrc.json
A lldb/tools/lldb-dap/.vscode/launch.json
A lldb/tools/lldb-dap/.vscode/tasks.json
M lldb/tools/lldb-dap/BreakpointBase.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
A lldb/tools/lldb-dap/LICENSE.TXT
M lldb/tools/lldb-dap/README.md
M lldb/tools/lldb-dap/lldb-dap.cpp
A lldb/tools/lldb-dap/package-lock.json
M lldb/tools/lldb-dap/package.json
A lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
A lldb/tools/lldb-dap/src-ts/disposable-context.ts
A lldb/tools/lldb-dap/src-ts/extension.ts
A lldb/tools/lldb-dap/src-ts/types.ts
A lldb/tools/lldb-dap/tsconfig.json
M lldb/tools/lldb-test/lldb-test.cpp
M lldb/unittests/Core/FileSpecListTest.cpp
M lldb/unittests/Thread/ThreadTest.cpp
M llvm/cmake/config-ix.cmake
M llvm/cmake/modules/AddLLVM.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CMake.rst
M llvm/docs/CommandGuide/llvm-cxxfilt.rst
M llvm/docs/CommandLine.rst
M llvm/docs/Extensions.rst
M llvm/docs/LangRef.rst
M llvm/docs/MyFirstTypoFix.rst
M llvm/docs/SphinxQuickstartTemplate.rst
M llvm/docs/StackMaps.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl08.rst
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/CMakeLists.txt
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/LLJITWithRemoteDebugging.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.h
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/ADT/StringRef.h
M llvm/include/llvm/Analysis/AliasSetTracker.h
M llvm/include/llvm/Analysis/AssumptionCache.h
M llvm/include/llvm/Analysis/BlockFrequencyInfo.h
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Analysis/CFGSCCPrinter.h
M llvm/include/llvm/Analysis/CallGraph.h
M llvm/include/llvm/Analysis/CallPrinter.h
M llvm/include/llvm/Analysis/CostModel.h
M llvm/include/llvm/Analysis/CycleAnalysis.h
M llvm/include/llvm/Analysis/DDG.h
M llvm/include/llvm/Analysis/DDGPrinter.h
M llvm/include/llvm/Analysis/Delinearization.h
M llvm/include/llvm/Analysis/DemandedBits.h
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/Analysis/IRSimilarityIdentifier.h
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/include/llvm/Analysis/InlineSizeEstimatorAnalysis.h
M llvm/include/llvm/Analysis/LazyCallGraph.h
M llvm/include/llvm/Analysis/LazyValueInfo.h
M llvm/include/llvm/Analysis/LoopCacheAnalysis.h
M llvm/include/llvm/Analysis/LoopInfo.h
M llvm/include/llvm/Analysis/LoopNestAnalysis.h
M llvm/include/llvm/Analysis/MemDerefPrinter.h
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/Analysis/MemorySSA.h
M llvm/include/llvm/Analysis/ModuleDebugInfoPrinter.h
M llvm/include/llvm/Analysis/MustExecute.h
M llvm/include/llvm/Analysis/PhiValues.h
M llvm/include/llvm/Analysis/PostDominators.h
M llvm/include/llvm/Analysis/ProfileSummaryInfo.h
M llvm/include/llvm/Analysis/RegionInfo.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/StackLifetime.h
M llvm/include/llvm/Analysis/StackSafetyAnalysis.h
M llvm/include/llvm/Analysis/StructuralHash.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/UniformityAnalysis.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/LoongArch.def
M llvm/include/llvm/Bitstream/BitstreamWriter.h
M llvm/include/llvm/CodeGen/AccelTable.h
M llvm/include/llvm/CodeGen/AssignmentTrackingAnalysis.h
M llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
A llvm/include/llvm/CodeGen/CodeGenPrepare.h
M llvm/include/llvm/CodeGen/FastISel.h
M llvm/include/llvm/CodeGen/GCMetadata.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/include/llvm/CodeGen/NonRelocatableStringpool.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/RuntimeLibcalls.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
A llvm/include/llvm/CodeGen/ShadowStackGCLowering.h
M llvm/include/llvm/CodeGen/StackProtector.h
M llvm/include/llvm/CodeGen/SwitchLoweringUtils.h
A llvm/include/llvm/DWARFLinker/AddressesMap.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerCompileUnit.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerDeclContext.h
A llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
A llvm/include/llvm/DWARFLinker/DWARFFile.h
R llvm/include/llvm/DWARFLinker/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/DWARFLinkerBase.h
R llvm/include/llvm/DWARFLinker/DWARFLinkerCompileUnit.h
R llvm/include/llvm/DWARFLinker/DWARFLinkerDeclContext.h
R llvm/include/llvm/DWARFLinker/DWARFStreamer.h
A llvm/include/llvm/DWARFLinker/Parallel/DWARFLinker.h
A llvm/include/llvm/DWARFLinker/StringPool.h
R llvm/include/llvm/DWARFLinkerParallel/AddressesMap.h
R llvm/include/llvm/DWARFLinkerParallel/DWARFFile.h
R llvm/include/llvm/DWARFLinkerParallel/DWARFLinker.h
R llvm/include/llvm/DWARFLinkerParallel/StringPool.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ExecutorSymbolDef.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.h
M llvm/include/llvm/Frontend/OpenACC/ACC.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Dominators.h
M llvm/include/llvm/IR/GetElementPtrTypeIterator.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/SafepointIRVerifier.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/Object/ELFTypes.h
M llvm/include/llvm/Object/ObjectFile.h
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
M llvm/include/llvm/Support/RISCVISAInfo.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetInstrPredicate.td
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetSchedule.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/Scalar/IVUsersPrinter.h
M llvm/include/llvm/Transforms/Scalar/LoopAccessAnalysisPrinter.h
M llvm/include/llvm/Transforms/Utils/PredicateInfo.h
M llvm/lib/Analysis/AssumptionCache.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Local.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VFABIDemangling.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp
M llvm/lib/CMakeLists.txt
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp
M llvm/lib/CodeGen/BasicBlockPathCloning.cpp
M llvm/lib/CodeGen/BasicBlockSections.cpp
M llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GCRootLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/NonRelocatableStringpool.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/SwitchLoweringUtils.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/DWARFLinker/CMakeLists.txt
A llvm/lib/DWARFLinker/Classic/CMakeLists.txt
A llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
A llvm/lib/DWARFLinker/Classic/DWARFLinkerCompileUnit.cpp
A llvm/lib/DWARFLinker/Classic/DWARFLinkerDeclContext.cpp
A llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
R llvm/lib/DWARFLinker/DWARFLinker.cpp
R llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp
R llvm/lib/DWARFLinker/DWARFLinkerDeclContext.cpp
R llvm/lib/DWARFLinker/DWARFStreamer.cpp
A llvm/lib/DWARFLinker/Parallel/AcceleratorRecordsSaver.cpp
A llvm/lib/DWARFLinker/Parallel/AcceleratorRecordsSaver.h
A llvm/lib/DWARFLinker/Parallel/ArrayList.h
A llvm/lib/DWARFLinker/Parallel/CMakeLists.txt
A llvm/lib/DWARFLinker/Parallel/DIEAttributeCloner.cpp
A llvm/lib/DWARFLinker/Parallel/DIEAttributeCloner.h
A llvm/lib/DWARFLinker/Parallel/DIEGenerator.h
A llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinker.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerGlobalData.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.h
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.cpp
A llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
A llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
A llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
A llvm/lib/DWARFLinker/Parallel/DependencyTracker.h
A llvm/lib/DWARFLinker/Parallel/IndexedValuesMap.h
A llvm/lib/DWARFLinker/Parallel/OutputSections.cpp
A llvm/lib/DWARFLinker/Parallel/OutputSections.h
A llvm/lib/DWARFLinker/Parallel/StringEntryToDwarfStringPoolEntryMap.h
A llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
A llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.h
A llvm/lib/DWARFLinker/Parallel/TypePool.h
A llvm/lib/DWARFLinker/Parallel/Utils.h
A llvm/lib/DWARFLinker/Utils.cpp
R llvm/lib/DWARFLinkerParallel/AcceleratorRecordsSaver.cpp
R llvm/lib/DWARFLinkerParallel/AcceleratorRecordsSaver.h
R llvm/lib/DWARFLinkerParallel/ArrayList.h
R llvm/lib/DWARFLinkerParallel/CMakeLists.txt
R llvm/lib/DWARFLinkerParallel/DIEAttributeCloner.cpp
R llvm/lib/DWARFLinkerParallel/DIEAttributeCloner.h
R llvm/lib/DWARFLinkerParallel/DIEGenerator.h
R llvm/lib/DWARFLinkerParallel/DWARFEmitterImpl.cpp
R llvm/lib/DWARFLinkerParallel/DWARFEmitterImpl.h
R llvm/lib/DWARFLinkerParallel/DWARFFile.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinker.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerCompileUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerCompileUnit.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerGlobalData.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerImpl.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerImpl.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerTypeUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerTypeUnit.h
R llvm/lib/DWARFLinkerParallel/DWARFLinkerUnit.cpp
R llvm/lib/DWARFLinkerParallel/DWARFLinkerUnit.h
R llvm/lib/DWARFLinkerParallel/DebugLineSectionEmitter.h
R llvm/lib/DWARFLinkerParallel/DependencyTracker.cpp
R llvm/lib/DWARFLinkerParallel/DependencyTracker.h
R llvm/lib/DWARFLinkerParallel/IndexedValuesMap.h
R llvm/lib/DWARFLinkerParallel/OutputSections.cpp
R llvm/lib/DWARFLinkerParallel/OutputSections.h
R llvm/lib/DWARFLinkerParallel/StringEntryToDwarfStringPoolEntryMap.h
R llvm/lib/DWARFLinkerParallel/StringPool.cpp
R llvm/lib/DWARFLinkerParallel/SyntheticTypeNameBuilder.cpp
R llvm/lib/DWARFLinkerParallel/SyntheticTypeNameBuilder.h
R llvm/lib/DWARFLinkerParallel/TypePool.h
R llvm/lib/DWARFLinkerParallel/Utils.h
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/Demangle/Demangle.cpp
M llvm/lib/Demangle/ItaniumDemangle.cpp
M llvm/lib/ExecutionEngine/Interpreter/Execution.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DataLayout.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Operator.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCSectionELF.cpp
M llvm/lib/Object/ELF.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/ObjectFile.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
A llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.cpp
A llvm/lib/Target/AArch64/AArch64LoopIdiomTransform.h
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
M llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
A llvm/lib/Target/AMDGPU/DSDIRInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/EXPInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
R llvm/lib/Target/AMDGPU/LDSDIRInstructions.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARC/ARCISelDAGToDAG.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARC/ARCTargetMachine.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
M llvm/lib/Target/ARM/ARMLegalizerInfo.h
M llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.cpp
M llvm/lib/Target/BPF/BPFTargetMachine.h
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAnalysis.h
M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
M llvm/lib/Target/DirectX/DirectXTargetMachine.h
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
M llvm/lib/Target/LoongArch/AsmParser/LoongArchAsmParser.cpp
M llvm/lib/Target/LoongArch/LoongArchExpandPseudoInsts.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.h
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchFixupKinds.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCExpr.h
M llvm/lib/Target/M68k/GISel/M68kLegalizerInfo.h
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kInstrFormats.td
M llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
M llvm/lib/Target/Mips/MipsLegalizerInfo.h
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCFastISel.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZa.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/X86.h
A llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
R llvm/lib/Target/X86/X86EvexToVex.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrFormats.td
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86InstrShiftRotate.td
M llvm/lib/Target/X86/X86InstrSystem.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/TextAPI/InterfaceFile.cpp
M llvm/lib/TextAPI/TextStubV5.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/lib/Transforms/Scalar/LoopFlatten.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/lib/Transforms/Utils/InjectTLIMappings.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/runtimes/CMakeLists.txt
A llvm/test/Analysis/BasicAA/inttoptr_constexpr.ll
A llvm/test/Analysis/BasicAA/separate_storage-alias-sets.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-select.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Analysis/CostModel/RISCV/splice.ll
M llvm/test/Analysis/CostModel/X86/bswap-codesize.ll
M llvm/test/Analysis/CostModel/X86/bswap-latency.ll
M llvm/test/Analysis/CostModel/X86/bswap-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/bswap.ll
M llvm/test/Analysis/CostModel/X86/cast.ll
M llvm/test/Analysis/LoopInfo/annotated-parallel-simple.ll
A llvm/test/Assembler/amdgpu-image-atomic-attributes.ll
M llvm/test/Assembler/autoupgrade-thread-pointer.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-outline_atomics.ll
M llvm/test/CodeGen/AArch64/Atomics/aarch64-cmpxchg-outline_atomics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-ext-debugloc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
A llvm/test/CodeGen/AArch64/GlobalISel/fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
A llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
A llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fmul.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-extending-loads.mir
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/aarch64-codegen-prepare-atp.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/andcompare.ll
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64-csel.ll
M llvm/test/CodeGen/AArch64/arm64-fast-isel-icmp.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/arm64-vhadd.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/arm64_32-gep-sink.ll
A llvm/test/CodeGen/AArch64/avoid-free-ext-promotion.ll
M llvm/test/CodeGen/AArch64/call-rv-marker.ll
M llvm/test/CodeGen/AArch64/cgp-trivial-phi-node.ll
M llvm/test/CodeGen/AArch64/convertphitype.ll
M llvm/test/CodeGen/AArch64/fast-isel-branch-uncond-debug.ll
M llvm/test/CodeGen/AArch64/fast-isel-dbg.ll
M llvm/test/CodeGen/AArch64/fastisel-debugvalue-undef.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/fexplog.ll
M llvm/test/CodeGen/AArch64/fpmode.ll
M llvm/test/CodeGen/AArch64/fpow.ll
A llvm/test/CodeGen/AArch64/fpowi.ll
M llvm/test/CodeGen/AArch64/frem.ll
M llvm/test/CodeGen/AArch64/fsincos.ll
A llvm/test/CodeGen/AArch64/icmp.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/llvm.exp10.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/patchable-function-entry.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-armpl.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef-scalable.ll
R llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
A llvm/test/CodeGen/AArch64/replace-with-veclib-sleef.ll
M llvm/test/CodeGen/AArch64/scalable-vector-promotion.ll
M llvm/test/CodeGen/AArch64/selectopt.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/store-swift-async-context-clobber-live-reg.ll
M llvm/test/CodeGen/AArch64/sve-vscale.ll
A llvm/test/CodeGen/AArch64/sve2-bcax.ll
M llvm/test/CodeGen/AArch64/sve2-min-max-clamp.ll
M llvm/test/CodeGen/AArch64/sve2-vscale-sinking.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-extq.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-sclamp.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-st1-single.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uclamp.ll
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
M llvm/test/CodeGen/AArch64/vecreduce-fadd-strict.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul-strict.ll
M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll
M llvm/test/CodeGen/AArch64/vselect-ext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fold-binop-into-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sqrt.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/attributor-noopt.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/hsa-globals.ll
A llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-func-hidden-args-v5.ll
A llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-funcarg-hidden-args-v5.ll
A llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-kernarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/local-atomics-fp.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/pk_max_f16_literal.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
A llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
A llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll
M llvm/test/CodeGen/AMDGPU/strict_fp_casts.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
A llvm/test/CodeGen/AMDGPU/waitcnt-global-inv-wb.mir
A llvm/test/CodeGen/ARC/atomic-oversize.ll
M llvm/test/CodeGen/ARM/debug-info-blocks.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
A llvm/test/CodeGen/BPF/atomic-oversize.ll
M llvm/test/CodeGen/BPF/loop-exit-cond.ll
M llvm/test/CodeGen/Generic/addr-sink-call-multi-arg.ll
M llvm/test/CodeGen/Generic/addr-use-count.ll
M llvm/test/CodeGen/Generic/csw-debug-assert.ll
M llvm/test/CodeGen/Generic/machine-function-splitter.ll
A llvm/test/CodeGen/Lanai/atomic-oversize.ll
A llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
M llvm/test/CodeGen/LoongArch/code-models.ll
M llvm/test/CodeGen/LoongArch/expand-call.ll
M llvm/test/CodeGen/LoongArch/global-address.ll
A llvm/test/CodeGen/LoongArch/global-variable-code-model.ll
M llvm/test/CodeGen/LoongArch/patchable-function-entry.ll
A llvm/test/CodeGen/LoongArch/psabi-restricted-scheduling.ll
M llvm/test/CodeGen/LoongArch/tls-models.ll
M llvm/test/CodeGen/MLRegAlloc/dev-mode-extra-features-logging.ll
A llvm/test/CodeGen/MSP430/atomic-oversize.ll
M llvm/test/CodeGen/Mips/ehframe-indirect.ll
M llvm/test/CodeGen/Mips/xray-section-group.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-opaque.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect.ll
A llvm/test/CodeGen/NVPTX/setmaxnreg.ll
R llvm/test/CodeGen/PowerPC/coalescer-remat-with-undef-implicit-def-operand.mir
A llvm/test/CodeGen/PowerPC/expand-isel-to-branch.ll
A llvm/test/CodeGen/PowerPC/intrinsic-trap.ll
M llvm/test/CodeGen/PowerPC/ppc32-pic-large.ll
A llvm/test/CodeGen/PowerPC/pr47155-47156.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/bswap-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/bswap-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/variadic-call.ll
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-alu.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bswap-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-fp-ceil-floor.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mul-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-add-zve32x.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-add.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-and.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-or.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-sub.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-xor.mir
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M llvm/test/CodeGen/RISCV/addrspacecast.ll
M llvm/test/CodeGen/RISCV/aext-to-sext.ll
M llvm/test/CodeGen/RISCV/alloca.ll
M llvm/test/CodeGen/RISCV/analyze-branch.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/atomic-load-store.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-sub.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/bf16-promote.ll
M llvm/test/CodeGen/RISCV/bfloat-br-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-frem.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
M llvm/test/CodeGen/RISCV/bfloat.ll
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/byval.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-sext-zext.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll
M llvm/test/CodeGen/RISCV/calls.ll
M llvm/test/CodeGen/RISCV/cm_mvas_mvsa.ll
A llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/compress-inline-asm.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/div_minsize.ll
M llvm/test/CodeGen/RISCV/double-arith-strict.ll
M llvm/test/CodeGen/RISCV/double-arith.ll
M llvm/test/CodeGen/RISCV/double-br-fcmp.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert-strict.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/double-fcmp.ll
M llvm/test/CodeGen/RISCV/double-frem.ll
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M llvm/test/CodeGen/RISCV/double-previous-failure.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/double-select-icmp.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
M llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll
M llvm/test/CodeGen/RISCV/emutls.ll
M llvm/test/CodeGen/RISCV/exception-pointer-register.ll
M llvm/test/CodeGen/RISCV/fastcc-float.ll
M llvm/test/CodeGen/RISCV/fastcc-int.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
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M llvm/test/CodeGen/RISCV/float-frem.ll
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M llvm/test/CodeGen/RISCV/ghccc-rv32.ll
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M llvm/test/CodeGen/RISCV/init-array.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
M llvm/test/CodeGen/RISCV/interrupt-attr.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/libcall-tail-calls.ll
M llvm/test/CodeGen/RISCV/live-sp.mir
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M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/machine-outliner-and-machine-copy-propagation.ll
M llvm/test/CodeGen/RISCV/machine-outliner-throw.ll
M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
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M llvm/test/CodeGen/RISCV/mem.ll
M llvm/test/CodeGen/RISCV/mem64.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/mir-target-flags.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/nest-register.ll
M llvm/test/CodeGen/RISCV/nomerge.ll
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A llvm/test/CodeGen/RISCV/option-relax-relocation.ll
M llvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/patchable-function-entry.ll
M llvm/test/CodeGen/RISCV/pr51206.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/reduce-unnecessary-extension.ll
M llvm/test/CodeGen/RISCV/reduction-formation.ll
M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/remat.ll
M llvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
M llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll
M llvm/test/CodeGen/RISCV/rv32xtheadba.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbs.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv64-large-stack.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/div.ll
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M llvm/test/CodeGen/RISCV/rv64-legal-i32/rem.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
M llvm/test/CodeGen/RISCV/rv64i-complex-float.ll
M llvm/test/CodeGen/RISCV/rv64i-double-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbs.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vector-insert-elt.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
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A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xvv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xvw.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/fptoui-sat.ll
M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/memory-args.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr63596.ll
M llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-stack-align.mir
M llvm/test/CodeGen/RISCV/rvv/scalar-stack-align.ll
M llvm/test/CodeGen/RISCV/rvv/trunc-sat-clip.ll
A llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vaesdf.ll
M llvm/test/CodeGen/RISCV/rvv/vaesdm.ll
M llvm/test/CodeGen/RISCV/rvv/vaesef.ll
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M llvm/test/CodeGen/RISCV/rvv/vaesz.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
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M llvm/test/CodeGen/RISCV/rvv/vsm4r.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
M llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-x.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xv.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvv.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvw.ll
M llvm/test/CodeGen/RISCV/saverestore-scs.ll
M llvm/test/CodeGen/RISCV/select-and.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-or.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
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M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
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M llvm/test/CodeGen/RISCV/split-sp-adjust.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/stack-protector-target.ll
M llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/RISCV/stack-realignment.ll
M llvm/test/CodeGen/RISCV/stack-slot-size.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/switch-width.ll
M llvm/test/CodeGen/RISCV/tls-models.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/unroll-loop-cse.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
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M llvm/test/CodeGen/RISCV/vector-abi.ll
M llvm/test/CodeGen/RISCV/vlenb.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/CodeGen/RISCV/zcmp-with-float.ll
M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
M llvm/test/CodeGen/SPARC/constructor.ll
M llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
M llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-nested-composite-store.ll
M llvm/test/CodeGen/SPIRV/instructions/undef-simple-composite-store.ll
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A llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll
M llvm/test/CodeGen/SPIRV/sitofp-with-bool.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpPhi_ArgumentsPlaceholders.ll
M llvm/test/CodeGen/SPIRV/transcoding/spec_const.ll
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M llvm/test/DebugInfo/COFF/enum-co.ll
M llvm/test/DebugInfo/COFF/function-options.ll
M llvm/test/DebugInfo/COFF/global_visibility.ll
M llvm/test/DebugInfo/COFF/globals.ll
M llvm/test/DebugInfo/COFF/lambda.ll
M llvm/test/DebugInfo/COFF/lines-bb-start.ll
M llvm/test/DebugInfo/COFF/nrvo.ll
M llvm/test/DebugInfo/COFF/numeric-leaves.ll
M llvm/test/DebugInfo/COFF/parent-type-scopes.ll
M llvm/test/DebugInfo/COFF/purge-typedef-udts.ll
M llvm/test/DebugInfo/COFF/thunk.ll
M llvm/test/DebugInfo/COFF/type-quals.ll
M llvm/test/DebugInfo/COFF/types-cvarargs.ll
M llvm/test/DebugInfo/COFF/types-integer-old.ll
M llvm/test/DebugInfo/COFF/types-method-ref-qualifiers.ll
M llvm/test/DebugInfo/Generic/2010-10-01-crash.ll
M llvm/test/DebugInfo/Generic/PR20038.ll
A llvm/test/DebugInfo/Generic/assignment-tracking/declare-to-assign/hwasan.ll
M llvm/test/DebugInfo/Generic/dead-argument-order.ll
M llvm/test/DebugInfo/Generic/discriminated-union.ll
M llvm/test/DebugInfo/Generic/disubrange_vla.ll
M llvm/test/DebugInfo/Generic/enum-types.ll
M llvm/test/DebugInfo/Generic/enum.ll
M llvm/test/DebugInfo/Generic/import-inlined-declaration.ll
M llvm/test/DebugInfo/Generic/inlined-vars.ll
M llvm/test/DebugInfo/Generic/recursive_inlining.ll
M llvm/test/DebugInfo/Generic/univariant-discriminated-union.ll
M llvm/test/DebugInfo/Mips/delay-slot.ll
M llvm/test/DebugInfo/SystemZ/eh_frame_personality.ll
M llvm/test/DebugInfo/SystemZ/eh_frame_personality.s
M llvm/test/DebugInfo/X86/aligned_stack_var.ll
M llvm/test/DebugInfo/X86/arguments.ll
M llvm/test/DebugInfo/X86/array2.ll
M llvm/test/DebugInfo/X86/asan_debug_info.ll
M llvm/test/DebugInfo/X86/byvalstruct.ll
M llvm/test/DebugInfo/X86/convert-linked.ll
M llvm/test/DebugInfo/X86/dbg-declare-arg.ll
M llvm/test/DebugInfo/X86/dbg-declare-inalloca.ll
M llvm/test/DebugInfo/X86/dbg-declare.ll
M llvm/test/DebugInfo/X86/dbg_value_direct.ll
M llvm/test/DebugInfo/X86/debug-info-template-parameter.ll
M llvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll
M llvm/test/DebugInfo/X86/double-declare.ll
M llvm/test/DebugInfo/X86/fi-piece.ll
M llvm/test/DebugInfo/X86/implicit_value-double.ll
M llvm/test/DebugInfo/X86/instr-ref-opt-levels.ll
M llvm/test/DebugInfo/X86/instr-ref-selectiondag.ll
M llvm/test/DebugInfo/X86/missing-abstract-variable.ll
M llvm/test/DebugInfo/X86/parameters.ll
M llvm/test/DebugInfo/X86/pieces-1.ll
M llvm/test/DebugInfo/X86/reference-argument.ll
M llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
M llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/DebugInfo/X86/subreg.ll
M llvm/test/DebugInfo/X86/subregisters.ll
M llvm/test/DebugInfo/X86/vla.ll
M llvm/test/DebugInfo/X86/zextload.ll
A llvm/test/Examples/OrcV2Examples/Inputs/argc_sub1.ll
R llvm/test/Examples/OrcV2Examples/Inputs/argc_sub1_elf.ll
M llvm/test/Examples/OrcV2Examples/lljit-with-remote-debugging.test
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_basic.s
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_ehframe_large_static_personality_encodings.s
M llvm/test/ExecutionEngine/OrcLazy/debug-descriptor-elf-minimal.ll
M llvm/test/ExecutionEngine/OrcLazy/debug-objects-elf-minimal.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_constant_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_global_address_space.ll
M llvm/test/Instrumentation/AddressSanitizer/asan-stack-safety.ll
M llvm/test/Instrumentation/AddressSanitizer/debug_info.ll
M llvm/test/Instrumentation/AddressSanitizer/debug_info_noninstrumented_alloca2.ll
M llvm/test/Instrumentation/AddressSanitizer/hoist-argument-init-insts.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime-uar-uas.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime.ll
M llvm/test/Instrumentation/AddressSanitizer/local_stack_base.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_dynamic_alloca.ll
M llvm/test/Instrumentation/AddressSanitizer/stack_layout.ll
M llvm/test/Instrumentation/InstrProfiling/platform.ll
M llvm/test/Instrumentation/InstrProfiling/profiling.ll
M llvm/test/MC/AArch64/FP8/dot.s
A llvm/test/MC/AArch64/SME2/bfadd-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfadd.s
A llvm/test/MC/AArch64/SME2/bfclamp-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfclamp.s
A llvm/test/MC/AArch64/SME2/bfmax-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmax.s
A llvm/test/MC/AArch64/SME2/bfmaxnm-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmaxnm.s
A llvm/test/MC/AArch64/SME2/bfmin-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmin.s
A llvm/test/MC/AArch64/SME2/bfminnm-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfminnm.s
A llvm/test/MC/AArch64/SME2/bfmla-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmla.s
A llvm/test/MC/AArch64/SME2/bfmls-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmls.s
A llvm/test/MC/AArch64/SME2/bfmopa-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmopa.s
A llvm/test/MC/AArch64/SME2/bfmops-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmops.s
A llvm/test/MC/AArch64/SME2/bfsub-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfsub.s
R llvm/test/MC/AArch64/SME2p1/bfadd-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfadd.s
R llvm/test/MC/AArch64/SME2p1/bfclamp-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfclamp.s
R llvm/test/MC/AArch64/SME2p1/bfmax-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmax.s
R llvm/test/MC/AArch64/SME2p1/bfmaxnm-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmaxnm.s
R llvm/test/MC/AArch64/SME2p1/bfmin-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmin.s
R llvm/test/MC/AArch64/SME2p1/bfminnm-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfminnm.s
R llvm/test/MC/AArch64/SME2p1/bfmla-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmla.s
R llvm/test/MC/AArch64/SME2p1/bfmls-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmls.s
R llvm/test/MC/AArch64/SME2p1/bfmopa-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmopa.s
R llvm/test/MC/AArch64/SME2p1/bfmops-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfmops.s
R llvm/test/MC/AArch64/SME2p1/bfsub-diagnostics.s
R llvm/test/MC/AArch64/SME2p1/bfsub.s
M llvm/test/MC/AArch64/SVE2p1/pmov.s
M llvm/test/MC/AMDGPU/gfx11_asm_err.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
A llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa-fake16.s
M llvm/test/MC/AMDGPU/gfx11_unsupported_sdwa.s
M llvm/test/MC/AMDGPU/gfx12_asm_smem.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
A llvm/test/MC/AMDGPU/gfx12_asm_vdsdir.s
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage_alias.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/literalv216.s
M llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3p_literalv216.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vdsdir.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p.txt
A llvm/test/MC/Disassembler/X86/apx/adx.txt
M llvm/test/MC/Disassembler/X86/apx/amx-tile.txt
A llvm/test/MC/Disassembler/X86/apx/bmi2.txt
A llvm/test/MC/Disassembler/X86/apx/cet.txt
M llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt
A llvm/test/MC/Disassembler/X86/apx/crc32.txt
A llvm/test/MC/Disassembler/X86/apx/dec.txt
A llvm/test/MC/Disassembler/X86/apx/div.txt
A llvm/test/MC/Disassembler/X86/apx/idiv.txt
A llvm/test/MC/Disassembler/X86/apx/imul.txt
A llvm/test/MC/Disassembler/X86/apx/inc.txt
R llvm/test/MC/Disassembler/X86/apx/invept.txt
M llvm/test/MC/Disassembler/X86/apx/invpcid.txt
R llvm/test/MC/Disassembler/X86/apx/invvpid.txt
M llvm/test/MC/Disassembler/X86/apx/movdir64b.txt
M llvm/test/MC/Disassembler/X86/apx/movdiri.txt
A llvm/test/MC/Disassembler/X86/apx/mul.txt
R llvm/test/MC/Disassembler/X86/apx/mulx.txt
R llvm/test/MC/Disassembler/X86/apx/rorx.txt
R llvm/test/MC/Disassembler/X86/apx/sarx.txt
A llvm/test/MC/Disassembler/X86/apx/sha.txt
R llvm/test/MC/Disassembler/X86/apx/sha1msg1.txt
R llvm/test/MC/Disassembler/X86/apx/sha1msg2.txt
R llvm/test/MC/Disassembler/X86/apx/sha1nexte.txt
R llvm/test/MC/Disassembler/X86/apx/sha1rnds4.txt
R llvm/test/MC/Disassembler/X86/apx/sha256msg1.txt
R llvm/test/MC/Disassembler/X86/apx/sha256msg2.txt
R llvm/test/MC/Disassembler/X86/apx/sha256rnds2.txt
R llvm/test/MC/Disassembler/X86/apx/shlx.txt
R llvm/test/MC/Disassembler/X86/apx/shrx.txt
A llvm/test/MC/Disassembler/X86/apx/vmx.txt
R llvm/test/MC/Disassembler/X86/apx/wrssd.txt
R llvm/test/MC/Disassembler/X86/apx/wrssq.txt
R llvm/test/MC/Disassembler/X86/apx/wrussd.txt
R llvm/test/MC/Disassembler/X86/apx/wrussq.txt
M llvm/test/MC/ELF/alias-to-local.s
M llvm/test/MC/ELF/relocation.s
M llvm/test/MC/ELF/section-combine.s
M llvm/test/MC/ELF/section.s
M llvm/test/MC/LoongArch/Basic/Integer/invalid64.s
A llvm/test/MC/LoongArch/Macros/macros-call.s
A llvm/test/MC/LoongArch/Misc/cfi-advance.s
A llvm/test/MC/LoongArch/Relocations/leb128.s
M llvm/test/MC/LoongArch/Relocations/relax-addsub.s
M llvm/test/MC/LoongArch/Relocations/relocations.s
A llvm/test/MC/RISCV/align-non-executable.s
M llvm/test/MC/RISCV/cfi-advance.s
M llvm/test/MC/RISCV/fixups-expr.s
M llvm/test/MC/RISCV/function-call.s
M llvm/test/MC/RISCV/rv32zacas-invalid.s
M llvm/test/MC/RISCV/rv64zacas-invalid.s
M llvm/test/MC/RISCV/tail-call.s
A llvm/test/MC/X86/apx/adx-att.s
A llvm/test/MC/X86/apx/adx-intel.s
M llvm/test/MC/X86/apx/amx-tile-att.s
M llvm/test/MC/X86/apx/amx-tile-intel.s
A llvm/test/MC/X86/apx/bmi2-att.s
A llvm/test/MC/X86/apx/bmi2-intel.s
A llvm/test/MC/X86/apx/cet-att.s
A llvm/test/MC/X86/apx/cet-intel.s
M llvm/test/MC/X86/apx/cmpccxadd-att.s
M llvm/test/MC/X86/apx/cmpccxadd-intel.s
A llvm/test/MC/X86/apx/crc32-att.s
A llvm/test/MC/X86/apx/crc32-intel.s
A llvm/test/MC/X86/apx/dec-att.s
A llvm/test/MC/X86/apx/dec-intel.s
A llvm/test/MC/X86/apx/div-att.s
A llvm/test/MC/X86/apx/div-intel.s
A llvm/test/MC/X86/apx/idiv-att.s
A llvm/test/MC/X86/apx/idiv-intel.s
A llvm/test/MC/X86/apx/imul-att.s
A llvm/test/MC/X86/apx/imul-intel.s
A llvm/test/MC/X86/apx/inc-att.s
A llvm/test/MC/X86/apx/inc-intel.s
R llvm/test/MC/X86/apx/invept-att.s
R llvm/test/MC/X86/apx/invept-intel.s
M llvm/test/MC/X86/apx/invpcid-att.s
M llvm/test/MC/X86/apx/invpcid-intel.s
R llvm/test/MC/X86/apx/invvpid-att.s
R llvm/test/MC/X86/apx/invvpid-intel.s
M llvm/test/MC/X86/apx/movdir64b-att.s
M llvm/test/MC/X86/apx/movdir64b-intel.s
M llvm/test/MC/X86/apx/movdiri-att.s
M llvm/test/MC/X86/apx/movdiri-intel.s
A llvm/test/MC/X86/apx/mul-att.s
A llvm/test/MC/X86/apx/mul-intel.s
R llvm/test/MC/X86/apx/mulx-att.s
R llvm/test/MC/X86/apx/mulx-intel.s
R llvm/test/MC/X86/apx/pdep-att.s
R llvm/test/MC/X86/apx/pdep-intel.s
R llvm/test/MC/X86/apx/pext-att.s
R llvm/test/MC/X86/apx/pext-intel.s
R llvm/test/MC/X86/apx/rorx-att.s
R llvm/test/MC/X86/apx/rorx-intel.s
R llvm/test/MC/X86/apx/sarx-att.s
R llvm/test/MC/X86/apx/sarx-intel.s
A llvm/test/MC/X86/apx/sha-att.s
A llvm/test/MC/X86/apx/sha-intel.s
R llvm/test/MC/X86/apx/sha1msg1-att.s
R llvm/test/MC/X86/apx/sha1msg1-intel.s
R llvm/test/MC/X86/apx/sha1msg2-att.s
R llvm/test/MC/X86/apx/sha1msg2-intel.s
R llvm/test/MC/X86/apx/sha1nexte-att.s
R llvm/test/MC/X86/apx/sha1nexte-intel.s
R llvm/test/MC/X86/apx/sha1rnds4-att.s
R llvm/test/MC/X86/apx/sha1rnds4-intel.s
R llvm/test/MC/X86/apx/sha256msg1-att.s
R llvm/test/MC/X86/apx/sha256msg1-intel.s
R llvm/test/MC/X86/apx/sha256msg2-att.s
R llvm/test/MC/X86/apx/sha256msg2-intel.s
R llvm/test/MC/X86/apx/sha256rnds2-att.s
R llvm/test/MC/X86/apx/sha256rnds2-intel.s
R llvm/test/MC/X86/apx/shlx-att.s
R llvm/test/MC/X86/apx/shlx-intel.s
R llvm/test/MC/X86/apx/shrx-att.s
R llvm/test/MC/X86/apx/shrx-intel.s
A llvm/test/MC/X86/apx/vmx-att.s
A llvm/test/MC/X86/apx/vmx-intel.s
R llvm/test/MC/X86/apx/wrssd-att.s
R llvm/test/MC/X86/apx/wrssd-intel.s
R llvm/test/MC/X86/apx/wrssq-att.s
R llvm/test/MC/X86/apx/wrssq-intel.s
R llvm/test/MC/X86/apx/wrussd-att.s
R llvm/test/MC/X86/apx/wrussd-intel.s
R llvm/test/MC/X86/apx/wrussq-att.s
R llvm/test/MC/X86/apx/wrussq-intel.s
M llvm/test/MC/X86/x86_64-asm-match.s
M llvm/test/Other/codegenprepare-and-debug.ll
M llvm/test/Other/print-at-pass-number.ll
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
A llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/type-inference.td
M llvm/test/TableGen/GlobalISelEmitter.td
A llvm/test/TableGen/MacroFusion.td
M llvm/test/TableGen/getsetop.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/ThinLTO/X86/devirt.ll
M llvm/test/ThinLTO/X86/devirt2.ll
M llvm/test/ThinLTO/X86/devirt_check.ll
M llvm/test/ThinLTO/X86/devirt_promote.ll
M llvm/test/ThinLTO/X86/devirt_promote_legacy.ll
M llvm/test/ThinLTO/X86/devirt_pure_virtual_base.ll
M llvm/test/ThinLTO/X86/devirt_single_hybrid.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_hidden.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_public.ll
M llvm/test/ThinLTO/X86/funcimport.ll
M llvm/test/ThinLTO/X86/globals-import-const-fold.ll
M llvm/test/ThinLTO/X86/import-constant.ll
M llvm/test/ThinLTO/X86/index-const-prop-alias.ll
M llvm/test/ThinLTO/X86/index-const-prop.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/combine-address-mode.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/free-zext.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/sink-gather-scatter-addressing.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/trunc-weird-user.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/zext-to-shuffle.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/addressing-modes.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/no-sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/branch-on-zero.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/dead-gep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/memory-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/splitgep.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-constant-numerator.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-not-exact.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div-special-cases.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/bypass-slow-div.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-introduce-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/NVPTX/dont-sink-nop-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/and-mask-sink.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/SPARC/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/catchpad-phi-cast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cgp_shuffle_crash.ll
M llvm/test/Transforms/CodeGenPrepare/X86/computedgoto.ll
M llvm/test/Transforms/CodeGenPrepare/X86/cttz-ctlz.ll
M llvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/CodeGenPrepare/X86/freeze-brcond.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gep-unmerging.ll
M llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
M llvm/test/Transforms/CodeGenPrepare/X86/masked-gather-struct-gep.ll
M llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
M llvm/test/Transforms/CodeGenPrepare/X86/optimizeSelect-DT.ll
M llvm/test/Transforms/CodeGenPrepare/X86/overflow-intrinsics.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr27536.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr72046.ll
M llvm/test/Transforms/CodeGenPrepare/X86/recursively-delete-dead-instructions.ll
M llvm/test/Transforms/CodeGenPrepare/X86/remove-assume-block.ll
M llvm/test/Transforms/CodeGenPrepare/X86/select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrspacecast.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/statepoint-relocate.ll
M llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll
M llvm/test/Transforms/CodeGenPrepare/X86/widenable-condition.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink.ll
M llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
M llvm/test/Transforms/CodeGenPrepare/skip-merging-case-block.ll
M llvm/test/Transforms/ConstraintElimination/abs.ll
A llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-multiples.ll
A llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-signed.ll
M llvm/test/Transforms/ConstraintElimination/shl.ll
M llvm/test/Transforms/ConstraintElimination/sub-nuw.ll
A llvm/test/Transforms/Coroutines/coro-debug-frame-variable-O1.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
M llvm/test/Transforms/CorrelatedValuePropagation/cond-using-block-value.ll
M llvm/test/Transforms/CorrelatedValuePropagation/select.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
A llvm/test/Transforms/FunctionAttrs/noundef.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
M llvm/test/Transforms/HotColdSplit/coldentrycount.ll
M llvm/test/Transforms/Inline/devirtualize-3.ll
M llvm/test/Transforms/Inline/devirtualize-5.ll
M llvm/test/Transforms/Inline/launder.invariant.group.ll
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-comb-m-forms-no-active-lanes.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/and-xor-merge.ll
M llvm/test/Transforms/InstCombine/bitreverse-known-bits.ll
A llvm/test/Transforms/InstCombine/bitwiselogic-bitmanip.ll
M llvm/test/Transforms/InstCombine/bswap-fold.ll
M llvm/test/Transforms/InstCombine/call-cast-attrs.ll
A llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
A llvm/test/Transforms/InstCombine/icmp-abs.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/memcpy-to-load.ll
M llvm/test/Transforms/InstCombine/minmax-of-minmax.ll
M llvm/test/Transforms/InstCombine/or-xor.ll
M llvm/test/Transforms/InstCombine/phi.ll
A llvm/test/Transforms/InstCombine/pr77064.ll
M llvm/test/Transforms/InstCombine/select-and-or.ll
M llvm/test/Transforms/InstCombine/select-factorize.ll
M llvm/test/Transforms/InstCombine/smax-icmp.ll
A llvm/test/Transforms/InstCombine/switch-shl.ll
A llvm/test/Transforms/InstCombine/switch-sub.ll
A llvm/test/Transforms/InstCombine/switch-zext-sext.ll
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
M llvm/test/Transforms/InstSimplify/select.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/JumpThreading/ddt-crash.ll
M llvm/test/Transforms/JumpThreading/loop-phi.ll
M llvm/test/Transforms/JumpThreading/unreachable-loops.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/codegenprepare-produced-address-math.ll
A llvm/test/Transforms/LoopFlatten/loop-flatten-gep.ll
A llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
A llvm/test/Transforms/LoopIdiom/AArch64/lit.local.cfg
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_estimated_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave_count_for_known_tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-call-linear-args.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/large-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/if-conversion-nest.ll
M llvm/test/Transforms/LoopVectorize/if-pred-non-void.ll
M llvm/test/Transforms/LoopVectorize/if-reduction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/load-of-struct-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/loop-scalars.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LowerTypeTests/cfi-unwind-direct-call.ll
M llvm/test/Transforms/MemCpyOpt/no-libcalls.ll
M llvm/test/Transforms/PGOProfile/Inputs/multiple_hash_profile.proftext
M llvm/test/Transforms/PGOProfile/multiple_hash_profile.ll
M llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/SystemZ/sub-xor.ll
M llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/merge-functions.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reduction-known-first-value.ll
M llvm/test/Transforms/PhaseOrdering/bitcast-store-branch.ll
M llvm/test/Transforms/PhaseOrdering/dce-after-argument-promotion-loads.ll
M llvm/test/Transforms/PhaseOrdering/early-arg-attrs-inference.ll
M llvm/test/Transforms/PhaseOrdering/gep-null-compare-in-loop.ll
A llvm/test/Transforms/PhaseOrdering/switch-sext.ll
M llvm/test/Transforms/Reassociate/basictest.ll
M llvm/test/Transforms/SCCP/pr50901.ll
M llvm/test/Transforms/SCCP/switch.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reorder-fmuladd-crash.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather_extract_from_vectorbuild.ll
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll
A llvm/test/Transforms/SLPVectorizer/X86/splat-buildvector.ll
M llvm/test/Transforms/SampleProfile/ctxsplit.ll
M llvm/test/Transforms/SampleProfile/section-accurate-samplepgo.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AArch64/scalable-vector-geps.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
M llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
A llvm/test/Transforms/SeparateConstOffsetFromGEP/split-gep-or-as-add.ll
A llvm/test/Transforms/SimpleLoopUnswitch/memssa-readnone-access.ll
M llvm/test/Transforms/SimplifyCFG/rangereduce.ll
A llvm/test/Transforms/SimplifyCFG/switch-dead-default-lookup-table.ll
M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
M llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll
M llvm/test/Transforms/Util/add-TLI-mappings.ll
A llvm/test/Verifier/NVPTX/lit.local.cfg
A llvm/test/Verifier/NVPTX/setmaxnreg.ll
M llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test
M llvm/test/tools/dsymutil/ARM/dwarf5-macho.test
A llvm/test/tools/dsymutil/ARM/inline-source.test
A llvm/test/tools/dsymutil/Inputs/inline.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_export_dynamic.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll
M llvm/test/tools/gold/X86/opt-level.ll
M llvm/test/tools/gold/X86/v1.16/devirt_vcall_vis_export_dynamic.ll
M llvm/test/tools/llvm-ar/error-opening-permission.test
A llvm/test/tools/llvm-cxxfilt/no-params.test
M llvm/test/tools/llvm-debuginfo-analyzer/cmdline.test
A llvm/test/tools/llvm-dwarfdump/AArch64/verify-no-file.yaml
M llvm/test/tools/llvm-dwarfdump/X86/output.s
M llvm/test/tools/llvm-ifs/fail-file-write.test
A llvm/test/tools/llvm-mca/RISCV/SiFive7/strided-load-store.s
M llvm/test/tools/llvm-mca/RISCV/SiFive7/strided-load-x0.s
A llvm/test/tools/llvm-nm/wasm/linked.yaml
A llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx12.s
A llvm/test/tools/llvm-objdump/wasm/linked-symbol-table.yaml
M llvm/test/tools/llvm-profdata/Inputs/FUnique.proftext
M llvm/test/tools/llvm-profdata/Inputs/NoFUnique.proftext
M llvm/test/tools/llvm-profdata/Inputs/flatten_instr.proftext
M llvm/test/tools/llvm-profdata/suppl-instr-with-sample-flatten.test
M llvm/test/tools/llvm-ranlib/error-opening-permission.test
M llvm/test/tools/llvm-readobj/ELF/reloc-types-loongarch64.test
M llvm/test/tools/llvm-symbolizer/frame.s
A llvm/test/tools/lto/discard-value-names.ll
M llvm/tools/dsymutil/CMakeLists.txt
M llvm/tools/dsymutil/DwarfLinkerForBinary.cpp
M llvm/tools/dsymutil/DwarfLinkerForBinary.h
M llvm/tools/dsymutil/LinkUtils.h
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/lli/ExecutionUtils.cpp
M llvm/tools/lli/ForwardingMemoryManager.h
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-cxxfilt/Opts.td
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
M llvm/tools/llvm-dwarfutil/CMakeLists.txt
M llvm/tools/llvm-dwarfutil/DebugInfoLinker.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
M llvm/tools/llvm-exegesis/lib/Assembler.h
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/SnippetRepetitor.cpp
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
M llvm/tools/llvm-shlib/CMakeLists.txt
M llvm/tools/opt/opt.cpp
M llvm/unittests/ADT/StringRefTest.cpp
M llvm/unittests/Analysis/VectorFunctionABITest.cpp
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
M llvm/unittests/DWARFLinkerParallel/StringPoolTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/Support/RISCVISAInfoTest.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/tools/llvm-exegesis/Common/AssemblerUtils.h
M llvm/unittests/tools/llvm-exegesis/X86/BenchmarkResultTest.cpp
M llvm/utils/TableGen/CMakeLists.txt
M llvm/utils/TableGen/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
A llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
M llvm/utils/TableGen/PredicateExpander.cpp
M llvm/utils/TableGen/PredicateExpander.h
A llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
R llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp
M llvm/utils/TableGen/X86FoldTablesEmitter.cpp
A llvm/utils/TableGen/X86ManualCompressEVEXTables.def
M llvm/utils/emacs/tablegen-mode.el
M llvm/utils/gn/build/sync_source_lists_from_cmake.py
M llvm/utils/gn/secondary/bolt/lib/Rewrite/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DWARFLinker/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/DWARFLinker/Classic/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/DWARFLinker/Parallel/BUILD.gn
R llvm/utils/gn/secondary/llvm/lib/DWARFLinkerParallel/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-dwarfutil/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
M llvm/utils/lit/lit/llvm/config.py
M llvm/utils/release/test-release.sh
M mlir/CMakeLists.txt
M mlir/docs/Dialects/GPU.md
A mlir/docs/Dialects/OpenACCDialect.md
M mlir/docs/Dialects/Transform.md
M mlir/docs/Passes.md
M mlir/docs/Tutorials/transform/Ch0.md
M mlir/docs/Tutorials/transform/Ch1.md
M mlir/docs/Tutorials/transform/Ch2.md
M mlir/docs/Tutorials/transform/Ch3.md
A mlir/docs/Tutorials/transform/Ch4.md
M mlir/docs/Tutorials/transform/ChH.md
M mlir/docs/Tutorials/transform/_index.md
M mlir/examples/minimal-opt/README.md
M mlir/examples/toy/Ch6/toyc.cpp
M mlir/examples/toy/Ch7/toyc.cpp
M mlir/examples/transform/CMakeLists.txt
M mlir/examples/transform/Ch3/transform-opt/transform-opt.cpp
A mlir/examples/transform/Ch4/CMakeLists.txt
A mlir/examples/transform/Ch4/include/CMakeLists.txt
A mlir/examples/transform/Ch4/include/MyExtension.h
A mlir/examples/transform/Ch4/include/MyExtension.td
A mlir/examples/transform/Ch4/lib/CMakeLists.txt
A mlir/examples/transform/Ch4/lib/MyExtension.cpp
A mlir/examples/transform/Ch4/transform-opt/transform-opt.cpp
A mlir/include/mlir-c/Dialect/SPIRV.h
A mlir/include/mlir/Analysis/Presburger/Barvinok.h
A mlir/include/mlir/Analysis/Presburger/GeneratingFunction.h
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/include/mlir/Analysis/Presburger/Matrix.h
M mlir/include/mlir/Analysis/Presburger/PresburgerSpace.h
M mlir/include/mlir/Config/mlir-config.h.cmake
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Conversion/GPUToSPIRV/GPUToSPIRV.h
M mlir/include/mlir/Conversion/LLVMCommon/TypeConverter.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Passes.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/BufferUtils.h
M mlir/include/mlir/Dialect/DLTI/DLTI.h
M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitCAttributes.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitCTypes.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Utils.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/Transforms/Passes.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshBase.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/Dialect/Mesh/Interfaces/ShardingInterface.h
A mlir/include/mlir/Dialect/Mesh/Transforms/ReshardingSpmdizationDoc.md
M mlir/include/mlir/Dialect/Mesh/Transforms/Simplifications.h
A mlir/include/mlir/Dialect/Mesh/Transforms/Spmdization.h
A mlir/include/mlir/Dialect/Mesh/Transforms/Transforms.h
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
M mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCooperativeMatrixOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/include/mlir/Dialect/Tensor/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Transform/IR/TransformOps.td
M mlir/include/mlir/Dialect/Utils/IndexingUtils.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/ExecutionEngine/CRunnerUtils.h
M mlir/include/mlir/ExecutionEngine/RunnerUtils.h
M mlir/include/mlir/IR/AffineExpr.h
M mlir/include/mlir/IR/AffineExprVisitor.h
M mlir/include/mlir/IR/Dominance.h
M mlir/include/mlir/IR/Operation.h
A mlir/include/mlir/IR/PDLPatternMatch.h.inc
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/IR/Value.h
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
M mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
M mlir/include/mlir/Pass/PassManager.h
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
A mlir/lib/Analysis/Presburger/Barvinok.cpp
M mlir/lib/Analysis/Presburger/CMakeLists.txt
R mlir/lib/Analysis/Presburger/GeneratingFunction.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/lib/Analysis/Presburger/PresburgerSpace.cpp
M mlir/lib/Analysis/Presburger/QuasiPolynomial.cpp
M mlir/lib/AsmParser/Parser.cpp
M mlir/lib/AsmParser/Parser.h
M mlir/lib/AsmParser/ParserState.h
M mlir/lib/Bytecode/Writer/BytecodeWriter.cpp
M mlir/lib/Bytecode/Writer/IRNumbering.cpp
M mlir/lib/CAPI/Dialect/CMakeLists.txt
A mlir/lib/CAPI/Dialect/SPIRV.cpp
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/ArithCommon/AttrToLLVMConverter.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ComplexToLibm/CMakeLists.txt
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRVPass.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
M mlir/lib/Conversion/MathToLibm/CMakeLists.txt
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithDialect.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Bufferization/TransformOps/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/Transforms/BufferOptimizations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferUtils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferViewFlowAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OwnershipBasedBufferDeallocation.cpp
M mlir/lib/Dialect/Complex/IR/ComplexDialect.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/DLTI/DLTI.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToNVVMPipeline.cpp
M mlir/lib/Dialect/GPU/Transforms/AllReduceLowering.cpp
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp
A mlir/lib/Dialect/GPU/Transforms/Utils.cpp
M mlir/lib/Dialect/Index/IR/IndexDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMInlining.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/Transforms/DecomposeLinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/EliminateEmptyTensors.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Math/IR/MathDialect.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefDialect.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/lib/Dialect/Mesh/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
A mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
A mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
M mlir/lib/Dialect/SPIRV/IR/CastOps.cpp
M mlir/lib/Dialect/SPIRV/IR/CooperativeMatrixOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
Log Message:
-----------
Merge branch 'main' into users/boomanaiden154/exegesis-validation-counters-tblgen
Compare: https://github.com/llvm/llvm-project/compare/6d5262636250...386d3dd93315
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