[all-commits] [llvm/llvm-project] 0c24c1: [RISCV][ISel] Use vaaddu with rounding mode rdn fo...

Chia via All-commits all-commits at lists.llvm.org
Mon Jan 8 22:17:53 PST 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0c24c175f262b1043752c67798cd83f79188e9d2
      https://github.com/llvm/llvm-project/commit/0c24c175f262b1043752c67798cd83f79188e9d2
  Author: Chia <sun1011jacobi at gmail.com>
  Date:   2024-01-09 (Tue, 09 Jan 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
    A llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll

  Log Message:
  -----------
  [RISCV][ISel] Use vaaddu with rounding mode rdn for ISD::AVGFLOORU. (#76550)

This patch aims to use `vaaddu` with rounding mode rdn (i.e `vxrm[1:0] =
0b10`) for `ISD::AVGFLOORU`.

### Source code 
```
define <8 x i8> @vaaddu_auto(ptr %x, ptr %y, ptr %z) {
  %xv = load <8 x i8>, ptr %x, align 2
  %yv = load <8 x i8>, ptr %y, align 2
  %xzv = zext <8 x i8> %xv to <8 x i16>
  %yzv = zext <8 x i8> %yv to <8 x i16>
  %add = add nuw nsw <8 x i16> %xzv, %yzv
  %div = lshr <8 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
  %ret = trunc <8 x i16> %div to <8 x i8>
  ret <8 x i8> %ret 
}
```

### Before this patch 
```
vaaddu_auto: 
        vsetivli        zero, 8, e8, mf2, ta, ma
        vle8.v  v8, (a0)
        vle8.v  v9, (a1)
        vwaddu.vv       v10, v8, v9
        vnsrl.wi        v8, v10, 1
        ret
```
### After this patch 
```
vaaddu_auto: 
	vsetivli	zero, 8, e8, mf2, ta, ma
	vle8.v	v8, (a0)
	vle8.v	v9, (a1)
	csrwi	vxrm, 2
	vaaddu.vv	v8, v8, v9
	ret
```

### Note on signed averaging addition

Based on the rvv spec, there is also a variant for signed averaging
addition called `vaadd`.
But AFAIU, no matter in which rounding mode, we cannot achieve the
semantic of signed averaging addition through `vaadd`.
Thus this patch only introduces `vaaddu`.




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