[all-commits] [llvm/llvm-project] a96070: [RISCV] Remove incomplete PRE_DEC/POST_DEC code fo...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a960703466e937d99ab7a7a29f7448e1bc926e35
      https://github.com/llvm/llvm-project/commit/a960703466e937d99ab7a7a29f7448e1bc926e35
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-01-04 (Thu, 04 Jan 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h

  Log Message:
  -----------
  [RISCV] Remove incomplete PRE_DEC/POST_DEC code for XTHeadMemIdx. (#76922)

As far as I can tell if getIndexedAddressParts received an ISD::SUB, the
constant would be negated. So `IsInc` should be set to true since the
SUB was effectively converted to ADD. This means we should never use
PRE_DEC/POST_DEC.

No tests are affected because DAGCombine aggressively turns SUB with
constant into ADD so no lit test has a SUB reach getIndexedAddressParts.