[all-commits] [llvm/llvm-project] 58a335: [X86] Fold concat_vectors(permq(x), permq(x)) -> pe...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 58a335a3f12d55f48b86c03a33f414f593eb38d0
      https://github.com/llvm/llvm-project/commit/58a335a3f12d55f48b86c03a33f414f593eb38d0
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-01-03 (Wed, 03 Jan 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
    M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll

  Log Message:
  -----------
  [X86] Fold concat_vectors(permq(x),permq(x)) -> permq(concat_vectors(x,x))

Handle a common subvector shuffle pattern in combineConcatVectorOps


  Commit: 39be138cb771f36a13ccbf96b55ae025ba821841
      https://github.com/llvm/llvm-project/commit/39be138cb771f36a13ccbf96b55ae025ba821841
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-01-03 (Wed, 03 Jan 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
    M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
    M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll

  Log Message:
  -----------
  [X86] combineTargetShuffle - fold SHUF128(CONCAT(),CONCAT()) to peek through upper subvectors

If SHUF128 is accessing only the upper half of a vector source that is a concatenation/insert_subvector then try to access the subvector directly and adjust the element mask accordingly.


Compare: https://github.com/llvm/llvm-project/compare/4444a7e89a1e...39be138cb771