[all-commits] [llvm/llvm-project] 5b5614: [AArch64][GlobalISel] Add legalization for vecredu...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b5614c92fb2003a6b40edde4f036e2e65473561
      https://github.com/llvm/llvm-project/commit/5b5614c92fb2003a6b40edde4f036e2e65473561
  Author: David Green <david.green at arm.com>
  Date:   2024-01-03 (Wed, 03 Jan 2024)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-reduce-fmul.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    M llvm/test/CodeGen/AArch64/vecreduce-fmul.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Add legalization for vecreduce.fmul (#73309)

There are no native operations that we can use for floating point mul,
so lower by splitting the vector into chunks multiple times. There is
still a missing fold for fmul_indexed, that could help the gisel test
cases a bit.