[all-commits] [llvm/llvm-project] 76facd: [flang][runtime] Enable more APIs in the offload b...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Tue Jan 2 09:59:19 PST 2024
Branch: refs/heads/users/vitalybuka/spr/hwasan-workaround-unsupported-assignmenttrackingpass
Home: https://github.com/llvm/llvm-project
Commit: 76facde32c2151c3ba6774ff7416281c680bf8bf
https://github.com/llvm/llvm-project/commit/76facde32c2151c3ba6774ff7416281c680bf8bf
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2023-12-28 (Thu, 28 Dec 2023)
Changed paths:
M flang/include/flang/Runtime/array-constructor.h
M flang/include/flang/Runtime/character.h
M flang/include/flang/Runtime/descriptor.h
M flang/include/flang/Runtime/inquiry.h
M flang/include/flang/Runtime/memory.h
M flang/include/flang/Runtime/misc-intrinsic.h
M flang/include/flang/Runtime/pointer.h
M flang/include/flang/Runtime/ragged.h
M flang/runtime/CMakeLists.txt
M flang/runtime/allocatable.cpp
M flang/runtime/array-constructor.cpp
M flang/runtime/character.cpp
M flang/runtime/copy.cpp
M flang/runtime/derived-api.cpp
M flang/runtime/dot-product.cpp
M flang/runtime/extrema.cpp
M flang/runtime/findloc.cpp
M flang/runtime/freestanding-tools.h
M flang/runtime/inquiry.cpp
M flang/runtime/matmul-transpose.cpp
M flang/runtime/matmul.cpp
M flang/runtime/memory.cpp
M flang/runtime/misc-intrinsic.cpp
M flang/runtime/numeric.cpp
M flang/runtime/pointer.cpp
M flang/runtime/product.cpp
M flang/runtime/ragged.cpp
M flang/runtime/reduction.cpp
M flang/runtime/sum.cpp
M flang/runtime/support.cpp
M flang/runtime/tools.h
Log Message:
-----------
[flang][runtime] Enable more APIs in the offload build. (#76486)
Commit: 6dc5ba4cca72a5c25597722b8a8c7dcff5fb67be
https://github.com/llvm/llvm-project/commit/6dc5ba4cca72a5c25597722b8a8c7dcff5fb67be
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-28 (Thu, 28 Dec 2023)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/machine-csr-names.s
R llvm/test/MC/RISCV/xsfcie-invalid.s
R llvm/test/MC/RISCV/xsfcie-valid.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Remove XSfcie extension.
This reverts 0d3eee33f262402562a1ff28106dbb2f59031bdb and
4c37d30e22ae655394c8b3a7e292c06d393b9b44.
XSfcie is not an official SiFive extension name. It stands for
SiFive Custom Instruction Extension, which is mentioned in the S76
manual, but then elsewhere in the manual says it is not supported
for S76.
LLVM had various instructions and CSRs listed as part of this
extension, but as far as SiFive is concerned, none of them are part
of it. There are no documented extension names for these instructions
and CSRs either externally or internally.
If these are important to LLVM users, I can facilitate creating
extension names for them and have them documented. For now I'm
removing everything.
Unfortunately, these instructions and CSRs are in LLVM 17 so this
is an incompatible change.
Commit: fdccfa33d96b1935e90a9148a661f51ea8b46aa3
https://github.com/llvm/llvm-project/commit/fdccfa33d96b1935e90a9148a661f51ea8b46aa3
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2023-12-28 (Thu, 28 Dec 2023)
Changed paths:
M flang/include/flang/Common/uint128.h
M flang/runtime/edit-input.cpp
Log Message:
-----------
[Flang] Shift the data from lower to higher order bits in the big endian environment (#73670)
Shift the data from lower to higher order bits when memcpy the value in
the namelist in the big endian environment
---------
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Co-authored-by: Kelvin Li <kli at ca.ibm.com>
Commit: 2dc50d28414c827b6723ae6b01c20a7fc3f38165
https://github.com/llvm/llvm-project/commit/2dc50d28414c827b6723ae6b01c20a7fc3f38165
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-28 (Thu, 28 Dec 2023)
Changed paths:
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-globals.c
Log Message:
-----------
[RISCV] Correct the CHECK prefixes in attr-riscv-rvv-vector-bits-globals.c to use the correct vector size. NFC
These were copied from AArch64 where vscale is multiplied by 128
to get the vector length. For RISC-V, vscale is multiplied by 64.
Commit: 6c87f46795699ee0997ebb85365d9df45e48292c
https://github.com/llvm/llvm-project/commit/6c87f46795699ee0997ebb85365d9df45e48292c
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
Log Message:
-----------
[X86][NFC] Remove meaningless FIXME
Solved by #76485.
Commit: eaa32d20a2612370371047140734e91f8f22dea1
https://github.com/llvm/llvm-project/commit/eaa32d20a2612370371047140734e91f8f22dea1
Author: long.chen <lipracer at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/test/Dialect/Affine/loop-fusion.mlir
Log Message:
-----------
[mlir] fix affine-loop-fusion crash (#76351)
If `user` not lies in `Region` `findAncestorOpInRegion` will return
`nullptr`.
Fixes https://github.com/llvm/llvm-project/issues/76281.
Commit: c97a7675eea49ce02f38feba2ac9583731c8977e
https://github.com/llvm/llvm-project/commit/c97a7675eea49ce02f38feba2ac9583731c8977e
Author: Qiu Chaofan <qiucofan at cn.ibm.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/f128-arith.ll
Log Message:
-----------
[PowerPC] Expand FSINCOS of fp128 (#76494)
Commit: 2128fca6c1e3a0ba4d105f62ad0f6a841e992cfb
https://github.com/llvm/llvm-project/commit/2128fca6c1e3a0ba4d105f62ad0f6a841e992cfb
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/getelementptr.ll
Log Message:
-----------
[InstCombine] Canonicalize `gep T* X, V / sizeof(T)` to `gep i8* X, V` (#76458)
This patch canonicalize `gep T* X, V / sizeof(T)` to `gep i8* X, V`.
Alive2: https://alive2.llvm.org/ce/z/7XGjiB
As this pattern has been handled by the backends, the motivation of this
patch is to reduce the ref count of sdiv, which will enable more
optimizations.
Commit: 2d0b55c7756c376b221b58cd939b320c6b569de7
https://github.com/llvm/llvm-project/commit/2d0b55c7756c376b221b58cd939b320c6b569de7
Author: Fangrui Song <i at maskray.me>
Date: 2023-12-28 (Thu, 28 Dec 2023)
Changed paths:
M clang/test/Driver/fbasic-block-sections.c
Log Message:
-----------
[Driver][test] -fbasic-block-sections: replace legacy -target with --target=
Commit: a22c8efad733cf3407a93387a6a9c743659dc74c
https://github.com/llvm/llvm-project/commit/a22c8efad733cf3407a93387a6a9c743659dc74c
Author: Fangrui Song <i at maskray.me>
Date: 2023-12-28 (Thu, 28 Dec 2023)
Changed paths:
R llvm/test/MC/X86/register-assignment-error.s
M llvm/test/MC/X86/register-assignment.s
Log Message:
-----------
[MC,test] Merge register-assignment-error.s into register-assignment.s and improve the test
To actually address my review comment in #75693
Commit: d3ddb93d0463abf56d04dad3d37f84562ac7de72
https://github.com/llvm/llvm-project/commit/d3ddb93d0463abf56d04dad3d37f84562ac7de72
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86] Fix typo about the internal name of instructions
64ri -> 64ri32
Commit: 47c88bcd5de91522241cca1aaa1b7762ceb01394
https://github.com/llvm/llvm-project/commit/47c88bcd5de91522241cca1aaa1b7762ceb01394
Author: wanglei <wanglei at loongson.cn>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
Log Message:
-----------
[LoongArch] Fix LASX vector_extract codegen
Custom lowering `ISD::EXTRACT_VECTOR_ELT` with lasx.
Commit: c7367f985e0d27aeb8bc993406d1b9f4ca307399
https://github.com/llvm/llvm-project/commit/c7367f985e0d27aeb8bc993406d1b9f4ca307399
Author: wanglei <wanglei at loongson.cn>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
Log Message:
-----------
[LoongArch] Fix incorrect pattern XVREPL128VEI_{W/D} instructions
Remove the incorrect patterns for `XVREPL128VEI_{W/D}` instructions,
and add correct patterns for XVREPLVE0_{W/D} instructions
Commit: 5b155aea0e529b7b5c807e189fef6ea5cd5faec9
https://github.com/llvm/llvm-project/commit/5b155aea0e529b7b5c807e189fef6ea5cd5faec9
Author: Chia <sun1011jacobi at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
A llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
Log Message:
-----------
[RISCV][ISel] Combine scalable vector add/sub/mul with zero/sign extension (#72340)
This PR mainly aims at resolving the below missed-optimization case,
while it could also be considered as an extension of the previous patch
https://reviews.llvm.org/D133739?id=
## Missed-Optimization Case
Compiler Explorer: https://godbolt.org/z/GzWzP7Pfh
### Source Code:
```
define <vscale x 2 x i16> @multiple_users(ptr %x, ptr %y, ptr %z) {
%a = load <vscale x 2 x i8>, ptr %x
%b = load <vscale x 2 x i8>, ptr %y
%b2 = load <vscale x 2 x i8>, ptr %z
%c = sext <vscale x 2 x i8> %a to <vscale x 2 x i16>
%d = sext <vscale x 2 x i8> %b to <vscale x 2 x i16>
%d2 = sext <vscale x 2 x i8> %b2 to <vscale x 2 x i16>
%e = mul <vscale x 2 x i16> %c, %d
%f = add <vscale x 2 x i16> %c, %d2
%g = sub <vscale x 2 x i16> %c, %d2
%h = or <vscale x 2 x i16> %e, %f
%i = or <vscale x 2 x i16> %h, %g
ret <vscale x 2 x i16> %i
}
```
### Before This Patch
```
# %bb.0:
vsetvli a3, zero, e16, mf2, ta, ma
vle8.v v8, (a0)
vle8.v v9, (a1)
vle8.v v10, (a2)
svf2 v11, v8
vsext.vf2 v8, v9
vsext.vf2 v9, v10
vmul.vv v8, v11, v8
vadd.vv v10, v11, v9
vsub.vv v9, v11, v9
vor.vv v8, v8, v10
vor.vv v8, v8, v9
ret
```
### After This Patch
```
# %bb.0:
vsetvli a3, zero, e8, mf4, ta, ma
vle8.v v8, (a0)
vle8.v v9, (a1)
vle8.v v10, (a2)
vwmul.vv v11, v8, v9
vwadd.vv v9, v8, v10
vwsub.vv v12, v8, v10
vsetvli zero, zero, e16, mf2, ta, ma
vor.vv v8, v11, v9
vor.vv v8, v8, v12
ret
```
We can see Add/Sub/Mul are combined with the Sign Extension.
## Relation to the Patch D133739
The patch D133739 introduced an optimization for folding `ADD_VL`/
`SUB_VL` / `MUL_V` with `VSEXT_VL` / `VZEXT_VL`. However, the patch did
not consider the case of non-fixed length vector case, thus this PR
could also be considered as an extension for the D133739.
Furthermore, in the current `SelectionDAG`, we represent scalable vector
add (or any binary operator) as a normal `ADD` operation. It might be
better to use an Opcode like `ADD_VL`, which needs further conversation
and decision.
Commit: da5378e87e11689d05a58198d6e15e9551916794
https://github.com/llvm/llvm-project/commit/da5378e87e11689d05a58198d6e15e9551916794
Author: wanglei <wanglei at loongson.cn>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/vselect.ll
M llvm/test/CodeGen/LoongArch/lsx/vselect.ll
Log Message:
-----------
[LoongArch] Fix incorrect pattern [X]VBITSELI_B instructions
Adjusted the operand order of [X]VBITSELI_B to correctly match vselect.
Commit: dbd1fb8e6f1e4a8c91059308b286f8f2a9471a8e
https://github.com/llvm/llvm-project/commit/dbd1fb8e6f1e4a8c91059308b286f8f2a9471a8e
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
Log Message:
-----------
[clangd] Avoid crash when summarizing pointer-to-member expr for block-end hint (#76492)
For calls through a pointer to member, CXXMemberCallExpr::getCallee() is
a BinaryOperator with operator ->* (after unwrapping parens).
getMethodDecl() only returns non-null if the callee is a MemberExpr.
Fixes https://github.com/clangd/clangd/issues/1873
Commit: 87779fd823bb0d619c26449db91c7504ce7513c5
https://github.com/llvm/llvm-project/commit/87779fd823bb0d619c26449db91c7504ce7513c5
Author: Chia <sun1011jacobi at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
A llvm/test/CodeGen/RISCV/rvv/trunc-sat-clip.ll
Log Message:
-----------
[RISCV][ISel] Remove redundant min/max in saturating truncation (#75145)
This patch closed #73424, which is also a missed-optimization case
similar to #68466 on X86.
## Source Code
```
define void @trunc_sat_i8i16(ptr %x, ptr %y) {
%1 = load <8 x i16>, ptr %x, align 16
%2 = tail call <8 x i16> @llvm.smax.v8i16(<8 x i16> %1, <8 x i16> <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>)
%3 = tail call <8 x i16> @llvm.smin.v8i16(<8 x i16> %2, <8 x i16> <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>)
%4 = trunc <8 x i16> %3 to <8 x i8>
store <8 x i8> %4, ptr %y, align 8
ret void
}
```
## Before this patch:
```
trunc_sat_i8i16: # @trunc_maxmin_id_i8i16
vsetivli zero, 8, e16, m1, ta, ma
vle16.v v8, (a0)
li a0, -128
vmax.vx v8, v8, a0
li a0, 127
vmin.vx v8, v8, a0
vsetvli zero, zero, e8, mf2, ta, ma
vnsrl.wi v8, v8, 0
vse8.v v8, (a1)
ret
```
## After this patch:
```
trunc_sat_i8i16: # @trunc_maxmin_id_i8i16
vsetivli zero, 8, e8, mf2, ta, ma
vle16.v v8, (a0)
csrwi vxrm, 0
vnclip.wi v8, v8, 0
vse8.v v8, (a1)
ret
```
Commit: e13e95bc44b0f3cd4312078ecf98889888bc0511
https://github.com/llvm/llvm-project/commit/e13e95bc44b0f3cd4312078ecf98889888bc0511
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/Mips/Mips64InstrInfo.td
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
A llvm/lib/Target/Mips/MipsInstrCompiler.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/test/CodeGen/Mips/funnel-shift-rot.ll
M llvm/test/CodeGen/Mips/funnel-shift.ll
M llvm/test/CodeGen/Mips/llvm-ir/ashr.ll
M llvm/test/CodeGen/Mips/llvm-ir/lshr.ll
M llvm/test/CodeGen/Mips/llvm-ir/shl.ll
A llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll
Log Message:
-----------
[Mips] Optimize (shift x (and y, BitWidth - 1)) to (shift x, y) (#73889)
Do optimization to turn x >> (shift & 31/63) into a single srlv instead
of andi + srlv, since the mips variable shift instruction already
implicitly masks the shift, like x86, wasm and AMDGPU. Copy the
X86DAGToDAGISel::isUnneededShiftMask() function to MIPS for checking
whether need combine two instructions to one.
Commit: dafd17895fff8fb8ae0d5a012f6a5c636cc46918
https://github.com/llvm/llvm-project/commit/dafd17895fff8fb8ae0d5a012f6a5c636cc46918
Author: XChy <xxs_chy at outlook.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Log Message:
-----------
[InstCombine][NFC] Format code in foldCmpLoadFromIndexedGlobal
Commit: 450be89136d43b7c0e1487b0be41167ffbf00f7d
https://github.com/llvm/llvm-project/commit/450be89136d43b7c0e1487b0be41167ffbf00f7d
Author: Brad Smith <brad at comstyle.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M compiler-rt/lib/asan/asan_linux.cpp
M compiler-rt/lib/asan/asan_new_delete.cpp
M compiler-rt/lib/builtins/fp_lib.h
M compiler-rt/lib/memprof/memprof_linux.cpp
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
R compiler-rt/lib/sanitizer_common/sanitizer_freebsd.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_procmaps_bsd.cpp
Log Message:
-----------
[compiler-rt] Remove a few workarounds for FreeBSD 9.x (#76263)
Support for FreeBSD 11.x was dropped so garbage collect a few FreeBSD
9.x workarounds and make 12.x the oldest supported releases.
Commit: 953ae94149f09ed1bac189b4d2b790de6b98c60e
https://github.com/llvm/llvm-project/commit/953ae94149f09ed1bac189b4d2b790de6b98c60e
Author: Dimitry Andric <dimitry at andric.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64.c
Log Message:
-----------
[builtins] Fix CPU feature detection for FreeBSD on AArch64 (#76532)
[builtins] Fix CPU feature detection for FreeBSD on AArch64
This is a follow-up to #75635 which broke the build for FreeBSD on
AArch64:
```
compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/freebsd.inc:3:16: error: call to undeclared function 'elf_aux_info'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
3 | int result = elf_aux_info(AT_HWCAP, &hwcap, sizeof hwcap);
| ^
```
Using `elf_aux_info()` requires including `<sys/auxv.h>` first. To
prevent redeclaration issues with `hwcap.inc` attempting to define
`HWCAP_xxx` macros before `<sys/auxv.h>` does so, include `<sys/auxv.h>`
before any of the `.inc` files on FreeBSD.
Commit: 3c92011b600bdf70424e2547594dd461fe411a41
https://github.com/llvm/llvm-project/commit/3c92011b600bdf70424e2547594dd461fe411a41
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_common/BUILD.gn
Log Message:
-----------
[gn build] Port 450be89136d4
Commit: a1f1371fdc7d9af9edf32339dcfebada96d937a5
https://github.com/llvm/llvm-project/commit/a1f1371fdc7d9af9edf32339dcfebada96d937a5
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrArithmetic.td
Log Message:
-----------
[X86][NFC] Remove redundant constraints in X86InstrArithmetic.td after #76319
Commit: b6daac023a72235108bddc17a5245a9371cd6147
https://github.com/llvm/llvm-project/commit/b6daac023a72235108bddc17a5245a9371cd6147
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
Log Message:
-----------
[AMDGPU][True16] Remove the VGPR_LO/HI16 register classes. (#76500)
Commit: 90802e652db348fd3218fcbfc3e6ac9e90702acd
https://github.com/llvm/llvm-project/commit/90802e652db348fd3218fcbfc3e6ac9e90702acd
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/or.ll
Log Message:
-----------
[InstCombine] Handle commuted cases of the fold `((B|C)&A)|B -> B|(A&C)` (#76565)
Alive2: https://alive2.llvm.org/ce/z/Qdsqk6
The commit https://github.com/llvm/llvm-project/commit/f1eda235142ed071e219bd231310e44cda08f932
didn't handle other cases that commute operands.
Commit: f9d161f0b2bf2b9a69184751b23642eb8b2c70de
https://github.com/llvm/llvm-project/commit/f9d161f0b2bf2b9a69184751b23642eb8b2c70de
Author: Min-Yih Hsu <min at myhsu.dev>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/M68k/M68kInstrArithmetic.td
M llvm/lib/Target/M68k/M68kInstrInfo.td
Log Message:
-----------
[M68k][NFC] Rename MximmSExt8/16/32 to Mxi8/16/32immSExt8/16/32
The MximmSExt8/16/32 should be "any immediate that can be represented by
8/16/32-bit signed integer", hence it shouldn't express an explicit
type. Rename those into Mxi8/16/32immSExt8/16/32.
NFC.
Commit: 4bd79ea3fe15c55852e8ec046db4a1513c9ebc1f
https://github.com/llvm/llvm-project/commit/4bd79ea3fe15c55852e8ec046db4a1513c9ebc1f
Author: Min-Yih Hsu <min at myhsu.dev>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/lib/Target/M68k/M68kExpandPseudo.cpp
M llvm/lib/Target/M68k/M68kISelLowering.h
M llvm/lib/Target/M68k/M68kInstrData.td
A llvm/test/CodeGen/M68k/global-address.ll
Log Message:
-----------
[M68k] Add pc-relative displacement (PCD) addressing mode for MOVSX
And disable offset folding altogether since we cannot always gain the
precise offset there to see if that fits into a certain size of
displacement.
Commit: bae46d14eb664493f7da445bab131241b7421a8c
https://github.com/llvm/llvm-project/commit/bae46d14eb664493f7da445bab131241b7421a8c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M libc/src/time/gpu/time_utils.h
Log Message:
-----------
[libc][Obvious] Correctly initialize the default clock frequency (#76582)
Summary:
The AMDGPU architecture does not use a fixed frequency for all of its
architectures. However, the newer GPUs tend to have one that's
consistent between them (Except for Vega10). This was set up but not
actually used, so the implementation was just defaulting to whatever
value the global was being set to. Fix.
Commit: 31d7ad4d994b1f6b60da304ec2d06bd2d7f16aaa
https://github.com/llvm/llvm-project/commit/31d7ad4d994b1f6b60da304ec2d06bd2d7f16aaa
Author: Joseph Huber <huberjn at outlook.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M libc/src/time/gpu/time_utils.h
Log Message:
-----------
Revert [libc][Obvious] Correctly initialize the default clock frequency (#76582)
Summary:
This was actually set, I just forget where it was.
Commit: ad554d6dbda5a85fcd6b8be8654c39621d21c49e
https://github.com/llvm/llvm-project/commit/ad554d6dbda5a85fcd6b8be8654c39621d21c49e
Author: Jan Patrick Lehr <jplehr at users.noreply.github.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/src/math/gpu/vendor/amdgpu/platform.h
M libc/src/time/gpu/time_utils.h
Log Message:
-----------
[libc] Adds AMDGPU gfx941 and gfx942 to archs (#76573)
This adds the ROCm device libs defines for both target architectures so
that we an compile libc on such GPUs.
Commit: 41ef6fc54f612000fe2e498b3931fa3229c7a78c
https://github.com/llvm/llvm-project/commit/41ef6fc54f612000fe2e498b3931fa3229c7a78c
Author: XDeme <66138117+XDeme at users.noreply.github.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix bad indentation with attribute and templated type (#76336)
Fixes llvm/llvm-project#76314
Commit: 1da9d8aea01a433ffc0b0339c9b63285cd471980
https://github.com/llvm/llvm-project/commit/1da9d8aea01a433ffc0b0339c9b63285cd471980
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M compiler-rt/lib/asan/asan_linux.cpp
Log Message:
-----------
[asan] Ignore vDSO on FreeBSD (#76223)
Most asan tests `FAIL` on FreeBSD 14.0/amd64 with
```
==17651==ASan runtime does not come first in initial library list; you should either link runtime to your application or manually preload it with LD_PRELOAD.
```
With `ASAN_OPTIONS=verbosity=2` one sees:
```
==4880==info->dlpi_name = [vdso] info->dlpi_addr = 0xffffe780
==4880==info->dlpi_name = lib/clang/18/lib/freebsd/libclang_rt.asan-i386.so info->dlpi_addr = 0x2808a000
```
Ignoring the vDSO as on Linux fixes this.
Tested on `amd64-pc-freebsd14.0`.
Commit: 64f0681e97c6046912dc0d80bc56709f72045338
https://github.com/llvm/llvm-project/commit/64f0681e97c6046912dc0d80bc56709f72045338
Author: Joseph Huber <huberjn at outlook.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M openmp/libomptarget/plugins-nextgen/common/include/JIT.h
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/JIT.cpp
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/plugins-nextgen/common/src/Utils/ELF.cpp
Log Message:
-----------
[Libomptarget] Rework image checking further (#76120)
Summary:
In the future, we may have more checks for different kinds of inputs,
e.g. SPIR-V. This patch simply reworks the handling to be more generic
and do the magic detection up-front. The checks inside the routines are
now asserts so we don't spend time checking this stuff over and over
again.
This patch also tweaked the bitcode check. I used a different function
to get the Lazy-IR module now, as it returns the raw expected value
rather than the SM diganostic.
No functionality change intended.
Commit: 5cc74029168dda258ec53ca7473df814db99960e
https://github.com/llvm/llvm-project/commit/5cc74029168dda258ec53ca7473df814db99960e
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
A llvm/test/tools/llvm-exegesis/X86/latency/segment-registers-subprocess.asm
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
Log Message:
-----------
Reland "[llvm-exegesis] Add support for loading X86 segment registers (#76368)"
This reverts commit 8b485070844d03cda467e75aa8c924184ba671cf.
This relands commit 7c383481a8e86918b3aaca4288c1eed62a4d6ff4.
This caused build failures on non-x86-64 builders as there was no
preprocessor logic around the newly included headers. This has been
fixed in the relanded patch.
Commit: 3e6e09609d8cef3c7cc99ced1a043869c8e984b8
https://github.com/llvm/llvm-project/commit/3e6e09609d8cef3c7cc99ced1a043869c8e984b8
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
Log Message:
-----------
[llvm-exegesis] Fix builds due to relanding #76368
Relanding this patch broke some builds (including Windows) due to
certain functions not being guarded by appropriate preprocessor
directives, particularly the loadImmediateSegmentRegister function not
having most of its functionality only enabled on Linux. The previous
relanding addressed issues with headers not being available on
non-x86_64 linux, but neglected to fix issues with the header not being
included, but the function still trying to use it on certain platforms,
such as x86-64 windows.
Commit: 3aa516e4f1046a8cb68c5cfc3778339ff74a8cfe
https://github.com/llvm/llvm-project/commit/3aa516e4f1046a8cb68c5cfc3778339ff74a8cfe
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
Log Message:
-----------
[llvm-exegesis] Fix unused variable warning on non-linux platforms
Previous patches moved the save/restore system call register functions
behind a preprocessor check, but neglected to move the constant
expression array used by the functions behind the preprocessor check.
This patch gates the array behind the preprocessor check to fix build
failures caused by -Werror,unused-const-variable on the clang--ppc64-aix
buildbot.
Commit: 3ddf3685248a8c3ef07bf8290196c33521edb894
https://github.com/llvm/llvm-project/commit/3ddf3685248a8c3ef07bf8290196c33521edb894
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[X86] Fix warning in cpu detection due to unsigned comparison
a15532d7647a8a4b7fd2889bd97f6f72f273c4bf landed a patch that added
support for detecting more AMD znver2 CPUs and cleaned up some of the
surrounding code, including the znver3 detection. Since one model group
is 00h-0fh, I adjusted the check to include checking if the value is
greater than zero. Since the value is unsigned, this is always true and
gcc warns on it. This patch removes the comparison with zero to get rid
of the compiler warning.
Commit: a51c2f39f5b6ba2cb03136016e707d2b8409eb0c
https://github.com/llvm/llvm-project/commit/a51c2f39f5b6ba2cb03136016e707d2b8409eb0c
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
Log Message:
-----------
[SLP] no need to generate extract for in-tree uses for original scala… (#76077)
…r instruction.
Before
https://github.com/llvm/llvm-project/commit/77a609b55636dc540090ef9105c60a99cfdbd1dd,
we always skip in-tree uses of the vectorized scalars in
`buildExternalUses()`,
that commit handles the case that if the in-tree use is scalar operand
in vectorized instruction,
we need to generate extract for these in-tree uses.
in-tree uses remain as scalar in vectorized instructions can be 3 cases:
- The pointer operand of vectorized LoadInst uses an in-tree scalar
- The pointer operand of vectorized StoreInst uses an in-tree scalar
- The scalar argument of vector form intrinsic uses an in-tree scalar
Generating extract for in-tree uses for vectorized instructions are
implemented in `BoUpSLP::vectorizeTree()`:
-
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp#L11497-L11506
-
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp#L11542-L11551
-
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp#L11657-L11667
However,
https://github.com/llvm/llvm-project/commit/77a609b55636dc540090ef9105c60a99cfdbd1dd
not only generates extract for vectorized instructions,
but also generates extract for original scalar instructions.
There is no need to generate extract for origin scalar instrutions,
as these scalar instructions will be replaced by vector instructions and
get erased later.
This patch marks there is no exact user for in-tree scalars that
remain as scalar in vectorized instructions when building external uses,
In this case all uses of this scalar will be automatically replaced by extractelement.
and remove
-
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp#L11497-L11506
-
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp#L11542-L11551
-
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp#L11657-L11667
extracts.
Commit: 589a24b0b75d2def0b6ebf64953d367c725102d3
https://github.com/llvm/llvm-project/commit/589a24b0b75d2def0b6ebf64953d367c725102d3
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
Log Message:
-----------
[llvm-exegesis] Make preprocessor directives consistent
This patch switches out the `and` keyword for && in preprocessor
directives recently added to fix some buildbot failures to be consistent
with the rest of the code base.
Commit: 09308122c6c0fa9eb3d729a2b2909733cbbc2160
https://github.com/llvm/llvm-project/commit/09308122c6c0fa9eb3d729a2b2909733cbbc2160
Author: Owen Pan <owenpiano at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M clang/docs/ClangFormat.rst
A clang/test/Format/clang-format-ignore.cpp
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
[clang-format] Add .clang-format-ignore for ignoring files (#76327)
Closes #52975.
Commit: ca8441d6dbd36003288ef412295e7b946a8bb893
https://github.com/llvm/llvm-project/commit/ca8441d6dbd36003288ef412295e7b946a8bb893
Author: Owen Pan <owenpiano at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M clang/lib/Format/MatchFilePath.cpp
Log Message:
-----------
[clang-format][NFC] Fix a typo.
Commit: 1efc0a38c459ee5becd90546907e70d792e0a91a
https://github.com/llvm/llvm-project/commit/1efc0a38c459ee5becd90546907e70d792e0a91a
Author: Alexander Shaposhnikov <6532716+alexander-shaposhnikov at users.noreply.github.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
A llvm/test/Transforms/ConstraintElimination/abs.ll
Log Message:
-----------
[ConstraintElim] Add tests for llvm.abs (#76374)
Add tests for llvm.abs.
This is a preparation for
https://github.com/llvm/llvm-project/pull/73189
Test plan: ninja check-all
Commit: 69bc3718353e7dbb83e5f1fd2695d5eb6e6827fd
https://github.com/llvm/llvm-project/commit/69bc3718353e7dbb83e5f1fd2695d5eb6e6827fd
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rotate-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
Log Message:
-----------
[RISCV][GlobalISel] Zbkb support for G_ROTL and G_ROTR (#76599)
These instructions are legal in the presence of Zbkb extension.
Commit: 925ff9e1a218720cd61bd7c9f5f85ded4ecbf9a1
https://github.com/llvm/llvm-project/commit/925ff9e1a218720cd61bd7c9f5f85ded4ecbf9a1
Author: Ben Shi <2283975856 at qq.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/Analysis/stream-errno.c
Log Message:
-----------
[clang][analyzer] Support 'fflush' in the StdLibraryFunctionsChecker (#76557)
Co-authored-by: Balazs Benics <benicsbalazs at gmail.com>
Commit: 3507959e441ed9470818e7c6ef16d9bbcfe6a999
https://github.com/llvm/llvm-project/commit/3507959e441ed9470818e7c6ef16d9bbcfe6a999
Author: Owen Pan <owenpiano at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M clang/docs/ClangFormat.rst
Log Message:
-----------
[clang-format][doc] Fix format errors.
Commit: 7a581c34f14c38c1e3183c5972d2870252c20396
https://github.com/llvm/llvm-project/commit/7a581c34f14c38c1e3183c5972d2870252c20396
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp.ll
Log Message:
-----------
Reland "[InstCombine] Extend `foldICmpBinOp` to `add`-like `or`" (#76531)
The original PR had a typo which was causing a bug.
Commit: fe2e677aa7aebedd316b1a688db8410855a213c1
https://github.com/llvm/llvm-project/commit/fe2e677aa7aebedd316b1a688db8410855a213c1
Author: Owen Pan <owenpiano at gmail.com>
Date: 2023-12-29 (Fri, 29 Dec 2023)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-format][doc] Add .clang-format-ignore to the release notes
Commit: 3dc0638cfc19e140daff7bf1281648daca8212fa
https://github.com/llvm/llvm-project/commit/3dc0638cfc19e140daff7bf1281648daca8212fa
Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZcmop.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/MC/RISCV/attribute-arch.s
A llvm/test/MC/RISCV/compressed-zicfiss.s
A llvm/test/MC/RISCV/rv32zicfiss-invalid.s
A llvm/test/MC/RISCV/rv64zicfiss-invalid.s
A llvm/test/MC/RISCV/zicfiss-valid.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add MC layer support for Zicfiss. (#66043)
The patch adds the instructions in Zicfiss extension. Zicfiss extension
is to support shadow stack for control flow integrity. This patch is
based on version [0.3.1].
[0.3.1]: https://github.com/riscv/riscv-cfi/releases/tag/v0.3.1
Commit: bd3d358ec68f686a280ae628f9074fdff1f10fe9
https://github.com/llvm/llvm-project/commit/bd3d358ec68f686a280ae628f9074fdff1f10fe9
Author: Owen Pan <owenpiano at gmail.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M clang/docs/ClangFormat.rst
Log Message:
-----------
[clang-format][doc] Add the link to POSIX 2.13
Commit: 81cedac8f60cf5a0c2c3724a8260d46792b9d637
https://github.com/llvm/llvm-project/commit/81cedac8f60cf5a0c2c3724a8260d46792b9d637
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20.rst
M libcxx/docs/UsingLibcxx.rst
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/memory
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.deprecated_in_cxx17.verify.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.removed_in_cxx20.verify.cpp
Log Message:
-----------
[libc++] Deprecates and removes shared_ptr::unqiue. (#76576)
The status table incorrectly marks P0521R0 as nothing to do. This is not
correct the function should be deprecated.
During our latest monthly meeting we argreed to remove the
_LIBCPP_ENABLE_CXXyy_REMOVED_FEATURES macros, therefore the new macro is
not
added to that global list.
Implements
- P0521R0 Proposed Resolution for CA 14 (shared_ptr use_count/unique)
Implements parts of
- P0619R4 Reviewing Deprecated Facilities of C++17 for C++20
---------
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Commit: fa8347fbc602d78a7e4297aa83a686b62943d828
https://github.com/llvm/llvm-project/commit/fa8347fbc602d78a7e4297aa83a686b62943d828
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[Clang][RISCV] bfloat uses 'y' instead of 'b' (#76575)
Builtins.def says that bfloat should be represented by the 'y'
character, not the 'b' character. The 'b' character is specified to
represent boolean. The implementation currently uses 'b' correctly for
boolean and incorrectly re-uses 'b' for bfloat.
This was not caught since no builtins are emitted in
build/tools/clang/include/clang/Basic/riscv_sifive_vector_builtins.inc.
Don't know that we can test this without creating builtins that expose
this issue, although I'm not sure we really want to do that.
Commit: c7c2bbba9357a0e350cba4f9cd955a80b7de7c0f
https://github.com/llvm/llvm-project/commit/c7c2bbba9357a0e350cba4f9cd955a80b7de7c0f
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M llvm/docs/CommandGuide/llvm-exegesis.rst
Log Message:
-----------
[Docs][llvm-exegesis] Minor adjustments for clarity
This patch makes minor adjustments to the llvm-exegesis docs for
clarity. Particularly, an update is made to the list of snippet
annotations to list the correct number of annotations that was not
updated when the docs were originally updated for the snippet address
annotation. In addition, this patch changes a decimal value for the
snippet memory annotation example for an explicit hex value to emphasize
that the LLVM-EXEGESIS-MEM-DEF annotation takes a hex value for the
memory value.
Commit: 8346e8608f5eb7ad03f2c6beacda43af563b4eae
https://github.com/llvm/llvm-project/commit/8346e8608f5eb7ad03f2c6beacda43af563b4eae
Author: Craig Hesling <craig at hesling.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M clang/docs/LibASTMatchersTutorial.rst
Log Message:
-----------
[clang] Add build type to LibASTMatchersTutorial.rst cmake (#76301)
Add the required CMAKE_BUILD_TYPE to the cmake configuration line.
We drop the comment about enabling tests, since it is already implied
and doesn't add any additional context.
Commit: 4b14205bc0b8e91a8e94c63773e01f20a6505188
https://github.com/llvm/llvm-project/commit/4b14205bc0b8e91a8e94c63773e01f20a6505188
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/IR/Tensor.h
M mlir/include/mlir/Dialect/Tensor/Transforms/Transforms.h
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Tensor/Transforms/FoldIntoPackAndUnpackPatterns.cpp
A mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
A mlir/test/Dialect/Tensor/simplify-pack-unpack.mlir
R mlir/test/Dialect/Tensor/simplify-tensor-pack.mlir
M mlir/test/lib/Dialect/Tensor/TestTensorTransforms.cpp
Log Message:
-----------
[mlir][tensor] Centralize pack/unpack related patterns. (#76603)
The revision moves pack/unpack related patterns to
PackAndUnpackPatterns.cpp. This follows the convention like other tensor
ops.
It also renames `populateSimplifyTensorPack` to
`populateSimplifyPackAndUnpackPatterns` and adds a TODO item for
tensor.unpack op.
Commit: e213af78b2571764d87dabb183fdc1a344a822aa
https://github.com/llvm/llvm-project/commit/e213af78b2571764d87dabb183fdc1a344a822aa
Author: Abhinav271828 <71174780+Abhinav271828 at users.noreply.github.com>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/unittests/Analysis/Presburger/MatrixTest.cpp
Log Message:
-----------
[MLIR][Presburger] Fix a bug with determinant of IntMatrix (#76622)
Fixed a bug where IntMatrix determinant() had a bug where it would try to assign to a null
pointer.
Added a test case that triggers this bug to avoid regressions.
Commit: 2c2de4b20ef6792e8bf437b02fbb94e3c20bdaff
https://github.com/llvm/llvm-project/commit/2c2de4b20ef6792e8bf437b02fbb94e3c20bdaff
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ScalarEvolution/max-expr-cache.ll
M llvm/test/Transforms/LoopIdiom/ARM/ctlz.ll
M llvm/test/Transforms/LoopIdiom/X86/ctlz.ll
Log Message:
-----------
[ValueTracking] Remove SPF support from `computeKnownBitsFromOperator` (#76630)
This patch removes redundant SPF support
(https://github.com/llvm/llvm-project/commit/5350e1b5096aa4707aa525baf7398d93b4a4f1a5)
from `computeKnownBitsFromOperator` as we always canonicalize a SPF into
an intrinsic call.
Compile-time improvement:
http://llvm-compile-time-tracker.com/compare.php?from=3dc0638cfc19e140daff7bf1281648daca8212fa&to=8771ef0749fb2ba4304dc68d418c88ec5769346f&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
-0.01%|-0.01%|+0.01%|+0.00%|+0.01%|+0.04%|-0.01%|
Commit: c664a51d3439174e2973194fcabd973af658bf63
https://github.com/llvm/llvm-project/commit/c664a51d3439174e2973194fcabd973af658bf63
Author: Min-Yih Hsu <min at myhsu.dev>
Date: 2023-12-30 (Sat, 30 Dec 2023)
Changed paths:
M llvm/lib/Target/M68k/M68kInstrFormats.td
Log Message:
-----------
[M68k][NFC] Clarify the displacement size in the code comment
Specifically, 'f', 'g', 'q', 'k', and 'l' addressing modes.
NFC.
Commit: a384cd5012b857f2464fff21c39d032632af1515
https://github.com/llvm/llvm-project/commit/a384cd5012b857f2464fff21c39d032632af1515
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/test/CodeGen/X86/bfloat.ll
Log Message:
-----------
[X86][BF16] Add subvec_zero_lowering patterns (#76507)
Commit: b8e4053c062f168db9e3cf8ad34291027a41783d
https://github.com/llvm/llvm-project/commit/b8e4053c062f168db9e3cf8ad34291027a41783d
Author: Bharathi Ramana Joshi <joshibharathiramana at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M mlir/lib/Analysis/Presburger/PresburgerSpace.cpp
M mlir/unittests/Analysis/Presburger/PresburgerSpaceTest.cpp
Log Message:
-----------
[MLIR][Presburger] Fix bug in Identifier::isEqual assert (#76380)
Make identifiers::isEqual return false instead of failing assertion when
identifiers are not equal.
Commit: c7aa98558cf354ee76c664267727e41585a50a2f
https://github.com/llvm/llvm-project/commit/c7aa98558cf354ee76c664267727e41585a50a2f
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[GitHub] Add default reviewers for Presburger library (#76627)
Added @Groverkss and @Superty as default reviewers for Presburger lib
paths.
Commit: 568db84247b3b3bcbf4090b8229a098c7575414b
https://github.com/llvm/llvm-project/commit/568db84247b3b3bcbf4090b8229a098c7575414b
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Log Message:
-----------
[InstCombine] Refactor `canonicalizeSPF` to support decomposed select. NFC.
See also https://github.com/llvm/llvm-project/pull/76621
Commit: 61999b18c407b9f5c07577e63057d41c65240e61
https://github.com/llvm/llvm-project/commit/61999b18c407b9f5c07577e63057d41c65240e61
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/test/Driver/driverkit-path.c
R clang/test/Preprocessor/cuda-macos-includes.cu
Log Message:
-----------
[clang][Darwin] Remove legacy framework search path logic in the frontend (#75841)
This removes a long standing piece of technical debt. Most other
platforms have moved all their header search path logic to the driver,
but Darwin still had some logic for setting framework search paths
present in the frontend. This patch moves that logic to the driver
alongside existing logic that already handles part of these search
paths.
This is intended to be a pure refactor without any functional change
visible to users, since the search paths before and after should be the
same, and in the same order. The change in the tests is necessary
because we would previously add the DriverKit framework search path in
the frontend regardless of whether we actually need to, which we now
handle correctly because the driver checks for ld64-605.1+.
Fixes #75638
Commit: b23f59a646d93c43602b010b997c0b7fc20eef5e
https://github.com/llvm/llvm-project/commit/b23f59a646d93c43602b010b997c0b7fc20eef5e
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-and-or.ll
M llvm/test/Transforms/InstCombine/select-factorize.ll
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
M llvm/test/Transforms/Reassociate/basictest.ll
Log Message:
-----------
[InstCombine] Fold `select (A &/| B), T, F` if `select B, T, F` is foldable (#76621)
This patch does the following folds:
```
(select A && B, T, F) -> (select A, (select B, T, F), F)
(select A || B, T, F) -> (select A, T, (select B, T, F))
```
if `(select B, T, F)` can be folded into a value or a canonicalized SPF.
Alive2: https://alive2.llvm.org/ce/z/4Bdrbu
The original motivation of this patch is to simplify the following
pattern:
```
%.sroa.speculated.i = tail call i64 @llvm.umax.i64(i64 %sub.ptr.div.i.i, i64 1)
%add.i = add i64 %.sroa.speculated.i, %sub.ptr.div.i.i
%cmp7.i = icmp ult i64 %add.i, %sub.ptr.div.i.i
%cmp9.i = icmp ugt i64 %add.i, 1152921504606846975
%or.cond.i = or i1 %cmp7.i, %cmp9.i
%cond.i = select i1 %or.cond.i, i64 1152921504606846975, i64 %add.i
->
%.sroa.speculated.i = tail call i64 @llvm.umax.i64(i64 %sub.ptr.div.i.i, i64 1)
%add.i = add i64 %.sroa.speculated.i, %sub.ptr.div.i.i
%cmp7.i = icmp ult i64 %add.i, %sub.ptr.div.i.i
%max = call i64 @llvm.umax.i64(i64 %add.i, 1152921504606846975)
%cond.i = select i1 %cmp7.i, i64 1152921504606846975, i64 %max
```
The later form has a better codegen for some backends. It is also more
analysis-friendly than the original one.
Godbolt: https://godbolt.org/z/eK6eb5jf1
Alive2: https://alive2.llvm.org/ce/z/VHlxL2
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=7c71d3996a72b9b024622f23bf556539b961c88c&to=638ce8666fadaca1ab2639a3c2bc52a4a8508f40&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|+0.02%|-0.00%|+0.02%|-0.03%|-0.00%|-0.05%|-0.00%|
It is an alternative to #76203 and #76363 because we can simplify
`select (icmp eq/ne a, b), a, b` into `b` or `a`.
Fixes #75784.
Fixes #76043.
Thank @XChy for providing additional tests.
Co-authored-by: XChy <xxs_chy at outlook.com>
Commit: bf312263bfee5d70a37a2269d62f08cf264ca415
https://github.com/llvm/llvm-project/commit/bf312263bfee5d70a37a2269d62f08cf264ca415
Author: Jie Fu <jiefu at tencent.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Log Message:
-----------
[InstCombine] Remove unused variables in InstCombineSelect.cpp (NFC)
llvm-project/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp:3810:14: error: unused variable 'LHS' [-Werror,-Wunused-variable]
3810 | Value *LHS, *RHS;
| ^~~
llvm-project/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp:3810:20: error: unused variable 'RHS' [-Werror,-Wunused-variable]
3810 | Value *LHS, *RHS;
|
Commit: c7c912cff945033918367c4a37121dfc09b9759e
https://github.com/llvm/llvm-project/commit/c7c912cff945033918367c4a37121dfc09b9759e
Author: Andrzej Warzynski <andrzej.warzynski at arm.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M flang/test/Driver/func-attr.f90
Log Message:
-----------
[flang][nfc] Add missing REQUIRES directive in a test
Failing bot:
* https://lab.llvm.org/buildbot/#/builders/21/builds/88731
Failing test was introduced in:
* https://github.com/llvm/llvm-project/pull/74598
Sending without a review as the fix is straightforward and I want to
prioritize fixing the broken bot and unblocking everyone who's been
affected.
Commit: 1228becf7df28c68579f2b9b390b74aa41149a0a
https://github.com/llvm/llvm-project/commit/1228becf7df28c68579f2b9b390b74aa41149a0a
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
M clang/test/CodeGen/arm-bf16-params-returns.c
M clang/test/CodeGen/arm-vector_type-params-returns.c
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenOpenCL/as_type.cl
M lld/test/COFF/savetemps.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos_mixed_lto.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos_no_rtti.ll
M lld/test/ELF/lto/devirt_vcall_vis_export_dynamic.ll
M lld/test/ELF/lto/devirt_vcall_vis_public.ll
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/CodeGen/BPF/loop-exit-cond.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-opaque.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect.ll
M llvm/test/DebugInfo/X86/array2.ll
M llvm/test/ThinLTO/X86/devirt.ll
M llvm/test/ThinLTO/X86/devirt2.ll
M llvm/test/ThinLTO/X86/devirt_check.ll
M llvm/test/ThinLTO/X86/devirt_promote.ll
M llvm/test/ThinLTO/X86/devirt_promote_legacy.ll
M llvm/test/ThinLTO/X86/devirt_pure_virtual_base.ll
M llvm/test/ThinLTO/X86/devirt_single_hybrid.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_hidden.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_public.ll
M llvm/test/ThinLTO/X86/funcimport.ll
M llvm/test/ThinLTO/X86/globals-import-const-fold.ll
M llvm/test/ThinLTO/X86/import-constant.ll
M llvm/test/ThinLTO/X86/index-const-prop-alias.ll
M llvm/test/ThinLTO/X86/index-const-prop.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
A llvm/test/Transforms/FunctionAttrs/noundef.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
M llvm/test/Transforms/Inline/devirtualize-3.ll
M llvm/test/Transforms/Inline/devirtualize-5.ll
M llvm/test/Transforms/Inline/launder.invariant.group.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/X86/merge-functions.ll
M llvm/test/Transforms/PhaseOrdering/bitcast-store-branch.ll
M llvm/test/Transforms/PhaseOrdering/dce-after-argument-promotion-loads.ll
M llvm/test/Transforms/PhaseOrdering/early-arg-attrs-inference.ll
M llvm/test/Transforms/PhaseOrdering/gep-null-compare-in-loop.ll
M llvm/test/Transforms/SampleProfile/ctxsplit.ll
Log Message:
-----------
[FuncAttrs] Deduce `noundef` attributes for return values (#76553)
This patch deduces `noundef` attributes for return values.
IIUC, a function returns `noundef` values iff all of its return values
are guaranteed not to be `undef` or `poison`.
Definition of `noundef` from LangRef:
```
noundef
This attribute applies to parameters and return values. If the value representation contains any
undefined or poison bits, the behavior is undefined. Note that this does not refer to padding
introduced by the type’s storage representation.
```
Alive2: https://alive2.llvm.org/ce/z/g8Eis6
Compile-time impact: http://llvm-compile-time-tracker.com/compare.php?from=30dcc33c4ea3ab50397a7adbe85fe977d4a400bd&to=c5e8738d4bfbf1e97e3f455fded90b791f223d74&stat=instructions:u
|stage1-O3|stage1-ReleaseThinLTO|stage1-ReleaseLTO-g|stage1-O0-g|stage2-O3|stage2-O0-g|stage2-clang|
|--|--|--|--|--|--|--|
|+0.01%|+0.01%|-0.01%|+0.01%|+0.03%|-0.04%|+0.01%|
The motivation of this patch is to reduce the number of `freeze` insts
and enable more optimizations.
Commit: b46638dc76d35681fbbddc2fd17ef4cde6b057e3
https://github.com/llvm/llvm-project/commit/b46638dc76d35681fbbddc2fd17ef4cde6b057e3
Author: Florian Hahn <flo at fhahn.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/SCCP/pr50901.ll
Log Message:
-----------
[Local] Handle undef FP constant in getExpressionForConstant.
Check for FP constant instead of checking for floating point types, as
Undef/Poison values can have floating point types while not being
FPConstants.
This fixes a crash introduced by #66745 (f3b20cb).
Commit: f248d5eed1ef49947c882c3c30d49ef061c12936
https://github.com/llvm/llvm-project/commit/f248d5eed1ef49947c882c3c30d49ef061c12936
Author: Florian Hahn <flo at fhahn.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[Local] Bring back check for FP types in getExpressionForConstant.
The check makes sure that the result for getZExtValue is guaranteed to
fit into 64 bit.
Commit: c313d0d03bb420efbfc18e194664584875640d2c
https://github.com/llvm/llvm-project/commit/c313d0d03bb420efbfc18e194664584875640d2c
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
Log Message:
-----------
[NFC][libc++] Fixes a compiler warning.
Commit: 949ec83eaf6fa6dbffb94c2ea9c0a4d5efdbd239
https://github.com/llvm/llvm-project/commit/949ec83eaf6fa6dbffb94c2ea9c0a4d5efdbd239
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/getelementptr.ll
Log Message:
-----------
[InstCombine] Relax the same-underlying-object constraint for the GEP canonicalization (#76583)
https://github.com/llvm/llvm-project/commit/7d7001b2cbd05bb1955c18e7f8668644bd1258dc
canonicalizes `(gep i8, X, (ptrtoint Y) - (ptrtoint X))` into `bitcast
Y` iff `X` and `Y` have the same underlying object.
I find that the result of this pattern is usually used as an operand of
an icmp in some real-world applications. I think we can do the
canonicalization if the result is only used by icmps/ptrtoints.
Alive2: https://alive2.llvm.org/ce/z/j4-HJZ
Commit: 90c397fc56b7a04dd53cdad8103de1ead9686104
https://github.com/llvm/llvm-project/commit/90c397fc56b7a04dd53cdad8103de1ead9686104
Author: David Green <david.green at arm.com>
Date: 2023-12-31 (Sun, 31 Dec 2023)
Changed paths:
M llvm/test/CodeGen/AArch64/fcmp.ll
A llvm/test/CodeGen/AArch64/icmp.ll
Log Message:
-----------
[AArch64] Add icmp and fcmp tests for GlobalISel. NFC
Commit: 0871c4beb826feba2d2aaf2c3efbe1fdeba7624a
https://github.com/llvm/llvm-project/commit/0871c4beb826feba2d2aaf2c3efbe1fdeba7624a
Author: Brad Smith <brad at comstyle.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Solaris.cpp
Log Message:
-----------
[Driver][Solaris] Remove reachable llvm_unreachable (#76645)
Remove the llvm_unreachable from getSolarisLibSuffix(). The code path is
reachable. In the case of an unsupported architecture we're not worrying
about trying to actually find the library paths, and I don't think it
makes sense for the Driver to crash.
Fixes #58334
Commit: 703e83611cd8bb7174ae76ba2e301f5a5e88b905
https://github.com/llvm/llvm-project/commit/703e83611cd8bb7174ae76ba2e301f5a5e88b905
Author: yonillasky <yonillasky at users.noreply.github.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[MLIR][LLVM] Add llvm.intr.coro.promise (#76640)
Added to allow generating these intrinsics in out-of-tree MLIR passes.
Co-authored-by: Yoni Lavi <yoni.lavi at nextsilicon.com>
Commit: 463dad107f4cb60ae1d49138143d6797599fb1fb
https://github.com/llvm/llvm-project/commit/463dad107f4cb60ae1d49138143d6797599fb1fb
Author: DianQK <dianqk at dianqk.net>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
Log Message:
-----------
[SimplifyCFG] Regenerate test checks (NFC)
Use `UTC_ARGS: --version 4`.
Commit: e99752d8065477b7a471cace580f8e818eda7fb1
https://github.com/llvm/llvm-project/commit/e99752d8065477b7a471cace580f8e818eda7fb1
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/test/MC/RISCV/fixups-expr.s
Log Message:
-----------
[MC,test] Improve RISCV/fixups-expr.s
Commit: 459270934bc84e083b34830473d10cd5bb2534b8
https://github.com/llvm/llvm-project/commit/459270934bc84e083b34830473d10cd5bb2534b8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bf16.ll
Log Message:
-----------
AMDGPU: Add more select bf16 vector tests
Commit: 25cd249355b0f3192ca5b0c69514ad68a1cb8897
https://github.com/llvm/llvm-project/commit/25cd249355b0f3192ca5b0c69514ad68a1cb8897
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
Log Message:
-----------
AMDGPU: Don't assert on select of v32i16/v32f16
Commit: 4b2f1184fcb1df8f86a5d6d364656168bb77ec0a
https://github.com/llvm/llvm-project/commit/4b2f1184fcb1df8f86a5d6d364656168bb77ec0a
Author: hstk30-hw <hanwei62 at huawei.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/call-cast-attrs.ll
M llvm/test/Transforms/LowerTypeTests/cfi-unwind-direct-call.ll
Log Message:
-----------
Skip tranformConstExprCastCall for naked function (#76496)
Fix this issue https://github.com/llvm/llvm-project/issues/72843 .
For naked function, assembly might be using an argument, or otherwise
rely on the frame layout, so don't transformConstExprCastCall
Commit: d4a6995e9438c72b4bb2054ca8ae7e0016f97682
https://github.com/llvm/llvm-project/commit/d4a6995e9438c72b4bb2054ca8ae7e0016f97682
Author: David Green <david.green at arm.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/icmp.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/sext.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalize large G_SEXT_INREG
These come from the legalization of other operations, but it makes sense to
split the operations into legal sizes before lowering them.
Commit: f33245a5c4411ce586efe2e12fc29aabb241f5e1
https://github.com/llvm/llvm-project/commit/f33245a5c4411ce586efe2e12fc29aabb241f5e1
Author: David Green <david.green at arm.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
Log Message:
-----------
[AArch64] Fix a always true condition warning. NFC
As ImmVal is unsigned, it will always be >= 0
Commit: 6b65d79fbb4682468333cea42b62f15c2dffd8f3
https://github.com/llvm/llvm-project/commit/6b65d79fbb4682468333cea42b62f15c2dffd8f3
Author: Spenser Bauman <sbauman at mathworks.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/EliminateEmptyTensors.cpp
M mlir/test/Dialect/Linalg/one-shot-bufferize-empty-tensor-elimination.mlir
Log Message:
-----------
[mlir][linalg] Fix for invalid IR in eliminate_empty_tensors (#73513)
The transform.structured.eliminate_empty_tensors can produce mis-typed
IR when traversing use-def chains past tensor reshaping operations for
sharing candidates. This results in Linalg operations whose output types
do not match their 'outs' arguments.
This patch filters out candidate tensor.empty operations when their
types do not match the candidate input operand.
Commit: c92d3ce6fd0f6a48ebcaa206c371a26240d0a6a3
https://github.com/llvm/llvm-project/commit/c92d3ce6fd0f6a48ebcaa206c371a26240d0a6a3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M libcxx/include/__memory/unique_ptr.h
Log Message:
-----------
[libc++][NFC] Remove unused __nat from unique_ptr
Commit: 18f219c5ac8369ec3e46c4accbb19ca51dc8bc67
https://github.com/llvm/llvm-project/commit/18f219c5ac8369ec3e46c4accbb19ca51dc8bc67
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/BugReporter/CommonBugCategories.h
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BoolAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CXXDeleteChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CastSizeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckObjCDealloc.cpp
M clang/lib/StaticAnalyzer/Checkers/ChrootChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CloneChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ConversionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugContainerModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugIteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/DivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/EnumCastOutOfRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/FixedAddressChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/InvalidatedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/IteratorRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIBugReporter.cpp
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIBugReporter.h
M clang/lib/StaticAnalyzer/Checkers/MacOSKeychainAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MismatchedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MmapWriteExecChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NSAutoreleasePoolChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NonNullParamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCAtSyncChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCContainersChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSelfInitChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSuperDeallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerArithChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnPointerRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnUndefChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/SimpleStreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TaintTesterChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TestAfterDivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefBranchChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefCapturedBlockVarChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefResultChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedArraySubscriptChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VforkChecker.cpp
M clang/lib/StaticAnalyzer/Core/CommonBugCategories.cpp
M clang/unittests/StaticAnalyzer/CallEventTest.cpp
M clang/unittests/StaticAnalyzer/NoStateChangeFuncVisitorTest.cpp
M clang/unittests/StaticAnalyzer/RegisterCustomCheckersTest.cpp
Log Message:
-----------
[analyzer][NFC] Cleanup BugType lazy-init patterns (#76655)
Cleanup most of the lazy-init `BugType` legacy.
Some will be preserved, as those are slightly more complicated to
refactor.
Notice, that the default category for `BugType` is `LogicError`. I
omitted setting this explicitly where I could.
Please, actually have a look at the diff. I did this manually, and we
rarely check the bug type descriptions and stuff in tests, so the
testing might be shallow on this one.
Commit: 945c2e6d92337fe4682227fb7c6ee165fd0d9384
https://github.com/llvm/llvm-project/commit/945c2e6d92337fe4682227fb7c6ee165fd0d9384
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[Orc] Fix process-symbols setup in LLJITBuilder for out-of-process case (#76244)
For out-of-process support the DynamicLibrarySearchGenerator must go
through EPC, otherwise we lookup symbols from the host and not the
target process.
Commit: ff804146208bacb7dbb73e2b1da7943cb60125d2
https://github.com/llvm/llvm-project/commit/ff804146208bacb7dbb73e2b1da7943cb60125d2
Author: Bharathi Ramana Joshi <joshibharathiramana at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/PresburgerSpace.h
M mlir/lib/Analysis/Presburger/PresburgerSpace.cpp
M mlir/unittests/Analysis/Presburger/PresburgerSpaceTest.cpp
Log Message:
-----------
[MLIR][Presburger] Implement PresburgerSpace::mergeAndAlignSymbols (#76397)
Commit: f18536d6421eb43779e43260a35ac39109a8a021
https://github.com/llvm/llvm-project/commit/f18536d6421eb43779e43260a35ac39109a8a021
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reduction-known-first-value.ll
Log Message:
-----------
[VPlan] Model address separately. (#72164)
Move vector pointer generation to a separate VPVectorPointerRecipe.
This untangles address computation from the memory recipes future
and is also needed to enable explicit unrolling in VPlan.
https://github.com/llvm/llvm-project/pull/72164
Commit: 992661922a39e16d068f7aac940da4919bde9b92
https://github.com/llvm/llvm-project/commit/992661922a39e16d068f7aac940da4919bde9b92
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M mlir/include/mlir/IR/Value.h
Log Message:
-----------
[mlir] Make TypedValue::getType() const (#76568)
The TypedValue::getType() essentially forwards the return value of
Value::getType() which is a const method. Somehow, at TypedValue level
the method's constness is lost, so restore it.
Originally done by: Nikita Kudriavtsev <nikita.kudriavtsev at intel.com>
Commit: 7619050cd7c3715f34c1d13ea048c092299037bb
https://github.com/llvm/llvm-project/commit/7619050cd7c3715f34c1d13ea048c092299037bb
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/IteratorRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MismatchedIteratorChecker.cpp
Log Message:
-----------
[analyzer][NFC] Take StringRef by value
Commit: 8ee3dfd74653e30f48dd9f49ba24f43547e6a549
https://github.com/llvm/llvm-project/commit/8ee3dfd74653e30f48dd9f49ba24f43547e6a549
Author: Balazs Benics <benicsbalazs at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/Checker.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/StaticAnalyzer/Checkers/CallAndMessageChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/InvalidatedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.h
M clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/IteratorRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MismatchedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TaggedUnionModeling.h
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObject.h
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
Log Message:
-----------
[analyzer][NFC] Take SVal and NonLoc by value
Commit: 3c99d25d059fc952a548a342b305a659f1f431d4
https://github.com/llvm/llvm-project/commit/3c99d25d059fc952a548a342b305a659f1f431d4
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Fix clang-format build
Post #76327 the build rule required the header in lib as source too.
Tried to just do minimal change specific to build.
Commit: 7e405eb722e40c79b7726201d0f76b5dab34ba0f
https://github.com/llvm/llvm-project/commit/7e405eb722e40c79b7726201d0f76b5dab34ba0f
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/noundef.ll
Log Message:
-----------
[FuncAttrs] Don't infer `noundef` for functions with `sanitize_memory` attribute (#76691)
MemorySanitizer assumes that the definition and declaration of a
function will be consistent. If we add `noundef` for some definitions,
it will break msan.
Fix buildbot failure caused by #76553.
Commit: 7a3b0cbb143d02b70b2bfae5cd40e9867c124748
https://github.com/llvm/llvm-project/commit/7a3b0cbb143d02b70b2bfae5cd40e9867c124748
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-01-01 (Mon, 01 Jan 2024)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
Update CODEOWNERS
Commit: d8db2733c87ef2ee54c322cbee76711147a94948
https://github.com/llvm/llvm-project/commit/d8db2733c87ef2ee54c322cbee76711147a94948
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrSSE.td
A llvm/test/MC/Disassembler/X86/apx/crc32.txt
A llvm/test/MC/X86/apx/crc32-att.s
A llvm/test/MC/X86/apx/crc32-intel.s
M llvm/test/MC/X86/x86_64-asm-match.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][MC] Support Enc/Dec for EGPR for promoted CRC32 (#76434)
R16-R31 was added into GPRs in
https://github.com/llvm/llvm-project/pull/70958,
This patch supports the encoding/decoding for promoted CRC32 instruction
in EVEX space.
RFC:
https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
Commit: 0e01c72c5645259d9a08a1a7ed39cb5cc41ce311
https://github.com/llvm/llvm-project/commit/0e01c72c5645259d9a08a1a7ed39cb5cc41ce311
Author: yjijd <licongtian at loongson.cn>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/lib/CodeGen/Targets/LoongArch.cpp
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin.c
M clang/test/CodeGen/LoongArch/lsx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lsx/builtin.c
Log Message:
-----------
[Clang][LoongArch] Do not pass vector arguments via vector registers (#74990)
psABI v2.30 clarifies that vector arguments are passed according to the
base ABI by default.
Commit: 9e1ad3cff6a855fdfdc1d91323e2021726da04ea
https://github.com/llvm/llvm-project/commit/9e1ad3cff6a855fdfdc1d91323e2021726da04ea
Author: Jim Lin <jim at andestech.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/compress-inline-asm.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/div_minsize.ll
M llvm/test/CodeGen/RISCV/double-select-icmp.ll
M llvm/test/CodeGen/RISCV/float-imm.ll
M llvm/test/CodeGen/RISCV/float-select-verify.ll
M llvm/test/CodeGen/RISCV/fmax-fmin.ll
M llvm/test/CodeGen/RISCV/half-select-icmp.ll
M llvm/test/CodeGen/RISCV/init-array.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/reduction-formation.ll
M llvm/test/CodeGen/RISCV/rv32xtheadba.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbs.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
M llvm/test/CodeGen/RISCV/rv64i-double-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbs.ll
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vector-insert-elt.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xvv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xvw.ll
M llvm/test/CodeGen/RISCV/rvv/fptoui-sat.ll
M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vaesdf.ll
M llvm/test/CodeGen/RISCV/rvv/vaesdm.ll
M llvm/test/CodeGen/RISCV/rvv/vaesef.ll
M llvm/test/CodeGen/RISCV/rvv/vaesem.ll
M llvm/test/CodeGen/RISCV/rvv/vaesz.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsm4r.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
M llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-x.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xv.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvv.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvw.ll
M llvm/test/CodeGen/RISCV/saverestore-scs.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/switch-width.ll
M llvm/test/CodeGen/RISCV/unroll-loop-cse.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
Log Message:
-----------
[RISCV] Remove blank lines at the end of testcases. NFC.
Commit: 120b0bfbf0bade430fa9b19d78025ccd1d6148d0
https://github.com/llvm/llvm-project/commit/120b0bfbf0bade430fa9b19d78025ccd1d6148d0
Author: Hui <hui.xie0621 at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/include/__config
M libcxx/include/__ranges/chunk_by_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/movable_box.h
M libcxx/include/__ranges/repeat_view.h
M libcxx/include/__ranges/single_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/transform_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.chunk.by/no_unique_address.compile.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.move.wrap/empty_object.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.move.wrap/no_unique_address.pass.cpp
A libcxx/test/libcxx/ranges/range.factories/range.repeat.view/no_unique_address.compile.pass.cpp
A libcxx/test/libcxx/ranges/range.factories/range.single.view/no_unique_address.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/ctor.range.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.transform/general.pass.cpp
A libcxx/test/std/ranges/ranges_robust_against_no_unique_address.pass.cpp
Log Message:
-----------
[libc++][ranges][abi-break] Fix `movable_box` overwriting memory of data that lives in the tail padding (#71314)
fixes #70506
The detailed problem description is in #70506
The original proposed fix was to remove `[[no_unique_address]]` except
when `_Tp` is empty.
Edit:
After the discussion in the comments below, the new fix here is to
remove the `[[no_unique_address]]` from `movable_box` in the cases where
we need to add our own assignment operator, which has contains the
problematic `construct_at`
Commit: b51f8f13edf3f7ab6407d2b7b46285ea675730b6
https://github.com/llvm/llvm-project/commit/b51f8f13edf3f7ab6407d2b7b46285ea675730b6
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libcxx/test/std/numerics/rand/rand.dist/rand.dist.uni/rand.dist.uni.int/eval.pass.cpp
Log Message:
-----------
[libc++][test] Removes Clang < 14 support. (#76658)
Commit: 4c2ad82b9dff537f7c8f0a2abb0d5dc7e6435741
https://github.com/llvm/llvm-project/commit/4c2ad82b9dff537f7c8f0a2abb0d5dc7e6435741
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
Log Message:
-----------
[AMDGPU] Do not preserve UniformityInfo (#76696)
UniformityInfo has a transitive dependence on CycleInfo. A transform may
change the CFG in trivial ways that do not affect uniformity, but that
can leave cycles in a slightly inconsistent state. In the absence of
updates to CycleInfo, it's cleaner to just invalidate both analyses.
Commit: 5c458ed490a01dcc82f9d063732cac4207786fd5
https://github.com/llvm/llvm-project/commit/5c458ed490a01dcc82f9d063732cac4207786fd5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/tools/gold/X86/devirt_vcall_vis_export_dynamic.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll
M llvm/test/tools/gold/X86/opt-level.ll
M llvm/test/tools/gold/X86/v1.16/devirt_vcall_vis_export_dynamic.ll
Log Message:
-----------
[gold] Fix tests after #76553 (NFC)
Commit: 75be7bb3fc6d28a7a97a0ca5c3231066b11bceba
https://github.com/llvm/llvm-project/commit/75be7bb3fc6d28a7a97a0ca5c3231066b11bceba
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
A openmp/libomptarget/test/offloading/fortran/target_update.f90
Log Message:
-----------
[flang][OpenMP][Offloading][AMDGPU] Add test for `target update` (#76355)
Adds a new test for offloading `target update` directive to AMD GPUs.
Commit: b238a0d989bd8047d9b9ce48ad401c13d981e187
https://github.com/llvm/llvm-project/commit/b238a0d989bd8047d9b9ce48ad401c13d981e187
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/lib/Analysis/Presburger/QuasiPolynomial.cpp
Log Message:
-----------
[mlir] Apply ClangTidy findings.
- Remove redundant return
- Use .empty() instead of size() == 0.
Commit: baf8a39aaf8b61a38b5b2b5591deb765e42eb00b
https://github.com/llvm/llvm-project/commit/baf8a39aaf8b61a38b5b2b5591deb765e42eb00b
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[mlir] Apply ClangTidy fix.
Prefer to use .empty() instead of checking size().
Commit: d714be978cf48bc85cb7eacf57c3548c0606a5e4
https://github.com/llvm/llvm-project/commit/d714be978cf48bc85cb7eacf57c3548c0606a5e4
Author: David Green <david.green at arm.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
Log Message:
-----------
[AArch64] Check for exact size when finding 1's for CMLE. (#76452)
This is a fix for the second half of #75822, where smaller constants can
also be bitcast to larger types. We should be checking the size is what
we expect it to be when matching ones.
Commit: 5055eeea5205d938320590236eeb782c92e40911
https://github.com/llvm/llvm-project/commit/5055eeea5205d938320590236eeb782c92e40911
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[Clang][AArch64] Add missing SME functions to header file. (#75791)
This includes:
* __arm_in_streaming_mode()
* __arm_has_sme()
* __arm_za_disable()
* __svundef_za()
Commit: 734ee0e01feeadd75bdbed35acc08f242623a212
https://github.com/llvm/llvm-project/commit/734ee0e01feeadd75bdbed35acc08f242623a212
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/cond-using-block-value.ll
Log Message:
-----------
[LVI] Support using block values when handling conditions (#75311)
Currently, LVI will only use conditions like "X < C" to constrain the
value of X on the relevant edge. This patch extends it to handle
conditions like "X < Y" by querying the known range of Y.
This means that getValueFromCondition() and various related APIs can now
return nullopt to indicate that they have pushed to the worklist, and
need to be called again later. This behavior is currently controlled by
a UseBlockValue option, and only enabled for actual edge value handling.
All other places deriving constraints from conditions keep using the
previous logic for now.
This change was originally motivated as a fix for the regression
reported in
https://github.com/llvm/llvm-project/pull/73662#issuecomment-1849281758.
Unfortunately, it doesn't actually fix it, because we run into another
issue there (LVI currently is really bad at handling values used in
loops).
This change has some compile-time impact, but it's fairly small,
in the 0.05% range.
Commit: ac8b53fc9232733af4656028fa82fd44397559d0
https://github.com/llvm/llvm-project/commit/ac8b53fc9232733af4656028fa82fd44397559d0
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/ExecutionEngine/AsyncRuntime.cpp
M mlir/lib/ExecutionEngine/SparseTensorRuntime.cpp
Log Message:
-----------
[mlir] Apply ClangTidy performance fix
- Use '\n' instead of std::endl;
https://clang.llvm.org/extra/clang-tidy/checks/performance/avoid-endl.html
Commit: aa6bb1697f2ef0881ae11cd5351d980fc98a4a14
https://github.com/llvm/llvm-project/commit/aa6bb1697f2ef0881ae11cd5351d980fc98a4a14
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
Log Message:
-----------
[CVP] Add test for #76705 (NFC)
Commit: d5db2cdb22ab302acbb6e1a066e791f25dc612de
https://github.com/llvm/llvm-project/commit/d5db2cdb22ab302acbb6e1a066e791f25dc612de
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
Log Message:
-----------
[LVI] Don't push both binop operands at once
If one of the binop operands depends on the other, this may end
up evaluating them in the wrong order, producing sub-optimal
results.
Make sure that only one unevaluated operand gets pushed per
iteration.
Fixes https://github.com/llvm/llvm-project/issues/76705.
Commit: a3e8e86fb6ad27fe070bb2c0f54a1c697c665f13
https://github.com/llvm/llvm-project/commit/a3e8e86fb6ad27fe070bb2c0f54a1c697c665f13
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LazyValueInfo.cpp
Log Message:
-----------
[LVI] Don't push both sides of and/or at once
Same as the change in d5db2cdb22ab302acbb6e1a066e791f25dc612de,
but for condition handling. The same issue could occur here as well.
Commit: 21a0335110a330846f738be37aeccb8685082faf
https://github.com/llvm/llvm-project/commit/21a0335110a330846f738be37aeccb8685082faf
Author: OCHyams <orlando.hyams at sony.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/DebugInfo/X86/sret.ll
Log Message:
-----------
[NFC][RemoveDIs] Fix typo in disabled test run line
The disabled line should be checking FastISel but was incorrectly checking
SelectionDAG due to a copy-paste error in #73496.
Commit: 9b7cf5bfb08b6e506216ef354dfd61adb15acbff
https://github.com/llvm/llvm-project/commit/9b7cf5bfb08b6e506216ef354dfd61adb15acbff
Author: David Green <david.green at arm.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/test/Transforms/simplifyintrinsics.fir
Log Message:
-----------
[Flang] Allow Intrinsic simpification with min/maxloc dim and scalar result (#76194)
This makes an adjustment to the existing fir minloc/maxloc generation
code to handle functions with a dim=1 that produce a scalar result. This
should allow us to get the same benefits as the existing generated
minmax reductions.
This is a recommit of #75820 with the typename added to the generated
function.
Commit: 2eb0ac0b3e3c74875e9b376239a27b8eb389189c
https://github.com/llvm/llvm-project/commit/2eb0ac0b3e3c74875e9b376239a27b8eb389189c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/Analysis/CostModel/X86/bswap-codesize.ll
M llvm/test/Analysis/CostModel/X86/bswap-latency.ll
M llvm/test/Analysis/CostModel/X86/bswap-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/bswap.ll
Log Message:
-----------
[CostModel][X86] Add explicit Silvermont test coverage for bswap costs
Test coverage for #62659 - we need to split SLM costs from other SSSE3 targets
Commit: c1764a7842aca1642dfc9942612059bdab440e51
https://github.com/llvm/llvm-project/commit/c1764a7842aca1642dfc9942612059bdab440e51
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
AMDGPU: Add bf16 vectors to register class definitions (#76214)
Assorted intrinsics are currently using i16 in place of a proper
bfloat type, but they should really switch to bfloat.
Note this only changes the type lists in tablegen, these are still
not registered to be truly treated as a legal type yet.
Depends #76213
Commit: 5842dfe34d89d9cc664d14f511ecb415d6609237
https://github.com/llvm/llvm-project/commit/5842dfe34d89d9cc664d14f511ecb415d6609237
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/bswap-latency.ll
M llvm/test/Analysis/CostModel/X86/bswap.ll
Log Message:
-----------
[CostModel][X86] Update SSSE3/AVX1 BSWAP costs
Drop atom/slm costs from the default bswap costs, and update the avx1 latency costs based off latest codegen.
Based off analysis report from https://github.com/RKSimon/llvm-scripts/check_cost_tables.py
Fixes #62659
Commit: cf025c767ebc4c505e21d268d65f3a1b1cbc25ce
https://github.com/llvm/llvm-project/commit/cf025c767ebc4c505e21d268d65f3a1b1cbc25ce
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] GFX12 global_atomic_ordered_add_b64 instruction and intrinsic (#76149)
Commit: 80aeb622117f6411e65bff42be5231720e8b8cef
https://github.com/llvm/llvm-project/commit/80aeb622117f6411e65bff42be5231720e8b8cef
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
Log Message:
-----------
[llvm][NFC] Use SDValue::getConstantOperandVal(i) where possible (#76708)
This helper function shortens examples like
`cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();` to
`Node->getConstantOperandVal(1);`.
Implemented with:
`git grep -l
"cast<ConstantSDNode>\(.*->getOperand\(.*\)\)->getZExtValue\(\)" | xargs
sed -E -i
's/cast<ConstantSDNode>\((.*)->getOperand\((.*)\)\)->getZExtValue\(\)/\1->getConstantOperandVal(\2)/`
and `git grep -l
"cast<ConstantSDNode>\(.*\.getOperand\(.*\)\)->getZExtValue\(\)" | xargs
sed -E -i
's/cast<ConstantSDNode>\((.*)\.getOperand\((.*)\)\)->getZExtValue\(\)/\1.getConstantOperandVal(\2)/'`.
With a couple of simple manual fixes needed. Result then processed by
`git clang-format`.
Commit: 687c51a3972af17b3f225e692e79fd898a1b6f95
https://github.com/llvm/llvm-project/commit/687c51a3972af17b3f225e692e79fd898a1b6f95
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.h
Log Message:
-----------
[clang][Interp][NFC] Remove unused using alias
Commit: c01e844a7ea7cce4d9477b04d2c9ccaff3606f04
https://github.com/llvm/llvm-project/commit/c01e844a7ea7cce4d9477b04d2c9ccaff3606f04
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
A llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx12.s
Log Message:
-----------
[AMDGPU] Update compute program resource registers for GFX12 (#75911)
Co-authored-by: Konstantin Zhuravlyov <kzhuravl at amd.com>
Commit: 534034737a652a7f59ede2ac3553bff4ad97594f
https://github.com/llvm/llvm-project/commit/534034737a652a7f59ede2ac3553bff4ad97594f
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/func.mlir
A mlir/test/Target/LLVMIR/Import/calling-convention.ll
Log Message:
-----------
[mlir][llvm] Import call site calling conventions (#76391)
This revision adds support for importing call site calling conventions.
Additionally, the revision also adds a roundtrip test for an indirect
call with a non-standard calling convention.
Commit: 9943d33997e6bb85ad054c18ce44d037040d8565
https://github.com/llvm/llvm-project/commit/9943d33997e6bb85ad054c18ce44d037040d8565
Author: Enna1 <xumingjie.enna1 at bytedance.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Fix assertion in vectorizeGEPIndices() (#76660)
The index constraints for the collected getelementptr instructions
should be single **and** non-constant.
Commit: 0b3d1a0b1bea12846c34adfdd19c8d7f930620ea
https://github.com/llvm/llvm-project/commit/0b3d1a0b1bea12846c34adfdd19c8d7f930620ea
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[RISCV][test] Add tests for RISCVInstrInfo::describeLoadedValue (#76041)
Tests are in preparation for adding handling of the load of a constant
value as Mips does (noted in
<https://github.com/llvm/llvm-project/pull/72356#discussion_r1395203532>).
I've opted to implement these tests as a C++ unit test as on balance I
_think_ it's easier to follow and maintain than .mir tests trying to
indirectly test this function. That said, you see the limitations with
the test of describeLoadedValue on a memory operation where we'd rather
pass `MachinePointerInfo::getFixedStack` but can't because we'd need to
then ensure the necessary stack metadata for the function is present.
Commit: 91e8700bd6adf4587dcc1b3e2c43940f81220da1
https://github.com/llvm/llvm-project/commit/91e8700bd6adf4587dcc1b3e2c43940f81220da1
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Add overlapping constraints flag to RVV pseudo (#76489)
This patch update some missing overlapping constraints flag in following
pseudo:
- VPseudoUnaryMaskRoundingMode
- VPseudoTiedBinaryCarryIn
- VPseudoTiedBinaryV_VM
- VPseudoTiedBinaryV_XM
- PseudoVEXT_VF2|4|8
- VPseudoConversionRoundingMode
- VPseudoUnaryNoMask_FRM
- VPseudoUnaryMask_FRM
- VPseudoConversionRM
- VPseudoVNCVTI_RM_W
Commit: 33565750e49f683308fad3ba22a06fa7e75f592b
https://github.com/llvm/llvm-project/commit/33565750e49f683308fad3ba22a06fa7e75f592b
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
A llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
Log Message:
-----------
[AMDGPU] Fix moveToValu for copy to phys SGPRs (#76715)
Fixes #76031
Commit: a181b425659a22c5535d2513f7dd7c7cf14e2d69
https://github.com/llvm/llvm-project/commit/a181b425659a22c5535d2513f7dd7c7cf14e2d69
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Log Message:
-----------
[llvm][NFC] Use SDValue::getConstantOperandAPInt(i) where possible
The helper function allows examples like
`cast<ConstantSDNode>(Op.getOperand(0))->getAPIntValue();` to be changed
to `Op.getConstantOperandAPInt(0);`.
See #76708 for further context. Although there are far fewer
opportunities for replacement, I used a similar git grep and sed combo
as before, given I already had it to hand:
`git grep -l "cast<ConstantSDNode>\(.*->getOperand\(.*\)\)->getAPIntValue\(\)" | xargs sed -E -i 's/cast<ConstantSDNode>\((.*)->getOperand\((.*)\)\)->getAPIntValue\(\)/\1->getConstantOperandAPInt(\2)/'`
and
`git grep -l
"cast<ConstantSDNode>\(.*\.getOperand\(.*\)\)->getAPIntValue\(\)" |
xargs sed -E -i
's/cast<ConstantSDNode>\((.*)\.getOperand\((.*)\)\)->getAPIntValue\(\)/\1.getConstantOperandAPInt(\2)/'`
Commit: 02347fc7191ff4d073f439dde6523add3f5496de
https://github.com/llvm/llvm-project/commit/02347fc7191ff4d073f439dde6523add3f5496de
Author: Ilya Biryukov <ibiryukov at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaInit.cpp
A clang/test/SemaCXX/crash-GH76228.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
Log Message:
-----------
Reapply "[Sema] Fix crash on invalid code with parenthesized aggregate initialization" (#76272)
With updates the libc++ tests.
This reverts commit 2205d2334f3c859ad9f6c65ed950bfb3bb6f7cbe and relands
86dc6e15f22610bbb53eb4efda0a178ecefc933a and
7ab16fb5207fe187ab999f882069bd632d2e68e5.
Original commit was reverted because of failing libc++ tests, see #76232 for
the discussion.
The errors in the tests are spurious in the first place (coming from initialization
of invalid classes), so update the tests to match new behavior that does
not show those errors.
Commit: 9d5b0965c43b4e8b3f21c106fe829391b1382277
https://github.com/llvm/llvm-project/commit/9d5b0965c43b4e8b3f21c106fe829391b1382277
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
Log Message:
-----------
[InstCombine] Add helper for commutative icmp folds (NFCI)
Add a common place for icmp folds that should be tried with both
operand orders, so we don't have to repeat this pattern for
individual folds.
Commit: 795c989c387970578c89ef038d5432583510d32f
https://github.com/llvm/llvm-project/commit/795c989c387970578c89ef038d5432583510d32f
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Target/Cpp/const.mlir
Log Message:
-----------
[mlir][EmitC] Disallow string attributes as initial values (#75310)
Commit: fc9dbc999bc711a99b94b42453240b38a6509b0d
https://github.com/llvm/llvm-project/commit/fc9dbc999bc711a99b94b42453240b38a6509b0d
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Add extra test for icmp of gep fold (NFC)
Commit: 1bb85fa9c038044e949dac6e3b07e9835d1110a6
https://github.com/llvm/llvm-project/commit/1bb85fa9c038044e949dac6e3b07e9835d1110a6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M libc/src/stdio/generic/puts.cpp
Log Message:
-----------
[libc] Lock the output stream for the 'puts' call (#76513)
Summary:
The `puts` function consists of an initial write and then another write
to append the newline. When executing code in parallel, it is possible
for these writes to becomes disjointed. This code adds an explicit lock
call to ensure that the string is always appended by the newline as the
users expects.
Wasn't sure if this required a test as it would be difficult since
reproducing it would be flaky.
Commit: 2292fd0129362865d07777329fa38850d7a642a3
https://github.com/llvm/llvm-project/commit/2292fd0129362865d07777329fa38850d7a642a3
Author: Jungwook Park <jungwook.park at innosilicon.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
A mlir/include/mlir-c/Dialect/SPIRV.h
M mlir/lib/CAPI/Dialect/CMakeLists.txt
A mlir/lib/CAPI/Dialect/SPIRV.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/SPIRVOps.td
A mlir/python/mlir/dialects/spirv.py
A mlir/test/python/dialects/spirv_dialect.py
Log Message:
-----------
[mlir][spirv] Add support for C-API/python binding to SPIR-V dialect (#76055)
Enable bindings.
---------
Co-authored-by: jungpark-mlir <jungwook at jungwook-22.04>
Commit: 4b9194952d73c34d4d58a5dc3aeddead130b5f0e
https://github.com/llvm/llvm-project/commit/4b9194952d73c34d4d58a5dc3aeddead130b5f0e
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
M llvm/test/CodeGen/AArch64/andcompare.ll
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AArch64/call-rv-marker.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fold-binop-into-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
Log Message:
-----------
[GlobalIsel] Combine selects with constants (#76089)
A first small step at combining selects.
Commit: 02c2bf8c054c8a425f7347a4a276e2dbf4b10e5a
https://github.com/llvm/llvm-project/commit/02c2bf8c054c8a425f7347a4a276e2dbf4b10e5a
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Change heuristic used for load clustering (#75341)
Split out from #73789, so as to leave that PR just for flipping load
clustering to on by default. Clusters if the operations are within a
cache line of each other (as AMDGPU does in shouldScheduleLoadsNear).
X86 does something similar, but does `((Offset2 - Offset1) / 8 > 64)`.
I'm not sure if that's intentionally set to 512 bytes or if the division
is in error.
Adopts the suggestion from @wangpc-pp to query the cache line size and
use it if available.
We also cap the maximum cluster size to cap the potential register
pressure impact (which may lead to additional spills).
Commit: 571ad7324f3a25f507a1014a0467890f17772c13
https://github.com/llvm/llvm-project/commit/571ad7324f3a25f507a1014a0467890f17772c13
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/bad-forward-type.f90
M flang/test/Semantics/init01.f90
M flang/test/Semantics/pointer01.f90
M flang/test/Semantics/symbol15.f90
Log Message:
-----------
[flang] Defer processing of non-pointer variable initializers (#76475)
Initializers in entity-decls don't need to have their expressions
analyzed immediately in name resolution unless of course they are
defining the values of named constants. By deferring the expression
analysis, the compiler can better handle references to module and
internal procedures that might appear in structure constructors; at
present, these are typically rejected as being forward references (which
they can be) to subprogram names that can't yet be checked for
compatibility with the characteristics of the corresponding procedure
component.
Commit: 120ad2508af8b5093f5d9d9f5e7566936320e769
https://github.com/llvm/llvm-project/commit/120ad2508af8b5093f5d9d9f5e7566936320e769
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/runtime/edit-input.cpp
M flang/runtime/io-stmt.cpp
M flang/runtime/namelist.cpp
Log Message:
-----------
[flang][runtime] Extension: NAMELIST input may omit terminal '/' (#76476)
... when it is followed eventually by the '&' that begins the next
NAMELIST input group. This is a gfortran extension.
Commit: 3bbdbb22a50705a78ea2668d4ab227889cabdc84
https://github.com/llvm/llvm-project/commit/3bbdbb22a50705a78ea2668d4ab227889cabdc84
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Parser/Fortran-parsers.cpp
Log Message:
-----------
[flang] Fix parsing time explosion (#76533)
When parsing a deeply-nested expression like
A1(A2(A3(A4(A5(A6(...A99(i)...))))))
the parser can get into an exponential state due to the need to consider
the possibility that each "An(...)" might be the beginning of a
reference to a procedure component ("An(...)%PROC(...)") so that
alternative has to be attempted first before proceeding to try parsing
"An(...)" as a function reference or as an array element designator. The
parser for a structure component, which is used by the procedure
designator parser, was not protected with the usual failure memoization
technique, leading to exponentially bad behavior parsing a deeply-nested
expression. Fix by exploiting the instrumented() parser combinator so
that failed structure component parsers aren't repeated.
Fixes https://github.com/llvm/llvm-project/issues/76477.
Commit: b29d632eea48a14f46af2a9f04bd28798cb55612
https://github.com/llvm/llvm-project/commit/b29d632eea48a14f46af2a9f04bd28798cb55612
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/resolve61.f90
Log Message:
-----------
[flang] Accept BIND(C) derived type for Cray pointees (#76538)
The compiler requires that a Cray pointee have a SEQUENCE type, but a
recent bug report points out that a BIND(C) type should also be
accepted.
Fixes https://github.com/llvm/llvm-project/issues/76529.
Commit: 7c55dd8de64823deb71bbeff8543e31ab6264cd9
https://github.com/llvm/llvm-project/commit/7c55dd8de64823deb71bbeff8543e31ab6264cd9
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
M flang/test/Parser/compiler-directives.f90
Log Message:
-----------
[flang] Accept multiple spaces after compiler directive sentinel (#76541)
The prescanner allows multiple spaces within a compiler directive, but
not between the directive's sentinel (e.g., !DIR$) and the directive's
first token.
Fixes https://github.com/llvm/llvm-project/issues/76537.
Commit: 49ee8b53ef39c158d40d76128828379dd34ea61f
https://github.com/llvm/llvm-project/commit/49ee8b53ef39c158d40d76128828379dd34ea61f
Author: SunilKuravinakop <98882378+SunilKuravinakop at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/atomic_compare_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OpenMP] atomic compare fail : Codegen support (#75709)
This is a continuation of https://reviews.llvm.org/D123235 ([OpenMP]
atomic compare fail : Parser & AST support). In this branch Support for
codegen support for atomic compare fail is being added.
---------
Co-authored-by: Sunil Kuravinakop
Commit: dea30aca3a56bb72d4e1eddb04f98c53bcb5992a
https://github.com/llvm/llvm-project/commit/dea30aca3a56bb72d4e1eddb04f98c53bcb5992a
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/runtime/namelist.cpp
Log Message:
-----------
[flang][runtime] NAMELIST input into storage sequence (#76584)
Nearly every Fortran compiler supports the extension of NAMELIST input
into a storage sequence identified by its initial scalar array element.
For example,
&GROUP A(1) = 1. 2. 3. /
should be processed as if the input had been
&GROUP A(1:) = 1. 2. 3. /
Fixes llvm-test-suite/Fortran/gfortran/regression/namelist_24.f90.
Commit: 289eb995807116fedcec5c5614246330411f7b3b
https://github.com/llvm/llvm-project/commit/289eb995807116fedcec5c5614246330411f7b3b
Author: Oleg Shyshkov <shyshkov at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Add SPIRV python binding
Commit: cab156c4129e5948a6322054480e66d3ca17b919
https://github.com/llvm/llvm-project/commit/cab156c4129e5948a6322054480e66d3ca17b919
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/docs/Extensions.md
M flang/runtime/edit-input.cpp
Log Message:
-----------
[flang][runtime] Don't round hexadecimal floating-point input (#76586)
Fortran 2023 subclause 13.7.2.3.8 discusses input rounding only in the
context of decimal-to-binary conversion. There is no mention of rounding
for hexadecimal floating-point input conversion. At least one Fortran
compiler seems to have interpreted this silence as implying no rounding.
(Note that this is not the same thing as rounding to zero (RZ), which
would return +/-HUGE() for overflow.)
Commit: 78348b691504bf9ec212add73cc37d2fd8371f83
https://github.com/llvm/llvm-project/commit/78348b691504bf9ec212add73cc37d2fd8371f83
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Tensor/simplify-pack-unpack.mlir
Log Message:
-----------
[mlir][tensor] Improve tensor.pack simplication pattern. (#76606)
A tensor.pack op can be rewritten to a tensor.expand_shape op if the
packing only happens on inner most dimension.
This also formats the lit checks better.
Commit: 4c1f488b78237e3388ac44d587b7b2e0c1d772b9
https://github.com/llvm/llvm-project/commit/4c1f488b78237e3388ac44d587b7b2e0c1d772b9
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/lib/Evaluate/real.cpp
M flang/test/Evaluate/fold-nearest.f90
Log Message:
-----------
[flang] Fix folding of NEAREST(TINY(1.),-1.) (#76590)
The code to fold NEAREST would return a value that's too large when
transitioning from a normal number to a subnormal.
Fixes llvm-test-suite/Fortran/gfortran/regression/nearest_1.f90.
Commit: 8f3357b75b6f0093e3e5df8adb140c9dad24f881
https://github.com/llvm/llvm-project/commit/8f3357b75b6f0093e3e5df8adb140c9dad24f881
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/include/flang/Runtime/io-api.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/lib/Lower/IO.cpp
M flang/module/iso_fortran_env.f90
M flang/runtime/io-api.cpp
M flang/runtime/unit.cpp
M flang/test/Lower/HLFIR/calls-f77.f90
M flang/test/Lower/HLFIR/convert-mbox-to-value.f90
M flang/test/Lower/OpenMP/FIR/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/array-character.f90
M flang/test/Lower/array-expression-slice-1.f90
M flang/test/Lower/array-expression.f90
M flang/test/Lower/array-temp.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/io-statement-2.f90
M flang/test/Lower/vector-subscript-io.f90
Log Message:
-----------
[flang][runtime] Don't use -1 in I/O API for "default unit" (#76642)
The I/O runtime's API allows -1 to be passed for a unit number in a
READ, WRITE, or PRINT statement, where it gets replaced by 5 or 6 as
appropriate. This turns out to have been a bad idea, as it prevents the
I/O runtime from detecting and reporting a program's invalid attempt to
use -1 as an I/O unit number. So just pass 5 or 6 as appropriate.
Commit: 8fa3184539df441ca325d8b70ae5b573c46d8450
https://github.com/llvm/llvm-project/commit/8fa3184539df441ca325d8b70ae5b573c46d8450
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/TextAPI/TextStubV5.cpp
Log Message:
-----------
[TextAPI] Use function_ref where possible, NFCI (#76732)
Commit: 9fd03cb6522ac1469512502713bedf8b352e2589
https://github.com/llvm/llvm-project/commit/9fd03cb6522ac1469512502713bedf8b352e2589
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M flang/runtime/edit-input.cpp
Log Message:
-----------
[flang][runtime] Don't prematurely end formatted integer input (#76643)
When an input data-list has more items than can be read by a format from
the input record (e.g., "(4I5)" reading "1 2"), don't return false from
EditIntegerInput() just because nothing was read -- that will prevent
later items from being set to zero, as they should be. Return true
unless nothing was read and there is some kind of error pending.
Fixes llvm-error-tests/Fortran/gfortran/regression/pr478478.f90.
Commit: bf684a97f37b12ccf2c98b007b8222c54c7480f5
https://github.com/llvm/llvm-project/commit/bf684a97f37b12ccf2c98b007b8222c54c7480f5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/trunc-sat-clip.ll
Log Message:
-----------
[RISCV] Don't emit vxrm writes for vnclip(u).wi with shift of 0. (#76578)
If there's no shift being performed, the rounding mode doesn't matter.
We could do the same for vssra and vssrl, but they are no-ops with a
shift of 0 so would be better off being removed earlier.
Commit: 9c978c94187511326627c34fb04c57f853c488fc
https://github.com/llvm/llvm-project/commit/9c978c94187511326627c34fb04c57f853c488fc
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
A llvm/test/Transforms/Coroutines/coro-debug-frame-variable-O1.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
Log Message:
-----------
[coroutines] Use DILocation from new storage for hoisted dbg.declare (#75402)
Make the hoisted dbg.declare inherent the DILocation scope from the new
storage.
After hoisting, the dbg.declare is moved into the block that defines the
new storage. This could create an inconsistency in the debug location
scope hierarchy where the scope of hoisted dbg.declare (i.e.
DILexicalBlock) is enclosed with the scope of the block (i.e.
DISubprogram). This confuses LiveDebugValues pass to think that the
hoisted dbg.declare is killed in that block and does not generate
DBG_VALUE in other blocks. Debugger won't be able to track its value
anymore.
We do this for unoptimized binary only.
Commit: 27091dacdd5f4a8601563f57e21f653d59169d46
https://github.com/llvm/llvm-project/commit/27091dacdd5f4a8601563f57e21f653d59169d46
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M llvm/test/ExecutionEngine/OrcLazy/debug-descriptor-elf-minimal.ll
M llvm/test/ExecutionEngine/OrcLazy/debug-objects-elf-minimal.ll
Log Message:
-----------
[Orc] Temporarily disable OrcLazy debug tests on macOS
Test failures were reported after https://github.com/llvm/llvm-project/pull/76244 landed. Let's revisit these tests now that we have native Mach-O debug support as well.
Commit: 0912f62d98e639ad37a3f675603569857dfb00f2
https://github.com/llvm/llvm-project/commit/0912f62d98e639ad37a3f675603569857dfb00f2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-01-02 (Tue, 02 Jan 2024)
Changed paths:
M .github/CODEOWNERS
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang/docs/ClangFormat.rst
M clang/docs/LibASTMatchersTutorial.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/StaticAnalyzer/Core/BugReporter/CommonBugCategories.h
M clang/include/clang/StaticAnalyzer/Core/Checker.h
M clang/include/clang/StaticAnalyzer/Core/CheckerManager.h
M clang/lib/AST/Interp/Interp.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/Targets/LoongArch.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Solaris.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/MatchFilePath.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/BoolAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CXXDeleteChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CallAndMessageChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CastSizeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckObjCDealloc.cpp
M clang/lib/StaticAnalyzer/Checkers/ChrootChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CloneChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ConversionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugContainerModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/DebugIteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/DivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DynamicTypeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/EnumCastOutOfRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/FixedAddressChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/InvalidatedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.cpp
M clang/lib/StaticAnalyzer/Checkers/Iterator.h
M clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/IteratorRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/LocalizationChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIBugReporter.cpp
M clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIBugReporter.h
M clang/lib/StaticAnalyzer/Checkers/MacOSKeychainAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MismatchedIteratorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MmapWriteExecChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NSAutoreleasePoolChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NonNullParamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCAtSyncChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCContainersChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSelfInitChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ObjCSuperDeallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerArithChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnPointerRangeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/ReturnUndefChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/SimpleStreamChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TaggedUnionModeling.h
M clang/lib/StaticAnalyzer/Checkers/TaintTesterChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/TestAfterDivZeroChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefBranchChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefCapturedBlockVarChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefResultChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedArraySubscriptChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObject.h
M clang/lib/StaticAnalyzer/Checkers/UninitializedObject/UninitializedObjectChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VforkChecker.cpp
M clang/lib/StaticAnalyzer/Core/CommonBugCategories.cpp
M clang/lib/StaticAnalyzer/Core/Environment.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/Analysis/stream-errno.c
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin.c
M clang/test/CodeGen/LoongArch/lsx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lsx/builtin.c
M clang/test/CodeGen/X86/ms-x86-intrinsics.c
A clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_state_funs.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_qcvtn.c
M clang/test/CodeGen/arm-bf16-params-returns.c
M clang/test/CodeGen/arm-vector_type-params-returns.c
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-globals.c
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/ms-mixed-ptr-sizes.c
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenOpenCL/as_type.cl
M clang/test/Driver/driverkit-path.c
M clang/test/Driver/fbasic-block-sections.c
M clang/test/Driver/riscv-cpus.c
A clang/test/Format/clang-format-ignore.cpp
M clang/test/OpenMP/atomic_compare_codegen.cpp
R clang/test/Preprocessor/cuda-macos-includes.cu
M clang/test/Preprocessor/riscv-target-features.c
A clang/test/SemaCXX/crash-GH76228.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
M clang/tools/clang-format/ClangFormat.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/StaticAnalyzer/CallEventTest.cpp
M clang/unittests/StaticAnalyzer/NoStateChangeFuncVisitorTest.cpp
M clang/unittests/StaticAnalyzer/RegisterCustomCheckersTest.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/utils/TableGen/SveEmitter.cpp
M compiler-rt/lib/asan/asan_linux.cpp
M compiler-rt/lib/asan/asan_new_delete.cpp
M compiler-rt/lib/builtins/cpu_model/aarch64.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/builtins/fp_lib.h
M compiler-rt/lib/memprof/memprof_linux.cpp
M compiler-rt/lib/sanitizer_common/CMakeLists.txt
R compiler-rt/lib/sanitizer_common/sanitizer_freebsd.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_procmaps_bsd.cpp
M compiler-rt/test/hwasan/TestCases/stack-uas.c
M flang/docs/Extensions.md
M flang/include/flang/Common/uint128.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Runtime/array-constructor.h
M flang/include/flang/Runtime/character.h
M flang/include/flang/Runtime/descriptor.h
M flang/include/flang/Runtime/inquiry.h
M flang/include/flang/Runtime/io-api.h
M flang/include/flang/Runtime/magic-numbers.h
M flang/include/flang/Runtime/memory.h
M flang/include/flang/Runtime/misc-intrinsic.h
M flang/include/flang/Runtime/pointer.h
M flang/include/flang/Runtime/ragged.h
M flang/lib/Evaluate/real.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/module/iso_fortran_env.f90
M flang/runtime/CMakeLists.txt
M flang/runtime/allocatable.cpp
M flang/runtime/array-constructor.cpp
M flang/runtime/character.cpp
M flang/runtime/copy.cpp
M flang/runtime/derived-api.cpp
M flang/runtime/dot-product.cpp
M flang/runtime/edit-input.cpp
M flang/runtime/extrema.cpp
M flang/runtime/findloc.cpp
M flang/runtime/freestanding-tools.h
M flang/runtime/inquiry.cpp
M flang/runtime/io-api.cpp
M flang/runtime/io-stmt.cpp
M flang/runtime/matmul-transpose.cpp
M flang/runtime/matmul.cpp
M flang/runtime/memory.cpp
M flang/runtime/misc-intrinsic.cpp
M flang/runtime/namelist.cpp
M flang/runtime/numeric.cpp
M flang/runtime/pointer.cpp
M flang/runtime/product.cpp
M flang/runtime/ragged.cpp
M flang/runtime/reduction.cpp
M flang/runtime/sum.cpp
M flang/runtime/support.cpp
M flang/runtime/tools.h
M flang/runtime/unit.cpp
M flang/test/Driver/func-attr.f90
M flang/test/Evaluate/fold-nearest.f90
M flang/test/Lower/HLFIR/calls-f77.f90
M flang/test/Lower/HLFIR/convert-mbox-to-value.f90
M flang/test/Lower/OpenMP/FIR/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/array-character.f90
M flang/test/Lower/array-expression-slice-1.f90
M flang/test/Lower/array-expression.f90
M flang/test/Lower/array-temp.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/io-statement-2.f90
M flang/test/Lower/vector-subscript-io.f90
M flang/test/Parser/compiler-directives.f90
M flang/test/Semantics/bad-forward-type.f90
M flang/test/Semantics/init01.f90
M flang/test/Semantics/pointer01.f90
M flang/test/Semantics/resolve61.f90
M flang/test/Semantics/symbol15.f90
M flang/test/Transforms/simplifyintrinsics.fir
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/src/math/gpu/vendor/amdgpu/platform.h
M libc/src/stdio/generic/puts.cpp
M libc/src/time/gpu/time_utils.h
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx20.rst
M libcxx/docs/UsingLibcxx.rst
M libcxx/include/__config
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__ranges/chunk_by_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/movable_box.h
M libcxx/include/__ranges/repeat_view.h
M libcxx/include/__ranges/single_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/transform_view.h
M libcxx/include/memory
A libcxx/test/libcxx/ranges/range.adaptors/range.chunk.by/no_unique_address.compile.pass.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.move.wrap/empty_object.pass.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.move.wrap/no_unique_address.pass.cpp
A libcxx/test/libcxx/ranges/range.factories/range.repeat.view/no_unique_address.compile.pass.cpp
A libcxx/test/libcxx/ranges/range.factories/range.single.view/no_unique_address.compile.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
M libcxx/test/std/numerics/rand/rand.dist/rand.dist.uni/rand.dist.uni.int/eval.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/ctor.range.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.transform/general.pass.cpp
A libcxx/test/std/ranges/ranges_robust_against_no_unique_address.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.deprecated_in_cxx17.verify.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.pass.cpp
A libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.obs/unique.removed_in_cxx20.verify.cpp
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M lld/test/COFF/savetemps.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos_mixed_lto.ll
M lld/test/ELF/lto/devirt_validate_vtable_typeinfos_no_rtti.ll
M lld/test/ELF/lto/devirt_vcall_vis_export_dynamic.ll
M lld/test/ELF/lto/devirt_vcall_vis_public.ll
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CommandGuide/llvm-exegesis.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/ADT/GenericUniformityImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/M68k/M68kExpandPseudo.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.h
M llvm/lib/Target/M68k/M68kInstrArithmetic.td
M llvm/lib/Target/M68k/M68kInstrData.td
M llvm/lib/Target/M68k/M68kInstrFormats.td
M llvm/lib/Target/M68k/M68kInstrInfo.td
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/Mips64InstrInfo.td
M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
A llvm/lib/Target/Mips/MipsInstrCompiler.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZcmop.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZOperators.td
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TextAPI/TextStubV5.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/CostModel/X86/bswap-codesize.ll
M llvm/test/Analysis/CostModel/X86/bswap-latency.ll
M llvm/test/Analysis/CostModel/X86/bswap-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/bswap.ll
M llvm/test/Analysis/ScalarEvolution/max-expr-cache.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-select.mir
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/andcompare.ll
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-vabs.ll
M llvm/test/CodeGen/AArch64/call-rv-marker.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
A llvm/test/CodeGen/AArch64/icmp.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fold-binop-into-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
A llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies-copy-to-sgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/BPF/loop-exit-cond.ll
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lasx/vselect.ll
M llvm/test/CodeGen/LoongArch/lsx/vselect.ll
A llvm/test/CodeGen/M68k/global-address.ll
M llvm/test/CodeGen/Mips/funnel-shift-rot.ll
M llvm/test/CodeGen/Mips/funnel-shift.ll
M llvm/test/CodeGen/Mips/llvm-ir/ashr.ll
M llvm/test/CodeGen/Mips/llvm-ir/lshr.ll
M llvm/test/CodeGen/Mips/llvm-ir/shl.ll
A llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-opaque.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect.ll
M llvm/test/CodeGen/PowerPC/f128-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rotate-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rotate-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rotate-rv64.mir
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/compress-inline-asm.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/div_minsize.ll
M llvm/test/CodeGen/RISCV/double-select-icmp.ll
M llvm/test/CodeGen/RISCV/float-imm.ll
M llvm/test/CodeGen/RISCV/float-select-verify.ll
M llvm/test/CodeGen/RISCV/fmax-fmin.ll
M llvm/test/CodeGen/RISCV/half-select-icmp.ll
M llvm/test/CodeGen/RISCV/init-array.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/reduction-formation.ll
M llvm/test/CodeGen/RISCV/rv32xtheadba.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbs.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll
M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
M llvm/test/CodeGen/RISCV/rv64i-double-softfloat.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbs.ll
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vector-insert-elt.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xvv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-xsfvcp-xvw.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/fptoui-sat.ll
M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll
A llvm/test/CodeGen/RISCV/rvv/trunc-sat-clip.ll
M llvm/test/CodeGen/RISCV/rvv/vaesdf.ll
M llvm/test/CodeGen/RISCV/rvv/vaesdm.ll
M llvm/test/CodeGen/RISCV/rvv/vaesef.ll
M llvm/test/CodeGen/RISCV/rvv/vaesem.ll
M llvm/test/CodeGen/RISCV/rvv/vaesz.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
A llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vsm4r.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
M llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-x.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xv.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvv.ll
M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvw.ll
M llvm/test/CodeGen/RISCV/saverestore-scs.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/switch-width.ll
M llvm/test/CodeGen/RISCV/unroll-loop-cse.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll
M llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
M llvm/test/CodeGen/X86/bfloat.ll
M llvm/test/DebugInfo/X86/array2.ll
M llvm/test/DebugInfo/X86/sret.ll
M llvm/test/ExecutionEngine/OrcLazy/debug-descriptor-elf-minimal.ll
M llvm/test/ExecutionEngine/OrcLazy/debug-objects-elf-minimal.ll
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_vflat.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vflat.txt
A llvm/test/MC/Disassembler/X86/apx/crc32.txt
M llvm/test/MC/RISCV/attribute-arch.s
A llvm/test/MC/RISCV/compressed-zicfiss.s
M llvm/test/MC/RISCV/fixups-expr.s
M llvm/test/MC/RISCV/machine-csr-names.s
A llvm/test/MC/RISCV/rv32zicfiss-invalid.s
A llvm/test/MC/RISCV/rv64zicfiss-invalid.s
R llvm/test/MC/RISCV/xsfcie-invalid.s
R llvm/test/MC/RISCV/xsfcie-valid.s
A llvm/test/MC/RISCV/zicfiss-valid.s
A llvm/test/MC/X86/apx/crc32-att.s
A llvm/test/MC/X86/apx/crc32-intel.s
R llvm/test/MC/X86/register-assignment-error.s
M llvm/test/MC/X86/register-assignment.s
M llvm/test/MC/X86/x86_64-asm-match.s
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/ThinLTO/X86/devirt.ll
M llvm/test/ThinLTO/X86/devirt2.ll
M llvm/test/ThinLTO/X86/devirt_check.ll
M llvm/test/ThinLTO/X86/devirt_promote.ll
M llvm/test/ThinLTO/X86/devirt_promote_legacy.ll
M llvm/test/ThinLTO/X86/devirt_pure_virtual_base.ll
M llvm/test/ThinLTO/X86/devirt_single_hybrid.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_hidden.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_public.ll
M llvm/test/ThinLTO/X86/funcimport.ll
M llvm/test/ThinLTO/X86/globals-import-const-fold.ll
M llvm/test/ThinLTO/X86/import-constant.ll
M llvm/test/ThinLTO/X86/index-const-prop-alias.ll
M llvm/test/ThinLTO/X86/index-const-prop.ll
A llvm/test/Transforms/ConstraintElimination/abs.ll
A llvm/test/Transforms/Coroutines/coro-debug-frame-variable-O1.ll
M llvm/test/Transforms/Coroutines/coro-debug-frame-variable.ll
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
M llvm/test/Transforms/CorrelatedValuePropagation/cond-using-block-value.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
A llvm/test/Transforms/FunctionAttrs/noundef.ll
M llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
M llvm/test/Transforms/Inline/devirtualize-3.ll
M llvm/test/Transforms/Inline/devirtualize-5.ll
M llvm/test/Transforms/Inline/launder.invariant.group.ll
M llvm/test/Transforms/InstCombine/call-cast-attrs.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/select-and-or.ll
M llvm/test/Transforms/InstCombine/select-factorize.ll
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopIdiom/ARM/ctlz.ll
M llvm/test/Transforms/LoopIdiom/X86/ctlz.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LowerTypeTests/cfi-unwind-direct-call.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/constraint-elimination-placement.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/merge-functions.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reduction-known-first-value.ll
M llvm/test/Transforms/PhaseOrdering/bitcast-store-branch.ll
M llvm/test/Transforms/PhaseOrdering/dce-after-argument-promotion-loads.ll
M llvm/test/Transforms/PhaseOrdering/early-arg-attrs-inference.ll
M llvm/test/Transforms/PhaseOrdering/gep-null-compare-in-loop.ll
M llvm/test/Transforms/Reassociate/basictest.ll
M llvm/test/Transforms/SCCP/pr50901.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-masked-gather2.ll
M llvm/test/Transforms/SampleProfile/ctxsplit.ll
M llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
M llvm/test/tools/gold/X86/devirt_vcall_vis_export_dynamic.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll
M llvm/test/tools/gold/X86/opt-level.ll
M llvm/test/tools/gold/X86/v1.16/devirt_vcall_vis_export_dynamic.ll
A llvm/test/tools/llvm-exegesis/X86/latency/segment-registers-subprocess.asm
A llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx12.s
M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
M llvm/unittests/Support/RISCVISAInfoTest.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_common/BUILD.gn
A mlir/include/mlir-c/Dialect/SPIRV.h
M mlir/include/mlir/Analysis/Presburger/PresburgerSpace.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/Tensor/IR/Tensor.h
M mlir/include/mlir/Dialect/Tensor/Transforms/Transforms.h
M mlir/include/mlir/IR/Value.h
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/lib/Analysis/Presburger/PresburgerSpace.cpp
M mlir/lib/Analysis/Presburger/QuasiPolynomial.cpp
M mlir/lib/CAPI/Dialect/CMakeLists.txt
A mlir/lib/CAPI/Dialect/SPIRV.cpp
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/Linalg/Transforms/EliminateEmptyTensors.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Tensor/Transforms/FoldIntoPackAndUnpackPatterns.cpp
A mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/ExecutionEngine/AsyncRuntime.cpp
M mlir/lib/ExecutionEngine/SparseTensorRuntime.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/SPIRVOps.td
A mlir/python/mlir/dialects/spirv.py
M mlir/test/Dialect/Affine/loop-fusion.mlir
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/Linalg/one-shot-bufferize-empty-tensor-elimination.mlir
A mlir/test/Dialect/Tensor/simplify-pack-unpack.mlir
R mlir/test/Dialect/Tensor/simplify-tensor-pack.mlir
M mlir/test/Target/Cpp/const.mlir
A mlir/test/Target/LLVMIR/Import/calling-convention.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/lib/Dialect/Tensor/TestTensorTransforms.cpp
A mlir/test/python/dialects/spirv_dialect.py
M mlir/unittests/Analysis/Presburger/MatrixTest.cpp
M mlir/unittests/Analysis/Presburger/PresburgerSpaceTest.cpp
M openmp/libomptarget/plugins-nextgen/common/include/JIT.h
M openmp/libomptarget/plugins-nextgen/common/include/PluginInterface.h
M openmp/libomptarget/plugins-nextgen/common/src/JIT.cpp
M openmp/libomptarget/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/libomptarget/plugins-nextgen/common/src/Utils/ELF.cpp
A openmp/libomptarget/test/offloading/fortran/target_update.f90
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/ca27e7ddc4db...0912f62d98e6
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