[all-commits] [llvm/llvm-project] e13e95: [Mips] Optimize (shift x (and y, BitWidth - 1)) to...

[yingopq via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e13e95bc44b0f3cd4312078ecf98889888bc0511
      https://github.com/llvm/llvm-project/commit/e13e95bc44b0f3cd4312078ecf98889888bc0511
  Author: yingopq <115543042+yingopq at users.noreply.github.com>
  Date:   2023-12-29 (Fri, 29 Dec 2023)

  Changed paths:
    M llvm/lib/Target/Mips/Mips64InstrInfo.td
    M llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp
    M llvm/lib/Target/Mips/MipsISelDAGToDAG.h
    A llvm/lib/Target/Mips/MipsInstrCompiler.td
    M llvm/lib/Target/Mips/MipsInstrInfo.td
    M llvm/test/CodeGen/Mips/funnel-shift-rot.ll
    M llvm/test/CodeGen/Mips/funnel-shift.ll
    M llvm/test/CodeGen/Mips/llvm-ir/ashr.ll
    M llvm/test/CodeGen/Mips/llvm-ir/lshr.ll
    M llvm/test/CodeGen/Mips/llvm-ir/shl.ll
    A llvm/test/CodeGen/Mips/optimizeAndPlusShift.ll

  Log Message:
  -----------
  [Mips] Optimize (shift x (and y, BitWidth - 1)) to (shift x, y) (#73889)

Do optimization to turn x >> (shift & 31/63) into a single srlv instead
of andi + srlv, since the mips variable shift instruction already
implicitly masks the shift, like x86, wasm and AMDGPU. Copy the
X86DAGToDAGISel::isUnneededShiftMask() function to MIPS for checking
whether need combine two instructions to one.