[all-commits] [llvm/llvm-project] 2dc50d: [RISCV] Correct the CHECK prefixes in attr-riscv-r...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2dc50d28414c827b6723ae6b01c20a7fc3f38165
      https://github.com/llvm/llvm-project/commit/2dc50d28414c827b6723ae6b01c20a7fc3f38165
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-12-28 (Thu, 28 Dec 2023)

  Changed paths:
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-globals.c

  Log Message:
  -----------
  [RISCV] Correct the CHECK prefixes in attr-riscv-rvv-vector-bits-globals.c to use the correct vector size. NFC

These were copied from AArch64 where vscale is multiplied by 128
to get the vector length.  For RISC-V, vscale is multiplied by 64.