[all-commits] [llvm/llvm-project] 6dc5ba: [RISCV] Remove XSfcie extension.
Craig Topper via All-commits
all-commits at lists.llvm.org
Thu Dec 28 13:54:32 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 6dc5ba4cca72a5c25597722b8a8c7dcff5fb67be
https://github.com/llvm/llvm-project/commit/6dc5ba4cca72a5c25597722b8a8c7dcff5fb67be
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-28 (Thu, 28 Dec 2023)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Support/RISCVISAInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSystemOperands.td
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/machine-csr-names.s
R llvm/test/MC/RISCV/xsfcie-invalid.s
R llvm/test/MC/RISCV/xsfcie-valid.s
M llvm/unittests/Support/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Remove XSfcie extension.
This reverts 0d3eee33f262402562a1ff28106dbb2f59031bdb and
4c37d30e22ae655394c8b3a7e292c06d393b9b44.
XSfcie is not an official SiFive extension name. It stands for
SiFive Custom Instruction Extension, which is mentioned in the S76
manual, but then elsewhere in the manual says it is not supported
for S76.
LLVM had various instructions and CSRs listed as part of this
extension, but as far as SiFive is concerned, none of them are part
of it. There are no documented extension names for these instructions
and CSRs either externally or internally.
If these are important to LLVM users, I can facilitate creating
extension names for them and have them documented. For now I'm
removing everything.
Unfortunately, these instructions and CSRs are in LLVM 17 so this
is an incompatible change.
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