[all-commits] [llvm/llvm-project] d79cce: [X86][MC] Support encoding/decoding for APX varian...

[Shengchen Kan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d79ccee8dc4aea52c146b10603f2a38646ad22fe
      https://github.com/llvm/llvm-project/commit/d79ccee8dc4aea52c146b10603f2a38646ad22fe
  Author: Shengchen Kan <shengchen.kan at intel.com>
  Date:   2023-12-28 (Thu, 28 Dec 2023)

  Changed paths:
    M llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h
    M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
    M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
    M llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
    M llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
    M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
    M llvm/lib/Target/X86/X86InstrArithmetic.td
    M llvm/lib/Target/X86/X86InstrFormats.td
    M llvm/lib/Target/X86/X86InstrPredicates.td
    M llvm/lib/Target/X86/X86InstrUtils.td
    A llvm/test/MC/Disassembler/X86/apx/adc.txt
    A llvm/test/MC/Disassembler/X86/apx/add.txt
    A llvm/test/MC/Disassembler/X86/apx/and.txt
    M llvm/test/MC/Disassembler/X86/apx/evex-format.txt
    A llvm/test/MC/Disassembler/X86/apx/neg.txt
    A llvm/test/MC/Disassembler/X86/apx/not.txt
    A llvm/test/MC/Disassembler/X86/apx/or.txt
    A llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
    A llvm/test/MC/Disassembler/X86/apx/sbb.txt
    A llvm/test/MC/Disassembler/X86/apx/sub.txt
    A llvm/test/MC/Disassembler/X86/apx/xor.txt
    A llvm/test/MC/X86/apx/adc-att.s
    A llvm/test/MC/X86/apx/adc-intel.s
    A llvm/test/MC/X86/apx/add-att.s
    A llvm/test/MC/X86/apx/add-intel.s
    A llvm/test/MC/X86/apx/and-att.s
    A llvm/test/MC/X86/apx/and-intel.s
    M llvm/test/MC/X86/apx/evex-format-att.s
    M llvm/test/MC/X86/apx/evex-format-intel.s
    A llvm/test/MC/X86/apx/neg-att.s
    A llvm/test/MC/X86/apx/neg-intel.s
    A llvm/test/MC/X86/apx/not-att.s
    A llvm/test/MC/X86/apx/not-intel.s
    A llvm/test/MC/X86/apx/or-att.s
    A llvm/test/MC/X86/apx/or-intel.s
    A llvm/test/MC/X86/apx/sbb-att.s
    A llvm/test/MC/X86/apx/sbb-intel.s
    A llvm/test/MC/X86/apx/sub-att.s
    A llvm/test/MC/X86/apx/sub-intel.s
    A llvm/test/MC/X86/apx/xor-att.s
    A llvm/test/MC/X86/apx/xor-intel.s
    M llvm/test/TableGen/x86-fold-tables.inc
    M llvm/utils/TableGen/X86DisassemblerTables.cpp
    M llvm/utils/TableGen/X86FoldTablesEmitter.cpp
    M llvm/utils/TableGen/X86RecognizableInstr.cpp
    M llvm/utils/TableGen/X86RecognizableInstr.h

  Log Message:
  -----------
  [X86][MC] Support encoding/decoding for APX variant ADD/SUB/ADC/SBB/OR/XOR/NEG/NOT instructions (#76319)

Four variants: promoted legacy, ND (new data destination), NF (no flags
update) and NF_ND (NF + ND).

The syntax of NF instructions is aligned with GNU binutils.
https://sourceware.org/pipermail/binutils/2023-September/129545.html