[all-commits] [llvm/llvm-project] 469374: [clang][dataflow] Disallow setting properties on `...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Thu Dec 21 16:45:12 PST 2023
Branch: refs/heads/users/vitalybuka/spr/main.hwasan-distinguish-overflow-and-underflow
Home: https://github.com/llvm/llvm-project
Commit: 469374e5c4ba7c75327096a4db6b8ee92065c378
https://github.com/llvm/llvm-project/commit/469374e5c4ba7c75327096a4db6b8ee92065c378
Author: martinboehme <mboehme at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/include/clang/Analysis/FlowSensitive/RecordOps.h
M clang/include/clang/Analysis/FlowSensitive/Value.h
M clang/lib/Analysis/FlowSensitive/RecordOps.cpp
M clang/unittests/Analysis/FlowSensitive/RecordOpsTest.cpp
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
Log Message:
-----------
[clang][dataflow] Disallow setting properties on `RecordValue`s. (#76042)
Instead, synthetic fields should now be used for the same purpose. These
have a
number of advantages, as described in
https://github.com/llvm/llvm-project/pull/73860, and longer-term, we
want to
eliminate `RecordValue` entirely.
As `RecordValue`s cannot have properties any more, I have replaced the
`OptionalIntAnalysis` with an equivalent analysis that tracks nullness
of
pointers (instead of whether an optional has a value). This serves the
same
purpose, namely to check whether the framework applies a custom
`merge()`
operation to widen properties.
Commit: 0df320093155f937ae985847f20e28b790667a9f
https://github.com/llvm/llvm-project/commit/0df320093155f937ae985847f20e28b790667a9f
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Analysis/ValueTracking/pr75505.ll
Log Message:
-----------
[ValueTracking] Fix KnownBits conflict for poison-only vector
If all the demanded elements are poison, return unknown instead of
conflict to avoid downstream assertions.
Fixes https://github.com/llvm/llvm-project/issues/75505.
Commit: 2203a4e6e01ce6bfd69505420d304a81daf23dc9
https://github.com/llvm/llvm-project/commit/2203a4e6e01ce6bfd69505420d304a81daf23dc9
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
Log Message:
-----------
[NFC] [Serialization] Improve AST serialization by reordering packed
bits and extract big bits from packed bits
Previously I tried to improve the size of .pcm files by introducing
packed bits. And I find we can improve it further by reordering the
bits.
The secret comes from the VBR format. We can find the formal definition
of VBR format in the doc of LLVM. The VBR format will be pretty
efficicent for small numbers.
For example, if we need to pack 8 bits into a value and the stored value
is 0xf0, the actual stored value will be 0b000111'110000, which takes 12
bits actually. However, if we changed the order to be 0x0f, then we
can store it as 0b001111, which takes 6 bits only now.
So we can improve the size by placing bits with lower probability to be
1 in the higher bits and extract bit bigs from the packed bits to make
it possible to be optimized by VBR.
After this patch, the size of std module becomes to 27.7MB from 28.1MB.
Commit: db8a119e8f04dfccd40ab7675c62ada81423e5c2
https://github.com/llvm/llvm-project/commit/db8a119e8f04dfccd40ab7675c62ada81423e5c2
Author: Matthias Springer <me at m-sp.org>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
Log Message:
-----------
[mlir][ArmSME] Fix invalid rewriter API usage (#76123)
When operations are modified in-place, the rewriter must be notified.
This commit fixes `mlir/test/Conversion/ArmSMEToLLVM/unsupported.mlir`,
`mlir/test/Dialect/ArmSME/tile-zero-masks.mlir` and
`mlir/test/Dialect/ArmSME/vector-ops-to-llvm.mlir` when running with
`MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS` enabled.
Commit: d3ef86708241a3bee902615c190dead1638c4e09
https://github.com/llvm/llvm-project/commit/d3ef86708241a3bee902615c190dead1638c4e09
Author: boxu.zhang <boxu-zhang at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
Log Message:
-----------
[LoopUnroll] Make UnrollMaxUpperBound to be overridable by target (#76029)
The UnrollMaxUpperBound should be target dependent, since different
chips provide different register set which brings different ability of
storing more temporary values of a program. So I add a MaxUpperBound
value in UnrollingPreference which can be override by targets. All uses
of UnrollMaxUpperBound are replaced with UP.MaxUpperBound.
The default value is still 8 and the command line argument
'--unroll-max-upperbound' takes final effect if provided.
Commit: 68fb3d596e451cbb9e40c01d26c4e9af1126ce01
https://github.com/llvm/llvm-project/commit/68fb3d596e451cbb9e40c01d26c4e9af1126ce01
Author: Florian Hahn <flo at fhahn.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/and-implied-by-operands.ll
Log Message:
-----------
[ConstraintElim] Add test with select where the second op cant be poison.
Extra test for TODO from #75750.
Commit: c0931d4950a93526aa08ec3ab86f64ffb616b406
https://github.com/llvm/llvm-project/commit/c0931d4950a93526aa08ec3ab86f64ffb616b406
Author: David Green <david.green at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/test/CodeGen/AArch64/aarch64-minmaxv.ll
M llvm/test/CodeGen/AArch64/aarch64-mulv.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/reduce-and.ll
M llvm/test/CodeGen/AArch64/reduce-or.ll
M llvm/test/CodeGen/AArch64/reduce-xor.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AArch64/zext.ll
Log Message:
-----------
[AArch64][GlobalISel] Lower scalarizing G_UNMERGE_VALUES to G_EXTRACT_VECTOR_ELT
This adds post-legalizing lowering of G_UNMERGE_VALUES which take a vector and
produce scalar values for each lane. They are converted to a G_EXTRACT_VECTOR_ELT
for each lane, allowing all the existing tablegen patterns to apply to them.
A couple of tablegen patterns need to be altered to make sure the type of the
constant operand is known, so that the patterns are recognized under global
isel.
Closes #75662
Commit: ba4d36951f1deaf24dce526900a2d6dbdefa377b
https://github.com/llvm/llvm-project/commit/ba4d36951f1deaf24dce526900a2d6dbdefa377b
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M libc/src/__support/CPP/bit.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/UInt.h
M libc/test/src/__support/uint_test.cpp
Log Message:
-----------
[libc] Make BigInt bit_cast-able to compatible types (#75063)
This is a second take on #74837 to fix #74258
Commit: 73948ec6b276ba6ab7c18eb543dd4ea5a37eeab8
https://github.com/llvm/llvm-project/commit/73948ec6b276ba6ab7c18eb543dd4ea5a37eeab8
Author: Ben Shi <2283975856 at qq.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/stream-error.c
Log Message:
-----------
[clang][analyzer] Support `fflush` in the StreamChecker (#74296)
Commit: cb3a8934365c11ab23c918b44985f5a2f287acb1
https://github.com/llvm/llvm-project/commit/cb3a8934365c11ab23c918b44985f5a2f287acb1
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M openmp/libomptarget/CMakeLists.txt
Log Message:
-----------
[OpenMP] Check for gtest when building libomptarget unit tests (#76141)
This patch addresses an issue introduced in pull request #74398. CMake
will attempt to re-build gtest if openmp is enabled as a project (as
opposed to being enabled as a runtime). This patch adds a check that
prevents this from happening.
Commit: 78bd124649ece163d3a26b33608bdbe518d8ff76
https://github.com/llvm/llvm-project/commit/78bd124649ece163d3a26b33608bdbe518d8ff76
Author: Alex Zinenko <zinenko at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/test/python/ir/context_lifecycle.py
M mlir/test/python/ir/operation.py
Log Message:
-----------
Revert "[mlir][python] Make the Context/Operation capsule creation methods work as documented. (#76010)"
This reverts commit bbc29768683b394b34600347f46be2b8245ddb30.
This change seems to be at odds with the non-owning part semantics of
MlirOperation in C API. Since downstream clients can only take and
return MlirOperation, it does not sound correct to force all returns of
MlirOperation transfer ownership. Specifically, this makes it impossible
for downstreams to implement IR-traversing functions that, e.g., look at
neighbors of an operation.
The following patch triggers the exception, and there does not seem to
be an alternative way for a downstream binding writer to express this:
```
diff --git a/mlir/lib/Bindings/Python/IRCore.cpp b/mlir/lib/Bindings/Python/IRCore.cpp
index 39757dfad5be..2ce640674245 100644
--- a/mlir/lib/Bindings/Python/IRCore.cpp
+++ b/mlir/lib/Bindings/Python/IRCore.cpp
@@ -3071,6 +3071,11 @@ void mlir::python::populateIRCore(py::module &m) {
py::arg("successors") = py::none(), py::arg("regions") = 0,
py::arg("loc") = py::none(), py::arg("ip") = py::none(),
py::arg("infer_type") = false, kOperationCreateDocstring)
+ .def("_get_first_in_block", [](PyOperation &self) -> MlirOperation {
+ MlirBlock block = mlirOperationGetBlock(self.get());
+ MlirOperation first = mlirBlockGetFirstOperation(block);
+ return first;
+ })
.def_static(
"parse",
[](const std::string &sourceStr, const std::string &sourceName,
diff --git a/mlir/test/python/ir/operation.py b/mlir/test/python/ir/operation.py
index f59b1a26ba48..6b12b8da5c24 100644
--- a/mlir/test/python/ir/operation.py
+++ b/mlir/test/python/ir/operation.py
@@ -24,6 +24,25 @@ def expect_index_error(callback):
except IndexError:
pass
+ at run
+def testCustomBind():
+ ctx = Context()
+ ctx.allow_unregistered_dialects = True
+ module = Module.parse(
+ r"""
+ func.func @f1(%arg0: i32) -> i32 {
+ %1 = "custom.addi"(%arg0, %arg0) : (i32, i32) -> i32
+ return %1 : i32
+ }
+ """,
+ ctx,
+ )
+ add = module.body.operations[0].regions[0].blocks[0].operations[0]
+ op = add.operation
+ # This will get a reference to itself.
+ f1 = op._get_first_in_block()
+
+
# Verify iterator based traversal of the op/region/block hierarchy.
# CHECK-LABEL: TEST: testTraverseOpRegionBlockIterators
```
Commit: 5b9be0ec8d42cb390048f5c3ac8782c377ef1aa6
https://github.com/llvm/llvm-project/commit/5b9be0ec8d42cb390048f5c3ac8782c377ef1aa6
Author: Jay Foad <jay.foad at amd.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
A llvm/test/MC/AMDGPU/gfx12_asm_features.s
Log Message:
-----------
[AMDGPU] Test parsing elements of CPol operand in any order (#76139)
Co-authored-by: Mirko Brkusanin <Mirko.Brkusanin at amd.com>
Commit: 18af032c0e16252effeb6dfd02113812388f1d31
https://github.com/llvm/llvm-project/commit/18af032c0e16252effeb6dfd02113812388f1d31
Author: Yi Wu <43659785+yi-wu-arm at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M flang/docs/Intrinsics.md
M flang/include/flang/Runtime/extensions.h
M flang/runtime/character.cpp
M flang/runtime/extensions.cpp
M flang/runtime/tools.h
M flang/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang] add GETLOG runtime and extension implementation: get login username (#74628)
Get login username, ussage:
```
CHARACTER(32) :: login
CALL getlog(login)
WRITE(*,*) login
```
getlog is required for an exascale proxyapp.
https://proxyapps.exascaleproject.org/app/minismac2d/
https://github.com/Mantevo/miniSMAC/blob/f90446714226eeef650b78bce06ca4967792e74d/ref/smac2d.f#L615
https://github.com/Mantevo/miniSMAC/blob/f90446714226eeef650b78bce06ca4967792e74d/ref/smac2d.f#L1570
---------
Co-authored-by: Yi Wu <43659785+PAX-12-WU at users.noreply.github.com>
Co-authored-by: Yi Wu <yiwu02 at wdev-yiwu02.arm.com>
Co-authored-by: Kiran Chandramohan <kiranchandramohan at gmail.com>
Commit: 4bad0cb359d3066fb29f589e408a5b812a628896
https://github.com/llvm/llvm-project/commit/4bad0cb359d3066fb29f589e408a5b812a628896
Author: zhongyunde 00443407 <zhongyunde at huawei.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-addrmode.ll
A llvm/test/CodeGen/AArch64/large-offset-ldr-merge.mir
Log Message:
-----------
[AArch64] Precommit tests for PR75343, NFC
Commit: 32878c2065c8005b3ea30c79e16dfd7eed55d645
https://github.com/llvm/llvm-project/commit/32878c2065c8005b3ea30c79e16dfd7eed55d645
Author: zhongyunde 00443407 <zhongyunde at huawei.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/test/CodeGen/AArch64/arm64-addrmode.ll
M llvm/test/CodeGen/AArch64/large-offset-ldr-merge.mir
Log Message:
-----------
[AArch64] merge index address with large offset into base address
A case for this transformation, https://gcc.godbolt.org/z/nhYcWq1WE
Fold
mov w8, #56952
movk w8, #15, lsl #16
ldrb w0, [x0, x8]
into
add x0, x0, 1036288
ldrb w0, [x0, 3704]
Only LDRBBroX is supported for the first time.
Fix https://github.com/llvm/llvm-project/issues/71917
Commit: f5687636415969e6d945659a0b78734abdfb0f06
https://github.com/llvm/llvm-project/commit/f5687636415969e6d945659a0b78734abdfb0f06
Author: zhongyunde 00443407 <zhongyunde at huawei.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/test/CodeGen/AArch64/arm64-addrmode.ll
Log Message:
-----------
[AArch64] Fold more load.x into load.i with large offset
The list of load.x is refer to canFoldIntoAddrMode on D152828.
Also support LDRSroX missed in canFoldIntoAddrMode
Commit: c4ff0a67d146030636e96eab4992233a7b5858d8
https://github.com/llvm/llvm-project/commit/c4ff0a67d146030636e96eab4992233a7b5858d8
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[TLI] Add getLibFunc that accepts an Opcode and scalar Type. (#75919)
It sets a LibFunc similarly with the other two getLibFunc methods.
Currently, it supports only the FRem Instruction.
Add tests for FRem.
Commit: e6d2bb0ed8c8e9ee97f502315871d7819b795058
https://github.com/llvm/llvm-project/commit/e6d2bb0ed8c8e9ee97f502315871d7819b795058
Author: Z572 <zhengjunjie at iscas.ac.cn>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
M llvm/test/Transforms/InstCombine/mul.ll
Log Message:
-----------
[InstCombine] Simplifiy `(-x * y * -x)` into `(x * y * x)` (#72953)
fix https://github.com/llvm/llvm-project/issues/72259
proof: https://alive2.llvm.org/ce/z/HsrmTC
Commit: cf0be7b4920cec762639a1f39e8ccf1868e44c40
https://github.com/llvm/llvm-project/commit/cf0be7b4920cec762639a1f39e8ccf1868e44c40
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/test/API/commands/command/script/TestCommandScript.py
Log Message:
-----------
[lldb] Add actionable feedback when overwriting a command fails (#76030)
If adding a user commands fails because a command with the same name
already exists, we only say that "force replace is not set" without
telling the user _how_ to set it. There are two ways to do so; this
commit changes the error message to mention both.
Commit: a047675bbf476300fd159736d8ab0d6cb23fe934
https://github.com/llvm/llvm-project/commit/a047675bbf476300fd159736d8ab0d6cb23fe934
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_frint.c
Log Message:
-----------
[Clang][SME2] Add builtins for multi-vector fp round to integral value (#75941)
Adds the following SME2 builtins:
- svrinta, svrintm, svrintn, svrintp (x2 & x4)
Commit: 36b6f77565c9d3d75c03600df4b8719bb518bdc0
https://github.com/llvm/llvm-project/commit/36b6f77565c9d3d75c03600df4b8719bb518bdc0
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/FloatProperties.h
M libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
Log Message:
-----------
[libc][NFC] Unify `FPBits` implementations (#76033)
`FPBits` is currently implemented as a general case and a specialization
for `long double` when `long double` is x86 80-bit extended precision.
This patch is a first of a series to provide an implementation based on
`FPType` instead of the C++ float type (which implementation is
architecture dependent).
Commit: 7c8787511b8ba6c29aa8f6551f3406ecbe69243d
https://github.com/llvm/llvm-project/commit/7c8787511b8ba6c29aa8f6551f3406ecbe69243d
Author: Christian Sigg <chsigg at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix build after acaff70841f59a1aec2a3c417e9f3a0f14eb47ad
Commit: 23adef4b85e341d4f0d1ff2d2185e4b3fa499a05
https://github.com/llvm/llvm-project/commit/23adef4b85e341d4f0d1ff2d2185e4b3fa499a05
Author: Dmitri Gribenko <gribozavr at gmail.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/test/tools/llvm-readtapi/stubify-invalid.test
Log Message:
-----------
[llvm-readtapi][test] Write test outputs into a temporary directory
Commit: 2e3d77d6edae0c790bacbc5841f664bb08bab159
https://github.com/llvm/llvm-project/commit/2e3d77d6edae0c790bacbc5841f664bb08bab159
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Analysis/VFABIDemangling.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef-scalable.ll
Log Message:
-----------
[TLI] Pass replace-with-veclib works with Scalable Vectors. (#73642)
[TLI] Pass replace-with-veclib works with Scalable Vectors.
The pass is heavily refactored.
It uses the Masked variant of a TLI method when the Intrinsic operates on Scalable Vectors.
Improve tests for ArmPL and SLEEF Intrinsics:
- Auto-generate test `armpl-intrinsics.ll`, and use active lane mask to have shorter `shufflevector` check lines.
- Update scripts now add `@llvm.compiler.used` instead of using the regex: `@[[LLVM_COMPILER_USED:[a-zA-Z0-9_$"\\.-]+]]`
- Add simplifycfg pass and noalias to ensure tail folding. `noalias` attribute was added only to the `%in.ptr` parameter of the ArmPL Intrinsics.
Commit: cd09f4b9510583e847267cae04eee87caf4d5e9d
https://github.com/llvm/llvm-project/commit/cd09f4b9510583e847267cae04eee87caf4d5e9d
Author: yan zhou <42528857+zhou3968322 at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[CodeGen] This patch fix a bug that may caused error for a self-defined target in SelectionDAG::getNode (#75320)
we need first judge N1.getNumOperands() > 0.
If Lowering Generated SDNode like.
```
v2i32 t20: TargetOpNode.
i32 t21: extract_vector_elt t20 0
i32 t22: extract_vector_elt t20 1
```
will cause a error.
Commit: 95e5839e06fdffd278499257c6e7679bba3d6868
https://github.com/llvm/llvm-project/commit/95e5839e06fdffd278499257c6e7679bba3d6868
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.h
M lldb/unittests/Thread/CMakeLists.txt
M lldb/unittests/Thread/ThreadTest.cpp
Log Message:
-----------
[lldb] add support for thread names on Windows (#74731)
This PR adds support for thread names in lldb on Windows.
```
(lldb) thr list
Process 2960 stopped
thread #53: tid = 0x03a0, 0x00007ff84582db34 ntdll.dll`NtWaitForMultipleObjects + 20
thread #29: tid = 0x04ec, 0x00007ff845830a14 ntdll.dll`NtWaitForAlertByThreadId + 20, name = 'SPUW.6'
thread #89: tid = 0x057c, 0x00007ff845830a14 ntdll.dll`NtWaitForAlertByThreadId + 20, name = 'PPU[0x1000019] physics[main]'
thread #3: tid = 0x0648, 0x00007ff843c2cafe combase.dll`InternalDoATClassCreate + 39518
thread #93: tid = 0x0688, 0x00007ff845830a14 ntdll.dll`NtWaitForAlertByThreadId + 20, name = 'PPU[0x100501d] uMovie::StreamingThread'
thread #1: tid = 0x087c, 0x00007ff842e7a104 win32u.dll`NtUserMsgWaitForMultipleObjectsEx + 20
thread #96: tid = 0x0890, 0x00007ff845830a14 ntdll.dll`NtWaitForAlertByThreadId + 20, name = 'PPU[0x1002020] HLE Video Decoder'
<...>
```
Commit: b223aebd3ff9fd705d0b9054023ad6b77c933d92
https://github.com/llvm/llvm-project/commit/b223aebd3ff9fd705d0b9054023ad6b77c933d92
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrUtils.td
Log Message:
-----------
[X86][NFC] Refine code in X86InstrArithmetic.td
1. Remove redandunt classes
2. Correct comments
3. Move duplicated `let` statement into class definition
4. Simplify the variable name and align the code
Commit: 513c2151cd0cddd90af91a6614b15b74b538963e
https://github.com/llvm/llvm-project/commit/513c2151cd0cddd90af91a6614b15b74b538963e
Author: David Spickett <david.spickett at linaro.org>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M lldb/unittests/Thread/CMakeLists.txt
Log Message:
-----------
[lldb][test] Only link Windows libraries on Windows
ld.lld: error: unable to find library -llldbPluginProcessWindowsCommon
https://lab.llvm.org/buildbot/#/builders/96/builds/50407
Fixes 95e5839e06fdffd278499257c6e7679bba3d6868.
Commit: 17afa5befb4cbe86c22c25ae1603433c8bd21551
https://github.com/llvm/llvm-project/commit/17afa5befb4cbe86c22c25ae1603433c8bd21551
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
A mlir/test/Dialect/Vector/vector-contract-to-outerproduct-matmul-transforms.mlir
M mlir/test/Dialect/Vector/vector-contract-to-outerproduct-matvec-transforms.mlir
R mlir/test/Dialect/Vector/vector-contract-to-outerproduct-transforms.mlir
Log Message:
-----------
[mlir][nfc] Update tests for Contract -> Op transforms (#76054)
Updates two tests for vector.contract -> vector.outerproduct
transformations:
1. Rename "vector-contract-to-outerproduct-transforms.mlir" as
"vector-contract-to-outerproduct-matmul-transforms.mlir". The new
name more accurate captures what's being tested. it is also
consistent with
"vector-contract-to-outerproduct-matvec-transforms.mlir", which
covers vector matvec operations and makes finding relevant tests
easier.
2. For matmul tests, move the traits definining the iteration spaces to
the top of the file. This is consistent with how matvec tests are
defined and also makes it easy to quickly identify what cases are
covered.
3. For matmul tests, use more meaningful names for function arguments.
This helps keep things consistent across the file (i.e. function
definitions wih check lines and comments).
4. For matvec test, move a few tests around so that the most basic case
(without masking) is first.
5. Update comments.
Commit: dddb9d1ee3e283133ce1abb50b7c7a3715317b9d
https://github.com/llvm/llvm-project/commit/dddb9d1ee3e283133ce1abb50b7c7a3715317b9d
Author: David Spickett <david.spickett at linaro.org>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M lldb/unittests/Utility/ChecksumTest.cpp
M lldb/unittests/Utility/FileSpecTest.cpp
Log Message:
-----------
[lldb][test] Fix missing-braces warnings in unit tests
```
/home/worker/2.0.1/lldb-x86_64-debian/llvm-project/lldb/unittests/Utility/ChecksumTest.cpp:15:38: warning: suggest braces around initialization of subobject [-Wmissing-braces]
static llvm::MD5::MD5Result hash1 = {0, 1, 2, 3, 4, 5, 6, 7,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
{
```
And others.
Commit: 3d9fc3fed036442e88f43e9d70362d1fd9f239ab
https://github.com/llvm/llvm-project/commit/3d9fc3fed036442e88f43e9d70362d1fd9f239ab
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M flang/test/Runtime/no-cpp-dep.c
Log Message:
-----------
[flang] add no-cpp-dep test for AIX 64 bit (#74637)
Add a new test for no-cpp-dep on AIX as it requires 64 bit OBJECT_MODE
since only 64-bit AIX is supported. AIX does not allow `-o /dev/null`
and requires `-lpthread` flag to be added.
---------
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: 11c2c0940b5e44920847b4d191a1272141de65f9
https://github.com/llvm/llvm-project/commit/11c2c0940b5e44920847b4d191a1272141de65f9
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/lib/Driver/ToolChains/AIX.cpp
Log Message:
-----------
[Flang] Add fortran runtime libraries to AIX driver (#75921)
Add fortran runtime libraries to flang-new on AIX
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: 55985db5fe82705234370848c47575db7a16437e
https://github.com/llvm/llvm-project/commit/55985db5fe82705234370848c47575db7a16437e
Author: David Spickett <david.spickett at linaro.org>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M lldb/unittests/Thread/CMakeLists.txt
Log Message:
-----------
[lldb][test] Remove non-existent Windows lib from thread tests
I assumed since it was in the PR and seemed like a logical
library to have, it would exist, but only `...Common` exists.
Commit: f54249e79a507f4bfeaa9ce3f693dbe01c9af915
https://github.com/llvm/llvm-project/commit/f54249e79a507f4bfeaa9ce3f693dbe01c9af915
Author: David Spickett <david.spickett at linaro.org>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M lldb/unittests/Thread/CMakeLists.txt
Log Message:
-----------
[lldb][test] Link to PlatformWindows in thread tests
Clearly I need my eyes checked, it wasn't linking to a non-existent
library at all, I had the name wrong.
Commit: 70260860739fcbea2a5bee9a0d5e1d1d32ac6603
https://github.com/llvm/llvm-project/commit/70260860739fcbea2a5bee9a0d5e1d1d32ac6603
Author: stephenpeckham <118857872+stephenpeckham at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/test/CodeGen/PowerPC/aix-return55.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
M llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll
A llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands2.ll
M llvm/tools/llvm-objdump/XCOFFDump.cpp
M llvm/tools/llvm-objdump/XCOFFDump.h
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[XCOFF] Use RLDs to print branches even without -r (#74342)
This presents misleading and confusing output. If you have a function
defined at the beginning of an XCOFF object file, and you have a
function call to an external function, the function call disassembles as
a branch to the local function. That is,
`void f() { f(); g();}`
disassembles as
>00000000 <.f>:
0: 7c 08 02 a6 mflr 0
4: 94 21 ff c0 stwu 1, -64(1)
8: 90 01 00 48 stw 0, 72(1)
c: 4b ff ff f5 bl 0x0 <.f>
10: 4b ff ff f1 bl 0x0 <.f>
With this PR, the second call will display:
`10: 4b ff ff f1 bl 0x0 <.g> `
Using -r can help, but you still get the confusing output:
>10: 4b ff ff f1 bl 0x0 <.f>
00000010: R_RBR .g
Commit: 92dc23c0e054183e8adf41aad2a2609cefc392c0
https://github.com/llvm/llvm-project/commit/92dc23c0e054183e8adf41aad2a2609cefc392c0
Author: Tomas Matheson <tomas.matheson at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/test/Preprocessor/aarch64-target-features.c
Log Message:
-----------
[AArch64] add missing test case for v9.4-A
Commit: 934b1099cbf14fa3f86a269dff957da8e5fb619f
https://github.com/llvm/llvm-project/commit/934b1099cbf14fa3f86a269dff957da8e5fb619f
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedA64FX.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
A llvm/test/MC/AArch64/armv9.5a-pauthlr-diagnostics.s
A llvm/test/MC/AArch64/armv9.5a-pauthlr-reloc.s
A llvm/test/MC/AArch64/armv9.5a-pauthlr.s
A llvm/test/MC/Disassembler/AArch64/armv9.5a-pauthlr.txt
Log Message:
-----------
[AArch64] Add FEAT_PAuthLR assembler support
Add assembly/disassembly support for the new PAuthLR instructions
introduced in Armv9.5-A:
- AUTIASPPC/AUTIBSPPC
- PACIASPPC/PACIBSPPC
- PACNBIASPPC/PACNBIBSPPC
- RETAASPPC/RETABSPPC
- PACM
Documentation for these instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/
Commit: 5992ce90b8c0fac06436c3c86621fbf6d5398ee5
https://github.com/llvm/llvm-project/commit/5992ce90b8c0fac06436c3c86621fbf6d5398ee5
Author: Tomas Matheson <tomas.matheson at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/aarch64-branch-protection-attr.c
A clang/test/Driver/aarch64-pauth-lr.c
M clang/test/Driver/aarch64-v95a.c
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
A llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64] Codegen support for FEAT_PAuthLR
- Adds a new +pc option to -mbranch-protection that will enable
the use of PC as a diversifier in PAC branch protection code.
- When +pauth-lr is enabled (-march=armv9.5a+pauth-lr) in combination
with -mbranch-protection=pac-ret+pc, the new 9.5-a instructions
(pacibsppc, retaasppc, etc) are used.
Documentation for the relevant instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/
Co-authored-by: Lucas Prates <lucas.prates at arm.com>
Commit: e414ba33b44971d47d24d75b7da94898d2cc8bde
https://github.com/llvm/llvm-project/commit/e414ba33b44971d47d24d75b7da94898d2cc8bde
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[ValueTracking] Shufflevector produces poison rather than undef
Shufflevector semantics have changed so that poison mask elements
return poison rather than undef. Reflect this in the
canCreateUndefOrPoison() implementation.
Commit: 2fe94cead0a55d8d269e6e32bb95f7aa987d4db8
https://github.com/llvm/llvm-project/commit/2fe94cead0a55d8d269e6e32bb95f7aa987d4db8
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrUtils.td
Log Message:
-----------
[X86][NFC] Refine code in X86InstrArithmetic.td
1. Simplify the variable name
2. Change HasOddOpcode to HasEvenOpcode b/c
a. opcode of any 8-bit arithmetic instruction is even
b. opcode of a 16/32/64-bit arithmetic instruction is usually
odd, but it can be even sometimes, e.g. INC/DEC, ADCX/ADOX
c. so that we can remove `let Opcode = o` for the mentioned corner
cases.
Commit: 3107f313f19a921469776ca498b6aaa0984feda0
https://github.com/llvm/llvm-project/commit/3107f313f19a921469776ca498b6aaa0984feda0
Author: Radu Salavat <radu.salavat at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/test/Driver/dynamic-linker.f90
Log Message:
-----------
[Flang, Clang] Enable and test 'rdynamic' flag (#75598)
Enable and test 'rdynamic' flag
Commit: 38c1ff89eee769d19ae07b585530f8edd69e124a
https://github.com/llvm/llvm-project/commit/38c1ff89eee769d19ae07b585530f8edd69e124a
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll
Log Message:
-----------
[CVP] Add additional tests for undef check (NFC)
Commit: 791200b3bc6898f478138b63e91c03f0c68c7061
https://github.com/llvm/llvm-project/commit/791200b3bc6898f478138b63e91c03f0c68c7061
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[flang][OpenMP] Avoid captures of references to structured bindings
Handle one more case missed in ad37c8694e.
Commit: 8674a023bcacb677ce48b8831e2ae35b5aa2d8ef
https://github.com/llvm/llvm-project/commit/8674a023bcacb677ce48b8831e2ae35b5aa2d8ef
Author: Chia <sun1011jacobi at gmail.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/commutative-operation-over-phis.ll
Log Message:
-----------
[InstCombine] fold (Binop phi(a, b) phi(b, a)) -> (Binop a, b) while Binop is commutative. (#75765)
Alive2 proof: https://alive2.llvm.org/ce/z/2P8gq-
This patch closes #73905
Commit: 70b00b4a6aa06c906c30d614d5b0042fdbfdbd50
https://github.com/llvm/llvm-project/commit/70b00b4a6aa06c906c30d614d5b0042fdbfdbd50
Author: Jay Foad <jay.foad at amd.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
[AMDGPU] Rename AMDGPUGlobalAtomicRtn -> AMDGPUAtomicRtn (#76157)
It is used for FLAT atomics as well as Global atomics.
Commit: 8eccf2b872cc1a88a1e5d4e5af0bfdabfb66c7bb
https://github.com/llvm/llvm-project/commit/8eccf2b872cc1a88a1e5d4e5af0bfdabfb66c7bb
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrArithmetic.td
Log Message:
-----------
[X86] Set Uses = [EFLAGS] for ADCX/ADOX
According to Intel SDE, ADCX reads CF and ADOX reads OF. `Uses` was
set to empty by accident, the bug was not exposed b/c compiler never
emits these instructions.
Commit: 6b505406a3403a9ab6c733ccf1fbcc52d9ca0601
https://github.com/llvm/llvm-project/commit/6b505406a3403a9ab6c733ccf1fbcc52d9ca0601
Author: madanial0 <118996571+madanial0 at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M flang/test/Driver/no-duplicate-main.f90
Log Message:
-----------
[Flang] remove whole-archive option for AIX linker (#76039)
The AIX linker does not support the `--whole-archive` option, removing
the option if the OS is AIX.
---------
Co-authored-by: Mark Danial <mark.danial at ibm.com>
Commit: 35111695dd71affe100c1579858c5680091da5c1
https://github.com/llvm/llvm-project/commit/35111695dd71affe100c1579858c5680091da5c1
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
Log Message:
-----------
[Clang][SME2] Enable multi-vector loads & stores for SME2 (#75821)
This patch enables the following builtins for SME2:
- svld1, svld1_vnum
- svldnt1, svldnt1_vnum
- svst1, svst1_vnum
- svstnt1, svstnt1_vnum
Commit: 8fdfd34cd2ad67cd3fe2ded59b476790240a52bb
https://github.com/llvm/llvm-project/commit/8fdfd34cd2ad67cd3fe2ded59b476790240a52bb
Author: Jay Foad <jay.foad at amd.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/gds-unsupported.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
A llvm/test/CodeGen/AMDGPU/verify-gfx12-gds.mir
M llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
Log Message:
-----------
[AMDGPU] Remove GDS and GWS for GFX12 (#76148)
Commit: 4d7112435e31dafb5854f69c516373e4548bd0a3
https://github.com/llvm/llvm-project/commit/4d7112435e31dafb5854f69c516373e4548bd0a3
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/test/Transforms/InstCombine/array.ll
Log Message:
-----------
[InstCombine] Add zext nneg test variant for gep of sext add fold (NFC)
Commit: b8df88b41c8a1b4e879b4fd34be3522c9b45e86f
https://github.com/llvm/llvm-project/commit/b8df88b41c8a1b4e879b4fd34be3522c9b45e86f
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/array.ll
Log Message:
-----------
[InstCombine] Support zext nneg in gep of sext add fold
Add m_NNegZext() and m_SExtLike() matchers to make doing these kinds
of changes simpler in the future.
Commit: a134abf4be132cfff2fc5132d6226db919c0865b
https://github.com/llvm/llvm-project/commit/a134abf4be132cfff2fc5132d6226db919c0865b
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll
Log Message:
-----------
[ValueTracking] Make isGuaranteedNotToBeUndef() more precise (#76160)
Currently isGuaranteedNotToBeUndef() is the same as
isGuaranteedNotToBeUndefOrPoison(). This function is used in places
where we only care about undef (due to multi-use issues), not poison.
Make it more precise by only considering instructions that can create
undef (like loads or call), and ignore those that can only create
poison. In particular, we can ignore poison-generating flags.
This means that inferring more flags has less chance to pessimize other
transforms.
Commit: e01c063684b76da3ceacd01a0c47c73402cbc775
https://github.com/llvm/llvm-project/commit/e01c063684b76da3ceacd01a0c47c73402cbc775
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
Log Message:
-----------
[llvm] Use DenseMap::contains (NFC)
Commit: 886655869cef2e0f11da8981da30d70ad7892ff9
https://github.com/llvm/llvm-project/commit/886655869cef2e0f11da8981da30d70ad7892ff9
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/docs/ControlFlowIntegrityDesign.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerCoverage.rst
Log Message:
-----------
[clang] Fix typos in documentation
Commit: 9f0f5587426a4ff24b240018cf8bf3acc3c566ae
https://github.com/llvm/llvm-project/commit/9f0f5587426a4ff24b240018cf8bf3acc3c566ae
Author: Tomas Matheson <tomas.matheson at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/aarch64-branch-protection-attr.c
R clang/test/Driver/aarch64-pauth-lr.c
M clang/test/Driver/aarch64-v95a.c
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
R llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
Revert "[AArch64] Codegen support for FEAT_PAuthLR"
This reverts commit 5992ce90b8c0fac06436c3c86621fbf6d5398ee5.
Builtbot failures with expensive checks enabled.
Commit: 199a0f9f5aaf72ff856f68e3bb708e783252af17
https://github.com/llvm/llvm-project/commit/199a0f9f5aaf72ff856f68e3bb708e783252af17
Author: Tomas Matheson <tomas.matheson at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedA64FX.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
R llvm/test/MC/AArch64/armv9.5a-pauthlr-diagnostics.s
R llvm/test/MC/AArch64/armv9.5a-pauthlr-reloc.s
R llvm/test/MC/AArch64/armv9.5a-pauthlr.s
R llvm/test/MC/Disassembler/AArch64/armv9.5a-pauthlr.txt
Log Message:
-----------
Revert "[AArch64] Add FEAT_PAuthLR assembler support"
This reverts commit 934b1099cbf14fa3f86a269dff957da8e5fb619f.
Buildbot failues on sanitizer-x86_64-linux-fast
Commit: 0dcff0db3a11d8a3cb8f78bf3b995f1211c2585d
https://github.com/llvm/llvm-project/commit/0dcff0db3a11d8a3cb8f78bf3b995f1211c2585d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
A llvm/test/CodeGen/RISCV/vp-splice-fixed-vectors.ll
A llvm/test/CodeGen/RISCV/vp-splice-mask-fixed-vectors.ll
A llvm/test/CodeGen/RISCV/vp-splice-mask-vectors.ll
A llvm/test/CodeGen/RISCV/vp-splice.ll
Log Message:
-----------
[RISCV] Add codegen support for experimental.vp.splice (#74688)
IR intrinsics were already defined, but no codegen support had been
added.
I extracted this code from our downstream. Some of it may have come from
https://repo.hca.bsc.es/gitlab/rferrer/llvm-epi/ originally.
Commit: f97e559539afc08700a6b4bf134d535fd237625e
https://github.com/llvm/llvm-project/commit/f97e559539afc08700a6b4bf134d535fd237625e
Author: Nico Weber <thakis at chromium.org>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
A llvm/utils/gn/secondary/llvm/lib/TextAPI/BinaryReader/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
Log Message:
-----------
[gn] port e3627e2690a (TextAPI/BinaryReader)
Commit: 4cdeef510e136865c2445dedb5a0f72cd11d4527
https://github.com/llvm/llvm-project/commit/4cdeef510e136865c2445dedb5a0f72cd11d4527
Author: Nico Weber <thakis at chromium.org>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/TextAPI/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
Log Message:
-----------
[gn] port c6f29dbb596f
Commit: 411cba215a9c4034fdaf60d4c79bf803d74e6e69
https://github.com/llvm/llvm-project/commit/411cba215a9c4034fdaf60d4c79bf803d74e6e69
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp.ll
Log Message:
-----------
Revert "[InstCombine] Extend `foldICmpBinOp` to `add`-like `or`. (#71… (#76167)
…396)"
This reverts commit 8773c9be3d9868288f1f46957945d50ff58e4e91.
Commit: 77c5c44b01a763e8b2f37f6971c830ed036e5da9
https://github.com/llvm/llvm-project/commit/77c5c44b01a763e8b2f37f6971c830ed036e5da9
Author: Dinar Temirbulatov <Dinar.Temirbulatov at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/include/clang/Basic/arm_sme.td
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
Log Message:
-----------
[AArch64][SME2] Add SME2 MLA/MLS builtins. (#75584)
Add SME2 MLA/MLS builtins.
Commit: e6751c1a128320420801370ab662f213df5791b5
https://github.com/llvm/llvm-project/commit/e6751c1a128320420801370ab662f213df5791b5
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 0ea87560cca4
Commit: 72003adf6bd44e91778c22e42e94a28c28be2339
https://github.com/llvm/llvm-project/commit/72003adf6bd44e91778c22e42e94a28c28be2339
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/test/Conversion/GPUToSPIRV/reductions.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/ops.mlir
Log Message:
-----------
[mlir][gpu] Allow subgroup reductions over 1-d vector types (#76015)
Each vector element is reduced independently, which is a form of
multi-reduction.
The plan is to allow for gradual lowering of multi-reduction that
results in fewer `gpu.shuffle` ops at the end:
1d `vector.multi_reduction` --> 1d `gpu.subgroup_reduce` --> smaller 1d
`gpu.subgroup_reduce` --> packed `gpu.shuffle` over i32
For example we can perform 2 independent f16 reductions with a series of
`gpu.shuffles` over i32, reducing the final number of `gpu.shuffles` by 2x.
Commit: 11140cc238b8c4124e6f9efacb1601f81da096a0
https://github.com/llvm/llvm-project/commit/11140cc238b8c4124e6f9efacb1601f81da096a0
Author: Oleksandr "Alex" Zinenko <zinenko at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/test/lib/Analysis/TestDataFlowFramework.cpp
Log Message:
-----------
[mlir] mark ChangeResult as nodiscard (#76147)
This enum is used by dataflow analyses to indicate whether further
propagation is necessary to reach the fix point. Accidentally discarding
such a value will likely lead to propagation stopping early, leading to
incomplete or incorrect results. The most egregious example is the
duality between `join` on the analysis class, which triggers propagation
internally, and `join` on the lattice class that does not and expects
the caller to trigger it depending on the returned `ChangeResult`.
Commit: 537b2aa264c5a9879a80289c8d123b39e520eb15
https://github.com/llvm/llvm-project/commit/537b2aa264c5a9879a80289c8d123b39e520eb15
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M mlir/python/CMakeLists.txt
M mlir/python/mlir/dialects/arith.py
M mlir/python/mlir/dialects/builtin.py
M mlir/python/mlir/dialects/func.py
M mlir/python/mlir/dialects/pdl.py
M mlir/python/mlir/dialects/scf.py
M mlir/python/mlir/dialects/tensor.py
M mlir/python/mlir/dialects/transform/__init__.py
M mlir/python/mlir/dialects/transform/extras/__init__.py
A mlir/python/mlir/extras/meta.py
M mlir/test/python/dialects/arith_dialect.py
M mlir/test/python/dialects/tensor.py
M mlir/test/python/dialects/transform_extras.py
A mlir/test/python/integration/dialects/transform.py
Log Message:
-----------
[mlir][python] meta region_op (#75673)
Commit: 88151dd4285cdd9feeb24ebb1be9cf5252ab0883
https://github.com/llvm/llvm-project/commit/88151dd4285cdd9feeb24ebb1be9cf5252ab0883
Author: Finn Plummer <50529406+inbelic at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
Log Message:
-----------
[mlir][spirv] Add folding for SNegate, [Logical]Not (#74992)
Add missing constant propogation folder for SNegate, [Logical]Not.
Implement additional folding when !(!x) for all ops.
This helps for readability of lowered code into SPIR-V.
Part of work for #70704
Commit: a4e15416b41459b6f69086a22088520ee826f244
https://github.com/llvm/llvm-project/commit/a4e15416b41459b6f69086a22088520ee826f244
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
Log Message:
-----------
[mlir][ArmSME] Move creation of load/store intrinsics to helpers (NFC) (#76168)
Also, for consistency make the ZeroOp lowering switch on the ArmSMETileType,
rather than the element bit width.
Commit: 34a65980d7d2e1b05e3fc88535cafe606ee55e04
https://github.com/llvm/llvm-project/commit/34a65980d7d2e1b05e3fc88535cafe606ee55e04
Author: Billy Zhu <billyzhu at modular.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M mlir/include/mlir/Transforms/FoldUtils.h
M mlir/lib/Transforms/SCCP.cpp
M mlir/lib/Transforms/Utils/FoldUtils.cpp
M mlir/test/Dialect/Transform/test-pattern-application.mlir
A mlir/test/Transforms/canonicalize-debuginfo.mlir
A mlir/test/Transforms/constant-fold-debuginfo.mlir
M mlir/test/lib/Transforms/TestIntRangeInference.cpp
Log Message:
-----------
[MLIR] Erase location of folded constants (#75415)
Follow up to the discussion from #75258, and serves as an alternate
solution for #74670.
Set the location to Unknown for deduplicated / moved / materialized
constants by OperationFolder. This makes sure that the folded constants
don't end up with an arbitrary location of one of the original ops that
became it, and that hoisted ops don't confuse the stepping order.
Commit: 192f720178732885ec86062b92daf3d562aea427
https://github.com/llvm/llvm-project/commit/192f720178732885ec86062b92daf3d562aea427
Author: Tomas Matheson <tomas.matheson at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedA64FX.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
A llvm/test/MC/AArch64/armv9.5a-pauthlr-diagnostics.s
A llvm/test/MC/AArch64/armv9.5a-pauthlr-reloc.s
A llvm/test/MC/AArch64/armv9.5a-pauthlr.s
A llvm/test/MC/Disassembler/AArch64/armv9.5a-pauthlr.txt
Log Message:
-----------
Re-land "[AArch64] Add FEAT_PAuthLR assembler support" (#75947)
This reverts commit 199a0f9f5aaf72ff856f68e3bb708e783252af17.
Fixed the left-shift of signed integer which was causing UB.
Commit: 6a870cca70e3df6070bdcd2768d6569daae8e1ba
https://github.com/llvm/llvm-project/commit/6a870cca70e3df6070bdcd2768d6569daae8e1ba
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/test/Driver/modules.m
Log Message:
-----------
Add tests for driver to propagate module map flags for layering check (#75827)
Xcode 14.3.1 seems to have dropped these flags so we are creating unit tests to reproduce the issue.
Commit: f44079db22036d0ade2cf3d2e5a24bde5d378efd
https://github.com/llvm/llvm-project/commit/f44079db22036d0ade2cf3d2e5a24bde5d378efd
Author: David Li <57157229+david-xl at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrCompiler.td
A llvm/test/CodeGen/X86/insert.ll
Log Message:
-----------
[ISel] Add pattern matching for depositing subreg value (#75978)
Depositing value into the lowest byte/word is a common code pattern.
This patch improves the code generation for it to avoid redundant AND
and OR operations.
Commit: c50de57feb2b824d789fe3bc4e0d24c5bfc266ea
https://github.com/llvm/llvm-project/commit/c50de57feb2b824d789fe3bc4e0d24c5bfc266ea
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/lib/Optimizer/Transforms/StackArrays.cpp:452:7: error:
ignoring return value of function declared with 'nodiscard'
attribute [-Werror,-Wunused-result]
Commit: 7bd17212ef23a72ea224a037126d33d3e02553fe
https://github.com/llvm/llvm-project/commit/7bd17212ef23a72ea224a037126d33d3e02553fe
Author: Tomas Matheson <tomas.matheson at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/aarch64-branch-protection-attr.c
A clang/test/Driver/aarch64-pauth-lr.c
M clang/test/Driver/aarch64-v95a.c
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
A llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
Re-land "[AArch64] Codegen support for FEAT_PAuthLR" (#75947)
This reverts commit 9f0f5587426a4ff24b240018cf8bf3acc3c566ae.
Fix expensive checks failure by properly marking register def for ADR.
Commit: 2366d53d8d8726b73408597b534d2f910c3d3e6d
https://github.com/llvm/llvm-project/commit/2366d53d8d8726b73408597b534d2f910c3d3e6d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/code-model-elf.ll
M llvm/test/CodeGen/X86/fast-isel-large-object.ll
M llvm/test/CodeGen/X86/fold-add.ll
Log Message:
-----------
[X86] Fix more medium code model addressing modes (#75641)
By looking at whether a global is large instead of looking at the code
model.
This also fixes references to large data in the small code model.
We now always fold any 32-bit offset into the addressing mode with the
large code model since it uses 64-bit relocations.
Commit: 9664ab570ae44068766cc722e8d5e62003d84361
https://github.com/llvm/llvm-project/commit/9664ab570ae44068766cc722e8d5e62003d84361
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Modernize FuncSampleStats, ValueSitesStats, and HotFuncInfo (NFC)
Commit: e6f57628790421b16a02b0cb4a67fab4f2f48004
https://github.com/llvm/llvm-project/commit/e6f57628790421b16a02b0cb4a67fab4f2f48004
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M mlir/test/Dialect/Vector/fold-arith-extf-into-vector-contract.mlir
Log Message:
-----------
[mlir][vector][nfc] Add a test case for scalable vectors (#76138)
Extends fold-arith-extf-into-vector-contract.mlir by adding a test case
for scalable vectors.
Commit: 7433b1ca3ebe9f3b20758336535e82531cbae96f
https://github.com/llvm/llvm-project/commit/7433b1ca3ebe9f3b20758336535e82531cbae96f
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/TargetMachine.cpp
M llvm/test/CodeGen/X86/code-model-elf-sections.ll
Log Message:
-----------
Reapply "[X86] Set SHF_X86_64_LARGE for globals with explicit well-known large section name (#74381)"
This reverts commit 19fff858931bf575b63a0078cc553f8f93cced20.
Now that explicit large globals are handled properly in the small code model.
Commit: 058e527434aeb61ee6f72d2d460123440726a7df
https://github.com/llvm/llvm-project/commit/058e527434aeb61ee6f72d2d460123440726a7df
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/include/llvm/CodeGen/AccelTable.h
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
Log Message:
-----------
[AccelTable][NFC] Fix typos and duplicated code (#76155)
Renaming a member variable from "Endoding" to "Encoding".
Also replace inlined code for "isNormalized" with a call to the
function, so that if the definition of normalization ever changes, we
only need to change the one place.
Commit: 809f2f3d7dfaff7c239dd99742175287f76560c7
https://github.com/llvm/llvm-project/commit/809f2f3d7dfaff7c239dd99742175287f76560c7
Author: Dinar Temirbulatov <Dinar.Temirbulatov at arm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M clang/include/clang/Basic/arm_sme.td
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fp_dots.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_int_dots.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vdot.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
Log Message:
-----------
[AArch64][SME2] Add builtins for FDOT, BFDOT, SUDOT, USDOT, SDOT, UDOT. (#75737)
Add SME2 DOT builtins.
Commit: 74a09bd1ec6066d56880df1ae1a2c0258442cee9
https://github.com/llvm/llvm-project/commit/74a09bd1ec6066d56880df1ae1a2c0258442cee9
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/test/CodeGen/SystemZ/atomic-load-05.ll
M llvm/test/CodeGen/SystemZ/atomic-load-08.ll
M llvm/test/CodeGen/SystemZ/atomic-store-05.ll
M llvm/test/CodeGen/SystemZ/atomic-store-06.ll
M llvm/test/CodeGen/SystemZ/atomic-store-07.ll
M llvm/test/CodeGen/SystemZ/atomic-store-08.ll
Log Message:
-----------
[SystemZ] Test improvements for atomic load/store instructions (NFC). (#75630)
Improve tests for atomic loads and stores, mainly by testing 128-bit atomic load and store instructions both with and w/out natural alignment.
Commit: 1830fadb78be9993cfeeaa7fb6867c3df1a53a8b
https://github.com/llvm/llvm-project/commit/1830fadb78be9993cfeeaa7fb6867c3df1a53a8b
Author: cmtice <cmtice at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M lldb/test/API/python_api/global_module_cache/TestGlobalModuleCache.py
Log Message:
-----------
[LLDB] Fix write permission error in TestGlobalModuleCache.py (#76171)
TestGlobalModuleCache.py, a recently added test, tries to update a
source file in the build directory, but it assumes the file is writable.
In our distributed build and test system, this is not always true, so
the test often fails with a write permissions error.
This change fixes that by setting the permissions on the file to be
writable before attempting to write to it.
Commit: 528150b90bb54618b5cceddb85601718c2346f3f
https://github.com/llvm/llvm-project/commit/528150b90bb54618b5cceddb85601718c2346f3f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_report.cpp
Log Message:
-----------
[hwasan] Separate sections in report (#76130)
It makes them easier to read.
Commit: 0cf3af0c5176cc067bf90b315466a8997498b988
https://github.com/llvm/llvm-project/commit/0cf3af0c5176cc067bf90b315466a8997498b988
Author: Pete Steinfeld <47540744+psteinfeld at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/test/Transforms/simplifyintrinsics.fir
Log Message:
-----------
Revert "[Flang] Allow Intrinsic simpification with min/maxloc dim and… (#76184)
… scalar result. (#75820)"
This reverts commit 701f64790520790f75b1f948a752472d421ddaa3.
The commit breaks some uses of the 'maxloc' intrinsic.
See PR #75820
Commit: 157748341358f38ab55ea3a7a64276a5d4431d77
https://github.com/llvm/llvm-project/commit/157748341358f38ab55ea3a7a64276a5d4431d77
Author: ShatianWang <38512325+ShatianWang at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/test/X86/cdsplit-call-scale.s
Log Message:
-----------
[BOLT] Don't split likely fallthrough in CDSplit (#76164)
This diff speeds up CDSplit by not considering any hot-warm splitting
point that could break a fall-through branch from a basic block to its
most likely successor.
Co-authored-by: spupyrev <spupyrev at fb.com>
Commit: 011024536963c7822c81f33434969e8eff08e180
https://github.com/llvm/llvm-project/commit/011024536963c7822c81f33434969e8eff08e180
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M compiler-rt/test/hwasan/TestCases/stack-uar.c
M compiler-rt/test/hwasan/TestCases/stack-uas.c
Log Message:
-----------
[test][hwasan] Update tests missed by #76130
Commit: 35a5df2de6bd56c95edcd10d6acab040b251238e
https://github.com/llvm/llvm-project/commit/35a5df2de6bd56c95edcd10d6acab040b251238e
Author: Derek Schuff <dschuff at chromium.org>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/test/MC/WebAssembly/custom-sections.ll
M llvm/test/MC/WebAssembly/debug-info.ll
M llvm/test/MC/WebAssembly/debug-info64.ll
M llvm/test/MC/WebAssembly/tag-section.ll
M llvm/test/tools/llvm-readobj/wasm/globals.test
M llvm/test/tools/llvm-readobj/wasm/sections.test
Log Message:
-----------
[WebAssembly][Object] Record section start offsets at start of payload (#76188)
LLVM ObjectFile currently records the start offsets of sections as the
start of the section header, whereas most other tools (WABT, emscripten,
wasm-tools) record it as the start of the section content, after the
header. This affects binutils tools such as objdump and nm, but not
compilation/assembly (since that is driven by symbols and assembler
labels which already have their values inside the section payload rather
in the header. This patch updates LLVM to match the other tools.
Commit: 12250c4092b9f8fd043b37cbb73555706a4a412b
https://github.com/llvm/llvm-project/commit/12250c4092b9f8fd043b37cbb73555706a4a412b
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M openmp/libomptarget/test/lit.cfg
M openmp/libomptarget/test/offloading/fortran/basic-target-region-1D-array-section.f90
M openmp/libomptarget/test/offloading/fortran/basic-target-region-3D-array-section.f90
M openmp/libomptarget/test/offloading/fortran/basic-target-region-3D-array.f90
M openmp/libomptarget/test/offloading/fortran/basic_target_region.f90
M openmp/libomptarget/test/offloading/fortran/constant-arr-index.f90
M openmp/libomptarget/test/offloading/fortran/declare-target-array-in-target-region.f90
M openmp/libomptarget/test/offloading/fortran/double-target-call-with-declare-target.f90
M openmp/libomptarget/test/offloading/fortran/target-region-implicit-array.f90
M openmp/libomptarget/test/offloading/fortran/target_map_common_block.f90
M openmp/libomptarget/test/offloading/fortran/target_map_common_block2.f90
Log Message:
-----------
Reland [OpenMP][Fix] libomptarget Fortran tests (#76189)
This patch fixes the erroneous multiple-target requirement in Fortran
offloading tests. Additionally, it adds two new variables
(test_flags_clang, test_flags_flang) to lit.cfg so that
compiler-specific flags for Clang and Flang can be specified.
This patch re-lands: #74543. The error was caused by having:
```
config.substitutions.append(("%flags", config.test_flags))
config.substitutions.append(("%flags_clang", config.test_flags_clang))
config.substitutions.append(("%flags_flang", config.test_flags_flang))
```
when instead it has to be:
```
config.substitutions.append(("%flags_clang", config.test_flags_clang))
config.substitutions.append(("%flags_flang", config.test_flags_flang))
config.substitutions.append(("%flags", config.test_flags))
```
because LIT replaces with the first longest sub-string match.
Commit: 82b38e83cfbb3f996313b22f5daf0d104c0f27dc
https://github.com/llvm/llvm-project/commit/82b38e83cfbb3f996313b22f5daf0d104c0f27dc
Author: Tacet <4922191+AdvenamTacet at users.noreply.github.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M libcxx/include/deque
M libcxx/include/string
M libcxx/include/vector
Log Message:
-----------
[ASan][libc++] Optimization of container annotations (#76082)
This commit implements conditional compilation for ASan helper code.
As convey to me by @EricWF, string benchmarks with UBSan have been
experiencing significant performance hit after the commit with ASan
string annotations. This is likely due to the fact that no-op ASan code
is not optimized out with UBSan. To address this issue, this commit
conditionalizes the inclusion of ASan helper function bodies using
`#ifdef` directives. This approach allows us to selectively include only
the ASan code when it's actually required, thereby enhancing
optimizations and improving performance.
While issue was noticed in string benchmarks, I expect same overhead
(just less noticeable) in other containers, therefore `std::vector` and
`std::deque` have same changes.
To see impact of that change run `string.libcxx.out` with UBSan and
`--benchmark_filter=BM_StringAssign` or
`--benchmark_filter=BM_StringConstruct`.
Commit: 3ca9bcc6ccd0de4e05c7b7749c24f94e5f184b45
https://github.com/llvm/llvm-project/commit/3ca9bcc6ccd0de4e05c7b7749c24f94e5f184b45
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/docs/ReleaseNotes.rst
Log Message:
-----------
[llvm][docs][X86] Mention code model improvements in ReleaseNotes (#76190)
Commit: e64f5d6305c447b1ec3bc31128753b28f4e87f32
https://github.com/llvm/llvm-project/commit/e64f5d6305c447b1ec3bc31128753b28f4e87f32
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Log Message:
-----------
[RISCV] Replace RISCVISD::VP_MERGE_VL with a new node that has a separate passthru operand. (#75682)
ISD::VP_MERGE treats the false operand as the source for elements past
VL. The vmerge instruction encodes 3 registers and treats the vd
register as the source for the tail.
This patch adds a new ISD opcode that models the tail source explicitly.
During lowering we copy the false operand to this operand.
I think we can merge RISCVISD::VSELECT_VL with this new opcode by using
an UNDEF passthru, but I'll save that for another patch.
Commit: f70b229e9643ddb895d491b62a5ec0655917f6f8
https://github.com/llvm/llvm-project/commit/f70b229e9643ddb895d491b62a5ec0655917f6f8
Author: Martin Storsjö <martin at martin.st>
Date: 2023-12-22 (Fri, 22 Dec 2023)
Changed paths:
M lldb/CMakeLists.txt
M lldb/include/lldb/Host/HostGetOpt.h
Log Message:
-----------
[LLDB] Define _BSD_SOURCE globally, to get optreset available in mingw's getopt.h (#76137)
We previously were defining _BSD_SOURCE right before including getopt.h.
However, on mingw-w64, getopt.h is also transitively included by
unistd.h, and unistd.h can be transitively included by many headers
(recently, by some libc++ headers).
Therefore, to be safe, we need to define _BSD_SOURCE before including
any header. Thus do this in CMake.
This fixes https://github.com/llvm/llvm-project/issues/76050.
Commit: 38eea57e69a8a01e38e8dbc38614043a4553acb1
https://github.com/llvm/llvm-project/commit/38eea57e69a8a01e38e8dbc38614043a4553acb1
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M llvm/include/llvm/ADT/Twine.h
Log Message:
-----------
[ADT] fix grammatical typo in Twine.h docs, NFC
Commit: 7c3b67d2038cfb48a80299089f6a1308eee1df7f
https://github.com/llvm/llvm-project/commit/7c3b67d2038cfb48a80299089f6a1308eee1df7f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_report.cpp
A compiler-rt/test/hwasan/TestCases/strip_path_prefix.c
Log Message:
-----------
[hwasan] Respect strip_path_prefix printing locals (#76132)
Commit: 529096d9f32526f07e9d9f62c09d8c4367d4533b
https://github.com/llvm/llvm-project/commit/529096d9f32526f07e9d9f62c09d8c4367d4533b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2023-12-21 (Thu, 21 Dec 2023)
Changed paths:
M bolt/lib/Passes/SplitFunctions.cpp
M bolt/test/X86/cdsplit-call-scale.s
M clang/docs/ControlFlowIntegrityDesign.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerCoverage.rst
M clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h
M clang/include/clang/Analysis/FlowSensitive/RecordOps.h
M clang/include/clang/Analysis/FlowSensitive/Value.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_sme.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Driver/Options.td
M clang/lib/Analysis/FlowSensitive/RecordOps.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/stream-error.c
M clang/test/CodeGen/aarch64-branch-protection-attr.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fp_dots.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_frint.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_int_dots.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mla.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlal.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlall.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mls.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mlsl.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vdot.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ld1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_ldnt1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_st1.c
M clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_stnt1.c
A clang/test/Driver/aarch64-pauth-lr.c
M clang/test/Driver/aarch64-v95a.c
M clang/test/Driver/modules.m
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_imm.cpp
M clang/unittests/Analysis/FlowSensitive/RecordOpsTest.cpp
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
M compiler-rt/lib/hwasan/hwasan_report.cpp
A compiler-rt/test/hwasan/TestCases/stack-overflow.c
M compiler-rt/test/hwasan/TestCases/stack-uar-dynamic.c
M compiler-rt/test/hwasan/TestCases/stack-uar.c
M compiler-rt/test/hwasan/TestCases/stack-uas.c
A compiler-rt/test/hwasan/TestCases/stack-underflow.c
A compiler-rt/test/hwasan/TestCases/strip_path_prefix.c
M flang/docs/Intrinsics.md
M flang/include/flang/Runtime/extensions.h
M flang/lib/Lower/OpenMP.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/runtime/character.cpp
M flang/runtime/extensions.cpp
M flang/runtime/tools.h
M flang/test/Driver/dynamic-linker.f90
M flang/test/Driver/no-duplicate-main.f90
M flang/test/Runtime/no-cpp-dep.c
M flang/test/Transforms/simplifyintrinsics.fir
M flang/unittests/Runtime/CommandTest.cpp
M libc/src/__support/CPP/bit.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/FloatProperties.h
M libc/src/__support/FPUtil/x86_64/LongDoubleBits.h
M libc/src/__support/UInt.h
M libc/test/src/__support/uint_test.cpp
M libcxx/include/deque
M libcxx/include/string
M libcxx/include/vector
M lldb/CMakeLists.txt
M lldb/include/lldb/Host/HostGetOpt.h
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.h
M lldb/test/API/commands/command/script/TestCommandScript.py
M lldb/test/API/python_api/global_module_cache/TestGlobalModuleCache.py
M lldb/unittests/Thread/CMakeLists.txt
M lldb/unittests/Thread/ThreadTest.cpp
M lldb/unittests/Utility/ChecksumTest.cpp
M lldb/unittests/Utility/FileSpecTest.cpp
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/ADT/Twine.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/AccelTable.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/TargetParser/ARMTargetParserCommon.h
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/VFABIDemangling.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64SchedA64FX.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrArithmetic.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/TargetParser/ARMTargetParserCommon.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
A llvm/test/Analysis/ValueTracking/pr75505.ll
M llvm/test/CodeGen/AArch64/aarch64-minmaxv.ll
M llvm/test/CodeGen/AArch64/aarch64-mulv.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/arm64-addrmode.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
A llvm/test/CodeGen/AArch64/large-offset-ldr-merge.mir
M llvm/test/CodeGen/AArch64/reduce-and.ll
M llvm/test/CodeGen/AArch64/reduce-or.ll
M llvm/test/CodeGen/AArch64/reduce-xor.ll
M llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-intrinsics-with-veclib-sleef-scalable.ll
M llvm/test/CodeGen/AArch64/sext.ll
A llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/test/CodeGen/AArch64/vecreduce-umax-legalization.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AArch64/zext.ll
M llvm/test/CodeGen/AMDGPU/gds-unsupported.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
A llvm/test/CodeGen/AMDGPU/verify-gfx12-gds.mir
M llvm/test/CodeGen/PowerPC/aix-return55.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
A llvm/test/CodeGen/RISCV/vp-splice-fixed-vectors.ll
A llvm/test/CodeGen/RISCV/vp-splice-mask-fixed-vectors.ll
A llvm/test/CodeGen/RISCV/vp-splice-mask-vectors.ll
A llvm/test/CodeGen/RISCV/vp-splice.ll
M llvm/test/CodeGen/SystemZ/atomic-load-05.ll
M llvm/test/CodeGen/SystemZ/atomic-load-08.ll
M llvm/test/CodeGen/SystemZ/atomic-store-05.ll
M llvm/test/CodeGen/SystemZ/atomic-store-06.ll
M llvm/test/CodeGen/SystemZ/atomic-store-07.ll
M llvm/test/CodeGen/SystemZ/atomic-store-08.ll
M llvm/test/CodeGen/X86/code-model-elf-sections.ll
M llvm/test/CodeGen/X86/code-model-elf.ll
M llvm/test/CodeGen/X86/fast-isel-large-object.ll
M llvm/test/CodeGen/X86/fold-add.ll
A llvm/test/CodeGen/X86/insert.ll
A llvm/test/MC/AArch64/armv9.5a-pauthlr-diagnostics.s
A llvm/test/MC/AArch64/armv9.5a-pauthlr-reloc.s
A llvm/test/MC/AArch64/armv9.5a-pauthlr.s
A llvm/test/MC/AMDGPU/gfx12_asm_features.s
A llvm/test/MC/Disassembler/AArch64/armv9.5a-pauthlr.txt
M llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
M llvm/test/MC/WebAssembly/custom-sections.ll
M llvm/test/MC/WebAssembly/debug-info.ll
M llvm/test/MC/WebAssembly/debug-info64.ll
M llvm/test/MC/WebAssembly/tag-section.ll
M llvm/test/Transforms/ConstraintElimination/and-implied-by-operands.ll
M llvm/test/Transforms/CorrelatedValuePropagation/cond-at-use.ll
M llvm/test/Transforms/InstCombine/array.ll
A llvm/test/Transforms/InstCombine/commutative-operation-over-phis.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/mul-inseltpoison.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll
A llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands2.ll
M llvm/test/tools/llvm-readobj/wasm/globals.test
M llvm/test/tools/llvm-readobj/wasm/sections.test
M llvm/test/tools/llvm-readtapi/stubify-invalid.test
M llvm/tools/llvm-objdump/XCOFFDump.cpp
M llvm/tools/llvm-objdump/XCOFFDump.h
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/TextAPI/BUILD.gn
A llvm/utils/gn/secondary/llvm/lib/TextAPI/BinaryReader/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
M mlir/include/mlir/Transforms/FoldUtils.h
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/lib/Transforms/SCCP.cpp
M mlir/lib/Transforms/Utils/FoldUtils.cpp
M mlir/python/CMakeLists.txt
M mlir/python/mlir/dialects/arith.py
M mlir/python/mlir/dialects/builtin.py
M mlir/python/mlir/dialects/func.py
M mlir/python/mlir/dialects/pdl.py
M mlir/python/mlir/dialects/scf.py
M mlir/python/mlir/dialects/tensor.py
M mlir/python/mlir/dialects/transform/__init__.py
M mlir/python/mlir/dialects/transform/extras/__init__.py
A mlir/python/mlir/extras/meta.py
M mlir/test/Conversion/GPUToSPIRV/reductions.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
M mlir/test/Dialect/Transform/test-pattern-application.mlir
M mlir/test/Dialect/Vector/fold-arith-extf-into-vector-contract.mlir
A mlir/test/Dialect/Vector/vector-contract-to-outerproduct-matmul-transforms.mlir
M mlir/test/Dialect/Vector/vector-contract-to-outerproduct-matvec-transforms.mlir
R mlir/test/Dialect/Vector/vector-contract-to-outerproduct-transforms.mlir
A mlir/test/Transforms/canonicalize-debuginfo.mlir
A mlir/test/Transforms/constant-fold-debuginfo.mlir
M mlir/test/lib/Analysis/TestDataFlowFramework.cpp
M mlir/test/lib/Transforms/TestIntRangeInference.cpp
M mlir/test/python/dialects/arith_dialect.py
M mlir/test/python/dialects/tensor.py
M mlir/test/python/dialects/transform_extras.py
A mlir/test/python/integration/dialects/transform.py
M mlir/test/python/ir/context_lifecycle.py
M mlir/test/python/ir/operation.py
M openmp/libomptarget/CMakeLists.txt
M openmp/libomptarget/test/lit.cfg
M openmp/libomptarget/test/offloading/fortran/basic-target-region-1D-array-section.f90
M openmp/libomptarget/test/offloading/fortran/basic-target-region-3D-array-section.f90
M openmp/libomptarget/test/offloading/fortran/basic-target-region-3D-array.f90
M openmp/libomptarget/test/offloading/fortran/basic_target_region.f90
M openmp/libomptarget/test/offloading/fortran/constant-arr-index.f90
M openmp/libomptarget/test/offloading/fortran/declare-target-array-in-target-region.f90
M openmp/libomptarget/test/offloading/fortran/double-target-call-with-declare-target.f90
M openmp/libomptarget/test/offloading/fortran/target-region-implicit-array.f90
M openmp/libomptarget/test/offloading/fortran/target_map_common_block.f90
M openmp/libomptarget/test/offloading/fortran/target_map_common_block2.f90
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/f49db9f6a3db...529096d9f325
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