[all-commits] [llvm/llvm-project] f72b65: [MC][x86] Allow non-MCTargetExpr RHS when the LHS ...

[Chenyang Gao via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f72b65499156171eca25ad0e7becb274347c7c02
      https://github.com/llvm/llvm-project/commit/f72b65499156171eca25ad0e7becb274347c7c02
  Author: Chenyang Gao <cygao09 at gmail.com>
  Date:   2023-12-20 (Wed, 20 Dec 2023)

  Changed paths:
    M llvm/lib/MC/MCExpr.cpp
    A llvm/test/MC/X86/register-assignment-error.s

  Log Message:
  -----------
  [MC][x86] Allow non-MCTargetExpr RHS when the LHS of a MCBinaryExpr is MCTargetExpr (#75693)

This fixes #73109.
In instruction `addl %eax %rax`, because there is a missing comma in the
middle of two registers, the asm parser will treat it as a binary
expression.
```
%rax  %  rax --> register mod identifier
```
However, In `MCExpr::evaluateAsRelocatableImpl`, it only checks the left
side of the expression. This patch ensures the right side will also be
checked.