[all-commits] [llvm/llvm-project] 23d402: [ELF] IWYU <optional> NFC
Jon Roelofs via All-commits
all-commits at lists.llvm.org
Fri Dec 8 13:18:52 PST 2023
Branch: refs/heads/users/jroelofs/spr/clang-function-multi-versioning-supports-ifunc-lowerings-on-darwin-platforms
Home: https://github.com/llvm/llvm-project
Commit: 23d402e5b705d98463150302a55623951284b5f2
https://github.com/llvm/llvm-project/commit/23d402e5b705d98463150302a55623951284b5f2
Author: Fangrui Song <i at maskray.me>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M lld/ELF/DWARF.h
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] IWYU <optional> NFC
Commit: 77f5b33c462459906980ebcd724987679be75078
https://github.com/llvm/llvm-project/commit/77f5b33c462459906980ebcd724987679be75078
Author: Matthias Springer <me at m-sp.org>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/test/Dialect/SCF/canonicalize.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][SCF] Retire SCF-specific `to_memref`/`to_tensor` canonicalization patterns (#74551)
The partial bufferization framework has been replaced with One-Shot
Bufferize. SCF-specific canonicalization patterns for
`to_memref`/`to_tensor` are no longer needed.
Commit: 61329bdddd9cb155b4902fd7fa4a2367e796d51a
https://github.com/llvm/llvm-project/commit/61329bdddd9cb155b4902fd7fa4a2367e796d51a
Author: Justin Bogner <mail at justinbogner.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/pch.hlsl
M clang/test/AST/HLSL/pch_with_buf.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
Log Message:
-----------
[HLSL] RWBuffer<T> should not have a default parameter
RWBuffer doesn't have a default type in dxc's implementation, so it
shouldn't have one in clang either.
Reviewers: llvm-beanz, python3kgae
Reviewed By: python3kgae, llvm-beanz
Pull Request: https://github.com/llvm/llvm-project/pull/71265
Commit: 6016455d8810f5b19a275f3a149ab523f1821fb3
https://github.com/llvm/llvm-project/commit/6016455d8810f5b19a275f3a149ab523f1821fb3
Author: Lang Hames <lhames at gmail.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
Log Message:
-----------
[JITLink][aarch64] Pointer jump stubs should have 4-byte alignment.
Pointer jump stubs content was incorrectly using 1-byte alignment. This bug
flew under the radar because the ordinary instruction streams (and aligned
section starts) usually left the block 4-byte aligned anyway. The bug was
observed when an out-of-tree pass introduced new content with arbitrary sizes
into the text section.
No testcase yet: We don't have a good way to replicate the perturbation that
was caused by the out-of-tree pass.
Commit: 75f6cad8e981f017c7332bea26af6b093b4b65a9
https://github.com/llvm/llvm-project/commit/75f6cad8e981f017c7332bea26af6b093b4b65a9
Author: Matthias Springer <me at m-sp.org>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
R mlir/test/Dialect/Tensor/invalid-canonicalize.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][tensor] `tensor.generate`: do not verify dynamic sizes (#74568)
Op verifiers should verify only local properties of an op. The dynamic
sizes of a `tensor.generate` op should not be verified. Dynamic sizes
that have a negative constant value should not prevent the
`tensor.generate` op from verifying.
Also share some code between the `tensor.empty` and `tensor.generate`
"dynamic dim -> static dim" canonicalization patterns.
Remove the `invalid-canonicalize.mlir` file and move the test case to
`canonicalize.mlir`. Canonicalization no longer produces IR that does
not verify (and leaves the op as is).
Commit: 36e4cb7986da455342dfd535b659640ab0692340
https://github.com/llvm/llvm-project/commit/36e4cb7986da455342dfd535b659640ab0692340
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M clang/test/Driver/clang-offload-bundler-zlib.c
M clang/test/Driver/clang-offload-bundler-zstd.c
Log Message:
-----------
Fix tests clang-offload-bundler-zlib/zstd.c (#74504)
The test fails intermittently due to non-unique file name %T.
Use %t based file names instead.
Fixes: https://github.com/llvm/llvm-project/issues/74472
Commit: 851f85fffb25143c267dcdbf6acd1916321ad308
https://github.com/llvm/llvm-project/commit/851f85fffb25143c267dcdbf6acd1916321ad308
Author: Matthias Springer <me at m-sp.org>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
Log Message:
-----------
[mlir][SparseTensor] Fix insertion point in `createQuickSort` (#74549)
`createQuickSort` used to generate invalid IR:
```
"func.func"() <{function_type = (index, index, memref<?xindex>, memref<?xf32>, memref<?xi32>) -> (), sym_name = "_sparse_qsort_0_1_index_coo_1_f32_i32", sym_visibility = "private"}> ({
^bb0(%arg0: index, %arg1: index, %arg2: memref<?xindex>, %arg3: memref<?xf32>, %arg4: memref<?xi32>):
%0:2 = "scf.while"(%arg0, %arg1) ({
^bb0(%arg5: index, %arg6: index):
// ...
"scf.condition"(%3, %arg5, %arg6) : (i1, index, index) -> ()
}, {
^bb0(%arg5: index, %arg6: index):
// ...
%7:2 = "scf.if"(%6) ({
%8 = "arith.cmpi"(%2, %3) <{predicate = 7 : i64}> : (index, index) -> i1
// ...
"scf.yield"(%9#0, %9#1) : (index, index) -> ()
%10 = "arith.constant"() <{value = 0 : index}> : () -> index
}, {
"scf.yield"(%arg5, %arg5) : (index, index) -> ()
}) : (i1) -> (index, index)
"scf.yield"(%7#0, %7#1) : (index, index) -> ()
}) : (index, index) -> (index, index)
"func.return"() : () -> ()
}) : () -> ()
within split at mlir/test/Dialect/SparseTensor/buffer_rewriting.mlir:76 offset :11:1: error: 'scf.yield' op must be the last operation in the parent block
```
This commit fixes tests such as
`mlir/test/Dialect/SparseTensor/buffer_rewriting.mlir` when verifying
the IR after each pattern application (#74270).
Commit: 861600f1751b1a7e84cd99dd79361569542e9c1a
https://github.com/llvm/llvm-project/commit/861600f1751b1a7e84cd99dd79361569542e9c1a
Author: Matthias Springer <me at m-sp.org>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
Log Message:
-----------
[mlir][SparseTensor] Fix invalid IR in `ForallRewriter` pattern (#74547)
The `ForallRewriter` pattern used to generate invalid IR:
```
mlir/test/Dialect/SparseTensor/GPU/gpu_combi.mlir:0:0: error: 'scf.for' op expects region #0 to have 0 or 1 blocks
mlir/test/Dialect/SparseTensor/GPU/gpu_combi.mlir:0:0: note: see current operation:
"scf.for"(%8, %2, %9) ({
^bb0(%arg5: index):
// ...
"scf.yield"() : () -> ()
^bb1(%10: index): // no predecessors
"scf.yield"() : () -> ()
}) : (index, index, index) -> ()
```
This commit fixes tests such as
`mlir/test/Dialect/SparseTensor/GPU/gpu_combi.mlir` when verifying the
IR after each pattern application (#74270).
Commit: 78e2b74f967b4c06490382d08994645b61ce4990
https://github.com/llvm/llvm-project/commit/78e2b74f967b4c06490382d08994645b61ce4990
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.cpp
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d.mlir
Log Message:
-----------
[mlir][sparse] fix bugs when generate sparse conv_3d kernels. (#74561)
Commit: 13b88265088329decd15449e3b2461a6177174b2
https://github.com/llvm/llvm-project/commit/13b88265088329decd15449e3b2461a6177174b2
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M openmp/libomptarget/include/PluginManager.h
M openmp/libomptarget/src/interface.cpp
M openmp/libomptarget/src/rtl.cpp
R openmp/libomptarget/test/Inputs/empty.c
R openmp/libomptarget/test/offloading/bug60119.c
Log Message:
-----------
Revert " [OpenMP][NFC] Remove `DelayedBinDesc`" (#74679)
Reverts llvm/llvm-project#74360
As I wrote in the analysis of #74360:
Since
https://github.com/llvm/llvm-project/commit/bc4e0c048aa3cd940b0cea787014c7e8680e5040
we will not add PluginAdaptors into the container of all plugin adaptors
before the plugin is not ready. The error is thereby gone. When and old
HSA loads other libraries they can call register_image but that will
simply not register the image with the plugin we are currently
initializing. That seems like reasonable behavior, thought it is good to
keep in mind if we ever want a kernel library (@jhuber6 @mjklemm). We
can still have a standalone kernel library though or load it late after
all plugins are setup (which seems reasonable).
I did not expect one our tests actually doing exactly what this will not
allow anymore, at least when you use rocm <5.5.0. Need to figure out if
we want this behavior (for rocm <5.5.0).
Commit: e1a4b0032f89355da94a5505bf308ab12668b1b0
https://github.com/llvm/llvm-project/commit/e1a4b0032f89355da94a5505bf308ab12668b1b0
Author: Owen Pan <owenpiano at gmail.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
Log Message:
-----------
[clang-format] Handle merging functions containing only a block comment (#74651)
Fixed #41854.
Commit: c28178298513f99dc869daa301fc25257df81688
https://github.com/llvm/llvm-project/commit/c28178298513f99dc869daa301fc25257df81688
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaStmt.cpp
A clang/test/Sema/switch-default.c
Log Message:
-----------
[clang][Sema] Add -Wswitch-default warning option (#73077)
Adds a warning, issued by the clang semantic analysis. The patch warns
on switch which don't have the default branch.
This is a counterpart of gcc's Wswitch-default.
Commit: b310932f8710ed7a61d23f90a9952cc52d255eeb
https://github.com/llvm/llvm-project/commit/b310932f8710ed7a61d23f90a9952cc52d255eeb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/sextw-removal.ll
Log Message:
-----------
[RISCV] Add vmv.x.s to RISCVOptWInstrs. (#74519)
This instruction produces a 32-bit sign extended value if the SEW is less than or
equal to 32.
Commit: fed4e3a6eb5d04856169951347892d983695f86a
https://github.com/llvm/llvm-project/commit/fed4e3a6eb5d04856169951347892d983695f86a
Author: antangelo <contact at antangelo.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
A clang/test/SemaTemplate/GH71595.cpp
Log Message:
-----------
[clang] Exclude non-template classes when checking if constraint refers to containing template arguments (#74265)
When checking if the constraint uses any enclosing template parameters
for [temp.friend]p9, if a containing record is used as argument, we
assume that the constraint depends on enclosing template parameters
without checking if the record is templated. The reproducer from the bug
is included as a test case.
Fixes #71595
Commit: c6dc9cd1fbfcb47aa193f16cb02b97876643e1fe
https://github.com/llvm/llvm-project/commit/c6dc9cd1fbfcb47aa193f16cb02b97876643e1fe
Author: Matthias Springer <springerm at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/CMakeLists.txt
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
Log Message:
-----------
[mlir] Fix build after 77f5b33c
Commit: b683709ea6eec7d0a388bd50c571774c9b9ffdb7
https://github.com/llvm/llvm-project/commit/b683709ea6eec7d0a388bd50c571774c9b9ffdb7
Author: Owen Pan <owenpiano at gmail.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
Log Message:
-----------
[clang-format] Fix a possible crash in `AlignAfterOpenBracket: BlockIndent`
Commit: 1612993788c3d8049f1e43a6f48ea3264f8a434f
https://github.com/llvm/llvm-project/commit/1612993788c3d8049f1e43a6f48ea3264f8a434f
Author: Matthias Springer <me at m-sp.org>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
M mlir/lib/Dialect/Complex/IR/ComplexOps.cpp
M mlir/test/Dialect/Complex/ops.mlir
Log Message:
-----------
[mlir][complex] Allow integer element types in `complex.constant` ops (#74564)
The op used to support only float element types. This was inconsistent
with `ConstantOp::isBuildableWith`, which allows integer element types.
The complex type allows any float/integer element type.
Note: The other complex dialect ops do not support non-float element
types yet. The main purpose of this change to fix
`Tensor/canonicalize.mlir`, which is currently failing when verifying
the IR after each pattern application (#74270).
```
within split at mlir/test/Dialect/Tensor/canonicalize.mlir:231 offset :8:15: error: 'complex.constant' op result #0 must be complex type with floating-point elements, but got 'complex<i32>'
%complex1 = tensor.extract %c1[] : tensor<complex<i32>>
^
within split at mlir/test/Dialect/Tensor/canonicalize.mlir:231 offset :8:15: note: see current operation: %0 = "complex.constant"() <{value = [1 : i32, 2 : i32]}> : () -> complex<i32>
"func.func"() <{function_type = () -> tensor<3xcomplex<i32>>, sym_name = "extract_from_elements_complex_i"}> ({
%0 = "complex.constant"() <{value = [1 : i32, 2 : i32]}> : () -> complex<i32>
%1 = "arith.constant"() <{value = dense<(3,2)> : tensor<complex<i32>>}> : () -> tensor<complex<i32>>
%2 = "arith.constant"() <{value = dense<(1,2)> : tensor<complex<i32>>}> : () -> tensor<complex<i32>>
%3 = "tensor.extract"(%1) : (tensor<complex<i32>>) -> complex<i32>
%4 = "tensor.from_elements"(%0, %3, %0) : (complex<i32>, complex<i32>, complex<i32>) -> tensor<3xcomplex<i32>>
"func.return"(%4) : (tensor<3xcomplex<i32>>) -> ()
}) : () -> ()
```
Commit: 9e03468bc0a9b64b5b82c926ded767468ccd4fb7
https://github.com/llvm/llvm-project/commit/9e03468bc0a9b64b5b82c926ded767468ccd4fb7
Author: Jianjian GUAN <jacquesguan at me.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M .mailmap
Log Message:
-----------
[mailmap] Add my entry
Commit: cdd81e3be3df65a966879abef590e36f73e7dea6
https://github.com/llvm/llvm-project/commit/cdd81e3be3df65a966879abef590e36f73e7dea6
Author: XinWang10 <108658776+XinWang10 at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrSystem.td
M llvm/lib/Target/X86/X86InstrUtils.td
A llvm/test/MC/Disassembler/X86/apx/invpcid.txt
A llvm/test/MC/X86/apx/invpcid-att.s
A llvm/test/MC/X86/apx/invpcid-intel.s
Log Message:
-----------
[X86][MC] Support Enc/Dec for EGPR for promoted INVPCID instruction (#74548)
R16-R31 was added into GPRs in
https://github.com/llvm/llvm-project/pull/70958,
This patch supports the encoding/decoding for promoted INVPCID
instruction in EVEX space.
RFC:
https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
Commit: 986287e7f38321165c0c654f3af06e34af7b161f
https://github.com/llvm/llvm-project/commit/986287e7f38321165c0c654f3af06e34af7b161f
Author: Matthias Springer <me at m-sp.org>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
Log Message:
-----------
[mlir][SparseTensor] Fix invalid API usage in patterns (#74690)
Rewrite patterns must return `success` if the IR was modified. This
commit fixes sparse tensor tests such as
`SparseTensor/sparse_fusion.mlir`,
`SparseTensor/CPU/sparse_reduce_custom.mlir`,
`SparseTensor/CPU/sparse_semiring_select.mlir` when running with
`MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS`.
Commit: 0e3faa20c467e6cd62423b22cf8650c6aa2628ba
https://github.com/llvm/llvm-project/commit/0e3faa20c467e6cd62423b22cf8650c6aa2628ba
Author: Esme <esme.yi at ibm.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/Object/XCOFFObjectFile.h
M llvm/lib/ObjectYAML/XCOFFYAML.cpp
M llvm/test/tools/obj2yaml/XCOFF/aix.yaml
A llvm/test/tools/obj2yaml/XCOFF/aux-symbols.yaml
M llvm/tools/obj2yaml/xcoff2yaml.cpp
Log Message:
-----------
[XCOFF][obj2yaml] support parsing auxiliary symbols for XCOFF (#70642)
This PR adds the support for parsing auxiliary symbols of XCOFF object
file for obj2yaml.
Commit: 4b932d84f48e0f3f42c769a5ca7ce6623ab62f2e
https://github.com/llvm/llvm-project/commit/4b932d84f48e0f3f42c769a5ca7ce6623ab62f2e
Author: Chen Zheng <czhengsz at cn.ibm.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
M llvm/test/CodeGen/PowerPC/aix-tls-gd-target-flags.ll
M llvm/test/CodeGen/PowerPC/ctrloops-pseudo.ll
M llvm/test/CodeGen/PowerPC/tls-crash.mir
Log Message:
-----------
[PowerPC] redesign the target flags (#69695)
12 bit is not enough for PPC's target specific flags. If 8 bit for the
bitmask flags, 4 bit for the direct mask, PPC can total have 16 direct
mask and 8 bitmask. Not enough for PPC, see this issue in
https://github.com/llvm/llvm-project/pull/66316
Redesign how PPC target set the target specific flags. With this patch,
all ppc target flags are direct flags. No bitmask flag in PPC anymore.
This patch aligns with some targets like X86 which also has many target
specific flags.
The patch also fixes a bug related to flag `MO_TLSGDM_FLAG` and `MO_LO`.
They are the same value and the test case changes in this PR shows the
bug.
Commit: 185302530847a28f44e48a67a79fd4eba048a1c7
https://github.com/llvm/llvm-project/commit/185302530847a28f44e48a67a79fd4eba048a1c7
Author: Maksim Panchenko <maks at fb.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M libcxxabi/src/cxa_personality.cpp
A libcxxabi/test/native/x86_64/lpstart-zero.pass.sh.s
Log Message:
-----------
[libc++abi] Fix lpStart adjustment for exceptions table (#72727)
When lpStartEncoding is different from DW_EH_PE_omit, lpStart can be set
to zero which is a valid base address for landing pads. Such base value
is useful when landing pads are placed in different sections.
Fixes #72582.
Commit: 2a951d78df633f2100a91b556f675efb4fec568b
https://github.com/llvm/llvm-project/commit/2a951d78df633f2100a91b556f675efb4fec568b
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrVMX.td
Log Message:
-----------
[X86][NFC] Reuse class EVEX_NoCD8 that is defined in #74548
Commit: e0e827c9378c785a1005d2756181b9e572369bce
https://github.com/llvm/llvm-project/commit/e0e827c9378c785a1005d2756181b9e572369bce
Author: Tobias Burnus <tobias at codesourcery.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M compiler-rt/lib/asan/asan_mac.cpp
Log Message:
-----------
[asan][Darwin] Use Apples blocks extension only when supported (#72639) (#72642)
Issue #72639
The commit at 020cdaf broke build of asan on macOS with GCC. GCC does
not support the Apple blocks extension (yet). Uses of blocks in other
parts of the sanitisers are protected by MISSING_BLOCKS_SUPPORT. But the
type definition is not.
_This applies FX's patch from the issue._
Co-authored-by: FX Coudert <fxcoudert at gmail.com>
Commit: 6c39ab90524ee791b0c6adaf8a305bf68ed4cd7f
https://github.com/llvm/llvm-project/commit/6c39ab90524ee791b0c6adaf8a305bf68ed4cd7f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-06 (Wed, 06 Dec 2023)
Changed paths:
M clang/include/clang/Driver/Multilib.h
M clang/lib/Driver/Multilib.cpp
Log Message:
-----------
[Driver] Use SmallVectorImpl reference instead of SmallVector reference in MultilibSet. NFC
We prefer to pass SmallVectorImpl reference so that no specific
inline size is required.
Commit: 0c17f436551b4bca46e465fbb0225031c7b63956
https://github.com/llvm/llvm-project/commit/0c17f436551b4bca46e465fbb0225031c7b63956
Author: Jacob Yu <pingshiyu at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
Log Message:
-----------
[mlir][arith] Overflow semantics in documentation for muli, subi, and addi (#74346)
Following discussions from this RFC:
https://discourse.llvm.org/t/rfc-integer-overflow-semantics
Adding the overflow semantics into the muli, subi and addi arith
operations.
Commit: fc42a2f5c41a735b1e3bcf3f2f2d7340eeaa0218
https://github.com/llvm/llvm-project/commit/fc42a2f5c41a735b1e3bcf3f2f2d7340eeaa0218
Author: esmeyi <esme.yi at ibm.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/Object/XCOFFObjectFile.h
M llvm/lib/ObjectYAML/XCOFFYAML.cpp
M llvm/test/tools/obj2yaml/XCOFF/aix.yaml
R llvm/test/tools/obj2yaml/XCOFF/aux-symbols.yaml
M llvm/tools/obj2yaml/xcoff2yaml.cpp
Log Message:
-----------
Revert "[XCOFF][obj2yaml] support parsing auxiliary symbols for XCOFF (#70642)"
This reverts commit 0e3faa20c467e6cd62423b22cf8650c6aa2628ba.
Due to a sanitizer error in https://lab.llvm.org/buildbot/#/builders/5/builds/39023.
Will be re-landed after repairs and thorough testing.
Commit: 04ce9a34ea82647a61b4e2a2a3cc5c93cc2f0d7d
https://github.com/llvm/llvm-project/commit/04ce9a34ea82647a61b4e2a2a3cc5c93cc2f0d7d
Author: Clement Courbet <courbet at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.h
Log Message:
-----------
[clang-tidy] performance-unnecessary-copy-init: Add a hook... (#73921)
... so that derived checks can can observe for which
variables a warning has been emitted. Does nothing by default, which
makes this an NFC.
Commit: f1963fde9f8be49454d827d72b83ee8aaa78a9cc
https://github.com/llvm/llvm-project/commit/f1963fde9f8be49454d827d72b83ee8aaa78a9cc
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/tools/llvm-exegesis/X86/latency/memory-annotations-unsupported.s
A llvm/test/tools/llvm-exegesis/X86/latency/snippet-address-annotations-unsupported.s
A llvm/test/tools/llvm-exegesis/X86/latency/subprocess-address-annotation.s
M llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/unittests/tools/llvm-exegesis/X86/SnippetFileTest.cpp
Log Message:
-----------
Reland "[llvm-exegesis] Add in snippet address annotation (#74218)"
This reverts commit 30d700117b772d94d8474ec56bd6f9cc423fc613.
This relands commit 3ab41f912a6c219a93b87c257139822ea07c8863.
When I was updating the patch to use llvm::to_integer, I only ran the
lit tests and didn't run the unit tests, one of which started to fail.
This patch fixes the broken unit test.
Commit: 39ba027f4e52175c48da87e2dc2956d23b27e953
https://github.com/llvm/llvm-project/commit/39ba027f4e52175c48da87e2dc2956d23b27e953
Author: Fangrui Song <i at maskray.me>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
A llvm/test/CodeGen/RISCV/relax-per-target-feature.ll
Log Message:
-----------
[RISCV,test] Test whether MCAssembler uses function target-features
Test https://discourse.llvm.org/t/possible-problem-related-to-subtarget-usage/75283
The test is similar to ARM/relax-per-target-feature.ll in spirit.
Commit: 39ac5eecbbd7c45436fab4569aee82cc74411c53
https://github.com/llvm/llvm-project/commit/39ac5eecbbd7c45436fab4569aee82cc74411c53
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang][AMDGPU] Update amdgpu_waves_per_eu attr docs (#74587)
Commit: c4399130ae403acf4e6325b8b46a51bb6abf222f
https://github.com/llvm/llvm-project/commit/c4399130ae403acf4e6325b8b46a51bb6abf222f
Author: Pablo Antonio Martinez <pablo.antonio.martinez at huawei.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/transform-op-match.mlir
Log Message:
-----------
[MLIR][Transform] Add attribute in MatchOp to filter by operand type (#67994)
This patchs adds the `filter_operand_types` attribute to transform::MatchOp, allowing to filter ops depending on their operand types.
Commit: 3acbd38492c394dec32ccde3f11885e5b59d5aa9
https://github.com/llvm/llvm-project/commit/3acbd38492c394dec32ccde3f11885e5b59d5aa9
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/cmp-select-sign.ll
M llvm/test/CodeGen/AArch64/dag-numsignbits.ll
M llvm/test/CodeGen/AArch64/signbit-shift.ll
M llvm/test/CodeGen/AArch64/vselect-ext.ll
Log Message:
-----------
[AArch64] Optimise MOVI + CMGT to CMGE (#74499)
This fixes a regression that occured for a pattern of MOVI + CMGT
instructions, which can be optimised to CMGE. I.e., when the signed
greater than compare has -1 as an operand, we can rewrite that as a
compare greater equal than 0, which is what CMGE does.
Fixes #61836
Commit: fc791b61272322d72238533dccadd9564e117894
https://github.com/llvm/llvm-project/commit/fc791b61272322d72238533dccadd9564e117894
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.h
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
[llvm-exegesis] Add option to specify the number of measurement repetitions (#74276)
Currently, the llvm-exegesis LatencyBenchmarkRunner repeats the
benchmark several times (currently 30) and then aggregates the result to
deal with noise in the measurement process. With this patch, the number
of repetitions to perform is made configurable rather than left as a
static number. This allows for significantly faster execution in
situations where someone is performing a task like experimenting with
memory annotations where the exact cycle counts might not be useful, and
also allows for increased precision when desired.
Commit: 54b6bc42aa84042b1e0e9b213aecaec340d1a682
https://github.com/llvm/llvm-project/commit/54b6bc42aa84042b1e0e9b213aecaec340d1a682
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter.td
M llvm/utils/TableGen/GlobalISelMatchTable.cpp
Log Message:
-----------
[TableGen][GlobalISel] Emit Comment with MatchTable Size (#74701)
Commit: e462937173e7879d26c86595f234164d2ca397e7
https://github.com/llvm/llvm-project/commit/e462937173e7879d26c86595f234164d2ca397e7
Author: esmeyi <esme.yi at ibm.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/Object/XCOFFObjectFile.h
M llvm/lib/ObjectYAML/XCOFFYAML.cpp
M llvm/test/tools/obj2yaml/XCOFF/aix.yaml
A llvm/test/tools/obj2yaml/XCOFF/aux-symbols.yaml
M llvm/tools/obj2yaml/xcoff2yaml.cpp
Log Message:
-----------
Reland "[XCOFF][obj2yaml] support parsing auxiliary symbols for XCOFF (#70642)"
This PR adds the support for parsing auxiliary symbols of XCOFF object file for obj2yaml.
The sanitizer error is clean now.
Commit: 5058d738bae15d88acc3d2977c713f43f09cb7a8
https://github.com/llvm/llvm-project/commit/5058d738bae15d88acc3d2977c713f43f09cb7a8
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
Log Message:
-----------
[llvm-exegesis] Add MAP_FIXED_NOREPLACE definiton
MAP_FIXED_NOREPLACE doesn't exist on older kernels, so we need to define
it to be MAP_FIXED.
Commit: b499466361b6a27fad873431a9b7e529e39e73e6
https://github.com/llvm/llvm-project/commit/b499466361b6a27fad873431a9b7e529e39e73e6
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/aarch64-outliner.c
Log Message:
-----------
[Driver][MachineOutliner] Support -moutline option for aarch64_be (#73223)
This patch propagates the -moutline flag when target is aarch64_be,
fix warning: 'aarch64_be' does not support '-moutline'; flag ignored
[-Woption-ignored]
Commit: b768b393429419d27e3f76518842136bac9d5b25
https://github.com/llvm/llvm-project/commit/b768b393429419d27e3f76518842136bac9d5b25
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/include/clang/Frontend/FrontendActions.h
M clang/lib/Frontend/FrontendActions.cpp
Log Message:
-----------
[C++20] [Modules] Skip Writing diagnostic options, header search paths and pragma diagnostic mappings
It simply wastes of space and time to write diagnostic options, header
search paths and pragma diagnostic mappings for C++20 Named modules.
This patch tries to avoid the unnecessary writings.
Commit: e4c7ee3c4418c1558c3a1c7337f031717ac100dd
https://github.com/llvm/llvm-project/commit/e4c7ee3c4418c1558c3a1c7337f031717ac100dd
Author: DonatNagyE <donat.nagy at ericsson.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BitwiseShiftChecker.cpp
Log Message:
-----------
[analyzer][NFC] Simplify BugType handling in core.BitwiseShift (#74609)
Eliminate the `mutable unique_ptr` hack because it's no longer needed.
(This cleanup could be done anywhere, I'm doing it here now because it
was me who published this checker with the old hack when it was already
superfluous.)
Commit: 9e8a7377421a13d06e496eaa9dca900e189e3d69
https://github.com/llvm/llvm-project/commit/9e8a7377421a13d06e496eaa9dca900e189e3d69
Author: Rik Huijzer <github at huijzer.xyz>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/IR/BuiltinLocationAttributes.td
M mlir/include/mlir/IR/BuiltinTypes.td
Log Message:
-----------
[mlir][doc] Fix reported Builtin (syntax) issues (#74635)
Fixes https://github.com/llvm/llvm-project/issues/62489.
Some notes for each number:
- 1 `bool-literal` should be reasonably clear from context.
- 2 Fixed.
- 3 This is now fixed. `loc(fused[])` is valid, but `loc(fused["foo",])`
is not.
- 4 This operation uses `assemblyFormat` so the syntax is correct
(assuming ODS is correct).
- 5 This operation uses `assemblyFormat` so the syntax is correct
(assuming ODS is correct).
- 6 Added an example.
- 7 The suggested fix is in line with other `assemblyFormat` examples.
- 8 Added syntax and an example.
- 9 I don't know what this is referring too.
- 10 Added example.
- 11 and 12 suggestion seems wrong as the `ShapedTypeInterface` could be
extended by clients, so is not limited to tensors or vectors.
- 13 is already reasonably clear with the example, I think.
- 14 is already reasonably clear with the example, I think.
- 15 Added an example from the `opaque_locations.mlir` tests.
- 16 The answer to this seems to change over time and depend on the use
case? Suggestions by reviewers are welcome.
Commit: 10879403e56b0ba4fde4676ed20ae658d32e3356
https://github.com/llvm/llvm-project/commit/10879403e56b0ba4fde4676ed20ae658d32e3356
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/transform-op-match.mlir
Log Message:
-----------
Revert "[MLIR][Transform] Add attribute in MatchOp to filter by operand type (#67994)"
This reverts commit c4399130ae403acf4e6325b8b46a51bb6abf222f.
Test fails https://lab.llvm.org/buildbot/#/builders/272/builds/2757
Commit: 753c51bf889e605a2daf92e1710d7ad5ebc76ec3
https://github.com/llvm/llvm-project/commit/753c51bf889e605a2daf92e1710d7ad5ebc76ec3
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/test/Transforms/LICM/pr64897.ll
Log Message:
-----------
[AST] Fix size merging for MustAlias sets (#73820)
AST checks aliasing with MustAlias sets by only checking the
representative pointer (getSomePointer). This is only correct if the
Size and AATags information of that pointer also includes the
Size/AATags of all other pointers in the set.
When we add a new pointer to the AliasSet, we do perform this update
(see the code in AliasSet::addPointer). However, if a pointer already in
the MustAlias set is used with a new size, we currently do not update
the representative pointer, resulting in miscompilations. Fix this by
adding the missing update.
This is a targeted fix using the current representation. There are a
couple of alternatives:
* For MustAlias sets, don't store per-pointer Size/AATags at all. This
would make it clear that there is only one set of common Size/AATags for
all pointers.
* Check against all pointers in the set even for MustAlias. This is what
https://github.com/llvm/llvm-project/pull/65731 proposes to do as part
of a larger change to AST representation.
Fixes https://github.com/llvm/llvm-project/issues/64897.
Commit: 7c85fcb2aab8e38c97eb99743d4e042921d219d1
https://github.com/llvm/llvm-project/commit/7c85fcb2aab8e38c97eb99743d4e042921d219d1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
Log Message:
-----------
AMDGPU: Make llvm.amdgcn.endpgm convergent (#74555)
I don't believe this makes any practical difference.
Fixes #64013
Commit: 44ff904d21ff8b0d559b93f070a7e4ee06228085
https://github.com/llvm/llvm-project/commit/44ff904d21ff8b0d559b93f070a7e4ee06228085
Author: Jay Foad <jay.foad at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/EXPInstructions.td
M llvm/test/MC/AMDGPU/exp.s
A llvm/test/MC/AMDGPU/gfx12_asm_exp.s
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_exp.txt
Log Message:
-----------
[AMDGPU] Add VEXPORT encoding for GFX12 (#74615)
In GFX12 the exp instruction is renamed to export, but exp is still
accepted as an alias.
Co-authored-by: Mateja Marjanovic <mateja.marjanovic at amd.com>
Commit: 19f4cec676e99e7cc088f4b4e30976d2683e320d
https://github.com/llvm/llvm-project/commit/19f4cec676e99e7cc088f4b4e30976d2683e320d
Author: Jay Foad <jay.foad at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vinterp.txt
Log Message:
-----------
[AMDGPU] Add GFX12 encoding for VINTERP instructions (#74616)
Commit: 22df0886a1575439d0bf595f2b3a31c5255e9de6
https://github.com/llvm/llvm-project/commit/22df0886a1575439d0bf595f2b3a31c5255e9de6
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/test/CodeGen/ARM/aapcs-hfa-code.ll
M llvm/test/CodeGen/ARM/ha-alignstack-call.ll
M llvm/test/CodeGen/Mips/pr49200.ll
M llvm/test/CodeGen/X86/fp-intrinsics.ll
M llvm/test/CodeGen/X86/ldexp.ll
M llvm/test/CodeGen/X86/memset64-on-x86-32.ll
M llvm/test/CodeGen/X86/pr38738.ll
M llvm/test/CodeGen/X86/slow-unaligned-mem.ll
M llvm/test/CodeGen/X86/zero-remat.ll
Log Message:
-----------
[DAG] Don't split f64 constant stores if the fp imm is legal (#74622)
If the target can generate a specific fp immediate constant, then don't split the store into 2 x i32 stores
Another cleanup step for #74304
Commit: e9e1c411b6db8fb739c2c7af0d41bdd48eeed3e5
https://github.com/llvm/llvm-project/commit/e9e1c411b6db8fb739c2c7af0d41bdd48eeed3e5
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
A mlir/test/Target/LLVMIR/Import/nsw_nuw.ll
A mlir/test/Target/LLVMIR/nsw_nuw.mlir
Log Message:
-----------
[mlir][LLVM] Add nsw and nuw flags (#74508)
The implementation of these are modeled after the existing fastmath
flags for floating point arithmetic.
Commit: 2f29ded4f98e8e1fa26725c618a08082a09b405a
https://github.com/llvm/llvm-project/commit/2f29ded4f98e8e1fa26725c618a08082a09b405a
Author: DonatNagyE <donat.nagy at ericsson.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/EnumCastOutOfRangeChecker.cpp
M clang/test/Analysis/enum-cast-out-of-range.cpp
Log Message:
-----------
[analyzer] EnumCastOutOfRangeChecker: report the value (#74503)
...that is causing the bug report when it's converted to the enum type.
This commit only improves the diagnostics and does not affect the set of
reports.
Commit: 03edfe6148e13654d03b630a6c60e35cb71489cf
https://github.com/llvm/llvm-project/commit/03edfe6148e13654d03b630a6c60e35cb71489cf
Author: Harald van Dijk <harald at gigawatt.nl>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
Log Message:
-----------
Implement SoftPromoteHalf for FFREXP. (#74076)
`llvm/test/CodeGen/RISCV/llvm.frexp.ll` and
`llvm/test/CodeGen/X86/llvm.frexp.ll` contain a number of disabled tests
for unimplemented functionality. This implements one missing part of it.
Commit: 6b0ed49c8e0fbf06546f75c936116d9480971793
https://github.com/llvm/llvm-project/commit/6b0ed49c8e0fbf06546f75c936116d9480971793
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/python/CMakeLists.txt
Log Message:
-----------
[mlir] Fix missing cmake dependency causing non-deterministic build failure (NFC)
Fixes #74611
Commit: 76b89759193ec17ff84e475eb4d093df6c4d95e0
https://github.com/llvm/llvm-project/commit/76b89759193ec17ff84e475eb4d093df6c4d95e0
Author: Martin Storsjö <martin at martin.st>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Fix linking a standalone libatomic for MinGW (#74668)
Whenever linking with -nodefaultlibs for a MinGW target, we manually
need to specify a bunch of libraries - listed in ${MINGW_LIBRARIES}; the
same is already done for sanitizers and libunwind/libcxxabi/libcxx.
Practically speaking, linking with -nodefaultlibs but manually passing
the libraries in ${MINGW_LIBRARIES} restores most of the libraries that
are linked by default, except for the potential compiler builtins and
unwind library; i.e. it has essentially the same effect as linking with
"--unwindlib=none -rtlib=none", except that -rtlib doesn't accept such a
value.
When building only compiler-rt/lib/builtins, not all of compiler-rt,
${MINGW_LIBRARIES} is unset - set it manually here for that case. This
matches what is set in
compiler-rt/cmake/config-ix.cmake, except that the builtins (libgcc or
compiler-rt builtins) is omitted; the only use within lib/buitlins is
for the standalone libatomic, which explicitly already links against the
just-built builtins.
Commit: 7de53a8cfe45f60334dc3765c0bfc94beaf09883
https://github.com/llvm/llvm-project/commit/7de53a8cfe45f60334dc3765c0bfc94beaf09883
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
Log Message:
-----------
[lldb][test] TestConstStaticIntegralMember.py: un-XFAIL tests for DWARFv5
Commit: 4a4804bf70930751ebce2968b13297561414ebf6
https://github.com/llvm/llvm-project/commit/4a4804bf70930751ebce2968b13297561414ebf6
Author: Duo Wang <duow1 at uci.edu>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[CMake][Windows] Turn off lld string tail merging when ASAN is turned on (#74207)
lld string tail merging interacts badly with ASAN on Windows, as is
reported in https://github.com/llvm/llvm-project/issues/62078.
A similar error was found when building LLVM with
`-DLLVM_USE_SANITIZER=Address`:
```console
[2/2] Building GenVT.inc...
FAILED: include/llvm/CodeGen/GenVT.inc C:/Dev/llvm-project/Build_asan/include/llvm/CodeGen/GenVT.inc
cmd.exe /C "cd /D C:\Dev\llvm-project\Build_asan && C:\Dev\llvm-project\Build_asan\bin\llvm-min-tblgen.exe -gen-vt -I C:/Dev/llvm-project/llvm/include/llvm/CodeGen -IC:/Dev/llvm-project/Build_asan/include -IC:/Dev/llvm-project/llvm/include C:/Dev/llvm-project/llvm/include/llvm/CodeGen/ValueTypes.td --write-if-changed -o include/llvm/CodeGen/GenVT.inc -d include/llvm/CodeGen/GenVT.inc.d"
=================================================================
==31944==ERROR: AddressSanitizer: global-buffer-overflow on address 0x7ff6cff80d20 at pc 0x7ff6cfcc7378 bp 0x00e8bcb8e990 sp 0x00e8bcb8e9d8
READ of size 1 at 0x7ff6cff80d20 thread T0
#0 0x7ff6cfcc7377 in strlen (C:\Dev\llvm-project\Build_asan\bin\llvm-min-tblgen.exe+0x1400a7377)
#1 0x7ff6cfde50c2 in operator delete(void *, unsigned __int64) (C:\Dev\llvm-project\Build_asan\bin\llvm-min-tblgen.exe+0x1401c50c2)
#2 0x7ff6cfdd75ef in operator delete(void *, unsigned __int64) (C:\Dev\llvm-project\Build_asan\bin\llvm-min-tblgen.exe+0x1401b75ef)
#3 0x7ff6cfde59f9 in operator delete(void *, unsigned __int64) (C:\Dev\llvm-project\Build_asan\bin\llvm-min-tblgen.exe+0x1401c59f9)
#4 0x7ff6cff03f6c in operator delete(void *, unsigned __int64) (C:\Dev\llvm-project\Build_asan\bin\llvm-min-tblgen.exe+0x1402e3f6c)
#5 0x7ff6cfefbcbc in operator delete(void *, unsigned __int64) (C:\Dev\llvm-project\Build_asan\bin\llvm-min-tblgen.exe+0x1402dbcbc)
#6 0x7ffb7f247343 (C:\WINDOWS\System32\KERNEL32.DLL+0x180017343)
#7 0x7ffb800826b0 (C:\WINDOWS\SYSTEM32\ntdll.dll+0x1800526b0)
0x7ff6cff80d20 is located 31 bytes after global variable '"#error \"ArgKind is not defined\"\n"...' defined in 'C:\Dev\llvm-project\llvm\utils\TableGen\IntrinsicEmitter.cpp' (0x7ff6cff80ce0) of size 33
'"#error \"ArgKind is not defined\"\n"...' is ascii string '#error "ArgKind is not defined"
'
0x7ff6cff80d20 is located 0 bytes inside of global variable '""' defined in 'C:\Dev\llvm-project\llvm\utils\TableGen\IntrinsicEmitter.cpp' (0x7ff6cff80d20) of size 1
'""' is ascii string ''
SUMMARY: AddressSanitizer: global-buffer-overflow (C:\Dev\llvm-project\Build_asan\bin\llvm-min-tblgen.exe+0x1400a7377) in strlen
Shadow bytes around the buggy address:
0x7ff6cff80a80: 01 f9 f9 f9 f9 f9 f9 f9 00 00 00 00 01 f9 f9 f9
0x7ff6cff80b00: f9 f9 f9 f9 00 00 00 00 00 00 00 00 01 f9 f9 f9
0x7ff6cff80b80: f9 f9 f9 f9 00 00 00 00 01 f9 f9 f9 f9 f9 f9 f9
0x7ff6cff80c00: 00 00 00 00 01 f9 f9 f9 f9 f9 f9 f9 00 00 00 00
0x7ff6cff80c80: 00 00 00 00 01 f9 f9 f9 f9 f9 f9 f9 00 00 00 00
=>0x7ff6cff80d00: 01 f9 f9 f9[f9]f9 f9 f9 00 00 00 00 00 00 00 00
0x7ff6cff80d80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x7ff6cff80e00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x7ff6cff80e80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x7ff6cff80f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x7ff6cff80f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Shadow byte legend (one shadow byte represents 8 application bytes):
Addressable: 00
Partially addressable: 01 02 03 04 05 06 07
Heap left redzone: fa
Freed heap region: fd
Stack left redzone: f1
Stack mid redzone: f2
Stack right redzone: f3
Stack after return: f5
Stack use after scope: f8
Global redzone: f9
Global init order: f6
Poisoned by user: f7
Container overflow: fc
Array cookie: ac
Intra object redzone: bb
ASan internal: fe
Left alloca redzone: ca
Right alloca redzone: cb
==31944==ABORTING
```
This is reproducible with the 17.0.3 release:
```console
$ clang-cl --version
clang version 17.0.3
Target: x86_64-pc-windows-msvc
Thread model: posix
InstalledDir: C:\Program Files\LLVM\bin
$ cmake -S llvm -B Build -G Ninja -DLLVM_USE_SANITIZER=Address -DCMAKE_C_COMPILER=clang-cl -DCMAKE_CXX_COMPILER=clang-cl -DCMAKE_MSVC_RUNTIME_LIBRARY=MultiThreaded -DCMAKE_BUILD_TYPE=Release
$ cd Build
$ ninja all
```
Commit: b396e5429c9d5d18517a67e5c086f1013f47944f
https://github.com/llvm/llvm-project/commit/b396e5429c9d5d18517a67e5c086f1013f47944f
Author: Pablo Antonio Martinez <pablo.antonio.martinez at huawei.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/transform-op-match.mlir
Log Message:
-----------
Reland "[MLIR][Transform] Add attribute in MatchOp to filter by operand type (#67994)"
Test was failing due to a different transform sequence declaration (transform sequence were used, while now it should be named transform sequence). Test is now fixed.
Commit: 9ff7d0ebeb54347f9006405a6d08ed2b713bc411
https://github.com/llvm/llvm-project/commit/9ff7d0ebeb54347f9006405a6d08ed2b713bc411
Author: wanglei <wanglei at loongson.cn>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fcmp.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/icmp.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fcmp.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/icmp.ll
Log Message:
-----------
[LoongArch] Add codegen support for icmp/fcmp with lsx/lasx fetaures (#74700)
Mark ISD::SETCC node as legal, and add handling for the vector types
condition codes.
Commit: f17e76697289e6a54e89298a49f12b6799dd3e1a
https://github.com/llvm/llvm-project/commit/f17e76697289e6a54e89298a49f12b6799dd3e1a
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/utils/TableGen/X86DisassemblerTables.cpp
Log Message:
-----------
[X86][NFC] Clang-format X86DisassemblerTables.cpp for #74713
Commit: 6a1badfed2dcd438d94a35cc4ab3b38c7cc06208
https://github.com/llvm/llvm-project/commit/6a1badfed2dcd438d94a35cc4ab3b38c7cc06208
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking] Add missing check when computing known bits from pointer icmp
I'm not sure whether it's possible to cause a miscompile due to
the missing check right now, as the affected values mechanism
effectively protects us against this. This becomes a problem for
an upcoming patch though.
Commit: 3293c088c25db5be6042d20bd95c80a0863a88d0
https://github.com/llvm/llvm-project/commit/3293c088c25db5be6042d20bd95c80a0863a88d0
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/include/clang/Lex/HeaderSearch.h
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
Log Message:
-----------
Remove dead code; NFC
This code was added 17 years ago but never enabled or tested. GCC warns
that -I- is deprecated for them, and Clang gives an error when passed
-I-, so we may as well remove this code rather than hook it up to the
driver and maintain it.
Commit: f2f077898f09f80d09e0506fef25bc605e20ba34
https://github.com/llvm/llvm-project/commit/f2f077898f09f80d09e0506fef25bc605e20ba34
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
Log Message:
-----------
[LoopVectorize] Regenerate test checks (NFC)
This test contains an annoying mix of generated and hand-written
check lines. Generate the whole test.
Commit: 85e865288e8b002e222849723be737d77201cb7f
https://github.com/llvm/llvm-project/commit/85e865288e8b002e222849723be737d77201cb7f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[flang] Use `createOpWithBody` for section op, NFC (#74659)
Replace explicit calls to
```
op = builder.create<SectionOp>(...)
createBodyOfOp<SectionOp>(op, ...)
```
with a single call to
```
createOpWithBody<SectionOp>(...)
```
This is NFC, that's what the `createOpWithBody` function does.
Commit: 5295b12cd056c56c5582da91513966a0a2c8565f
https://github.com/llvm/llvm-project/commit/5295b12cd056c56c5582da91513966a0a2c8565f
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
Log Message:
-----------
[PatternMatch] Add m_AddLike matcher (NFC)
This matches either a plain "add" or an "or disjoint" that can
be converted into an add. The AddLike terminology is adopted from
the SDAG layer.
Commit: e825cc4eba5fee546fd90032cfbdc6ac1c57a50e
https://github.com/llvm/llvm-project/commit/e825cc4eba5fee546fd90032cfbdc6ac1c57a50e
Author: Utkarsh Saxena <usx at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/test/SemaCXX/coro-lifetimebound.cpp
M clang/test/SemaCXX/coro-return-type-and-wrapper.cpp
Log Message:
-----------
[clang] Add separate C++23 extension flag for attrs on lambda (#74553)
Commit: 04697aa18af83d9826b2f5949aa1b76c9f723da7
https://github.com/llvm/llvm-project/commit/04697aa18af83d9826b2f5949aa1b76c9f723da7
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/Transforms/InstCombine/binop-of-displaced-shifts.ll
Log Message:
-----------
[InstCombine] Add test for displaced shift fold with or disjoint (NFC)
Commit: 6e8b17d8213e131ea49030672175c4c1a97f49e1
https://github.com/llvm/llvm-project/commit/6e8b17d8213e131ea49030672175c4c1a97f49e1
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/binop-of-displaced-shifts.ll
Log Message:
-----------
[InstCombine] Support or disjoint in displaced shift fold
When I originally added this fold, it did not actually fix my
motivation case, where the add was represented as an or. Now that
we have the disjoint flag this can finally be cleanly supported.
Commit: 727fef79c0421133744700717603ff1b8a7d6628
https://github.com/llvm/llvm-project/commit/727fef79c0421133744700717603ff1b8a7d6628
Author: Nhat Nguyen <nhat7203 at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M libcxx/include/__random/cauchy_distribution.h
M libcxx/include/__random/chi_squared_distribution.h
M libcxx/include/__random/exponential_distribution.h
M libcxx/include/__random/extreme_value_distribution.h
M libcxx/include/__random/fisher_f_distribution.h
M libcxx/include/__random/gamma_distribution.h
M libcxx/include/__random/is_valid.h
M libcxx/include/__random/lognormal_distribution.h
M libcxx/include/__random/normal_distribution.h
M libcxx/include/__random/piecewise_constant_distribution.h
M libcxx/include/__random/piecewise_linear_distribution.h
M libcxx/include/__random/student_t_distribution.h
M libcxx/include/__random/uniform_real_distribution.h
M libcxx/include/__random/weibull_distribution.h
A libcxx/test/libcxx/numerics/rand/rand.req.urng/valid_real_type.verify.cpp
Log Message:
-----------
[libc++] Add floating point type check for uniform real distribution (#70564)
Fixes #62433
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 5384fb3d407c8bf4f34117baf60ddcb273a4b6d2
https://github.com/llvm/llvm-project/commit/5384fb3d407c8bf4f34117baf60ddcb273a4b6d2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/CodeGen/X86/gep-expanded-vector.ll
Log Message:
-----------
[X86] gep-expanded-vector.ll - regenerate checks
Commit: 6ea334456d5851e083b8867f392e00685bc79408
https://github.com/llvm/llvm-project/commit/6ea334456d5851e083b8867f392e00685bc79408
Author: W-50243 <wanghao636 at huawei.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M libcxx/include/__locale
Log Message:
-----------
[libc++] Fix regex_traits::isctype on big endian platforms (#73200)
'isctype' fails in arm64-big-endian because the __regex_word involved
in mask operation is not changed based on the platform endianness, while
the character mask does change.
Commit: 9406d2a345e827146b7bf369542d8778982bfc6c
https://github.com/llvm/llvm-project/commit/9406d2a345e827146b7bf369542d8778982bfc6c
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
Log Message:
-----------
[clang][Interp][NFC] Remove unused include
Commit: 52fe16a47e2e7a09e10830fee489eeeeef7fd130
https://github.com/llvm/llvm-project/commit/52fe16a47e2e7a09e10830fee489eeeeef7fd130
Author: Joseph Huber <huberjn at outlook.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M openmp/libomptarget/CMakeLists.txt
M openmp/libomptarget/DeviceRTL/CMakeLists.txt
Log Message:
-----------
[Libomptarget][Obvious] Fix incorrect if-else in CMake for destination
Summary:
This was added in a previous patch to update how we export the static
library used for OpenMP offloading. By mistake this if-else was using
the output incorrectly.
Fixes https://github.com/llvm/llvm-project/issues/74079
Commit: ed61123ff0d83ab5e70cac0b11c276e5372d171d
https://github.com/llvm/llvm-project/commit/ed61123ff0d83ab5e70cac0b11c276e5372d171d
Author: Dominik Wójt <dominik.wojt at arm.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M libcxx/test/libcxx/selftest/stdin-is-piped.sh.cpp
M libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cin.sh.cpp
Log Message:
-----------
[libc++] tests with picolibc: handle stdin (#74712)
Add proper explanation for cin.sh.cpp fail.
The stdin-is-piped.sh.cpp used to fail with old qemu (4.2.0), but should
pass now, as the qemu is updated now to 8.1.3 in CI.
Commit: d40eb0a575297d31bb8d07ed82cb10c05bdbc0b6
https://github.com/llvm/llvm-project/commit/d40eb0a575297d31bb8d07ed82cb10c05bdbc0b6
Author: Natalie Chouinard <sudonatalie at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
Log Message:
-----------
[SPIR-V] Remove deleted functions (#74660)
Remove references to functions that were deleted in #74521 which are
causing SPIR-V backend build failures.
Commit: 155a013225203359af132b31bb150f39608876c7
https://github.com/llvm/llvm-project/commit/155a013225203359af132b31bb150f39608876c7
Author: Natalie Chouinard <sudonatalie at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M .github/workflows/llvm-project-tests.yml
A .github/workflows/spirv-tests.yml
Log Message:
-----------
[SPIR-V] Add pre-commit CI workflow (#74092)
Add a pre-commit CI workflow for the experimental SPIR-V backend. This
action should only run when SPIR-V target or test files are modified.
The `codegen-spirv` tests don't run as part of `check-all` because the
SPIR-V backend is still experimental.
Depends on #73371 (for a green tree)
Commit: f1200ca7ac88c6ff9aa4fe3b560cf326dc3d4e25
https://github.com/llvm/llvm-project/commit/f1200ca7ac88c6ff9aa4fe3b560cf326dc3d4e25
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
M llvm/test/CodeGen/AArch64/arm64-promote-const-complex-initializers.ll
M llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll
M llvm/test/CodeGen/X86/2012-07-10-extload64.ll
M llvm/test/CodeGen/X86/fold-load-vec.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/nontemporal-3.ll
M llvm/test/CodeGen/X86/pr41619.ll
M llvm/test/CodeGen/X86/vec_zero_cse.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
Log Message:
-----------
[DAG] visitEXTRACT_VECTOR_ELT - constant fold legal fp imm values (#74304)
If we're extracting a constant floating point value, and the constant is a legal fp imm value, then replace the extraction with a fp constant.
Commit: cbe27c45cdb33e73ee7b29c46e2a64359ae5cc8e
https://github.com/llvm/llvm-project/commit/cbe27c45cdb33e73ee7b29c46e2a64359ae5cc8e
Author: Zack Johnson <zacklj89 at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[ASan][Windows] Interception fix for 'mov al, byte ptr []' sequences (#72531)
Commit: 9026dff382c32e8924dc7ea4ad89dc5887608289
https://github.com/llvm/llvm-project/commit/9026dff382c32e8924dc7ea4ad89dc5887608289
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/Transforms/InstCombine/known-bits.ll
Log Message:
-----------
[InstCombine] Add extra tests for known bits from dominating conds (NFC)
This adds test coverage for conditions with and/or.
Commit: 04c4566ca19c054c26460a14270086f1fbaf9abd
https://github.com/llvm/llvm-project/commit/04c4566ca19c054c26460a14270086f1fbaf9abd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M flang/lib/Lower/OpenMP.cpp
Log Message:
-----------
[flang] Use `genOpenMPTerminator` to insert terminator (#74719)
The specific terminator operation depends on what operation it is inside
of. The function `genOpenMPTerminator` performs these checks and selects
the appropriate type of terminator.
Remove partial duplication of that code, and replace it with a function
call. This makes `genOpenMPTerminator` be the sole source of OpenMP
terminators.
Commit: dfd36aa70ec1cff0529272b00f6c6a81bf0cc49c
https://github.com/llvm/llvm-project/commit/dfd36aa70ec1cff0529272b00f6c6a81bf0cc49c
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/lib/AsmParser/LLParser.cpp
A llvm/test/Assembler/summary-parsing-error.ll
Log Message:
-----------
[AsmParser] Gracefully handle non-existent GV summary reference
If the module summary references a global variable that does not
exist, throw a nice error instead of asserting.
Fixes https://github.com/llvm/llvm-project/issues/74726.
Commit: 1ee6a1e38aa0c3773d892fcd01bb2af8e446e67f
https://github.com/llvm/llvm-project/commit/1ee6a1e38aa0c3773d892fcd01bb2af8e446e67f
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M libc/src/__support/UInt.h
Log Message:
-----------
[libc] fix -Wshift-count-overflow in UInt.h (#74649)
Not that I'm very good at SFINAE, but it seems that conversion operators
are
perhaps difficult to compose with SFINAE. I saw an example that used one
layer
of indirection to have an explicit return type that could then be used
with
enable_if_t.
Link: https://stackoverflow.com/a/7604580
Fixes: #74623
Commit: 5416309da4e8cc44ca8f522232873587726d89c5
https://github.com/llvm/llvm-project/commit/5416309da4e8cc44ca8f522232873587726d89c5
Author: Dinar Temirbulatov <Dinar.Temirbulatov at arm.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
Log Message:
-----------
[AArch64][SME2] Add _x2/_x4 svqrshr builtins. (#74100)
Patch by: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Commit: d8cd7fc1f404161f9ec378a1cf3c52f8b8e9beca
https://github.com/llvm/llvm-project/commit/d8cd7fc1f404161f9ec378a1cf3c52f8b8e9beca
Author: alex-t <alex-t at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Scalar/AlignmentFromAssumptions.cpp
A llvm/test/Transforms/AlignmentFromAssumptions/alignment-from-assumptions-track-users.ll
Log Message:
-----------
AlignmentFromAssumptions should only track pointer operand users (#73370)
AlignmentFromAssumptions uses SCEV to update the load/store alignment.
It tracks down the use-def chains for the pointer which it takes from
the assumption cache until it reaches the load or store instruction. It
mistakenly adds to the worklist the users of the load result
irrespective of the fact that the load result has no connection with the
original pointer, moreover, it is not a pointer at all in most cases.
Thus the def-use chain contains irrelevant load users. When it is a
store instruction the algorithm attempts to adjust its alignment to the
alignment of the original pointer. The problem appears when the load and
store memory operand pointers belong to different address spaces and
possibly have different sizes.
The 4bf015c035e4e5b63c7222dfb15ff274a5ed905c was an attempt to address a
similar problem. The truncation or zero extension was added to make
pointers the same size. That looks strange to me because the zero
extension of the pointer is not legal. The test in the
4bf015c035e4e5b63c7222dfb15ff274a5ed905c does not work any longer as for
the explicit address spaces conversion the addrspacecast is generated.
Summarize:
1. For the alloca to global address spaces conversion addrspacecasts are
used, so the code added by the 4bf015c035e4e5b63c7222dfb15ff274a5ed905c
is no longer functional.
2. The AlignmentFromAssumptions algorithm should not add the load users
to the worklist as they have nothing to do with the original pointer.
3. Instead we only track users that are: GetelementPtrIns, PHINodes.
Commit: db3bc494875626c6b8e7392f08c631489b056702
https://github.com/llvm/llvm-project/commit/db3bc494875626c6b8e7392f08c631489b056702
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/python/mlir/dialects/_ods_common.py
M mlir/python/mlir/dialects/affine.py
M mlir/test/python/dialects/affine.py
Log Message:
-----------
[mlir][python] fix up affine for (#74495)
Commit: 789a5bbb7d5befac6c29a774d3db487abe881331
https://github.com/llvm/llvm-project/commit/789a5bbb7d5befac6c29a774d3db487abe881331
Author: Daniel Grumberg <dgrumberg at apple.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/test/ExtractAPI/language.c
Log Message:
-----------
[clang][ExtractAPI] Allow serialization for ObjC++ headers (#74733)
rdar://79874441
Commit: 0113722d82200c39e59dcfbd2f396dbd84ed022b
https://github.com/llvm/llvm-project/commit/0113722d82200c39e59dcfbd2f396dbd84ed022b
Author: jyu2-git <jennifer.yu at intel.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/test/OpenMP/target_data_use_device_addr_codegen.cpp
A openmp/libomptarget/test/offloading/target_map_for_member_data.cpp
Log Message:
-----------
[OpenMP] Fix runtime problem due to wrong map size. (#74692)
Currently we are missing set up-boundary address for FinalArraySection
as highests elements in partial struct data.
Currently for:
\#pragma omp target map(D.a) map(D.b[:2])
The size is:
%a = getelementptr inbounds %struct.DataTy, ptr %D, i32 0, i32 0
%b = getelementptr inbounds %struct.DataTy, ptr %D, i32 0, i32 1
%arrayidx = getelementptr inbounds [2 x float], ptr %b, i64 0, i64 0
%2 = getelementptr float, ptr %arrayidx, i32 1
%3 = ptrtoint ptr %2 to i64
%4 = ptrtoint ptr %a to i64
%5 = sub i64 %3, %4
%6 = sdiv exact i64 %5, ptrtoint (ptr getelementptr (i8, ptr null, i32
1) to i64)
Where %2 is wrong for (D.b[:2]) is pointer to first element of array
section. It should pointe to last element of array section.
The fix is to emit the pointer to the last element of array section and
use this pointer as the highest element in partial struct data.
After change IR:
%a = getelementptr inbounds %struct.DataTy, ptr %D, i32 0, i32 0
%b = getelementptr inbounds %struct.DataTy, ptr %D, i32 0, i32 1
%arrayidx = getelementptr inbounds [2 x float], ptr %b, i64 0, i64 0
%b1 = getelementptr inbounds %struct.DataTy, ptr %D, i32 0, i32 1
%arrayidx2 = getelementptr inbounds [2 x float], ptr %b1, i64 0, i64 1
%1 = getelementptr float, ptr %arrayidx2, i32 1
%2 = ptrtoint ptr %1 to i64
%3 = ptrtoint ptr %a to i64
%4 = sub i64 %2, %3
%5 = sdiv exact i64 %4, ptrtoint (ptr getelementptr (i8, ptr null, i32
1) to i64)
Commit: 53b46890064204d067f4ef3959fe754dde65b426
https://github.com/llvm/llvm-project/commit/53b46890064204d067f4ef3959fe754dde65b426
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
A clang/test/C/C2x/n2836_n2939.c
M clang/www/c_status.html
Log Message:
-----------
[Clang] Mark WG14 N2939 (Identifier Syntax Fixes) as available in Clang 15 (#74666)
WG14 N2939 (Identifier Syntax Fixes) corrects a grammar issue in the C
standard but does not otherwise change intended behavior. This change
updates the C23 status to note this paper as implemented as of Clang 15;
the release in which support for N2836 (Identifier Syntax using Unicode
Standard Annex 31) was implemented.
Commit: fb2b907fbd2c9ac25077dae01d777d884e09a7a4
https://github.com/llvm/llvm-project/commit/fb2b907fbd2c9ac25077dae01d777d884e09a7a4
Author: Jay Foad <jay.foad at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
Log Message:
-----------
[AArch64][SME2] Add REQUIRES to new test
Commit: ea991a11b2a3d2bfa545adbefb71cd17e8970a43
https://github.com/llvm/llvm-project/commit/ea991a11b2a3d2bfa545adbefb71cd17e8970a43
Author: Thurston Dang <thurston.dang at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_flags.inc
M compiler-rt/lib/hwasan/hwasan_linux.cpp
A compiler-rt/test/hwasan/TestCases/Linux/fixed-shadow.c
Log Message:
-----------
[hwasan] Add fixed_shadow_base flag (#73980)
When set to non-zero, the HWASan runtime will map the shadow base at the
specified constant address.
This is particularly useful in conjunction with the existing compiler
option
'hwasan-mapping-offset', which bakes a hardcoded constant address into
the instrumentation.
---------
Co-authored-by: Thurston Dang <thurston at google.com>
Commit: 32ec5fbfed32f37aa070ee38e9b038bd84ca6479
https://github.com/llvm/llvm-project/commit/32ec5fbfed32f37aa070ee38e9b038bd84ca6479
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking] Use BinaryOperator instead of Operator in matchSimpleRecurrence. (#74678)
Operator allows the phi operand to be a ConstantExpr. A ConstantExpr is
a valid operand to a phi, but is never going to be a recurrence.
We can only match a BinaryOperator so use that instead.
Commit: 04cbfcc33ae9a1bc440d553abc73b02421cf6ad2
https://github.com/llvm/llvm-project/commit/04cbfcc33ae9a1bc440d553abc73b02421cf6ad2
Author: Philip Reames <preames at rivosinc.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
Log Message:
-----------
[test][lsr] Add term-folding test cases with estimated trip counts
Commit: e3720bbc088d904ed7fad9ad1a4db294d2bcfc05
https://github.com/llvm/llvm-project/commit/e3720bbc088d904ed7fad9ad1a4db294d2bcfc05
Author: David Green <david.green at arm.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
Log Message:
-----------
[AArch64] Extend and cleanup vector icmp test cases. NFC
Commit: ea8b95d0d52768f014ba7bb7be5abb7e00e69064
https://github.com/llvm/llvm-project/commit/ea8b95d0d52768f014ba7bb7be5abb7e00e69064
Author: Stefan Pintilie <stefanp at ca.ibm.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/P10InstrResources.td
M llvm/lib/Target/PowerPC/PPCBack2BackFusion.def
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/test/CodeGen/PowerPC/pcrel-tls-local-dynamic.ll
M llvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll
M llvm/test/CodeGen/PowerPC/pcrel-tls_get_addr_clobbers.ll
M llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s
M llvm/test/MC/PowerPC/ppc64-errors.s
Log Message:
-----------
[PowerPC] Add a set of extended mnemonics that are missing from Power 10. (#73003)
This patch adds the majority of the missing extended mnemonics that were
introduced in Power 10.
The only extended mnemonics that were not added are related to the plq
and pstq instructions. These will be added in a separate patch as the
instructions themselves would also have to be added.
Commit: 8e8bff3397c08252841b04fd4c91c7d120ea710a
https://github.com/llvm/llvm-project/commit/8e8bff3397c08252841b04fd4c91c7d120ea710a
Author: jyu2-git <jennifer.yu at intel.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M openmp/libomptarget/test/offloading/target_map_for_member_data.cpp
Log Message:
-----------
Fix test. (#74745)
Just add
// REQUIRES: libomptarget-debug
So that test will not run with release compiler.
Commit: dd0e38eb3467c7ed3f15b31cb8771d5b2ce08675
https://github.com/llvm/llvm-project/commit/dd0e38eb3467c7ed3f15b31cb8771d5b2ce08675
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
Log Message:
-----------
[SLP]Add a test for missed insert_subvector pattern detection, NFC.
Commit: 0e6685ab1a8313cd1dc7eb3c99ff642e6c492aa2
https://github.com/llvm/llvm-project/commit/0e6685ab1a8313cd1dc7eb3c99ff642e6c492aa2
Author: Fangrui Song <i at maskray.me>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M lld/test/ELF/debug-dead-reloc-32.s
M lld/test/ELF/debug-dead-reloc.s
Log Message:
-----------
[ELF,test] Improve tombstone value tests
Add 32-bit test for -z dead-reloc-in-nonalloc= and add tests for a
non-x86 64-bit (x86-64 is unique in discerning signed/unsigned 32-bit
absolute relocations (R_X86_64_32/R_X86_64_32S).
AArch64/PPC64/RISC-V/etc don't have the distinction). Having a test will
improve coverage for #74686
Commit: 0928312ec882005fa396dedba9a53f0817e4a2fb
https://github.com/llvm/llvm-project/commit/0928312ec882005fa396dedba9a53f0817e4a2fb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/IR/OperandTraits.h
Log Message:
-----------
[IR] Use User::getHungOffOperands() in HungoffOperandTraits::op_begin/op_end(). NFC (#74744)
User::getOperandList has to check the HasHungOffUses bit in Value to
determine how the operand list is stored. If we're using
HungoffOperandTraits we can assume how it is stored without checking the
flag.
Noticed that the for loop in matchSimpleRecurrence was triggering loop
unswitch when built with clang due to specializing based on how the
operand list of the PHINode was stored.
This reduces the size of llc on my local Release+Asserts build by around
41K.
Commit: 32d535195ec5d9b0caf03fee13f796fc8c66a79f
https://github.com/llvm/llvm-project/commit/32d535195ec5d9b0caf03fee13f796fc8c66a79f
Author: yonghong-song <yhs at fb.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
Log Message:
-----------
BPF: Emit an error for illegal LD_imm64 insn when LLVM_ENABLE_ASSERTI… (#74035)
…ONS=OFF
Jose reported an issue ([1]) where for the below illegal asm code
```
r0 = 1 + w3 ll
```
clang actually supports it and generates the object code.
Further investigation finds that clang actually intends to reject the
above code as well but only when the clang is built with
LLVM_ENABLE_ASSERTIONS=ON.
I later found that clang16 (built by redhat and centos) in fedora system
has the same issue since they also have LLVM_ENABLE_ASSERTIONS=OFF
([2]).
So let BPF backend report an error for the above case regardless of the
LLVM_ENABLE_ASSERTIONS setting.
[1] https://lore.kernel.org/bpf/87leahx2xh.fsf@oracle.com/#t
[2]
https://lore.kernel.org/bpf/840e33ec-ea4c-4b55-bda1-0be8d1e0324f@linux.dev/
Co-authored-by: Yonghong Song <yonghong.song at linux.dev>
Commit: 4e80bc7d716b1f2344ffd7ad109413bfe5390879
https://github.com/llvm/llvm-project/commit/4e80bc7d716b1f2344ffd7ad109413bfe5390879
Author: Joseph Huber <huberjn at outlook.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/Builtins.def
M clang/include/clang/Basic/SyncScope.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/init.c
A clang/test/Sema/scoped-atomic-ops.c
Log Message:
-----------
[Clang] Introduce scoped variants of GNU atomic functions (#72280)
Summary:
The standard GNU atomic operations are a very common way to target
hardware atomics on the device. With more heterogenous devices being
introduced, the concept of memory scopes has been in the LLVM language
for awhile via the `syncscope` modifier. For targets, such as the GPU,
this can change code generation depending on whether or not we only need
to be consistent with the memory ordering with the entire system, the
single GPU device, or lower.
Previously these scopes were only exported via the `opencl` and `hip`
variants of these functions. However, this made it difficult to use
outside of those languages and the semantics were different from the
standard GNU versions. This patch introduces a `__scoped_atomic` variant
for the common functions. There was some discussion over whether or not
these should be overloads of the existing ones, or simply new variants.
I leant towards new variants to be less disruptive.
The scope here can be one of the following
```
__MEMORY_SCOPE_SYSTEM // All devices and systems
__MEMORY_SCOPE_DEVICE // Just this device
__MEMORY_SCOPE_WRKGRP // A 'work-group' AKA CUDA block
__MEMORY_SCOPE_WVFRNT // A 'wavefront' AKA CUDA warp
__MEMORY_SCOPE_SINGLE // A single thread.
```
Naming consistency was attempted, but it is difficult to capture to full
spectrum with no many names. Suggestions appreciated.
Commit: 3ed940ac3dac03d044a8d1e51005cec84dd128f9
https://github.com/llvm/llvm-project/commit/3ed940ac3dac03d044a8d1e51005cec84dd128f9
Author: Björn Svensson <bjorn.a.svensson at est.tech>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.h
M clang-tools-extra/clang-tidy/hicpp/CMakeLists.txt
M clang-tools-extra/clang-tidy/hicpp/HICPPTidyModule.cpp
A clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.cpp
A clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/hicpp/ignored-remove-result.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/hicpp/ignored-remove-result.cpp
Log Message:
-----------
[clang-tidy] Add check hicpp-ignored-remove-result (#73119)
This check implements the [rule
17.5.1](https://www.perforce.com/resources/qac/high-integrity-cpp-coding-standard/standard-library)
of the HICPP standard which states:
- Do not ignore the result of std::remove, std::remove_if or std::unique
The mutating algorithms std::remove, std::remove_if and both overloads
of std::unique operate by swapping or moving elements of the range they
are operating over. On completion, they return an iterator to the last
valid element. In the majority of cases the correct behavior is to use
this result as the first operand in a call to std::erase.
This check is based on `bugprone-unused-return-value` but with a fixed
set of functions.
Suppressing issues by casting to `void` is enabled by default, but can
be disabled by setting `AllowCastToVoid` option to `false`.
Commit: 097d2f14173a3bfc1cd44f543f63154fed79e962
https://github.com/llvm/llvm-project/commit/097d2f14173a3bfc1cd44f543f63154fed79e962
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.h
M mlir/test/Dialect/SparseTensor/sparse_conv_2d_slice_based.mlir
Log Message:
-----------
[mlir][sparse] optimize memory load to SSA value when generating spar… (#74750)
…se conv kernel.
Commit: 50ed0ba285bf07632ddee0dec743c26b0442c4cc
https://github.com/llvm/llvm-project/commit/50ed0ba285bf07632ddee0dec743c26b0442c4cc
Author: Abhina Sree <69635948+abhina-sree at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/CMakeLists.txt
M llvm/lib/Transforms/Hello/CMakeLists.txt
M llvm/tools/bugpoint-passes/CMakeLists.txt
M llvm/tools/llvm-shlib/CMakeLists.txt
Log Message:
-----------
[SystemZ/ZOS] Additions to the build system. (#74730)
This change extend the CMake files with the necessary additions to build LLVM for z/OS.
Commit: 2b1c76c7c4d62f4470fe1527bf239f380c19760a
https://github.com/llvm/llvm-project/commit/2b1c76c7c4d62f4470fe1527bf239f380c19760a
Author: Aiden Grossman <agrossman154 at yahoo.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/utils/git/code-format-helper.py
Log Message:
-----------
[Github] Use three dot diff for darker in code format action (#74704)
Using a two dot diff allows changes made in main after the merge base to
show up in the formatting diff. Using a three dot diff fixes this and
ensures that only changes made in the source branch (branch from the PR
author) will get passed along to the formatter.
Without this, issues like #73873 occur.
Commit: a4d4b45aef6dbac1cead60dcba5e60939fc1656d
https://github.com/llvm/llvm-project/commit/a4d4b45aef6dbac1cead60dcba5e60939fc1656d
Author: Fangrui Song <i at maskray.me>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M lld/ELF/InputSection.cpp
Log Message:
-----------
[ELF] relocateNonAlloc: move likely expr == R_ABS before unlikely R_SIZE. NFC
Commit: bdcb841aa729eabc03896c74c6ddfbf836356d77
https://github.com/llvm/llvm-project/commit/bdcb841aa729eabc03896c74c6ddfbf836356d77
Author: Ilia Kuklin <kuklin.iy at mail.ru>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/ObjCopy/CommonConfig.cpp
A llvm/test/tools/llvm-objcopy/regex-error.test
Log Message:
-----------
[objcopy] Return an error in case of an invalid regex (#74319)
As of now, llvm-objcopy silently ignores a provided regex if it doesn't
compile.
This patch adds returning an error saying that a regex couldn't be
compiled, along with the compilation error message.
---------
Co-authored-by: James Henderson <46713263+jh7370 at users.noreply.github.com>
Commit: 5ca1f2aff7156dd61de5bcf8c5130b072cdca461
https://github.com/llvm/llvm-project/commit/5ca1f2aff7156dd61de5bcf8c5130b072cdca461
Author: Natalie Chouinard <sudonatalie at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
Log Message:
-----------
[SPIR-V] Partial revert of d40eb0a (#74755)
This part of the #74660 patch was incorrect and shouldn't have been
changed since this usage of `isOpaque()` is not one of `PointerType`'s
functions.
Commit: 6c6f8b1acde862b176d38ede0a6d8ab649890a3c
https://github.com/llvm/llvm-project/commit/6c6f8b1acde862b176d38ede0a6d8ab649890a3c
Author: Natalie Chouinard <sudonatalie at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/CodeGen/SPIRV/opencl/basic/get_global_offset.ll
M llvm/test/CodeGen/SPIRV/struct.ll
Log Message:
-----------
[SPIR-V] Fixup tests (#73371)
These tests are currently failing at tip-of-tree, but pass with minor
FileCheck updates that look reasonable.
Commit: 7030aab1d7a33c17d72eaf721c679be6ca0b073d
https://github.com/llvm/llvm-project/commit/7030aab1d7a33c17d72eaf721c679be6ca0b073d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/hicpp/BUILD.gn
Log Message:
-----------
[gn build] Port 3ed940ac3dac
Commit: 3fd1d6953d12e2fba6b5efae0a725500c963ce3a
https://github.com/llvm/llvm-project/commit/3fd1d6953d12e2fba6b5efae0a725500c963ce3a
Author: Fangrui Song <i at maskray.me>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/test/ELF/i386-debug-noabs.test
M lld/test/ELF/non-abs-reloc.s
Log Message:
-----------
[ELF] relocateNonAlloc: clean up workaround code
relocateNonAlloc is costly for .debug_* section relocating. We don't
want to burn CPU cycles on other targets' workarounds.
Remove a temporary workaround for Linux objtool after a proper fix
https://git.kernel.org/linus/b8ec60e1186cdcfce41e7db4c827cb107e459002
Move the R_386_GOTPC workaround for GCC<8 beside the R_PC workaround.
Commit: ab4d6cd6d14cef1a167de1aea2fe44900d1d7309
https://github.com/llvm/llvm-project/commit/ab4d6cd6d14cef1a167de1aea2fe44900d1d7309
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/TextAPI/RecordsSlice.h
M llvm/unittests/TextAPI/RecordTests.cpp
Log Message:
-----------
[TextAPI] Update RecordSlice attributes to follow code guidelines (#74743)
Came across simple code cleanup while upstreaming more code, this is
primarily an NFC.
Commit: e87f33d9ce785668223c3bcc4e06956985cccda1
https://github.com/llvm/llvm-project/commit/e87f33d9ce785668223c3bcc4e06956985cccda1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/test/CodeGen/RISCV/relax-per-target-feature.ll
Log Message:
-----------
[RISCV][MC] Pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup. (#73721)
Instead of using the STI stored in RISCVAsmBackend, try to get it from
the MCFragment.
This addresses the issue raised here
https://discourse.llvm.org/t/possible-problem-related-to-subtarget-usage/75283
Commit: ffb2af3ed6a95a4eb55b81a3d1351d5d4bd66eb5
https://github.com/llvm/llvm-project/commit/ffb2af3ed6a95a4eb55b81a3d1351d5d4bd66eb5
Author: Philip Reames <preames at rivosinc.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll
M llvm/test/Transforms/IRCE/non-loop-invariant-rhs-instr.ll
M llvm/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll
M llvm/test/Transforms/LoopPredication/basic.ll
M llvm/test/Transforms/LoopUnroll/runtime-exit-phi-scev-invalidation.ll
Log Message:
-----------
[SCEVExpander] Attempt to reinfer flags dropped due to CSE (#72431)
LSR uses SCEVExpander to generate induction formulas. The expander
internally tries to reuse existing IR expressions. To do that, it needs
to strip any poison generating flags (nsw, nuw, exact, nneg, etc..)
which may not be valid for the newly added users.
This is conservatively correct, but has the effect that LSR will strip
nneg flags on zext instructions involved in trip counts in loop
preheaders. To avoid this, this patch adjusts the expanded to reinfer
the flags on the CSE candidate if legal for all possible users.
This should fix the regression reported in
https://github.com/llvm/llvm-project/issues/71200.
This should arguably be done inside canReuseInstruction instead, but
doing it outside is more conservative compile time wise. Both
canReuseInstruction and isGuaranteedNotToBePoison walk operand lists, so
right now we are performing work which is roughly O(N^2) in the size of
the operand graph. We should fix that before making the per operand step
more expensive. My tenative plan is to land this, and then rework the
code to sink the logic into more core interfaces.
Commit: 58785ebd24b82f7d1d5fa6a0f8bb2a15de130230
https://github.com/llvm/llvm-project/commit/58785ebd24b82f7d1d5fa6a0f8bb2a15de130230
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Check for ephemeral values beforehand, NFC.
Commit: 3bc7e552cad6dedb96102421611eadb11c83bd51
https://github.com/llvm/llvm-project/commit/3bc7e552cad6dedb96102421611eadb11c83bd51
Author: kkwli <kkwli at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M flang/runtime/edit-output.cpp
Log Message:
-----------
[flang] pass true/false to EditLogicalOutput directly (NFC) (#73375)
Commit: c54cbf82b865a266216475e9d82ab0c0a250b235
https://github.com/llvm/llvm-project/commit/c54cbf82b865a266216475e9d82ab0c0a250b235
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/test/Transforms/InstCombine/or.ll
Log Message:
-----------
[InstCombine] Add test case for #74739. NFC
Commit: 09a05f5dcb7946494828b00d767198341ff78604
https://github.com/llvm/llvm-project/commit/09a05f5dcb7946494828b00d767198341ff78604
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/or.ll
Log Message:
-----------
[InstCombine] Drop poison generating flags on Or in simplifyAssocCastAssoc.
Fixes #74739.
Commit: c79f94d85121347d28f894d837f173f90f368e92
https://github.com/llvm/llvm-project/commit/c79f94d85121347d28f894d837f173f90f368e92
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/test/CXX/drs/dr11xx.cpp
M clang/test/CXX/drs/dr12xx.cpp
M clang/test/CXX/drs/dr13xx.cpp
M clang/test/CXX/drs/dr14xx.cpp
M clang/test/CXX/drs/dr15xx.cpp
M clang/test/CXX/drs/dr16xx.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/test/CXX/drs/dr19xx.cpp
M clang/test/CXX/drs/dr25xx.cpp
M clang/test/CXX/drs/dr412.cpp
M clang/test/CXX/drs/dr8xx.cpp
M clang/test/CXX/drs/dr9xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Fill in historical data on when C++ DRs 700-1999 were fixed
Commit: fb35bb48c628c83248b64cdac2a094b9e46ae695
https://github.com/llvm/llvm-project/commit/fb35bb48c628c83248b64cdac2a094b9e46ae695
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Build value-to-gather-nodes map during nodes building, NFC.
Commit: 97f3be2c5a0295632321141bdc001d4f81821958
https://github.com/llvm/llvm-project/commit/97f3be2c5a0295632321141bdc001d4f81821958
Author: Joseph Huber <huberjn at outlook.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCUDARuntime.h
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/Driver/linker-wrapper-image.c
M clang/tools/clang-linker-wrapper/OffloadWrapper.cpp
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[CUDA][HIP] Improve variable registration with the new driver (#73177)
Summary:
This patch adds support for registering texture / surface variables from
CUDA / HIP. Additionally, we now properly track the `extern` and `const`
flags that are also used in these runtime functions.
This does not implement the `managed` variables yet as those seem to
require some extra handling I'm not familiar with. The issue is that the
current offload entry isn't large enough to carry size and alignment
information along with an extra global.
Commit: 4de7d4e8c40aafff5a76df467965f71e057d9b39
https://github.com/llvm/llvm-project/commit/4de7d4e8c40aafff5a76df467965f71e057d9b39
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
A llvm/test/Instrumentation/AddressSanitizer/global_metadata_code_model.ll
M llvm/test/Instrumentation/AddressSanitizer/global_with_comdat.ll
Log Message:
-----------
[ASan][X86] Mark asan_globals section large (#74514)
We'd like to make the asan_globals section large to make it not
contribute to relocation pressure since there are no direct PC32
references to it.
Following #74498, we can do that by marking the code model for the
global explicitly large.
Without this change, asan_globals gets placed between .data and .bss.
With this change, it gets placed after .bss.
Commit: 58c2a4e806b2882c0622cbded923b32f94c5b47b
https://github.com/llvm/llvm-project/commit/58c2a4e806b2882c0622cbded923b32f94c5b47b
Author: ChiaHungDuan <chiahungduan at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M compiler-rt/lib/scudo/standalone/include/scudo/interface.h
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.inc
Log Message:
-----------
[scudo] Add hooks to mark the range of realloc (#74353)
`realloc` may involve both allocation and deallocation. Given that the
reporting the events is not atomic and which may lead the hook user to a
false case that the double-use pattern happens. In general, this can be
resolved on the hook side. To alleviate the task of handling it, we add
two new hooks to mark the range so that the hook user can combine those
calls together.
Commit: 98d8dce6e9e21a995f6a06fa4485fa529931be37
https://github.com/llvm/llvm-project/commit/98d8dce6e9e21a995f6a06fa4485fa529931be37
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/IR/CMakeLists.txt
M mlir/test/python/dialects/affine.py
Log Message:
-----------
[mlir][affine] implement inferType for delinearize (#74644)
Commit: 7ddd3d776402f9cc7d5f13b5940ba38a285223c2
https://github.com/llvm/llvm-project/commit/7ddd3d776402f9cc7d5f13b5940ba38a285223c2
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M polly/lib/Analysis/ScopBuilder.cpp
Log Message:
-----------
[polly][NFC] Refactor reduction detection code for modularity (#72343)
This patch pulls out the memory checks from the base reduction detection
algorithm. This is the first one in the reduction patch series, to
reduce the difference in future patches.
Commit: 4a6ed4a90d6cddbbe3d25132780a72b50a457c41
https://github.com/llvm/llvm-project/commit/4a6ed4a90d6cddbbe3d25132780a72b50a457c41
Author: max <maksim.levental at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/test/python/dialects/affine.py
Log Message:
-----------
[mlir][python] fix affine test
Commit: 9d3aec5535adfdeb10a400e92cecc1cc0a5e26a6
https://github.com/llvm/llvm-project/commit/9d3aec5535adfdeb10a400e92cecc1cc0a5e26a6
Author: jimingham <jingham at apple.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Core/Debugger.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/source/Target/Target.cpp
A lldb/test/API/driver/quit_speed/Makefile
A lldb/test/API/driver/quit_speed/TestQuitWithProcess.py
A lldb/test/API/driver/quit_speed/main.c
Log Message:
-----------
Fix a stall in running `quit` while a live process is running (#74687)
We need to generate events when finalizing, or we won't know that we
succeeded in stopping the process to detach/kill. Instead, we stall and
then after our 20 interrupt timeout, we kill the process (even if we
were supposed to detach) and exit.
OTOH, we have to not generate events when the Process is being
destructed because shared_from_this has already been torn down, and
using it will cause crashes.
Commit: 93509b4462a74c3f96eb576f1bbaaa26328e63b2
https://github.com/llvm/llvm-project/commit/93509b4462a74c3f96eb576f1bbaaa26328e63b2
Author: Lang Hames <lhames at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M compiler-rt/lib/orc/macho_platform.cpp
A compiler-rt/test/orc/TestCases/Darwin/arm64/Inputs/ret_self.S
A compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-dlsym.c
A compiler-rt/test/orc/TestCases/Darwin/x86-64/Inputs/ret_self.S
A compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-dlsym.c
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC-RT][ORC][MachO] Fix some issues with executor-side symbol tables.
1. Prevent deadlock by unlocking JDStatesMutex when calling back to the
controller to request a push of new symbols. (If JDStatesMutex is locked
then the push operation can't register the new symbols, and so can't
complete).
2. Record MachOPlatform runtime symbols during bootstrap and attach their
registration to the bootstrap-completion graph, similar to the way that
deferred allocation actions are handled. We can't register the symbols
the normal way during bootstrap since the symbol registration function is
itself in the process of being materialized.
3. Add dlsym testcases to exercise these fixes.
Commit: c6805ea44af3bfd57e6b46f2d65ec6b0d0d6c64a
https://github.com/llvm/llvm-project/commit/c6805ea44af3bfd57e6b46f2d65ec6b0d0d6c64a
Author: Adrian Prantl <adrian-prantl at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
Log Message:
-----------
[libDebugInfo] Prevent infinite recursion in DWARFDie::getTypeSize() (#74681)
when run on invalid input.
Commit: bfd41c3f8cc70bd65461a6d767f55c14d72150d9
https://github.com/llvm/llvm-project/commit/bfd41c3f8cc70bd65461a6d767f55c14d72150d9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
M clang/tools/clang-linker-wrapper/OffloadWrapper.cpp
Log Message:
-----------
[LinkerWrapper][Obvious] Fix missing use of texture data type
Summary:
This was accidentally linked to the wrong pointer, causing unused
variable warnings and registering the wrong thing.
Commit: 42bba97fc24f045f593fc26f998bac9b08633255
https://github.com/llvm/llvm-project/commit/42bba97fc24f045f593fc26f998bac9b08633255
Author: harsh-nod <harsh at nod-labs.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
Log Message:
-----------
[mlir] Extend CombineTransferReadOpTranspose pattern to handle extf ops. (#74754)
This patch modifies the CombineTransferReadOpTranspose pattern to handle
extf ops. Also adds a test which shows the transpose getting folded into
the transfer_read.
Commit: 7003e255d3f1fbff3b2ef3052d478b65ec555963
https://github.com/llvm/llvm-project/commit/7003e255d3f1fbff3b2ef3052d478b65ec555963
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/test/Integration/Dialect/SparseTensor/CPU/dual_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
Log Message:
-----------
[mlir][sparse] code formatting (NFC) (#74779)
Commit: 0808be47b8fbf0307d0b6f2eb45ba9bfe1b3ae65
https://github.com/llvm/llvm-project/commit/0808be47b8fbf0307d0b6f2eb45ba9bfe1b3ae65
Author: Mike Rice <michael.p.rice at intel.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
Log Message:
-----------
[NFC] Remove unneeded nullptr checks after cast<> (#74674)
Since VD is assigned from a cast<VarDecl> it cannot be a nullptr or it
would have asserted. Remove the subsequent checks to clear up any
misunderstanding.
Commit: 6d8b44a506787cd79d0cb82a05d296d6b49d057d
https://github.com/llvm/llvm-project/commit/6d8b44a506787cd79d0cb82a05d296d6b49d057d
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
Log Message:
-----------
[AMDGPU] [IGLP]: Fix assert (#73710)
We can also re-enter IGLP mutation via later `SchedStage`s in the
`GCNMaxOccupancySchedStrategy` . This is sort of NFC in that there is no
changed behavior for the only current client of `IsReentry`
Commit: 2cd43e9d1733e7eb348d1730675379cad5262870
https://github.com/llvm/llvm-project/commit/2cd43e9d1733e7eb348d1730675379cad5262870
Author: Justin Bogner <mail at justinbogner.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
Log Message:
-----------
[SPIR-V] Fix -Wunused-variable warning. NFC
Commit: df3db035d60ca2471d46166c08208c12307d20ef
https://github.com/llvm/llvm-project/commit/df3db035d60ca2471d46166c08208c12307d20ef
Author: Erich Keane <ekeane at nvidia.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseOpenACC.cpp
A clang/test/ParserOpenACC/parse-wait-construct.c
Log Message:
-----------
[OpenACC] Implement 'wait' construct parsing (#74752)
The 'wait' construct comes in two forms: one with no parens, the second
with a 'wait-argument'. This implements both forms for constructs.
Additionally, the 'wait-argument' parsing is split into its own function
because the 'wait clause' can also take the same 'wait-argument'.
Commit: c502a81b439b68cb029e16ca9d444d897b5e7727
https://github.com/llvm/llvm-project/commit/c502a81b439b68cb029e16ca9d444d897b5e7727
Author: Justin Bogner <mail at justinbogner.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/include/clang/Sema/HLSLExternalSemaSource.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
Log Message:
-----------
[HLSL] Add helpers to simplify HLSL resource type declarations. NFC
A few changes to HLSLExternalSemaSource and its BuiltinTypeDeclBuilder
to make defining buffer types less verbose. This will make it a lot
easier to see what the differences between the various buffer types
are once we start introducing more of them.
Pull Request: https://github.com/llvm/llvm-project/pull/73967
Commit: 6e1f19168bca7e3bd4eefda50ba03eac8441dbbf
https://github.com/llvm/llvm-project/commit/6e1f19168bca7e3bd4eefda50ba03eac8441dbbf
Author: Zixu Wang <9819235+zixu-w at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M clang/include/clang/Basic/Features.def
A clang/include/clang/Basic/TargetOSMacros.def
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/PreprocessorOptions.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
A clang/test/Driver/fdefine-target-os-macros.c
Log Message:
-----------
[clang][PP] Add extension to predefine target OS macros (#74676)
Add an extension feature `define-target-os-macros` that enables clang to
provide definitions of common TARGET_OS_* conditional macros. The
extension is enabled in the Darwin toolchain driver.
Commit: ec9e49796d7544e6205806e373e62e1b36f3a491
https://github.com/llvm/llvm-project/commit/ec9e49796d7544e6205806e373e62e1b36f3a491
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_1d_nwc_wcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_55.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nchw_fchw.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d_ndhwc_dhwcf.mlir
Log Message:
-----------
[mlir][sparse] add sparse convolution with 5x5 kernel (#74793)
Also unifies some of the test set up parts in other conv tests
Commit: f5699525005cc85471cbebdab992d5414bb103eb
https://github.com/llvm/llvm-project/commit/f5699525005cc85471cbebdab992d5414bb103eb
Author: Fangrui Song <i at maskray.me>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
Log Message:
-----------
[CSKY] Update shouldForceRelocation after #73721
Commit: efc32f5e06b38b224cbce4df4a633f8c9d46816e
https://github.com/llvm/llvm-project/commit/efc32f5e06b38b224cbce4df4a633f8c9d46816e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Log Message:
-----------
[RISCV] Use Triple::isRISCV64(). NFC
Commit: 4162a9bca42a1152cdf4ae92ff7b90351c10f332
https://github.com/llvm/llvm-project/commit/4162a9bca42a1152cdf4ae92ff7b90351c10f332
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFoldMasks.cpp
M llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
Log Message:
-----------
[RISCV] Cleanup pass initialization.
Remove redundant initializations from pass constructors that were
already being initialized by LLVMInitializeRISCVTarget().
Commit: 8275dc97483347b88a2fa9067446dfb9d7d7f72e
https://github.com/llvm/llvm-project/commit/8275dc97483347b88a2fa9067446dfb9d7d7f72e
Author: Fangrui Song <i at maskray.me>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/test/MC/ELF/reloc-directive.s
Log Message:
-----------
[MC] .reloc: register used symbols
When `sym` in `.reloc ., BFD_RELOC_NONE, sym` is not referenced
elsewhere, `sym` is not in the symbol table and the relocation
references the null symbol. Visit the expression to fix the issue.
Commit: d41368134478d1d41726aa85ba82f49b5bce130c
https://github.com/llvm/llvm-project/commit/d41368134478d1d41726aa85ba82f49b5bce130c
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M openmp/libomptarget/test/offloading/back2back_distribute.c
Log Message:
-----------
[OpenMP][Fix] Fix test array initialization. (#74799)
Fix test array initialization.
Commit: 1216a31cae22e77bc51eac84a0aea8281e40fbaa
https://github.com/llvm/llvm-project/commit/1216a31cae22e77bc51eac84a0aea8281e40fbaa
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M openmp/libomptarget/test/offloading/back2back_distribute.c
Log Message:
-----------
Revert "[OpenMP][Fix] Fix test array initialization. (#74799)" (#74800)
This reverts commit d41368134478d1d41726aa85ba82f49b5bce130c.
Commit: 5fc76e6b6da7986574596134d83872b460c332cc
https://github.com/llvm/llvm-project/commit/5fc76e6b6da7986574596134d83872b460c332cc
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M openmp/libomptarget/test/offloading/back2back_distribute.c
Log Message:
-----------
[OpenMP][Fix] Fix test initialization (#74801)
Fix test initialization
Commit: dc1f2083466023bbd0477528fee6b534e6c1489f
https://github.com/llvm/llvm-project/commit/dc1f2083466023bbd0477528fee6b534e6c1489f
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/TableGen/JSONBackend.cpp
M llvm/unittests/TableGen/AutomataTest.cpp
M llvm/utils/TableGen/GlobalISelMatchTableExecutorEmitter.h
M llvm/utils/TableGen/IntrinsicEmitter.cpp
Log Message:
-----------
[TableGen] Remove unnecessary includes (NFC)
Identified with clangd.
Commit: 286ef12b474c16840076e0689e1886660cc9902e
https://github.com/llvm/llvm-project/commit/286ef12b474c16840076e0689e1886660cc9902e
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
M llvm/lib/Target/AArch64/AArch64SLSHardening.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
Log Message:
-----------
[Target] Remove unnecessary includes (NFC)
Commit: f5724847ec6d7e157f711a590e73895e0f048fc4
https://github.com/llvm/llvm-project/commit/f5724847ec6d7e157f711a590e73895e0f048fc4
Author: Matthias Springer <me at m-sp.org>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
Log Message:
-----------
[mlir][Transforms][NFC] GreedyPatternRewriteDriver: Remove redundant worklist management code (#74796)
Do not add the previous users of replaced ops to the worklist during
`notifyOperationReplaced`.
The previous users are modified inplace as part of
`PatternRewriter::replaceOp`, which calls
`PatternRewriter::replaceAllUsesWith`. The latter function updates all
users with `updateRootInPlace`, which already puts all previous users of
the replaced op on the worklist. No further worklist management work is
needed in the `notifyOperationReplaced` callback.
Commit: 59194253a0edad719c8672889aac91a8a19564b2
https://github.com/llvm/llvm-project/commit/59194253a0edad719c8672889aac91a8a19564b2
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/IR/Dominators.h
M llvm/include/llvm/IR/GetElementPtrTypeIterator.h
Log Message:
-----------
[IR] Remove unnecessary includes (NFC)
Commit: 6ac80a7677952babb5acd0ac57b37e3d217547d3
https://github.com/llvm/llvm-project/commit/6ac80a7677952babb5acd0ac57b37e3d217547d3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
Log Message:
-----------
Apply clang-tidy fixes for readability-identifier-naming in GPUToLLVMConversion.cpp (NFC)
Commit: 345d574b6587ba90e24e5f30f069c8e27645d620
https://github.com/llvm/llvm-project/commit/345d574b6587ba90e24e5f30f069c8e27645d620
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MapMemRefStorageClassPass.cpp
Log Message:
-----------
Apply clang-tidy fixes for llvm-prefer-isa-or-dyn-cast-in-conditionals in MapMemRefStorageClassPass.cpp (NFC)
Commit: 1cef577b907510e9752f02b1ff744f925662cb31
https://github.com/llvm/llvm-project/commit/1cef577b907510e9752f02b1ff744f925662cb31
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
Log Message:
-----------
Apply clang-tidy fixes for llvm-qualified-auto in PredicateTree.cpp (NFC)
Commit: b8a3f0fd3a2827282e12c31b2a2edc23e2c34ef5
https://github.com/llvm/llvm-project/commit/b8a3f0fd3a2827282e12c31b2a2edc23e2c34ef5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
Log Message:
-----------
Apply clang-tidy fixes for llvm-qualified-auto in VectorToGPU.cpp (NFC)
Commit: 847d8457d16a7334ba39bdd35c70faa1b295304d
https://github.com/llvm/llvm-project/commit/847d8457d16a7334ba39bdd35c70faa1b295304d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
Log Message:
-----------
Apply clang-tidy fixes for performance-unnecessary-value-param in VectorToGPU.cpp (NFC)
Commit: 6c87a0af95f9dcd8f35c99f2c2fe175a778e3fe9
https://github.com/llvm/llvm-project/commit/6c87a0af95f9dcd8f35c99f2c2fe175a778e3fe9
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/unittests/Analysis/ValueLatticeTest.cpp
M llvm/unittests/Analysis/VectorUtilsTest.cpp
Log Message:
-----------
[Analysis] Remove unnecessary includes (NFC)
Commit: 9f70e708a7d3fce97d63b626520351501455fca0
https://github.com/llvm/llvm-project/commit/9f70e708a7d3fce97d63b626520351501455fca0
Author: wanglei <wanglei at loongson.cn>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/test/CodeGen/LoongArch/lasx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fdiv.ll
A llvm/test/CodeGen/LoongArch/lsx/fsqrt.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
Log Message:
-----------
[LoongArch] Make ISD::FSQRT a legal operation with lsx/lasx feature (#74795)
And add some patterns:
1. (fdiv 1.0, vector)
2. (fdiv 1.0, (fsqrt vector))
Commit: c8616c724fbddd38117240585242f4ae4db1ff3a
https://github.com/llvm/llvm-project/commit/c8616c724fbddd38117240585242f4ae4db1ff3a
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/BinaryFormat/DynamicTags.def
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/lib/Object/ELF.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
A llvm/test/tools/llvm-readobj/ELF/AArch64/aarch64-feature-pauth.s
M llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test
M llvm/test/tools/llvm-readobj/ELF/dynamic-tags-machine-specific.test
M llvm/test/tools/llvm-readobj/ELF/machine-specific-section-types.test
M llvm/test/tools/llvm-readobj/ELF/relr-relocs.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm-readobj][AArch64][ELF][PAC] Support ELF AUTH constants (#72713)
This patch adds llvm-readobj support for:
- Dynamic R_AARCH64_AUTH_* relocations (including RELR compressed AUTH
relocations) as described here:
https://github.com/ARM-software/abi-aa/blob/main/pauthabielf64/pauthabielf64.rst#auth-variant-dynamic-relocations
- .note.AARCH64-PAUTH-ABI-tag section as defined here
https://github.com/ARM-software/abi-aa/blob/main/pauthabielf64/pauthabielf64.rst#elf-marking
Commit: 28a78e2a4a2c358900aaac1a1eb9efce17a7f5a5
https://github.com/llvm/llvm-project/commit/28a78e2a4a2c358900aaac1a1eb9efce17a7f5a5
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-07 (Thu, 07 Dec 2023)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
Log Message:
-----------
[AMDGPU] Use isNullConstant (NFC)
Commit: 827f8a7ef6ddcade0700311793510e3b3e0829f0
https://github.com/llvm/llvm-project/commit/827f8a7ef6ddcade0700311793510e3b3e0829f0
Author: Sizov Nikita <s.nikita.v at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
Log Message:
-----------
Add opt with ctlz and shifts of power of 2 constants (#74175)
This patch does the following simplifications:
```
cttz(shl(C, X), 1) -> add(cttz(C, 1), X)
cttz(lshr exact(C, X), 1) -> sub(cttz(C, 1), X)
ctlz(lshr(C, X), 1) --> add(ctlz(C, 1), X)
ctlz(shl nuw (C, X), 1) --> sub(ctlz(C, 1), X)
```
Alive2: https://alive2.llvm.org/ce/z/9KHlKc
Closes #41333
Commit: cdc37325669c0321328a7245083c427b229e79e9
https://github.com/llvm/llvm-project/commit/cdc37325669c0321328a7245083c427b229e79e9
Author: wanglei <wanglei at loongson.cn>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fneg.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fneg.ll
Log Message:
-----------
[LoongArch] Mark ISD::FNEG as legal
Commit: 58bdef2be75263a9b6bf93faf3baccc76e31e082
https://github.com/llvm/llvm-project/commit/58bdef2be75263a9b6bf93faf3baccc76e31e082
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lldb/source/Symbol/Variable.cpp
M lldb/test/API/functionalities/location-list-lookup/Makefile
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
R lldb/test/API/functionalities/location-list-lookup/main.c
A lldb/test/API/functionalities/location-list-lookup/main.cpp
Log Message:
-----------
[lldb][Symbol] Make sure we decrement PC before checking location list (#74772)
Commit: 76ee3447699c032237517a64a8eeead5e94faf7e
https://github.com/llvm/llvm-project/commit/76ee3447699c032237517a64a8eeead5e94faf7e
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/test/CXX/drs/dr10xx.cpp
M clang/test/CXX/drs/dr11xx.cpp
M clang/test/CXX/drs/dr12xx.cpp
M clang/test/CXX/drs/dr13xx.cpp
M clang/test/CXX/drs/dr14xx.cpp
M clang/test/CXX/drs/dr15xx.cpp
M clang/test/CXX/drs/dr16xx.cpp
M clang/test/CXX/drs/dr17xx.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/test/CXX/drs/dr19xx.cpp
M clang/test/CXX/drs/dr412.cpp
M clang/test/CXX/drs/dr7xx.cpp
M clang/test/CXX/drs/dr8xx.cpp
M clang/test/CXX/drs/dr9xx.cpp
Log Message:
-----------
[clang][NFC] Refactor expected directives in C++ DRs 700-1999 (#74767)
This patch continues the work started with ea5b1ef016d020c37f903d6c7d4f623be975dab8. See that commit and its
corresponding PR for details.
Commit: c340cf0a353cd6d1090297cf84caf2720d1c7d90
https://github.com/llvm/llvm-project/commit/c340cf0a353cd6d1090297cf84caf2720d1c7d90
Author: xiaoleis-nv <99947620+xiaoleis-nv at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
Log Message:
-----------
Fix argument name of GEPOp builder (#74810)
This MR fix the argument name of GEPOp builder from `basePtrType` to
`elementType` to avoid confusion.
Co-authored-by: Xiaolei Shi <xiaoleis at nvidia.com>
Commit: 24f8bc550646685d4ac263610e4cc010011d6a36
https://github.com/llvm/llvm-project/commit/24f8bc550646685d4ac263610e4cc010011d6a36
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/BinaryFormat/DynamicTags.def
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
M llvm/lib/Object/ELF.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
R llvm/test/tools/llvm-readobj/ELF/AArch64/aarch64-feature-pauth.s
M llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test
M llvm/test/tools/llvm-readobj/ELF/dynamic-tags-machine-specific.test
M llvm/test/tools/llvm-readobj/ELF/machine-specific-section-types.test
M llvm/test/tools/llvm-readobj/ELF/relr-relocs.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
Revert "[llvm-readobj][AArch64][ELF][PAC] Support ELF AUTH constants" (#74816)
Reverts llvm/llvm-project#72713
Buildbot tests fail on clang-armv7-global-isel builder
https://lab.llvm.org/buildbot/#/builders/186/builds/13604
Commit: 292256673c88a27ce548570b19f401f29e4d0ec1
https://github.com/llvm/llvm-project/commit/292256673c88a27ce548570b19f401f29e4d0ec1
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking] Remove unused argument (NFC)
Commit: 52296e25277146bf2643156627971c11cc7f4a37
https://github.com/llvm/llvm-project/commit/52296e25277146bf2643156627971c11cc7f4a37
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Analysis/DomConditionCache.cpp
Log Message:
-----------
[DomCondCache] Remove unused variable (NFC)
Commit: cf2d625a5d328ab4af6292be7b47c645ffef0e2b
https://github.com/llvm/llvm-project/commit/cf2d625a5d328ab4af6292be7b47c645ffef0e2b
Author: Amir Bishara <139038766+amirBish at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
Log Message:
-----------
[mlir][linalg] Expose getPreservedProducerResults method from ElementwiseOpFusion file (#73850)
Declare `getPreservedProducerResults` function which helps to get the
preserved results of the producer linalg generic operation as a result
of elementwise fusion.
Commit: dabf8490a9ad0b8bcfd21f74b1f76ba5cdb493c9
https://github.com/llvm/llvm-project/commit/dabf8490a9ad0b8bcfd21f74b1f76ba5cdb493c9
Author: Ramkumar Ramachandra <r at artagnon.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/docs/MIRLangRef.rst
Log Message:
-----------
MIRLangRef: fix llc invocation lines to write output (#74104)
The first couple of llc invocations mentioned in the document are wrong,
and users will get confused about no output being written. Fix them.
Commit: b0f560b8ea5782eff83b7646f713405eaafd9c73
https://github.com/llvm/llvm-project/commit/b0f560b8ea5782eff83b7646f713405eaafd9c73
Author: Ramkumar Ramachandra <r at artagnon.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
Log Message:
-----------
LoopVectorize/test: fix opt invocations with -march (NFC) (#74462)
opt accepts the -march command-line argument, but this argument only
makes sense in conjunction with -mtriple. Fix a couple of tests under
LoopVectorize that invoke opt with -march but without -mtriple, to avoid
confusing users.
Commit: 11a7e5781c6363ca3061f57f3aa7e49164673821
https://github.com/llvm/llvm-project/commit/11a7e5781c6363ca3061f57f3aa7e49164673821
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
Log Message:
-----------
[lldb][test] TestLocationListLookup.py: skip expr check on unsupported platforms (#74818)
The `expect_expr` check was introduced in
https://github.com/llvm/llvm-project/pull/74772. It is failing on Linux
and Windows, so skip this test to unblock the bots
Commit: d0d5ef8133a169b23359da5b1e77475dd33b370b
https://github.com/llvm/llvm-project/commit/d0d5ef8133a169b23359da5b1e77475dd33b370b
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/vector-call-linear-args.ll
Log Message:
-----------
[LV] Add support for linear arguments for vector function variants (#73941)
If we have vectorized variants of a function which take linear
parameters, we should be able to vectorize assuming the strides match.
Commit: cf47af493b1288b453a77a4b66959c6ee7a85c34
https://github.com/llvm/llvm-project/commit/cf47af493b1288b453a77a4b66959c6ee7a85c34
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Analysis/ValueTracking/knownbits-and-or-xor-lowbit.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
Log Message:
-----------
[InstCombine] Generalize folds for inversion of icmp operands (#74317)
We have a bunch of folds that basically perform X pred Y to ~Y pred ~X
for various special cases where this saves an instruction.
Generalize these folds to use isFreeToInvert(). We have to make sure
that we consume an instruction in either of the inversions, otherwise
we're just going to swap the icmp back and forth.
Fixes https://github.com/llvm/llvm-project/issues/74302.
Commit: 901c5be524a52ea3a156abacff84d08190b48140
https://github.com/llvm/llvm-project/commit/901c5be524a52ea3a156abacff84d08190b48140
Author: Valery Pykhtin <valery.pykhtin at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/test/CodeGen/AMDGPU/regpressure_printer.mir
Log Message:
-----------
[AMDGPU] Fix GCNUpwardRPTracker: max register pressure on defs. (#74422)
Treat a defined register as fully live "at" the instruction and update maximum pressure accordingly. Fixes #3786.
Commit: 8859a4f630cb90d28f5dab993aa4aef0e915cd74
https://github.com/llvm/llvm-project/commit/8859a4f630cb90d28f5dab993aa4aef0e915cd74
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr74736.ll
Log Message:
-----------
[X86] LowerBUILD_VECTOR - don't use insert_element(constant, elt, idx) if we have a freeze(undef) element
Fixes #74736
Commit: ea85345eb69f751fdfd793016c854605f14f9dfc
https://github.com/llvm/llvm-project/commit/ea85345eb69f751fdfd793016c854605f14f9dfc
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
Log Message:
-----------
[RISCV][NFC] Use raw_svector_ostream to construct key of SubtargetMap (#72964)
To simplify some code.
Commit: e33302fa1279d0a15aac18eca3f0311669bfe328
https://github.com/llvm/llvm-project/commit/e33302fa1279d0a15aac18eca3f0311669bfe328
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
Log Message:
-----------
Revert "[lldb][test] TestLocationListLookup.py: skip expr check on unsupported platforms (#74818)"
This reverts commit 11a7e5781c6363ca3061f57f3aa7e49164673821.
Test fails: https://lab.llvm.org/buildbot/#/builders/219/builds/7416 and
others.
Commit: b43ab182040f7c3b43e37ade7af600af1c9b3dfd
https://github.com/llvm/llvm-project/commit/b43ab182040f7c3b43e37ade7af600af1c9b3dfd
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
Log Message:
-----------
Reapply "[lldb][test] TestLocationListLookup.py: skip expr check on unsupported platforms (#74818)"
This reverts commit e33302fa1279d0a15aac18eca3f0311669bfe328.
there is a fix already, sorry for the noise
Commit: 633fe60149ece4bd7f4efe5e945b7982d130254a
https://github.com/llvm/llvm-project/commit/633fe60149ece4bd7f4efe5e945b7982d130254a
Author: Florian Hahn <flo at fhahn.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Print flags for VPWidenCastRecipe.
Update VPWidenCastRecipe to also print flags. Simplify nneg printing
test and replace hard-coded value number references with patterns.
Commit: bdacd56fd1f4825cfe19cf8de0cf24a3d1ff18fa
https://github.com/llvm/llvm-project/commit/bdacd56fd1f4825cfe19cf8de0cf24a3d1ff18fa
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/array-coor.fir
M flang/test/Fir/arrexp.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/coordinateof.fir
M flang/test/Fir/tbaa.fir
Log Message:
-----------
[flang][CodeGen] add nsw to address calculations (#74709)
`nsw` is a flag for LLVM arithmetic operations meaning "no signed wrap".
If this keyword is present, the result of the operation is a poison
value if overflow occurs. Adding this keyword permits LLVM to re-order
integer arithmetic more aggressively.
In
https://discourse.llvm.org/t/rfc-changes-to-fircg-xarray-coor-codegen-to-allow-better-hoisting/75257/16
@vzakhari observed that adding nsw is useful to enable hoisting of
address calculations after some loops (or is at least a step in that
direction).
Classic flang also adds nsw to address calculations.
Commit: faecc736e2ac3cd8c77bebf41b1ed2e2d8cb575f
https://github.com/llvm/llvm-project/commit/faecc736e2ac3cd8c77bebf41b1ed2e2d8cb575f
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/ARM/vector-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
Log Message:
-----------
[DAG] isSplatValue - node is a splat if all demanded elts have the same whole constant value (#74443)
Commit: c90cb6eee8296953c097fcc9fc6e61f739c0dad3
https://github.com/llvm/llvm-project/commit/c90cb6eee8296953c097fcc9fc6e61f739c0dad3
Author: taalhaataahir0102 <77788288+taalhaataahir0102 at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lldb/include/lldb/Core/Address.h
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Symbol/Symbol.h
M lldb/include/lldb/Symbol/SymbolContext.h
M lldb/include/lldb/Utility/Stream.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/Address.cpp
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Symbol/Symbol.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Utility/Stream.cpp
A lldb/test/Shell/Commands/command-image-lookup-color.test
Log Message:
-----------
[lldb] colorize symbols in image lookup with a regex pattern (#69422)
Fixes https://github.com/llvm/llvm-project/issues/57372
Previously some work has already been done on this. A PR was generated
but it remained in review:
https://reviews.llvm.org/D136462
In short previous approach was following:
Changing the symbol names (making the searched part colorized) ->
printing them -> restoring the symbol names back in their original form.
The reviewers suggested that instead of changing the symbol table, this
colorization should be done in the dump functions itself. Our strategy
involves passing the searched regex pattern to the existing dump
functions responsible for printing information about the searched
symbol. This pattern is propagated until it reaches the line in the dump
functions responsible for displaying symbol information on screen.
At this point, we've introduced a new function called
"PutCStringColorHighlighted," which takes the searched pattern, a prefix and suffix,
and the text and applies colorization to highlight the pattern in the
output. This approach aims to streamline the symbol search process to
improve readability of search results.
Co-authored-by: José L. Junior <josejunior at 10xengineers.ai>
Commit: ffd61c1e96e9c8a472f305585930b45be0d639d3
https://github.com/llvm/llvm-project/commit/ffd61c1e96e9c8a472f305585930b45be0d639d3
Author: David Spickett <david.spickett at linaro.org>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lldb/source/Core/Address.cpp
M lldb/source/Symbol/Symbol.cpp
Log Message:
-----------
[lldb] Add missing nullptr checks when colouring symbol output
This adds some checks missed by c90cb6eee8296953c097fcc9fc6e61f739c0dad3,
probably because some tests only run on certain platforms.
Commit: 5f91335a55cd65dda8351f85b93eeaa7493e06c4
https://github.com/llvm/llvm-project/commit/5f91335a55cd65dda8351f85b93eeaa7493e06c4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512fp16-arith.ll
M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
M llvm/test/CodeGen/X86/gfni-rotates.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/vec_fcopysign.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
M llvm/test/CodeGen/X86/vector-shuffle-v192.ll
Log Message:
-----------
[X86] canonicalizeBitSelect - always use VPTERNLOGD for sub-32bit types
We were using VPTERNLOGQ for everything but i32 types, which made broadcasts wider than necessary
Noticed in #73509
Commit: 1d6a678591076f316bfcaa03a55beba20406dc00
https://github.com/llvm/llvm-project/commit/1d6a678591076f316bfcaa03a55beba20406dc00
Author: XiangZhang <xiang.zhang at iluvatar.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
A llvm/test/Transforms/LoopUnroll/loop-branch-folding.ll
Log Message:
-----------
[LoopUnroll] Make use of MaxTripCount for loops with "#pragma unroll" (#74703)
Fix loop unroll fail caused by branches folding.
For example:
SimplifyCFG foldloop branches then cause loop unroll failed for "#program unroll" loop.
```
#program unroll
for (int I = 0; I < ConstNum; ++I) { // folding "I < ConstNum" and "Cond2"
if (Cond2) {
break;
}
xxx loop body;
}
```
The pragma unroll metadata only takes effect if there is an exact trip
count, but not if there is an upper bound trip count. This patch make it
work with an upper bound trip count as well in shouldPragmaUnroll().
Loop unroll is important in stack nervous devices (e.g. GPU, and that is
why a lot of GPU code mark loop with "#program unroll").
It usually much simplify the address (offset) calculations in old
iterations, then we can do a lot of others optimizations, e.g, SROA, for
these simplifed address (escape alloca the whole aggregates).
Commit: 9017229ecda119e7977739dcab125e455289ade6
https://github.com/llvm/llvm-project/commit/9017229ecda119e7977739dcab125e455289ade6
Author: Clement Courbet <courbet at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
[llvm-exegesis]Allow clients to do their own snippet running error ha… (#74711)
…ndling.
Returns an error *and* a benchmark rather than an error *or* a
benchmark. This allows users to have custom error handling while still
being able to inspect the benchmark.
Apart from this small API change, this is an NFC.
This is an alternative to #74211.
Commit: 69a0a3be0185ce3bc0458b0047795e8ebfe95abd
https://github.com/llvm/llvm-project/commit/69a0a3be0185ce3bc0458b0047795e8ebfe95abd
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/cmake/modules/MLIRConfig.cmake.in
Log Message:
-----------
[mlir] Add missing MLIR_ENABLE_EXECUTION_ENGINE option to MLIRConfig.cmake.in
This is the kind of options that downstream consumers of preconfigured MLIR
packages can check to see if the execution engine is available or not.
Commit: 5ea6a3fc6d64d593f447e306c3a9d39e9924ea58
https://github.com/llvm/llvm-project/commit/5ea6a3fc6d64d593f447e306c3a9d39e9924ea58
Author: Florian Hahn <flo at fhahn.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vfabi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/uniform-args-call-variants.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
Log Message:
-----------
[VPlan] Compute scalable VF in preheader for induction increment. (#74762)
UF * VF is loop invariant and can be computed directly in the preheader.
This prepares the code for #74761 and reduces the test changes.
Commit: 22fbd07bd768e7a7289815846ba37accd5dab9bd
https://github.com/llvm/llvm-project/commit/22fbd07bd768e7a7289815846ba37accd5dab9bd
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineLoad - consistently use cast<MemSDNode>. NFCI.
getBasePtr()/getMemoryVT() are common methods for all memory nodes.
Commit: 5c4c199fe3cab5c1d3dd588a420817ec7877d794
https://github.com/llvm/llvm-project/commit/5c4c199fe3cab5c1d3dd588a420817ec7877d794
Author: Saiyedul Islam <Saiyedul.Islam at amd.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lld/test/ELF/emulation-amdgpu.s
M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
M llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
Log Message:
-----------
[AMDGPU][NFC] Improve testing for AMDHSA ABI Version (#74300)
Add tests for COV4 as well as COV5 instead of only testing for the
default version.
Commit: 2a0314f153b3fdc6d8b51d35c2e4a4bb67dfcaef
https://github.com/llvm/llvm-project/commit/2a0314f153b3fdc6d8b51d35c2e4a4bb67dfcaef
Author: Jay Foad <jay.foad at amd.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
Log Message:
-----------
[GlobalISel] Fix comment on buildIsFPClass
Commit: c1cfa1757c208cd15efec3541aadea6bec52092d
https://github.com/llvm/llvm-project/commit/c1cfa1757c208cd15efec3541aadea6bec52092d
Author: David Sherwood <57997763+david-arm at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CodeGenTBAA.cpp
A clang/test/CodeGen/tbaa.c
Log Message:
-----------
[Clang] Emit TBAA info for enums in C (#73326)
When emitting TBAA information for enums in C code we currently just
treat the data as an 'omnipotent char'. However, with C strict aliasing
this means we fail to optimise certain cases. For example, in the
SPEC2017 xz benchmark there are structs that contain arrays of enums,
and clang pessmistically assumes that accesses to those enums could
alias with other struct members that have a different type.
According to
https://en.cppreference.com/w/c/language/enum
enums should be treated as 'int' types unless explicitly specified (C23)
or if 'int' would not be large enough to hold all the enumerated values.
In the latter case the compiler is free to choose a suitable integer
that would hold all such values.
When compiling C code this patch generates TBAA information for the enum
by using an equivalent integer of the size clang has already chosen for
the enum. I have ignored C++ for now because the rules are more complex.
New test added here:
clang/test/CodeGen/tbaa.c
Commit: e38c29c2b7769c255e4976742b6ed51f7f6f576a
https://github.com/llvm/llvm-project/commit/e38c29c2b7769c255e4976742b6ed51f7f6f576a
Author: Jay Foad <jay.foad at amd.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
Log Message:
-----------
[AMDGPU] Add GFX11 test coverage to integer-mad-patterns.ll
Commit: 06ebe3b2372fce68b6f47434d02b93239d27a0c4
https://github.com/llvm/llvm-project/commit/06ebe3b2372fce68b6f47434d02b93239d27a0c4
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
Log Message:
-----------
[NVPTX] Fix a typo that makes the output invalid PTX
It's surprisingly tricky to trigger this as it's only used by abs/neg
which expand into and/xor in the integer domain.
Commit: ce3c7c09100803608177459b4d923f17742885f9
https://github.com/llvm/llvm-project/commit/ce3c7c09100803608177459b4d923f17742885f9
Author: David Spickett <david.spickett at linaro.org>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lldb/test/Shell/Commands/command-image-lookup-color.test
Log Message:
-----------
[lldb][test] Don't check line number in image lookup colour test
We can assume the correct symbol is found, so putting the line
number here is just going to confuse anyone extending these tests.
Commit: 810d09faf89af53025205c540ef9980e2286e687
https://github.com/llvm/llvm-project/commit/810d09faf89af53025205c540ef9980e2286e687
Author: David Spickett <david.spickett at linaro.org>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lldb/test/Shell/Commands/command-image-lookup-color.test
Log Message:
-----------
[lldb][test] Disable image lookup colour test on Windows
On Linux `main.c` shows up in the symbol search but this is not the
case on Windows according to:
https://lab.llvm.org/buildbot/#/builders/219/builds/7422/steps/6/logs/stdio
It's possible we could make this test work there once function
search highlighting is implemented.
Commit: 61f18255fab3c404dc43a59091a750c22e5d0ccb
https://github.com/llvm/llvm-project/commit/61f18255fab3c404dc43a59091a750c22e5d0ccb
Author: David Spickett <david.spickett at linaro.org>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M lldb/test/Shell/Commands/command-image-lookup-color.test
Log Message:
-----------
[lldb][test] Disable image lookup colour test on Mac OS
I think it can work there but we need to correct the CHECK lines.
```
command-image-lookup-color.test:34:11: error: CHECK7: expected string not found in input
^
```
https://green.lab.llvm.org/green/view/LLDB/job/as-lldb-cmake/10880/testReport/
I don't have a way to see the full output.
Commit: d5e2cbd01a17edeb56aad2f161c76ce3f854676f
https://github.com/llvm/llvm-project/commit/d5e2cbd01a17edeb56aad2f161c76ce3f854676f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/builtin-functions.cpp
M clang/test/Sema/builtin-expect-with-probability.cpp
Log Message:
-----------
[clang][Interp] Implement builtin_expect (#69713)
Commit: c64385cc8c9d05ee70a6d7c03a8c5f312f63060f
https://github.com/llvm/llvm-project/commit/c64385cc8c9d05ee70a6d7c03a8c5f312f63060f
Author: Paul Walker <paul.walker at arm.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/AsmParser/LLParser.h
Log Message:
-----------
[NFC][LLVM] clang-format "struct ValID" within LLParser.h.
Commit: 9b154dad5b465bfc45b962488682ed4f95e049a3
https://github.com/llvm/llvm-project/commit/9b154dad5b465bfc45b962488682ed4f95e049a3
Author: erichkeane <ekeane at nvidia.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/lib/Parse/ParseOpenACC.cpp
Log Message:
-----------
[OpenACC][NFC] Change Readonly token check to use isSpecialTokenKind
As brought up in a previous review, instead of checking a token's
spelling in text everywhere, we added a 'special token kind'.
This adds the only other use of a special kind to use the checking
function instead.
Commit: bdb5b4421593d61c454abf3148aabcd4c2ff7811
https://github.com/llvm/llvm-project/commit/bdb5b4421593d61c454abf3148aabcd4c2ff7811
Author: jeanPerier <jperier at nvidia.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/test/Lower/HLFIR/implicit-type-conversion-allocatable.f90
Log Message:
-----------
[flang] Fix length handling in character kind implicit conversion (#74586)
When assigning to a whole allocatable, lowering is dealing with the
implicit conversion to preserve the RHS lower bounds. In case of
character KIND mismatch, the code was setting the new RHS length to the
one from the LHS, which is wrong for two reasons:
- no padding/truncation was actually done in the conversion
- the RHS length should anyway not be touched since the one from the
allocatable LHS may change to become the one of the RHS.
Update the code to preserve the RHS type length when materializing the
implicit character KIND conversion.
Commit: 8908296b62ee8ec1fc4db87b67dcefc2873111bd
https://github.com/llvm/llvm-project/commit/8908296b62ee8ec1fc4db87b67dcefc2873111bd
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libc++][NFC] Move 32-bit pointer Lit feature check where it belongs
It was previously defined in the block where we defined back-deployment
features.
Commit: cf029a22bd0c87bb475ee0440e9085bb96c7e011
https://github.com/llvm/llvm-project/commit/cf029a22bd0c87bb475ee0440e9085bb96c7e011
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Add some more multi-use icmp gep folding tests (NFC)
Commit: 4a2a6397f11da7c15a73d19fb1e6c9dcd1ceb5af
https://github.com/llvm/llvm-project/commit/4a2a6397f11da7c15a73d19fb1e6c9dcd1ceb5af
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Relax one-use check for icmp of gep fold
Instead of checking whether the GEP as a whole is constant, only
check whether it has constant incides. This matches what we do in
other places in this code.
This has little practical impact, because it is mostly already
handled through other cases anyway. We see a difference for
non-inbounds equality comparisons.
Commit: b8f7c2ce89d6da34eb68fde76eec9bbdaed87619
https://github.com/llvm/llvm-project/commit/b8f7c2ce89d6da34eb68fde76eec9bbdaed87619
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
Log Message:
-----------
[libc][NFC] Clean up conversion warnings in math function implementations. (#74697)
Commit: 3894a11acd1c8907c4d8a19a96d1ea398463af65
https://github.com/llvm/llvm-project/commit/3894a11acd1c8907c4d8a19a96d1ea398463af65
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - handle the load combines in the same place
The intention is to merge some of the concat folds of vector constant data to address some of the remaining regressions in #73509
Commit: c65d8c71878361d441008a85f0c99305d9e3aff8
https://github.com/llvm/llvm-project/commit/c65d8c71878361d441008a85f0c99305d9e3aff8
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/lib/Dialect/Utils/IndexingUtils.cpp
M mlir/test/Dialect/MemRef/expand-strided-metadata.mlir
Log Message:
-----------
[mlir][memref] extract_strided_metadata for zero-sized memref (#74835)
Commit: 273a90c97d160a45859335a6fd9abf7602b975e5
https://github.com/llvm/llvm-project/commit/273a90c97d160a45859335a6fd9abf7602b975e5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
[libc++][NFC] Add _VSTD renaming commit to git-blame-ignore-revs
Commit: 8758e648da5f3565dde6c00800008f2509526b6c
https://github.com/llvm/llvm-project/commit/8758e648da5f3565dde6c00800008f2509526b6c
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/test/CodeGen/arm-target-features.c
M clang/test/Driver/arm-cortex-cpus-2.c
M clang/test/Misc/target-invalid-cpu-note.c
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/lib/Target/ARM/ARM.td
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/TargetParser/Host.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[ARM][AArch32] Add support for AArch32 Cortex-M52 CPU (#74822)
Cortex-M52 is an Armv8.1 AArch32 CPU.
Technical specifications available at:
https://developer.arm.com/processors/cortex-m52
Commit: 23dc248ef02366ab33d3c2f99936ed75b1505b24
https://github.com/llvm/llvm-project/commit/23dc248ef02366ab33d3c2f99936ed75b1505b24
Author: CarolineConcatto <51754594+CarolineConcatto at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
Log Message:
-----------
[Clang][SVE2p1]Add svboolx2 and svboolx4 types for svcreate, svget, s… (#74594)
…vset
According to the PR#257[1]
[1]ARM-software/acle#257
Co-authored by: Matthew Devereau <matthew.devereau at arm.com>
Commit: 11dfb3cb3237a081ad711b06f1e8efbc7fff7a81
https://github.com/llvm/llvm-project/commit/11dfb3cb3237a081ad711b06f1e8efbc7fff7a81
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp
Log Message:
-----------
Work around an ICE in MSVC; NFC
Commit: 3bba53854a21177b5423f9212343ecec6316e4bf
https://github.com/llvm/llvm-project/commit/3bba53854a21177b5423f9212343ecec6316e4bf
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/IR/AsmWriter.cpp
M llvm/test/Assembler/named-metadata.ll
Log Message:
-----------
[AsmWriter] Use unsigned char more consistently
On platforms where char is signed, the ">> 4" shift will produce
incorrect results. We were already working on unsigned char for
most characters, but not for the first one.
Fixes https://github.com/llvm/llvm-project/issues/74732.
Commit: 9349204a10b2502a6998a0276e3b3c0b8fc047c5
https://github.com/llvm/llvm-project/commit/9349204a10b2502a6998a0276e3b3c0b8fc047c5
Author: Diego Caballero <diegocaballero at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[GitHub] Add some default reviewers for mlir/Vector and mlir/Linalg (#74848)
Commit: 0c9a20b0a1c8343136cf105db2b389d53cc2aba1
https://github.com/llvm/llvm-project/commit/0c9a20b0a1c8343136cf105db2b389d53cc2aba1
Author: Nicolas Vasilache <nicolasvasilache at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
Update CODEOWNERS
Commit: ab8598e088dc406f0cd30f34aa8b08f98e73c652
https://github.com/llvm/llvm-project/commit/ab8598e088dc406f0cd30f34aa8b08f98e73c652
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/IR/Type.cpp
Log Message:
-----------
[IR] Remove unnecessary pointer type check (NFC)
With opaque pointers, the address spaces will only be the same if
the types are the same, in which case this would have been handled
at the start of the method already.
Commit: 46a56931251eba767929f6a2110da5b1bcbc5eb9
https://github.com/llvm/llvm-project/commit/46a56931251eba767929f6a2110da5b1bcbc5eb9
Author: Kazu Hirata <kazu at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp
Log Message:
-----------
[FlowSensitive] Fix warnings
This patch fixes:
clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp:376:22: error:
comparison of integers of different signs: 'unsigned int' and
'TokenInfo::(unnamed enum at
clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp:356:7)'
[-Werror,-Wsign-compare]
clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp:385:23: error:
comparison of integers of different signs: 'unsigned int' and
'TokenInfo::(unnamed enum at
clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp:356:7)'
[-Werror,-Wsign-compare]
etc
Commit: 7686d4951712468e354350b6d26aa70d052c8db4
https://github.com/llvm/llvm-project/commit/7686d4951712468e354350b6d26aa70d052c8db4
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstSimplify/returned.ll
Log Message:
-----------
[ValueTracking] Handle returned attribute with mismatched type
The returned attribute can be used when it is possible to
"losslessly bitcast" between the argument and return type,
including between two vector types.
computeKnownBits() would crash in this case, isKnownNonZero()
would potentially produce a miscompile.
Fixes https://github.com/llvm/llvm-project/issues/74722.
Commit: a2b7ded40ca486ea8a6b5a4b025d9d48e31bfca6
https://github.com/llvm/llvm-project/commit/a2b7ded40ca486ea8a6b5a4b025d9d48e31bfca6
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M libc/src/__support/UInt.h
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/uint_test.cpp
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
Log Message:
-----------
[libc] Make BigInt bit_cast-able to compatible types (#74837)
Fix #74258
Commit: d5199b43bee5af88994b568447dc16ae967aac0c
https://github.com/llvm/llvm-project/commit/d5199b43bee5af88994b568447dc16ae967aac0c
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M libc/src/__support/UInt.h
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/uint_test.cpp
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
Log Message:
-----------
Revert "[libc] Make BigInt bit_cast-able to compatible types" (#74856)
Reverts llvm/llvm-project#74837
Some build bot are failing because of missing constexpr.
https://lab.llvm.org/buildbot/#/builders/138/builds/56468/steps/7/logs/stdio
Commit: a87738f86b17f4a8dcde538c60826506e2a27ed1
https://github.com/llvm/llvm-project/commit/a87738f86b17f4a8dcde538c60826506e2a27ed1
Author: Nikita Popov <npopov at redhat.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/test/Assembler/struct-ret-without-upgrade.ll
Log Message:
-----------
[AutoUpgrade] Don't try to upgrade struct return of non-intrinsic
This code should only be run for intrinsics known to LLVM (otherwise
it will crash), not for everything that starts with "llvm.".
Commit: 435ba72afda756183a1ddc7a3a160152ad630951
https://github.com/llvm/llvm-project/commit/435ba72afda756183a1ddc7a3a160152ad630951
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/test/CodeGen/SystemZ/atomicrmw-add-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-and-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-and-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-nand-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-or-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-sub-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xchg-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xchg-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
Log Message:
-----------
[SystemZ] Simplify handling of AtomicRMW instructions. (#74789)
Let the AtomicExpand pass do more of the job of expanding
AtomicRMWInst:s in order to simplify the handling in the backend.
The only cases that the backend needs to handle itself are those of
subword size (8/16 bits) and those directly corresponding to a target
instruction.
Commit: cb6c0934339c8fb8a00326fbacc46dfdf082e9bb
https://github.com/llvm/llvm-project/commit/cb6c0934339c8fb8a00326fbacc46dfdf082e9bb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineConcatVectorOps - pull out repeated getTargetLoweringInfo calls. NFC.
Commit: 49b27b150b97c190dedf8b45bf991c4b811ed953
https://github.com/llvm/llvm-project/commit/49b27b150b97c190dedf8b45bf991c4b811ed953
Author: Dinar Temirbulatov <Dinar.Temirbulatov at arm.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
Log Message:
-----------
[AArch64][SME2] Add builtins to cast svbool from/to svcount. (#74720)
Add builtin: 'svreinterpret_b' to cast from svcount_t to svbool_t.
Add builtin: 'svreinterpret_c' to cast from svbool_t to svcount_t.
Patch by: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Commit: 31316b3f8511d659cc14ebc72fb2b226f78478a9
https://github.com/llvm/llvm-project/commit/31316b3f8511d659cc14ebc72fb2b226f78478a9
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M libc/src/__support/UInt.h
M libc/src/__support/float_to_string.h
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/uint_test.cpp
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
Log Message:
-----------
[reland][libc] Make BigInt bit_cast-able to compatible types (#74862)
Fix #74258
This is a reland of #74837, the error went unnoticed because it compiles
fine on
clang-16 but not on clang-12 which is the version used on the buildbots.
The fix was to explicitly initialize `BigInt` variables in `constexpr`
operations: `BigInt<Bits, Signed> result(0);` instead of `BigInt<Bits,
Signed> result;`
Commit: b842b1b65aab3bff2c3dbf439054aa8fe63f8400
https://github.com/llvm/llvm-project/commit/b842b1b65aab3bff2c3dbf439054aa8fe63f8400
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/test/Driver/hip-offload-compress-zlib.hip
M clang/test/Driver/hip-offload-compress-zstd.hip
Log Message:
-----------
Fix tests hip-offload-compress-zlib/zstd.hip (#74783)
Use %t in output file name as %T is non-unique.
Commit: f7250179e22ce4aab96166493b27223fa28c2181
https://github.com/llvm/llvm-project/commit/f7250179e22ce4aab96166493b27223fa28c2181
Author: Frederik Harwath <frederik at harwath.name>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/test/Conversion/MathToLibm/convert-to-libm.mlir
Log Message:
-----------
Implement acos operator in MLIR Math Dialect (#74584)
Required for torch-mlir.
Cf. llvm/torch-mlir#2604 "Implement torch.aten.acos".
Commit: a539a090009378ecfcfbfaaa280eeac8f5b9d695
https://github.com/llvm/llvm-project/commit/a539a090009378ecfcfbfaaa280eeac8f5b9d695
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M libc/src/__support/float_to_string.h
Log Message:
-----------
[libc] Fix missing UInt initialization (#74869)
Fix forward for #74862
Commit: baa192ea6593499325655021f30d1379fda330e4
https://github.com/llvm/llvm-project/commit/baa192ea6593499325655021f30d1379fda330e4
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.h
M mlir/test/Dialect/SparseTensor/sparse_conv_2d_slice_based.mlir
Log Message:
-----------
[mlir][sparse] optimize memory loads to SSA values when generating sp… (#74787)
…arse conv.
Commit: 965fe352a770134968538cf9a0818016b7c3c7f6
https://github.com/llvm/llvm-project/commit/965fe352a770134968538cf9a0818016b7c3c7f6
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M libcxx/test/std/time/time.syn/formatter_tests.h
M libcxx/test/support/concat_macros.h
Log Message:
-----------
[libc++][test] Adds transcode option. (#73395)
This should make it easier to get better output when wchar_t tests fail.
The code is based on the Unicode transcoding in `<format>`.
Differential Revision: https://reviews.llvm.org/D150593
Commit: 731361cd1540d0e729633833e6f3a670443c4b84
https://github.com/llvm/llvm-project/commit/731361cd1540d0e729633833e6f3a670443c4b84
Author: erichkeane <ekeane at nvidia.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-constructs.c
Log Message:
-----------
[OpenACC] Fix bug with directive name being a 'special token'
If the 'directive name' is a special token instead of an identifier, we
end up asserting. This fixes that.
Commit: 5507f70cc205a7ec21d264a64c703b3d314b998c
https://github.com/llvm/llvm-project/commit/5507f70cc205a7ec21d264a64c703b3d314b998c
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation.h
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/Instrumentation.cpp
M llvm/test/Instrumentation/InstrProfiling/icall-comdat.ll
Log Message:
-----------
[InstrProf][X86] Mark non-directly accessed globals as large (#74778)
We'd like to make various instrprof globals large to make them not
contribute to relocation pressure since there are no direct accesses
to them in the module.
Similar to what was done for asan_globals in #74514.
This affects the __llvm_prf_vals, __llvm_prf_vnds, and __llvm_prf_names
sections.
Commit: bbb8a0df7367068e1cf2fc54edd376beb976b430
https://github.com/llvm/llvm-project/commit/bbb8a0df7367068e1cf2fc54edd376beb976b430
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaCXX/cxx1z-copy-omission.cpp
Log Message:
-----------
[Clang] Fix ResolveConstructorOverload to not select a conversion function if we are going use copy elision
ResolveConstructorOverload needs to check properly if we are going to use copy
elision we can't use a conversion function.
This fixes:
https://github.com/llvm/llvm-project/issues/39319
https://github.com/llvm/llvm-project/issues/60182
https://github.com/llvm/llvm-project/issues/62157
https://github.com/llvm/llvm-project/issues/64885
https://github.com/llvm/llvm-project/issues/65568
Differential Revision: https://reviews.llvm.org/D148474
Commit: 96a5135e567a1eaf284706359f0e51efa3db3d51
https://github.com/llvm/llvm-project/commit/96a5135e567a1eaf284706359f0e51efa3db3d51
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation.h
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/Instrumentation.cpp
M llvm/test/Instrumentation/InstrProfiling/icall-comdat.ll
Log Message:
-----------
Revert "[InstrProf][X86] Mark non-directly accessed globals as large (#74778)"
This reverts commit 5507f70cc205a7ec21d264a64c703b3d314b998c.
Breaks bots, e.g. https://lab.llvm.org/buildbot/#/builders/232/builds/16374
Commit: 66b919cb29494bca987138a23ef8f0b68bfe9d3c
https://github.com/llvm/llvm-project/commit/66b919cb29494bca987138a23ef8f0b68bfe9d3c
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/Transforms/Instrumentation.h
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/Instrumentation.cpp
M llvm/test/Instrumentation/InstrProfiling/icall-comdat.ll
M llvm/test/Instrumentation/InstrProfiling/platform.ll
Log Message:
-----------
Reland [InstrProf][X86] Mark non-directly accessed globals as large (#74778)
We'd like to make various instrprof globals large to make them not
contribute to relocation pressure since there are no direct accesses
to them in the module.
Similar to what was done for asan_globals in #74514.
This affects the __llvm_prf_vals, __llvm_prf_vnds, and __llvm_prf_names
sections.
The reland fixes platform.ll.
Commit: 94c837345c27e173284a85471d4efda19eded08e
https://github.com/llvm/llvm-project/commit/94c837345c27e173284a85471d4efda19eded08e
Author: Paul Walker <paul.walker at arm.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
Log Message:
-----------
[NFC] A few whitespace changes.
Commit: 6f9cb9a75ce20db2ee85cd22ddadc3bed2c450c0
https://github.com/llvm/llvm-project/commit/6f9cb9a75ce20db2ee85cd22ddadc3bed2c450c0
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vaarg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vaarg-rv64.mir
Log Message:
-----------
[RISCV][GISEL] Legalize G_VAARG through expansion. (#73065)
G_VAARG can be expanded similiar to SelectionDAG::expandVAArg through
LegalizerHelper::lower. This patch implements the lowering through this
style of expansion.
The expansion gets the head of the va_list by loading the pointer to
va_list. Then, the head of the list is adjusted depending on argument
alignment information. This gives a pointer to the element to be read
out of the va_list. Next, the head of the va_list is bumped to the next
element in the list. The new head of the list is stored back to the
original pointer to the head of the va_list so that subsequent G_VAARG
instructions get the next element in the list. Lastly, the element is
loaded from the alignment adjusted pointer constructed earlier.
This change is stacked on #73062.
Commit: a341e177cea1cee800793d357264f6f46a3b4979
https://github.com/llvm/llvm-project/commit/a341e177cea1cee800793d357264f6f46a3b4979
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread safety analysis: Fix a bug in handling temporary constructors (#74020)
Extends the lifetime of the map `ConstructedObjects` to be of the
whole CFG so that the map can connect temporary Ctor and Dtor in
different CFG blocks.
Commit: 3810342e90c6206259817d98ac305db2be829285
https://github.com/llvm/llvm-project/commit/3810342e90c6206259817d98ac305db2be829285
Author: Abhina Sree <69635948+abhina-sree at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[SystemZ][z/OS] Fix macro (#74878)
This fixes the macro syntax
Commit: a5891fa4d2b76cf9dec96da9ded59fc4937d3342
https://github.com/llvm/llvm-project/commit/a5891fa4d2b76cf9dec96da9ded59fc4937d3342
Author: Florian Hahn <flo at fhahn.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vfabi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/uniform-args-call-variants.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Log Message:
-----------
[VPlan] Initial modeling of VF * UF as VPValue. (#74761)
This patch starts initial modeling of VF * UF in VPlan.
Initially, introduce a dedicated VFxUF VPValue, which is then
populated during VPlan::prepareToExecute. Initially, the VF * UF
applies only to the main vector loop region. Once we extend the
scope of VPlan in the future, we may want to associate different VFxUFs
with different vector loop regions (e.g. the epilogue vector loop)
This allows explicitly parameterizing recipes that rely on the
VF * UF, like the canonical induction increment. At the moment, this
mainly helps to avoid generating some duplicated calls to vscale with
scalable vectors. It should also allow using EVL as induction increments
explicitly in D99750. Referring to VF * UF is also needed in other
places that we plan to migrate to VPlan, like the minimum trip count
check during skeleton creation.
The first version creates the value for VF * UF directly in
prepareToExecute to limit the scope of the patch. A follow-on patch will
model VF * UF computation explicitly in VPlan using recipes.
Moved from Phabricator (https://reviews.llvm.org/D157322)
Commit: 9d66d263ad4371160320f4f91720a345eb241471
https://github.com/llvm/llvm-project/commit/9d66d263ad4371160320f4f91720a345eb241471
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2023-12-09 (Sat, 09 Dec 2023)
Changed paths:
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
[CommandLine] Show '[subcommand]' in the help for less than 3 subcommands (#74557)
When a tool defines only one or two subcommands, the `[subcommand]` part
is not displayed in the `USAGE` help line. Note that a similar issue
for printing the list of the subcommands has been fixed in
https://reviews.llvm.org/D25463.
Commit: 9c6693f9012dbf59cf9ebabc9097ce3f25f05cb6
https://github.com/llvm/llvm-project/commit/9c6693f9012dbf59cf9ebabc9097ce3f25f05cb6
Author: Paul Walker <paul.walker at arm.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
A llvm/test/Assembler/constant-splat-diagnostics.ll
A llvm/test/Assembler/constant-splat.ll
Log Message:
-----------
[LLVM][IR] Add textual shorthand for specifying constant vector splats. (#74620)
Add LL parsing for `<N x ty> splat(ty <imm>)` that lowers onto
ConstantInt::get() for integer types and ConstantFP::get() for
floating-point types.
The intent is to extend ConstantInt/FP classes to support vector types
rather than redirecting to other constant classes as the get() methods
do today.
This patch gives IR writers the convenience of using the shorthand
today, thus allowing existing tests to be ported.
Commit: 3a38baa0e730b53ed70cfdb68fd87813eaa40ede
https://github.com/llvm/llvm-project/commit/3a38baa0e730b53ed70cfdb68fd87813eaa40ede
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vacopy.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vacopy.mir
Log Message:
-----------
[GISEL][RISCV] Legalize llvm.vacopy intrinsic (#73066)
In the future, we can consider adding a G_VACOPY opcode instead of going
through the GIntrinsic for all targets. We do the approach in this patch
because that is what other targets do today.
Commit: 478d093e1b58e1054f549aec4be5d27e26bdd062
https://github.com/llvm/llvm-project/commit/478d093e1b58e1054f549aec4be5d27e26bdd062
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
Log Message:
-----------
[RISCV][GISel] Reverse the operands the buildStore created in legalizeVAStart. (#73989)
We need to store the frame index to the location pointed to by the
VASTART, not the other way around.
Commit: 2b36d85a3e000793863c67d48880f23c1e6f95eb
https://github.com/llvm/llvm-project/commit/2b36d85a3e000793863c67d48880f23c1e6f95eb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Update comment for AVL operand in pseudo instructions. NFC
Commit: 687e63a2bddf7eb9e91d9d718e48942aca47c631
https://github.com/llvm/llvm-project/commit/687e63a2bddf7eb9e91d9d718e48942aca47c631
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/code-model-elf.ll
Log Message:
-----------
[X86] Allow accessing large globals in small code model (#74785)
This removes some assumptions that the small code model will only
reference "near" globals.
There are still some missing optimizations and wrong code sequences, but
I'd like to address those separately. This will require auditing any
checks of the code model in the X86 backend.
Commit: 46708a5bcba28955b2ddeddf5c0e64398223642b
https://github.com/llvm/llvm-project/commit/46708a5bcba28955b2ddeddf5c0e64398223642b
Author: Aman LaChapelle <aman.lachapelle at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/include/mlir/Pass/Pass.h
M mlir/lib/Pass/Pass.cpp
M mlir/lib/Pass/PassDetail.h
M mlir/unittests/Pass/CMakeLists.txt
M mlir/unittests/Pass/PassManagerTest.cpp
Log Message:
-----------
[mlir][Pass] Move PassExecutionAction to Pass.h, NFC. (#74850)
This patch moves PassExecutionAction to Pass.h so that it can be used by
the action framework to introspect and intercede in pass managers that
might be set up opaquely. This provides for a very particular use case,
which essentially involves being able to intercede in a PassManager and
skip or apply individual passes. Because of this, this patch also adds a
test for this use case to verify that it could in fact work.
Commit: 02379d19147afda413a2bc757e8d2f5249d772d1
https://github.com/llvm/llvm-project/commit/02379d19147afda413a2bc757e8d2f5249d772d1
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
A llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
Log Message:
-----------
[RISCV][GISEL] Add vararg.ll LLVM IR -> ASM test
This test is added to be the counterpart of the SelectionDAG
llvm/test/CodeGen/RISCV/vararg.ll test. Minor changes were made compared
to the other version, all which are commented in the test file added in
this commit.
Commit: 944e031e36d9515b68b320f611edfc97d5460259
https://github.com/llvm/llvm-project/commit/944e031e36d9515b68b320f611edfc97d5460259
Author: Boian Petkantchin <boian.petkantchin at amd.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/IR/OpImplementation.h
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/test/Dialect/Mesh/canonicalization.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
A mlir/test/IR/custom-print-parse.mlir
A mlir/test/IR/invalid-custom-print-parse.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][mesh] Use tensor shape notation for the shape of a cluster (#73826)
Examle:
substitute
mesh.cluster @mesh0(rank = 2, dim_sizes = [0, 4])
with
mesh.cluster @mesh0(rank = 2, dim_sizes = ?x4)
Same as tensor/memref shapes. The only difference is for 0-rank shapes.
With tensors you would have something like `tensor<f32>`. Here to avoid
matching an empty string a 0-rank shape is denoted by `[]`.
Commit: 3d3e46cc4db9dd32edc82b7029fb694d5d0316de
https://github.com/llvm/llvm-project/commit/3d3e46cc4db9dd32edc82b7029fb694d5d0316de
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
Log Message:
-----------
[mlir][sparse] make test for block sparsity more robust (#74798)
For BSR and convolutions, we encounter
(d0, d1, d2, d3) -> ((d0 + d2) floordiv 2, (d1 + d3) floordiv 2, (d0 +
d2) mod 2, (d1 + d3) mod 2)
which crashed the current test. Note that an actual test and working
code is still to follow (since we need to fix a few other things first)
Commit: e8dbed097a41cc911b90cc40aa7d9509a1555df7
https://github.com/llvm/llvm-project/commit/e8dbed097a41cc911b90cc40aa7d9509a1555df7
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
Log Message:
-----------
[RISCV][GISEL] Fix RUN lines in vararg.ll
The `< %s` needed to be removed. This change fixes the test introduced
in 02379d19147afda413a2bc757e8d2f5249d772d1
Commit: 8f6f5ec77615e2ae137d0b1e306abbac6f7fc0e8
https://github.com/llvm/llvm-project/commit/8f6f5ec77615e2ae137d0b1e306abbac6f7fc0e8
Author: Maryam Moghadas <34670902+maryammo at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/include/llvm/MC/MCSymbolXCOFF.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/PowerPC/aix-ehinfo-sym.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
M llvm/test/CodeGen/PowerPC/aix-exception.ll
Log Message:
-----------
[PowerPC] Move __ehinfo TOC entries to the end of the TOC section (#73586)
On AIX, the __ehinfo toc-entry is never referenced directly using
instructions, therefore we can allocate them with the TE storage mapping
class to move them to the end of TOC.
Commit: 21213f39e29921c58d0ee25228b4ba5be7324602
https://github.com/llvm/llvm-project/commit/21213f39e29921c58d0ee25228b4ba5be7324602
Author: Aart Bik <39774503+aartbik at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
Log Message:
-----------
[mlir][sparse] fix uninitialized dense tensor out in conv2d test (#74884)
Note, tensor.empty may feed into SPARSE output (meaning it truly has no
values yet), but for a DENSE output, it should always have an initial
value. We ran a verifier over all our tests and this is the only
remaining omission.
Commit: c9b4bb9ff9b65a741c558bfb93719df95272c2e1
https://github.com/llvm/llvm-project/commit/c9b4bb9ff9b65a741c558bfb93719df95272c2e1
Author: Zixu Wang <9819235+zixu-w at users.noreply.github.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/test/Driver/fdefine-target-os-macros.c
Log Message:
-----------
[Fix] Disable fdefine-target-os-macros for now (#74886)
https://github.com/llvm/llvm-project/pull/74676 landed the work to
implement `-fdefine-target-os-macros` and enabled the extension for the
Darwin driver. However it is breaking some test builds. Leave the
extension disabled for now until we can fix/workaround the build
failures.
Commit: e837ef91e327d1d183750879385090db800e5e59
https://github.com/llvm/llvm-project/commit/e837ef91e327d1d183750879385090db800e5e59
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
Log Message:
-----------
[RISCV][GISel] Re-generate legalize-vastart-rv32.mir and legalize-vastart-rv64.mir to fix buildbot failure. NFC
I must have messed something up when addressing feedback on the patch
that added these tests.
Commit: d86a93782f4ea476b7fa6751f849fb4ada3df852
https://github.com/llvm/llvm-project/commit/d86a93782f4ea476b7fa6751f849fb4ada3df852
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/LLJITWithRemoteDebugging.cpp
M llvm/test/Examples/OrcV2Examples/Inputs/argc_sub1_elf.ll
Log Message:
-----------
[Orc][examples] Drop target triple from input for remote debugging test (#74831)
https://github.com/llvm/llvm-project/pull/74764 reported that the
`lljit-with-remote-debugging` test fails on AArch64 hosts, because the
input IR file states arch x86_64 explicitly. In order to drop the target
triple we have to remove a check in the example implementation.
Not sure it's fully portable now, but at least it's better than before.
Commit: 05420a17547e495f5748e9662150d6eb931e2c28
https://github.com/llvm/llvm-project/commit/05420a17547e495f5748e9662150d6eb931e2c28
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M libc/src/__support/UInt.h
M libc/src/__support/float_to_string.h
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/uint_test.cpp
M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
Log Message:
-----------
Revert "[libc] Make BigInt bit_cast-able to compatible types" (#74887)
This reverts the following commits:
- a539a090009378ecfcfbfaaa280eeac8f5b9d695
- 31316b3f8511d659cc14ebc72fb2b226f78478a9
Rationale for revert:
https://github.com/llvm/llvm-project/issues/74258#issuecomment-1847836861
Commit: 3adbbaf0552b64d5ecbb3b4f767e55a478439199
https://github.com/llvm/llvm-project/commit/3adbbaf0552b64d5ecbb3b4f767e55a478439199
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M .git-blame-ignore-revs
M .github/CODEOWNERS
M .github/workflows/llvm-project-tests.yml
A .github/workflows/spirv-tests.yml
M .mailmap
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.h
M clang-tools-extra/clang-tidy/hicpp/CMakeLists.txt
M clang-tools-extra/clang-tidy/hicpp/HICPPTidyModule.cpp
A clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.cpp
A clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.h
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/hicpp/ignored-remove-result.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/hicpp/ignored-remove-result.cpp
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.def
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/SyncScope.h
A clang/include/clang/Basic/TargetOSMacros.def
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Driver/Multilib.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Lex/PreprocessorOptions.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/HLSLExternalSemaSource.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCUDARuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/StaticAnalyzer/Checkers/BitwiseShiftChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/EnumCastOutOfRangeChecker.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/pch.hlsl
M clang/test/AST/HLSL/pch_with_buf.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
M clang/test/AST/Interp/builtin-functions.cpp
M clang/test/Analysis/enum-cast-out-of-range.cpp
A clang/test/C/C2x/n2836_n2939.c
M clang/test/CXX/drs/dr10xx.cpp
M clang/test/CXX/drs/dr11xx.cpp
M clang/test/CXX/drs/dr12xx.cpp
M clang/test/CXX/drs/dr13xx.cpp
M clang/test/CXX/drs/dr14xx.cpp
M clang/test/CXX/drs/dr15xx.cpp
M clang/test/CXX/drs/dr16xx.cpp
M clang/test/CXX/drs/dr17xx.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/test/CXX/drs/dr19xx.cpp
M clang/test/CXX/drs/dr25xx.cpp
M clang/test/CXX/drs/dr412.cpp
M clang/test/CXX/drs/dr7xx.cpp
M clang/test/CXX/drs/dr8xx.cpp
M clang/test/CXX/drs/dr9xx.cpp
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
M clang/test/CodeGen/arm-target-features.c
A clang/test/CodeGen/scoped-atomic-ops.c
A clang/test/CodeGen/tbaa.c
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/Driver/aarch64-outliner.c
M clang/test/Driver/arm-cortex-cpus-2.c
M clang/test/Driver/clang-offload-bundler-zlib.c
M clang/test/Driver/clang-offload-bundler-zstd.c
A clang/test/Driver/fdefine-target-os-macros.c
M clang/test/Driver/hip-offload-compress-zlib.hip
M clang/test/Driver/hip-offload-compress-zstd.hip
M clang/test/Driver/linker-wrapper-image.c
M clang/test/ExtractAPI/language.c
M clang/test/Misc/target-invalid-cpu-note.c
M clang/test/OpenMP/target_data_use_device_addr_codegen.cpp
M clang/test/ParserOpenACC/parse-constructs.c
A clang/test/ParserOpenACC/parse-wait-construct.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/init.c
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
M clang/test/Sema/builtin-expect-with-probability.cpp
A clang/test/Sema/scoped-atomic-ops.c
A clang/test/Sema/switch-default.c
M clang/test/SemaCXX/coro-lifetimebound.cpp
M clang/test/SemaCXX/coro-return-type-and-wrapper.cpp
M clang/test/SemaCXX/cxx1z-copy-omission.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
A clang/test/SemaTemplate/GH71595.cpp
M clang/tools/clang-linker-wrapper/OffloadWrapper.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/hwasan/hwasan_flags.inc
M compiler-rt/lib/hwasan/hwasan_linux.cpp
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/orc/macho_platform.cpp
M compiler-rt/lib/scudo/standalone/include/scudo/interface.h
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.inc
A compiler-rt/test/hwasan/TestCases/Linux/fixed-shadow.c
A compiler-rt/test/orc/TestCases/Darwin/arm64/Inputs/ret_self.S
A compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-dlsym.c
A compiler-rt/test/orc/TestCases/Darwin/x86-64/Inputs/ret_self.S
A compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-dlsym.c
M flang/lib/Lower/OpenMP.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/runtime/edit-output.cpp
M flang/test/Fir/array-coor.fir
M flang/test/Fir/arrexp.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/coordinateof.fir
M flang/test/Fir/tbaa.fir
M flang/test/Lower/HLFIR/implicit-type-conversion-allocatable.f90
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/UInt.h
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libcxx/include/__locale
M libcxx/include/__random/cauchy_distribution.h
M libcxx/include/__random/chi_squared_distribution.h
M libcxx/include/__random/exponential_distribution.h
M libcxx/include/__random/extreme_value_distribution.h
M libcxx/include/__random/fisher_f_distribution.h
M libcxx/include/__random/gamma_distribution.h
M libcxx/include/__random/is_valid.h
M libcxx/include/__random/lognormal_distribution.h
M libcxx/include/__random/normal_distribution.h
M libcxx/include/__random/piecewise_constant_distribution.h
M libcxx/include/__random/piecewise_linear_distribution.h
M libcxx/include/__random/student_t_distribution.h
M libcxx/include/__random/uniform_real_distribution.h
M libcxx/include/__random/weibull_distribution.h
A libcxx/test/libcxx/numerics/rand/rand.req.urng/valid_real_type.verify.cpp
M libcxx/test/libcxx/selftest/stdin-is-piped.sh.cpp
M libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cin.sh.cpp
M libcxx/test/std/time/time.syn/formatter_tests.h
M libcxx/test/support/concat_macros.h
M libcxx/utils/libcxx/test/features.py
M libcxxabi/src/cxa_personality.cpp
A libcxxabi/test/native/x86_64/lpstart-zero.pass.sh.s
M lld/ELF/DWARF.h
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/test/ELF/debug-dead-reloc-32.s
M lld/test/ELF/debug-dead-reloc.s
M lld/test/ELF/emulation-amdgpu.s
M lld/test/ELF/i386-debug-noabs.test
M lld/test/ELF/non-abs-reloc.s
M lldb/include/lldb/Core/Address.h
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Symbol/Symbol.h
M lldb/include/lldb/Symbol/SymbolContext.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/Stream.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/Address.cpp
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Symbol/Symbol.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/Stream.cpp
A lldb/test/API/driver/quit_speed/Makefile
A lldb/test/API/driver/quit_speed/TestQuitWithProcess.py
A lldb/test/API/driver/quit_speed/main.c
M lldb/test/API/functionalities/location-list-lookup/Makefile
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
R lldb/test/API/functionalities/location-list-lookup/main.c
A lldb/test/API/functionalities/location-list-lookup/main.cpp
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
A lldb/test/Shell/Commands/command-image-lookup-color.test
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/LangRef.rst
M llvm/docs/MIRLangRef.rst
M llvm/docs/ReleaseNotes.rst
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/LLJITWithRemoteDebugging.cpp
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/IR/Dominators.h
M llvm/include/llvm/IR/GetElementPtrTypeIterator.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/OperandTraits.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCSymbolXCOFF.h
M llvm/include/llvm/Object/XCOFFObjectFile.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/include/llvm/TextAPI/RecordsSlice.h
M llvm/include/llvm/Transforms/Instrumentation.h
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/lib/Analysis/DomConditionCache.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/ObjCopy/CommonConfig.cpp
M llvm/lib/ObjectYAML/XCOFFYAML.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/TableGen/JSONBackend.cpp
M llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SLSHardening.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/EXPInstructions.td
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
M llvm/lib/Target/ARM/ARM.td
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.cpp
M llvm/lib/Target/PowerPC/P10InstrResources.td
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCBack2BackFusion.def
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFoldMasks.cpp
M llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrSystem.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86InstrVMX.td
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/Transforms/Hello/CMakeLists.txt
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/Instrumentation.cpp
M llvm/lib/Transforms/Scalar/AlignmentFromAssumptions.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/ValueTracking/knownbits-and-or-xor-lowbit.ll
A llvm/test/Assembler/constant-splat-diagnostics.ll
A llvm/test/Assembler/constant-splat.ll
M llvm/test/Assembler/named-metadata.ll
M llvm/test/Assembler/struct-ret-without-upgrade.ll
A llvm/test/Assembler/summary-parsing-error.ll
M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
M llvm/test/CodeGen/AArch64/arm64-promote-const-complex-initializers.ll
M llvm/test/CodeGen/AArch64/cmp-select-sign.ll
M llvm/test/CodeGen/AArch64/dag-numsignbits.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/signbit-shift.ll
M llvm/test/CodeGen/AArch64/vselect-ext.ll
M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
M llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/regpressure_printer.mir
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
M llvm/test/CodeGen/ARM/aapcs-hfa-code.ll
M llvm/test/CodeGen/ARM/ha-alignstack-call.ll
M llvm/test/CodeGen/ARM/vector-store.ll
A llvm/test/CodeGen/LoongArch/lasx/fsqrt.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fcmp.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fdiv.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fneg.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/icmp.ll
A llvm/test/CodeGen/LoongArch/lsx/fsqrt.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fcmp.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fneg.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/icmp.ll
M llvm/test/CodeGen/Mips/pr49200.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/PowerPC/aix-ehinfo-sym.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
M llvm/test/CodeGen/PowerPC/aix-exception.ll
M llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
M llvm/test/CodeGen/PowerPC/aix-tls-gd-target-flags.ll
M llvm/test/CodeGen/PowerPC/ctrloops-pseudo.ll
M llvm/test/CodeGen/PowerPC/pcrel-tls-local-dynamic.ll
M llvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll
M llvm/test/CodeGen/PowerPC/pcrel-tls_get_addr_clobbers.ll
M llvm/test/CodeGen/PowerPC/tls-crash.mir
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vacopy.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vaarg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vaarg-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vacopy.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
A llvm/test/CodeGen/RISCV/relax-per-target-feature.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/get_global_offset.ll
M llvm/test/CodeGen/SPIRV/struct.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-add-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-and-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-and-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-nand-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-or-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-sub-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xchg-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xchg-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll
M llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll
M llvm/test/CodeGen/X86/2012-07-10-extload64.ll
M llvm/test/CodeGen/X86/avx512fp16-arith.ll
M llvm/test/CodeGen/X86/code-model-elf.ll
M llvm/test/CodeGen/X86/fold-load-vec.ll
M llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll
M llvm/test/CodeGen/X86/fp-intrinsics.ll
M llvm/test/CodeGen/X86/gep-expanded-vector.ll
M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
M llvm/test/CodeGen/X86/gfni-rotates.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/ldexp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
M llvm/test/CodeGen/X86/memset64-on-x86-32.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/nontemporal-3.ll
M llvm/test/CodeGen/X86/pr38738.ll
M llvm/test/CodeGen/X86/pr41619.ll
A llvm/test/CodeGen/X86/pr74736.ll
M llvm/test/CodeGen/X86/slow-unaligned-mem.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vec_fcopysign.ll
M llvm/test/CodeGen/X86/vec_zero_cse.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
M llvm/test/CodeGen/X86/vector-shuffle-v192.ll
M llvm/test/CodeGen/X86/zero-remat.ll
M llvm/test/Examples/OrcV2Examples/Inputs/argc_sub1_elf.ll
A llvm/test/Instrumentation/AddressSanitizer/global_metadata_code_model.ll
M llvm/test/Instrumentation/AddressSanitizer/global_with_comdat.ll
M llvm/test/Instrumentation/InstrProfiling/icall-comdat.ll
M llvm/test/Instrumentation/InstrProfiling/platform.ll
M llvm/test/MC/AMDGPU/exp.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
A llvm/test/MC/AMDGPU/gfx12_asm_exp.s
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_exp.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vinterp.txt
A llvm/test/MC/Disassembler/X86/apx/invpcid.txt
M llvm/test/MC/ELF/reloc-directive.s
M llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s
M llvm/test/MC/PowerPC/ppc64-errors.s
A llvm/test/MC/X86/apx/invpcid-att.s
A llvm/test/MC/X86/apx/invpcid-intel.s
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter.td
A llvm/test/Transforms/AlignmentFromAssumptions/alignment-from-assumptions-track-users.ll
M llvm/test/Transforms/IRCE/non-loop-invariant-rhs-instr.ll
M llvm/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll
M llvm/test/Transforms/InstCombine/binop-of-displaced-shifts.ll
A llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstSimplify/returned.ll
M llvm/test/Transforms/LICM/pr64897.ll
M llvm/test/Transforms/LoopPredication/basic.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
A llvm/test/Transforms/LoopUnroll/loop-branch-folding.ll
M llvm/test/Transforms/LoopUnroll/runtime-exit-phi-scev-invalidation.ll
M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vfabi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/uniform-args-call-variants.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-call-linear-args.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/tools/llvm-exegesis/X86/latency/memory-annotations-unsupported.s
A llvm/test/tools/llvm-exegesis/X86/latency/snippet-address-annotations-unsupported.s
A llvm/test/tools/llvm-exegesis/X86/latency/subprocess-address-annotation.s
A llvm/test/tools/llvm-objcopy/regex-error.test
M llvm/test/tools/obj2yaml/XCOFF/aix.yaml
A llvm/test/tools/obj2yaml/XCOFF/aux-symbols.yaml
M llvm/tools/bugpoint-passes/CMakeLists.txt
M llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.h
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/tools/llvm-shlib/CMakeLists.txt
M llvm/tools/obj2yaml/xcoff2yaml.cpp
M llvm/unittests/Analysis/ValueLatticeTest.cpp
M llvm/unittests/Analysis/VectorUtilsTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/TableGen/AutomataTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/TextAPI/RecordTests.cpp
M llvm/unittests/tools/llvm-exegesis/X86/SnippetFileTest.cpp
M llvm/utils/TableGen/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/GlobalISelMatchTableExecutorEmitter.h
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerTables.cpp
M llvm/utils/git/code-format-helper.py
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/hicpp/BUILD.gn
M mlir/cmake/modules/MLIRConfig.cmake.in
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/IR/BuiltinLocationAttributes.td
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/OpImplementation.h
M mlir/include/mlir/Pass/Pass.h
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MapMemRefStorageClassPass.cpp
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/IR/CMakeLists.txt
M mlir/lib/Dialect/Affine/Utils/CMakeLists.txt
M mlir/lib/Dialect/Complex/IR/ComplexOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.h
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Utils/IndexingUtils.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/lib/Pass/PassDetail.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/python/CMakeLists.txt
M mlir/python/mlir/dialects/_ods_common.py
M mlir/python/mlir/dialects/affine.py
M mlir/test/Conversion/MathToLibm/convert-to-libm.mlir
M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
M mlir/test/Dialect/Complex/ops.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Linalg/transform-op-match.mlir
M mlir/test/Dialect/MemRef/expand-strided-metadata.mlir
M mlir/test/Dialect/Mesh/canonicalization.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SparseTensor/sparse_conv_2d_slice_based.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
R mlir/test/Dialect/Tensor/invalid-canonicalize.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
A mlir/test/IR/custom-print-parse.mlir
A mlir/test/IR/invalid-custom-print-parse.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dual_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_1d_nwc_wcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_55.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nchw_fchw.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d_ndhwc_dhwcf.mlir
A mlir/test/Target/LLVMIR/Import/nsw_nuw.ll
A mlir/test/Target/LLVMIR/nsw_nuw.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/python/dialects/affine.py
M mlir/unittests/Pass/CMakeLists.txt
M mlir/unittests/Pass/PassManagerTest.cpp
M openmp/libomptarget/CMakeLists.txt
M openmp/libomptarget/DeviceRTL/CMakeLists.txt
M openmp/libomptarget/include/PluginManager.h
M openmp/libomptarget/src/interface.cpp
M openmp/libomptarget/src/rtl.cpp
R openmp/libomptarget/test/Inputs/empty.c
M openmp/libomptarget/test/offloading/back2back_distribute.c
R openmp/libomptarget/test/offloading/bug60119.c
A openmp/libomptarget/test/offloading/target_map_for_member_data.cpp
M polly/lib/Analysis/ScopBuilder.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Commit: d0f9444f0ac931f3b23a66f7e40c569f943b09ca
https://github.com/llvm/llvm-project/commit/d0f9444f0ac931f3b23a66f7e40c569f943b09ca
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2023-12-08 (Fri, 08 Dec 2023)
Changed paths:
M .git-blame-ignore-revs
M .github/CODEOWNERS
M .github/workflows/llvm-project-tests.yml
A .github/workflows/spirv-tests.yml
M .mailmap
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.h
M clang-tools-extra/clang-tidy/hicpp/CMakeLists.txt
M clang-tools-extra/clang-tidy/hicpp/HICPPTidyModule.cpp
A clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.cpp
A clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.h
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/hicpp/ignored-remove-result.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/hicpp/ignored-remove-result.cpp
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.def
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/Features.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/SyncScope.h
A clang/include/clang/Basic/TargetOSMacros.def
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Driver/Multilib.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Lex/PreprocessorOptions.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/HLSLExternalSemaSource.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/Analysis/FlowSensitive/HTMLLogger.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCUDARuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenTBAA.cpp
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/InitHeaderSearch.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/StaticAnalyzer/Checkers/BitwiseShiftChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/EnumCastOutOfRangeChecker.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/AST/HLSL/pch.hlsl
M clang/test/AST/HLSL/pch_with_buf.hlsl
M clang/test/AST/HLSL/resource_binding_attr.hlsl
M clang/test/AST/Interp/builtin-functions.cpp
M clang/test/Analysis/enum-cast-out-of-range.cpp
A clang/test/C/C2x/n2836_n2939.c
M clang/test/CXX/drs/dr10xx.cpp
M clang/test/CXX/drs/dr11xx.cpp
M clang/test/CXX/drs/dr12xx.cpp
M clang/test/CXX/drs/dr13xx.cpp
M clang/test/CXX/drs/dr14xx.cpp
M clang/test/CXX/drs/dr15xx.cpp
M clang/test/CXX/drs/dr16xx.cpp
M clang/test/CXX/drs/dr17xx.cpp
M clang/test/CXX/drs/dr18xx.cpp
M clang/test/CXX/drs/dr19xx.cpp
M clang/test/CXX/drs/dr25xx.cpp
M clang/test/CXX/drs/dr412.cpp
M clang/test/CXX/drs/dr7xx.cpp
M clang/test/CXX/drs/dr8xx.cpp
M clang/test/CXX/drs/dr9xx.cpp
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_vector_qrshr.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create2_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_create4_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get2_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_get4_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set2_bool.c
A clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_set4_bool.c
M clang/test/CodeGen/arm-target-features.c
A clang/test/CodeGen/scoped-atomic-ops.c
A clang/test/CodeGen/tbaa.c
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/Driver/aarch64-outliner.c
M clang/test/Driver/arm-cortex-cpus-2.c
M clang/test/Driver/clang-offload-bundler-zlib.c
M clang/test/Driver/clang-offload-bundler-zstd.c
A clang/test/Driver/fdefine-target-os-macros.c
M clang/test/Driver/hip-offload-compress-zlib.hip
M clang/test/Driver/hip-offload-compress-zstd.hip
M clang/test/Driver/linker-wrapper-image.c
M clang/test/ExtractAPI/language.c
M clang/test/Misc/target-invalid-cpu-note.c
M clang/test/OpenMP/target_data_use_device_addr_codegen.cpp
M clang/test/ParserOpenACC/parse-constructs.c
A clang/test/ParserOpenACC/parse-wait-construct.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Preprocessor/init.c
M clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp
M clang/test/Sema/builtin-expect-with-probability.cpp
A clang/test/Sema/scoped-atomic-ops.c
A clang/test/Sema/switch-default.c
M clang/test/SemaCXX/coro-lifetimebound.cpp
M clang/test/SemaCXX/coro-return-type-and-wrapper.cpp
M clang/test/SemaCXX/cxx1z-copy-omission.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
M clang/test/SemaHLSL/BuiltIns/RWBuffers.hlsl
A clang/test/SemaTemplate/GH71595.cpp
M clang/tools/clang-linker-wrapper/OffloadWrapper.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/hwasan/hwasan_flags.inc
M compiler-rt/lib/hwasan/hwasan_linux.cpp
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/orc/macho_platform.cpp
M compiler-rt/lib/scudo/standalone/include/scudo/interface.h
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.inc
A compiler-rt/test/hwasan/TestCases/Linux/fixed-shadow.c
A compiler-rt/test/orc/TestCases/Darwin/arm64/Inputs/ret_self.S
A compiler-rt/test/orc/TestCases/Darwin/arm64/trivial-dlsym.c
A compiler-rt/test/orc/TestCases/Darwin/x86-64/Inputs/ret_self.S
A compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-dlsym.c
M flang/lib/Lower/OpenMP.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/runtime/edit-output.cpp
M flang/test/Fir/array-coor.fir
M flang/test/Fir/arrexp.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/coordinateof.fir
M flang/test/Fir/tbaa.fir
M flang/test/Lower/HLFIR/implicit-type-conversion-allocatable.f90
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/UInt.h
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/log.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libcxx/include/__locale
M libcxx/include/__random/cauchy_distribution.h
M libcxx/include/__random/chi_squared_distribution.h
M libcxx/include/__random/exponential_distribution.h
M libcxx/include/__random/extreme_value_distribution.h
M libcxx/include/__random/fisher_f_distribution.h
M libcxx/include/__random/gamma_distribution.h
M libcxx/include/__random/is_valid.h
M libcxx/include/__random/lognormal_distribution.h
M libcxx/include/__random/normal_distribution.h
M libcxx/include/__random/piecewise_constant_distribution.h
M libcxx/include/__random/piecewise_linear_distribution.h
M libcxx/include/__random/student_t_distribution.h
M libcxx/include/__random/uniform_real_distribution.h
M libcxx/include/__random/weibull_distribution.h
A libcxx/test/libcxx/numerics/rand/rand.req.urng/valid_real_type.verify.cpp
M libcxx/test/libcxx/selftest/stdin-is-piped.sh.cpp
M libcxx/test/std/input.output/iostream.objects/narrow.stream.objects/cin.sh.cpp
M libcxx/test/std/time/time.syn/formatter_tests.h
M libcxx/test/support/concat_macros.h
M libcxx/utils/libcxx/test/features.py
M libcxxabi/src/cxa_personality.cpp
A libcxxabi/test/native/x86_64/lpstart-zero.pass.sh.s
M lld/ELF/DWARF.h
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/test/ELF/debug-dead-reloc-32.s
M lld/test/ELF/debug-dead-reloc.s
M lld/test/ELF/emulation-amdgpu.s
M lld/test/ELF/i386-debug-noabs.test
M lld/test/ELF/non-abs-reloc.s
M lldb/include/lldb/Core/Address.h
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Symbol/Symbol.h
M lldb/include/lldb/Symbol/SymbolContext.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/Stream.h
M lldb/source/Commands/CommandObjectTarget.cpp
M lldb/source/Core/Address.cpp
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Symbol/Symbol.cpp
M lldb/source/Symbol/SymbolContext.cpp
M lldb/source/Symbol/Variable.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/Stream.cpp
A lldb/test/API/driver/quit_speed/Makefile
A lldb/test/API/driver/quit_speed/TestQuitWithProcess.py
A lldb/test/API/driver/quit_speed/main.c
M lldb/test/API/functionalities/location-list-lookup/Makefile
M lldb/test/API/functionalities/location-list-lookup/TestLocationListLookup.py
R lldb/test/API/functionalities/location-list-lookup/main.c
A lldb/test/API/functionalities/location-list-lookup/main.cpp
M lldb/test/API/lang/cpp/const_static_integral_member/TestConstStaticIntegralMember.py
A lldb/test/Shell/Commands/command-image-lookup-color.test
M llvm/CMakeLists.txt
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/LangRef.rst
M llvm/docs/MIRLangRef.rst
M llvm/docs/ReleaseNotes.rst
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/LLJITWithRemoteDebugging.cpp
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/include/llvm/IR/Dominators.h
M llvm/include/llvm/IR/GetElementPtrTypeIterator.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/OperandTraits.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCSymbolXCOFF.h
M llvm/include/llvm/Object/XCOFFObjectFile.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/TargetParser/ARMTargetParser.def
M llvm/include/llvm/TextAPI/RecordsSlice.h
M llvm/include/llvm/Transforms/Instrumentation.h
M llvm/lib/Analysis/AliasSetTracker.cpp
M llvm/lib/Analysis/DomConditionCache.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/ObjCopy/CommonConfig.cpp
M llvm/lib/ObjectYAML/XCOFFYAML.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/TableGen/JSONBackend.cpp
M llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SLSHardening.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/EXPInstructions.td
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/VINTERPInstructions.td
M llvm/lib/Target/ARM/ARM.td
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
M llvm/lib/Target/Mips/Mips16FrameLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsMCInstLower.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCPredicates.cpp
M llvm/lib/Target/PowerPC/P10InstrResources.td
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCBack2BackFusion.def
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrFormats.td
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFoldMasks.cpp
M llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInsertWriteVXRM.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVRVVInitUndef.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/SystemZ/SystemZInstrFormats.td
M llvm/lib/Target/SystemZ/SystemZInstrInfo.td
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrSystem.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86InstrVMX.td
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/Transforms/Hello/CMakeLists.txt
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/Instrumentation.cpp
M llvm/lib/Transforms/Scalar/AlignmentFromAssumptions.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/ValueTracking/knownbits-and-or-xor-lowbit.ll
A llvm/test/Assembler/constant-splat-diagnostics.ll
A llvm/test/Assembler/constant-splat.ll
M llvm/test/Assembler/named-metadata.ll
M llvm/test/Assembler/struct-ret-without-upgrade.ll
A llvm/test/Assembler/summary-parsing-error.ll
M llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
M llvm/test/CodeGen/AArch64/arm64-promote-const-complex-initializers.ll
M llvm/test/CodeGen/AArch64/cmp-select-sign.ll
M llvm/test/CodeGen/AArch64/dag-numsignbits.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/signbit-shift.ll
M llvm/test/CodeGen/AArch64/vselect-ext.ll
M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
M llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/regpressure_printer.mir
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
M llvm/test/CodeGen/ARM/aapcs-hfa-code.ll
M llvm/test/CodeGen/ARM/ha-alignstack-call.ll
M llvm/test/CodeGen/ARM/vector-store.ll
A llvm/test/CodeGen/LoongArch/lasx/fsqrt.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fcmp.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fdiv.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fneg.ll
A llvm/test/CodeGen/LoongArch/lasx/ir-instruction/icmp.ll
A llvm/test/CodeGen/LoongArch/lsx/fsqrt.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fcmp.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fneg.ll
A llvm/test/CodeGen/LoongArch/lsx/ir-instruction/icmp.ll
M llvm/test/CodeGen/Mips/pr49200.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/PowerPC/aix-ehinfo-sym.ll
M llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
M llvm/test/CodeGen/PowerPC/aix-exception.ll
M llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
M llvm/test/CodeGen/PowerPC/aix-tls-gd-target-flags.ll
M llvm/test/CodeGen/PowerPC/ctrloops-pseudo.ll
M llvm/test/CodeGen/PowerPC/pcrel-tls-local-dynamic.ll
M llvm/test/CodeGen/PowerPC/pcrel-tls-local-exec.ll
M llvm/test/CodeGen/PowerPC/pcrel-tls_get_addr_clobbers.ll
M llvm/test/CodeGen/PowerPC/tls-crash.mir
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vacopy.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vaarg-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vaarg-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vacopy.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv32.mir
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vastart-rv64.mir
A llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
A llvm/test/CodeGen/RISCV/relax-per-target-feature.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/SPIRV/opencl/basic/get_global_offset.ll
M llvm/test/CodeGen/SPIRV/struct.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-add-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-and-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-and-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-nand-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-or-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-sub-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xchg-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xchg-04.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll
M llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll
M llvm/test/CodeGen/X86/2012-07-10-extload64.ll
M llvm/test/CodeGen/X86/avx512fp16-arith.ll
M llvm/test/CodeGen/X86/code-model-elf.ll
M llvm/test/CodeGen/X86/fold-load-vec.ll
M llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll
M llvm/test/CodeGen/X86/fp-intrinsics.ll
M llvm/test/CodeGen/X86/gep-expanded-vector.ll
M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
M llvm/test/CodeGen/X86/gfni-rotates.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/ldexp.ll
M llvm/test/CodeGen/X86/llvm.frexp.ll
M llvm/test/CodeGen/X86/memset64-on-x86-32.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/nontemporal-3.ll
M llvm/test/CodeGen/X86/pr38738.ll
M llvm/test/CodeGen/X86/pr41619.ll
A llvm/test/CodeGen/X86/pr74736.ll
M llvm/test/CodeGen/X86/slow-unaligned-mem.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/vec_fcopysign.ll
M llvm/test/CodeGen/X86/vec_zero_cse.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-512.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-512.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-rotate-512.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
M llvm/test/CodeGen/X86/vector-shift-shl-128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-256.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
M llvm/test/CodeGen/X86/vector-shuffle-v192.ll
M llvm/test/CodeGen/X86/zero-remat.ll
M llvm/test/Examples/OrcV2Examples/Inputs/argc_sub1_elf.ll
A llvm/test/Instrumentation/AddressSanitizer/global_metadata_code_model.ll
M llvm/test/Instrumentation/AddressSanitizer/global_with_comdat.ll
M llvm/test/Instrumentation/InstrProfiling/icall-comdat.ll
M llvm/test/Instrumentation/InstrProfiling/platform.ll
M llvm/test/MC/AMDGPU/exp.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp.s
M llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
A llvm/test/MC/AMDGPU/gfx12_asm_exp.s
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_exp.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vinterp.txt
A llvm/test/MC/Disassembler/X86/apx/invpcid.txt
M llvm/test/MC/ELF/reloc-directive.s
M llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s
M llvm/test/MC/PowerPC/ppc64-errors.s
A llvm/test/MC/X86/apx/invpcid-att.s
A llvm/test/MC/X86/apx/invpcid-intel.s
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter.td
A llvm/test/Transforms/AlignmentFromAssumptions/alignment-from-assumptions-track-users.ll
M llvm/test/Transforms/IRCE/non-loop-invariant-rhs-instr.ll
M llvm/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll
M llvm/test/Transforms/InstCombine/binop-of-displaced-shifts.ll
A llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/icmp-uge-of-not-of-shl-allones-by-bits-and-val-to-icmp-eq-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/icmp-ult-of-not-of-shl-allones-by-bits-and-val-to-icmp-ne-of-lshr-val-by-bits-and-0.ll
M llvm/test/Transforms/InstCombine/known-bits.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstSimplify/returned.ll
M llvm/test/Transforms/LICM/pr64897.ll
M llvm/test/Transforms/LoopPredication/basic.ll
M llvm/test/Transforms/LoopStrengthReduce/lsr-term-fold.ll
A llvm/test/Transforms/LoopUnroll/loop-branch-folding.ll
M llvm/test/Transforms/LoopUnroll/runtime-exit-phi-scev-invalidation.ll
M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-overflow-checks.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vfabi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/uniform-args-call-variants.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-call-linear-args.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll
M llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
M llvm/test/Transforms/LoopVectorize/RISCV/defaults.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/lmul.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/mask-index-type.ll
M llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/tools/llvm-exegesis/X86/latency/memory-annotations-unsupported.s
A llvm/test/tools/llvm-exegesis/X86/latency/snippet-address-annotations-unsupported.s
A llvm/test/tools/llvm-exegesis/X86/latency/subprocess-address-annotation.s
A llvm/test/tools/llvm-objcopy/regex-error.test
M llvm/test/tools/obj2yaml/XCOFF/aix.yaml
A llvm/test/tools/obj2yaml/XCOFF/aux-symbols.yaml
M llvm/tools/bugpoint-passes/CMakeLists.txt
M llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/LatencyBenchmarkRunner.h
M llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
M llvm/tools/llvm-exegesis/lib/Target.cpp
M llvm/tools/llvm-exegesis/lib/Target.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/tools/llvm-shlib/CMakeLists.txt
M llvm/tools/obj2yaml/xcoff2yaml.cpp
M llvm/unittests/Analysis/ValueLatticeTest.cpp
M llvm/unittests/Analysis/VectorUtilsTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/TableGen/AutomataTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/TextAPI/RecordTests.cpp
M llvm/unittests/tools/llvm-exegesis/X86/SnippetFileTest.cpp
M llvm/utils/TableGen/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/GlobalISelMatchTableExecutorEmitter.h
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/TableGen/X86DisassemblerTables.cpp
M llvm/utils/git/code-format-helper.py
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/hicpp/BUILD.gn
M mlir/cmake/modules/MLIRConfig.cmake.in
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/IR/BuiltinLocationAttributes.td
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/OpImplementation.h
M mlir/include/mlir/Pass/Pass.h
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MapMemRefStorageClassPass.cpp
M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/IR/CMakeLists.txt
M mlir/lib/Dialect/Affine/Utils/CMakeLists.txt
M mlir/lib/Dialect/Complex/IR/ComplexOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.h
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Utils/IndexingUtils.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/lib/Pass/PassDetail.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
M mlir/python/CMakeLists.txt
M mlir/python/mlir/dialects/_ods_common.py
M mlir/python/mlir/dialects/affine.py
M mlir/test/Conversion/MathToLibm/convert-to-libm.mlir
M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
M mlir/test/Dialect/Complex/ops.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Linalg/transform-op-match.mlir
M mlir/test/Dialect/MemRef/expand-strided-metadata.mlir
M mlir/test/Dialect/Mesh/canonicalization.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
M mlir/test/Dialect/SparseTensor/sparse_conv_2d_slice_based.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
R mlir/test/Dialect/Tensor/invalid-canonicalize.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
A mlir/test/IR/custom-print-parse.mlir
A mlir/test/IR/invalid-custom-print-parse.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dual_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_1d_nwc_wcf.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
A mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_55.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d_nchw_fchw.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_3d_ndhwc_dhwcf.mlir
A mlir/test/Target/LLVMIR/Import/nsw_nuw.ll
A mlir/test/Target/LLVMIR/nsw_nuw.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/python/dialects/affine.py
M mlir/unittests/Pass/CMakeLists.txt
M mlir/unittests/Pass/PassManagerTest.cpp
M openmp/libomptarget/CMakeLists.txt
M openmp/libomptarget/DeviceRTL/CMakeLists.txt
M openmp/libomptarget/include/PluginManager.h
M openmp/libomptarget/src/interface.cpp
M openmp/libomptarget/src/rtl.cpp
R openmp/libomptarget/test/Inputs/empty.c
M openmp/libomptarget/test/offloading/back2back_distribute.c
R openmp/libomptarget/test/offloading/bug60119.c
A openmp/libomptarget/test/offloading/target_map_for_member_data.cpp
M polly/lib/Analysis/ScopBuilder.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/579031651cc5...d0f9444f0ac9
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