[all-commits] [llvm/llvm-project] 097d2f: [mlir][sparse] optimize memory load to SSA value w...

[Peiming Liu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 097d2f14173a3bfc1cd44f543f63154fed79e962
      https://github.com/llvm/llvm-project/commit/097d2f14173a3bfc1cd44f543f63154fed79e962
  Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
  Date:   2023-12-07 (Thu, 07 Dec 2023)

  Changed paths:
    M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.cpp
    M mlir/lib/Dialect/SparseTensor/Transforms/LoopEmitter.h
    M mlir/test/Dialect/SparseTensor/sparse_conv_2d_slice_based.mlir

  Log Message:
  -----------
  [mlir][sparse] optimize memory load to SSA value when generating spar… (#74750)

…se conv kernel.