[all-commits] [llvm/llvm-project] df2485: Revert "[llvm-jitlink] Add Process and Platform JI...

Wed Dec 6 10:43:34 PST 2023

  Branch: refs/heads/users/jroelofs/spr/builtinsarm64-build-__init_cpu_features_resolver-on-apple-platforms
  Home:   https://github.com/llvm/llvm-project
  Commit: df2485b215af46ebd5fd3a94b929ebc951c1d12e
      https://github.com/llvm/llvm-project/commit/df2485b215af46ebd5fd3a94b929ebc951c1d12e
  Author: Lang Hames <lhames at gmail.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/jit-re-dlopen-data-reset.S
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/jit-re-dlopen-trivial.S
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-jit-dlopen-nested.c
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-jit-dlopen.c
    M compiler-rt/test/orc/TestCases/Windows/x86-64/trivial-jit-dlopen.c
    M llvm/test/ExecutionEngine/JITLink/AArch32/ELF_thumbv7_printf.s
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
    M llvm/tools/llvm-jitlink/llvm-jitlink.h

  Log Message:
  -----------
  Revert "[llvm-jitlink] Add Process and Platform JITDylibs, generalize alias..."

This reverts commit 3d0dd1a7d62 while I investigate bot failures (e.g.
https://lab.llvm.org/buildbot/#/builders/272/builds/2573)

  Commit: 02f4b36ad5f2f97ff63259e38244da8fcd5a205e
      https://github.com/llvm/llvm-project/commit/02f4b36ad5f2f97ff63259e38244da8fcd5a205e
  Author: Tacet <4922191+AdvenamTacet at users.noreply.github.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M libcxx/include/deque
    M libcxx/include/vector

  Log Message:
  -----------
  [libc++] Refactor of ASan annotation functions (#74023)

This commit refactors the ASan annotation functions in libc++ to reduce
unnecessary code duplication. Additionally it adds a small optimization.

- Eliminates two redundant function versions by utilizing the
`[[maybe_unused]]` attribute and guarding function bodies with `#ifndef
_LIBCPP_HAS_NO_ASAN`.
- Introduces an additional guard to an auxiliary function, allowing the
removal of a no-ops function body. This approach avoids relying on the
optimizer for code elimination.

Fixes #73043

  Commit: 3c5b42acd3e2022da40f6e4b50f5035279b8b93a
      https://github.com/llvm/llvm-project/commit/3c5b42acd3e2022da40f6e4b50f5035279b8b93a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/lower-args-vararg.ll
    M llvm/test/CodeGen/RISCV/vararg.ll

  Log Message:
  -----------
  [RISCV] Allocate the varargs GPR save area as a single object. (#74354)

Previously we allocated one object for each GPR. We also allocated the
same offset twice, once to save for VASTART and then again for the first
register in the save loop.

This patch uses a single object for all the registers and shares this
with VASTART. This is more consistent with other targets like AArch64
and ARM.

I've removed the setValue(nullptr) from the memory operand now. Having a
single object makes me a lot more comfortable about alias analysis being
able to see what is going on. This led to the scheduling changes in
push-pop-popret.ll and vararg.ll.

  Commit: 5c3496ff33ce8e4cc6f8c18edd7ae5fc65d23fdf
      https://github.com/llvm/llvm-project/commit/5c3496ff33ce8e4cc6f8c18edd7ae5fc65d23fdf
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Transforms/InstCombine/add.ll
    M llvm/test/Transforms/InstCombine/and-or-not.ll
    M llvm/test/Transforms/InstCombine/logical-select.ll
    M llvm/test/Transforms/InstCombine/masked-merge-add.ll
    M llvm/test/Transforms/InstCombine/masked-merge-or.ll
    M llvm/test/Transforms/InstCombine/masked-merge-xor.ll
    M llvm/test/Transforms/InstCombine/pr53357.ll
    M llvm/unittests/Analysis/ValueTrackingTest.cpp

  Log Message:
  -----------
  [InstCombine] Check isGuaranteedNotToBeUndef in haveNoCommonBitsSetSpecialCases. (#74390)

It's not safe for InstCombine to add disjoint metadata when converting
Add to Or otherwise.

I've added noundef attribute to preserve existing test behavior.

  Commit: ddebce70210dcc97646578705dd13c6fb0e3ee0e
      https://github.com/llvm/llvm-project/commit/ddebce70210dcc97646578705dd13c6fb0e3ee0e
  Author: Arthur Eubanks <aeubanks at google.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M llvm/lib/Target/TargetMachine.cpp
    M llvm/test/CodeGen/X86/code-model-elf-sections.ll

  Log Message:
  -----------
  [X86] Respect code_model when determining if a global is small/large (#74498)

Using the GlobalVariable code_model property added in #72077.

code_model = "small" means the global should be treated as small
regardless of the TargetMachine code model.
code_model = "large" means the global should be treated as large
regardless of the TargetMachine code model.

Inferring small/large based on a known section name still takes
precedence for correctness.

The intention is to use this for globals that are accessed very
infrequently but also take up a lot of space in the binary to mitigate
relocation overflows. Prime examples are globals that go in
"__llvm_prf_names" for coverage/PGO instrumented builds and
"asan_globals" for ASan builds.

  Commit: 7563eb64102c3bee9b0ab581309d170891fa0565
      https://github.com/llvm/llvm-project/commit/7563eb64102c3bee9b0ab581309d170891fa0565
  Author: Felix Schneider <fx.schn at gmail.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
    M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir

  Log Message:
  -----------
  [tosa] Fix crash in shape inference for `tosa.transpose` (#74367)

Fixes a crash in `TransposeOp::inferReturnTypeComponents()` when the
supplied permutation tensor is rank-0.
Also removes some dead code from the type inference function.

Fix https://github.com/llvm/llvm-project/issues/74237

  Commit: 33af16f580b168c99a61db118ef59aaf6dd1488f
      https://github.com/llvm/llvm-project/commit/33af16f580b168c99a61db118ef59aaf6dd1488f
  Author: Jeremy Morse <jeremy.morse at sony.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp

  Log Message:
  -----------
  [DebugInfo][RemoveDIs] Final cleanup for enabling non-instr-debuginfo (#74497)

Some final errors have turned up when doing stage2clang builds:
* We can insert before end(), which won't have an attached DPMarker,
thus we can have a nullptr DPMarker in Instruction::insertBefore. Add a
null check there.
* We need to use the iterator-returning form of getFirstNonPHI to ensure
we don't insert any PHIs behind debug-info at the start of a block.

  Commit: 3d21b5603835fcd1de8d0565c3324e36fed21ff1
      https://github.com/llvm/llvm-project/commit/3d21b5603835fcd1de8d0565c3324e36fed21ff1
  Author: Kamau Bridgeman <kamau.bridgeman at ibm.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M compiler-rt/CMakeLists.txt

  Log Message:
  -----------
  [GTest][c++17] Silence warnings when building GTest with gcc-toolset-12

This change fixes a build break introduced by aafad2d(#70353) on
the clang-ppc64le-rhel build bot. If the third-party Google Test suite
is built using gcc-toolset-12, the implementation of std::stable_sort in
the toolchain will use a get_temporary_buffer declaration that is marked
_GLIBCXX17_DEPRECATED. This change adds -Wno-deprecated-declarations to
the GTest flags if the toolchain is detected in the build compiler on linux.

  Commit: 9c2e5449f4c7b8dea918cf9640a4cc26c6972866
      https://github.com/llvm/llvm-project/commit/9c2e5449f4c7b8dea918cf9640a4cc26c6972866
  Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M libc/src/__support/threads/linux/thread.cpp

  Log Message:
  -----------
  [libc] remove spurious LIBC_INLINE (#74505)

This function is marked noinline; the inline keyword (or whatever
LIBC_INLINE
resolves to) will have no effect.

  Commit: 391a7577e703516dbefd41b3da8f3bbd751c6978
      https://github.com/llvm/llvm-project/commit/391a7577e703516dbefd41b3da8f3bbd751c6978
  Author: Guray Ozen <guray.ozen at gmail.com>
  Date:   2023-12-05 (Tue, 05 Dec 2023)

  Changed paths:
    M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
    M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir

  Log Message:
  -----------
  [mlir][gpu] Add lowering dynamic_shared_memory op for rocdl (#74473)

This PR adds lowering of `gpu.dynamic_shared_memory` to rocdl target.

  Commit: a2380ad38c898a7d4960c6debfaedca54ceaf2b2
      https://github.com/llvm/llvm-project/commit/a2380ad38c898a7d4960c6debfaedca54ceaf2b2
  Author: Jon Roelofs <jonathan_roelofs at apple.com>
  Date:   2023-12-06 (Wed, 06 Dec 2023)

  Changed paths:
    M compiler-rt/CMakeLists.txt
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/jit-re-dlopen-data-reset.S
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/jit-re-dlopen-trivial.S
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-jit-dlopen-nested.c
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-jit-dlopen.c
    M compiler-rt/test/orc/TestCases/Windows/x86-64/trivial-jit-dlopen.c
    M libc/src/__support/threads/linux/thread.cpp
    M libcxx/include/deque
    M libcxx/include/vector
    M llvm/include/llvm/CodeGen/AsmPrinter.h
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/TargetMachine.cpp
    M llvm/lib/Target/X86/X86AsmPrinter.cpp
    M llvm/lib/Target/X86/X86AsmPrinter.h
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/test/CodeGen/AArch64/ifunc-asm.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/lower-args-vararg.ll
    M llvm/test/CodeGen/RISCV/vararg.ll
    M llvm/test/CodeGen/X86/code-model-elf-sections.ll
    M llvm/test/CodeGen/X86/ifunc-asm.ll
    M llvm/test/ExecutionEngine/JITLink/AArch32/ELF_thumbv7_printf.s
    M llvm/test/Transforms/InstCombine/add.ll
    M llvm/test/Transforms/InstCombine/and-or-not.ll
    M llvm/test/Transforms/InstCombine/logical-select.ll
    M llvm/test/Transforms/InstCombine/masked-merge-add.ll
    M llvm/test/Transforms/InstCombine/masked-merge-or.ll
    M llvm/test/Transforms/InstCombine/masked-merge-xor.ll
    M llvm/test/Transforms/InstCombine/pr53357.ll
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
    M llvm/tools/llvm-jitlink/llvm-jitlink.h
    M llvm/unittests/Analysis/ValueTrackingTest.cpp
    M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
    M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
    M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
    M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir
    M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

  Commit: 08024c3d8a1e0b644d9cd1122fd0d9f0dc611023
      https://github.com/llvm/llvm-project/commit/08024c3d8a1e0b644d9cd1122fd0d9f0dc611023
  Author: Jon Roelofs <jonathan_roelofs at apple.com>
  Date:   2023-12-06 (Wed, 06 Dec 2023)

  Changed paths:
    M compiler-rt/CMakeLists.txt
    M compiler-rt/lib/builtins/cpu_model.c
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/jit-re-dlopen-data-reset.S
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/jit-re-dlopen-trivial.S
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-jit-dlopen-nested.c
    M compiler-rt/test/orc/TestCases/Darwin/x86-64/trivial-jit-dlopen.c
    M compiler-rt/test/orc/TestCases/Windows/x86-64/trivial-jit-dlopen.c
    M libc/src/__support/threads/linux/thread.cpp
    M libcxx/include/deque
    M libcxx/include/vector
    M llvm/include/llvm/CodeGen/AsmPrinter.h
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/TargetMachine.cpp
    M llvm/lib/Target/X86/X86AsmPrinter.cpp
    M llvm/lib/Target/X86/X86AsmPrinter.h
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/test/CodeGen/AArch64/ifunc-asm.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/lower-args-vararg.ll
    M llvm/test/CodeGen/RISCV/vararg.ll
    M llvm/test/CodeGen/X86/code-model-elf-sections.ll
    M llvm/test/CodeGen/X86/ifunc-asm.ll
    M llvm/test/ExecutionEngine/JITLink/AArch32/ELF_thumbv7_printf.s
    M llvm/test/Transforms/InstCombine/add.ll
    M llvm/test/Transforms/InstCombine/and-or-not.ll
    M llvm/test/Transforms/InstCombine/logical-select.ll
    M llvm/test/Transforms/InstCombine/masked-merge-add.ll
    M llvm/test/Transforms/InstCombine/masked-merge-or.ll
    M llvm/test/Transforms/InstCombine/masked-merge-xor.ll
    M llvm/test/Transforms/InstCombine/pr53357.ll
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
    M llvm/tools/llvm-jitlink/llvm-jitlink.h
    M llvm/unittests/Analysis/ValueTrackingTest.cpp
    M llvm/unittests/IR/BasicBlockDbgInfoTest.cpp
    M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
    M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
    M mlir/test/Conversion/GPUCommon/lower-memory-space-attrs.mlir
    M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir

  Log Message:
  -----------
  review feedback

Created using spr 1.3.4

Compare: https://github.com/llvm/llvm-project/compare/628255efdeb2...08024c3d8a1e