[all-commits] [llvm/llvm-project] d6fbd9: [RISCV] Support FrameIndex operands in getMemOpera...
Alex Bradbury via All-commits
all-commits at lists.llvm.org
Tue Dec 5 13:27:09 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: d6fbd96e5eaf3e8acbf1b43dce7a311352907567
https://github.com/llvm/llvm-project/commit/d6fbd96e5eaf3e8acbf1b43dce7a311352907567
Author: Alex Bradbury <asb at igalia.com>
Date: 2023-12-05 (Tue, 05 Dec 2023)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[RISCV] Support FrameIndex operands in getMemOperandsWithOffsetWidth / getMemOperandWithOffsetWidth (#73802)
I noted AArch64 happily accepts a FrameIndex operand as well as a
register. This doesn't cause any changes outside of my C++ unit test for
the current state of in-tree, but this will cause additional test
changes if #73789 is rebased on top of it.
Note that the returned Offset doesn't seem at all as meaningful if you
have a FrameIndex base, though the approach taken here follows AArch64
(see D54847). This change won't harm the approach taken in
shouldClusterMemOps because memOpsHaveSameBasePtr will only return true
if the FrameIndex operand is the same for both operations.
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